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拉雷尔电子有限公司产品说明书

拉雷尔电子有限公司产品说明书

LAUREL ELECTRONICS, ureate™ Rate Meter & Totalizer with Functions A+B, A-B, AxB, A/B, A/B-1Features•Arithmetic functions A+B, A-B, AxB, A/B, A/B-1 applied to rate or total forchannels A & B•Frequencies from 0.005 Hz to 10 kHz•Independent scaling for each channel•Selectable "count by" of 10 or 100 with rounding•6-digit red or green LED display•Universal AC power Input, 85-264 Vac•Isolated 5, 10 or 24 Vdc excitation output•NEMA 4X, 1/8 DIN case•Optional serial I/O: Ethernet, USB, RS232, RS485, Ethernet-to-RS485 converter•Optional relay outputs: dual or quad relays, contact or solid state•Optional isolated analog output: 4-20 mA, 0-20 mA, 0-10V, -10 to +10V•Optional low voltage power: 10-48 Vdc or 12-32 VacDescriptionArithmetic functions A+B, A-B, AxB, A/B, A/B-1 applied tochannels A & B are a capability of Laureates with an Extendedcounter main board and FR dual-channel signal conditionerboard. These functions are applicable to rate or total after scalingto engineering units. The following are application examples:•Add two flows (A+B) for total flow or total volume.•Subtract two flows (A-B) for net flow or net volume.•Take the ratio of two flow rates (A/B) for chemical mixing.•Take the ratio of RPMs or belt speeds (A/B) to synchronizemoving machinery.•Subtract 1 from ratio (A/B-1) to control elongation of materialcompressed by rollers (draw).•Multiply belt speed by weight of material on the belt to for rateor weight of material delivered by the belt. A weighttransducer with frequency output is required.Ratio and draw are similar, except that 1 is subtracted from ratioto obtain draw. The frequency of channels A or B is measuredand converted to rate in engineering units by multiplying it by theappropriate scale factor for that channel. Either rate can bedisplayed. The A/B ratio is taken mathematically by the meter,and 1 is subtracted for draw. The result can be multiplied by amultiple or 10 from 0.0001 to 100000, and the decimal point canbe set to display the result with the desired precision up to sixdigits.Fast, High Resolution Measurements. Laureate countersdetermine frequency by timing an integral number of periods overa programmable gate time. The inverse period approach allowsgreater accuracy and faster update times than conventionalmeters which count signal pulses over a specified time interval.Channel A accepts pulses from 0.005 Hz to 1 MHz, while Chan-nel B accepts pulses from 0.005 Hz to 250 kHz. At the minimumgate time of 10 ms, update rates can be up to 25/second. Suchfast response is ideal for peak capture and for alarm and controlapplications. Variations in the displayed reading can be reducedby selecting a longer gate time. An adaptive digital filter canfurther reduce variations due to noise while rapidly responding toactual changes in the signal.Universal Signal Conditioner. The Laureate dual-channelsignal conditioner accepts inputs from proximity switches withPNP or NPN output, TTL or CMOS logic, magnetic pickups,contact closures, low-level outputs from turbine flow meters downto 12 mV, or high-level AC line inputs to 250 Vac. Jumper selec-tions provide optimum operation for different sensor types andnoise conditions. A built-in isolated 5, 10, or 24 Vdc excitationsupply can power proximity switches or other sensors, andeliminate the need for an external power supply.Designed for system use. Optional plug-in boards includeEthernet and other serial communication boards, dual or quadrelay boards, and an isolated analog output board. Laureatesmay be powered from 85-264 Vac or optionally from 12-32 Vacor 10-48 Vdc. The display is available with red or green LEDs.The 1/8 DIN case meets NEMA 4X (IP65) specifications from thefront when panel mounted. Any setup functions and front panelkeys can be locked out for simplified usage and security. A built-in isolated 5, 10, or 24 Vdc excitation supply can power trans-ducers and eliminate the need for an external power supply.All power and signal connections are via UL / VDE / CSA ratedscrew clamp plugs.SpecificationsDisplayReadout Display Range Zero Adjust Span Adjust Indicators 6 LED digits, 7-segment, 14.2 mm (.56"), red or green LED -999999 to +999999, XXXXEX notation beyond 999999-999999 to +9999990 to 999999Four LED lampsInputsTypesSignal Ground Channel A Frequency Channel B Frequency Minimum Signal Maximum Signal Noise FilterContact Debounce AC, pulses from NPN, PNP transistors, contact closures, magnetic pickups Common ground for channels A & B0.005 Hz to 1 MHz0.005 Hz to 250 kHzNine ranges from (-12 to +12 mV) to (+1.25 to +2.1V)250 Vac1 MHz, 30 kHz, 250 Hz (selectable)0, 3, 50 ms (selectable)Rate AccuracyTime Base Span Tempco Long-term Drift Crystal calibrated to ±2 ppm ±1 ppm/°C (typ)5 ppm/yearPowerVoltage, standard Voltage, optional Power frequency Power consumption (typical, base meter) Power isolation 85-264 Vac or 90-300 Vdc12-32 Vac or 10-48 VdcDC or 47-63 Hz1.2W @ 120 Vac, 1.5W @ 240 Vac, 1.3W @ 10 Vdc, 1.4W @ 20 Vdc, 1.55W @ 30 Vdc, 1.8W @ 40 Vdc,2.15W @ 48 Vdc250V rms working, 2.3 kV rms per 1 min testExcitation Output (standard)5 Vdc10 Vdc24 VdcOutput Isolation 5 Vdc ± 5%, 100 mA10 Vdc ± 5%, 120 mA 24 Vdc ± 5%, 50 mA50 Vdc to meter groundAnalog Output (optional)Output Levels Current compliance Voltage compliance Scaling Resolution Isolation 4-20 mA, 0-20 mA, 0-10V, -10 to +10V (single-output option) 4-20 mA, 0-20 mA, 0-10V (dual-output option)2 mA at 10V ( > 5 kΩ load)12V at 20 mA ( < 600Ω load)Zero and full scale adjustable from -99999 to +9999916 bits (0.0015% of full scale)250V rms working, 2.3 kV rms per 1 min test(dual analog outputs share the same ground)Relay Outputs (optional)Relay Types Current Ratings Output common Isolation 2 Form C contact relays or 4 Form A contact relays (NO)2 or 4 Form A, AC/DC solid state relays (NO)8A at 250 Vac or 24 Vdc for contact relays120 mA at 140 Vac or 180 Vdc for solid state relays Isolated commons for dual relays or each pair of quad relays 250V rms working, 2.3 kV rms per 1 min testSerial Data I/O (optional)Board Selections ProtocolsData Rates Digital Addresses Isolation Ethernet, Ethernet-to-RS485 converter, USB, USB-to-RS485 converter, RS485 (dual RJ11), RS485 Modbus (dual RJ45), RS232.Modbus RTU, Modbus ASCII, Laurel ASCII protocol300 to 19200 baud247 (Modbus), 31 (Laurel ASCII),250V rms working, 2.3 kV rms per 1 min testEnvironmental Operating Temp. Storage Temp.Relative Humidity Protection0°C to 55°C -40°C to 85°C95% at 40°C, non-condensingNEMA-4X (IP-65) when panel mountedSignal ConnectionsMechanicalApplication ExamplesControlling the Mixing Ratio of Two FluidsDisplaying and alarming the input flow rate ratio of two fluids (gas or liquid) allows these to be mixed in a predetermined ratio in continuous processes. The sensing element is normally a turbine flowmeter, which outputs pulses at a frequency proportional to flow rate. The A/B ratio can also be displayed for totalized rate (or delivered volume). Comparing Fluid Inflow & OutflowThe ratio of the inflow and outflow rates of a tank is a measure of the relative filling or emptying rate. The same meter can also be programmed to display the net inflow or outflow rate in flow units, or to display totalized inflow our outflow in volume units. Any of these parameters can be alarmed using the dual relay board and be transmitted via 4-20 mA, RS-232 or RS-485. Controlling Coating Thickness on a FilmIn this application, Channel A measures the rate at which a coating material is applied, as measured by a flow meter, while Channel B measures the speed of the film based on pulses from a proximity switch. Displaying and alarming the A/B ratio assures that an even thickness of coating material is applied as the speed of the film is varies. Synchronizing Two Conveyor LinesThe dual-channel Laureate counter can measure the speed of conveyor lines by using the output of proximity switches which sense gear teeth or spokes of rotating drive wheels. Displaying the speed ratio of two lines allows line speeds to be adjusted so that material arrives at work stations when needed. Measuring Draw for ElongationDraw (Ch A / Ch B - 1) can be used to display the elongation of films compressed between rollers, the shrinkage films, and the RPM difference of rollers whose speed is varied to maintain tension. The six-digit resolution of the Laureate dual channel counter / rate meter is ideal for comparison of rates that are close to each other.Ordering GuideCreate a model number in this format: L70000FR, IPCMain Board L7 Extended Main Board, Green LEDsL8 Extended Main Board, Red LEDsNote: Extended capability is required for arithmetic functions, simultaneous rate and total in thesame counter, phase, stopwatch, batching, and custom curve linearization.Power0 Isolated 85-264 Vac1 Isolated 12-32 Vac or 10-48 VdcRelay Output (isolated) 0 None1 Two 8A Contact Relays2 Two 120 mA Solid State Relays3 Four 8A Contact Relays4 Four 120 mA Solid State RelaysAnalog Output (isolated) 0 None1 Single isolated 4-20 mA, 0-20 mA, 0-10 V, -10 to +10V2 Dual isolated 4-20 mA, 0-20 mA, 0-10VDigital Interface (isolated) 0 None1 RS-2322 RS485 (dual RJ11 connectors)4 RS485 Modbus (dual RJ45 connectors)5 USB6 USB-to-RS485 converter7 Ethernet8 Ethernet-to-RS485 converterInput Type FR Dual-Channel Pulse Input Signal ConditionerAdd-on Options CBL01RJ11-to-DB9 cable. RJ11 to DB9. Connects RS232 ports of meter and PC.CBL02USB-to-DB9 adapter cable. Combination of CBL02 and CBL01 connects meterRS232 port to PC USB port.CBL03-16-wire data cable, RJ11 to RJ11, 1 ft. Used to daisy chain meters via RS485.CBL03-76-wire data cable, RJ11 to RJ11, 7 ft. Used to daisy chain meters via RS485.CBL05USB cable, A-B. Connects USB ports of meter and PC.CBL06USB to RS485 adapter cable, half duplex, RJ11 to USB. Connects meter RS485 portto PC USB port.CASE1Benchtop laboratory case for one 1/8 DIN meterCASE2Benchtop laboratory case for two 1/8 DIN metersIPC Splash-proof coverBOX1NEMA-4 EnclosureBOX2NEMA-4 enclosure plus IPCBL Blank Lens without button padsNL Meter lens without button pads or Laurel logo。

FPGA可编程逻辑器件芯片ADM1485ARZ-REEL中文规格书

FPGA可编程逻辑器件芯片ADM1485ARZ-REEL中文规格书

Data SheetADE7758MCU04443-086Figure 87. ADE7758 Interrupt Management04443-087Figure 88. ADE7758Interrupt TimingDINDOUT04443-088Figure 89. Addressing ADE7758 Registers via the Communications RegisterThe communications register is an 8-bit, write-only register. The MSB determines whether the next data transfer operation is a read or a write. The seven LSBs contain the address of the register to be accessed (see Table 16).Figure 90 and Figure 91 show the data transfer sequences for a read and write operation, respectively.MULTIBYTEDIN SCLKDOUTREAD DATACS 04443-089Figure 90. Reading Data from the ADE7758 via the Serial InterfaceDINSCLKCS04443-090Figure 91. Writing Data to the ADE7758 via the Serial InterfaceOn completion of a data transfer (read or write), the ADE7758 once again enters into communications mode, that is, the next instruction followed must be a write to the communications register.A data transfer is completed when the LSB of the ADE7758 register being addressed (for a write or a read) is transferred to or from the ADE7758.SERIAL WRITE OPERATIONThe serial write sequence takes place as follows. With theADE7758 in communications mode and the CS input logic low, a write to the communications register takes place first. The MSB of this byte transfer must be set to 1, indicating that the next data transfer operation is a write to the register. The seven LSBs of this byte contain the address of the register to be written to. The starts shifting in the register data on the next falling edge of SCLK. All remaining bits of register data are shifted in on the falling edge of the subsequent SCLK pulses (see ).ADE7758Figure 92As explained earlier, the data write is initiated by a write to the communications register followed by the data. During a data write operation to the ADE7758, data is transferred to all on-chip registers one byte at a time. After a byte is transferred into the serial port, there is a finite time duration before the content in the serial port buffer is transferred to one of the ADE7758 on-chip registers. Although another byte transfer to the serial port can start while the previous byte is being transferred to the destination register, this second-byte transfer should not finish until at least 900 ns after the end of the previous byte transfer. This functionality is expressed in the timing specification t 6 (see Figure 92). If a write operation is aborted during a byte transfer (CS brought high), then that byte is not written to the destination register.Destination registers can be up to 3 bytes wide (see theAccessing the On-Chip Registers section). Therefore, the first byte shifted into the serial port at DIN is transferred to the most significant byte (MSB) of the destination register. If the destination register is 12 bits wide, for example, a two-byte data transfer must take place. The data is always assumed to be right justified; therefore, in this case, the four MSBs of the first byte would be ignored, and the four LSBs of the first byte written to the ADE7758 would be the four MSBs of the 12-bit word. Figure 93 illustrates this example.COMMAND BYTE MOST SIGNIFICANT BYTE LEAST SIGNIFICANT BYTE04443-091Figure 92. Serial Interface Write Timing DiagramSCLKDIN X X X X DB11DB10DB9DB8DB7DB6DB5DB4DB3DB2DB1DB0MOST SIGNIFICANT BYTE LEAST SIGNIFICANT BYTE04443-092Figure 93. 12-Bit Serial Write OperationSCLKCSDINDOUTCOMMAND BYTE04443-093Figure 94. Serial Interface Read Timing DiagramOPERATIONAL MODE REGISTER (0x13)The general configuration of the ADE7758 is defined by writing to the OPMODE register. Table 18 summarizes the functionality of each bit in the OPMODE register.Table 18. OPMODE RegisterBit Location BitMnemonicDefaultValue Description0 DISHPF 0 The HPFs in all current channel inputs are disabled when this bit is set.1 DISLPF 0 The LPFs after the watt and VAR multipliers are disabled when this bit is set.2 DISCF 1 The frequency outputs APCF and VARCF are disabled when this bit is set.3 to 5 DISMOD 0 By setting these bits, the ADE7758 ADCs can be turned off. In normal operation, these bits shouldbe left at Logic 0.DISMOD[2:0] Description0 0 0 Normal operation.1Redirect the voltage inputs to the signal paths for the current channels andthe current inputs to the signal paths for the voltage channels.0 0 1 Switch off only the current channel ADCs.11Switch off current channel ADCs and redirect the current input signals to thevoltage channel signal paths.0 1 0 Switch off only the voltage channel ADCs.11Switch off voltage channel ADCs and redirect the voltage input signals to thecurrent channel signal paths.11PuttheADE7758 in sleep mode.111PuttheADE7758 in power-down mode (reduces AI DD to 1 mA typ).6 SWRST 0 Software Chip Reset. A data transfer to the ADE7758 should not take place for at least 166 μs aftera software reset.7 Reserved 0 This should be left at 0.MEASUREMENT MODE REGISTER (0x14)The configuration of the PERIOD and peak measurements made by the ADE7758 is defined by writing to the MMODE register. Table 19 summarizes the functionality of each bit in the MMODE register.Table 19. MMODE RegisterBit Location BitMnemonicDefaultValue Description0 to 1 FREQSEL 0 These bits are used to select the source of the measurement of the voltage line frequency.FREQSEL1 FREQSEL0 Source0 0 Phase A0 1 Phase B1 0 Phase C1 1 Reserved2 to 4 PEAKSEL 7 These bits select the phases used for the voltage and current peak registers. Setting Bit 2 switchesthe IPEAK and VPEAK registers to hold the absolute values of the largest current and voltagewaveform (over a fixed number of half-line cycles) from Phase A. The number of half-line cycles isdetermined by the content of the LINECYC register. At the end of the LINECYC number of half-linecycles, the content of the registers is replaced with the new peak values. Similarly, setting Bit 3 turnson the peak detection for Phase B, and Bit 4 for Phase C. Note that if more than one bit is set, theVPEAK and IPEAK registers can hold values from two different phases, that is, the voltage andcurrent peak are independently processed (see the Peak Current Detection section).5 to 7 PKIRQSEL 7 These bits select the phases used for the peak interrupt detection. Setting Bit 5 switches on themonitoring of the absolute current and voltage waveform to Phase A. Similarly, setting Bit 6 turns onthe waveform detection for Phase B, and Bit 7 for Phase C. Note that more than one bit can be set fordetection on multiple phases. If the absolute values of the voltage or current waveform samples inthe selected phases exceeds the preset level specified in the VPINTLVL or IPINTLVL registers thecorresponding bit(s) in the STATUS registers are set (see the Peak Current Detection section).Data Sheet ADE7758ADE7758 Data SheetCOMPUTATIONAL MODE REGISTER (0x16)The computational method of the ADE7758 is defined by writing to the COMPMODE register. Table 21 summarizes the functionality of each bit in the COMPMODE register.。

MM5ZxxxST1G Serie Zener Voltage Regulators 500 mW

MM5ZxxxST1G Serie Zener Voltage Regulators 500 mW

MM5ZxxxST1G Series, SZMM5ZxxxST1G Series Zener Voltage Regulators 500 mW SOD−523 Surface MountThis series of Zener diodes is packaged in a SOD−523 surface mount package. They are designed to provide voltage regulation protection and are especially attractive in situations where space is at a premium. They are well suited for applications such as cellular phones, hand held portables, and high density PC boards. Specification Features•Standard Zener Breakdown V oltage Range −2.4 V to 18 V •Steady State Power Rating of 500 mW•Small Body Outline Dimensions:0.047″ x 0.032″ (1.20 mm x 0.80 mm)•Low Body Height: 0.028″ (0.7 mm)•ESD Rating of Class 3 (> 16 kV) per Human Body Model •Tight Tolerance V Z•SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable•These Devices are Pb−Free and are RoHS Compliant*Mechanical CharacteristicsCASE:V oid-free, transfer-molded, thermosetting plasticEpoxy Meets UL 94, V−0LEAD FINISH: 100% Matte Sn (Tin)MOUNTING POSITION:AnyQUALIFIED MAX REFLOW TEMPERATURE: 260°CDevice Meets MSL 1 RequirementsMAXIMUM RATINGSRating Symbol Max UnitTotal Device Dissipation FR−4 Board, (Note 1) @ T A = 25°CDerate above 25°C P D5004.0mWmW/°CThermal Resistance from Junction−to−Ambient (Note 1)R q JA250°C/WJunction and Storage Temperature Range T J, T stg−65 to+150°CStresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.1.FR−4 printed circuit board, single−sided copper, mounting pad 1 cm2.*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.Device Package Shipping†ORDERING INFORMATIONCathode AnodeSee specific marking information in the device marking column of the Electrical Characteristics table on page 2 of this data sheet.DEVICE MARKING INFORMATIONSOD−523CASE 502STYLE 1MARKING DIAGRAMXX= Specific Device CodeM Date Code*G= Pb−Free Package(Note: Microdot may be in either location)*Date Code orientation may vary dependingupon manufacturing location.MM5ZxxxST1G SOD−523(Pb−Free)3,000 /Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our T ape and Reel Packaging Specifications Brochure, BRD8011/D.SOD−523(Pb−Free)SZMM5ZxxxST1G3,000 /Tape & ReelSOD−523(Pb−Free)SZMM5ZxxxST5G8,000 /Tape & ReelELECTRICAL CHARACTERISTICS (T A = 25°C unless otherwise noted,V F = 0.9 V Max. @ I F = 10 mA for all types) Symbol Parameter V Z Reverse Zener Voltage @ I ZTI ZT Reverse CurrentZZT Maximum Zener Impedance @ I ZTI ZK Reverse CurrentZ ZK Maximum Zener Impedance @ I ZKI R Reverse Leakage Current @ V RV R Reverse VoltageI F Forward CurrentV F Forward Voltage @ I FQ V Z Maximum Temperature Coefficient of V Z C Max. Capacitance @V R = 0 and f = 1 MHzV Figure 1. Zener Voltage RegulatorELECTRICAL CHARACTERISTICS (V F = 0.9 Max @ I F = 10 mA for all types)Device*DeviceMarkingTestCurrentIzt mAZener VoltageVZZ ZK I Z= 1.0mA WMaxZ ZTI Z = IZT@ 10%Mod WMaxMaxIR @ VRd VZ/dt (mV/k)@ I ZT1 = 5 mA C pF Max @V R = 0f = 1 MHzMin Max m A V Min MaxMM5Z2V4ST1G T2 5.0 2.43 2.631000100120 1.0−3.50450MM5Z2V7ST1G T3 5.0 2.67 2.911000100100 1.0−3.50450MM5Z3V3ST1G T5 5.0 3.32 3.53100095 5.0 1.0−3.50450MM5Z3V6ST1G T6 5.0 3.60 3.85100090 5.0 1.0−3.50450MM5Z3V9ST1G T7 5.0 3.89 4.16100090 3.0 1.0−3.5−2.5450MM5Z4V3ST1G T8 5.0 4.17 4.43100090 3.0 1.0−3.50450MM5Z4V7ST1G/T5G T9 5.0 4.55 4.7580080 3.0 2.0−3.50.2260MM5Z5V1ST1G TA 5.0 4.98 5.250060 2.0 2.0−2.7 1.2225MM5Z5V6ST1G TC 5.0 5.49 5.7320040 1.0 2.0−2.0 2.5200MM5Z6V2ST1G TE 5.0 6.06 6.3310010 3.0 4.00.4 3.7185MM5Z6V8ST1G TF 5.0 6.65 6.9316015 2.0 4.0 1.2 4.5155MM5Z7V5ST1G TG 5.07.287.616015 1.0 5.0 2.5 5.3140MM5Z8V2ST1G TH 5.08.028.36160150.7 5.0 3.2 6.2135MM5Z9V1ST1G TK 5.08.859.23160150.5 6.0 3.87.0130MM5Z12VST1G TN 5.011.7412.2480250.18.0 6.010130MM5Z16VST1G TU 5.015.8516.5180400.0511.210.414105MM5Z18VST1G TW 5.017.5618.3580450.0512.612.416100 Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.*Include SZ-prefix devices where applicable.TYPICAL CHARACTERISTICSTEMPERATURE (°C)25010040200P O W E R D I S S I P A T I O N (%)50751001251508060Figure 2. Steady State Power DeratingPACKAGE DIMENSIONSSOD −523CASE 502ISSUE ENOTES:1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.2.CONTROLLING DIMENSION: MILLIMETERS.3.MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.4.DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PRO-TRUSIONS, OR GATE BURRS.DIM MIN NOM MAX MILLIMETERS D 1.10 1.20 1.30E 0.700.800.90A 0.500.600.70b 0.250.300.35c 0.070.140.20L 0.30 REF H 1.50 1.60 1.70*For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOLDERING FOOTPRINT*E RECOMMENDEDSIDE VIEW2XBOTTOM VIEWL2L2X2XL20.150.200.25STYLE 1:PIN 1.CATHODE (POLARITY BAND)2.ANODEON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。

MEMORY存储芯片ADM708ARZ-REEL中文规格书

MEMORY存储芯片ADM708ARZ-REEL中文规格书

Data SheetADuM1410/ADuM1411/ADuM1412FEATURESLow power operation 5 V operation1.3 mA per channel maximum at 0 Mbps to 2 Mbps 4.0 mA per channel maximum at 10 Mbps 3 V operation0.8 mA per channel maximum at 0 Mbps to 2 Mbps 1.8 mA per channel maximum at 10 Mbps Bidirectional communication 3 V/5 V level translationHigh temperature operation: 105°C Up to 10 Mbps data rate (NRZ)Programmable default output stateHigh common-mode transient immunity: >25 kV/µs 16-lead, RoHS compliant, SOIC wide body package Safety and regulatory approvalsUL recognition: 3750 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice 5A VDE certificate of conformityDIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 V IORM = 560 V peakTÜV approval: IEC/EN 60950-1V GND V V V V GND DD22OA OB OC OD2206580-001Figure 1. ADuM1410V GND V V V V CTRL GND DD22OA OB OC ID2206580-002Figure 2. ADuM1411V GND V V V V CTRL GNDDD22OA OB IC ID 2206580-003APPLICATIONSGeneral-purpose multichannel isolation SPI interface/data converter isolation RS-232/RS-422/RS-485 transceivers Industrial field bus isolationGENERAL DESCRIPTIONThe ADuM1410/ADuM1411/ADuM14121 are four-channel digital isolators based on Analog Devices, Inc., i Coupler® technology. Combining high speed CMOS and monolithic air core transformer technologies, these isolation components provide outstanding performance characteristics superior to alternatives such as optocoupler devices.By avoiding the use of LEDs and photodiodes, i Coupler devices remove the design difficulties commonly associated with opto-couplers. The usual concerns that arise with optocouplers, such as uncertain current transfer ratios, nonlinear transfer functions, and temperature and lifetime effects, are eliminated with the simple i Coupler digital interfaces and stable performance characteristics. The need for external drivers and other discrete components is eliminated with these i Coupler products. Furthermore, i Coupler1Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329.Figure 3. ADuM1412devices consume one-tenth to one-sixth the power of optocou-plers at comparable signal data rates.The ADuM1410/ADuM1411/ADuM1412 isolators provide four independent isolation channels in a variety of channel configu-rations and data rates (see the Ordering Guide) up to 10 Mbps. All models operate with the supply voltage on either side ranging from 2.7 V to 5.5 V , providing compatibility with lower voltage systems as well as enabling voltage translation functionality across the isolation barrier. All products also have a default output control pin. This allows the user to define the logic state the outputs are to adopt in the absence of the input power. Unlike other optocoupler alternatives, the ADuM1410/ADuM1411/ ADuM1412 isolators have a patented refresh feature that ensures dc correctness in the absence of input logic transitions and during power-up/power-down conditions.Data Sheet ADuM1410/ADuM1411/ADuM1412 SPECIFICATIONSELECTRICAL CHARACTERISTICS—5 V OPERATION4.5 V ≤ V DD1 ≤5.5 V, 4.5 V ≤ V DD2 ≤ 5.5 V; all minimum/maximum specifications apply over the entire recommended operation range, unless otherwise noted; all typical specifications are at T A = 25°C, V DD1 = V DD2 = 5 V. All voltages are relative to their respective ground. Table 1.Parameter Symbol Min Typ Max Unit Test Conditions/CommentsDC SPECIFICATIONSInput Supply Current per Channel,QuiescentI DDI (Q)0.50 0.73 mAOutput Supply Current per Channel,QuiescentI DDO (Q)0.38 0.53 mAADuM1410, Total Supply Current,Four Channels1DC to 2 MbpsV DD1 Supply Current I DD1 (Q) 2.4 3.2 mA DC to 1 MHz logic signal frequency V DD2 Supply Current I DD2 (Q) 1.2 1.6 mA DC to 1 MHz logic signal frequency10 Mbps (BRWZ Version Only)V DD1 Supply Current I DD1 (10)8.8 12 mA 5 MHz logic signal frequency V DD2 Supply Current I DD2 (10) 2.8 4.0 mA 5 MHz logic signal frequency ADuM1411, Total Supply Current,Four Channels1DC to 2 MbpsV DD1 Supply Current I DD1 (Q) 2.2 2.8 mA DC to 1 MHz logic signal frequency V DD2 Supply Current I DD2 (Q) 1.8 2.4 mA DC to 1 MHz logic signal frequency10 Mbps (BRWZ Version Only)V DD1 Supply Current I DD1 (10) 5.4 7.6 mA 5 MHz logic signal frequency V DD2 Supply Current I DD2 (10) 3.8 5.3 mA 5 MHz logic signal frequency ADuM1412, Total Supply Current,Four Channels1DC to 2 MbpsV DD1 or V DD2 Supply Current I DD1 (Q), I DD2(Q)2.0 2.6 mA DC to 1 MHz logic signal frequency10 Mbps (BRWZ Version Only)V DD1 or V DD2 Supply Current I DD1 (10), I DD2 (10) 4.6 6.5 mA 5 MHz logic signal frequencyAll ModelsInput Currents I IA, I IB, I IC,I ID, I CTRL1,I CTRL2, I DISABLE −10 +0.01 +10µA 0 V ≤ V IA, V IB, V IC, V ID ≤ V DD1 or V DD2,0 V ≤ V CTRL1, V CTRL2 ≤ V DD1 or V DD2,0 V ≤ V DISABLE ≤ V DD1Logic High Input Threshold V IH 2.0 V Logic Low Input Threshold V IL 0.8 VLogic High Output Voltages V OAH, V OBH,V OCH, V ODH (V DD1 or V DD2) − 0.1 5.0 V I Ox = −20 µA, V Ix = V IxH (V DD1 or V DD2) − 0.4 4.8 V I Ox = −4 mA, V Ix = V IxHLogic Low Output Voltages V OAL, V OBL,V OCL, V ODL0.0 0.1 V I Ox = 20 µA, V Ix = V IxL0.04 0.1 V I Ox = 400 µA, V Ix = V IxL0.2 0.4 V I Ox = 4 mA, V Ix = V IxL Rev. M | Page of 22ADuM1410/ADuM1411/ADuM1412 Data Sheet Parameter Symbol Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONSADuM1410ARWZ/ADuM1411ARWZ/ADuM1412ARWZMinimum Pulse Width2PW 1000 ns C L = 15 pF, CMOS signal levels Maximum Data Rate3 1 Mbps C L = 15 pF, CMOS signal levels Propagation Delay4t PHL, t PLH20 65 100 ns C L = 15 pF, CMOS signal levels Pulse Width Distortion, |t PLH − t PHL|4 PWD 40 ns C L = 15 pF, CMOS signal levels Propagation Delay Skew5t PSK50 ns C L = 15 pF, CMOS signal levels Channel-to-Channel Matching6t PSKCD/OD50 ns C L = 15 pF, CMOS signal levels ADuM1410BRWZ/ADuM1411BRWZ/ADuM1412BRWZMinimum Pulse Width2PW 100 ns C L = 15 pF, CMOS signal levels Maximum Data Rate310 Mbps C L = 15 pF, CMOS signal levels Propagation Delay4t PHL, t PLH20 30 50 ns C L = 15 pF, CMOS signal levels Pulse Width Distortion, |t PLH − t PHL|4 PWD 5 ns C L = 15 pF, CMOS signal levels Change vs. Temperature 5 ps/°C C L = 15 pF, CMOS signal levels Propagation Delay Skew5t PSK30 ns C L = 15 pF, CMOS signal levels Channel-to-Channel Matching,Codirectional Channels6t PSKCD 5 ns C L = 15 pF, CMOS signal levelsChannel-to-Channel Matching,Opposing-Directional Channels6t PSKOD 6 ns C L = 15 pF, CMOS signal levelsAll ModelsOutput Rise/Fall Time (10% to 90%) t R/t F 2.5 ns C L = 15 pF, CMOS signal levelsCommon-Mode Transient Immunity at Logic High Output7|CM H| 25 35 kV/µs V Ix = V DD1 or V DD2, V CM = 1000 V,transient magnitude = 800 VCommon-Mode Transient Immunity at Logic Low Output7 |CM L| 25 35 kV/µs V Ix = 0 V, V CM = 1000 V,transient magnitude = 800 VRefresh Rate f r 1.2 MbpsInput Enable Time8t ENABLE 2.0 µs V IA, V IB, V IC, V ID = 0 V or V DD1 Input Disable Time8t DISABLE 5.0 µs V IA, V IB, V IC, V ID = 0 V or V DD1Input Dynamic Supply Current per Channel9I DDI (D)0.12 mA/MbpsOutput Dynamic Supply Current per Channel9I DDO (D)0.04 mA/Mbps1 The supply current values for all four channels are combined when running at identical data rates. Output supply current values are specified with no output load present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See Figure 8 through Figure 10 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 11 through Figure 15 for total V DD1 and V DD2 supply currents as a function of data rate for ADuM1410/ADuM1411/ADuM1412 channel configurations.2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.4 t PHL propagation delay is measured from the 50% level of the falling edge of the V Ix signal to the 50% level of the falling edge of the V Ox signal. t PLH propagation delay is measured from the 50% level of the rising edge of the V Ix signal to the 50% level of the rising edge of the V Ox signal.5 t PSK is the magnitude of the worst-case difference in t PHL or t PLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions.6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier.7 |CM H| is the maximum common-mode voltage slew rate that can be sustained while maintaining V O > 0.8 V DD2. |CM L| is the maximum common-mode voltage slew rate that can be sustained while maintaining V O < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient magnitude is the range over which the common mode is slewed.8 Input enable time is the duration from when V DISABLE is set low until the output states are guaranteed to match the input states in the absence of any input data logic transitions. If an input data logic transition within a given channel does occur within this time interval, the output of that channel reaches the correct state within the much shorter duration as determined by the propagation delay specifications within this data sheet. Input disable time is the duration from when V DISABLE is set high until the output states are guaranteed to reach their programmed output levels, as determined by the CTRL2 logic state (see Table 14).9 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate. See Figure 8 through Figure 10 for information on per-channel supply current for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating the per-channel supply current for a given data rate.Rev. M | Page of 22Data Sheet ADuM1410/ADuM1411/ADuM1412ELECTRICAL CHARACTERISTICS—3 V OPERATION2.7 V ≤ V DD1 ≤3.6 V, 2.7 V ≤ V DD2 ≤ 3.6 V; all minimum/maximum specifications apply over the entire recommended operation range, unless otherwise noted; all typical specifications are at T A = 25°C, V DD1 = V DD2 = 3.0 V. All voltages are relative to their respective ground. Table 2.Parameter Symbol Min Typ Max Unit Test Conditions/CommentsDC SPECIFICATIONSInput Supply Current per Channel,QuiescentI DDI (Q)0.25 0.38 mAOutput Supply Current per Channel,QuiescentI DDO (Q)0.19 0.33 mAADuM1410, Total Supply Current,Four Channels1DC to 2 MbpsV DD1 Supply Current I DD1 (Q) 1.2 1.6 mA DC to 1 MHz logic signalfrequency V DD2 Supply Current I DD2 (Q)0.8 1.0 mA DC to 1 MHz logic signalfrequency10 Mbps (BRWZ Version Only)V DD1 Supply Current I DD1 (10) 4.5 6.5 mA 5 MHz logic signal frequency V DD2 Supply Current I DD2 (10) 1.4 1.8 mA 5 MHz logic signal frequency ADuM1411, Total Supply Current,Four Channels1DC to 2 MbpsV DD1 Supply Current I DD1 (Q) 1.0 1.9 mA DC to 1 MHz logic signal frequency V DD2 Supply Current I DD2 (Q)0.9 1.7 mA DC to 1 MHz logic signal frequency10 Mbps (BRWZ Version Only)V DD1 Supply Current I DD1 (10) 3.1 4.5 mA 5 MHz logic signal frequency V DD2 Supply Current I DD2 (10) 2.1 3.0 mA 5 MHz logic signal frequency ADuM1412, Total Supply Current,Four Channels1DC to 2 MbpsV DD1 or V DD2 Supply Current I DD1 (Q), I DD2 (Q) 1.0 1.8 mA DC to 1 MHz logic signal frequency10 Mbps (BRWZ Version Only)V DD1 or V DD2 Supply Current I DD1 (10), I DD2 (10) 2.6 3.8 mA 5 MHz logic signal frequencyAll ModelsInput Currents I IA, I IB, I IC, I ID,I CTRL1,I CTRL2, I DISABLE −10 +0.01 +10µA 0 V ≤ V IA, V IB, V IC, V ID ≤ V DD1 or V DD2,0 V ≤ V CTRL1, V CTRL2 ≤ V DD1 or V DD2,0 V ≤ V DISABLE ≤ V DD1Logic High Input Threshold V IH 1.6 V Logic Low Input Threshold V IL 0.4 VLogic High Output Voltages V OAH, V OBH,V OCH, V ODH (V DD1 or V DD2) − 0.1 3.0 V I Ox = −20 µA, V Ix = V IxH (V DD1 or V DD2) − 0.4 2.8 V I Ox = −4 mA, V Ix = V IxHLogic Low Output Voltages V OAL, V OBL,V OCL, V ODL0.0 0.1 V I Ox = 20 µA, V Ix = V IxL0.04 0.1 V I Ox = 400 µA, V Ix = V IxL0.2 0.4 V I Ox = 4 mA, V Ix = V IxL Rev. M | Page of 22ADuM1410/ADuM1411/ADuM1412 Data Sheet。

亚赫英氏SQ-6混音控制台指南说明书

亚赫英氏SQ-6混音控制台指南说明书

IntroductionSafetyBefore powering on the SQ, read the safety instructions sheet (AP9240/CL1-1) that is supplied along with this guide. For your own safety and that of the operator, technical crew and performers, follow all instructions and heed all warnings included in these documents and printed directly on the equipment. RegistrationTo be kept informed of updates, the latest firmware and new releases for the SQ range, register your SQ-6 at /registerFirmware and Reference GuideThis introduction is intended to give you an overview of the SQ-6 hardware and outline operating principles. Visit to obtain the latest version of firmware and reference guide. The latest firmware is required if you intend to use any SQ Apps with your SQ.VentilationThe SQ uses fans for cooling. Adequate space must be left for air flow around fans and vents when in use.FeaturesThe SQ is a high resolution 96kHz audio mixing console. It has been designed using the latest technology to provide the most detailed and accurate sound quality, along with a range of options for expandability and integration.AP11349 Issue 2AccessoriesSQ-BRACKET Detachable Metal Bracket for iPad/tabletAP11333 Water repellent polyester dustcover with printed logoAR84 8 XLR input, 4 XLR output, dSnake Remote AudioRack (Rackmount) AR2412 24 XLR input, 12 XLR output dSnake Remote AudioRack (Rackmount)AB168 16 XLR Input, 8 XLR Output, dSnake Remote AudioRack (StageBox/Rackmount) DX168 16 XLR Input, 8 XLR Output, 96kHz DX Remote AudioRack (StageBox/Rackmount) DX164-W 16 XLR Input, 4 XLR Output, 96kHz DX Wall Mount Audio Expander DX-HUB Remote Audio Hub with 4 DX Link ports (Rackmount kit available) AH9650 100m drum of EtherFlex Cat5e with locking Neutrik EtherCon connectors AH9981 50m drum of EtherFlex Cat5e with locking Neutrik EtherCon connectors AH965120m of Neutrik EtherFlex Cat5e with locking Neutrik EtherCon connectorsSLink Port Compatibility Sample Rate Protocol Max LengthDX168, DX164-W, DX Hub 96kHz DX 100m Cat5e or higher AR2412, AR84, AB168 48kHz dSnake 120mCat5e or higher ME-U, ME-1, ME-50048kHzdSnakeCat5e or higherSQ Range48 input channels with preamp, HPF, PEQ, gate, comp, delay 32 output channels (LR, 12 mono/stereo Mix, 3 Stereo Matrix) 8 stereo FX with dedicated return channels 8 Mute groups, 8 DCA groupsSource patching (Local, SLink remote, Option card, USB) Output socket and Insert I/O patchingMulti-channel USB streaming and direct to USB drive recording Talkback mic input, dual footswitch control, wireless controlSQ-6 Specific144 fader strips (24+1 faders, 6 layers) 24 local mic/line input sockets 3 local stereo line input sockets 14 XLR + 2 TRS output sockets 16 assignable SoftKeys4 assignable Soft Rotaries with LCD DisplaysLocal Mic/Line Inputs Local Stereo Line Inputs Talkback Mic Input Local XLR OutputsLocal TRS Jack OutputsAES Digital OutputMono/Dual Footswitch Connection Mains Power Input and Switch I/O Port - Option CardMulti-format multi-channel digital audioUSB-B PortConnection to a computer for multi-channel audio and MIDI I/O Network Port Connect to a router for network/wireless controlSLink PortFor connection to Allen&Heath remote audio racks, including AB, AR and DX ranges, as well as the ME personal monitoring systemTouch Screen, Screen Select Keys and Screen EncoderView processing and access the routing and setup menus using keys below. Touch to select a parameter and use the rotary to adjust values.Fader Strips and Layer Select Keys6 layers of 24 faders provide 144 assignable strips for access to any combination of channels, returns,masters and DCAs. Each strip has fader, mute, select and PAFL keys, peak and signal meter.Ident StripLCD displays show channel name and colour for each of the 24 strips. Press the‘View’ key to see secondary information such as input source.Channel(Pre/HPF/Gate/Comp)Physical controls for the selected channel. Preamp, HPF frequency, Gate threshold, Comp threshold.Channel (PEQ/GEQ)Physical controls for the selected channel. EQ band select keys and parametric controls. Use the ‘Fader Flip’ key to present selected mix GEQ on faders. Pan ControlMaster Strip and Mix Select KeysPress a blue ‘Mix’ key to present its sends on the 24 faders and its master on the master fader strip. Select ‘LR’ to work with the main LR mix and channel faders.FX Send Select KeysPress a blue ‘FX’ key to present its sends on the 24 faders and its master send on the master fader strip. Headphone Output and Level Control Main MeterDisplays the LR Mix or selected PAFL signal level.Talk KeyMomentary or latching switch for the talkback microphone.SQ-Drive PortRecord/play audio direct to/from a USB drive. Transfer scene, show and library data using a USB key. Update SQ firmware.ST3 Input3.5mm stereo jack input, can be used for connection to an external background music device.Pre Fade and Assign KeysHold ‘Pre-Fade’ and press ‘Sel’ to toggle channels pre or post fade to the mix. Hold ‘Assign’ and press ‘Sel’ to route channels to the selected mix.CH to All Mix KeyPress and hold to present all sends to mixes for the currently selected channel. The ident strip displays mix names. Copy/Paste/Reset KeysUsed to copy, paste or reset processing blocks or channel parameters.Library KeyOpens different libraries to enable save and recall of presets for channel/mix/FX processing.Assignable SoftKeysUse Setup screen to assign functions such as mutes, tap tempo, scene recall, SQ-Drive control and more.Assignable EncodersUse Setup screen to assign functions for quick access to often used parameters.i. Power off any connected amplifiers or powered speakers. ii. Navigate to the ‘Home’ screen and select ‘Shut Down’ iii.Switch off the unit using the push switch (27).Press a blue ‘LR’, ‘Mix’ or ‘FX’ Key to present send levels for the selected Mix on the 24 Fader Strips. Use the Layer Keys (2) to move through the 6 layers of faders and adjust individual levels. The Master strip (7) controls the master send level of the selected Mix/FX.Select a strip by pressing the green ‘Sel’ Key on a Fader Strip (2) or the Master Strip (7).The physical controls (4), (5) and (6) can now be used to adjust parameters for the selected strip.Go to the ‘Processing’ screen to see an overview of the processing for the selected strip.Tap on any part of the processing to see a detailed view, then touch a parameter on-screen and use the touch screen encoder (1) to adjust.Mute Keys are illuminated when a strip is muted.By default, PAFL (Pre/After Fade Listen) Keys allow you to route one channel at a time to the PAFL bus/Phones output. PAFL settings can be changed in the ‘Setup’ screen.Mix sends set to ‘Post Fade’ follow the LR send levels. To toggle channels between ‘Pre Fade’ and ‘Post Fade’ for the selected Mix, hold the ‘Pre Fade’ Key and use ‘Sel’ Keys.To assign or un-assign a strip from the currently selected mix, hold the ‘Assign’ Key and use ‘Sel’ Keys.Pressing and holding the ‘CH to All Mix’ Key will display the send levels for the currently selected strip across the main fader strips.Press the ‘FX’ Key to see and adjust FX engines.Use the ‘Library’ Key (17) to recall FX types and presets - change parameters by selecting on-screen and using the touch screen encoder.FX busses 1 to 4 (8) send to FX engines 1 to 4 by default.FX Return channels can be routed to Mixes in the same way as stereo input channels.Hold the ‘Copy’ Key and press an ‘In’ Key (4) (5), a ‘Sel’ Key (2) (7), to copy parameters.Hold the ‘Paste’ Key and press a ‘Sel’ Key (2) (7) to paste the copied processing to another channel. Hold the ‘Reset’ Key and press an ‘In’ Key (4) (5), a ‘Sel’ Key (2) (7), or on-screen to reset parameters.A ‘Scene’ is used to store or recall a mix. A ‘Show’ comprises multiple scenes and all settings. Press the ‘Scenes’ Key to access the list of scenes in the current show.Use a combination of scene filters and ‘Safes’ to decide which settings/parameters/strips are affected when a scene is recalled.i. Connect power lead (27).ii. Connect input sources using (20), (21) and (22).iii. Connect outputs (23) and (24) to amplifiers, speakers or line level inputs on other equipment. iv. If required, connect digital I/O such as AudioRacks or Computers using (25), (28), (29) and (31). v. If you are using a footswitch, connect this (26). vi. Switch on the SQ using the push switch (27).vii.Power on any connected amplifiers or powered speakers.To reset all mix, parameter and routing settings go to the ‘Scenes’ screen (1), then press and hold the ‘Reset Mix Settings’ button. This will ‘zero’ the desk without deleting saved scenes or libraries.To check or alter patching, go to the ‘I/O’ screen (1) and use the matrix to patch from Local/Digital Inputs to SQ input channels, and to patch SQ outputs [LR/Mix/Group/Matrix/DirectOut] to Local/Digital Outputs.Balanced mono/stereo inputs Mic or line level XLR 1=Gnd, 2=+, 3= -ST1 and ST2 Inputs Line level ¼” TRS Jack Tip= +, Ring= -, Sleeve=GndST3 Input Line level 3.5mm Jack Tip=Left, Ring=Right, Sleeve=Gnd Balanced XLR Outputs Line level XLR 1=Gnd, 2= +, 3= -Balanced Jack Outputs Line level ¼” TRS Jack Tip= +, Ring= -, Sleeve=GndSLink RJ45/EtherCON. Use Cat5e or higher. Refer to individual expansion unit instructions.AES Stereo Digital Output Digital XLR Use 110Ω AES CableRear USB Connection USB-B, Conforms to USB 2.0 standardNetwork Connection RJ45, Use Cat5e or higherFootswitch ¼” TRS (dual) or TS (mono) JackThere are many support resources available through our website including user guides, knowledgebase articles and access to the Allen & Heath Digital Community.For local language support, please contact the Allen & Heath distributor for your region.Limited One Year Manufacturer’s WarrantyAllen & Heath warrants the Allen & Heath -branded hardware product and accessories contained in the original packaging ("Allen & Heath Product”) against defects in materials and workmanship when used in accordance with Allen & Heath's user manuals, technical specifications and other Allen & Heath product published guidelines for a period of ONE (1) YEAR from the date of original purchase by the end-user purchaser ("Warranty Period").This warranty does not apply to any non-Allen & Heath branded hardware products or any software, even if packaged or sold with Allen & Heath hardware.Please refer to the licensing agreement accompanying the software for details of your rights with respect to the use of software/firmware (“EULA”).Details of the EULA, warranty policy and other useful information can be found on the Allen & Heath website: /legal.Repair or replacement under the terms of the warranty does not provide right to extension or renewal of the warranty period. Repair or direct replacement of the product under the terms of this warranty may be fulfilled with functionally equivalent service exchange units.This warranty is not transferable. This warranty will be the purchaser’s sole and exclusive remedy and neither Allen & Heath nor its approved service centres shall be liable for any incidental or consequential damages or breach of any express or implied warranty of this product.Conditions of WarrantyThe equipment has not been subject to misuse either intended or accidental, neglect, or alteration other than as described in the User Guide or Service Manual, or approved by Allen & Heath. The warranty does not cover fader wear and tear.Any necessary adjustment, alteration or repair has been carried out by an authorised Allen & Heath distributor or agent. The defective unit is to be returned carriage prepaid to the place of purchase, an authorised Allen & Heath distributor or agent with proof of purchase. Please discuss this with the distributor or the agent before shipping. Units returned should be packed in the original carton to avoid transit damage.DISCLAIMER: Allen & Heath shall not be liable for the loss of any saved/stored data in products that are either repaired or replaced.Check with your Allen & Heath distributor or agent for any additional warranty information which may apply. If further assistance is required please contact Allen & Heath Ltd.Any changes or modifications to the equipment not approved by Allen & Heath could void the compliance of the product and therefore the user’s authority to operate it.。

max485esa中文资料

max485esa中文资料

General DescriptionThe MAX481, MAX483, MAX485, MAX487–MAX491, andMAX1487 are low-power transceivers for RS-485 and RS-422 communication. Each part contains one driver and onereceiver. The MAX483, MAX487, MAX488, and MAX489feature reduced slew-rate drivers that minimize E MI andreduce reflections caused by improperly terminated cables,thus allowing error-free data transmission up to 250kbps.The driver slew rates of the MAX481, MAX485, MAX490,MAX491, and MAX1487 are not limited, allowing them totransmit up to 2.5Mbps.These transceivers draw between 120µA and 500µA ofsupply current when unloaded or fully loaded with disableddrivers. Additionally, the MAX481, MAX483, and MAX487have a low-current shutdown mode in which they consumeonly 0.1µA. All parts operate from a single 5V supply.Drivers are short-circuit current limited and are protectedagainst excessive power dissipation by thermal shutdowncircuitry that places the driver outputs into a high-imped-ance state. The receiver input has a fail-safe feature thatguarantees a logic-high output if the input is open circuit.The MAX487 and MAX1487 feature quarter-unit-loadreceiver input impedance, allowing up to 128 MAX487/MAX1487 transceivers on the bus. Full-duplex communi-cations are obtained using the MAX488–MAX491, whilethe MAX481, MAX483, MAX485, MAX487, and MAX1487are designed for half-duplex applications.________________________Applications Low-Power RS-485 Transceivers Low-Power RS-422 Transceivers Level Translators Transceivers for EMI-Sensitive Applications Industrial-Control Local Area Networks__Next Generation Device Features o For Fault-Tolerant Applications MAX3430: ±80V Fault-Protected, Fail-Safe, 1/4Unit Load, +3.3V, RS-485 Transceiver MAX3440E–MAX3444E: ±15kV ESD-Protected,±60V Fault-Protected, 10Mbps, Fail-Safe, RS-485/J1708 Transceivers o For Space-Constrained Applications MAX3460–MAX3464: +5V, Fail-Safe, 20Mbps,Profibus RS-485/RS-422 Transceivers MAX3362: +3.3V, High-Speed, RS-485/RS-422Transceiver in a SOT23 Package MAX3280E–MAX3284E: ±15kV ESD-Protected,52Mbps, +3V to +5.5V, SOT23, RS-485/RS-422,True Fail-Safe Receivers MAX3293/MAX3294/MAX3295: 20Mbps, +3.3V,SOT23, RS-485/RS-422 Transmitters o For Multiple Transceiver Applications MAX3030E–MAX3033E: ±15kV ESD-Protected,+3.3V, Quad RS-422 Transmitters o For Fail-Safe Applications MAX3080–MAX3089: Fail-Safe, High-Speed (10Mbps), Slew-Rate-Limited RS-485/RS-422Transceiverso For Low-Voltage ApplicationsMAX3483E/MAX3485E/MAX3486E/MAX3488E/MAX3490E/MAX3491E: +3.3V Powered, ±15kVESD-Protected, 12Mbps, Slew-Rate-Limited,True RS-485/RS-422 Transceivers For pricing, delivery, and ordering information, please contact Maxim Direct at1-888-629-4642, or visit Maxim Integrated’s website at .______________________________________________________________Selection Table19-0122; Rev 10; 9/14PARTNUMBERHALF/FULL DUPLEX DATA RATE (Mbps) SLEW-RATE LIMITED LOW-POWER SHUTDOWN RECEIVER/DRIVER ENABLE QUIESCENT CURRENT (μA) NUMBER OF RECEIVERS ON BUS PIN COUNT MAX481Half 2.5No Yes Yes 300328MAX483Half 0.25Yes Yes Yes 120328MAX485Half 2.5No No Yes 300328MAX487Half 0.25Yes Yes Yes 1201288MAX488Full 0.25Yes No No 120328MAX489Full 0.25Yes No Yes 1203214MAX490Full 2.5No No No 300328MAX491Full 2.5No No Yes 3003214MAX1487 Half 2.5No No Yes 2301288Ordering Information appears at end of data sheet.找电子元器件上宇航军工MAX481/MAX483/MAX485/MAX487–MAX491/MAX1487Low-Power, Slew-Rate-LimitedRS-485/RS-422 TransceiversPackage Information For the latest package outline information and land patterns, go to . Note that a “+”, “#”, or “-”in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.16Low-Power, Slew-Rate-Limited RS-485/RS-422 TransceiversMAX481/MAX483/MAX485/MAX487–MAX491/MAX1487Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-100017©2014 Maxim Integrated Products, Inc.Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.。

MEMORY存储芯片ADM485ARZ-REEL中文规格书

MEMORY存储芯片ADM485ARZ-REEL中文规格书

ADM485FUNCTIONAL BLOCK DIAGRAMCC 00078-001FEATURESMeets EIA RS-485 standard 5 Mbps data rateSingle 5 V supply–7 V to +12 V bus common-mode range High speed, low power BiCMOS Thermal shutdown protection Short-circuit protectionDriver propagation delay: 10 ns typical Receiver propagation delay: 15 ns typical High-Z outputs with power off Superior upgrade for LTC485APPLICATIONSLow power RS-485 systems DTE/DCE interface Packet switchingLocal area networks (LNAs) Data concentration Data multiplexersIntegrated services digital network (ISDN)GENERAL DESCRIPTIONThe ADM485 is a differential line transceiver suitable for high speed bidirectional data communication on multipoint bus transmission lines. It is designed for balanced data transmission and complies with EIA standards RS-485 and RS-422. The part contains a differential line driver and a differential line receiver. Both the driver and the receiver can be enabled independently. When disabled, the outputs are three-stated.The ADM485 operates from a single 5 V power supply. Excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit. If during fault conditions, a significant temperature increase is detected in the internal driver circuitry, this feature forces the driver output into a high impedance state.Up to 32 transceivers can be connected simultaneously on a bus, but only one driver should be enabled at any time. It is important, therefore, that the remaining disabled drivers do not load the bus. To ensure this, the ADM485 driver features high output impedance when disabled and when powered down, which minimizes the loading effect when the transceiver is not being used. The high impedance driver output is maintained over the common-mode voltage range of −7 V to +12 V .Figure 1.The receiver contains a fail-safe feature that results in a logic high output state if the inputs are unconnected (floating). The ADM485 is fabricated on BiCMOS, an advanced mixed technology process combining low power CMOS with fast switching bipolar technology. All inputs and outputs contain protection against ESD; all driver outputs feature high source and sink current capability. An epitaxial layer is used to guard against latch-up.The ADM485 features extremely fast switching speeds. Minimal driver propagation delays permit transmission at data rates up to 5 Mbps while low skew minimizes EMI interference. The part is fully specified over the commercial and industrial temperature range and is available in 8-lead PDIP , 8-lead SOIC, and small footprint, 8-lead MSOP packages.ADM485Rev. F | Page 2 of 16ADM485SPECIFICATIONSV CC = 5 V ± 5%, all specifications T MIN to T MAX, unless otherwise noted.Rev. F | Page 3 of 16ADM485TIMING SPECIFICATIONSV CC = 5 V ± 5%, all specifications T MIN to T MAX, unless otherwise noted.1 Guaranteed by characterization.Rev. F | Page 4 of 16ADM485Rev. F | Page 5 of 16ABSOLUTE MAXIMUM RATINGST A = 25°C, unless otherwise noted.Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operationalsection of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.Table 4. TransmittingInputsOutputsDE DIB A 1 1 0 1 1 0 1 0 0X 1Z 2Z 21 X = don’t care.2Z = high impedance.1 X = don’t care.2Z = high impedance.ESD CAUTION。

千兆光猫用户手册说明书

千兆光猫用户手册说明书

The CODA-5519is a powerful router that will be used as the heart of your wireless home.It will offer strong Wi-Fi that will covers most houses.The CODA-5519has the capability to receive 5Gbps bi-directional based on 2OFDM +32QAM downstream channels and with 2OFDMA +8upstream channels over its DOCSIS 3.1interface.The integrated Wi-Fi 4x42.4GHz 802.11ax and 4x45GHz 802.11ax dual band MU-MIMO Access Point significantly improves customer experience extending range and coverage with blazing speeds.For wired clients,2.5G plus two Gigabit Ethernet ports offer ultra-fast connection.It can be paired with Hitron extenders/mesh pods for extra coverage.•DOCSIS 3.1 2x2 multi-carrier OFDM •DOCSIS 3.0 32x8 channel bonding•4x4 2.4GHz 802.11ax and 4x4 5GHz 802.11ax dual band concurrent MU-MIMO internal antennas •16 SSIDs (8SSIDs per radio)•Individual configuration for each SSID (security, bridging, routing, firewall and Wi-Fi parameters)•Extensive operator control via configuration file and SNMP•Integrated DLNA Media Server with support for video, audio and image servingDOCSIS 3.1 Wi-Fi 6 and eMTA GatewayIntel® Puma™ 7 OFDM 2x2 w / fixed upstream, 4x4 dual band Wi-Fi w/ concurrent 802.11ax 2.4Ghz + 5GHz, MoCA 2.0 channel bonding and voice HIGH PERFORMANCE INTERNET AND WIRELESS ACCESSThe CODA-5519supports pre-configured and pre-enabled Wi-Fi security via Wi-Fi Protected Setup (WPS),allowing the end-user to rapidly set up a secure wireless network without manual configuration.Hitron's AutoSync software provides secure automated setup of extenders in the customer's home or business.It comes with MyHitron (end user management mobile application).MSO can also get extra management and analytics via HitronCloud/OptiMy CSR interface from the support center.SECURE WIRELESS NETWORKING CONTROLLED AT THE TIP OF YOUR FINGERSKEY FEATURES•IPv6 routing•MoCA 2.0 channel bonding•TR-069 and HNAP for easy setup and remote management•Enhanced management and stability for low total cost of ownership•One 2.5G and Two 1G Ethernet ports •Hitron Ecosystem Support (OptiMy, HitronCloud, MyHitron)•2 HD voice ports with SIP or MGCP supportTVStreamer Smartphone TabletThermostatHome Security LaptopCODA-5519Printer PCMoCA ExtenderPhonesWi-Fi1G Ethernet Analog2.5G Ethernet Coax PodLaptop Gaming ConsoleConnectivity•RF F-Type 75Ωfemale connector•2x RJ-45 Ethernet port 10/100/1000Mbps•1x RJ-45 Ethernet port 10/100/1000/2500Mbps•USB 3.0 type A connector with host interface•2x RJ-11 HD voice ports•EBBU jackManagement•Protocol support: TR-069, TFTP, SSHv2, SNMP v2C, v3•Web-based GUI control, configuration and management •Power-on self diagnostic•Hitron proprietary MIBs for extended support onDOCSIS, router management, Wi-Fi managementand MoCA management•app support•and back end supportReception-Demodulation•DOCSIS 3.1/3.0/2.0•DOCSIS 3.1 demodulation: Multi-carrier OFDM 16 to 4096QAM •DOCSIS 3.1 data rate: Up to 5Gps with 2 OFDM 192MHz downstream channels +32 QAM•DOCSIS 3.0 demodulation: 64QAM, 256QAM•DOCSIS 3.0 data rate: Up to 1.2Gbps with 32 bonded downstream channels•Frequency (edge-to-edge): 108-1218MHz and 258-1218 •Channel Bandwidth: 6MHz•Signal level: -15dBmV to 15dBmVTransmitter-Modulation•DOCSIS 3.1/3.0/2.0•DOCSIS 3.1 modulation: Multi-carrier OFDMA BPSK to 4096QAM •DOCSIS 3.1 data rate: Up to 700Mbps with OFDMA 96MHz upstream channels•DOCSIS 3.0 modulation: QPSK, 8QAM, 16QAM, 32QAM, 64QAM, and 128QAM (SCDMA only)•DOCSIS 3.0 data rate: Up to 320Mbps with 8 bonded upstream channels•Frequency: Fixed 5-85MHz•Upstream transmit signal level: +11 to 65dBmVMoCA 2.0 Reception / Transmitter-Modulation •Demodulation/ Modulation: BPSK, QPSK, 8QAM, 16QAM,32QAM, 64QAM, 128QAM, 256QAM, 512QAM, 1024QAM •PHY data rate: 700Mbps (baseline Mode) / 1400Mbps (bonding channel)•Throughput: 400+Mbps (baseline mode) / 500+Mbps (turbo mode, point to point) / 800Mbps (bonding channel)•Frequency (center frequencies): 1400-1625MHz•Channel bandwidth: 100MHz (baseline mode) / 225MHz (bonding channel)Voice•Protocol support: SIP or MGCP•2x 8kHz each HD voice•Audio codecs: G.711 (a-law and mu-law), G.722 (HD codec), G.723.1, G.726, G.728, and G.729Routing Support•Protocol support: IGMP v3 for IPTV service capability•MAC address filtering (IPv4/IPv6)•IP source/destination address filtering (IPv4/IPv6)•DHCP, TFTP and ToD clients (IPv4/IPv6)•DHCP server supports RFC 1541 (IPv4)•DHCPv6 obtains prefix from DHCPv6 server through prefix delegation•Firewall with stateful inspection (IPv4/IPv6)•Hacker intrusion prevention and detection•Application content filtering (IPv4/IPv6)•Complete NAT software implemented as per RFC 1631 with port and address mapping (IPv4)•DSLite support for IPv4 in-home support with IPv6 MSO backbone •6RD support for quick IPv6 deployment over IPv4 backbone •RIPv2 for static IP supportWireless•802.11a/b/g/n/ac/ax•4T4R 2.4GHz 11ax and 4T4R 5GHz 11ax dual band concurrent MU-MIMO with 1Gbps+4.8Gbps PHY rate•20/40/80/160MHz channel bandwidth•Up to 8 SSIDs for each frequency•Security: WPA-PSK/WPA2-PSK (TKIP/AES), WPA3, WAPI •QoS: WMM/WMM-PS•WPS (Wi-Fi Protected Setup) PBC, PIN•Airtime Fairness (ATF), Band Steering (BS)•Dynamic Frequency Selection (DFS)•Wi-Fi output power range: Max permitted by FCC/IC Electrical•Input power: 12VDC, 4A•Power adaptor: 100-240VAC, 50/60Hz•Power consumption: 4.92 (power saving), 22W (typ.), 38W (Max)•Support power outage for 24 hours on Hitron external battery •Surge protection: RF input sustains at least 4KVEthernet RJ-45 sustains at least 4KV Mechanical•Factory default reset button•WPS button•Dimensions: 74.3mm (W) x 251.5mm (H) x 230.8mm (D)•Weight: Weight: 1850 ±10gEnvironmental•Operating temperature: 0°C (32°F) ~ 40°C (104°F)•Operating humidity: 10% ~ 90% (Non-condensing)•Storage temperature: -40°C (-40°F) ~ 60°C (140°F) Compliance Certificates•RoHS compliant•FCC, IC, ULSPECIFICATIONS。

ADI 磁隔离芯片选型表

ADI 磁隔离芯片选型表

三通道数字隔离器
型号 通道 3/0 3/0 3/0 2/1 2/1 2/1 3/0 3/0
ADUM1300ARWZ ADUM1300BRWZ ADUM1300CRWZ ADUM1301ARWZ ADUM1301BRWZ ADUM1301CRWZ ADUM1300WSRWZ ADUM1300WTRWZ
单通道数字隔离器型号通道1010101010adum1100arzadum1100brzadum1100urzadum3100arzadum3100brz隔离电压传输速率工作电压工作温度vrmsmbpsv250025305540105250010030554010525001003055401252500253055401052500100305540105封装soic8soic8soic8soic8soic8千片批量价163186279171196双通道数字隔离器型号通道202020111111202020111111202020111120202011111120201111adum1200arzadum1200brzadum1200crzadum1201arzadum1201brzadum1201crzadum1200wsrzadum1200wtrzadum1200wurzadum1201wsrzadum1201wtrzadum1201wurzadum1210brzadum2200arwzadum2200brwzadum2201arwzadum2201brwzadum3200arzadum3200brzadum3200crzadum3201arzadum3201brzadum3201crzadum3210brzadum3210trzadum3211brzadum3211trz隔离电压传输速率工作电压工作温度千片批量价封装vrmsmbpsv25001275540105soic8122250010275540105soic8178250025275540105soic824725001275540105soic8122250010275540105soic8178250025275540105soic824725001305540125soic8215250010305540125soic8314250025305540125soic843525001305540125soic8215250010305540125soic8314250025305540125soic8435250010275540105soic817850001305540105sow16167500010305540105sow1623950001305540105sow16167500010305540105sow162392500127

Silicon Labs EFR32MG 2.4 GHz 19.5 dBm 无线模组板参考手册说明书

Silicon Labs EFR32MG 2.4 GHz 19.5 dBm 无线模组板参考手册说明书

EFR32MG 2.4 GHz 19.5 dBm Radio BoardBRD4151A Reference Manualance, low energy wireless solution integrated into a small formfactor package.By combining a high performance 2.4 GHz RF transceiver with an energy efficient 32-bitMCU, the family provides designers the ultimate in flexibility with a family of pin-compati-ble devices that scale from 128/256 kB of flash and 16/32 kB of RAM. The ultra-lowpower operating modes and fast wake-up times of the Silicon Labs energy friendly 32-bit MCUs, combined with the low transmit and receive power consumption of the 2.4GHz radio, result in a solution optimized for battery powered applications.To develop and/or evaluate the EFR32 Mighty Gecko, the EFR32MG Radio Board canbe connected to the Wireless Starter Kit Mainboard to get access to display, buttons andadditional features from Expansion Boards.Introduction 1. IntroductionThe EFR32 Mighty Gecko Radio Boards provide a development platform (together with the Wireless Starter Kit Mainboard) for the Silicon Labs EFR32 Mighty Gecko Wireless System on Chips and serve as reference designs for the matching network of the RF inter-face.The BRD4151A Radio Board is designed to operate in the 2400-2483.5 MHz band with the RF matching network optimized to operate with 19.5 dBm output power.To develop and/or evaluate the EFR32 Mighty Gecko, the BRD4151A Radio Board can be connected to the Wireless Starter Kit Main-board to get access to display, buttons and additional features from Expansion Boards and also to evaluate the performance of the RF interface.2. Radio Board Connector2.1 IntroductionThe board-to-board connector scheme allows access to all EFR32MG1 GPIO pins as well as the RESETn signal. For more information on the functions of the available pin functions, see the EFR32MG1 data sheet.2.2 Radio Board Connector Pin AssociationsThe figure below shows the pin mapping on the connector to the radio pins and their function on the Wireless Starter Kit Mainboard.GND F9 / PA3 / VCOM.#RTS_#CS 3v3UIF_BUTTON1 / PF7 / P36P200Upper RowNC / P38NC / P40NC / P42NC / P44DEBUG.TMS_SWDIO / PF1 / F0DISP_ENABLE / PD15 / F14UIF_BUTTON0 / PF6 / F12DISP_EXTCOMIN / PD13 / F10VCOM.#CTS_SCLK / PA2 / F8#RESET / F4DEBUG.TDO_SWO / PF2 / F2DISP_SI / PC6 / F16VCOM.TX_MOSI / PA0 / F6PTI.DATA / PB12 / F20DISP_EXTCOMIN / PD13 / F18USB_VBUS5VBoard ID SCLGND Board ID SDAUSB_VREG F7 / PA1 / VCOM.RX_MISO F5 / PA5 / VCOM_ENABLE F3 / PF3 / DEBUG.TDI F1 / PF0 / DEBUG.TCK_SWCLK P45 / NC P43 / NCP41 / NCP39 / NCP37 / High / SENSOR_ENABLEF11 / PF5 / UIF_LED1F13 / PF7 / UIF_BUTTON1F15 / PC8 / DISP_SCLK F17 / PD14 / DISP_SCS F19 / PB13 / PTI.SYNC F21 / PB11 / PTI.CLK GNDVMCU_INVCOM.#CTS_SCLK / PA2 / P0P201Lower RowVCOM.#RTS_#CS / PA3 / P2PD10 / P4PD11 / P6GND VRF_INP35 / PD15 / DISP_ENABLE P7 / PC9P5 / PC8 / DISP_SCLK P3 / PC7P1 / PC6 / DISP_SI P33 / PD14 / DISP_SCSP31 / PD13 / DISP_EXTCOMIN P29 / NCP27 / NC P25 / NC P23 / NC P21 / NC P19 / NC P17 / NC P15 / NC P13 / PC11P11 / PA1 / VCOM.RX_MISO P9 / PA0 / VCOM.TX_MOSI UIF_BUTTON0 / PF6 / P34UIF_LED1 / PF5 / P32UIF_LED0 / PF4 / P30DEBUG.TDO_SWO / PF2 / P28DEBUG.TMS_SWDIO / PF1 / P26DEBUG.TCK_SWCLK / PF0 / P24PTI.SYNC / PB13 / P22PTI.DATA / PB12 / P20PTI.CLK / PB11 / P18VCOM_ENABLE / PA5 / P16PA4 / P14PC10 / P12DEBUG.TDI / PF3 / P10PD12 / P8Figure 2.1. BRD4151A Radio Board Connector Pin MappingRadio Board Connector3. Radio Board Block Summary3.1 IntroductionThis section gives a short introduction to the blocks of the BRD4151A Radio Board.3.2 Radio Board Block DiagramThe block diagram of the EFR32MG Radio Board is shown in the figure below.Figure 3.1. BRD4151A Block Diagram3.3 Radio Board Block Description3.3.1 Wireless MCUThe BRD4151A EFR32 Mighty Gecko Radio Board incorporates an EFR32MG1P232F256GM48 Wireless System on Chip featuring 32-bit Cortex-M4 with FPU core, 256 kB of flash memory and 32 kB of RAM and a 2.4 GHz band transceiver with output power up to 19.5 dBm. For additional information on the EFR32MG1P232F256GM48, refer to the EFR32MG1 Data Sheet.3.3.2 LF Crystal Oscillator (LFXO)The BRD4151A Radio Board has a 32.768 kHz crystal mounted.3.3.3 HF Crystal Oscillator (HFXO)The BRD4151A Radio Board has a 38.4 MHz crystal mounted.3.3.4 Matching Network for 2.4 GHzThe BRD4151A Radio Board incorporates a 2.4 GHz matching network which connects the 2.4 GHz TRX pin of the EFR32MG1 to the one on-board printed Inverted-F antenna. The component values were optimized for the 2.4 GHz band RF performace and current con-sumption with 19.5 dBm output power.For detailed description of the matching network, see Chapter 4.2.1 Description of the 2.4 GHz RF Matching.| Smart. Connected. Energy-friendly.Rev. 1.7 | 33.3.5 Inverted-F AntennaThe BRD4151A Radio Board includes a printed Inverted-F antenna (IFA) tuned to have close to 50 Ohm impedance at the 2.4 GHz band.For detailed description of the antenna see Chapter 4.5 Inverted-F Antenna.3.3.6 UFL ConnectorTo be able to perform conducted measurements, Silicon Labs added an UFL connector to the Radio Board. The connector allows an external 50 Ohm cable or antenna to be connected during design verification or testing.Note: By default the output of the matching network is connected to the printed Inverted-F antenna by a series component. It can be connected to the UFL connector as well through a series 0 Ohm resistor which is not mounted by default. For conducted measurements through the UFL connector the series component to the antenna should be removed and the 0 Ohm resistor should be mounted (see Chapter 4.2 Schematic of the RF Matching Network for further details).3.3.7 Radio Board ConnectorsTwo dual-row, 0.05” pitch polarized connectors make up the EFR32MG Radio Board interface to the Wireless Starter Kit Mainboard. For more information on the pin mapping between the EFR32MG1P232F256GM48 and the Radio Board Connector, refer to Chapter 2.2 Radio Board Connector Pin Associations.4. RF Section4.1 IntroductionThis section gives a short introduction to the RF section of the BRD4151A.4.2 Schematic of the RF Matching NetworkThe schematic of the RF section of the BRD4151A Radio Board is shown in the following figure.U1BPath Inverted-F Antenna2.4 GHz Matching Figure 4.1. Schematic of the RF Section of the BRD4151A4.2.1 Description of the 2.4 GHz RF MatchingThe 2.4 GHz matching connects the 2G4RF_IOP pin to the on-board printed Inverted-F Antenna. The 2G4RF_ION pin is connected to ground. For higher output powers (13 dBm and above) beside the impedance matching circuitry it is recommended to use additional harmonic filtering as well at the RF output. The targeted output power of the BRD4151A board is 19.5 dBm. As a result, the RF output of the IC is connected to the antenna through a four-element impedance matching and harmonic filter circuitry.For conducted measurements the output of the matching network can also be connected to the UFL connector by relocating the series R1 resistor (0 Ohm) to the R2 resistor position between the output of the matching and the UFL connector.4.3 RF Section Power SupplyOn the BRD4151A Radio Board the supply pin of the RF Analog Power (RFVDD) is connected directly ot the output of the on-chip DC-DC converter while the supply for the 2.4 GHz PA (PAVDD) is provided directly by the mainboard. This way, by default, the DC-DC converter provides 1.8 V for the RF analog section, the mainboard provides 3.3 V for the PA (for details, see the schematic of the BRD4151A).4.4 Bill of Materials for the 2.4 GHz MatchingThe Bill of Materials of the 2.4 GHz matching network of the BRD4151A Radio Board is shown in the following table.Table 4.1. Bill of Materials for the BRD4151A 2.4 GHz 19.5 dBm RF Matching Network | Smart. Connected. Energy-friendly.Rev. 1.7 | 54.5 Inverted-F AntennaThe BRD4151A Radio Board includes an on-board printed Inverted-F Antenna tuned for the 2.4 GHz band. Due to the design restric-tions of the Radio Board the input of the antenna and the output of the matching network can't be placed directly next to each other. Therefore, a 50 Ohm transmission line was necessary to connect them. The resulting impedance and reflection measured at the output of the matcing network are shown in the following figure. As it can be observed the impedance is close to 50 Ohm (the reflection is better than -10 dB) for the entire 2.4 GHz band.Figure 4.2. Impedance and Reflection of the Inverted-F Antenna of the BRD4151A| Smart. Connected. Energy-friendly.Rev. 1.7 | 65. Mechanical DetailsThe BRD4151A EFR32 Mighty Gecko Radio Board is illustrated in the figures below.45 mmFigure 5.1. BRD4151A Top View5 mm ConnectorConnectorFigure 5.2. BRD4151A Bottom ViewMechanical DetailsRev. 1.7 | 7EMC Compliance 6. EMC Compliance6.1 IntroductionCompliance of the fundamental and harmonic levels is tested against the following standards:• 2.4 GHz:•ETSI EN 300-328•FCC 15.2476.2 EMC Regulations for 2.4 GHz6.2.1 ETSI EN 300-328 Emission Limits for the 2400-2483.5 MHz BandBased on ETSI EN 300-328 the allowed maximum fundamental power for the 2400-2483.5 MHz band is 20 dBm EIRP. For the unwan-ted emissions in the 1 GHz to 12.75 GHz domain the specified limit is -30 dBm EIRP.6.2.2 FCC15.247 Emission Limits for the 2400-2483.5 MHz BandFCC 15.247 allows conducted output power up to 1 Watt (30 dBm) in the 2400-2483.5 MHz band. For spurious emmissions the limit is -20 dBc based on either conducted or radiated measurement, if the emission is not in a restricted band. The restricted bands are speci-fied in FCC 15.205. In these bands the spurious emission levels must meet the levels set out in FCC 15.209. In the range from 960 MHz to the frequency of the 5th harmonic it is defined as 0.5 mV/m at 3 m distance (equals to -41.2 dBm in EIRP).Additionally, for spurious frequencies above 1 GHz, FCC 15.35 allows duty-cycle relaxation to the regulatory limits. For the EmberZNet PRO the relaxation is 3.6 dB. Therefore, the -41.2 dBm limit can be modified to -37.6 dBm.If operating in the 2400-2483.5 MHz band the 2nd, 3rd and 5th harmonics can fall into restricted bands. As a result, for those the -37.6 dBm limit should be applied. For the 4th harmonic the -20 dBc limit should be applied.6.2.3 Applied Emission Limits for the 2.4 GHz BandThe above ETSI limits are applied both for conducted and radiated measurements.The FCC restricted band limits are radiated limits only. Besides that, Silicon Labs applies those to the conducted spectrum i.e., it is assumed that, in case of a custom board, an antenna is used which has 0 dB gain at the fundamental and the harmonic frequencies. In that theoretical case, based on the conducted measurement, the compliance with the radiated limits can be estimated.The overall applied limits are shown in the table below.Table 6.1. Applied Limits for Spurious Emissions for the 2.4 GHz Band | Smart. Connected. Energy-friendly.Rev. 1.7 | 87. RF Performance7.1 Conducted Power MeasurementsDuring measurements, the EFR32MG Radio Board was attached to a Wireless Starter Kit Mainboard which was supplied by USB. The voltage supply for the Radio Board was 3.3 V.7.1.1 Conducted Measurements in the 2.4 GHz bandThe BRD4151A board was connected directly to a Spectrum Analyzer through its UFL connector (the R1 resistor (0 Ohm) was removed and a 0 Ohm resistor was soldered to the R2 resistor position). During measurements, the voltage supply for the board was 3.3 V provi-ded by the mainboard. The supply for the radio (RFVDD) was 1.8 V provided by the on-chip DC-DC converter, the supply for the power amplifier (PAVDD) was 3.3 V (for details, see the schematic of the BRD4151A). The transceiver was operated in continuous carrier transmission mode. The output power of the radio was set to the maximum level.The typical output spectrum is shown in the following figure.Figure 7.1. Typical Output Spectrum of the BRD4151AAs it can be observed, the fundamental is slightly lower than 19.5 dBm and the strongest unwanted emission is the double-frequency harmonic and it is under the -37.6 dBm applied limit.Note: The conducted measurement is performed by connecting the on-board UFL connector to a Spectrum Analyzer through an SMA Conversion Adapter (P/N: HRMJ-U.FLP(40)). This connection itself introduces approximately a 0.3 dB insertion loss.RF PerformanceRev. 1.7 | 97.2 Radiated Power MeasurementsDuring measurements, the EFR32MG Radio Board was attached to a Wireless Starter Kit Mainboard which was supplied by USB. The voltage supply for the Radio Board was 3.3 V. The radiated power was measured in an antenna chamber by rotating the DUT 360degrees with horizontal and vertical reference antenna polarizations in the XY , XZ and YZ cuts. The measurement axes are shown inthe figure below.Figure 7.2. DUT: Radio Board with the Wireless Starter Kit Mainboard (Illustration)Note: The radiated measurement results presented in this document were recorded in an unlicensed antenna chamber. Also the radi-ated power levels may change depending on the actual application (PCB size, used antenna, and so on). Therefore, the absolute levels and margins of the final application are recommended to be verified in a licensed EMC testhouse.7.2.1 Radiated Measurements in the 2.4 GHz bandFor the transmitter antenna, the on-board printed Inverted-F antenna of the BRD4151A board was used (the R1 resistor (0 Ohm) was mounted). During the measurements the board was attached to a Wireless Starter Kit Mainboard (BRD4001 (Rev. A02) ) which was supplied through USB. During measurements, the voltage supply for the board was 3.3 V provided by the mainboard. The supply for the radio (RFVDD) was 1.8 V provided by the on-chip DC-DC converter, the supply for the power amplifier (PAVDD) was 3.3 V (for details, see the schematic of the BRD4151A). The transceiver was operated in continuous carrier transmission mode. The output power of the radio was set to the maximum level.The results are shown in the table below.Table 7.1. Maximums of the Measured Radiated Powers of BRD4151AAs it can be observed, thanks to the high gain of the Inverted-F antenna, the level of the fundamental is higher than 19.5 dBm. The strongest harmonic is the double-frequency one but its level is under -45 dBm.RF PerformanceEMC Compliance Recommendations 8. EMC Compliance Recommendations8.1 Recommendations for 2.4 GHz ETSI EN 300-328 complianceAs it was shown in the previous chapter, the radiated power of the fundamental of the BRD4151A EFR32 Mighty Gecko Radio Board complies with the 20 dBm limit of the ETSI EN 300-328 in case of the conducted measurement but due to the high antenna gain the radiated power is higher than the limit by 2 dB. In order to comply, the output power should be reduced (with different antennas, de-pending on the gain of the used antenna, the necessary reduction can be different). The harmonic emissions are under the -30 dBm limit. Although the BRD4151A Radio Board has an option for mounting a shielding can, that is not required for the compliance.8.2 Recommendations for 2.4 GHz FCC 15.247 complianceAs it was shown in the previous chapter, the radiated power of the fundamental of the BRD4151A EFR32 Mighty Gecko Radio Board complies with the 30 dBm limit of the FCC 15.247. The harmonic emissions are under the -37.6 dBm applied limit both in case of the conducted and the radiated measurements. Although the BRD4151A Radio Board has an option for mounting a shielding can, that is not required for the compliance.Board Revisions 9. Board RevisionsTable 9.1. BRD4151A Radio Board RevisionsNote: The silkscreen marking on the board (e.g., PCBxxxx A00) denotes the revision of the PCB. The revision of the actual Radio Board can be read from the on-board EEPROM.Errata 10. ErrataTable 10.1. BRD4151A Radio Board ErrataDocument Revision History 11. Document Revision HistoryRevision 1.72016-11-20Minor editorial updates.Revision 1.62016-10-31Corrected error in radio board connector pinout diagram.Revision 1.52016-05-24Updating Board Revisions content. Fixing Errata description.Revision 1.42016-05-05Adding Introduction chapter; moving SoC Description chapter (short ver.) to Block Description chapter. Minor improvements.Revision 1.32016-02-11Addign RF Section Power Supply chapter. Minor improvements.Revision 1.22016-01-28Fixing image render problem.Revision 1.12015-25-25Updating Inverted-F Antenna Chapter and radiated measurement results based on board revision B02.Revision 1.02015-11-27Initial release.Table of Contents1. Introduction (1)2. Radio Board Connector (2)2.1 Introduction (2)2.2 Radio Board Connector Pin Associations (2)3. Radio Board Block Summary (3)3.1 Introduction (3)3.2 Radio Board Block Diagram (3)3.3 Radio Board Block Description (3)3.3.1 Wireless MCU (3)3.3.2 LF Crystal Oscillator (LFXO) (3)3.3.3 HF Crystal Oscillator (HFXO) (3)3.3.4 Matching Network for 2.4 GHz (3)3.3.5 Inverted-F Antenna (4)3.3.6 UFL Connector (4)3.3.7 Radio Board Connectors (4)4. RF Section (5)4.1 Introduction (5)4.2 Schematic of the RF Matching Network (5)4.2.1 Description of the 2.4 GHz RF Matching (5)4.3 RF Section Power Supply (5)4.4 Bill of Materials for the 2.4 GHz Matching (5)4.5 Inverted-F Antenna (6)5. Mechanical Details (7)6. EMC Compliance (8)6.1 Introduction (8)6.2 EMC Regulations for 2.4 GHz (8)6.2.1 ETSI EN 300-328 Emission Limits for the 2400-2483.5 MHz Band (8)6.2.2 FCC15.247 Emission Limits for the 2400-2483.5 MHz Band (8)6.2.3 Applied Emission Limits for the 2.4 GHz Band (8)7. RF Performance (9)7.1 Conducted Power Measurements (9)7.1.1 Conducted Measurements in the 2.4 GHz band (9)7.2 Radiated Power Measurements (10)7.2.1 Radiated Measurements in the 2.4 GHz band (10)8. EMC Compliance Recommendations (11)8.1 Recommendations for 2.4 GHz ETSI EN 300-328 compliance (11)8.2 Recommendations for 2.4 GHz FCC 15.247 compliance (11)9. Board Revisions (12)10. Errata (13)11. Document Revision History (14)Table of Contents (15)Silicon Laboratories Inc.400 West Cesar Chavez Austin, TX 78701USASimplicity StudioOne-click access to MCU and wireless tools, documentation, software, source code libraries & more. Available for Windows, Mac and Linux!IoT Portfolio /IoTSW/HW/simplicityQuality/qualitySupport and CommunityDisclaimerSilicon Labs intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Labs products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Labs reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Silicon Labs shall have no liability for the consequences of use of the information supplied herein. This document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. The products are not designed or authorized to be used within any Life Support System without the specific written consent of Silicon Labs. A "Life Support System" is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant personal injury or death. Silicon Labs products are not designed or authorized for military applications. Silicon Labs products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons.Trademark InformationSilicon Laboratories Inc.® , Silicon Laboratories®, Silicon Labs®, SiLabs® and the Silicon Labs logo®, Bluegiga®, Bluegiga Logo®, Clockbuilder®, CMEMS®, DSPLL®, EFM®, EFM32®, EFR, Ember®, Energy Micro, Energy Micro logo and combinations thereof, "the world’s most energy friendly microcontrollers", Ember®, EZLink®, EZRadio®, EZRadioPRO®, Gecko®, ISOmodem®, Precision32®, ProSLIC®, Simplicity Studio®, SiPHY®, Telegesis, the Telegesis Logo®, USBXpress® and others are trademarks or registered trademarks of Silicon Labs. ARM, CORTEX, Cortex-M3 and THUMB are trademarks or registered trademarks of ARM Holdings. Keil is a registered trademark of ARM Limited. All other products or brand names mentioned herein are trademarks of their respective holders.。

ADM3490ARZ中文资料

ADM3490ARZ中文资料

FUNCTIONAL BLOCK DIAGRAMS
VCC
ADM3483/ ADM3485
ROБайду номын сангаас
R
RE
A
DE
B
DI
D
05524-027
05524-026
GND
Figure 1.
VCC
A
RO
R
B
ADM3488/ ADM3490
Z
DI
D
Y
GND
Figure 2.
ADM3491
A
RO
R
RE
B
DE
Z
DI
D
Y
05524-025
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

Polycom DMA 7000系统版本6.3.0_P1 补丁说明书

Polycom DMA 7000系统版本6.3.0_P1 补丁说明书

Patch NotesPolycom ® DMA™ 7000 System© 2015 Polycom, Inc. All rights reserved. POLYCOM®, the Polycom logo, and the names and marks associated with Po lycom’s products are trademarks and/or service marks of Polycom, Inc. and are registered and/or common law marks in the United States and various other countries. All other trademarks are property of their respective owners. 1Release label:6.3.0_P1 Built on version:Polycom DMA 7000 System v6.3.0 Released file(s):upgrade file for 6.1.x, 6.2.0, 6.2.1, and 6.3.0Purpose The primary focus of this patch is to resolve minor issues with WebRTC. Patch 1 for DMA 6.3.0 (i.e. 6.3.0_P1_Build_198923) contains code changes to address the following issues:❑DMA-14736 RealConnect conference not working properly if DMA template is configured with cascade for size. ❑DMA-14764 DMA Conference Templates could not be loaded when try to schedule pooled conference from XMA. ❑ DMA-14798 Random generated RealConnect chair codes may result in conference creation failure.❑ DMA-14825 DMA Supercluster/UnauthorizedPrefix: SIP Call with unauthorized prefix fail to establish when backup DMA forwards the call to the active DMA.❑DMA-14898 WebRTC/RPWS Intermittent IVR display – interrupts meeting. ❑DMA-14911 Max limit on WebRTC clients needs to 5. ❑DMA-14926 DMA SIP Peer – DNS resolution of Destination Network field on RE-INVITE (Outbound Calling). ❑DMA-14948 API –display-name property value changes after promotion. ❑DMA-14956 DMA doesn’t pass the participant name in the participant notification for Web RTC participant. ❑DMA-14971 Improper CANCEL handling with Weighted SIP Peers. ❑ DMA-15010 Collabutron redirect response code should be be 302 (temporary) instead of 301 (permanent).Prerequisites/Configuration Considerations∙ Systems may have Polycom DMA 7000 v6.1.x, v6.2.0, v6.2.1, or v6.3.0 installed∙ When upgrading from DMA 6.1.x, 6.2.0, 6.2.1, 6.3.0 to 6.3.0.1, the system will not preserve the call history information. To keep this data, backup the databases, upgrade the DMAs, and then restore the databases.© 2015 Polycom, Inc. All rights reserved. POLYCOM®, the Polycom l ogo, and the names and marks associated with Polycom’s products are trademarks and/or service marks of Polycom, Inc. and are registered and/or common law marks in the United States and various other countries. All other trademarks are property of their respective owners.2 NOTE : Upgrades from DMA 6.2.2.x to 6.3.0.1 are not supported5.0.x5.1.x→ → 5.2.x Yes DMA-upgrade_5.2.2.6-bld9r144761.bin 5.2.x6.0.x→ → 6.1.x n/a rppufconv.bin (Pre 6.1.0 to 6.1.3.1) 6.1.3_P1_Build_185272-rppufconv.bin 6.1.x6.2.0.x6.2.1.x → → → 6.3.0.1 Yes full.bin (Upgrade to 6.3.0.1) 6.3.0_P1_Build_198923-full.bin 6.3.0 → 6.3.0.1 No full.bin (Upgrade to 6.3.0.1)6.3.0_P1_Build_198923-full.bin6.2.2X 6.3.0.1 Not supported 6.2.2.x X 6.3.0.1 Not supportedInstallation Notes1. Download the upgrade file for dma_6.3.0.12. Login to DMA and navigate to Maintenance > Software Upgrade3. Select “Upload and Upgrade ” and choose the upgrade file4. DMA processes and applies patch。

371-1946-00 预催化封闭喷漆说明书

371-1946-00 预催化封闭喷漆说明书

The data on this sheet represent typical values. Since application variables are a major factor in product performance, this information should serve only as a general guide. Axaltaassumes no obligation or liability for use of this information . UNLESS AXALTA AGREES OTHERWISE IN WRITING, AXALTA MAKES NO WARRANTIES, EXPRESS ORIMPLIED, AND DISCLAIMS ALL IMPLIED WARRANTIES INCLUDING WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR USE OR FREEDOM FROM PATENT INFRINGEMENT. AXALTA WILL NOT BE LIABLE FOR ANY SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES. Your only remedy for any defect in thisproduct is the replacement of the defective product, or a refund of its purchase price, at our option. The information in this sheet, as well as the products referenced herein, shall beGENERAL INFORMATIONAxalta ’s standard solids PRE-CAT SEALER is a highly versatile pre-catalyzed lacquer sanding sealer formulated for outstandingdurability and ease of use. It is recommended for use under Valspar’s ENVIRO SUPERLAC ™ Pre-cat lacquers. It is quick drying with excellent flow and leveling properties. It also has excellent mar, water, solvent & household chemical resistance.1. PRODUCTS• 371-1946-002. MIXING RATIO• All products should be stirred well before use and, forbest results, continuously agitated while in use.3. SHELF LIFE @ 77°F (25°C)• 6 months from manufacturing date4. CLEAN UP• Dispose of dirty solvent and cleaning rags in a safe andcompliant manner. Solvent or lacquer soaked rags should be stored in water-filled, closed containers prior to disposal.5. ADDITIVES• In the event of blushing or blistering, add Axalta 390-9303-00 Lacquer Retarder to extend dry time. See Additional Notes portion of this document for details.6. SURFACE PREPARATION• Surface must be clean and dust free with a moisturecontent of 6-8% prior to finishing. Remove all dust, dirt, wax and wood marks. Proper sanding and preparation of the wood is critical to achieving consistent results.• On new wood, finish sand surface with 150-180 grit sandpaper• On previously finished wood, remove all old paint or varnish and follow new wood procedure.7. COMPANION PRODUCTS• 371-1980/90 Series ENVIRO SUPERLAC ™• 371-1990 Series SUPERLAC ™ ELITE Pre-CatalyzedLacquers• NUC3290 Series SUPERLAC ™ Plus Pre-Catalyzed Lacquers8. TECH NOTES• If reduction is necessary, use Axalta 390-7001-00 LacquerThinner. See Additional Notes portion of this document for additional details.9. SUBSTRATES• Commonly used furniture and cabinetry woods • MDF/HDFNOTE: Not to be used on exterior applications.10. APPLICATION• See application notes foe detailed instructions.11. FLASH / DRY TIMESAIR DRY @ 77°F (25°C)AIR PRESSURES14. PHYSICAL DATAproduct is the replacement of the defective product, or a refund of its purchase price, at our option. The information in this sheet, as well as the products referenced herein, shall be。

拉雷尔电子有限公司产品说明书

拉雷尔电子有限公司产品说明书

LAUREL ELECTRONICS, INC.Ethernet & 4-20 mA Output Transmitterfor Process & Ratio SignalsFeatures•Ethernet Serial Data I/O, Modbus TCP or Laurel ASCII protocol•4-20 mA or 0-10V transmitter output, 16 bits, jumper selectable, isolated•Ratiometric mode for bridges and potentiometers•Dual 120 mA solid state relays for alarm or control, isolated•5V, 10V or 24V dc transducer excitation output, isolated•200 mV, 2V, 20V, 200V, 300V & 600V DC voltage input ranges•2, 20, 200 mA and 5A DC current input ranges•All ranges factory calibrated•Digital span adjust from 0 to ±99,999, zero adjust from -99,999 to +99,999•Analog output resolution 0.0015% of span (16 bits), accuracy ±0.02% of span•Universal 85-264 Vac / 90-300 Vdc or 10-48 Vdc / 12-32 Vac power•Power over Ethernet (PoE) jumper selectable with 10-48 Vdc supply DescriptionThe Laureate 4-20 mA output, process input transmitter provides zero and span adjustment for use with a wide range of industrial transducers. Six DC voltage and four DC current input ranges are jumper selectable. The two most sensitive voltage ranges, 200 mV and 2V, provide a high input impedance of1 GΩ to minimize the load on the voltage signal.The transmitter can be set to a ratio mode (or potentiometer follower mode) by making selections at the connector and in software. In this mode, the transmitter output tracks a ratio of the applied excitation voltage and is unaffected by changes in the excitation voltage. This capability is used for resistive bridge sensors and voltage dividers, such as potentiometers which track wiper position.Fast read rate at up to 50 or 60 conversions per second while integrating the signal over a full power line cycle is provided by Concurrent Slope (Pat 5,262,780) analog-to-digital conversion. High read rate is ideal for peak or valley capture and for real-time computer interface and control. Digital signal filtering modes are selectable for stable readings in electrically noisy environments. The internal digital readings and analog output can be individu-ally selected to be either unfiltered or filtered.Digital signal filtering modes are selectable for stable readings in electrically noisy environments. The internal digital readings and analog output can be individually selected to be either unfiltered or filtered.•An unfiltered selection updates after each conversion for fastest response, up to 60/sec, while integrating the inputsignal over a full power cycle. Fast read rate provides truepeak and valley readings and aids in control applications. • A batch average filter selection averages each 16 conversions for an update every 1/4 sec.•An adaptive moving average filter selection provides a choice of 8 time constants from 80 ms to 9.6 s. When asignificant change in signal level occurs, the filter adapts by briefly switching to the shortest time to follow the change, then reverts back to its selected time constant. Another choice is Auto, which provides an automatic time constant selectionbased on the signal noise characteristics.Standard features of Laureate LTE transmitters include:•Ethernet I/O, isolated. Supported protocols are ModbusRTU and ASCII (tunneled via Modbus TCP) and Laurel ASCII.The latter is simpler than the Modbus protocol and is recom-mended when all devices are Laureates. Note that RS232 or RS485 data I/O in lieu of Ethernet is provided by our LT Series transmitters.•4-20 mA, 0-20 mA or 0-10V analog transmitter output, isolated, jumper-selectable and user scalable. All selections provide 16-bit (0.0015%) resolution of output span and 0.02% output accuracy of a reading from -99,999 to +99,999 counts that is also transmitted digitally. Output isolation from signal and power grounds eliminates potential ground loop problems.The supply can drive 20 mA into a 500 ohm (or lower) load for 10V compliance, or 10V into a 5K ohm (or higher) load for2 mA compliance.•Dual solid state relays, isolated. Available for local alarm or control. Rated 120 mA at 130 Vac or 180 Vdc.•Universal 85-264 Vac power. Low-voltage 10-48 Vdc or 12-32 Vac power is optional.Discovery and configuration of Laureate Ethernet Nodes is easily achieved with Laurel's Node Manager Software, and the discovered transmitters can then be programmed using Laurel's Instrument Setup Software. Both softwares run on a PC under MS Windows and can be downloaded at no charge.SpecificationsAnalog Input Range Resolution Accuracy Input OhmsDC Voltage ± 200.00 mV± 2.0000 V± 20.000 V± 200.00 V± 600.0 V10 µV100 µV1 mV10 mV100 mV± 0.01% FS± 2 counts1 GΩ1 GΩ10 MΩ10 MΩ10 MΩDC Current ± 2.0000 mA± 20.000 mA± 200.00 mA0.1 µA1 µA10 µA± 0.01% FS± 2 counts100 Ω10 Ω1 Ω ± 5.000 A 1 mA± 0.1% FS± 2 counts0.01 ΩInput Resolution Update Rate, Max Max applied voltage Over-current protection 16 bits (65,536 steps)50/sec at 50 Hz, 60/sec at 60 Hz600 Vac for 20, 200 & 600 V ranges, 125 Vac other ranges 25x for 2 mA, 8x for 20 mA, 2.5x for 200 mA, 1x for 5 AAnalog Output (standard)Output Levels Compliance, 4-20 mA Compliance, 0-10V Output Resolution Output Accuracy Output Isolation Step response time 0-20 mA or 0-10 Vdc (selectable)10V (0-500Ω load)2 mA (5 kΩ load)16 bits (65,536 steps)0.02% of output span plus conversion accuracy 250V rms working, 2.3 kV rms per 1 minute test 50 msDual Relay Output (standard)Relay Type Load Rating Two solid state relays, SPST, normally open, Form A 120 mA at 140 Vac or 180 VdcTransducer Excitation Output (standard)Output Levels Output Isolation 5V@100 mA, 10V@120 mA, 24V@50 mA (jumper selectable) 50V from signal groundSerial Data Output (standard)TypeData RatesOutput Isolation Serial Protocols Modbus Compliance Digital Addresses 10/100Base-T Ethernet per IEEE 802.3300, 600, 1200, 2400, 4800, 9600, 19200 baud250V rms working, 2.3 kV rms per 1 min testModbus TCP, Modbus RTU, Modbus ASCII, Laurel ASCII Modbus over Serial Line Specification V1.0 (2002)247 for Modbus, 31 for Laurel ASCIIPower InputStandard Power Low Power Option Power Frequency Power Isolation Power Consumption 85-264 Vac or 90-300 Vdc10-48 Vdc or 12-32 VacDC or 47-63 Hz250V rms working, 2.3 kV rms per 1 min test 2W typical, 3W with max excitation outputMechanicalDimensions MountingElectrical Connections 129 x 104 x 22.5 mm case35 mm rail per DIN EN 50022 Plug-in screw-clamp connectorsEnvironmental Operating TemperatureStorage Temperature Relative Humidity Cooling Required0°C to 55°C-40°C to 85°C95% at 40°C, non-condensingMount transmitters with ventilation holes at top and bottom. Leave 6 mm (1/4") between transmitters, or force air with a fan.PinoutMechanicalPotentiometer Follower ApplicationIn potentiometric (or potentiometer follower) appli-cations, the signal from a sliding contact voltage divider can be converted to engineering units such as position, level or percentage. By operating in a ratiometric mode, the transmitter removes any effects caused by variations in the excitation supply.For use with a 1 kΩ potentiometer, the recommend-ed applied excitation voltage is 10V. A 2 kΩ resistor should be placed in series with the excitation output and excitation return leads. This will allow the trans-mitter's 2V scale with a high input impedance of 1 GΩ to be used.Ordering GuideCreate a model a model number in this format: LTE20PTransmitter Type LTE Laureate 4-20 mA & Ethernet TransmitterMain Board2 Standard Main Board4 Extended Main BoardNote: Extended allows custom curve linearization and rate from successive readings.Power0 Isolated 85-264 Vac or 90-300 Vdc1 Isolated 12-32 Vac or 10-48 VdcSignal Input Process Signals (e.g., 4-20 mA, 0-5V)P Field scalable. Default scaling is 0-200V in = 4-20 mA outP1 Custom Scaling. Specify min input, min output; max input, max outputNote: The same DC signal conditioner can be user configured for process, strain orpotentiometer follower signals, as well as DC Volts or DC Amps. It is precalibrated inEEPROM for all DC Volt and DC Amp ranges listed for DC transmitters.。

迪瑞芬豪系列固定卫星通信电话说明书

迪瑞芬豪系列固定卫星通信电话说明书

TranSATRST620The Beam TranSAT Fixed Satellite Telephone provides acomplete hands-free voice and telephone for a wide range ofmobile and fixed site applications where easy access to reliablevoice and data communications is required.The terminal provides a compact fully functioned user handsetand supports both hands-free and privacy modes of operation,automatically switching between either mode with the handsetin or out of the cradle.The system can also be used as a permanent non hands-freesolution simply by not connecting the microphone. The loudring indication through the speaker system makes it an idealinstallation in a noisy environment.The RST620 is equipped with an RS232 serial data port toaccess Iridium data servicesEmergencyVehiclesHeavy TrucksCruise ShipsSmall Aircrafts Handsfree / Privacy ModeVoice/Data/Internet/FAX/SMSCommunication System InegrationEcho Cancellation / Full duplexLatest echo cancellation technology is deployed onTranSAT to enhance handsfree voice quality.Enhanced FeaturesSupport featuressuch as horn alert, radiomute,data connectivity and allow the use of a compactintelligent user handset in privacy mode.11-32V DC Power InputThe DC power input and terminal is capable ofbeing wired to an auxiliary/accessory power supplyas well as constant power.Auxiliary & constant powerThe unit is equipped with intelligent power offfeatures. Whereby the unit will turn off afterminutes when ignition is off. The unit also hasthe option of powering up on accessory power inemergency applications.Voice/Data/Internet/SMS/FaxThe complete range of Iridium data services allowsyou to simply and conveniently gain access toInternet, Email, and corporate LAN.The terminal also supports SMS and the followingIridium Data Services;• Circuit Switched Data• Direct Internet• RUDICS• Short Burst DataPrivate or Handsfree modeHands-free operation allows for quality integrationinto a vehicle/vessel/aircraft with easy access tomaking and receiving calls in a hands-free mode, italso allows the use for privacy mode.Compact Intelligent HandsetThe compact Intelligent Handset provides easyaccess to make and receive calls, access phonebook and SMS as well as switching betweenhandsfree and privacy mode.HandsfreeVoice Data Horn AlertHFISide2RED = +BATT (11 to 32 VDC)BLACK = -BATT (GND)GREEN = ACC PWRHFISide1MicrophoneAntenna1A FusePositive 3A Fuse GroundPOWER SPECIFICATIONSPower input voltage11 - 32 V DC Power Consumption ( AMPS )12 V DC 24 V DC Stand-by - inc handset0.330.14Transmit - inc handset 0.630.23ENVIRONMENT SPECIFICATIONS Temperature Degrees °C Degrees °FOperating Range -15 to +55+5 to +131Storage -30 to +85-22 to +185Humidity 85% non condensing CONNECTORS/INTERFACES Transceiver D25Intelligent Handset RJ45 DPL BUS Data Port RS232 Serial Interface Speaker 3.5mm mono Microphone 2.5mm mono Constant power Screw Connector Auxiliary power Screw Connector Horn Alert Screw Connector Audio MuteScrew ConnectorPHYSICAL SPECIFICATIONS LBT Interface Dimensions - mm 162.4 x 81.6x8183 x 130 x 27Dimensions - inches 38 x 3.16 x 1.17.2 x 5.1 x 1.0Weight - kg 4200.3Weight - lbs9260.66CERTIFICATIONSIEC60945Eelectrical Safety EMC ComplianceHFI - AS/NZ 4601: 1999 - 3.3.4 & 3.3.5Temperature/Humidity/Impact Vibration / Accelerated Aging Independent Aeronautical certification MUST be gained prior to installation.KIT CONTENTSIridium 9522B Transceiver module Main terminal Iridum Intelligent HandsetHandsfree and power InterfaceCable assemblies: DC cables, interface cables Mounting adhesive / velcroData cableUser & Installation manual RST710RST714RST715RST720RST932RST933RST972S RST972RST949Mast Mount Antenna WHIP Antenna (incl 5m cable)Magnetic Mount Antenna (incl 5m cable)Bolt Mount Antenna (incl 5m cable)6m / 19’ Iridium Antenna Cable 12m / 36’ Iridium Antenna Cable 15m extension cable for Intelligent Handset 30m extension cable for Intelligent Handset DPL Aplification cable to increase the headset volume for noisy environments。

MEMORY存储芯片ADM3485EARZ-REEL7中文规格书

MEMORY存储芯片ADM3485EARZ-REEL7中文规格书
∆|VOD| for Complementary Output States1 Common-Mode Output Voltage ∆|VOC| for Complementary Output States1 Short-Circuit Output Current
Logic Inputs Input Low Voltage Input High Voltage Logic Input Current
ADM3485E
RO
R
RE
B
A DE
DI
D
03338-001
Figure 1.
should be enabled at any time, the output of a disabled or powered-down driver is tristated to avoid overloading the bus. The receiver has a fail-safe feature that ensures a logic high output when the inputs are floating. Excessive power dissipation caused by bus contention or by output shorting is prevented with a thermal shutdown circuit. The part is fully specified over the industrial temperature range and is available in an 8-lead narrow SOIC package.
ADM3485E
SPECIFICATIONS

MGate MB3180 Quick Installation Guide

MGate MB3180 Quick Installation Guide

P/N: 1802031800012 *1802031800012*MGate MB3180Quick Installation GuideEdition 5.0, December 2018Technical Support Contact Information/supportMoxa Americas:Toll-free: 1-888-669-2872 Tel: 1-714-528-6777 Fax: 1-714-528-6778 Moxa China (Shanghai office): Toll-free: 800-820-5036 Tel: +86-21-5258-9955 Fax: +86-21-5258-5505 Moxa Europe:Tel: +49-89-3 70 03 99-0 Fax: +49-89-3 70 03 99-99 Moxa Asia-Pacific:Tel: +886-2-8919-1230 Fax: +886-2-8919-1231 Moxa India:Tel: +91-80-4172-9088 Fax: +91-80-4132-10452018 Moxa Inc. All rights reserved.OverviewThe MGate MB3180 is a 1-port Modbus gateway that converts between Modbus TCP and Modbus ASCII/RTU protocols. It can be used to allow Ethernet masters to control serial slaves, or to allow serial masters to control Ethernet slaves. Up to 16 TCP masters and 31 serial slaves can be connected simultaneously.Package ChecklistBefore installing the MGate MB3180 Modbus gateway, verify that the package contains the following items:• 1 MGate MB3180 Modbus gateway• 4 stick-on pads•Document & Software CD•Quick Installation Guide•Product Warranty Statement•Power adapterOptional Accessory•DK-35A: DIN-rail mounting kit (35 mm)•Mini DB9F-to-TB Adaptor: DB9 female to terminal block adapter •DR-4524: 45W/2A DIN-rail 24 VDC power supply with universal 85 to 264 VAC input•DR-75-24: 75W/3.2A DIN-rail 24 VDC power supply with universal85 to 264 VAC input•DR-120-24: 120W/5A DIN-rail 24 VDC power supply with 88 to 132 VAC/176 to 264 VAC input by switchNotify your sales representative if any of the above items is missing or damaged.NOTE The operating temperature of the power adapter in the box is from 0 to 40 °C. If your application is out of this range, pleaseuse a power adapter supplied by UL Listed External PowerSupply (The power output meets SELV and LPS and is rated 12- 48 VDC; minimum current is 0.73 A). Moxa has poweradapters with wide temperature range (-40 to 75 °C, -40 to 167F), the PWR-12150-(plug type)-SA-T series, for your reference.Hardware IntroductionAs shown in the following figures, the MGate MB3180 has one DB9 male port for transmitting serial data.Reset Button—The reset button is used to load factory defaults. Using a pointed object such as a straightened paper clip to hold the reset button down for five seconds. Release the reset button when the Ready LED stops blinking in order to load the factory defaults.LED Indicators—Three LED indicators are located on the top panel: Name Color FunctionReady Red Steady on: Power is on and the unit is booting upBlinking: IP conflict exists, or DHCP or BOOTPserver is not responding properly Green Steady on: Power is on and the unit is functioningnormallyBlinking: Unit has been found by the Locationcommand in MGate ManagerOff Power is off or power error condition exists Ethernet Orange 10 Mbps Ethernet connectionGreen 100 Mbps Ethernet connectionOff Ethernet cable is disconnected or has a shortP1 Orange Unit is receiving data from device.Green Unit is transmitting data to device.Off No data is being exchanged with device. Hardware Installation ProcedureSTEP 1:After unpacking the MGate MB3180, connect the power adaptor.STEP 2: Use a standard straight-through Ethernet cable to connect the MGate MB3180 to a network hub or switch. Use a cross-overEthernet cable if you are connecting the gateway directly to aPC.STEP 3:Connect your device to the MGate MB3180’s serial port. STEP 4:Place or mount the MGate MB3180. The unit may be placed on a horizontal serface such as a desktop, mounted on a DIN-rail, or mounted on the wall.Wall Mounting DIN-rail MountingAdjustable Pull High/Low Resistors for the RS-485 PortIn some critical RS-485 environments, you may need to add termination resistors to prevent the reflection of serial signals. When using termination resistors, it is important to set the pull high/low resistors correctly so that the electrical signal is not corrupted. Jumpers JP3 and JP4 are used to set the pull high/low resistor values for the serial port. To Set the pull high/low resistors to 150 KΩ, which is the factory default setting, leave the two jumpers open. To set the pull high/low resistors to 1 KΩ, use the jumper caps to short the two jumpers.MGate MB3180 JumpersSoftware InstallationTo install MGate Manager , insert the MGate Documentation and Software CD into your PC's CD-ROM drive, and then run the following setup program to begin the installation process from the “Software” directory:MGM_Setup_[Version]_Build_[DateTime].exeThe filename of the latest version may have the following format: MGM_Setup_Verx.x.x_Build_xxxxxxxx.exe.For detailed information about MGate Manager, refer to the MGate MB3000 User's Manual, which can be found in the “Document” directory.The MGate MB3180 also supports login via a web browser. Default IP address: 192.168.127.254 Default account: admin Default password: moxaPin AssignmentsEthernet Port (RJ45)Pin Signals 1 Tx+ 2 Tx- 3 Rx+ 6Rx-Serial Port (Male DB9)Pin RS-232 RS-422/485 (4-Wire) RS-485 (2-Wire) 1DCD TxD-(A) – 2 RxD TxD+(B) – 3 TxD RxD+(B)Data+(B) 4 DTR RxD-(A) Data-(A) 5 GND GND GND 6 DSR – – 7 RTS – – 8 CTS – – 9–– –Environmental SpecificationsPower Requirements Power Input 12 to 48 VDC Power Consumption 200 mA @ 12 VDC, 60 mA @ 48 VDC Operating Temperature 0 to 60°C (32 to 140°F) Storage Temperature -40 to 85°C (-40 to 185°F) Operating Humidity 5 to 95% RH Dimensions With ears: Without ears:22 x 75 x 80 mm (0.87 x 2.95 x 3.15 inch) 22 x 52 x 80 mm (0.87 x 2.05 x 3.15 inch)Surge Protection 15 KV ESD for serial port Magnetic Isolation 1.5 KV for EthernetPower Line Protection 4 KV burst (EFT), EN61000-4-42 KV surge, EN61000-4-5 Regulatory Approvals FCC Class A, CE Class A, UL , CUL, TUV。

关于MAX14850PMB1的说明书

关于MAX14850PMB1的说明书

Pmod is a trademark of Digilent Inc.DESIGNATIONQTY DESCRIPTIONC1, C220.1F F Q 10%, 16V X7R ceramic capacitors (0603)Murata GRM188R71C104KA01D C311F F Q 10%, 10V X7R ceramic capacitor (0603)TDK C1608X7R1A105K J1112-pin (2 x 6) right-angle male headerDESIGNATIONQTY DESCRIPTIONJ2112-pin (2 x 6) right-angle female headerJ312-pin straight male header R1–R66150I Q 5% resistors (0603)R7–R104 4.7k I Q 5% resistors (0603)U116-channel digital isolator (16 SO)Maxim MAX14850ASE+—1PCB: EPCB14850PM1SUPPLIERPHONE WEBSITEMurata Electronics North America, TDK Corp.847-803-6100PIN SIGNAL DESCRIPTION1SS_CTS Serial select/clear to send2MOSI_TXD Master-out slave input/host transmit 3MISO_RXD Master-in slave output/host receive 4SCK_RTS Serial clock/ready to send 5GND Ground 6VCC Power supply7SPAREIN Spare input from Pmod to host 8N.C.Not connected 9N.C.Not connected 10SPAREIO Spare input/output 11GND Ground 12VCCPower supplyComponent SuppliersNote: Indicate that you are using the MAX14850PMB1 when contacting these component suppliers.Component ListDetailed DescriptionUART InterfaceThe MAX14850PMB1 peripheral module can interface to the host by plugging directly into a Pmod-compatible port (configured for SPI or UART) through connector J1. See Table 1.Connector J2 provides the galvanically isolated connec-tion to another peripheral module. Note that even though the pinout numbering is different than J1, the signals from the top row of pins on J1 are passed through to the top row of pins on J2. See Table 2.Connector J3 provides power from the 2nd power domain to the isolated side of the IC and the isolated Pmod.Software and FPGA CodeExample software and drivers are available that execute directly without modification on several FPGA devel-opment boards that support an integrated or synthe-sized microprocessor. These boards include the Digilent Nexys 3, Avnet LX9, and Avnet ZEDBoard, although other platforms can be added over time. Maxim provides complete Xilinx I SE projects containing HDL, Platform Studio, and SDK projects. In addition, a synthesized bit stream, ready for FPGA download, is provided for the demonstration application.The software project (for the SDK) contains several source files intended to accelerate customer evalu-ation and design. These include a base application (maximModules.c) that demonstrates module functional-ity, and uses an AP interface (maximDeviceSpecific Utilities.c) to set and access Maxim device functions within a specific module.The source code is written in standard ANSI C format, and all API documentation including theory/operation, register description, and function prototypes are documented in the API interface file (maximDeviceSpecificUtilities.h & .c).The complete software kit is available for download at . Quick start instructions are also available as a separate document.Table 1. Connector J1 (with SPI/UART Peripheral Attached to J2)PIN SIGNAL DESCRIPTION1O_SPAREIN Spare input from Pmod to host 2N.C.Not connected3N.C.Not connected4O_SPAREIO Spare input/output5O_GND Ground from 2nd power domain (supplied through J3)6O_VCC Power from 2nd power domain (supplied through J3)7O_SS_CTS Serial select/clear to send8O_MOSI_TXD Master-out slave input/host transmit 9O_MISO_RXD Master-in slave output/host receive 10O_SCK_RTS Serial clock/ready to send11O_GND Ground from 2nd power domain (supplied through J3)12O_VCC Power from 2nd power domain(supplied through J3)PIN SIGNAL DESCRIPTION1O_VCCVCC for the 2nd power domain(up to 600V RMS separation)2O_GND Ground for the 2nd power domainFigure 1. MAX14850PMB1 Peripheral Module SchematicTable 2. Connector J2 Table 3. Connector J3Figure 2. MAX14850PMB1 Peripheral Module Component Placement Guide—Component SideFigure 3. MAX14850PMB1 Peripheral Module PCB Layout—Component SideFigure 4. MAX14850PMB1 Peripheral Module PCB Layout—Inner Layer 1 (Ground)Figure 5. MAX14850PMB1 Peripheral Module PCB Layout—Inner Layer 2 (Power)Figure 6. MAX14850PMB1 Peripheral Module PCB Layout—Solder SideFigure 7. MAX14850PMB1 Peripheral Module Component Placement Guide—Solder SideOrdering InformationPART TYPEMAX14850PMB1#Peripheral Module#Denotes RoHS compliant.REVISION NUMBER REVISIONDATEDESCRIPTIONPAGESCHANGED05/12Initial release—Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.Revision History。

Intel Arc A-Series 桌面版图形卡快速启动指南说明书

Intel Arc A-Series 桌面版图形卡快速启动指南说明书

SupportIntel® Arc™ A-Series Graphics – Desktop Quick Start GuideDocumentationContent Type Install & SetupArticle ID 000091128Last Reviewed 10/25/2022Thank you for choosing Intel Arc™ graphics. Designed to take your gaming and creation to the next level. Let’s Play!Intel® Arc™ Graphics products leverage the latest in system technologies to deliver a great gaming experience. In order to ensure you get the best gaming experiences from Intel® Arc™ A-Series Desktop Graphics, a supported hardware configuration is required, and there are a few system BIOS settings that are critical to configure.System BIOS configuration can have a significant impact on your gaming performance System BIOS are designed to support configurations for a broad range of devices and some default configurations may not be optimal for Intel® Arc™ A-Series Desktop Graphics. Please review the following guide and ensure your system has these options set correctly so you can get the best performance from your Intel® Arc™ Graphics card.System RequirementsAutomatic System Support DetectionUse the Intel® Driver and Support Assistant (Intel DSA) to quickly automatically detect if your system is ready for Intel® Arc™ discrete graphics .Download the Intel® Driver & Support Assistant .Supported Hardware ConfigurationsResizable BAR or Smart Access Memory must be enabled for optimal performance in all applications using Intel® Arc™ A-Series Graphics. Platforms supported are listed below. Support for more platforms will be added at a later time.CPU Motherboard13th Gen Intel® Core™ Processors Intel 700/600 Series motherboardwith Resizable BAR support enabled Product Support Graphics Introducing 4th Gen Intel® Xeon® Scalable Processors12th Gen Intel® Core™ Processors Intel 600 Series motherboard with Resizable BAR support enabled11th Gen Intel® Core™ Processors 10th Gen Intel® Core™ Processors Intel 500 Series motherboard with Resizable BAR support enabled Intel 400 Series motherboard with Resizable BAR support enabledAMD Ryzen™ 7000 Series Processors AMD 600 Series motherboard with Smart Access Memory enabledAMD Ryzen™ 5000 Series Processors Most AMD Ryzen™ 3000 series Processors (excludes AMD 3000G-series Processors)AMD 500 Series motherboard with Smart Access Memory enabledAdditional platforms/motherboards with Resizable BAR / Smart Access Memory enabled may also support Intel® Arc™ A-Series graphics.Operating System RequirementsWindows® 10 64-bit 20H2 or newerWindows 11* 64-bitConfirm the Operating System is using the GPT partition type:For Windows 11, this mode is configured by default.For Windows 10, the partition type can be converted if installed with a MBR partitiontype.Refer to the Microsoft Tool & Guidefor more information.Motherboard RequirementsFull-size PCI Express 3.0 (or newer) x16 slotResizable (Re-Size) BARSteps to Enable Resizable BAR:1. Enter the system’s BIOS/UEFI firmware configuration menu by pressing the DEL keyduring system start up. This may vary between each system manufacturer, please check with your system manufacturer for specific instructions as necessary.2. Compatibility Support Module (CSM) or Legacy Mode must be disabled and UEFI bootmode must be Enabled.3. Ensure the following settings are set to Enabled (or Auto if the Enabled option is notpresent):Above 4G DecodingRe-Size BAR SupportThe Resizable BAR option may be described as Re-Size BAR, Smart Access Memory, or Clever Access Memory. Contact the system manufacturer for specific details.Use your system’s latest motherboard firmware supporting Resizable BAR.Refer to your system manufacturer's support pagefor further details.Power Supply RequirementsPower supply requirements may vary, please check the manufacturer for specific details.Intel® Arc™ A770 Limited Edition and A750 Limited Edition Graphics:Minimum 600W power supply with two PCIe power connectors – 1x8-pin & 1x6-pinFor Intel Arc A770 Graphics Limited Edition Graphics CardsHow to Set Up the RGB Controller1. In the original packaging, locate and remove the RGB control cable from the box beneath the graphics card.2. Connect the RGB control cable to the 1 x 3-pin connector on the graphics card (shownbelow) and to the available USB pin header on the motherboard.Note The location of the USB pin header varies permotherboard. Contact your motherboardmanufacturer for more information on the header location.3. Download and install the Intel® Arc™ RGB Controller.FAQsQ: What warranty is offered with Intel® Arc™ A-series Graphics?A: Warranty terms vary by manufacturer, please check with your manufacturer for warranty coverage.For Intel® Arc™ A770 & A750 Limited Edition Graphics:Intel® Graphics Card three-year limited warranty applies to eligible Intel® Graphics Cards that are packaged in authentic Intel packaging and sold to end customers as standalone components. Intel® Graphics Cards contained within Original Equipment Manufacturer (OEM)systems are subject to OEM manufacturer warranties and generally are not supported directly by Intel. For more information, please visit Intel® Arc 7 Graphics Cards Three-Year Limited Warranty Terms and Conditions .Q: My system/motherboard manufacturer has provided a firmware update enabling support for Resizable BAR, but I still cannot see the Resizable BAR option!A: For some systems, you may need to first enable ‘Above 4G decoding’, save the configuration,and restart, before the Resizable BAR option will be shown.Q: I am on a 10th Gen Intel® Core™ Processor. Does my motherboard support Resizable BAR?A: Support for resizable BAR on 10th Gen platforms will vary. Please contact your system/motherboard manufacturer for specific support.Q: Why do I need to enable Resizable BAR?A: Resizable BAR must be enabled for optimal performance in all applications using Intel® Arc™A-Series Graphics.Q: Do I need to update the firmware on my Intel® Arc™ A-Series graphics card?A: No, the graphics card will not require a firmware update. However, if using a 10th Gen Intel®Core™ Processor based system, a firmware update for your system platform/motherboard will be required. The latest graphics driver is always recommended, please visit for the latest graphics driver.Q: How do I check if Resizable BAR has been enabled once I’ve installed my new Intel® Arc™A-Series graphics card?A: You can use Intel® Arc™ Control or the Intel® Driver & Support Assistant Tool.Q: Is my Operating System boot mode is configured correctly for Intel® Arc A-Series Graphics?A: Ensure the operating system is using the UEFI boot mode & GPT partition style. For Windows,it is possible to switch firmware modes using the MBR2GPT tool. Compatibility Support Module (CSM) must be disabled and UEFI boot mode must be enabled.Q: Which video output supports variable refresh rate for gaming?A: The preferred video outputs for gaming are the DisplayPort outputs. All DisplayPort outputs support Adaptive Sync for smooth, tear-free gaming. HDMI output capabilities may vary, please check the manufacturer for specific details. The Intel® Arc™ A770 Limited Edition and A750Limited Edition Graphics offer an HDMI 2.1 output with support for variable refresh rate.Q: What should I do if my system configuration is not listed?For configurations not listed in this guide, there may be performance or stability issues. We recommend updating to one of the configurations listed for optimal performance with Intel®Arc™ Graphics.Related ProductsThis article applies to 10 products.Show allContact supportNeed more help?Give FeedbackCompany OverviewContact IntelNewsroomInvestorsCareersCorporate ResponsibilityDiversity & InclusionPublic PolicyRecycling© Intel CorporationTerms of Use*TrademarksCookiesPrivacySupply Chain TransparencySite MapDo Not Share My Personal InformationIntel technologies may require enabled hardware, software or service activation. // No product or component can be absolutely secure. // Your costs and results may vary. // Performance varies by use, configuration and other factors. // See our complete legal Notices and Disclaimers. // Intel is committed to respecting human rights and avoiding complicity in human rights abuses. See Intel’s Global Human Rights Principles. Intel’s products and software are intended only to be used in applications that do not cause or contribute to a violation of an internationally recognized human right.。

ADUM1400英文芯片资料

ADUM1400英文芯片资料
第2页/共 9 页
ADuM1400/1/2
0~2Mbps 时 1401 工作电流 0~2Mbps 时 1402 工作电流 输入电平 IDD1 IDD2 IDD1 IDD2 VIH VIL 输出电平 VOH VOL 最大输出电流 IO1(side1) IO2(side2) VDD1=VDD2=3V,TA=25℃ 工作参数 工作电压 符号 VDD1 VDD2 静态工作电流 IDDI(Q) IDDO(Q) 0~2Mbps 时 1400 工作电流 0~2Mbps 时 1401 工作电流 0~2Mbps 时 1402 工作电流 输入电平 IDD1 IDD2 IDD1 IDD2 IDD1 IDD2 VIH VIL 输出电平 VOH VOL 最大输出电流 IO1(side1) IO2(side2) -18 -22 VDD1,2-0.1 3.0 0.0 0.1 18 22 1.6 0.4 Min 2.7 2.7 Typ 3.0 3.0 0.26 0.11 1.2 0.5 1.0 0.7 0.9 0.9 Max 3.6 3.6 0.31 0.14 1.9 0.9 1.6 1.2 1.5 1.5 单位 V V mA mA mA mA mA mA mA mA V V V V mA mA -18 -22 VDD1,2-0.1 5.0 0.0 0.1 18 22 2.0 0.8 1.8 1.2 1.5 1.5 2.4 1.8 2.1 2.1 mA mA mA mA V V V V mA mA
功能描述 Side1 端供电电源(2.7V~5.5V) Side1 端电源地 Side1 逻辑输入 A Side1 逻辑输入 B Side1 逻辑输出 C Side1 逻辑输出 D Side2 端供电电源(2.7V~5.5V) Side2 端电源地 Side2 逻辑输出 A Side2 逻辑输出 B Side2 逻辑输入 C Side2 逻辑输入 D 输出使能 1 脚 当 VE1 为高或悬空时,VOC,VOD 输出有效 当 VE1 为低时,VOC,VOD 输出禁止 输出使能 2 脚 当 VE2 为高或悬空时,VOA,VOB 输出有效 当 VE2 为低时,VOA,VOB 输出禁止
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REV.AInformation furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.a+5 V Low Power EIA RS-485 TransceiverADM1485FUNCTIONAL BLOCK DIAGRAM8-LeadROREDE DI CC FEATURESMeets EIA RS-485 Standard 30 Mb/s Data Rate Single +5 V Supply–7 V to +12 V Bus Common-Mode Range High Speed, Low Power BiCMOS Thermal Shutdown Protection Short Circuit Protection Zero Skew DriverDriver Propagation Delay: 10 ns Receiver Propagation Delay: 25 ns High Z Outputs with Power Off Superior Upgrade for LTC1485APPLICATIONSLow Power RS-485 Systems DTE-DCE Interface Packet Switching Local Area Networks Data Concentration Data MultiplexersIntegrated Services Digital Network (ISDN)GENERAL DESCRIPTIONThe ADM1485 is a differential line transceiver suitable for high speed bidirectional data communication on multipoint bustransmission lines. It is designed for balanced data transmission and complies with both EIA Standards RS-485 and RS-422.The part contains a differential line driver and a differential line receiver. Both the driver and the receiver may be enabled inde-pendently. When disabled, the outputs are tristated.The ADM1485 operates from a single +5 V power supply.Excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit.This feature forces the driver output into a high impedance state if during fault conditions a significant temperature increase is detected in the internal driver circuitry.Up to 32 transceivers may be connected simultaneously on a bus, but only one driver should be enabled at any time. It is important therefore that the remaining disabled drivers do not load the bus. To ensure this, the ADM1485 driver features high output impedance when disabled and also when powered down.This minimizes the loading effect when the transceiver is not being utilized. The high impedance driver output is maintained over the entire common-mode voltage range from –7 V to +12 V.The receiver contains a fail safe feature which results in a logic high output state if the inputs are unconnected (floating).The ADM1485 is fabricated on BiCMOS, an advanced mixed technology process combining low power CMOS with fast switching bipolar technology. All inputs and outputs contain protection against ESD; all driver outputs feature high source and sink current capability. An epitaxial layer is used to guard against latch-up.The ADM1485 features extremely fast switching speeds. Mini-mal driver propagation delays permit transmission at data rates up to 30 Mbits/s while low skew minimizes EMI interference.The part is fully specified over the commercial and industrial temperature range and is available in an 8-lead DIL/SOIC package.One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: 781/329-4700World Wide Web Site: Fax: 781/326-8703© Analog Devices, Inc., 2000ADM1485–SPECIFICATIONS(V CC = +5 V ؎ 5%. All specifications T MIN to T MAX unless otherwise noted.) Parameter Min Typ Max Unit Test Conditions/CommentsDRIVERDifferential Output Voltage, V OD 5.0V R = ∞, Figure 12.0 5.0V V CC = 5 V, R = 50 Ω (RS-422), Figure 11.5 5.0V R = 27 Ω (RS-485), Figure 1V OD3 1.5 5.0V V TST = –7 V to +12 V, Figure 2∆|V OD| for Complementary Output States0.2V R = 27 Ω or 50 Ω, Figure 1Common-Mode Output Voltage V OC3V R = 27 Ω or 50 Ω, Figure 1∆|V OD| for Complementary Output States0.2V R = 27 Ω or 50 ΩOutput Short Circuit Current (V OUT = High)35250mA–7 V ≤ V O≤ +12 VOutput Short Circuit Current (V OUT = Low)35250mA–7 V ≤ V O≤ +12 VCMOS Input Logic Threshold Low, V INL0.8VCMOS Input Logic Threshold High, V INH 2.0VLogic Input Current (DE, DI)±1.0µARECEIVERDifferential Input Threshold Voltage, V TH–0.2+0.2V–7 V ≤ V CM≤ +12 VInput Voltage Hysteresis, ∆V TH70mV V CM = 0 VInput Resistance12kΩ–7 V ≤ V CM≤ +12 VInput Current (A, B)+ 1mA V IN = 12 V–0.8mA V IN = –7 VLogic Enable Input Current (RE)±1µACMOS Output Voltage Low, V OL0.4V I OUT = +4.0 mACMOS Output Voltage High, V OH 4.0V I OUT = –4.0 mAShort Circuit Output Current785mA V OUT = GND or V CCTristate Output Leakage Current±1.0µA0.4 V ≤ V OUT≤ +2.4 VPOWER SUPPLY CURRENTI CC (Outputs Enabled) 1.35 2.2mA Outputs Unloaded, Digital Inputs = GND or V CC I CC (Outputs Disabled)0.71mA Outputs Unloaded, Digital Inputs = GND or V CC Specifications subject to change without notice.TIMING SPECIFICATIONS(V CC = +5 V ؎ 5%. All specifications T MIN to T MAX unless otherwise noted.)Parameter Min Typ Max Unit Test Conditions/CommentsDRIVERPropagation Delay Input to Output T PLH, T PHL21015ns R L Diff = 54 Ω C L1 = C L2 = 100 pF, Figure 3 Driver O/P to O/P T SKEW05ns R L Diff = 54 Ω C L1 = C L2 = 100 pF, Figure 3 Driver Rise/Fall Time T R, T F210ns R L Diff = 54 Ω C L1 = C L2 = 100 pF, Figure 3 Driver Enable to Output Valid1025nsDriver Disable Timing1025nsRECEIVERPropagation Delay Input to Output T PLH, T PHL182540ns C L = 15 pF, Figure 5Skew |T PLH–T PHL|05nsReceiver Enable T EN11525ns Figure 6Receiver Disable T EN21525ns Figure 6Specifications subject to change without notice.–2–REV. AADM1485REV. A –3–ABSOLUTE MAXIMUM RATINGS*PIN FUNCTION DESCRIPTIONCAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADM1485 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.ADM1485REV. A–4–Test CircuitsFigure 1.Driver Voltage Measurement Test CircuitFigure 2.Driver Voltage Measurement Test Circuit 2Figure 3.Driver Propagation Delay Test Circuit Figure 4.Driver Enable/Disable Test CircuitOUTFigure 5.Receiver Propagation Delay Test CircuitRE Figure 6.Receiver Enable/Disable Test CircuitSwitching Characteristics3V0V BA0V –VOFigure 7.Driver Propagation Delay, Rise/Fall TimingDEA, BA, BFigure 8.Driver Enable/Disable Timing OHOLFigure 9.Receiver Propagation DelayRERRFigure 10.Receiver Enable/Disable TimingTypical Performance Characteristics –ADM1485REV. A –5–OUTPUT VOLTAGE – VoltsO U T P U T C U R R E N T – m A400363228242016128400.5 1.0 1.5 2.0Figure 11.Receiver Output Low Voltage vs. Output Current TEMPERATURE – ؇CO U T P U T V O L T A G E – V o l t s0.40.30.10.2Figure 14.Receiver Output Low Voltage vs. Temperature OUTPUT VOLTAGE – VoltsO U T P U T C U R R E N T – m A100004123906050301080704020Figure 17.Driver Output Low Voltage vs. Output Current OUTPUT VOLTAGE – VoltsO U T P U T C U R R E N T – m A03.5–2–4–6–8–10–12–14–16–18–204.0 4.55.0Figure 12.Receiver Output High Voltage vs. Output Current OUTPUT VOLTAGE – VoltsO U T P U T C U R R E N T – m A960847260483624121234Figure 15.Driver Differential Out-put Voltage vs. Output Current OUTPUT VOLTAGE – VoltsO U T P U T C U R R E N T – m A00–10–20–30–40–50–60–70–80–90–10012345Figure 18.Driver Output High Voltage vs. Output Current TEMPERATURE – ؇CO U T P U T V O L T A G E – V o l t s5.04.94.54.84.74.6Figure 13.Receiver Output High Voltage vs. TemperatureTEMPERATURE – ؇CD I F FE R E N T I A L V O L T A G E – V o l t s2.42.32.0–50–25125025********.22.1Figure 16.Driver Differential Output Voltage vs. Temperature, R L = 54 ΩTEMPERATURE – ؇CS U P P L Y C U R R E N T – m AFigure 19.Supply Current vs.TemperatureADM1485–Typical Performance CharacteristicsREV. A–6–TEMPERATURE – ؇CT I M E – n s540–50321–25025*******125Figure 20.Receiver t PLH –t PHL vs.Temperature Figure 23.Loaded DriverDifferential Outputs Figure 26.Typical RS-485 NetworkTEMPERATURE – ؇CT I M E – n s1.0–500.90.80.70.60.50.4–25025*******125Figure 21.Driver Skew vs.TemperatureFigure 24.Driver/Receiver Propaga-tion Delays Low to High Figure 22.Unloaded Driver Differential OutputsFigure 25.Driver/Receiver Propaga-tion Delays High to LowADM1485REV. A –7–APPLICATIONS INFORMATIONDifferential Data TransmissionDifferential data transmission is used to reliably transmit data at high rates over long distances and through noisy environments.Differential transmission nullifies the effects of ground shifts and noise signals which appear as common-mode voltages on the line. There are two main standards approved by the Electronics Industries Association (EIA) which specify the electrical charac-teristics of transceivers used in differential data transmission.The RS-422 standard specifies data rates up to 10 MBaud and line lengths up to 4000 ft. A single driver can drive a transmis-sion line with up to 10 receivers.In order to cater for true multipoint communications, the RS-485 standard was defined. This standard meets or exceeds all the requirements of RS-422 but also allows for up to 32drivers and 32 receivers to be connected to a single bus. Anextended common-mode range of –7 V to +12 V is defined. The most significant difference between RS-422 and RS-485 is the fact that the drivers may be disabled thereby allowing more than one (32 in fact) to be connected to a single line. Only one driver should be enabled at time, but the RS-485 standard contains additional specifications to guarantee device safety in the event of line contention.Cable and Data RateThe transmission line of choice for RS-485 communications is a twisted pair. Twisted pair cable tends to cancel common-mode noise and also causes cancellation of the magnetic fields gener-ated by the current flowing through each wire, thereby, reducing the effective inductance of the pair.The ADM1485 is designed for bidirectional data communica-tions on multipoint transmission lines. A typical applicationshowing a multipoint transmission network is illustrated inFigure 26. An RS-485 transmission line can have as many as 32transceivers on the bus. Only one driver can transmit at a par-ticular time but multiple receivers may be enabled simultaneously.As with any transmission line, it is important that reflections are minimized. This may be achieved by terminating the extreme ends of the line using resistors equal to the characteristic im-pedance of the line. Stub lengths of the main line should also be kept as short as possible. A properly terminated transmission line appears purely resistive to the driver.Thermal ShutdownThe ADM1485 contains thermal shutdown circuitry which protects the part from excessive power dissipation during fault conditions. Shorting the driver outputs to a low impedance source can result in high driver currents. The thermal sensing circuitry detects the increase in die temperature and disables the driver outputs. The thermal sensing circuitry is designed to disable the driver outputs when a die temperature of 150°C is reached. As the device cools, the drivers are re-enabled at 140°C.Propagation DelayThe ADM1485 features very low propagation delay ensuring maximum baud rate operation. The driver is well balanced ensuring distortion free transmission.Another important specification is a measure of the skew be-tween the complementary outputs. Excessive skew impairs the noise immunity of the system and increases the amount of elec-tromagnetic interference (EMI).Receiver Open-Circuit Fail SafeThe receiver input includes a fail-safe feature which guarantees a logic high on the receiver when the inputs are open circuit or floating.Table parison of RS-422 and RS-485 Interface StandardsSpecificationRS-422RS-485Transmission TypeDifferential Differential Maximum Cable Length4000 ft.4000 ft.Minimum Driver Output Voltage ±2 V ±1.5 V Driver Load Impedance 100 Ω54 ΩReceiver Input Resistance 4 k Ω min 12 k Ω min Receiver Input Sensitivity ±200 mV ±200 mV Receiver Input Voltage Range –7 V to +7 V –7 V to +12 V No of Drivers/Receivers Per Line1/1032/32。

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