M27C405-150K6TR中文资料

M27C4054Mbit (512Kb x 8)OTP EPROMMarch 19991/15AI0160119A0-A18Q0-Q7V PPV CC M27C405V SS8GEFigure 1.Logic Diagram5V ±10%SUPPLY VOLTAGE in READ OPERATIONPIN COMPATIBLE with the 4Mbit,SINGLE VOLTAGE FLASH MEMORY FAST ACCESS TIME:70nsLOW POWER CONSUMPTION:–Active Current 30mA at 5MHz –Standby Current 100µAPROGRAMMING VOLTAGE:12.75V ±0.25V PROGRAMMING TIMES–Typical 48sec.(PRESTO II Algorithm)–Typical 27sec.(On-Board Programming)ELECTRONIC SIGNATURE –Manufacturer Code:20h –Device Code:B4DESCRIPTIONThe M27C405is a 4Mbit EPROM offered in the OTP (one time programmable)range.It is ideally suited for microprocessor systems requiring large programs,in the application where the contents is stable and needs to be programmed only one time and is organised as 524,288by 8bits.The M27C405is pin compatible with the industry standard 4Mbit,single voltage Flash memory.It can be consideredas a Flash Low Cost solution for production quantities.The M27C405is offered in PDIP32,PLCC32and TSOP32(8x 20mm)packages.A0-A18Address Inputs Q0-Q7Data Outputs E Chip Enable G Output Enable V PP Program Supply V CC Supply Voltage V SS GroundTable 1.Signal NamesPLCC32(K)321PDIP32(B)TSOP32(N)8x 20mmA1A0Q0A7A4A3A2A6A5A13A10A8A9Q7A14A11G E Q5Q1Q2Q3V SSQ4Q6A17V PP A16A12A18V CCA15AI01602M27C4058123456791011121314151632313029282726252423222120191817Figure 2A.DIP Pin ConnectionsAI01603A 17A8A10Q 517A1A0Q0Q 1Q 2Q 3Q 4A7A4A3A2A6A59V P P A91A 16A11A13A 12Q732A 18V C C M27C405A 15A14Q 6G E 25V S S Figure 2B.LCC Pin ConnectionsA1A0Q0A7A4A3A2A6A5A13A10A8A9Q7A14A11G E Q5Q1Q2Q3Q4Q6A17A18A16A12V PP V CC A15AI01604M27C405 (Normal)8191617242532V SS Figure 2C.TSOP Pin ConnectionsDEVICE OPERATIONThe modesof operationsof theM27C405are listed in the Operating Modes table.A single power sup-ply is required in the read mode.All inputs are TTL levels except for V pp and 12V on A9for Electronic Signature.Read ModeThe M27C405has two control functions,both of which must be logically active in order to obtain data at the outputs.Chip Enable (E)is the power control and should be used for device selection.Output Enable (G)is the output control and should be used to gate data to the output pins,inde-pendent of device selection.Assuming that the addresses are stable,the address access time (t AVQV )is equalto the delayfrom E to output (t ELQV ).Data is availableat the output after a delay of t GLQV from the falling edge of G,assuming that E has been low and the addresses have been stable for at least t AVQV -t GLQV .Standby ModeThe M27C405has a standby mode which reduces the active current from 30mA to 100µA.The M27C405is placed in the standby mode by apply-ing a CMOShigh signal to the E input.When in the standbymode,the outputsare in a high impedance state,independent of the G input.2/15M27C405Mode E G A9V PP Q0-Q7 Read V IL V IL X V CC or V SS Data Out Output Disable V IL V IH X V CC or V SS Hi-Z Program V IL Pulse V IH X V PP Data In Verify V IH V IL X V PP Data Out Program Inhibit V IH V IH X V PP Hi-Z Standby V IH X X V CC or V SS Hi-Z Electronic Signature V IL V IL V ID V CC Codes Note:X=V IH or V IL,V ID=12V±0.5VTable3.Operating ModesIdentifier A0Q7Q6Q5Q4Q3Q2Q1Q0Hex Data Manufacturer’s Code V IL0010000020h Device Code V IH10110100B4h Table4.Electronic SignatureTwo Line Output ControlBecause OTP EPROMs are usually used in larger memory arrays,this product features a2line con-trol function which accommodates the use of mul-tiple memory connection.The two line control function allows:a.the lowest possible memory power dissipation,plete assurance that output bus contentionwill not occur.For the most efficientuse of thesetwo controllines, E should be decoded and used as the primary device selecting function,while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus.This ensures that all deselectedmem-ory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device.Symbol Parameter Value Unit T A Ambient Operating Temperature(3)–40to125°CT BIAS Temperature Under Bias–50to125°CT STG Storage Temperature–65to150°C V IO(2)Input or Output Voltages(except A9)–2to7VV CC Supply Voltage–2to7VV A9(2)A9Voltage–2to13.5VV PP Program Supply Voltage–2to14V Notes:1.Except for the rating”Operating Temperatur e Range”,stresses above those listed in the Table”Absolute Maximum Ratings”may cause permanent damage to the device.These are stress ratings only and operation of the device at these or any otherconditions above those indicated in the Operating sections of this specification is not implied.Exposure to Absolute MaximumRating conditions for extended periods may affect device reliability.Refer also to the STMicroelectronics SURE Program and other relevant quality documents.2.Minimum DC voltage on Input or Output is–0.5V with possible undershoot to–2.0V for a period less than20ns.Maximum DCvoltage on Output is V CC+0.5V with possible overshoot to V CC+2V for a period less than20ns.3.Depends on range.Table2.Absolute Maximum Ratings(1)3/15M27C405Symbol ParameterTest ConditionMinMax Unit C IN Input Capacitance V IN =0V 6pF C OUTOutput CapacitanceV OUT =0V12pFNote: 1.Sampled only,not 100%tested.Table 6.Capacitance (1)(T A =25°C,f =1MHz )AI018223VHigh Speed0V1.5V2.4VStandard 0.4V2.0V 0.8VFigure 3.AC Testing Input Output Waveform AI01823B1.3VOUTC LC L =30pF for High Speed C L =100pF for Standard C L includes JIG capacitance3.3k Ω1N914DEVICE UNDER TESTFigure 4.AC Testing Load CircuitHigh SpeedStandard Input Rise and Fall Times ≤10ns ≤20ns Input Pulse Voltages0to 3V 0.4V to 2.4V Input and Output Timing Ref.Voltages1.5V0.8V and 2VTable 5.AC Measurement Conditions4/15M27C405Symbol ParameterTest Condition Min Max Unit I LI Input Leakage Current 0V ≤V IN ≤V CC ±10µA I LO Output Leakage Current 0V ≤V OUT ≤V CC ±10µA I CC Supply CurrentE =V IL ,G =V IL ,I OUT =0mA,f =5MHz30mA I CC1Supply Current (Standby)TTL E =V IH 1mA I CC2Supply Current (Standby)CMOS E >V CC –0.2V 100µA I PP Program Current V PP =V CC10µA V IL Input Low Voltage –0.30.8V V IH(2)Input High Voltage 2V CC +1V V OL Output Low Voltage I OL =2.1mA 0.4V V OHOutput High Voltage TTL I OH =–400µA 2.4V Output High Voltage CMOSI OH =–100µAV CC –0.7VVNotes:1.V CC must be applied simultaneously with or before V PP and removed simultaneously or after V PP.2.Maximum DC voltage on Output is V CC +0.5V.Table 7.Read Mode DC Characteristics (1)(T A =0to 70°C or –40to 85°C;V CC =5V ±10%;V PP =V CC )SymbolAltParameterTest ConditionM27C405Unit-70(3)-80-90MinMax MinMax MinMax t AVQV t ACC Address Valid to Output Valid E =V IL ,G =V IL708090ns t ELQV t CE Chip Enable Low to Output Valid G =V IL 708090ns t GLQV t OE Output Enable Low to Output Valid E =V IL 354040ns t EHQZ (2)t DF Chip Enable High to Output Hi-Z G =V IL 030030030ns t GHQZ (2)t DF Output Enable High to Output Hi-Z E =V IL 030030030ns t AXQXt OHAddress Transition to Output TransitionE =V IL ,G =V IL0nsNotes:1.V CC must be applied simultaneously with or before V PP and removed simultaneously or after V PP.2.Sampled only,not 100%tested.3.In case of 70ns speed see High Speed AC Measurement conditions.Table 8A.Read Mode AC Characteristics (1)(T A =0to 70°C or –40to 85°C;V CC =5V ±10%;V PP =V CC )5/15M27C405SymbolAltParameterTest ConditionM27C405Unit-100-120-150MinMax MinMax MinMax t AVQV t ACC Address Valid to Output Valid E =V IL ,G =V IL100120150ns t ELQV t CE Chip Enable Low to Output Valid G =V IL 100120150ns t GLQV t OE Output Enable Low to Output Valid E =V IL 506060ns t EHQZ (2)t DF Chip Enable High to Output Hi-Z G =V IL 030040050ns t GHQZ (2)t DF Output Enable High to Output Hi-Z E =V IL 030040050ns t AXQXt OHAddress Transition to Output TransitionE =V IL ,G =V IL000ns Notes:1.V CC must be applied simultaneously with or before V PP and removed simultaneously or after V PP.2.Sampled only,not 100%tested.Table 8B.Read Mode AC Characteristics (1)(T A =0to 70°C or –40to 85°C;V CC =5V ±10%;V PP =V CC )AI00724BtAXQXtEHQZA0-A18EGQ0-Q7tAVQVtGHQZtGLQVtELQVVALID Hi-ZVALIDFigure 5.Read Mode AC Waveforms6/15M27C405Symbol ParameterTest Condition MinMax Unit I LI Input Leakage Current 0≤V IN ≤V CC±10µA I CC Supply Current 50mA I PP Program Current E =V IL50mA V IL Input Low Voltage –0.30.8V V IH Input High Voltage 2V CC +0.5V V OL Output Low Voltage I OL =2.1mA 0.4V V OH Output High Voltage TTL I OH =–400µA2.4V V IDA9Voltage11.512.5VNote: 1.V CC must be applied simultaneously with or before V PP and removed simultaneously or after V PP .Table 9.Programming Mode DC Characteristics (1)(T A =25°C;V CC =6.25V ±0.25V;V PP =12.75V ±0.25V)Symbol Alt ParameterTest ConditionMin MaxUnit t AVEL t AS Address Valid to Chip Enable Low 2µs t QVEL t DS Input Valid to Chip Enable Low 2µs t VPHEL t VPS V PP High to Chip Enable Low 2µs t VCHEL t VCS V CC High to Chip Enable Low 2µs t ELEH t PW Chip Enable Program Pulse Width95105µs t EHQX t DH Chip Enable High to Input Transition2µs t QXGL t OES Input Transition to Output Enable Low2µs t GLQV t OE Output Enable Low to Output Valid100ns t GHQZ t DFP Output Enable High to Output Hi-Z0130ns t GHAXt AHOutput Enable High to Address TransitionnsNotes:1.V CC must be applied simultaneously with or before V PP and removed simultaneously or after V PP .2.Sampled only,not 100%tested.Table 10.ProgrammingMode AC Characteristics (1)(T A =25°C;V CC =6.25V ±0.25V;V PP =12.75V ±0.25V)7/15M27C405tAVPLVALIDAI00725A0-A18Q0-Q7V PPV CCGDATA INDATA OUTEtQVELtVPHELtVCHELtEHQXtELEHtGLQV tQXGLtGHQZtGHAXPROGRAM VERIFYFigure 6.Programming and Verify Modes AC WaveformsSystem ConsiderationsThe power switching characteristics of Advanced CMOS OTP EPROMs require careful decoupling of the devices.The supply current,I CC ,has three segments that are of interest to the system de-signer :the standbycurrent level,the active current level,and transient current peaks that are pro-duced by the falling and rising edges of E.The magnitude of the transient current peaks is de-pendenton the capacitiveand inductiveloading of the device at the output.The associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling ca-pacitors.It is recommended that a 0.1µF ceramic capacitor be used on every device between V CC and V SS .Thisshould be a high frequencycapacitor of low inherent inductance and should be placed as close to the device as possible.In addition,a4.7µF bulk electrolytic capacitor should be used between V CC and V SS for every eight devices.The bulk capacitor should be located near the power supply connection point.The purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces.ProgrammingWhen delivered,all bits of the M27C405are in the ’1’state.Datais introducedby selectively program-ming ’0’s into the desired bit locations.Although only ’0’s will be programmed,both ’1’s and ’0’s can be present in the data word.The M27C405is in the programming mode when V PP input is at 12.75V,G is at V IH and E is pulsed to V IL .The data to be programmed is applied to 8bits in parallel to the data output pins.The levels required for the address and data inputs are TTL.V CC is specified to be 6.25V ±0.25V.8/15M27C405AI00760Bn =0Last AddrVERIFYE =100µs Pulse++n =25++AddrV CC =6.25V,V PP =12.75VFAILCHECK ALL BYTES 1st:V CC =6V 2nd:V CC =4.2VYES NOYESNOYESNO Figure 7.Programming FlowchartPRESTO II Programming AlgorithmPRESTO II Programming Algorithm allows the whole array to be programmed with a guaranteed margin,in a typicaltime of 52.5seconds.Program-ming with PRESTO II consists of applying a se-quence of 100µs program pulses to each byte until a correct verify occurs (see Figure 7).During pro-gramming and verify operation,a MARGIN MODE circuit is automaticallyactivated in order to guaran-tee that each cell is programmed with enough margin.No overprogram pulse is applied since the verify in MARGIN MODE provides the necessary margin to each programmed cell.Program InhibitProgramming of multipleM27C405sin parallelwith different data is also easily accomplished.Except for E,all like inputs including G of the parallel M27C405may be common.A TTL low level pulse appliedto a M27C405’sE input,with V PP at 12.75V,will program that M27C405.A high level E input inhibits the other M27C405s from being pro-grammed.Program VerifyA verify (read)should be performed on the pro-grammed bits to determinethat they were correctly programmed.The verify is accomplished with G at V IL ,E at V IH ,V PP at 12.75V and V CC at 6.25V.On-Board ProgrammingProgramming the M27C405may be performed directly in the application circuit,however this re-quires modification to the PRESTO II Algorithm (see Figure 8).For in-circuit programming V CC is determined by the user and normally is compatible with other componentsusing the same supply volt-age.It is recommended that the maximum value of V CC which remains compatible with the circuit is used.Typically V CC =5.5V for programming systems us-ing V CC =5V is recommended.The value of V CC does not affect the programming,it gives a higher test capability in VERIFY mode.V PP must be kept at 12.75volts to maintain and enable the programming.AI01349n =0Last AddrVERIFY?E =10µs Pulse++n =25++AddrV PP =12.75VFAILCHECK ALL BYTESV PP =V CCYESNOYESNOYESNO SET MARGIN MODEE =10µs PulseFigure 8.On-Board Programming Flowchart9/15M27C405Warning:compatibility with FLASH Memory Compatibility issues may arise when replacing the compatible Single Supply4Megabit FLASH Mem-ory(the M29F040)by the M27C405.The V PP pin of the M27C405corresponds to the ”W”pin of the M29F040.The M27C405V PP pin can withstand voltages up to12.75V,while the”W”pin of the M29F040is a normal control signal input and may be damaged if a high voltage is applied; special precautions must be taken when program-ming in-circuit.However if an already programmed M27C405is used,this can be directly put in place of the FLASH Memoryas theV PP input,when not in programming mode,is set to V CC or V SS.Changes to PRESTO II.The duration of the pro-gramming pulse is reduced to20µs,making the programming time of the M27C405comparable with the counterpart FLASH Memory.Electronic SignatureThe Electronic Signature(ES)mode allows the reading out of a binarycode from an OTP EPROM that will identify its manufacturer and type.this mode is intended for use by programming equip-ment to automatically match the device to be pro-grammed with its corresponding programming algorithm.This mode is functionalin the25°C±5°C ambient temperature range that is required when programming the M27C405.To activate the ES mode,the programming equipment must force 11.5Vto12.5V on address line A9of the M27C405 withV PP=V CC=5V.Two identifierbytes maythen be sequenced from the device outputs by toggling address line A0from V IL to V IH.All other address lines must be held at V IL during Electronic Signa-ture mode.Byte0(A0=V IL)represents the manu-facturer code and byte1(A0=V IH)the device identifier code.For the STMicroelectronics M27C405,these two identifier bytes are given in Table4and can be read-out on outputs Q0to Q7.10/15M27C405ORDERING INFORMATION SCHEMENote: 1.High Speed,see AC Characteristics section for further information.For a list of availableoptions (Speed,Package,etc...)or for further information on any aspect of this device,please contact the STMicroelectronics Sales Office nearest to you.Speed-70(1)70ns -8080ns -9090ns -100100ns -120120ns -150150nsPackage B PDIP32K PLCC32NTSOP328x 20mmTemperature Range 10to 70°C 6–40to 85°COption TRTape &Reel PackingExample:M27C405-80K1TR11/15PDIP32-32pin Plastic DIP,600mils widthPDIPA2A1A LB1B e1D SE1EN1CαeA eBD2Symbmm inches TypMin Max TypMin Max A – 5.08–0.200A10.38–0.015–A2 3.56 4.060.1400.160B 0.380.510.0150.020B1 1.52––0.060––C 0.200.300.0080.012D 41.7842.04 1.645 1.655D238.10–– 1.500––E 15.24––0.600––E113.5913.840.5350.545e1 2.54––0.100––eA 15.24–0.600––eB 15.2417.–780.6000.700L 3.18 3.430.1250.135S 1.78 2.030.0700.080α0°10°0°10°N3232Drawing is not to scale.12/15PLCC32-32lead Plastic Leaded Chip Carrier,rectangularPLCCD NeE1E1ND1NdCPBD2/E2eB1A1AR0.51(.020)1.14(.045)F A2Symbmm inches TypMin Max TypMin Max A 2.54 3.560.1000.140A1 1.52 2.410.0600.095A2–0.38–0.015B 0.330.530.0130.021B10.660.810.0260.032D 12.3212.570.4850.495D111.3511.560.4470.455D29.9110.920.3900.430E 14.8615.110.5850.595E113.8914.100.5470.555E212.4513.460.4900.530e 1.27––0.050––F 0.000.250.0000.010R 0.89––0.035––N 3232Nd 77Ne 99CP0.100.004Drawing is not to scale.13/15TSOP32-32lead Plastic Thin Small Outline,8x 20mmTSOP-aD1E1NCPBeA2AN/2DDIECLA1αSymbmm inches TypMinMax TypMinMax A 1.200.047A10.050.150.0020.007A20.95 1.050.0370.041B 0.150.270.0060.011C 0.100.210.0040.008D 19.8020.200.7800.795D118.3018.500.7200.728E 7.908.100.3110.319e 0.50--0.020--L 0.500.700.0200.028α0°5°0°5°N 3232CP0.100.004Drawing is not to scale.14/15Information furnished is believed to be accurate and reliable.However,STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringementof patents or other rights of third parties which may result from its use.No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics.Specifications mentioned in this publication are subject to change without notice.This publication supersedes and replaces all information previously supplied.STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is a registered trademark of STMicroelectronics©1999STMicroelectronics-All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia-Brazil-Canada-China-France-Germany-Italy-Japan-Korea-Malaysia-Malta-Mexico-Morocco-The Netherlands-Singapore-Spain-Sweden-Switzerland-Taiwan-Thailand-United Kingdom-U.S.A.15/15。