Dual step-down controller with auxilary voltages for notebook system power
图解戴尔iDRAC服务器远程控制
图解戴尔iDRAC服务器远程控制设置对于远程的服务器，我们不能经常性的去机房维护，所以远程控制对于服务器来说就显得至关重要。
那么你是用什么方式对服务器进行远程控制呢？远程桌面？还是KVM切换器？NO，你OUT了!如果你用的是戴尔的服务器，那么iDRAC功能不使用的话就是个极大的浪费哦。
那么什么是iDRAC呢？iDRAC又称为Integrated Dell Remote Access Controller，也就是集成戴尔远程控制卡，这是戴尔服务器的独有功能，iDRAC卡相当于是附加在服务器上的一计算机，可以实现一对一的服务器远程管理与监控，通过与服务器主板上的管理芯片BMC进行通信，监控与管理服务器的硬件状态信息。
它拥有自己的系统和IP地址，与服务器上的OS无关。
是管理员进行远程访问和管理的利器，戴尔服务器集成了iDRAC控制卡，我们就可以扔掉价格昂贵的KVM设备了。
在戴尔第12代服务器中，iDRAC 的版本升级到了iDRAC 7，下面我们将以戴尔PowerEdge R820为例，为您图解iDRAC的一步步设置。
戴尔服务器的iDRAC远程控制接口，在图的右下角，有“iDRAC”字样iDRAC的网口在服务器的背面，一般都标注iDRAC的字样。
在戴尔第12代服务器中，这个网口使用了1Gbps的网口，速度更快。
一般情况下，iDRAC功能默认都是关闭，我们需要在BIOS里面启用，首先我们先重启计算机，然后进入BIOS，选择iDRAC Setting。
在BIOS中选择iDRAC设置BIOS中iDRAC详细的设置列表进入iDRAC Setting之后，我们看到很多详细的设置，一般情况下我们只要设置网络Network就可以了。
在BIOS中开启iDRAC功能首先我们需要先启用iDRAC功能，戴尔PowerEdge R820的iDRAC接口采用了千兆网卡，所以我们在Enable NC选项中选择Enable，NC Selection选项中选择Dedicated(iDRAC7 Enterprise only)，而Auto Negotiation中我们则可以选择iDRAC网络接口的速率和全双工和半双工模式，一般情况下我们选择on，也就是自动设置就可以了。
LTC3707中文资料
13707fbTF EATURESA PPLICATIONS DESCRIPTION Synchronous Step-DownSwitching RegulatorThe L TC ®3707 is a high performance dual step-down switching regulator controller that drives N-channel synchronous power MOSFET stages. A constant frequency current mode architecture allows adjustment of the frequency up to 300kHz. Power loss and noise due to the ESR of the input capacitors are minimized by operating the two controller output stages out of phase. OPTI-LOOP compensation allows the transient response to be optimized over a wide range of output capacitance and ESR values. The precision 0.8V reference and power good output indicator are compatible with future microprocessor generations, and a wide 3.5V to 30V input supply range encompasses all battery chemistries.A RUN/SS pin for each controller provides both soft-start and optional timed, short-circuit shutdown. Current foldback limits MOSFET dissipation during short-circuit conditions when overcurrent latchoff is disabled. Output overvoltage protection circuitry latches on the bottom MOSFET until V OUT returns to normal. The FCB mode pin can select among B urst Mode operation, constant frequency mode and continuous inductor current mode or regulate a secondary winding.Figure 1. High Effi ciency Dual 5V/3.3V Step-Down Converter■180° Phased Dual Controllers Reduce Required Input Capacitance and Power Supply Induced Noise ■ OPTI-LOOP ® Compensation Minimizes C OUT■ ±1.5% Output Voltage Accuracy over Temperature ■ Dual N-Channel MOSFET Synchronous Drive ■ Power Good Output Voltage Monitor■ DC Programmed Fixed Frequency 150kHz to 300kHz ■ Wide V IN Range: 4.5V to 28V Operation■ Very Low Dropout Operation: 99% Duty Cycle ■ Adjustable Soft-Start Current Ramping ■ Foldback Output Current Limiting■ Latched Short-Circuit Shutdown with Defeat Option ■ Output Overvoltage Protection ■ Remote Output Voltage Sense ■ Low Shutdown I Q: 20μA ■ 5V and 3.3V Standby Regulators■ Selectable Constant Frequency, Burst Mode ® Operation or PWM Operation■ Small 28-Lead Narrow SSOP Package■Notebook and Palmtop Computers, PDAs ■ B attery Chargers ■ Portable Instruments■ Battery-Operated Digital Devices ■ DC Power Distribution SystemsL , L T , L TC, L TM, Burst Mode, and OPTI-LOOP are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5481178, 5705919, 5929620, 6144194, 6177787, 6304066, 6580258.V OUT2LTC370723707fbP IN CONFIGURATIONA BSOLUTE MAXIMUM RATINGS Input Supply Voltage (V IN ) .........................30V to –0.3V Top Side Driver Voltages(BOOST1, BOOST2) ...................................36V to –0.3V Switch Voltage (SW1, SW2) .........................30V to –5V INTV CC, EXTV CC , RUN/SS1, RUN/SS2, (BOOST1-SW1), (BOOST2-SW2), PGOOD ..............................7V to –0.3V SENSE1+, SENSE2+, SENSE1–,SENSE2– Voltages.........................(1.1)INTV CC to –0.3V FREQSET , STBYMD, FCB Voltage .........INTV CC to –0.3V I TH1, I TH2, V OSENSE1, V OSENSE2 Voltages ...2.7V to –0.3V Peak Output Current <10μs (TG1, TG2, BG1, BG2) .....3A INTV CC Peak Output Current ................................. 40mA Operating Temperature Range (Note 2)....–40°C to 85°C Junction Temperature (Note 3) .............................125°C Storage Temperature Range ...................–65°C to 150°C Lead Temperature (Soldering, 10 sec) ..................300°C(Note 1)SYMBOL PARAMETERCONDITIONSMIN TYP MAX UNITS V OSENSE1, 2Regulated Feedback Voltage (Note 4); I TH1, 2 Voltage = 1.2V l0.7880.8000.812V I OSENSE1, 2Feedback Current(Note 4)–5–50nA V REFLNREG Reference Voltage Line Regulation V IN = 3.6V to 30V (Note 4)0.0020.02%/V V LOADREGOutput Voltage Load Regulation(Note 4)Measured in Servo Loop; ΔI TH Voltage = 1.2V to 0.7V Measured in Servo Loop; ΔI TH Voltage = 1.2V to 2.0V l l 0.1–0.10.5–0.5%%g m1,2T ransconductance Amplifi er g mI TH1, 2 = 1.2V; Sink/Source 5μA; (Note 4)1.3mmhoORDER INFORMATIONLEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE L TC3707EGN#PBF L TC3707EGN#TRPBF 3707EGN 28-Lead Plastic SSOP –40°C to 85°C L TC3707IGN#PBF L TC3707IGN#TRPBF 3707IGN 28-Lead Plastic SSOP –40°C to 85°C LEAD BASED FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE L TC3707EGN L TC3707EGN#TR 3707EGN 28-Lead Plastic SSOP –40°C to 85°C L TC3707IGNL TC3707IGN#TR3707IGN28-Lead Plastic SSOP–40°C to 85°CConsult L TC Marketing for parts specifi ed with wider operating temperature ranges.For more information on lead free part marking, go to: http://www.linear .com/leadfree/ For more information on tape and reel specifi cations, go to: http://www.linear .com/tapeandreel/ELECTRICAL CHARACTERISTICSThe l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at T A = 25°C. V IN = 15V , V RUN/SS1, 2 = 5V unless otherwise noted.LTC370733707fbE LECTRICAL CHARACTERISTICS SYMBOL PARAMETERCONDITIONS MIN TYP MAX UNITSg mGBW1, 2T ransconductance Amplifi er GBW I TH1, 2 = 1.2V; (Note 4)3MHz I QInput DC Supply CurrentNormal Mode Standby Shutdown(Note 5)EXTV CC Tied to V OUT1 = 5V V RUN/SS1, 2 = 0V , V STBYMD > 2V V RUN.SS1, 2 = 0V , V STBYMD = Open3501252035μA μA μA V FCB Forced Continuous Threshold l0.760.8000.84V I FCB Forced Continuous Pin Current V FCB = 0.85V –0.30–0.18–0.1μA V BINHIBIT Burst Inhibit (Constant Frequency) ThresholdMeasured at FCB pin 4.34.8V UVLO Undervoltage Lockout V IN Ramping Down l 3.54V V OVL Feedback Overvoltage Lockout Measured at V OSENSE1, 2l0.840.860.88V I SENSE Sense Pins Total Source Current (Each Channel); V SENSE1–, 2– = V SENSE1+, 2+ = 0V –90–60μA V STBYMD MS Master Shutdown Threshold V STBYMD Ramping Down0.40.6VV STBYMD KA Keep-Alive Power On-Threshold V STBYMD Ramping Up, RUN SS1, 2 = 0V 1.52V DF MAX Maximum Duty Factor In Dropout 9899.4%I RUN/SS1, 2Soft-Start Charge Current V RUN/SS1, 2 = 1.9V 0.5 1.2μAV RUN/SS1, 2 ON RUN/SS Pin ON ThresholdV RUN/SS1, V RUN/SS2, Rising 1.01.52.0V V RUN/SS1, 2 L T RUN/SS Pin Latchoff Arming ThresholdV RUN/SS1, V RUN/SS2, Rising from 3V 4.14.75V I SCL1, 2RUN/SS Discharge Current Soft Short Condition V OSENSE1, 2 = 0.5V; V RUN/SS1, 2 = 4.5V 0.524μA I SDLHO Shutdown Latch Disable Current V OSENSE1, 2 = 0.5V1.65μA V SENSE(MAX)Maximum Current Sense Threshold V OSENSE1, 2 = 0.7V , V OSENSE1–, 2– = 5V l 656275758588mV mV TG1, 2 t r TG1, 2 t f TG T ransition Time:Rise Time Fall Time (Note 6)C LOAD = 3300pF C LOAD = 3300pF 6060110110ns ns BG1, 2 t r BG1, 2 t f BG T ransition Time:Rise Time Fall Time(Note 6)C LOAD = 3300pF C LOAD = 3300pF5050110100ns ns TG/BG t 1D Top Gate Off to Bottom Gate On Delay Synchronous Switch-On Delay Time C LOAD = 3300pF Each Driver 80ns BG/TG t 2D Bottom Gate Off to Top Gate On Delay Top Switch-On Delay Time C LOAD = 3300pF Each Driver 80ns t ON(MIN)Minimum On-Time Tested with a Square Wave (Note 7)180nsINTV CC Linear RegulatorV INTVCC Internal V CC Voltage 6V < V IN < 30V , V EXTCC = 4V 4.85.0 5.2V V LDO INT INTV CC Load Regulation I CC = 0 to 20mA, V EXTVCC = 4V 0.2 2.0%V LDO EXT EXTV CC Voltage Drop I CC = 20mA, V EXTVCC = 5V100200mV V EXTVCC EXTV CC Switchover Voltage I CC = 20mA, EXTV CC Ramping Positivel 4.54.7V V LDOHYS EXTV CC Hysteresis 0.2VOscillator f OSC Oscillator Frequency V FREQSET = Open (Note 8)190220250kHz f LOWLowest FrequencyV FREQSET = 0V120140160kHzThe l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at T A= 25°C. V IN= 15V , V RUN/SS1, 2= 5V unless otherwise noted.LTC370743707fbEffi ciency vs Output Current (Figure 13)Effi ciency vs Input Voltage (Figure 13)SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS f HIGH Highest Frequency V FREQSET = 2.4V 280310360kHz I FREQSET FREQSET Input Current V FREQSET = 0V –2–1μA 3.3V Linear RegulatorV 3.3OUT 3.3V Regulator Output Voltage No Load l3.203.35 3.45V V 3.3IL 3.3V Regulator Load Regulation I 3.3 = 0 to 10mA 0.52%V 3.3VL3.3V Regulator Line Regulation 6V < V IN < 30V 0.050.2%PGOOD Output V PGL PGOOD Voltage Low I PGOOD = 2mA 0.10.3V I PGOOD PGOOD Leakage CurrentV PGOOD = 5V1μA V PGPGOOD T rip Level, Either ControllerV OSENSE Respect to Set Output VoltageV OSENSE Ramping Negative V OSENSE Ramping Positive–6 6–7.5 7.5–9.5 9.5%%Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.Note 2: The L TC3707E is guaranteed to meet performance specifi cations from 0°C to 85°C. Specifi cations over the –40°C to 85°C operatingtemperature range are assured by design, characterization and correlation with statistical process controls. The L TC3707I is guaranteed to meet performance specifi cations over the full –40°C to 85°C operating temperature range.Note 3: T J is calculated from the ambient temperature T A and power dissipation P D according to the following formula: L TC3707EGN = T J = T A + (P D • 85°C/W)Note 4: The L TC3707 is tested in a feedback loop that servos V ITH1, 2 to a specifi ed voltage and measures the resultant V OSENSE1, 2.Note 5: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. See Applications Information.Note 6: Rise and fall times are measured using 10% and 90% levels. Delay times are measured using 50% levels.Note 7: The IC minimum on-time is tested under an ideal conditionwithout external power FETs. It can be different when the IC is working in an actual circuit. See Minimum On-Time Considerations in the Application Information section.Note 8: V FREQSET pin internally tied to a 1.19V reference through a large resistance.TYPICAL PERFORMANCE CHARACTERISTICSEffi ciency vs Output Current and Mode (Figure 13)OUTPUT CURRENT (A)0.0010E F F I C I E N C Y (%)10304050100700.010.113707 G012080906010OUTPUT CURRENT (A)0.001E F F I C I E N C Y (%)7080103707 G0260500.010.1110090INPUT VOL TAGE (V)5E F F I C I E N C Y (%)70803707 G036050152530100V OUT = 5V I OUT = 3A90 E LECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at T A= 25°C. V IN= 15V , VRUN/SS1, 2= 5V unless otherwise noted.LTC370753707fbTYPICAL PERFORMANCE CHARACTERISTICSSupply Current vs Input Voltage and Mode (Figure 13)EXTV CC Voltage DropINTV CC and EXTV CC Switch Voltage vs TemperatureInternal 5V LDO Line RegMaximum Current Sense Threshold vs Duty FactorMaximum Current SenseThreshold vs Percent of Nominal Output Voltage (Foldback)Maximum Current SenseThreshold vs V RUN/SS (Soft-Start)Maximum Current Sense Threshold vs Sense Common Mode VoltageCurrent Sense Threshold vs I TH VoltageINPUT VOL TAGE (V)50S U P P L Y C U R R E N T (μA )40010001020253707 G042008006001530CURRENT (mA)0E X T V C C V O L T A G E D R O P (m V )20015010050403707 G05102030TEMPERATURE (°C)–50I N T V C C A N D E X T V C C S W I T C H V O L T A G E (V )4.955.005.0525753707 G064.904.85–25501001254.804.704.75INPUT VOLTAGE (V)04.84.95.115253707 G074.74.651020304.54.45.0I N T V C C V O L T A G E(V )DUTY FACTOR (%)0V S E N S E (m V )255075204060803707 G08100PERCENT ON NOMINAL OUTPUT VOLTAGE (%)0V S E N S E (m V )4050601003707 G0930200255075108070V RUN/SS (V)00V S E N S E (m V )2040608012343707 G1056COMMON MODE VOLTAGE (V)V S E N S E (m V )72768043707 G116864601235V ITH (V)0V S E N S E (m V )3050709023707 G1210–10204060800–20–300.511.52.5LTC370763707fbTYPICAL PERFORMANCE CHARACTERISTICSLoad RegulationV ITH VS V RUN/SSSENSE Pins Total Source CurrentMaximum Current Sense Threshold vs TemperatureDropout Voltage vs Output Current (Figure 13)RUN/SS Current vs TemperatureSoft-Start Up (Figure 13)Load Step (Figure 13)Load Step (Figure 13)LOAD CURRENT (A)0N O R M A L I Z E D V O U T (%)–0.2–0.143707 G13–0.3–0.412350.0V RUN/SS (V)V I T H (V )0.51.01.52.02.512343707 G1456V SENSE COMMON MODE VOLTAGE (V)0I S E N S E (μA )3707 G15–50–10024501006TEMPERATURE (°C)–50–2570V S E N S E (m V )7480050753707 G1772787625100125OUTPUT CURRENT (A)00D R O P O U T V O L T A GE (V )12340.51.0 1.52.03707 G182.53.0 3.54.0TEMPERATURE (°C)–50–250R U N /S S C U R R E N T (μA )0.20.60.81.075100501.83707 G250.40251251.21.41.6V IN = 15V VOUT = 5V5ms/DIV3707 G19V RUN/SS 5V/DIVV OUT 5V/DIV I OUT 2A/DIVV IN = 15VVOUT = 5VLOAD STEP = 0A TO 3A Burst Mode OPERATION20μs/DIV 3707 G20V OUT 200mV/DIVI OUT 2A/DIV V IN = 15VV OUT = 5VLOAD STEP = 0A TO 3A CONTINUOUS OPERATION20μs/DIV 3707 G21V OUT 200mV/DIVI OUT 2A/DIVLTC370773707fbTYPICAL PERFORMANCE CHARACTERISTICSInput Source/CapacitorInstantaneous Current (Figure 13)Burst Mode Operation (Figure 13)Constant Frequency (Burst Inhibit) Operation (Figure 13)Current Sense Pin Input Current vs TemperatureEXTV CC Switch Resistance vs TemperatureOscillator Frequency vs TemperatureUndervoltage Lockout vs TemperatureShutdown Latch Thresholds vs TemperatureTEMPERATURE (°C)–50–2525C U R R E N T S E N S E I N P U T C U R R E N T (μA )2935050753707 G2627333125100125TEMPERATURE (°C)–50–250E X T V C C S W I T C H R E S I S T A N C E (Ω)410050753707 G2728625100125TEMPERATURE (°C)–5020025035025753707 G28150100–255010012550300F R E Q U E N C Y (k H z )TEMPERATURE (°C)–50U N D E R V O L T A G E L O C K O U T (V )3.403.453.5025753707 G293.353.30–25501001253.253.20TEMPERATURE (°C)–50–250S H U T D O W N L A T C H T H R E S H O L D S (V )0.51.52.02.575100504.53707 G301.00251253.03.54.0V IN = 15VV OUT = 5VI OUT5 = I OUT3.3 = 2A1μs/DIV 3707 G22V IN200mV/DIV IIN 2A/DIV V SW210V/DIVV SW110V/DIVV IN = 15V V OUT = 5V V FCB = OPEN I OUT = 20mA10μs/DIV3707 G23I OUT 0.5A/DIVV OUT 20mV/DIVV IN = 15V V OUT = 5V V FCB = 5V I OUT = 20mA2μs/DIV3707 G24I OUT 0.5A/DIVV OUT 20mV/DIVLTC370783707fbP IN FUNCTIONS RUN/SS1, RUN/SS2 (Pins 1, 15): Combination of soft-start, run control inputs and short-circuit detection timers. A capacitor to ground at each of these pins sets the ramp time to full output current. Forcing either of these pins back below 1.0V causes the IC to shut down the circuitry required for that particular controller . Latchoff overcurrent protection is also invoked via this pin as described in the Applications Information section.SENSE1+, SENSE2+ (Pins 2, 14): The (+) Input to the Differential Current Comparators. The I TH pin voltage and controlled offsets between the SENSE – and SENSE + pins in conjunction with R SENSE set the current trip threshold.SENSE1–, SENSE2– (Pins 3, 13): The (–) Input to the Differential Current Comparators.V OSENSE1, V OSENSE2 (Pins 4, 12): Receives the remotely-sensed feedback voltage for each controller from an external resistive divider across the output.FREQSET (Pin 5): Frequency Control Input to the Oscillator . This pin can be left open, tied to ground, tied to INTV CC or driven by an external voltage source. This pin can also be used with an external phase detector to build a true phase-locked loop.STBYMD (Pin 6): Control pin that determines which cir-cuitry remains active when the controllers are shut down and/or provides a common control point to shut down both controllers. See the Operation section for details.FCB (Pin 7): Forced Continuous Control Input. This input acts on both controllers and is normally used to regulate a secondary winding. Pulling this pin below 0.8V will force continuous synchronous operation on both controllers. Do not leave this pin fl oating.I TH1, I TH2 (Pins 8, 11): Error Amplifi er Output and Switching Regulator Compensation Point. Each associated channels’ current comparator trip point increases with this control voltage.SGND (Pin 9): Small Signal Ground common to both controllers, must be routed separately from high current grounds to the common (–) terminals of the C OUT capacitors.3.3V OUT (Pin 10): Output of a linear regulator capable of supplying 10mA DC with peak currents as high as 50mA.PGND (Pin 20): Driver Power Ground. Connects to the sources of bottom (synchronous) N-channel MOSFETs, anodes of the Schottky rectifi ers and the (–) terminal(s) of C IN .INTV CC (Pin 21): Output of the Internal 5V Linear Low Dropout Regulator and the EXTV CC Switch. The driver and control circuits are powered from this voltage source. Must be decoupled to power ground with a minimum of 4.7μF tantalum or other low ESR capacitor . The INTV CC regulator standby function is determined by the STBYMD pin.EXTV CC (Pin 22): External Power Input to an Internal Switch Connected to INTV CC . This switch closes and supplies V CC power , bypassing the internal low dropout regulator , when-ever EXTV CC is higher than 4.7V . See EXTV CC connection in Applications section. Do not exceed 7V on this pin.BG1, BG2 (Pins 23, 19): High Current Gate Drives for Bot-tom (Synchronous) N-Channel MOSFETs. Voltage swing at these pins is from ground to INTV CC .V IN (Pin 24): Main Supply Pin. A bypass capacitor should be tied between this pin and the signal ground pin.BOOST1, BOOST2 (Pins 25, 18): Bootstrapped Supplies to the Top Side Floating Drivers. Capacitors are connected between the boost and switch pins and Schottky diodes are tied between the boost and INTV CC pins. Voltage swing at the boost pins is from INTV CC to (V IN + INTV CC ).SW1, SW2 (Pins 26, 17): Switch Node Connections to Inductors. Voltage swing at these pins is from a Schottky diode (external) voltage drop below ground to V IN .TG1, TG2 (Pins 27, 16): High Current Gate Drives for Top N-Channel MOSFETs. These are the outputs of fl oat-ing drivers with a voltage swing equal to INTV CC – 0.5V superimposed on the switch node voltage SW .PGOOD (Pin 28): Open-Drain Logic Output. PGOOD is pulled to ground when the voltage on either V OSENSE pin is not within ±7.5% of its set point.LTC370793707fbFUNCTIONAL DIAGRAMOUTFigure 2LTC3707103707fbO PERATION Main Control LoopThe L TC3707 uses a constant frequency, current mode step-down architecture with the two controller channels operating 180 degrees out of phase. During normal operation, each top MOSFET is turned on when the clock for that channel sets the RS latch, and turned off when the main current comparator , I 1, resets the RS latch. The peak inductor current at which I 1 resets the RS latch is controlled by the voltage on the I TH pin, which is the output of each error amplifi er EA. The V OSENSE pin receives the voltage feedback signal, which is compared to the internal reference voltage by the EA. When the load current increases, it causes a slight decrease in V OSENSE relative to the 0.8V reference, which in turn causes the I TH voltage to increase until the average inductor current matches the new load current. After the top MOSFET has turned off, the bottom MOSFET is turned on until either the inductor current starts to reverse, as indicated by current comparator I 2, or the beginning of the next cycle.The top MOSFET drivers are biased from fl oating bootstrap capacitor C B , which normally is recharged during each off cycle through an external diode when the top MOSFET turns off. As V IN decreases to a voltage close to V OUT , the loop may enter dropout and attempt to turn on the top MOSFET continuously. The dropout detector detects this and forces the top MOSFET off for about 500ns every tenth cycle to allow C B to recharge.The main control loop is shut down by pulling the RUN/SS pin low. Releasing RUN/SS allows an internal 1.2μA current source to charge soft-start capacitor C SS . When C SS reaches 1.5V , the main control loop is enabled with the I TH voltage clamped at approximately 30% of its maximum value. As C SS continues to charge, the I TH pin voltage is gradually released allowing normal, full-current operation. When both RUN/SS1 and RUN/SS2 are low, all L TC3707 controller functions are shut down, and the STBYMD pin determines if the standby 5V and 3.3V regulators are kept alive.Low Current OperationThe FCB pin is a multifunction pin providing two functions: 1) an analog input to provide regulation for asecondary winding by temporarily forcing continuous PWM operation on both controllers and 2) a logic input to select between two modes of low current operation. When the FCB pin voltage is below 0.800V , the controller forces continuous PWM current mode operation. In this mode, the top and bottom MOSFETs are alternately turned on to maintain the output voltage independent of direction of inductor current. When the FCB pin is below V INTVCC – 2V but greater than 0.80V , the controller enters Burst Mode operation. Burst Mode operation sets a minimum output current level before inhibiting the top switch and turns off the synchronous MOSFET(s) when the inductor current goes negative. This combination of requirements will, at low currents, force the I TH pin below a voltage threshold that will temporarily inhibit turn-on of both output MOSFETs until the output voltage drops. There is 60mV of hysteresis in the burst comparator B tied to the I TH pin. This hysteresis produces output signals to the MOSFETs that turn them on for several cycles, followed by a variable “sleep” interval depending upon the load current. The resultant output voltage ripple is held to a very small value by having the hysteretic comparator after the error amplifi er gain block.Constant Frequency OperationWhen the FCB pin is tied to INTV CC , Burst Mode operation is disabled and the forced minimum output current requirement is removed. This provides constant frequency, discontinuous (preventing reverse inductor current) current operation over the widest possible output current range. This constant frequency operation is not as effi cient as Burst Mode operation, but does provide a lower noise, constant frequency operating mode down to approximately 1% of designed maximum output current. Voltage should not be applied to the FCB pin prior to the application of voltage to the V IN pin.Continuous Current (PWM) OperationTying the FCB pin to ground will force continuous current operation. This is the least effi cient operating mode, but may be desirable in certain applications. The output can source or sink current in this mode. When sinking current while in forced continuous operation, current will(Refer to Functional Diagram)OPERATIONbe forced back into the main power supply potentially boosting the input supply to dangerous voltage levels—BEWARE!Frequency SettingThe FREQSET pin provides frequency adjustment of the internal oscillator from approximately 140kHz to 310kHz. This input is nominally biased through an internal resistor to the 1.19V reference, setting the oscillator frequency to approximately 220kHz. This pin can be driven from an ex-ternal AC or DC signal source to control the instantaneous frequency of the oscillator. Voltage should not be applied to the FREQSET pin prior to the application of voltage to the V IN pin.INTV CC/EXTV CC PowerPower for the top and bottom MOSFET drivers and most other internal circuitry is derived from the INTV CC pin. When the EXTV CC pin is left open, an internal 5V low dropout linear regulator supplies INTV CC power. If EXTV CC is taken above 4.7V, the 5V regulator is turned off and an internal switch is turned on connecting EXTV CC to INTV CC. This allows the INTV CC power to be derived from a high effi ciency external source such as the output of the regulator itself or a secondary winding, as described in the Applications Information.Standby Mode PinThe STBYMD pin is a three-state input that controls com-mon circuitry within the IC as follows: When the STBYMD pin is held at ground, both controller RUN/SS pins are pulled to ground providing a single control pin to shut down both controllers. When the pin is left open, the internal RUN/SS currents are enabled to charge the RUN/SS capacitor(s), allowing the turn-on of either controller and activating necessary common internal biasing. When the STBYMD pin is taken above 2V, both internal linear regulators are turned on independent of the state on the RUN/SS pins of the two switching regulator controllers, providing an output power source for “wake-up” circuitry. Decouple the pin with a small capacitor (0.01μF) to ground if the pin is not connected to a DC potential. Output Overvoltage ProtectionAn overvoltage comparator, 0V, guards against transient overshoots (>7.5%) as well as other more serious condi-tions that may overvoltage the output. In this case, the top MOSFET is turned off and the bottom MOSFET is turned on until the overvoltage condition is cleared.Power Good (PGOOD) PinThe PGOOD pin is connected to an open drain of an in-ternal MOSFET. The MOSFET turns on and pulls the pin low when both the outputs are not within ±7.5% of their nominal output levels as determined by their resistive feedback dividers. When both outputs meet the ±7.5% requirement, the MOSFET is turned off within 10μs and the pin is allowed to be pulled up by an external resistor to a source of up to 7V.Foldback Current, Short-Circuit Detectionand Short-Circuit LatchoffThe RUN/SS capacitors are used initially to limit the inrush current of each switching regulator. After the controller has been started and been given adequate time to charge up the output capacitors and provide full load current, the RUN/SS capacitor is used in a short-circuit time-out circuit. If the output voltage falls to less than 70% of its nominal output voltage, the RUN/SS capacitor begins discharging on the assumption that the output is in an overcurrent and/or short-circuit condition. If the condition lasts for a long enough period as determined by the size of the RUN/SS capacitor, the controllers will be shut down until the RUN/SS pin(s) voltage(s) are recycled. This built-in latchoff can be overridden by providing a >5μA pull-up at a compliance of 4.2V to the RUN/SS pin(s). This current shortens the soft start period but also prevents net dis-charge of the RUN/SS capacitor(s) during an overcurrent and/or short-circuit condition. Foldback current limiting is also activated when the output voltage falls below 70% of its nominal level whether or not the short-circuit latchoff circuit is enabled. Even if a short is present and the short-circuit latchoff is not enabled, a safe, low output current is provided due to internal current foldback and actual power dissipated is low due to the effi cient nature of the current mode switching regulator.(Refer to Functional Diagram)。
UNIDRIVE SP 扭曲-解扭解决方案单元快速启动指南说明书
UNIDRIVE SP Winding-unwinding solutionwith cellQuick start commissioning guide2Contents31 - GENERAL INFORMATION....................................................................42 - SM MODULE INSTALLATION...............................................................52.1 - Access to terminal blocks...............................................................52.2 - Module installation..........................................................................53 - CONNECTIONS.....................................................................................63.1 - Power connection...........................................................................63.2 - Encoder connection........................................................................73.3 - Control connection..........................................................................84 - PARAMETER-SETTING......................................................................104.1 - Display and keypad ......................................................................104.2 - Selection and modification of a parameter ...................................114.3 - Access level..................................................................................124.4 - Modification of the operating mode...............................................124.5 - Return to winding/unwinding factory settings ...............................125 - COMMISSIONING................................................................................136 - SMARTCARD.......................................................................................187 - DIAGNOSTICS. (19)456789107 - DIAGNOSTICS• Indications on winding-unwinding (reading parameters only) :• Indications on trip stateIf the drive stops, the output bridge of the drive is inactive and the drive does not control any longer the motor.The upper display indicates " triP " and the lower display indicates the fault type.Note : For the other drive faults, see section K of the commissioning manual that may be set on CD-ROM.Parameter Indication Unit 0.10Measured motor speedmin -10.11Product radius mm 0.12Line speed x 0,1m.min -10.13Coil speed min -10.14Mechanical reduction x 0,010.15Coil radius measurementpointsMnemonic displayEDL faultSolutionth Motor thermal probeThe EDL CEL solution manages the motor thermal probe in standard version.If there is no probe connected, set 0.49 = L2 (1), then 7.15 = Volt (6).If the probe is connected, the motor temperature is too high.t127• Fault on RS485 link •Check the cablingin RTU modbus •Check the drive con figuration, the transmission •A problem occurred speed, the addressing etc…on the signal reception• Terminal block configurationFunction Terminal Source/Dest.DigitalinversionAssignmentUNIDRIVE SP Coil 1 ray measurement 5 and 67.107.0918.08 (0.15) Zero speed248.218.1110.03Drive reset258.228.1210.33Run by pulses268.238.1319.42 Free278.248.14-Reverse Run/Stop288.258.1519.48SM-EDL CEL Forward Run validation10--19.45 Forward Run/Stop11--19.47 Min radius reached12--18.31 Max radius reached13--18.32Notes21Notes 22Notes23MOTEURS LEROY-SOMER 16015 ANGOULÊME CEDEX - FRANCE 338 567 258 RCS ANGOULÊMES.A. au capital de 62 779 000 €。
Control Techniques EF 安装指南：UD70 MD29 第二处理器选项说明书
EFInstallation GuideUD70MD29Second Processor Optionsfor Unidrive and Mentor IIPart Number:0460-0098Issue Number:2Safety InformationThe option card and its associated drive are intended as components for professional incorporation into complete equipment or systems.If installed incorrectly the drive may present a safety hazard.The drive uses high voltages and currents,carries a high level of stored electrical energy,and is used to control mechanical equipment that can cause injury.Close attention is required to the electrical installation and the system design to avoid hazards either in normal operation or in the event of equipment malfunction.System design,installation,commissioning and maintenance must be carried out by personnel who have the necessary training and experience.They must read this safety information and this Installation Guide carefully.Careful consideration must be given to the functions of the drive and option card which might result in a hazard,either through their intended functions,e.g.auto-start,or through incorrect operation due to a fault or trip,e.g.stop/start,forward/reverse,maximum speed, loss of a communications link.In any application where a malfunction of the drive or option card could lead to damage, loss or injury,a risk analysis must be carried out,and where necessary,further measures taken to reduce the risk.To ensure mechanical safety,additional safety devices such as electro-mechanical interlocks may be required.The Drive must not be used in a safety-critical application without additional high-integrity protection against hazards arising from a malfunction.General InformationThe manufacturer accepts no liability for any consequences resulting from inappropriate, negligent or incorrect installation or adjustment of the optional operating parameters of the equipment or from mismatching the Drive with the motor.The contents of this User Guide are believed to be correct at the time of printing.In the interests of a commitment to a policy of continuous development and improvement,the manufacturer reserves the right to change the specification of the product or its performance,or the contents of the User Guide,without notice.All rights reserved.No part of this User Guide may be reproduced or transmitted in any form or by any means,electrical or mechanical including photocopying,recording or by any information storage or retrieval system,without permission in writing from the publisher.Copyright©21/1/02Control Techniques Drives LtdIssue Code:2Hardware:UD70All Issues,MD29Issue3and laterFirmware:N/AContents1Mechanical Installation11.1Unidrive and UD7011.2Mentor II and MD29/MD29AN32Electrical Installation52.1UD7052.2MD2952.3MD29AN62.4RS232Port Connections62.5RS485Port Connections62.6I/O Box Port Connections(MD29Only)82.7Digital I/O Connections83RS485Port Configuration93.1Node Address93.2Data Rate103.3RS485Port Communications Modes103.4Storing configuration parameters12 UD70/MD29Installation GuideIssue Number:1UD70/MD29Installation GuideIssue Number:21Mechanical InstallationBefore attempting to installoption modules or cards,ensure that the Unidrive or Mentor II is switched off.AC Drives should be left for 5minutes to ensure that the DC link capacitors have completely discharged.1.1Unidrive and UD70•Slide the UD70module under the display panel of the Unidrive,and push the module in until the connector locates with the plug inside the Unidrive.•Apply firm pressure,and the module will click securely into place.•To remove the UD70,pull firmly on the black tab,and the module will disengage from the connector.3UD70/MD29Installation GuideIssue Number:21.2Mentor II and MD29/MD29ANThe MD29is fitted onto the 40-way pin header (PL1)on the MDA2B circuit board.The supplied mounting pillars should be attached to the MDA2B on the Mentor II.•Tilt the MD29at an angle and locate the first few pins into the MD29header.•Tilt the board to horizontal to engage the rest of the pins.Press firmly downwards to firmly fix the MD29to the header and4mounting pillars.Take care when locating the board onto this connector-do not force it on. Excessive force may bend and break the pins of the header.When removing an MD29,unsnap the MD29from the pillars before gently working the MD29off the header.Do not tilt the MD29excessively to one side,as this maybend and break the end groups of pins on the header.2Electrical Installation2.1UD70The UD70provides a dedicated RS232programming port(Connector C)and ageneral purpose RS485communications port(Connector D)..Connectors A and B provide the connectors for high speed fieldbus communicationoptions,if fitted.Refer to the appropriate fieldbus option User Guide for full fieldbusconnection details.2.2MD29The MD29provides a dedicated RS232programming port(Connector SK2)and ageneral purpose RS485communications port(Connector PL1).In addition,theMD29also has a dedicated RS485port(Connector TB1)for use with the ControlTechniques I/O Box.5UD70/MD29Installation Guide Issue Number:2UD70/MD29Installation Guide 6Issue Number:22.3MD29ANThe MD29AN provides a dedicated RS232programming port (Connector SK2)and a general purpose RS485communications port (Connector PL1).In addition,the MD29also has a dedicated CTNet port (PL2).2.4RS232Port ConnectionsThe pin connections for the RS232port are given in the table below.The RS232port can be connected to a 9way serial port using a 9-way one-to-one ribbon cable lead.2.5RS485Port ConnectionsThe pin connections for the RS485port are given in the table below 0VSC is completely isolated from the main Unidrive and Mentor II 0V.Pin Function Description 2TxD Transmit line 3RxD Receive line 50V0VPin Function Description10VSC 0VSC Isolated 0V for serial communications link.2TxA /Tx Inverted transmit line 3RxA /Rx Inverted transmit line 6TxB Tx Transmit line 7RxBRxReceive line7UD70/MD29Installation GuideIssue Number:22.5.14Wire RS485NetworkThe diagram below shows the connections required for a 4wire RS485network,using a master controller with an RS485port.The UD70and MD29can be configured to act as master controllers,but this requires DPL programming to control the network.An RS232-to-RS485converter is required to allow a standard PC serial port to communicate with a 4wire RS485network.2.5.22Wire RS485NetworkThe diagram below shows the connections required for a 2wire RS485network,using a master controller with an RS485port.The UD70and MD29can be configured to act as master controllers,but this requires DPL programming to control the network.An RS232-to-RS485converter with “intelligent transceiver switching”(also known as “magic”RS485converters)is required to allow a standard PC serial port to communicate with a 2wire RS485network.An example of a “magic”converter is the MA485F converter from Amplicon.A “magic”converter is not required is the master contoller has an RTS control output.This output is enabled when the master is transmitting,and disabled when the master is not transmitting.Control Techniques software packages (UniSoft,MentorSoft and SystemWise)do NOT switch the RTS line.2.6I/O Box Port Connections(MD29Only)The I/O Box port is marked“PL2”and is only available on the MD29.The terminalconnections are shown in the table below.Operation of this port is automatic,andno configuration is necessary.Pin Function Description10V0V0V2TxB Tx Transmit line3/TxA/Tx Inverted Transmit line4RxB Rx Receive line5/RxA/Rx Inverted Receive lineTo use the I/O Box with UD70or MD29AN,connect it to the RS485port,andselect Mode10communications.2.7Digital I/O ConnectionsThe RS485connector has2TTL digital inputs and1TTL digital output.They areused in conjunction with the Timer/Counter unit.(For further details,refer to theUser guide for the UD70or MD29.)The0VSC is isolated from the Unidrive or Mentor II0V,and should not be usedas the reference0V for the TTL digital inputs and output.If a digital input is open-circuit or connected to+5V,this will be read by#86.01(input0)or#86.02(input1)as logic0.These parameters will change to logic1when the inputs are connected to0V Digital on pin9.The digital output will give+5V when#86.03is set to logic0,and0V when set tologic1.The digital output is rated to a maximum of15mA.The maximum length ofcable that should be connected to these terminals is0.5metres,so buffering will berequired for longer lengths of cable,and for interfacing to different logic levels.The Digital inputs and output must be connected to0V Digital(pin9),NOTOVSC(pin1).The inputs and output will not work properly if connected toOVSC,as pin1is isolated from the Drive.Noise generated along the screenof the serial communications cable may cause spurious operation,anddamage to the UD70or MD29may result.3RS485Port ConfigurationThe RS485port can be used to communicate with the Drive using Control Techniques'standard software communications packages such as UniSoft,MentorSoft,CTFile and Systemwise.(Refer to the Help file in Unisoft,MentorSoft,etc.for connection details.)The ANSI protocol is the standard protocol used by the Control Techniques'software packages,but Modbus RTU and ASCII modes are also supported as slave nodes only.The RS485port is configured by setting certain user parameters on the Unidrive or Mentor II.These control individual features about the port.Any changes take effect when the configuration parameters are stored and the UD70or MD29is reset.The following parameters used to configure the RS485port.3.1Node AddressUnidrive:#17.05Mentor II:#14.01Range:11to 99,excluding 00to 09,10,20,30,40,etc for ANSI.1to 99for Modbus RTU and Modbus ASCIIDefault:11Every node on an ANSI or Modbus network MUST be assigned a unique serial address.Changes to the node address will not take effect until the parameters have been stored,and the UD70or MD29has been reset.The serial address ensures that only the intended node responds to commands issued by the network master controller.Each node should be assigned a unique address BEFORE it is connected to the RS485network.Function Unidrive (UD70)Mentor II (MD29/MD29AN)Node Address #17.05#14.01Data Rate#17.07#14.03Serial Comms Mode #17.06#14.02Pointer 1#17.08#11.09Pointer 2#17.09#11.10Scaling Factor #17.10#11.11Global Trip Enable #17.14#14.07RS485Trip Enable#17.15#14.083.2Data RateUnidrive:#17.07Mentor II:#14.03Range:300to 38400bits per second Default:4800Every node on an ANSI or Modbus network must be configured to operate at the same data rate.Set the appropraite value as shown in the table below to configure the RS485port data rate.3.3RS485Port Communications ModesUnidrive:#17.06Mentor II:#14.02The serial communications mode selector determines the mode of operation of the RS485serial port,and the protocol supported.Only slave modes are described here.(Modes 6to 9,11and 12require DPL code to control the RS485.)3.3.1Standard CT ANSI ProtocolMode 1-4Wire ANSI Slave Mode (Default)Mode 5-2Wire ANSI Slave ModeThe UD70and MD29will communicate using the Control Techniques'standard ANSI protocol with a 4-wire or 2-wire connection.This mode allows the Unidrive or Mentor II to communicate with standard CT software packages,such as UniSoft,MentorSoft,SystemWise,etc.Menu 0parameters are not accessible through a UD70or MD29.Refer to the User's Guide for MD29or UD70for a detailed description of the ANSI protocol.3.3.2Modbus RTUMode 13-4Wire Modbus RTU Slave Mode Mode 15-2Wire Modbus RTU Slave ModeThe UD70and MD29will communicate using the Modicon Modbus RTU protocol with a 4-wire or 2-wire connection.The data frame used for Modbus RTU is 1start bit,8data bits,no parity,2stop bits.(Even parity with 1stop bit is NOT currently supported.)The following MOdbus RTU commands are supported:FC3PRESET SINGLE REGISTER FC6PRESET MULTIPLE REGISTERS FC16READ MULTIPLE REGISTERSThe maximum number of registers that can be transferred on a single message is limited to 20,and the range of allowed node addresses is limited from 1to 99.Data Rate (bits/sec)Unidrive Mentor II30030036006006120012001224002400244800480048960096009619200192001923840038400383.3.3Modbus ASCIIMode14-4Wire Modbus ASCII Slave ModeMode16-2Wire Modbus ASCII Slave ModeThe UD70and MD29will communicate using the Modicon Modbus ASCII protocolwith a4-wire or2-wire connection.The data frame used for Modbus RTU is1startbit,7data bits,no parity,2stop bits.The following Modbus ASCII commands are supported:FC3PRESET SINGLE REGISTERFC6PRESET MULTIPLE REGISTERSFC16READ MULTIPLE REGISTERSThe maximum number of registers that can be transferred on a single message islimited to20,and the range of allowed node addresses is limited from1to99. 3.3.4Master/SlaveMode2-Master ModeMode3-Slave ModeIn Mode2,the node acts as a master,and continuously broadcasts a sourceparameter,as defined by the Pointer parameter,from the RS485port at a fixeddata rate of9600bits/sec.The value of the source parameter is scaled to±16000.In Mode3,the node acts as a slave to receive the continuous data streamtransmitted by a Mode2master.The incoming data is multiplied by the scalingparameter,and written to the destination parameter,as defined by the Pointerparameter.If the serial communications link is broken,the slave node can be made to trip.Thisis done by setting the Global Trip Enable and RS485Trip Enable parameters.3.3.5CascadeMode4-Cascade ModeMode4provides allows UD70and/or MD29RS485ports to be“cascaded”.Thismode is similar to the Master/Slave mode,except that each node can be a slave toan“upstream”node,AND a master to a“downstream”node.3.3.6I/O Box Mode(UD70and MD29AN only)Mode10-I/O Box ModeUnlike the MD29,the UD70and MD29AN do not have a dedicated port for use withthe I/O Box.The general purpose RS485port can be configured to communicatedirectly with an I/O Box by configuring the RS485port to use Mode10communications.3.4Storing configuration parametersIn all cases,the configuration parameters must be stored,and the UD70or MD29reset before changes will take effect.3.4.1Unidrive•To store changes in menu17parameters,set#MM.00to1000and press the red RESET button.•To reset the UD70,set#MM.00to1070and press the red RESET button.3.4.2Mentor II•Ensure that the Mentor II is disabed•To store changes in menu11and14parameters,set#MM.00to1and press RESET.This will also reset the MD29.。
Windows + Sony DualShock 3 - Instructions说明书
Windows + Sony DualShock 3 InstructionsSony has made it hard to use their controllers on windows computers and the community driver support information can be very difficult to navigate. The following is a list of “easy” steps to ensure that you can use your DualShock 3 controller with droneSim Pro.Step 1:Download the following .zip file that contains all of the files needed to get your DualShock 3 working with droneSim Pro.https:///lassoftwarebuilds/droneSimPro/droneSim_Pro_DS3_Tools .zipStep 2:Unzip the “droneSim_Pro_DS3_Tools.zip” into a folder.Step 3:Open the folder, it should looks something like this:Step 4:Plug in your Playstation 3 Controller with the charge cable. Open up your computer’s “Devices and Printers” window. To do this, click Start > Control Panel > Devices and Printers.Should be similar to this:Step 5:Right click on the button named “PLAYSTATION(R) 3 Controller and select “Properties”.Step 6:Click on the “Hardware” tab near the top of the window. In the center of this tab therewill be a listing for the device. It will be called “USB Input Device”. Select this by clickingon it then click the “Properties” button near the bottom right of this window.Step 7:In the new window that opened you will need to click the “Change settings” button that is near the bottom left.Step 8:Another very similar window will open. In this window click on the “Driver” tab. On the driver tab click the button labeled “Update Driver…”.Step 9:Select “Browse my computer for driver software”Step 10:Click “Let me pick from a list of device drivers on my computer”Step 11:Click on the “Have Disk…” button.Step 12:Click “Browse…” near the bottom right.Step 13:Navigate to the folder where you unzipped “droneSim_Pro_DS3_Tools” you will have two folders here(x64 and x86). If your computer has a 64bit operating system you should use the x64 folder and driver. If you have 32bit you should use the x86 folderand driver.NOTE: If you are not sure you can check by right clicking on “Computer” and selecting “Properties”. Near the middle it will say what type you have.Step 14:In the folder select the “MijXinput” file and press open. Then press “OK”.Step 15:The driver will be listed as “MotionJoy Virtual Xinput device for Windows”. Click “Next”Step 16:You may get a popup based on your computer’s security settings. The driver we have included is safe to use and has been scanned for viruses. Press “Install this driver anyway”.After a bit your controller will be updated with the new driver.Step 17:In the “droneSim_Pro_DS3_Tools” folder, run the file “Better DS3”. You will get this window:Step 18:You can make your own mappings using the “New” button, this is outside the scope of this guide. We have included the default mappings needed for droneSim Pro. You can close “Better DS3” for the moment so we can load the mappings.Step 19:In your operating system navigate to:“C:\Users\<user name here>\AppData\Local\BetterDS3”Step 20:Copy the file “droneSim Pro.ds3profile” into the “BetterDS3” folder as shown below.Step 21:Run “Better DS3” again and select the profile for droneSim Pro. It is called “droneSim Pro Master”. Then press “Apply”.Congratulations! You should now be able to launch droneSim Pro and use your ps3controller to navigate the menus and fly the drone.。
西门子技术问题总汇
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如何设置模拟量输入模板 SM 431-7KF00的温度补偿？ 如何解决 SIMATIC BATCH 的 IL43基本设备上 hotfix 安装的问题？ 如果通过 PCS7 V6.1 SP1 DVD 单独安装 SIMATIC BATCH Report 需要注意哪些设置？ 为什么冗余模拟量输出模块的每个通道只有一半电流输出？ 使用WinCC/Web Navigator V6.1 SP1需要什么样的操作系统和软件？ 是否 COM PROFIBUS 可以使用所有版本的 GSD 文件？ 如何在 WinCC flexible 中组态与S7 控制器的 Profinet 连接? 如何在操作面板上设定定时器时间， 同时如何输出定时器的剩余时间？ 数据块初始值与实际值的含义 如何通过窗口对象滚动条步进调节过程值参数？ 使用 SINAUT ST7 向电子邮箱接受方发送文本信息 SMS 需要做何设置？ 可以使用CPU317-2PN/DP替代在iMap中组态的CPU315-2PN/DP吗? 什么情况下插入C-PLUG卡或者C-PLUG有什么作用? 通过一台PC，可以使用哪种方式访问与IWLAN/PB link PNIO或IE/PB link PNIO连接的PROFIBUS设备? 当在SINAUT网络中使用4线变压器应该注意哪些设置？ 在 SINAUT 网络中，使用MD3拨号调制解调器作为专线调制解调器时，要进行哪些设置？ 如何安装 DCF77 天线, 当选择 DCF77 天线时需要注意什么？ 使用SINAUT ST7向传真机发送文本信息时，需要进行哪些设置？ 在 SINAUT 项目中发送短消息必须进行哪些特殊服务的设置? 如何在S7-300 PN CPU和CP343-1之间建立一个open TCP 通讯连接，以及如何进行数据交换？ 如何在两个S7-300 PN CPU之间建立一个open TCP 通讯连接，以及如何进行数据交换？ 哪些控制系统可以成功与SINAUT ST7一起使用? 使用“零－Modem”电缆连接 TIM 模块应该注意什么？ 当用 SINAUT 诊断工具的ST1协议进行诊断时，为什么TIM的状态不能显示？ TIM 3V-IE 和 TIM 3V-IE Advanced 模块在以太网上通信时使用哪个端口号？ 如何对没有接入网络的S7-200CPU编程？ 掉电后，LOGO！的程序会丢失吗？ 从 PCS7 V6.1 起，为什么没有分配任何 hierarchy (PH) 的 测量点(变量)通过编译不能在OS中自动创建相应的变量？ 在SFC中，如何实现从一个 Sequencer 跳出后回到另一个 Sequencer 的某个固定位置并继续执行？ 如何实现过程变量的平均值归档？ 存储文件的目标路径和备份可选路径有何作用？ WinCC变量归档中如何实现采集周期小于500ms的变量归档？ 为什么在 OS 上会显示如下信息“时间跳变通知－永久切换为从站模式”? 在西门子A&D产品支持网站是否可以下载关于ET200M的手册？ 在S7-400上怎样安装冗余电源？ UDT改变后怎样更新使用UDT产生的数据块。 为什么在FB块中使用OUT变量赋值被调用FB块的IN变量时出现错误信息34：4469？ 如何查看4-mation导入-导出错误 不能正确引导8212-1QU IBM/Lenovo M52 ThinkCentre 实时趋势更新缓慢的原因 如何保存变量名字典CSV文件的格式
Indradrive 系列 故障代码
Error MessagesF9001 Error internal function call.F9002 Error internal RTOS function callF9003 WatchdogF9004 Hardware trapF8000 Fatal hardware errorF8010 Autom. commutation: Max. motion range when moving back F8011 Commutation offset could not be determinedF8012 Autom. commutation: Max. motion rangeF8013 Automatic commutation: Current too lowF8014 Automatic commutation: OvercurrentF8015 Automatic commutation: TimeoutF8016 Automatic commutation: Iteration without resultF8017 Automatic commutation: Incorrect commutation adjustment F8018 Device overtemperature shutdownF8022 Enc. 1: Enc. signals incorr. (can be cleared in ph. 2) F8023 Error mechanical link of encoder or motor connectionF8025 Overvoltage in power sectionF8027 Safe torque off while drive enabledF8028 Overcurrent in power sectionF8030 Safe stop 1 while drive enabledF8042 Encoder 2 error: Signal amplitude incorrectF8057 Device overload shutdownF8060 Overcurrent in power sectionF8064 Interruption of motor phaseF8067 Synchronization PWM-Timer wrongF8069 +/-15Volt DC errorF8070 +24Volt DC errorF8076 Error in error angle loopF8078 Speed loop error.F8079 Velocity limit value exceededF8091 Power section defectiveF8100 Error when initializing the parameter handlingF8102 Error when initializing power sectionF8118 Invalid power section/firmware combinationF8120 Invalid control section/firmware combinationF8122 Control section defectiveF8129 Incorrect optional module firmwareF8130 Firmware of option 2 of safety technology defectiveF8133 Error when checking interrupting circuitsF8134 SBS: Fatal errorF8135 SMD: Velocity exceededF8140 Fatal CCD error.F8201 Safety command for basic initialization incorrectF8203 Safety technology configuration parameter invalidF8813 Connection error mains chokeF8830 Power section errorF8838 Overcurrent external braking resistorF7010 Safely-limited increment exceededF7011 Safely-monitored position, exceeded in pos. DirectionF7012 Safely-monitored position, exceeded in neg. DirectionF7013 Safely-limited speed exceededF7020 Safe maximum speed exceededF7021 Safely-limited position exceededF7030 Position window Safe stop 2 exceededF7031 Incorrect direction of motionF7040 Validation error parameterized - effective thresholdF7041 Actual position value validation errorF7042 Validation error of safe operation modeF7043 Error of output stage interlockF7050 Time for stopping process exceeded8.3.15 F7051 Safely-monitored deceleration exceeded (159)8.4 Travel Range Errors (F6xxx) (161)8.4.1 Behavior in the Case of Travel Range Errors (161)8.4.2 F6010 PLC Runtime Error (162)8.4.3 F6024 Maximum braking time exceeded (163)8.4.4 F6028 Position limit value exceeded (overflow) (164)8.4.5 F6029 Positive position limit exceeded (164)8.4.6 F6030 Negative position limit exceeded (165)8.4.7 F6034 Emergency-Stop (166)8.4.8 F6042 Both travel range limit switches activated (167)8.4.9 F6043 Positive travel range limit switch activated (167)8.4.10 F6044 Negative travel range limit switch activated (168)8.4.11 F6140 CCD slave error (emergency halt) (169)8.5 Interface Errors (F4xxx) (169)8.5.1 Behavior in the Case of Interface Errors (169)8.5.2 F4001 Sync telegram failure (170)8.5.3 F4002 RTD telegram failure (171)8.5.4 F4003 Invalid communication phase shutdown (172)8.5.5 F4004 Error during phase progression (172)8.5.6 F4005 Error during phase regression (173)8.5.7 F4006 Phase switching without ready signal (173)8.5.8 F4009 Bus failure (173)8.5.9 F4012 Incorrect I/O length (175)8.5.10 F4016 PLC double real-time channel failure (176)8.5.11 F4017 S-III: Incorrect sequence during phase switch (176)8.5.12 F4034 Emergency-Stop (177)8.5.13 F4140 CCD communication error (178)8.6 Non-Fatal Safety Technology Errors (F3xxx) (178)8.6.1 Behavior in the Case of Non-Fatal Safety Technology Errors (178)8.6.2 F3111 Refer. missing when selecting safety related end pos (179)8.6.3 F3112 Safe reference missing (179)8.6.4 F3115 Brake check time interval exceeded (181)Troubleshooting Guide | Rexroth IndraDrive Electric Drivesand ControlsI Bosch Rexroth AG VII/XXIITable of ContentsPage8.6.5 F3116 Nominal load torque of holding system exceeded (182)8.6.6 F3117 Actual position values validation error (182)8.6.7 F3122 SBS: System error (183)8.6.8 F3123 SBS: Brake check missing (184)8.6.9 F3130 Error when checking input signals (185)8.6.10 F3131 Error when checking acknowledgment signal (185)8.6.11 F3132 Error when checking diagnostic output signal (186)8.6.12 F3133 Error when checking interrupting circuits (187)8.6.13 F3134 Dynamization time interval incorrect (188)8.6.14 F3135 Dynamization pulse width incorrect (189)8.6.15 F3140 Safety parameters validation error (192)8.6.16 F3141 Selection validation error (192)8.6.17 F3142 Activation time of enabling control exceeded (193)8.6.18 F3143 Safety command for clearing errors incorrect (194)8.6.19 F3144 Incorrect safety configuration (195)8.6.20 F3145 Error when unlocking the safety door (196)8.6.21 F3146 System error channel 2 (197)8.6.22 F3147 System error channel 1 (198)8.6.23 F3150 Safety command for system start incorrect (199)8.6.24 F3151 Safety command for system halt incorrect (200)8.6.25 F3152 Incorrect backup of safety technology data (201)8.6.26 F3160 Communication error of safe communication (202)8.7 Non-Fatal Errors (F2xxx) (202)8.7.1 Behavior in the Case of Non-Fatal Errors (202)8.7.2 F2002 Encoder assignment not allowed for synchronization (203)8.7.3 F2003 Motion step skipped (203)8.7.4 F2004 Error in MotionProfile (204)8.7.5 F2005 Cam table invalid (205)8.7.6 F2006 MMC was removed (206)8.7.7 F2007 Switching to non-initialized operation mode (206)8.7.8 F2008 RL The motor type has changed (207)8.7.9 F2009 PL Load parameter default values (208)8.7.10 F2010 Error when initializing digital I/O (-> S-0-0423) (209)8.7.11 F2011 PLC - Error no. 1 (210)8.7.12 F2012 PLC - Error no. 2 (210)8.7.13 F2013 PLC - Error no. 3 (211)8.7.14 F2014 PLC - Error no. 4 (211)8.7.15 F2018 Device overtemperature shutdown (211)8.7.16 F2019 Motor overtemperature shutdown (212)8.7.17 F2021 Motor temperature monitor defective (213)8.7.18 F2022 Device temperature monitor defective (214)8.7.19 F2025 Drive not ready for control (214)8.7.20 F2026 Undervoltage in power section (215)8.7.21 F2027 Excessive oscillation in DC bus (216)8.7.22 F2028 Excessive deviation (216)8.7.23 F2031 Encoder 1 error: Signal amplitude incorrect (217)VIII/XXII Bosch Rexroth AG | Electric Drivesand ControlsRexroth IndraDrive | Troubleshooting GuideTable of ContentsPage8.7.24 F2032 Validation error during commutation fine adjustment (217)8.7.25 F2033 External power supply X10 error (218)8.7.26 F2036 Excessive position feedback difference (219)8.7.27 F2037 Excessive position command difference (220)8.7.28 F2039 Maximum acceleration exceeded (220)8.7.29 F2040 Device overtemperature 2 shutdown (221)8.7.30 F2042 Encoder 2: Encoder signals incorrect (222)8.7.31 F2043 Measuring encoder: Encoder signals incorrect (222)8.7.32 F2044 External power supply X15 error (223)8.7.33 F2048 Low battery voltage (224)8.7.34 F2050 Overflow of target position preset memory (225)8.7.35 F2051 No sequential block in target position preset memory (225)8.7.36 F2053 Incr. encoder emulator: Pulse frequency too high (226)8.7.37 F2054 Incr. encoder emulator: Hardware error (226)8.7.38 F2055 External power supply dig. I/O error (227)8.7.39 F2057 Target position out of travel range (227)8.7.40 F2058 Internal overflow by positioning input (228)8.7.41 F2059 Incorrect command value direction when positioning (229)8.7.42 F2063 Internal overflow master axis generator (230)8.7.43 F2064 Incorrect cmd value direction master axis generator (230)8.7.44 F2067 Synchronization to master communication incorrect (231)8.7.45 F2068 Brake error (231)8.7.46 F2069 Error when releasing the motor holding brake (232)8.7.47 F2074 Actual pos. value 1 outside absolute encoder window (232)8.7.48 F2075 Actual pos. value 2 outside absolute encoder window (233)8.7.49 F2076 Actual pos. value 3 outside absolute encoder window (234)8.7.50 F2077 Current measurement trim wrong (235)8.7.51 F2086 Error supply module (236)8.7.52 F2087 Module group communication error (236)8.7.53 F2100 Incorrect access to command value memory (237)8.7.54 F2101 It was impossible to address MMC (237)8.7.55 F2102 It was impossible to address I2C memory (238)8.7.56 F2103 It was impossible to address EnDat memory (238)8.7.57 F2104 Commutation offset invalid (239)8.7.58 F2105 It was impossible to address Hiperface memory (239)8.7.59 F2110 Error in non-cyclical data communic. of power section (240)8.7.60 F2120 MMC: Defective or missing, replace (240)8.7.61 F2121 MMC: Incorrect data or file, create correctly (241)8.7.62 F2122 MMC: Incorrect IBF file, correct it (241)8.7.63 F2123 Retain data backup impossible (242)8.7.64 F2124 MMC: Saving too slowly, replace (243)8.7.65 F2130 Error comfort control panel (243)8.7.66 F2140 CCD slave error (243)8.7.67 F2150 MLD motion function block error (244)8.7.68 F2174 Loss of motor encoder reference (244)8.7.69 F2175 Loss of optional encoder reference (245)Troubleshooting Guide | Rexroth IndraDrive Electric Drivesand Controls| Bosch Rexroth AG IX/XXIITable of ContentsPage8.7.70 F2176 Loss of measuring encoder reference (246)8.7.71 F2177 Modulo limitation error of motor encoder (246)8.7.72 F2178 Modulo limitation error of optional encoder (247)8.7.73 F2179 Modulo limitation error of measuring encoder (247)8.7.74 F2190 Incorrect Ethernet configuration (248)8.7.75 F2260 Command current limit shutoff (249)8.7.76 F2270 Analog input 1 or 2, wire break (249)8.7.77 F2802 PLL is not synchronized (250)8.7.78 F2814 Undervoltage in mains (250)8.7.79 F2815 Overvoltage in mains (251)8.7.80 F2816 Softstart fault power supply unit (251)8.7.81 F2817 Overvoltage in power section (251)8.7.82 F2818 Phase failure (252)8.7.83 F2819 Mains failure (253)8.7.84 F2820 Braking resistor overload (253)8.7.85 F2821 Error in control of braking resistor (254)8.7.86 F2825 Switch-on threshold braking resistor too low (255)8.7.87 F2833 Ground fault in motor line (255)8.7.88 F2834 Contactor control error (256)8.7.89 F2835 Mains contactor wiring error (256)8.7.90 F2836 DC bus balancing monitor error (257)8.7.91 F2837 Contactor monitoring error (257)8.7.92 F2840 Error supply shutdown (257)8.7.93 F2860 Overcurrent in mains-side power section (258)8.7.94 F2890 Invalid device code (259)8.7.95 F2891 Incorrect interrupt timing (259)8.7.96 F2892 Hardware variant not supported (259)8.8 SERCOS Error Codes / Error Messages of Serial Communication (259)9 Warnings (Exxxx) (263)9.1 Fatal Warnings (E8xxx) (263)9.1.1 Behavior in the Case of Fatal Warnings (263)9.1.2 E8025 Overvoltage in power section (263)9.1.3 E8026 Undervoltage in power section (264)9.1.4 E8027 Safe torque off while drive enabled (265)9.1.5 E8028 Overcurrent in power section (265)9.1.6 E8029 Positive position limit exceeded (266)9.1.7 E8030 Negative position limit exceeded (267)9.1.8 E8034 Emergency-Stop (268)9.1.9 E8040 Torque/force actual value limit active (268)9.1.10 E8041 Current limit active (269)9.1.11 E8042 Both travel range limit switches activated (269)9.1.12 E8043 Positive travel range limit switch activated (270)9.1.13 E8044 Negative travel range limit switch activated (271)9.1.14 E8055 Motor overload, current limit active (271)9.1.15 E8057 Device overload, current limit active (272)X/XXII Bosch Rexroth AG | Electric Drivesand ControlsRexroth IndraDrive | Troubleshooting GuideTable of ContentsPage9.1.16 E8058 Drive system not ready for operation (273)9.1.17 E8260 Torque/force command value limit active (273)9.1.18 E8802 PLL is not synchronized (274)9.1.19 E8814 Undervoltage in mains (275)9.1.20 E8815 Overvoltage in mains (275)9.1.21 E8818 Phase failure (276)9.1.22 E8819 Mains failure (276)9.2 Warnings of Category E4xxx (277)9.2.1 E4001 Double MST failure shutdown (277)9.2.2 E4002 Double MDT failure shutdown (278)9.2.3 E4005 No command value input via master communication (279)9.2.4 E4007 SERCOS III: Consumer connection failed (280)9.2.5 E4008 Invalid addressing command value data container A (280)9.2.6 E4009 Invalid addressing actual value data container A (281)9.2.7 E4010 Slave not scanned or address 0 (281)9.2.8 E4012 Maximum number of CCD slaves exceeded (282)9.2.9 E4013 Incorrect CCD addressing (282)9.2.10 E4014 Incorrect phase switch of CCD slaves (283)9.3 Possible Warnings When Operating Safety Technology (E3xxx) (283)9.3.1 Behavior in Case a Safety Technology Warning Occurs (283)9.3.2 E3100 Error when checking input signals (284)9.3.3 E3101 Error when checking acknowledgment signal (284)9.3.4 E3102 Actual position values validation error (285)9.3.5 E3103 Dynamization failed (285)9.3.6 E3104 Safety parameters validation error (286)9.3.7 E3105 Validation error of safe operation mode (286)9.3.8 E3106 System error safety technology (287)9.3.9 E3107 Safe reference missing (287)9.3.10 E3108 Safely-monitored deceleration exceeded (288)9.3.11 E3110 Time interval of forced dynamization exceeded (289)9.3.12 E3115 Prewarning, end of brake check time interval (289)9.3.13 E3116 Nominal load torque of holding system reached (290)9.4 Non-Fatal Warnings (E2xxx) (290)9.4.1 Behavior in Case a Non-Fatal Warning Occurs (290)9.4.2 E2010 Position control with encoder 2 not possible (291)9.4.3 E2011 PLC - Warning no. 1 (291)9.4.4 E2012 PLC - Warning no. 2 (291)9.4.5 E2013 PLC - Warning no. 3 (292)9.4.6 E2014 PLC - Warning no. 4 (292)9.4.7 E2021 Motor temperature outside of measuring range (292)9.4.8 E2026 Undervoltage in power section (293)9.4.9 E2040 Device overtemperature 2 prewarning (294)9.4.10 E2047 Interpolation velocity = 0 (294)9.4.11 E2048 Interpolation acceleration = 0 (295)9.4.12 E2049 Positioning velocity >= limit value (296)9.4.13 E2050 Device overtemp. Prewarning (297)Troubleshooting Guide | Rexroth IndraDrive Electric Drivesand Controls| Bosch Rexroth AG XI/XXIITable of ContentsPage9.4.14 E2051 Motor overtemp. prewarning (298)9.4.15 E2053 Target position out of travel range (298)9.4.16 E2054 Not homed (300)9.4.17 E2055 Feedrate override S-0-0108 = 0 (300)9.4.18 E2056 Torque limit = 0 (301)9.4.19 E2058 Selected positioning block has not been programmed (302)9.4.20 E2059 Velocity command value limit active (302)9.4.21 E2061 Device overload prewarning (303)9.4.22 E2063 Velocity command value > limit value (304)9.4.23 E2064 Target position out of num. range (304)9.4.24 E2069 Holding brake torque too low (305)9.4.25 E2070 Acceleration limit active (306)9.4.26 E2074 Encoder 1: Encoder signals disturbed (306)9.4.27 E2075 Encoder 2: Encoder signals disturbed (307)9.4.28 E2076 Measuring encoder: Encoder signals disturbed (308)9.4.29 E2077 Absolute encoder monitoring, motor encoder (encoder alarm) (308)9.4.30 E2078 Absolute encoder monitoring, opt. encoder (encoder alarm) (309)9.4.31 E2079 Absolute enc. monitoring, measuring encoder (encoder alarm) (309)9.4.32 E2086 Prewarning supply module overload (310)9.4.33 E2092 Internal synchronization defective (310)9.4.34 E2100 Positioning velocity of master axis generator too high (311)9.4.35 E2101 Acceleration of master axis generator is zero (312)9.4.36 E2140 CCD error at node (312)9.4.37 E2270 Analog input 1 or 2, wire break (312)9.4.38 E2802 HW control of braking resistor (313)9.4.39 E2810 Drive system not ready for operation (314)9.4.40 E2814 Undervoltage in mains (314)9.4.41 E2816 Undervoltage in power section (314)9.4.42 E2818 Phase failure (315)9.4.43 E2819 Mains failure (315)9.4.44 E2820 Braking resistor overload prewarning (316)9.4.45 E2829 Not ready for power on (316)。
Delta Controller ASCII RTU 说明书
系列人机与各厂牌连线说明Delta Controller ASCII/RTU（适用台达变频器、伺服驱动器、PLC、温度控制器）人机默认值通讯速率：9600, 7, None, 2 (ASCII); 9600, 8, None, 2 (RTU)控制器站号：1控制区/状态区：None/None控制器接线的说明Delta Servoa. RS-232（DOP-A/AE/AS, DOP-B系列适用）b. RS-422（DOP-A/AE系列适用）系列人机与各厂牌连线说明c. RS-422（DOP-AS35/AS38/AS57系列适用）e. RS-485（DOP-A/AE系列适用）系列人机与各厂牌连线说明g. RS-485（DOP-AS35/AS38系列适用）h. RS-485（DOP-B系列适用）系列人机与各厂牌连线说明Delta 变频器a. RS-485（DOP-A/AE系列适用）系列人机与各厂牌连线说明Temperature Controllera. RS-485（DOP-A/AE系列适用）系列人机与各厂牌连线说明d. RS-485（DOP-B机种适用）控制器 Read/Write 地址的定义a.寄存器符号格式寄存器种类Word No.(n)读写地址范围数据长度注伺服通讯地址SERVO-n SERVO-0 – SERVO-FFFF Word 16进位变频器通讯地址INVERTER-n INVERTER-0 –INVERTER-FFFFWord 16进位温控器通讯地址TEMP_CTRL-n TEMP_CTRL-0 –TEMP_CTRL-6000Word 16进位PLC通讯地址X PLC_X n PLC_X0 – PLC_X360 Word 8进位, 1 PLC通讯地址Y PLC_Y n PLC_Y0 – PLC_Y360 Word 8进位, 1PLC通讯地址M PLC_M n PLC_M0 – PLC_M1520,PLC_M1536 – PLC_M4080Word 1PLC通讯地址S PLC_S n PLC_S0 – PLC_S1008 Word 1PLC通讯地址T PLC_T n PLC_T0 – PLC_T255Word PLC通讯地址C PLC_C n PLC_C0 – PLC_C199 Word PLC通讯地址D PLC_D n PLC_D0 – PLC_D9999 Word PLC通讯地址HC PLC_HC n PLC_HC200 – PLC_HC255Double Word系列人机与各厂牌连线说明符号格式寄存器种类读写地址范围数据长度注Word No.(n)PLC通讯地址Module PLC_Module n PLC_Module4000 –PLC_Module4499Word 16进位Output Registers RW-n RW-0 – RW-FFFF Word16进位Input Registers R-n R-0 – R-FFFF Word16进位Output Registers W n W40001 – W50000 WordInput Registers W n W30001 – W40000 Wordb.接点符号格式接点种类Word No.(n)；Bits No.(b)读写地址范围注伺服通讯地址SERVO-n.b SERVO-0.0 – SERVO-FFFF.F 16进位变频器通讯地址INVERTER-n.b INVERTER-0.0 – INVERTER-FFFF.F 16进位温控器通讯地址TEMP_CTRL-n.b TEMP_CTRL-0.0 –TEMP_CTRL-6000.F16进位Servo Digital Input SERVO_DI-b SERVO_DI-1 – SERVO_DI-8 2 Servo Digital Output SERVO_DO-b SERVO_DO-1 – SERVO_DO-52 PLC 通讯地址 X PLC_X b PLC_X0 – PLC_X377 8进位PLC 通讯地址 Y PLC_Y b PLC_Y0 – PLC_Y377 8进位PLC 通讯地址 M PLC_M b PLC_M0 – PLC_M1535, PLC_M1536 – PLC_M4095PLC 通讯地址 S PLC_S b PLC_S0 – PLC_S1023 PLC 通讯地址 T PLC_T b PLC_T0 – PLC_T255 PLC 通讯地址 C PLC_C b PLC_C0 – PLC_C255温控器 Bit 通讯地址TEMP_CTRLB-b TEMP_CTRLB-800 –TEMP_CTRLB-8FF16进位Discrete Outputs RWB-b RWB-0 – RWB-FFFF 16进位Discrete Inputs RB-b RB-0 – RB-FFFF 16进位Discrete Outputs B b B1 – B10000Discrete Inputs B b B10001 – B20000注1元件地址必须是16的倍数。
H3C交换机忘记密码的解决办法
6: Start up and ignore configuration
7: Enter debugging environment
8: Boot Rom Operation Menu
9: Do not check the version of the software
* *
* Quidway Series Routers Boot ROM, V9.07 *
* *
********************************************
Copyright(C) 1997-2004 by HUAWEI TECH CO., LTD.
Compiled at 18:10:29 , Oct 14 2004.
8: Boot Rom Operation Menu
9: Do not check the version of the software
a: Exit and reboot
Enter your choice(1-a): 6
Start up and ignore configuration, Are you sure?[Y/N]y
2: Download Bootrom program
3: Modify Bootrom password
4: Exit the menu
5: Reboot
Enter your choice(1-5):
按ctrl+p后再选择5来清除密码
忽略配置清除密码再导入配置步聚
1、重新配置路由器的以太网口地址
[Router-Ethernet1]ip address 192.168.10.1 255.255.255.0
悍马汽车部件维修指南说明书
Cutoff Indicator Works........... 49
How Your Front Airbags Work.......................................... 46
CONTINUED
I
v w
Main Menu
Index
Bulb Replacement Back-up Lights ........................... 206 Stop Light ................................... 206 Cargo Area Light ....................... 211 Front Parking Lights................. 205 Front Side Marker Lights......... 204 Headlights .................................. 202 High-mount Brake Light .......... 207 Interior Lights............................ 210 License Plate Lights.................. 209 Side Marker Lights ................... 204 Side Turn Signal Lights ............ 208 Specifications ............................. 251 Turn Signal Lights..................... 203
W9812G2GB-6资料
1M × 4 BANKS × 32BITS SDRAM Table of Contents-1.GENERAL DESCRIPTION (3)2.FEATURES (3)3.AVAILABLE PART NUMBER (3)4.BALL CONFIGURATION (4)5.PIN DESCRIPTION (5)6.BLOCK DIAGRAM (6)7.FUNCTIONAL DESCRIPTION (7)7.1.Power Up and Initialization (7)7.2.Programming Mode Register (7)7.3.Bank Activate Command (7)7.4.Read and Write Access Modes (7)7.5.Burst Read Command (8)7.6.Burst Write Command (8)7.7.Read Interrupted by a Read (8)7.8.Read Interrupted by a Write (8)7.9.Write Interrupted by a Write (8)7.10.Write Interrupted by a Read (8)7.11.Burst Stop Command (9)7.12.Addressing Sequence of Sequential Mode (9)7.13.Addressing Sequence of Interleave Mode (9)7.14.Auto-precharge Command (10)7.15.Precharge Command (10)7.16.Self Refresh Command (10)7.17.Power Down Mode (11)7.18.No Operation Command (11)7.19.Deselect Command (11)7.20.Clock Suspend Mode (11)8.OPERATION MODE (12)9.ELECTRICAL CHARACTERISTICS (13)9.1.Absolute Maximum Ratings (13)9.2.Recommended DC Operating Conditions (13)9.3.Capacitance (13)9.4.DC Characteristics (14)9.5.AC Characteristics and Operating Condition (15)10.TIMING WAVEFORMS (17)mand Input Timing (17)10.2.Read Timing (18)10.3.Control Timing of Input/Output Data (19)10.4.Mode Register Set Cycle (20)11.OPERATING TIMING EXAMPLE (21)11.1.Interleaved Bank Read (Burst Length = 4, CAS Latency = 3) (21)11.2.Interleaved Bank Read (Burst Length = 4, CAS Latency = 3, Auto-precharge) (22)11.3.Interleaved Bank Read (Burst Length = 8, CAS Latency = 3) (23)11.4.Interleaved Bank Read (Burst Length = 8, CAS Latency = 3, Auto-precharge) (24)11.5.Interleaved Bank Write (Burst Length = 8) (25)11.6.Interleaved Bank Write (Burst Length = 8, Auto-precharge) (26)11.7.Page Mode Read (Burst Length = 4, CAS Latency = 3) (27)11.8.Page Mode Read / Write (Burst Length = 8, CAS Latency = 3) (28)11.9.Auto-precharge Read (Burst Length = 4, CAS Latency = 3) (29)11.10.Auto-precharge Write (Burst Length = 4) (30)11.11.Auto Refresh Cycle (31)11.12.Self Refresh Cycle (32)11.13.Burst Read and Single Write (Burst Length = 4, CAS Latency = 3) (33)11.14.Power Down Mode (34)11.15.Auto-precharge Timing (Read Cycle) (35)11.16.Auto-precharge Timing (Write Cycle) (36)11.17.Timing Chart of Read to Write Cycle (37)11.18.Timing Chart of Write to Read Cycle (37)11.19.Timing Chart of Burst Stop Cycle (Burst Stop Command) (38)11.20.Timing Chart of Burst Stop Cycle (Precharge Command) (38)11.21.CKE/DQM Input Timing (Write Cycle) (39)11.22.CKE/DQM Input Timing (Read Cycle) (40)12.PACKAGE SPECIFICATION (41)12.1.TFBGA 90 Balls pitch=0.8mm (41)13.REVISION HISTORY (42)1. GENERAL DESCRIPTIONW9812G2GB is a high-speed synchronous dynamic random access memory (SDRAM), organized as 1,048,576 words × 4 banks × 32 bits. Using pipelined architecture and 0.11 µm process technology, W9812G2GB delivers a data bandwidth of up to 166MHz words per second (-6). For different application, W9812G2GB is sorted into two speed grades: -6/-6I and -75. The –6 is compliant to the 166MHz/CL3 specification (the -6I grade which is guaranteed to support -40°C ~ 85°C). The -75 is compliant to the 133MHz/CL3 specification.Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically generated by the SDRAM internal counter in burst operation. Random column read is also possible by providing its address at each clock cycle. The multiple bank nature enables interleaving among internal banks to hide the precharging time.By having a programmable Mode Register, the system can change burst length, latency cycle, interleave or sequential burst to maximize its performance. W9812G2GB is ideal for main memory in high performance applications.2. FEATURES• 3.3V ± 0.3V Power Supply•Up to 166 MHz Clock Frequency• 1,048,576 Words × 4 banks × 32 bits organization• Self Refresh Mode•CAS Latency: 2 and 3•Burst Length: 1, 2, 4, 8 and full page•Burst Read, Single Writes Mode•Byte Data Controlled by DQM•Auto-precharge and Controlled Precharge•4K Refresh cycles / 64 mS• Interface: LVTTL•Packaged in TFBGA 90 Ball•W9812G2GB is using lead free materials with RoHS compliant3. AVAILABLE PART NUMBERPART NUMBER SPEEDMAXIMUM SELFREFRESH CURRENTOPERATINGTEMPERATUREW9812G2GB-6 166MHz/CL3 2mA 0°C ~ 70°C W9812G2GB-6I 166MHz/CL3 2mA -40°C ~ 85°C W9812G2GB-75 133MHZ/CL3 2mA 0°C ~ 70°C4. BALL CONFIGURATION5. PIN DESCRIPTION6. BLOCK DIAGRAM7. FUNCTIONAL DESCRIPTION7.1. Power Up and InitializationThe default power up state of the mode register is unspecified. The following power up and initialization sequence need to be followed to guarantee the device being preconditioned to each user specific needs.During power up, all V DD and V DDQ pins must be ramp up simultaneously to the specified voltage when the input signals are held in the “NOP” state. The power up voltage must not exceed V DD +0.3V on any of the input pins or V DD supplies. After power up, an initial pause of 200 µS is required followed by a precharge of all banks using the precharge command. To prevent data contention on the DQ bus during power up, it is required that the DQM and CKE pins be held high during the initial pause period. Once all banks have been precharged, the Mode Register Set Command must be issued to initialize the Mode Register. An additional eight Auto Refresh cycles (CBR) are also required before or after programming the Mode Register to ensure proper subsequent operation.7.2. Programming Mode RegisterAfter initial power up, the Mode Register Set Command must be issued for proper device operation. All banks must be in a precharged state and CKE must be high at least one cycle before the Mode Register Set Command can be issued. The Mode Register Set Command is activated by the low signals of RA,S CAS, CS and WE at the positive edge of the clock. The address input data during this cycle defines the parameters to be set as shown in the Mode Register Operation table. A new command may be issued following the mode register set command once a delay equal to t RSC has elapsed. Please refer to the next page for Mode Register Set Cycle and Operation Table.7.3. Bank Activate CommandThe Bank Activate command must be applied before any Read or Write operation can be executed. The operation is similar to RAS activate in EDO DRAM. The delay from when the Bank Activate command is applied to when the first read or write operation can begin must not be less than the RAS to CAS delay time (t RCD). Once a bank has been activated it must be precharged before another Bank Activate command can be issued to the same bank. The minimum time interval between successive Bank Activate commands to the same bank is determined by the RAS cycle time of the device (t RC). The minimum time interval between interleaved Bank Activate commands (Bank A to Bank B and vice versa) is the Bank to Bank delay time (t RRD). The maximum time that each bank can be held active is specified as t RAS (max).7.4. Read and Write Access ModesAfter a bank has been activated, a read or write cycle can be followed. This is accomplished by setting S RCD delay. WE pin voltage level RAS high and CA low at the clock rising edge after minimum of tdefines whether the access cycle is a read operation (WE high), or a write operation (WE low). The address inputs determine the starting column address.Reading or writing to a different row within an activated bank requires the bank be precharged and a new Bank Activate command be issued. When more than one bank is activated, interleaved bank Read or Write operations are possible. By using the programmed burst length and alternating the access and precharge operations between multiple banks, seamless data access operation amongmany different pages can be realized. Read or Write Commands can also be issued to the same bank or between active banks on every clock cycle.7.5. Burst Read CommandThe Burst Read command is initiated by applying logic low level to CS and CAS while holding RAS and WE high at the rising edge of the clock. The address inputs determine the starting column address for the burst. The Mode Register sets type of burst (sequential or interleave) and the burst length (1, 2, 4, 8 and full page) during the Mode Register Set Up cycle. Table 2 and 3 in the next page explain the address sequence of interleave mode and sequential mode.7.6. Burst Write CommandThe Burst Write command is initiated by applying logic low level to CS, CAS and WE while holding RAS high at the rising edge of the clock. The address inputs determine the starting column address. Data for the first burst write cycle must be applied on the DQ pins on the same clock cycle that the Write Command is issued. The remaining data inputs must be supplied on each subsequent rising clock edge until the burst length is completed. Data supplied to the DQ pins after burst finishes will be ignored.7.7. Read Interrupted by a ReadA Burst Read may be interrupted by another Read Command. When the previous burst is interrupted, the remaining addresses are overridden by the new read address with the full burst length. The data from the first Read Command continues to appear on the outputs until the CAS Latency from the interrupting Read Command the is satisfied.7.8. Read Interrupted by a WriteTo interrupt a burst read with a Write Command, DQM may be needed to place the DQs (output drivers) in a high impedance state to avoid data contention on the DQ bus. If a Read Command will issue data on the first and second clocks cycles of the write operation, DQM is needed to insure the DQs are tri-stated. After that point the Write Command will have control of the DQ bus and DQM masking is no longer needed.7.9. Write Interrupted by a WriteA burst write may be interrupted before completion of the burst by another Write Command. When the previous burst is interrupted, the remaining addresses are overridden by the new address and data will be written into the device until the programmed burst length is satisfied.7.10. Write Interrupted by a ReadA Read Command will interrupt a burst write operation on the same clock cycle that the Read Command is activated. The DQs must be in the high impedance state at least one cycle before the new read data appears on the outputs to avoid data contention. When the Read Command is activated, any residual data from the burst write cycle will be ignored.7.11. Burst Stop CommandA Burst Stop Command may be used to terminate the existing burst operation but leave the bank open for future Read or Write Commands to the same page of the active bank, if the burst length is full page. Use of the Burst Stop Command during other burst length operations is illegal. The Burst Stop Command is defined by having RAS and CAS high with CS and WE low at the rising edge of the clock. The data DQs go to a high impedance state after a delay which is equal to the CAS Latency in a burst read cycle interrupted by Burst Stop.7.12. Addressing Sequence of Sequential ModeA column access is performed by increasing the address from the column address which is input to the device. The disturb address is varied by the Burst Length as shown in Table 2.Table 2 Address Sequence of Sequential Mode7.13. Addressing Sequence of Interleave ModeA column access is started in the input column address and is performed by inverting the address bit in the sequence shown in Table 3.Table 3 Address Sequence of Interleave Mode7.14. Auto-precharge CommandIf A10 is set to high when the Read or Write Command is issued, then the auto-precharge function is entered. During auto-precharge, a Read Command will execute as normal with the exception that the active bank will begin to precharge automatically before all burst read cycles have been completed. Regardless of burst length, it will begin a certain number of clocks prior to the end of the scheduled burst cycle. The number of clocks is determined by CAS Latency.A Read or Write Command with auto-precharge can not be interrupted before the entire burst operation is completed. Therefore, use of a Read, Write or Precharge Command is prohibited during a read or write cycle with auto-precharge. Once the precharge operation has started, the bank cannot be reactivated until the Precharge time (t RP) has been satisfied. Issue of Auto-precharge command is illegal if the burst is set to full page length. If A10 is high when a Write Command is issued, the Write with Auto-precharge function is initiated. The SDRAM automatically enters the precharge operation two clocks delay from the last burst write cycle. This delay is referred to as Write t WR. The bank undergoing auto-precharge can not be reactivated until t WR and t RP are satisfied. This is referred to as t DAL, Data-in to Active delay (t DAL = t WR + t RP). When using the Auto-precharge Command, the interval between the Bank Activate Command and the beginning of the internal precharge operation must satisfy t RAS (min).7.15. Precharge CommandThe Precharge Command is used to precharge or close a bank that has been activated. The Precharge Command is entered when CS, RAS and WE are low and CAS is high at the rising edge of the clock. The Precharge Command can be used to precharge each bank separately or all banks simultaneously. Three address bits, A10, BS0, and BS1, are used to define which bank(s) is to be precharged when the command is issued. After the Precharge Command is issued, the precharged bank must be reactivated before a new read or write access can be executed. The delay between the Precharge Command and the Activate Command must be greater than or equal to the Precharge time (t RP).7.16. Self Refresh CommandThe Self Refresh Command is defined by having CS, RAS, CAS and CKE held low with WE high at the rising edge of the clock. All banks must be idle prior to issuing the Self Refresh Command. Once the command is registered, CKE must be held low to keep the device in Self Refresh mode. When the SDRAM has entered Self Refresh mode all of the external control signals, except CKE, are disabled. The clock is internally disabled during Self Refresh Operation to save power. The device will exit Self Refresh operation after CKE is returned high. A minimum delay time is required when the device exits Self Refresh Operation and before the next command can be issued. This delay is equal to the t AC cycle time plus the Self Refresh exit time.If, during normal operation, AUTO REFRESH cycles are issued in bursts (as opposed to being evenly distributed), a burst of 4,096 AUTO REFRESH cycles should be completed just prior to entering and just after exiting the self refresh mode. The period between the Auto Refresh command and the next command is specified by t RC.7.17. Power Down ModeThe Power Down mode is initiated by holding CKE low. All of the receiver circuits except CKE are gated off to reduce the power. The Power Down mode does not perform any refresh operations, therefore the device can not remain in Power Down mode longer than the Refresh period (t REF) of the device.The Power Down mode is exited by bringing CKE high. When CKE goes high, a No Operation Command is required on the next rising clock edge, depending on t CK. The input buffers need to be enabled with CKE held high for a period equal to t CKS (min) + t CK (min).7.18. No Operation CommandThe No Operation Command should be used in cases when the SDRAM is in a idle or a wait state to prevent the SDRAM from registering any unwanted commands between operations. A No Operation Command is registered when CS is low with RAS, CAS, and WE held high at the rising edge of the clock. A No Operation Command will not terminate a previous operation that is still executing, such as a burst read or write cycle.7.19. Deselect CommandThe Deselect Command performs the same function as a No Operation Command. Deselect Command occurs when CS is brought high, the RAS, CAS, and WE signals become don’t cares.7.20. Clock Suspend ModeDuring normal access mode, CKE must be held high enabling the clock. When CKE is registered low while at least one of the banks is active, Clock Suspend Mode is entered. The Clock Suspend mode deactivates the internal clock and suspends any clocked operation that was currently being executed. There is a one clock delay between the registration of CKE low and the time at which the SDRAM operation suspends. While in Clock Suspend mode, the SDRAM ignores any new commands that are issued. The Clock Suspend mode is exited by bringing CKE high. There is a one clock cycle delay from when CKE returns high to when Clock Suspend mode is exited.8. OPERATION MODEFully synchronous operations are performed to latch the commands at the positive edges of CLK. Table 1 shows the truth table for the operation commands.Table 1 Truth Table (Note (1), (2))Notes:(1) v =valid x =Don’t care L =Low Level H =High Level(2) CKEn signal is input level when commands are provided.CKEn-1 signal is the input level one clock cycle before the command is issued.(3) These are state of bank designated by BS0, BS1 signals.(4) Device state is full page burst operation.(5) Power Down Mode can not be entered in the burst cycle.When this command asserts in the burst cycle, device state is clock suspend mode.9. ELECTRICAL CHARACTERISTICS9.1. Absolute Maximum RatingsRATINGUNIT PARAMETER SYMBOLInput/Output Voltage V IN, V OUT -0.3 ~ V DD +0.3 VPower Supply Voltage V DD, V DDQ-0.3 ~ 4.6 VOperating Temperature (-6/-75) T OPR0 ~ 70 °C°C85Operating Temperature (-6I) T OPR -40~°C150Storage Temperature T STG -55~Soldering Temperature (10s) T SOLDER 260 °CW Power Dissipation P D 1mA Short Circuit Output Current I OUT 50Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device.9.2. Recommended DC Operating Conditions(Ta = 0 to 70°C for -6/-75, Ta= -40 to 85°C for -6I)UNIT PARAMETER SYMBOL MIN.MAX.TYP.Power Supply Voltage V DD 3.0 3.3 3.6 VPower Supply VoltageV DDQ 3.0 3.3 3.6 V(for I/O Buffer)V DD +0.3 VInput High Voltage V IH 2.0 -Input Low Voltage V IL -0.3 - 0.8 VNote: V IH(max) = V DD/ V DDQ+1.2V for pulse width < 5 nSV IL(min) = V SS/ V SSQ-1.2V for pulse width < 5 nS9.3. Capacitance(V DD= 3.3V, f = 1 MHz, Ta 25°C)Note: These parameters are periodically sampled and not 100% tested.9.4. DC Characteristics(VDD =3.3V± 0.3V, Ta = 0 to 70°C for-6/-75, Ta= -40 to 85°C for -6I)NOTESUNIT PARAMETER SYMBOL MIN.MAX.Input Leakage CurrentI I(L) -5 5 µA (0V ≤V IN≤ V DD, all other pins not under test = 0V)Output Leakage CurrentI O(L) -5 5 µA (Output disable , 0V ≤ V OUT≤ V DDQ)LVTTL Output ″H″ Level VoltageV OH 2.4 - V(I OUT = -2 mA )LVTTL Output ″L″ Level VoltageV OL - 0.4 V(I OUT = 2 mA )9.5. AC Characteristics and Operating Condition(VDD =3.3V ± 0.3V, Ta = 0 to 70°C for -6/-75, Ta= -40 to 85°C for -6I, Notes: 5, 6, 7, 8, 9, 10)-6/-6I -75PARAMETER SYM.MIN. MAX. MIN. MAX.UNIT NOTESRef/Active to Ref/Active Command Period t RC 60 65 Active to precharge Command Period t RAS 42 10000045 100000 nSActive to Read/Write Command Delay Timet RCD 18 20 Read/Write(a) to Read/Write(b) Command Periodt CCD 1 1 t CKPrecharge to Active Command Period t RP 18 20 Active(a) to Active(b) Command Period t RRD 12 15 nS CL* = 2 22 t CKWrite Recovery Time CL* = 3 t WR 22CL* = 2 101000101000CLK Cycle TimeCL* = 3t CK6 1000 7.5 1000CLK High Level widtht CH 2 2.5 9 CLK Low Level widtht CL 2 2.59CL* = 2 6 6 Access Time from CLKCL* = 3t AC 5 5.4 10 Output Data Hold Timet OH 3 3 10 Output Data High Impedance Time t HZ 3 6 3 7.5 8 Output Data Low Impedance Time t LZ 0 0 10 Power Down Mode Entry Time t SB 0 6 0 7.5Transition Time of CLK (Rise and Fall) t T 0.1 1 0.1 1 7 Data-in Set-up Time t DS 1.5 1.5 9 Data-in Hold Time t DH 1.0 1.0 9 Address Set-up Time t AS 1.5 1.5 9 Address Hold Time t AH 1.0 1.0 9 CKE Set-up Time t CKS 1.5 1.5 9 CKE Hold Time t CKH 1.0 1.0 9 Command Set-up Time t CMS 1.5 1.5 9 Command Hold Time t CMH 1.0 1.0nS9Refresh Timet REF 64 64 mS Mode register Set Cycle Time t RSC 12 15 nS Exit self refresh to ACTIVE commandt XSR72 75 nS*CL = CAS LatencyNotes:1. Operation exceeds “Absolute Maximum Ratings” may cause permanent damage to the devices.2. All voltages are referenced to V SS3. These parameters depend on the cycle rate and listed values are measured at a cycle rate with the minimum values of t CK and t RC .4. These parameters depend on the output loading conditions. Specified values are obtained with output open.5. Power up sequence is further described in the “Functional Description” section.6. AC Testing ConditionsPARAMETER CONDITIONSOutput Reference Level1.4VOutput LoadSee diagram belowInput Signal Levels (V IH /V IL ) 2.4V/0.4VTransition Time (t T : tr/tf) of Input Signal 1/1 nS Input Reference Level 1.4V7. Transition times are measured between V IH and V IL .8. t HZ defines the time at which the outputs achieve the open circuit condition and is not referenced to output level.9. Assumed input transition Time (t T ) = 1nS.If tr & tf is longer than 1nS, transient time compensation should be considered, i.e., [(tr + tf)/2-1]nS should be added to the parameter(The t T maximum can’t be more than 10nS for low frequency application.)10. If clock rising time (t T ) is longer than 1nS, (t T /2-0.5)nS should be added to the parameter.10. TIMING WAVEFORMS 10.1. Command Input Timing10.2. Read Timing10.3. Control Timing of Input/Output Data10.4. Mode Register Set Cycle11. OPERATING TIMING EXAMPLE11.1. Interleaved Bank Read (Burst Length = 4, CAS Latency = 3)11.2. Interleaved Bank Read (Burst Length = 4, CAS Latency = 3, Auto-precharge)11.3. Interleaved Bank Read (Burst Length = 8, CAS Latency = 3)11.4. Interleaved Bank Read (Burst Length = 8, CAS Latency = 3, Auto-precharge)11.5. Interleaved Bank Write (Burst Length = 8)11.6. Interleaved Bank Write (Burst Length = 8, Auto-precharge)11.7. Page Mode Read (Burst Length = 4, CAS Latency = 3)11.8. Page Mode Read / Write (Burst Length = 8, CAS Latency = 3)11.9. Auto-precharge Read (Burst Length = 4, CAS Latency = 3)11.10. Auto-precharge Write (Burst Length = 4)11.11. Auto Refresh Cycle11.12. Self Refresh Cycle11.13. Burst Read and Single Write (Burst Length = 4, CAS Latency = 3)11.14. Power Down Mode11.15. Auto-precharge Timing (Read Cycle)11.17. Timing Chart of Read to Write Cycle11.18. Timing Chart of Write to Read Cycle11.19. Timing Chart of Burst Stop Cycle (Burst Stop Command)11.20. Timing Chart of Burst Stop Cycle (Precharge Command)11.21. CKE/DQM Input Timing (Write Cycle)11.22. CKE/DQM Input Timing (Read Cycle)12. PACKAGE SPECIFICATION12.1. TFBGA 90 Balls pitch=0.8mmPublication Release Date:Aug. 13,2007- 41 - Revision A07Publication Release Date: Aug. 13,2007- 42 - Revision A0713. REVISION HISTORYVERSION DATEPAGEDESCRIPTIONA01 Mar. 24, 2006 All Create new datasheet A02 Jul. 05, 2006 8 Burst Stop commandA03 Sep. 08, 2006 10 Exit Auto refresh to next command is specified by t RC A04 Sep. 27, 200615,16Modify Characteristics Notes 9 and add Notes 10 (t T ) A05 Apr. 12, 2007 15,32,34,41Add t XSR timing specification and package dimension ball openingA06 Jun. 21, 2007 3,13,14,15Add -6I gradeA07 Aug. 13, 200716Revise transient time t T AC test condition and calculate formula for compensation consideration in Notes 6, 9 of AC Characteristics and Operating ConditionImportant NoticeWinbond products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other applications intended to support or sustain life. Further more, Winbond products are not intended for applications wherein failure of Winbond products could result or lead to a situation wherein personal injury, death or severe property or environmental damage could occur.Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales.。
YASKAWA Electric Corporation 控制器数据复制工具指南说明书
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GP-Pro EX 控制器 /PLC 连接手册
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YASKAWA Electric Corporation 控制器数据复制工具指南
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控制器数据复制工具工作原理
控制器数据复制工具包含两个步骤。
1 将梯形图文件和外接控制器数据传输执行文件保存到存储设备。
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1 安装有梯形图软件的 PC。 2 用于存储梯形图文件和外接控制器数据传输执行文件的存储设备。
兼容 YASKAWA Electric Corporation MP/INVERTER/SERVO Ethernet 驱动程序支持的 MP2000 / MP3000 系列。详情请参阅 YASKAWA Electric Corporation MP/INVERTER/SERVO Ethernet 驱动 程序手册。 • 兼容的梯形图软件 YASKAWA Electric Corporation MPE720 (V7.11 或以上 ) Yaskawa Electric Corporation MPE720 (V6.04 或以上 ) Yaskawa Electric Corporation MPE720 (V 5.38 或以上。不支持新梯形图。 ) • 兼容的操作系统 Microsoft® Windows® 2000 (SP3 及以上 ) Microsoft® Windows® XP (32 位的所有版本 ) Microsoft® Windows Vista® (32 位的所有版本 ) Microsoft® Windows® 7 (32 位 /64 位的所有版本 ) Microsoft® Windows® 8 (32 位 /64 位的所有版本 )
Front End Controllers 7.1 产品说明书
Controllers FEC,Standard•Sturdy control rack requiring a minimum of space•Analogue inputs/outputs and Ethernet optional•Quick installation using the SAC sensor/actuator connector system•User-oriented software–programming the way you think or according to standard ElectroniccontrolsystemsFrontEndControllers 7.1Controllers FEC,StandardKeyfeaturesThe installation-saving controller The FEC Standard is not just a new mini controller.It shows that there is still room for innovation in mini controllers at the start of the new millennium.With its robust extruded aluminium housing,it demonstrates thatcompact design and toughness can go hand in hand.Its connector system is accessible from the front,ensuring no wastage of space within control cabinets.And the sensor/actuator connector system SAC,making its world premiere in this product,very largely replaces terminal strips in the I/O area.This means that control cabinets with FEC Standard have a decisive advantage:Up to 50%less space required,and up to 40%less time.Thanks to the integration of a high-speed counter into every CPU,this mini controller is well able to carry out counting and simple positioning operations.Additionally,the optional analogue inputs/outputs turn a smart mini controller into a smart process controller.The two serial interfaces in every CPU make the FEC Standard into a talented communicator which allows program-ming via one interface and operation and monitoring via the other,at the same time.The leading concept in communication today is Ethernet,the “network of networks”.This can of course be integrated intoFEC Standard as an option.After all,smart automation technologydemands smart network technology.With Ethernet and a web server,the FEC Standard paves the way for the visualisation technology of tomorrow:Controller surfing.E l e c t r o n i c c o n t r o l s y s t e m sF r o n t E n d C o n t r o l l e r s7.1Controllers FEC,StandardKey featuresHardwareThe FEC Standard has a clip for a top-hat rail and corner holes for bolt-mounting using a mounting plate.All connections are accessible from the front;there is no need for additional space for connections from above or below.Power supplyThe FEC Standard is poweredexclusively via 24V DC as per modern control cabinet technology.24V DC (+25%/-15%)power supply for the controller itself,24V DC (+/–25%)power supply for the input signals,positive switching,24V DC output signals 400mA,proof against short-circuits and low-resistance loads.The analogue inputs/outputs are 0(4)...20mA I/Os,12bitresolution.Serial interfacesEvery FEC Standard is equipped with two serial interfaces –COM and EXT.These are universal TTL interfaces with a maximum data transmission rate of 115kbits/s.Depending on requirements,the interfaces can be used as RS232c (SM14or SM15)or RS485(SM35)interfaces.Adapters should be ordered separately.The COM interface is generally used together with the SM14for program-ming,while the EXT interface can be used for an MMI device,a modem or other devices with a serial interface.Ethernet interfaceThe FEC Standard versions with an Ethernet interface incorporate an Ethernet 10BaseT interface with an RJ45connection and a data transmission rate of 10Mbits/s.A combined “Link/Active”LEDindicates the connection status.The FEC Standard supports datacommunication and programming/troubleshooting via the Ethernetinterface.ProgrammingThe FEC Standard is programmed using FST.FST is a unique programming language rich in tradition and very easy to use,allowing “programming the way you think”:IF...THEN...ELSEFST also supports STEP operation for sequence programming.FST can be used for programming via Ethernet;a web server is alsoavailable.E l e c t r o n i c c o n t r o l s y s t e m sF r o n t E n d C o n t r o l l e r s7.1Controllers FEC,StandardKey featuresThe sensor/actuatorconnectorTogether with the FEC Standard,we are introducing an innovative new installation concept,the sensor/actuator connector SAC.Thisconnector combines three functions in a very compact design:•Connection of inputs,outputs and power supply•Status signal by means of an LED •Replaces terminal strip for sensors andactuatorsThe three-wire version of theconnector has internally connected straps for 0V and 24V DC.This allows any sensor (up to 3wires)or actuator (up to the maximumpermissible output current)to be feddirectly to the connector.There is no need for a terminal strip for sensors and actuators.This allows space savings in control cabinets of up to 50%.The SAC uses a tension-spring contact system.This means no need for screw connections.Solid wires can simply be pushed into the connector,while in the case of finely-stranded wire,all that is necessary is to open the contact by pressing on the relevant pin and then introduce the wire.Cable end sleeves can be used if desired but are not essential.The tension-spring system and the fact that no terminal strip between the controller and sensors/actuator is required means that a time saving of up to 40%can be achieved during installation.The pin assignment for the I/O panel is simple and is always the same:Pin 1+24V DC Pin 2Bit 0Pin 3Bit 1Pin 4Bit 2Pin 5Bit 3Pin 6Bit 4Pin 7Bit 5Pin 8Bit 6Pin 9Bit 7Pin 100VThe power supply for the LEDs istaken from the signal pins in the connector.This means that the entire input assignment can be checked without acontroller.E l e c t r o n i c c o n t r o l s y s t e m sF r o n t E n d C o n t r o l l e r s7.1Controllers FEC,StandardKey featuresProgramming withFSTProgramming the way you think How do we describe a machine?“When a workpiece reaches here,this cylinder should advance.”How does the software interpretthis?Or does your machine work through a sequence step by step?“First,this cylinder must advance and stop the workpiece,and then the workpiece must be clamped,and thenfinally...”How,for example,can we sub-divide a task?Program 0:Organisation Program 1:Set-up program Program 2:AutomationprogramProgram 3:Fault monitoring Program 4:Manual operation ...Program 63:TroubleshootingprogramHow does one controller communicate with another?Every controller with Ethernet can send and receive data from every other controller within a network –no matter whether this data relates to inputs,outputs,flags or registers.Central programming of distributed controllersEvery controller within a network can be programmed from any desired network interface.A controller on the World Wide Web FST incorporates a web server –the Internet and the world of automationmeet.Programming just couldn’t beeasier.E l e c t r o n i c c o n t r o l s y s t e m sF r o n t E n d C o n t r o l l e r s7.1Controllers FEC,StandardProduct range overview The FECStandardE l e c t r o n i c c o n t r o l s y s t e m sF r o n t E n d C o n t r o l l e r s7.1Controllers FEC,StandardProduct range overviewThe principle of the FECStandard11235461In each case 16digital inputs,24V DC,positive-switching 2Optionally:3analogue inputs/1analogue output3In each case 8digital outputs 4Power supply5Rotary RUN/STOP switch 62serial interfaces,option ofEthernetE l e c t r o n i c c o n t r o l s y s t e m sF r o n t E n d C o n t r o l l e r s7.1Controllers FEC,StandardTechnical data General technical dataFEC-FC400FEC-FC440FEC-FC600FEC-FC640FEC-FC660Max.operating temperature0...55°C Max.transport and storage temperature –25...+70°CRel.humidity 0...95%(non condensing)Operating voltage 24V DC +25%/–15%Power consumption <5W Degree of protection IP20Degree of protection Degree of protection III.Power pack in accordance with IEC 742/EN60742/VDE0551/PELV with at least 4kV insulation resistance or switched-mode power supplies with safety isolation as defined by EN 60950/VDE 0805are required Certification C-TickI/O connection Tension spring connector EMC EN 61000-6-4Digital inputsFEC-FC400FEC-FC440FEC-FC600FEC-FC640FEC-FC660Number1632Number of above usable as high-speed inputs (max.2kHz)2Minimum pulse length for TRUE:250µs,Minimum pause length for FALSE:250µs Input voltage/current 24V DC,typical 5mA Nominal value for TRUE 15V DC min.Nominal value for FALSE 5V DC max.Input signal delay Typical 5msElectrical isolationYes,via optocoupler Permissible length of connecting cable Max.30mStatus display via LED Optional,in connectorAnalogue inputsFEC-FC400FEC-FC440FEC-FC600FEC-FC640FEC-FC660Number 03Signal range 0(4)...20mA Resolution12bit,±3LSB Conversion time10ms Permissible length of connecting cable Max.30mDigital outputsFEC-FC400FEC-FC440FEC-FC600FEC-FC640FEC-FC660Number 816ContactsTransistorCurrent/voltage 24V DC,max.400mA Short circuit proofYesProof against low-resistance loads Yes,up to 5W Overload-proof YesElectrical isolation Yes,via optocoupler Switching speedMax.1kHzElectrical isolation in groups Yes,in each case 1byte Maximum group current 3.2A Switching cyclesUnlimitedStatus display via LED Optional,in connectorAnalogue outputsFEC-FC400FEC-FC440FEC-FC600FEC-FC640FEC-FC660Number 01Signal range 0(4)...20mA Resolution12bit Conversion time 10ms Max.load resistance700ΩE l e c t r o n i c c o n t r o l s y s t e m sF r o n t E n d C o n t r o l l e r s7.1Controllers FEC,StandardTechnical dataRotary switchFEC-FC400FEC-FC440FEC-FC600FEC-FC640FEC-FC660 Number1Positions16STOP/RUN0=Stop1...F=RUNSerial interfaceFEC-FC400FEC-FC440FEC-FC600FEC-FC640FEC-FC660 Number2Connection RJ12plug socketFeatures Serial,asynchronous,TTL level,no electrical isolationUse as RS232c PS1-SM14or PS1-SM15requiredTerminal assignment SM14/15Transmit,receive,RTS,CTSUse as RS485PS1-SM35requiredUse as programming interface9600bits/s,8/N/1Use as universal interface:COM300...9600bits/s,7N1,7E1,7O1,8N1,8E1,8O1Use as universal interface:EXT300...115,000bits/s,7N1,7E1,7O1,8N1,8E1,8O1SAC connectorFEC-FC400FEC-FC440FEC-FC600FEC-FC640FEC-FC660 Number of connectors required44778 Insulating material PBT,colour blackTemperature range PS1-SAC10/SAC30:–20...+100°Cp gPS1-SAC11/SAC31:–20...+75°CFlammability class V-0Grid dimension 3.5mmConnector system Spring connectionInsulation-stripping length9...10mmClamping range0.05...1.5mm2Single-conductor H05(07)V-U0.20...1.5mm2Multi-stranded without cable end sleeves0.5...1.5mm2Multi-stranded with cable end sleeves inaccordance with DIN46228/10.5...1.5mm2Multi-stranded hot-dip galvanized0.05...0.2mm2Current rating for strap contacts16ACurrent rating for individual contacts2A(max.6A per contact,please note the admissible loads for distributor board and supply contacts)EthernetFEC-FC400FEC-FC440FEC-FC600FEC-FC640FEC-FC660 Number01011Bus interface IEEE802.3(10BaseT)Data transmission speed10Mbits/sConnector RJ45Supported protocols TCP/IP,EasyIP,httpOPC server upon requestDDE server Yes,for EasyIP ElectroniccontrolsystemsFrontEndControllers 7.1Controllers FEC,StandardTechnical data ProgrammingFSTProgramming languages Version 4.02:statement list(with version 3.2:statement list and ladder diagram in German and English)Working languageGerman and English Number of programs and tasks per project64(0...63)Permissible input addresses0 (255)addressable as bits or words Permissible output addresses 0 (255)addressable as bits or words Number of flags10,000(0...9999),addressable as bits or wordsNumber of timers and counters 256(0...255)in each case,with 1status bit,1setpoint and 1actual value Number of registers (words)0 (255)addressable as words Programming interfaceRS232or Ethernet Number of different operations >28Subroutine Up to 200different subroutines per project C/C++Yes,for modules and drivers File handling Yes RS232c Yes ABG Yes FEDYesWeb server Yes (FST from version 4)RemanenceFlag words 0...255Register 0 (126)Timer and counter preselects and counter words 0...127PasswordPerformance1.6ms/1k instructions approx.E l e c t r o n i c c o n t r o l s y s t e m sF r o n t E n d C o n t r o l l e r s7.1Controllers FEC,Standard Technical dataType L1L2FEC-FC4…132.1114.2FEC-FC6…174.7156.8Ordering data–The FEC Standard with FST programmingDesignation Features Part No.TypeIPC controller16I/8O183862FEC-FC400-FST 16I/8O,Ethernet185205FEC-FC440-FST32I/16O191449FEC-FC600-FST32I/16O,Ethernet191450FEC-FC640-FST32I/16O,3/1analogue I/Os,Ethernet197157FEC-FC660-FST ElectroniccontrolsystemsFrontEndControllers 7.12006/0920064/7.1-2320062006/094/7.1-24Controllers FEC,StandardTechnical dataOrdering data –Connectors for the FEC Standard Designation Features Part No.TypePlug 1-row,no LED,tension-spring system 197159PS1-SAC10-10POL Plug 1-row,with LED,tension-spring system 197160PS1-SAC11-10POL+LED Plug 3-row,no LED,tension-spring system 197161PS1-SAC30-30POL Plug3-row,with LED,tension-spring system197162PS1-SAC31-30POL+LEDOrdering data –Cables for the FEC Standard Designation Features Part No.TypeProgramming cable RS232adapter for programming from PC,complete with neutral modem cable 188935PS1-SM14-RS232Converter RS232adapter for connection of any desired devices with a serial interface,with top-hat-rail clip,no neutral modem or RS232cable 192681PS1-SM15-RS232Converter RS485adapter,with top-hat-rail clip 193390PS1-SM35-RS485CableNeutral modem cable160786PS1-ZK11-NULLMODEM-1,5M Earthing setEarthing set for earthing of cable screening via the H-rail526683FEC-ZE30Ordering data –Display and operating units Designation Features Part No.Type Operator unitDisplay and operating unit,LCD with 4lines,20characters each,illuminatedbackground,4function keys,real-time clock and expansion interface,e.g.Ethernet533531FED-50Operator unit Display and operating unit,LCD with 4lines,20characters each,illuminated background,12function keys,numeric keypad,real-time clock and expansion interface,e.g.Ethernet533532FED-90Fieldbus interface Ethernet interface module for FED 533533FEDZ-IET Programming cable Programming cable for FED533534FEDZ-PC Cable Connecting cable FEC (RJ12,COM and EXT)to FED189432FEC-KBG6Ordering data –Software and manuals for the FEC Standard Designation Features Part No.TypeProgramming softwareFST software version4.X on CD,manuals on CD191440PS1-FST2-CD-WIN g g FST software version 4.1on CD with manual DIN A5in German 537927P .SW-FST4-CD-DE FST software version 4.1on CD with manual DIN A5in English 537928P .SW-FST4-CD-EN ManualSystem manual FEC Standard,German 525368P .BE-FEC-S-SYS-DE System manual FEC Standard,English525369P .BE-FEC-S-SYS-ENE l e c t r o n i c c o n t r o l s y s t e m sF r o n t E n d C o n t r o l l e r s7.1。
lt3845 dc-dc step-down converter demonstration cir
LT3845 DESCRIPTIONDemonstration Circuit 1073 is a100kHz-500kHz programmable frequency, high voltage, current-mode DC/DC step-down converter featuring the LT3845. The operating frequency can be synchronized up to 600kHz. The demo board is designed for 12V @ 6.25A (75W) output from a 20V to 55V input. A soft-start feature controls the output voltage slew rate at start-up, reducing current surges and voltage overshoots. The modes of op-eration (Burst Mode, Discontinuous Current Mode and Continuous Current Mode) are jumper selectable. Both Burst Mode and Discontinuous Current Mode increase the efficiency at light loads. Continuous Current Mode will maintain a constant switching fre-quency regardless of the load cur-rent.An Optional Boost Bias circuit is provided on the bottom side of the board for back-driving the LT3845 in-ternal regulator from the output voltage. Customers may want to use this optional circuit with modified applications that have relatively high input voltages and low (~ 3.3V)output voltages. In such applica-tions, the optional circuit can in-crease the overall efficiency by re-ducing the power loss in the LT3845. The demonstration board has also been laid out with the option of doubling the switching MOSFETs to facilitate higher output current. This board is suitable for a wide range of indus-trial control systems and particu-larly suitable for 12V/42V automotive applications and 48V Telecom power supplies.The LT3845 datasheet gives a complete description of the part, operation and application information. The datasheet must be read in conjunction with this quick start guide for demo circuit 1073.Note: It is best to ground the SYNC pin if the SYNC function is not beingused.Design files for this circuit board are available. Call the LTC factory. , LTC and LT are registered trademarks of Linear Technol-ogy Corporation. ThinSOT and PowerPath are trademarks of Lin-ear Technology Corporation.Performance Summary ( T A = 25o C ) PARAMETER FOR STEP-DOWN CONVERTER CONDITION VALUE Minimum input voltage 20V Maximum input voltage 55VOutput voltage V OUT12V +/- 4% Maximum output current6.25A Typical switching frequency300kHzDEMO CIRCUIT 1073QUICK START GUIDELT3845High Voltage Synchronous Buck Controller with Programmable Frequency and Syncmm ×3mm DFNLT3845QUICK START PROCEDUREDemonstration circuit 1073 is easy to set up to evaluate the performance of the LT3845. Refer to Figure 1 for proper measurement equipment setup and follow the procedure below: NOTE.When measuring the input or output voltage ripple, care must be taken to avoid a long ground lead on the oscilloscope probe. Measure the input or output voltage ripple by touching the probe tip directly across the Vin or Vout and GND terminals. See Figure 2 for proper scope probe technique.1.Place JP1 on the RUN position:2.With power off, connect the input power supply to Vin and GND.3.Turn on the power at the input.NOTE.Make sure that the input voltage does not exceed 60V.4.Check for the proper output volt-ages. .5.Once the proper output voltages are established, adjust the loads within the operating range and ob-serve the output voltage regula-tion, ripple voltage, efficiency and other parameters.LT3845Figure 1.Proper Measurement Equipment SetupFigure 2.Measuring Input or Output RippleLT3845LT3845。
百灵达X32数字调音台系统菜单中英文对照
X32数字调音台系统菜单中英文对比之答禄夫天创作一、二、HOME 通道主页Home：通道总详情 config：通道配置 gate：噪声门dyn：压限压缩器 eq：参量均衡器 sends :信号发送至母线 main :信号发送至主输出三、METERS 总电平表头Channel :输入通道电平监视 mix bus ：混音母线电平监视aux/fx :辅助输入与效果器返回电平监视 in/out :所有输入输出电平监视四、ROUTING 路由布线Home :输入通道的布线 analog out :本地模拟输出 aux out :辅助输出p16 out :个人监听系统输出 card out :录音声卡输出 aes50-a :远程传输A ase50-b ：远程传输 B 五、SETUP 调音台状态设置Global :全局把持设置 config :状态设置 remote :控制设置 network :网络设置 Scribble strip 通道标识表记标帜设置 preamps :话放设置 card :录音声卡设置六、LIBRARY 存储中心Channel :通道设置的存储 effects :效果器的存储routing :路由布线的存储七、EFFECTS 效果器Home :效果器的种类,输入总调整 fx1-fx8 :效果器1-8的详细参数调整八、MUTE GRP 哑音编组编纂按钮九、UTILITY 其他功能被选择某一通道后,按下此按键,可存储该通道的一些参数或者调用原先存好的参数.在某一菜单页面时,按下此按键可以弹出更细菜单.此按键多用于通道,效果,和路由设置的存储.数字调音台的设计生产厂商年夜部份在欧美和日本地域.因此数字调音台的专业标示城市以英文为主.国内用户假如英文不外关的话,可以选择在手机或者电脑上面装置类似《有道辞书》和《金山词霸》的翻译软件,方便于我们的日常工作和学习.。
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AN2829Application note Dual step-down controller with auxilary voltages fornotebook system powerIntroductionThe PM6681A is a dual step-down controller with adjustable output voltages that can beused in notebook power systems. This demonstration board represents a typical applicationcircuit. The PM6681A demonstration board allows testing of all functions of the device andprovides two switching sections, with (typ.) 1.5 V (OUT1) and 1.05 V (OUT2) outputs from5.5 V to 28 V input battery voltage. The typical operating switching frequency of the twosections is 200 kHz/300 kHz, respectively. Each switching section delivers more than 5 A ofoutput current. An internal linear regulator provides a fixed 5 V output voltage. Anotherinternal linear regulator provides an adjustable output voltage (default 3.3 V). Both linearregulators can deliver up to 100 mA peak current.Figure 1.PM6681A demonstration boardAM01407v1 February 2009Rev 1 1/32Contents AN2829Contents1Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3Demonstration board schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4Component list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5Demonstration board layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6I/O interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7Recommended equipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8Quick start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 9Jumper settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 10Feedback output connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1711Test setup and performance summary . . . . . . . . . . . . . . . . . . . . . . . . . 1811.1Test setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1811.2Power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1811.3Soft-start and shutdown waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1911.4 1.5 V and 1.05 output efficiency vs. load current . . . . . . . . . . . . . . . . . . . 2111.5Power consumption analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2211.6Switching frequency vs. load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2511.7Linear regulator output voltages vs. output current . . . . . . . . . . . . . . . . . 2611.8Load transient response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 12Representative waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 13Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 312/32AN2829List of figures List of figuresFigure 1.PM6681A demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 2.Demonstration board schematic diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3.PM6681A demonstration board layout - top layer (PGND plane and component side) . . . 10 Figure 4.PM6681A demonstration board layout - inner layer 1 (SGND layer and VIN plane) . . . . . 10 Figure 5.PM6681A demonstration board layout - inner layer 2 (SGND layer and signals). . . . . . . . 11 Figure 6.PM6681A demonstration board layout - bottom layer (PM6681A and component side) . . 11 Figure 7.Setup connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 8.REF, LDO5 and LDO power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 9.Section 1 soft-start waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 10.Section 2 soft-start waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 11.Section 1 shutdown waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 12.Section 2 shutdown waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 13. 1.5 V SMPS efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 14. 1.05 V SMPS efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 15.Input current vs. input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 16.Input current vs. input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 17.Input current vs. input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 18.Device current consumption vs. input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 19.Device current consumption vs. input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 20. 1.5 V output switching frequency vs. load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 21. 1.05 V output switching frequency vs. load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 22.LDO5 output vs. load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 23.ADJ_LDO load regulation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 24.SMPS 1.5 V load transient response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 25.SMPS 1.05 V load transient response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 26.SMPS pulse skip mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 27.SMPS no-audible skip mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 28.SMPS PWM mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 303/32Main features AN28294/321 Main features● 5.5 V to 36 V input voltage range ●Adjustable output voltages●0.9-3.3 V adjustable LDO delivers 100 mA peak current ● 5 V LDO delivers 100 mA peak current ● 1.237 V ±1% reference voltage available●Lossless current sensing using low side MOSFET R DS(on) ●Negative current limit●Soft-start internally fixed at 2 ms ●Soft output discharge ●Latched UVP ●Non-latched OVP●Selectable pulse skipping at light loads●Selectable minimum frequency (33 kHz) in pulse skip mode ● 4 mW maximum quiescent power ●Independent Power Good signals ●Output voltage ripple compensation.AN2829Applications2 Applications●Notebook, tablet and slate computers●Mobile system power supplies●3-4 cell Li+ battery-powered devices5/32Demonstration board schematic AN28296/323 Demonstration board schematicFigure 2.Demonstration board schematic diagramAM01408v1AN2829Component list7/324 Component listTable 1.Bill of materialsQty Component Description Package Part number MFR Value 3C1:C3Ceramiccapacitor 1812UMK325BJ106KM-TT aiyo-Yuden10 µF - 50 V 1C4Ceramic capacitor 1812NM10 µF - 502C5,C6Ceramic capacitor 0805100 nF - 50 V 1C19Ceramic capacitor 0805100 nF - 50 V1C7POSCAP capacitor 7343NM Sanyo2C9,C10Ceramic capacitor 0805NM 1C11POSCAP capacitor 7343NM Sanyo 1C8POSCAP capacitor 73436TPB330M Sanyo 330 µF - 12 mR - 6 V 1C12POSCAP capacitor 73436TPB330MSanyo330 µF -12 mR - 6 V 2C13, C14Ceramic capacitor 0603 5.6 nF - 50 V 2C15, C16Ceramic capacitor 0603 1 nF - 50 V 2C17, C18Ceramic capacitor 060347 pF - 50 V 1C20Ceramic capacitor 0805 1 µF - 10 V 1C21T antalum capacitor 3216 4.7 µF - 16 V 1C22Ceramic capacitor 0805220 nF - 10 V1C23Ceramic capacitor 080510 pF1CIN Electrolytic capacitor D=10 mm NM1CREF Ceramic capacitor 0805100 nF - 50 V 1C26T antalum capacitor60324.7 µF - 35 VComponent list AN28298/321C24,C25T antalum capacitor 080510 µF - 6.3 V 1C27T antalum capacitor 080510 µF - 6.3 V 1C28T antalum capacitor 3216 4.7 µF - 16 V1D1Dual schottkydiode SOT23BA T54A STMicroelectronics 2D2,D3Diode 1 A - 30 V DO216AA STPS1L30M STMicroelectronics 1IC1PM6681A device QFN-32PM6681A STMicroelectronics1L1Inductor 13 mm x 13 mm MLC1538-152ML Coilcraft 1.5 µH - 12 A 1L2Inductor 13 mm x 13 mm MLC1515-252ML Coilcraf2.5 µH - 8 A4M1:M4MOSFET control FET SO-8STS12NH3LL1R3Resistor 080522 k Ω - 1%1R4Resistor 080536 k Ω - 1%1R5Resistor 0805 3.3 k Ω - 1%1R6Resistor 0805 3 k Ω - 1%2R7, R8Resistor 0805680 Ω - 1%1R9Resistor 080547 Ω - 1%2R10, R11Resistor 080510 Ω - 1%4R12:R15Resistor 0805100 k Ω - 1%1R16Resistor 0805150 k Ω - 1%1R17Resistor 0805560 k Ω - 1%2R18, R19Resistor 0805NM4R20, R21, R22, R23Resistor 08050 Ω - 1%1R24Resistor 0805 1.1 k Ω - 1%1R25Resistor 0805820 Ω - 1%1R26Resistor 1206 3.9 Ω - 1%1R27Resistor 080510 k Ω - 1%1R29Resistor 080511 k Ω - 1%1R28Resistor 0805 6.8 k Ω - 1%1R30Resistor08051.8 k Ω - 1%Table 1.Bill of materials (continued)Qty Component Description Package Part numberMFRValueAN2829Component list9/321R31Resistor 0603 5.6 k Ω - 1%1R32Resistor 060315 k Ω - 1%1RLD5V , RLD3VResistor0805NM Table 1.Bill of materials (continued)Qty ComponentDescription Package Part numberMFRValueDemonstration board layout AN282910/325 Demonstration board layoutFigure 3.PM6681A demonstration board layout - top layer (PGND plane andcomponent side)Figure 4.PM6681A demonstration board layout - inner layer 1 (SGND layer and V INplane)AM01409v1AM01410v1AN2829Demonstration board layout Figure 5.PM6681A demonstration board layout - inner layer 2 (SGND layer andsignals)AM01411v1 Figure 6.PM6681A demonstration board layout - bottom layer (PM6681A andcomponent side)AM01412v111/32I/O interface AN282912/326 I/O interfaceThe demonstration board has the following test points:Table 2.Demonstration board test pointsTest point Description V IN +Input voltage V IN -Input voltage ground LDO5 5 V linear regulator output LDO_ADJ Adjustable linear regulator outputEXT5V 5 V external input OUT1+OUT1 switching section output OUT1-OUT1 switching section output ground PGOOD1OUT1 switching section Power Good OUT2+OUT2 switching section output OUT2+OUT2 switching section output ground PGOOD2OUT2 switching section Power Good J10Junction pin between PGND and SGND planesAN2829Recommended equipment13/327 Recommended equipment● 5.5 V to 36 V power supply, notebook battery or AC adapter ●Active loads ●Digital multimeters●500 MHz four-trace oscilloscopeQuick start AN282914/328 Quick start1. Connect VIN+ and VIN- test points of the demonstration board to an external powersupply.2. Ensure that all switches of DIP-switch "S2" are "OFF". In this condition all outputs are disabled (shutdown-mode).3. Turn "S21"on (SHDN pin high). The LDO5 and LDO_ADJ outputs turn-on (standby-mode).4. Turn "S22" on (EN1 pin high). The 1.5 V switching controller brings its output into regulation. The PGood1 pin goes high after soft-start.5. Turn "S23" on (EN2 pin high). The 1.05 V switching controller brings its output into regulation. The PGood2 pin goes high after soft-start.6. In order to load the switching outputs, loads must be connected between the "+" and the "-" output test points, respectively.7. In order to load the LDO5 linear output, loads must be connected between J10 and LDO5 or resistor RLD5V can be mounted on the demonstration board.8.In order to load the LDO_ADJ linear output, loads must be connected between J10 and LDO_ADJ or the alternative resistor R33 can be mounted on the demonstration board.AN2829Jumper settings15/329 Jumper settingsIt is possible to select different working conditions by using the jumpers:Note:Please note that jumpers S1, S12 and S13 are already soldered on the demonstrationboard, and it is not necessary to change them. Refer to the schematic to check their proper connection.●External bypass connections for the linear regulator LDO5(V5SW)●SMPS frequency selection (FSEL)Table 3.Jumper S11 (connect V5SW pin to S11)Position LDO5 working conditionsOUT5VWhen the main ouput voltage is greater than the bootstrap-switchover threshold, an internal 3 Ω(max) P-channel MOSFET switch connects the V5SW pin to the LDO5 pin, shutting down the LDO5 internal linear regulator. If not used, it must be connected to ground.SGNDThe internal linear regulator LDO5 is always on. In this case LDO5supplies all gate drivers and the internal circuitry. It can provide an output peak current of 100mA.EXT5VThe internal linear regulator LDO5 remains off if an alternative 5 V external voltage is applied to the EXT5V test-point. An internal 3 Ω (max) P-channel MOSFET switch connects the V5SW pin to the LDO5 output. The gate drivers and internal circuitry are supplied by the same 5 V external voltage applied.Table 4.Jumper S3 (connect FSEL pin to S3)Position SMPS OUT1SMPS OUT2SGND200 kHz325 kHzVREF290 kHz425 kHzLDO5390 kHz590 kHzJumper settings AN282916/32●SMPS mode selection (skip)Table 5.Jumper S10 (connect SKIP pin to S10)Position Switching operating modeGNDIf the SKIP pin is tied to ground, pulse-skip mode occurs at light loads. Azero crossing comparator prevents the inductor current from goingnegative.VREFConnecting the SKIP pin to the VREF pin enables pulse skip mode with aminimum switching frequency of approximately 25 kHz (ultrasonic mode).LDO5If the SKIP pin is tied to 5 V, fixed PWM mode occurs. The switching outputis in a position to sink and source current from the load.AN2829Feedback output connections17/3210 Feedback output connections●Loop compensation network for very low output voltage ripple.●Loop compensation network for high output voltage rippleTable 6.Jumper S4, S5Position Output ripple compensationShortVirtual ESR output ripple is generated by using a compensation network connectedbetween the output and the PHASE pin of the switching section.Table 7.Jumper S8, S9PositionFeedback connectionController feedback signal connected to the compensation network.Table 8.Jumper S4, S5Position Output ripple compensation OpenESR output ripple is used.Table 9.Jumper S8, S9PositionFeedback connectionController feedback signal connected directly to the output capacitor.11 Test setup and performance summarysetup11.1 TestThe PM6681A demonstration board has the following input/output connections:–12 V input through J5-J2 (V IN+ and V IN-)– 1.5 V SMPS output through J4-J13 (OUT1+ and OUT1-)– 1.05 V SMPS output through J1-J12 (OUT2+ and OUT2-)– 3.3 V linear regulator output through LDO_ADJ - J10– 5 V linear regulator output through LDO5 - J3 (LDO5)– A power supply capable of supplying at least 6 A should be connected to V IN+, V IN- and two active loads should be connected respectively to OUT1+, OUT1- andOUT2+, OUT2-.Figure 7.Setup connectionsAM01413v1 11.2 Power-upAs shown in Figure8, power-up starts when the input voltage is applied and the voltage onthe SHDN pin is above the device on threshold (1.5 V). First the LDO5 goes up with amasking time of about 4 ms. If the LDO5 output is above the UVLO threshold at this time,the device enters standby mode and the adjustable internal linear regulator LDO is turnedon.18/32Figure 8.REF, LDO5 and LDO power-upAM01414v111.3 Soft-start and shutdown waveformsFigure9, 10, 11 and 12 show, respectively, the soft-start and shutdown waveforms.The PM681A has an independent internal digital soft-start for each switching section.During the soft-start phase the internal current limit increases from 25% to 100% with stepsof 25% to avoid the inductor current rising abruptly.19/32Figure 9.Section 1 soft-start waveformsOUT1I_LEN1AM01415v1 Figure 10.Section 2 soft-start waveformsOUT2I_LEN2AM01416v1 Driving the EN1, EN2 pins below the EN off threshold (0.8 V), the switching outputs areconnected to ground through an internal 12 Ω P-MOSFET and are discharged gradually,(discharge mode). When the output voltages reach 0.3 V, the low-side MOSFETs are turnedon, quickly discharging them to ground.20/32Figure 11.Section 1 shutdown waveformsOUT1Lg a te1EN1AM01417v1 Figure 12.Section 2 shutdown waveformsOUT2Lg a te2EN2AM01418v111.4 1.5 V and 1.05 output efficiency vs. load currentFigure13 and 14 show the efficiency versus load current at different input voltage values inPWM mode, skip mode and no audible skip mode. Three different input voltages are used:●Blue: V IN=9 V●Green: V IN=12 V●Red: V IN=18 V21/3211.5 Power consumption analysisTo measure the consumption of the device in real working conditions, an external powersupply of +5 V is connected to EXT5V.The two traces on the following figures show the differentiation in the two input currents.Once the internal linear regulator is turned on, the device consumption increases.Figure15shows the input current consumption measured at V IN+ (including ISHDN) andthe input device current consumption measured by the VCC pin. Both switching sectionswork in forced PWM mode. No load is applied on the outputs.22/32Figure16shows the input current consumption measured at V IN+. Both switching sections work in pulse skip mode. No load is applied on the outputs.Figure17 shows the input current consumption measured at V IN+. Both switching sections work in no audible skip mode. No load is applied on the outputs.23/32In the following figures, the device current consumption is measured in shutdown mode. Inshutdown mode all outputs are off (SHDN pin low). In standby mode only the linearregulators output are on (V5SW=SGND; SHDN pin high; EN5, EN3 pins low).24/32frequency vs. load current11.6 SwitchingFigure20 and 21show the switching frequency variation with the load current in PWMmode, skip mode and no audible skip mode. 12 V is applied at the V IN+ and V IN- test points.25/32output voltages vs. output current11.7 LinearregulatorFigure22 and 23 show the load regulation respectively for the internal linear regulatorsLDO5 and the adjustable linear regulator LDO_ADJ. Both switching sections are disabled.12 V is applied at the V IN+ and V IN- test points.Figure 22.LDO5 output vs. load currentAM01428v126/3227/32Figure 23.ADJ_LDO load regulation11.8 Load transient responseThe following figures show the load transient response from 1 A to 4 A for both switchingoutputs. In both cases the PM6681A works in forced PWM mode (the SKIP pin is high).Figure 24.SMPS 1.5 V load transient responseAM01429v1OUT1I_LVPh as eAM01430v1Figure 25.SMPS 1.05 V load transient responseOUT2I_LVph as eAM01431v1 28/32AN2829Representative waveforms29/3212 Representative waveformsThe following figures show the relevant waveforms of a switching section, to underline thebehavior of the device in different working conditions: pulse skip mode, no-audible skip mode and forced PWM mode.Figure 26.SMPS pulse skip modeFigure 27.SMPS no-audible skip modeAM01432v1AM01433v1Representative waveforms AN282930/32Figure 28.SMPS PWM modeAM01434v1AN2829Revision history 31/3213 Revision history Table 10.Document revision history DateRevision Changes25-Feb-20091Initial releaseAN282932/32Please Read Carefully:Information in this document is provided solely in connection with ST products. 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