BZW04P28中文资料
Z8F082APJ020SG2156中文资料(zilog)中文数据手册「EasyDatasheet - 矽搜」
高性能8位微控制器Z8喝采！ XP®F082A 列产品规格PS022825-0908版权所有©2008 Zilog公司®公司防护留所有权利.警告：不要使用生命支持生命支持政策ZiLOG产品不得用作生命中关键部件支持设备或系统未经事先书面批准主席和ZILOG股份有限公司总法律顾问.如本文所用生命支持设备或系统是其中（a）打算通过外科手术移植到体内设备,或（b）支持或维持生命,其未履行时,正确使用符合在标签规定使用说明可以合理预期到导致显著伤害使用者.关键部件是在生命支持设备或系统,其不履行可以合理预期造成生命支持设备或系统故障或影响其安全性或效力任何部件.文档免责声明©2008 Zilog公司防护留所有权利.本出版物中关于设备信息,应用程序,或技术描述意在暗示可能用途,并且可以被替代. ZILOG,INC.不承担赔偿责任或提供精度表示资料,设备或技术描述这份文件.作者：Z I L O G A L S O D O E S N O T A S S U M E L I A B I L I T Y F O R I N T E L L E C T U A L P R O P E RT Y 侵权相关以任何方式使用信息,设备或技术此处描述或以其他方式.在本文档中包含信息已经根据机电工程基本原则得到验证.Z8,Z8喝采！和Z8喝采！ XP注册Zilog公司商标.所有其它产品或服务名称均为其各自所有者财产.PS022825-0908iii 修订记录在修订历史记录每个实例反映更改这个文件从以前版本.更多细节,请参见相应页面和适当链接在下表.Date 九月2008修订Level25描写页码增加引用F042A系列回3, 9, 16, 19, 37,251in表1,适用货物,表5,表7,表13,订购信息部分.更改标题Z8喝采！ XP F082A系列并删除引用F042A系列表1,适用货物,表5,表7,表13,订货信息部分.更新图3中,表14,表58通过表60.All2008年5月24十二月2007 2007年7月232210, 41,and95更新表15and表128.更新44, 221功率消耗在电特点一章.修订版本号更新.All2007年6月21PS022825-0908修订记录iv 目录概述. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1特征 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .部分选择指南. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .框图. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .CPU和外设概述. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .eZ8 CPU功能. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10位模拟数字转换器. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .低功耗运算放大器. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .内部精密振荡器. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .温度感应器 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .模拟比较器. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .外部晶体振荡器. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .低电压检测. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .片上调试. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .通用异步接收器/发送器. . . . . . . . . . . . . . . . . . . . . . .计时器. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .通用输入/输出. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .直接驱动LED. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .闪存控制器. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .非易失性数据存储. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .中断控制器. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .复位控制器. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 2 4 5 5 5 6 6 6 6 6 6 6 7 7 7 7 7 7 8 8引脚说明. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9可用软件包. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9引脚配置. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9信号说明. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11引脚特性. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13地址空间. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15寄存器文件. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .程序存储器. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .数据存储器. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .闪光信息区. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 15 17 17寄存器映射. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 PS022825-0908目录v 复位,停止模式恢复和低电压检测. . . . . . . . . . . . . . 23复位类型. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .复位源. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .上电复位. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .电压欠压复位. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .看门狗定时器复位. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .外部复位输入. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .外部复位指示灯. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .片上调试启动重置. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .停止模式恢复. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .停止模式恢复使用看门狗定时器超时. . . . . . . . . . . . . . .停止模式恢复使用GPIO端口引脚过渡. . . . . . . . . . . . . . .停止模式恢复使用外部复位引脚. . . . . . . . . . . . . . . . .低电压检测. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .复位寄存器定义. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 25 25 26 27 27 28 28 28 29 29 30 30 30低功耗模式. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33STOP模式. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . HALT模式. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .圆周级功率控制. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .功率控制寄存器定义. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 34 34 34通用输入/输出. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37GPIO端口可用性通过设备. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .建筑. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GPIO备用功能. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .直接驱动LED. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .共享复位引脚. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .共享调试引脚. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .晶体振荡器替代. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 V容差. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .外部时钟设置. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GPIO中断. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GPIO控制寄存器定义. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .端口A-D地址寄存器. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .端口A-D控制寄存器. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .端口A-D数据方向分寄存器. . . . . . . . . . . . . . . . . . . . . . . . . . .端口A-D备用功能子登记. . . . . . . . . . . . . . . . . . . . . . . .37 38 38 39 39 39 40 40 40 45 45 46 46 47 47PS022825-0908目录。
24LC04中文资料
TABLE 1-1: PIN FUNCTION TABLE
Name
VSS SDA SCL WP VCC A0, A1, A2
Function
Ground Serial Address/Data I/O Serial Clock Write Protect Input +2.5V to 5.5V Power Supply No Internal Connection
TABLE 1-2: DC CHARACTERISTICS
VCC = +2.5V to +5.5V Commercial (C): Tamb = 0˚C to +70˚C Industrial (I): Tamb = -40˚C to +85˚C
Parameter
Symbol
Min
Max Units
TABLE 1-3: AC CHARACTERISTICS
Parameter
Symbol
STANDARD MODE
VCC = 4.5 - 5.5V FAST MODE Units
Remarks
Min Max Min Max
Clock frequency
FCLK
—
100
—
400 kHz
Clock high time
—
10M
—
10M
— cycles 25°C, Vcc = 5.0V, Block Mode
元器件交易2网4LwwCw.c0ec4b2Bb.c/o0m8B
1.0 ELECTRICAL CHARACTERISTICS
1.1 Maximum Ratings*
VCC...................................................................................7.0V All inputs and outputs w.r.t. VSS .............. -0.3V to VCC + 1.0V Storage temperature ..................................... -65˚C to +150˚C Ambient temp. with power applied ................ -65˚C to +125˚C Soldering temperature of leads (10 seconds) ............. +300˚C ESD protection on all pins ..................................................≥ 4 kV *Notice: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
TA2024B中文资料
TA2024B中⽂资料TA2024BSTEREO 15W (4?) CLASS-T? DIGITAL AUDIO AMPLIFIER USING DIGITAL POWER PROCESSING? TECHNOLOGYT e c h n i c a l I n f o r m a t i o n R e v i s i o n 1.2 – J a n u a r y 2006G E N E R A L D E S C R I P T I O NThe TA2024B is a 15W/ch continuous average two-channel Class-T Digital Audio Power Amplifier IC using Tripath’s proprietary Digital Power Processing? technology. Class-T amplifiers offer both the audio fidelity of Class-AB and the power efficiency of Class-D amplifiers.A P P L I C A T I O N SComputer/PC Multimedia DVD PlayersCable Set-Top Products TelevisionsVideo CD PlayersBattery Powered SystemsB E N E F I T SFully integrated solution with FETs Easier to design-in than Class-DReduced system cost with no heat sinkDramatically improves efficiency versus Class-ABSignal fidelity equal to high quality linearamplifiersHigh dynamic range compatible with digitalmedia such as CD, DVD, and Internet audioF E A T U R E SClass-T architecture Single Supply Operation “Audiophile” Quality Sound0.03% THD+N @ 9W, 4? 0.10% IHF-IM @ 1W, 4? 11W @ 4?, 0.1% THD+N 6W @ 8?, 0.1% THD+N High Power15W @ 4?, 10% THD+N 10W @ 8?, 10% THD+N High Efficiency81% @ 15W, 4? 90% @ 10W, 8? Dynamic Range = 98 dB Mute and Sleep inputsTurn-on & turn-off pop suppression Over-current protectionOver-temperature protection Bridged outputs36-pin Power SOP packageA B S O L U T E M A X I M U M R A T I N G S (Note 1)TYPICAL PERFORMANCENote 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Note 2: See Power Dissipation Derating in the Applications Information section.O P E R A T I N G C O N D I T I O N S(Note 4)Note 3: Recommended Operating Conditions indicate conditions for which the device is functional. See Electrical Characteristics for guaranteed specific performance limits.T H E R M A L C H A R A C T E R I S T I C SE L E C T R I C A L C H A R A C T E R I S T I C SSee Test/Application Circuit. Unless otherwise specified, V DD = 12V, f = 1kHz, Measurement Bandwidth = 22kHz, R L = 4?, T A = 25 °C, Package heat slug soldered to 2.8 square-inch PC pad.Note: Minimum and maximum limits are guaranteed but may not be 100% tested.P I N D E S C R I P T I O NT A 2024B P I N O U TFAULTPGND2NC NC VDD2OUTM2OUTM1VDD1NC VDDA NC PGND1CPUMP DCAP2AGND3BIASCAP INV2OAOUT2MUTE INV1OAOUT1V5A AGND2OVERLOADBREF AGND1V5DDCAP136-pin Power SOP Package(Top View)+5VGEN OUTP1VDD1VDD2OUTP2DGND NC SLEEPPin Function Description2, 3DCAP2, DCAP1Charge pump switching pins. DCAP1 (pin 3) is a free running 300kHz square wave between VDDA and DGND (12Vpp nominal). DCAP2 (pin 2) is level shifted 10 volts above DCAP1 (pin 3) with the same amplitude (12Vpp nominal), frequency, and phase as DCAP1. 4, 9 V5D, V5A Digital 5VDC, Analog 5VDC 5, 8, 17 AGND1, AGND2,AGND3 Analog Ground6 REFInternal reference voltage; approximately 1.0 VDC.7 OVERLOADB A logic low output indicates the input signal has overloaded the amplifier. 10, 14 OAOUT1, OAOUT2Input stage output pins.11, 15 INV1, INV2Single-ended inputs. Inputs are a “virtual” ground of an inverting opamp with approximately 2.4VDC bias.12 MUTE When set to logic high, both amplifiers are muted and in idle mode. When low (grounded), both amplifiers are fully operational. If left floating, the device stays in the mute mode. This pin should be tied to GND if not used. 16 BIASCAP Inputstage bias voltage (approximately 2.4VDC).18 SLEEP When set to logic high, device goes into low power mode. If not used, this pin should be grounded19FAULTA logic high output indicates thermal overload, or an output is shorted to ground, or another output.20, 35 PGND2, PGND1 Power Grounds (high current)22 DGND Digital Ground. Connect to AGND locally (near the TA2024B). 24, 27; 31, 28 OUTP2 & OUTM2; OUTP1 & OUTM1 Bridged output pairs25, 26, 29, 30 VDD2, VDD2 VDD1, VDD1 Supply pins for high current H-bridges, nominally 12VDC. 13, 21, 23, 32, 34NC Not connected. Not bonded internally. 33 VDDA Analog 12VDC 36 CPUMP Charge pump output (nominally 10V above VDDA) 1 5VGEN Regulated 5VDC source used to supply power to the input section (pins 4 and 9).A P P L I C A T I O N /T E S T C I R C U I TAll Diodes Motorola MBRS130T3* Use C o = 0.22µF for 8 Ohm loadsNote: Analog and Digital/Power Grounds must be connected locally at the TA2024BAnalog Ground Digital/Power GroundE X T E R N A L C O M P O N E N T S D E S C R I P T I O N(Refer to the Application/Test Circuit)T Y P I C A L P E R F O R M A N C EA P P L I C A T I O N I N F O R M A T I O NL a y o u t R e c o m m e n d a t i o n sThe TA2024B is a power (high current) amplifier that operates at relatively high switchingfrequencies. The outputs of the amplifier switch between the supply voltage and ground at high speeds while driving high currents. This high-frequency digital signal is passed through an LC low-pass filter to recover the amplified audio signal. Since the amplifier must drive the inductive LC output filter and speaker loads, the amplifier outputs can be pulled above the supply voltage and below ground by the energy in the output inductance. To avoid subjecting the TA2024B to potentially damaging voltage stress, it is critical to have a good printed circuit board layout. It is recommended that Tripath’s layout and application circuit be used for all applications and only be deviated from after careful analysis of the effects of any changes. Please contact TripathTechnology for further information regarding reference design material regarding the TA2024B.O u t p u t S t a g e l a y o u t C o n s i d e r a t i o n s a n d C o m p o n e n t S e l e c t i o n C r i t e r i a Proper PCB layout and component selection is a major step in designing a reliable TA2024Bpower amplifier. The supply pins require proper decoupling with correctly chosen components to achieve optimal reliability. The output pins need proper protection to keep the outputs from going below ground.The above layout shows ideal component placement and routing for channel 1 (the same design criteria applies to channel 2). This shows that C3, a 0.1uF surface mount 0805 capacitor, should be the first component placed and must decouple VDD1 (pins 29 and 30) directly to PGND1(pin35). C2, a low ESR, electrolytic capacitor, should also decouple VDD1 directly to PGND1.Both C2 and C3 may decouple VDD1 to a ground plane, but it is critical that the return path to the PGND1 pin of theTA2024B, whether it is a ground plane or a trace, be a short and direct low impedance path. Effectively decoupling VDD will shunt any power supply trace length inductance.The diodes and inductors shown are for channel 1’s outputs. D1 and L2 connect to the OUTP1 pin and D2 and L3 connect to the OUTM1 pin of the TA2024B. Each output must have a Schottky or Ultra Fast Recovery diode placed near the TA2024B, preferably immediately after thedecoupling capacitors and use short returns to PGND1. These low side diodes, D1 and D2, will prevent the outputs from going below ground. To be optimally effective they must have a short and direct return path to its proper ground pin (PGND1) of the TA2024B. This can be achieved with a ground plane or a trace.The output inductors, L2 and L3, should be placed close to the TA2024B without compromising the locations of the closely placed supply decoupling capacitors and output diodes. The purposeof placing the output inductors close to the TA2024B output pins is to reduce the trace length of the switching outputs. This will aid in reducing radiated emissions.Please see the External Component Description section on page 6 for more details on the above-mentioned components. The Application/ Test Circuit refers to the low side diodes as D O , The high side diodes as D H , and both supply decoupling capacitors as C SW .T A 2024B A m p l i f i e r G a i nThe ideal gain of the TA2024B is set by the ratio of two external resistors, R I and R F , and is given by the following formula: IF I O R R12V V ?=where V I is the input signal level and V O is the differential output signal level across the speaker. Please note that V O is 180° out of phase with V I .The ideal gain of the TA2024B is 12V/V, whereas typical values are: A V = 11.5V/V for 4? and 11.7V/V for 8?.P r o t e c t i o n C i r c u i t sThe TA2024B is guarded against over-temperature and over-current conditions. When thedevice goes into an over-temperature or over-current state, the FAULT pin goes to a logic HIGH state indicating a fault condition. When this occurs, the amplifier is muted, all outputs are TRI-STATED, and will float to 1/2 of V DD .O v e r -t e m p e r a t u r e P r o t e c t i o nAn over-temperature fault occurs if the junction temperature of the part exceeds approximately 155°C. The thermal hysteresis of the part is approximately 45°C, therefore the fault will automatically clear when the junction temperature drops below 110°C.O v e r -c u r r e n t P r o t e c t i o nAn over-current fault occurs if more than approximately 7 amps of current flows from any of the amplifier output pins. This can occur if the speaker wires are shorted together or if one side of the speaker is shorted to ground. An over-current fault sets aninternal latch that can only be cleared if the MUTE pin is toggled or if the part is powered down. Alternately, if the MUTE pin is connected to the FAULT pin, the HIGH output of the FAULT pin will toggle the MUTE pin and automatically reset the fault condition.O v e r l o a dThe OVERLOADB pin is a 5V logic output. When low, it indicates that the level of the input signal has overloaded the amplifier resulting in increased distortion at the output. The OVERLOADB signal can be used to control a distortion indicator light or LED through a simple buffer circuit, as the OVERLOADB cannot drive an LED directly.S l e e p P i nThe SLEEP pin is a 5V logic input that when pulled high (>3.5V) puts the part into a low quiescent current mode. This pin is internally clamped by a zener diode to approximately 6V thus allowing the pin to be pulled up through a large valued resistor (1meg ? recommended) to V DD . To disable SLEEP mode, the sleep pin should be grounded.F a u l t P i nThe FAULT pin is a 5V logic output that indicates various fault conditions within the device.These conditions include: low supply voltage, low charge pump voltage, low 5V regulator voltage, over current at any output, and junction temperature greater than approximately 155°C. All faults except overcurrent all reset upon removal of the condition. The FAULT output is capable of directly driving an LED through a series 2k ? resistor. If the FAULT pin is connected directly to the MUTE input an automatic reset will occur in the event of an over-current condition.P o w e r D i s s i p a t i o n D e r a t i n gFor operating at ambient temperatures above 25°C the device must be derated based on a 150°C maximum junction temperature, TJMAX as given by the following equation:JAA JMAXDISS )T T (P θ?=where…PDISS = maximum power dissipationTJMAX = maximum junction temperature of TA2024B TA = operating ambient temperatureθJA = junction-to-ambient thermal resistance Where θJA of the package is determined from the following graph:In the above graph Copper Area is the size of the copper pad on the PC board to which the heat slug of the TA2024B is soldered. The heat slug must be soldered to the PC Board to increase the maximum power dissipation capability of theTA2024B package. Soldering will minimize the likelihood of an over-temperature fault occurring during continuous heavy load conditions. The vias used for connecting the heatslug to the copper area on the PCB should be 0.013” diameter.P e r f o r m a n c e M e a s u r e m e n t s o f t h e T A 2024BThe TA2024B operates by generating a high frequency switching signal based on the audio input. This signal is sent through a low-pass filter (external to the Tripath amplifier) that recovers an amplified version of the audio input . The frequency of the switching pattern is spread spectrum and typically varies between 100kHz and 1.0MHz, which is well above the 20Hz –20kHz audio band. The pattern itself does not alter or distort the audio input signal but it does introduce some inaudible components.J AThe measurements of certain performance parameters, particularly noise related specifications such as THD+N, are significantly affected by the design of the low-pass filter used on the output as well as the bandwidth setting of the measurement instrument used. Unless the filter has a very sharp roll-off just beyond the audio band or the bandwidth of the measurement instrument is limited, some of the inaudible noise components introduced by the Tripath amplifiers switching pattern will degrade the measurement.One feature of the TA2024B is that it does not require large multi-pole filters to achieve excellent performance in listening tests, usually a more critical factor than performance measurements. Though using a multi-pole filter may remove high-frequency noise and improve THD+N type measurements (when they are made with wide-bandwidth measuring equipment), these same filters degrade frequency response. The TA2024B Evaluation Board uses the Test/Application Circuit in this data sheet, which has a simple two-pole output filter and excellent performance in listening tests. Measurements in this data sheet were taken using this same circuit with a limited bandwidth setting in the measurement instrument.P A C K A G E I N F O R M A T I O NThe package for the TA2024B is a 36-Lead Power Small Outline Package (PSOP), similar to JEDEC outline MO-166, variation AE. Tripath currently has two suppliers for this package. We recommend that the exposed copper heatslug width for the PCB design be at least 7.3mm wide to accommodate the heatslug width variation for each package. Package dimensions are based on millimeters. Measurements in inches are provided as reference only.Outline and mechanical data for PSOP36DIM MIN MAX DIM MIN MAXBSCE1 11.00A - 3.600A1 0.100 - E2 - 2.900 A2 3.000 3.300 E3 6.300 7.300 A3 0.025 0.152 E4 2.700 2.900BSC E5 - 1.000D 15.90D1 9.000 13.000 L 0.800 1.100REF D2 - 1.100 L1 1.60D3 - 1.000 L2 0.350BSCE 14.200 BSC All DIM measured in mmThis is a product in development. Tripath Technology, Inc. reserves the right to make any changes without further notice to improve reliability, function and design.Tripath and Digital Power Processing are trademarks of Tripath Technology. Other trademarks referenced in this document are owned by their respective companies.Tripath Technology, Inc. reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Tripath does not assume any liability arising out of the application of use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.TRIPATH’S PRODUCT ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFESUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN CONSENT OF THEPRESIDENT OF TRIPATH TECHONOLOGY, INC.As used herein:1. Life support devices or systems are devices or systems which, (a) are intended for surgical implantinto the body, or (b) support or sustain life, and whose failure to perform, when properly used inaccordance with instructions for use provided in this labeling, can be reasonably expected to resultin significant injury of the user.2. A critical component is any component of a life support device or system whose failure to performcan be reasonably expected to cause the failure of the life support device or system, or to affect itssafety or effectiveness.C o n t a c t I n f o r m a t i o nT R I P A T H T E C H N O L O G Y,I N C2560 Orchard Parkway, San Jose, CA 95131408.750.3000 - P408.750.3001 - FFor more Sales Information, please visit us @ /doc/7caf2e651eb91a37f1115cf3.html /cont_s.htm For more Technical Information, please visit us @ /doc/7caf2e651eb91a37f1115cf3.html /data.htm。
BAT68-04W中文资料
Silicon Schottky Diodes• For mixer applications in the VHF / UHF range • For high-speed switching applications • Pb-free (RoHS compliant) package 1)•Qualified according AEC Q101BAT68BAT68-06BAT68-06WBAT68-07WBAT68-08SBAT68-04BAT68-04WESD (E lectro s tatic d ischarge) sensitive device, observe handling precaution!Type Package Configuration L S (nH)Marking BAT68 BAT68-04 BAT68-04W BAT68-06 BAT68-06W BAT68-07W BAT68-08SSOT23 SOT23 SOT323 SOT23 SOT323 SOT343 SOT363single series seriescommon anode common anode parallel pair parallel triple1.8 1.8 1.4 1.8 1.4 1.6 1.483s 84s 84s 86s 86s 87s 83s1Pb-containing package may be available upon special requestMaximum Ratings at T A = 25°C, unless otherwise specifiedParameter Symbol Value Unit Diode reverse voltage V R8V Forward current I F130mATotal power dissipationBAT68, T S≤ 77°CBAT68-04, BAT68-06, T S≤ 61°C BAT68-04W/-06W/-08S, T S≤ 92°C BAT68-07W, T S≤ 89°C P tot150150150150mWJunction temperature T j150°C Storage temperature T stg-55 (150)Thermal ResistanceParameter Symbol Value UnitJunction - soldering point1)BAT68BAT68-04, BAT68-06BAT68-04W-BAT68-06W, BAT68-08S BAT68-07W R thJS≤ 490≤ 590≤ 390≤ 410K/WElectrical Characteristics at T A = 25°C, unless otherwise specifiedParameter Symbol Values Unitmin.typ.max.DC CharacteristicsBreakdown voltageI(BR) = 10 µAV(BR)8--VReverse currentV R = 1 VV R = 1 V, T A = 60 °C I R----0.11.2µAForward voltage I F = 1 mAI F = 10 mA V F-340318390340500mV1For calculation of R thJA please refer to Application Note Thermal ResistanceElectrical Characteristics at T A = 25°C, unless otherwise specifiedParameter Symbol Values Unitmin.typ.max.AC CharacteristicsC T--1pF Diode capacitanceV R = 0 , f = 1 MHzR F--10ΩDifferential forward resistanceI F = 5 mA, f = 10 kHzDiode capacitance C T = ƒ (V R )f = 1MHzDifferential forward resistance r f = ƒ (I F )f = 10kHzReverse current I R= ƒ(V R )T A = ParameterForward current I F = ƒ (V F )T A = ParameterFVForward current I F = ƒ (T S) BAT68IFForward current I F = ƒ (T S)BAT68-04, BAT68-06IForward current I F = ƒ (T S)BAT68-04W, BAT68-06W, BAT68-08SIForward current I F = ƒ (T S)BAT68-07WIPermissible Puls Load R thJS = ƒ (t p )BAT68-04W, BAT68-06W10 10 10 10 K/WR t h JsPermissible Pulse Load I Fmax / I FDC = ƒ (t p )BAT68-04W, BAT68-06WI F m a x /I F DCPermissible Pulse Load I Fmax / I FDC = ƒ (t p )BAT68-07WI F m a x /I F DCPermissible Puls Load R thJS = ƒ (t p )BAT68-07W10 10 10 10 K/WR t h J SRectifier voltage V out = ƒ (V in) f = 900MHzR L = Parameter in kΩ3VTestcircuitEdition 2006-02-01Published byInfineon Technologies AG81726 München, Germany© Infineon Technologies AG 2007.All Rights Reserved.Attention please!The information given in this dokument shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party.InformationFor further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (). WarningsDue to technical requirements components may contain dangerous substances.For information on the types in question please contact your nearestInfineon Technologies Office.Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure ofsuch components can reasonably be expected to cause the failure of thatlife-support device or system, or to affect the safety or effectiveness of thatdevice or system.Life support devices or systems are intended to be implanted in the human body,or to support and/or maintain and sustain and/or protect human life. If they fail,it is reasonable to assume that the health of the user or other personsmay be endangered.。
W78E58B中文手册
? ? ? ? :December 22, 2004
-1-
? ? : SC1
W78E58B
8.3 AC特性................................................................................................................ 25
8.3.1 时钟输入波形...................................................................................................................... 25 8.3.2 程序读取周期...................................................................................................................... 26 8.3.3 数据读取周期...................................................................................................................... 26 8.3.4 数据写周期.......................................................................................................................... 27 8.3.5 端口访问周期...................................................................................................................... 27
佰钰 4848P(N)4865PE主板说明书
佰钰 4848P(N)4865PE主板说明书4848P(N)简介该主板支持socket-478 针封装形式的intel p4 处理器，北桥i848p 芯片最高支持前端总线频率为800/533/400mhz。
另外，板上的i848p北桥支持单通道ddr 400/333/266 drams内存，南桥ich5提供稳定支持ultra ata 100、6声道音频回放、usb2.0/1.1界面和2个serial ata 接口等。
这个架构的最终结果是提供理想的多任务环境以支持如ms-dos, windows, windows nt , windows me, windows 2000, novell, os/2, windows 95/98, windows 98se, windows xp, unix, liunx, sco unix 等操作系统。
此说明书界面友好，详细描述了如何安装、设定和使用该主板，另外还附带有驱动安装和bios设定的详细图解。
附带配件udma66/100 ide设备数据线软驱排线stat连接线附带工具的完整驱动光盘用户说明书i/o面板中央处理器支持频率为800/533/400mhz的前端总线；支持单个socket 478针封装intel p4（northwood核心） 1.6ghz至3.06ghz或更高主频具有ht超线程技术的处理器；支持intel netburst micro-architecture；当使用更高频率的intel cpu时，主板也要使用版本与其同步的bios。
主板最新的bios版本将会在佰钰科技网站上公布。
不支持1.75v（含）电压以上的cpu。
芯片组北桥为intel 848p芯片；南桥为intel ich5芯片。
PCI总线支持5个频率为33mhz的pci总线。
DDR SDRAM 内部存储器支持64/128/256/512/..mb ddr内存条；支持同步400/333/266mhz ddr sdram。
24AA04中文资料
• Self-timed write cycle (including auto-erase)
• Page-write buffer for up to 16 bytes
• 2 ms typical write cycle time for page-write
• Hardware write protect for entire memory
- 10 µA standby current typical at 5.5V
- 3 µA standby current typical at 1.8V
• Organized as 2 or 4 blocks of 256 bytes (2 x 256 x 8) or (4 x 256 x 8)
• 2-wire serial interface bus, I2C™ compatible
7
24AA04/08
14
NC
13
VCC
12
WP
11
NC
10
SCL
9
SDA
8
NC
BLOCK DIAGRAM
WP
HV GENERATOR
I/O CONTROL
LOGIC
MEMORY CONTROL
LOGIC
XDEC
SDA SCL
EEPROM ARRAY PAGE LATCHES
YDEC
VCC
SENSE AMP
元器件交易2网4AwwAw.c0ec4b2/b0.co8m
1.0 ELECTRICAL CHARACTERISTICS
1.1 Maximum Ratings*
VCC...................................................................................7.0V All inputs and outputs w.r.t. VSS .............. -0.6V to VCC +1.0V Storage temperature ..................................... -65˚C to +150˚C Ambient temp. with power applied ................ -65˚C to +125˚C Soldering temperature of leads (10 seconds) ............. +300˚C ESD protection on all pins ..................................................≥ 4 kV *Notice: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
BZ系列标准微动开关 Honeywell
套管安装过行程柱塞式选型表
型号 推荐用于 电气 额定值 BZ-2RQ1 BZ-2RQ1-A2 套管安装，焊接端子 套管安装，螺钉端子 15A 15A O.F. (N) 2.5-3.61 2.5-3.61 R.F.min (N) 1.11 1.11 P.T.max (mm) 0.38 0.38 D.T.min (mm) 5.56 5.56 D.T. (mm) 0.01-0.05 0.01-0.05 O.P. (mm) 21.82 21.82
BZ-2RDS5551-A2 BZ-2RDS-A2-S
防尘和防溅密 封，低成本 防尘和防溅应用
15A 15A
3.61-5.28 3.61-5.28
1.11 1.11
-
1.5 1.5
0.01-0.063 0.01-0.063
28.2 28.2
BA-2RB BA-2RB-A2 BE-2RB-A4
20A 负载，焊接 端子 20A 负载 25A 负载
Honeywell
限 位 开 关
D.T. (mm) 0.01-0.06 0.01-0.06
O.P. (mm) 15.88 15.88
BA-2R BA-2R-A2 BE-2R-A4
20A 负载， 焊接端子 20A 负载 25A 负载
20A 20A 25A
3.89-6.12 3.89-6.12 3.89-6.12
型号 BZ-2RW82-A2 BA-2RV2-A2 BZ-RW922-A2 推荐用于 48.3mm 长金属滚轮压杆 20A 负载 电气 额定值 15A 20A O.F. (N) 0.97 0.97 3.34 R.F.min. (N) 0.21 0.14 1.11 P.T.max (mm) 11.89 0.38 O.T.min (mm) 3.96 1.52 2.54
24C0224C04中文资料
概述
CAT24WC01/02/04/08/16 是 一 个 1K/2K/4K/8K/16K 位 串 行 CMOS E2PROM
128/256/512/1024/2048 个 8 位字节 CATALYST 公司的先进 CMOS 技术实质上减少了器件的功耗 CAT24WC01 有一个 8 字节页写缓冲器 CAT24WC02/04/08/16 有一个 16 字节页写缓冲器 该器件通过 I2C 总线接口进行操作 有一个专门的写保护功能
目 录
1 CSI24WC0 1/02/04/08/16 ……………………………….2-10 2 CSI24WC32/64…………………………………………...11-18 3 CSI24WC128. ……………………………..…………….19-26 4 CSI24WC256. ………………………….….…………….27-34
6
微控实验网 单片机学习开发、电子制作驿站 ｈｔｔｐ：／／ｗｗｗ．ｍｃｕｓｙ．ｃｎ ＱＱ：４７９７８０６６６ ｓｈｅｎｇｌｉｎｗａｎ＠１２６．ｃｏｍ
1 个 CAT24WC16 可单独被系统寻址 从器件 8 位地址的最低位 作为读写控制位 进行读操作 0 表示对从器件进行写操作
1 表示对从器件
图2
写周期时序
w
图3 起始/停止时序
. w w
s u mc
n c . y
器件寻址
主器件通过发送一个起始信号启动发送过程 然后发送它所要寻址的从器件的地址 8 位从器件地 址的高 4 位固定为 1010 见图 5 接下来的 3 位 A2 A1 A0 为器件的地址位 用来定义哪个器件 以及器件的哪个部分被主器件访问 上述 8 个 CAT24WC01/02 4 个 CAT24WC04 2 个 CAT24WC08
德国泰尔汉姆(THALHEIM)编码器手册(中文)
德国泰尔汉姆 (THALHEIM) 编码器、测速电机
增量型编码器 ITD 20 A4
特点：
-- 低成本空心轴增量型编码器 -- 脉冲数：每转可达 512 个脉冲 -- 转矩支架安装 -- TTL- 或 HTL- 信号输出 -- 出线方式：径向或轴向 -- 连接器形式可选
德国泰尔汉姆 (THALHEIM) 编码器、测速电机
增量型编码器 ITD 21 A 4 Y22
特点：
-- 高等级空心轴增量型编码器 -- 脉冲数：每转可达 6000 个脉冲 -- 转矩支架安装 -- TTL- 或 HTL- 信号输出 -- 插座径向 -- 可选贯通空心轴
=A = A 逆向 =B = B 逆向 =N = N 逆向 = + UB = ±0V = + Usensor = ±0V = NC = 外壳
信号输出图
脉冲列： 从轴末端看呈顺时针 转向。（安装面）
型号举例：
ITD20
A4
256
H
BI
KR1
S
14
IP65
01
增量型编码器 ITD 20 设计风格 A4 机械变量 Y…= 参看尺寸图 脉冲数 256 次 / 转 电子输出 UB=8-30VDC HTL- 输出 信号输出 A-,B- 轨 + 逆向 连接方式 电缆 , 径向 , 1m 工作温度 20℃ --70℃ 空心轴直径 14mm 保护等级 IP 65 附件组变量 01
A4
02( 标准 ) ( 参考“附件包”) IP65 ( 据 DIN40 050,IEC529 标准 )
LED 玻璃凹槽盘
≤ 8000rpm ( 受频率限制 )
≤ 0.25mm
≤ 0.1mm
W78E58中文
W78E58B规格书8位微控制器目录:1.概述 (3)2.特性 (3)3.管脚配置 (4)4.管脚描述 (5)5.方块图 (7)6.功能描述 (8)6.1 RAM (8)6.2 定时器0，1，2 (8)6.3 时钟 (9)6.4 晶体振荡器 (9)6.5 外部时钟 (9)6.6 电源管理 (9)6.7 减少EMI辐射 (9)6.8 复位 (9)6.9 I/O口4 (11)6.10 INT2/INT3 (12)6.11 P4口基地址寄存器 (14)6.12 在线编程（ISP）模式 (15)6.13 在线编程控制寄存器（CHPCON） (17)6.14 F04KBOOT 模式（从LDROM启动） (18)7.保密位 (22)7.1 锁止位 (22)禁止 (22)7.2 MOVC7.3 加密 (22)8.电气特性 (23)8.1 绝对最大额定值 (23)8.2 DC特性 (23)出版日期: December 22, 20048.3 AC特性 (25)8.3.1时钟输入波形 (25)8.3.2程序读取周期 (26)8.3.3数据读取周期 (26)8.3.4数据写周期 (27)8.3.5端口访问周期 (27)9.时序波形图 (28)9.1 程序读取周期 (28)9.2 数据读周期 (28)9.3 数据写周期 (29)9.4 端口访问周期 (29)10.典型应用电路 (30)10.1 扩展的外部程序存储器和石英晶体 (30)10.2 扩展的外部程序存储器和振荡器 (31)11.封装尺寸 (32)11.1 DIP40 (32)11.2 44 管脚PLCC (33)11.3 44 管脚PQFP (34)12.应用指南 (35)12.1 ISP 软件编程示例： (35)13.文件版本描述 (42)1. 概述W78E58B是具有带ISP功能的Flash EPROM的低功耗8位微控制器；ISP功能的Flash EPROM可用于固件升级。
wm8978中文介绍说明资料
目录描述 (5)产品特征 (5)立体声多媒体数字信号编译码器： (5)麦克风前置放大： (6)其他特征： (6)应用 (7)引脚结构 (13)引脚描述 (13)绝对最大额定值 (15)推荐的工作条件 (16)信号的时序要求 (17)系统时钟时序 (17)音频接口时序——主模式 (17)音频接口时序——从属模式 (18)控制接口时序——3线模式 (19)控制接口时序——2线模式 (20)芯片描述 (21)绪论 (21)特征 (22)麦克风输入 (22)线输入（AUXL、AUXR） (22)ADC (22)HI-FI DAC (23)输出混合器 (23)音频接口 (23)控制接口 (24)时钟配置 (24)电源控制 (24)信号输入路线 (24)麦克风输入 (25)输入PGA音量控制 (27)辅助输入 (30)输入BOOST (30)麦克风偏置电路 (35)模数转换（ADC） (35)ADC数字滤波 (35)可选的高通滤波器 (37)可调陷波滤波器 (38)数字ADC音量控制 (40)输入限幅器/电平自动控制（ALC） (41)ALC芯片保护 (49)输出信号线路 (50)数字重放（DAC）线路 (51)数字Hi-Fi DAC音量（增益）控制 (53)DAC 5路均衡器 (54)DAC 3D放大 (54)音量推动 (55)5路图表均衡器 (58)3D立体声放大 (61)模拟输出 (62)左和右通道混合器 (63)耳机输出（LOUT1和ROUT1） (68)扬声器输出（LOUT2和ROUT2） (71)零交叉间歇时间 (76)OUT3/OUT4混合和输出 (76)输出使能 (81)过热保护 (82)未使用的模拟输入/输出 (83)数字音频接口 (85)主属和从属操作模式 (85)音频数据模式 (86)音频接口控制 (89)压缩 (91)音频采样率 (93)主时钟和锁相环（PLL） (94)通用的输入/输出 (95)输出开关选择（插座检测） (97)控制接口 (99)控制模式选择和2线模式地址 (99)3线串行控制模式 (99)2线串行控制模式 (100)芯片复位 (101)电源 (101)推荐的上电/断电顺序 (102)电源管理 (102)通过减少过采样率节省电能 (102)VMID (103)BIASEN (103)源电流估算 (103)推荐应用 (104)封装图 (106)WM8978带扬声器驱动的立体声多媒体数字信号编译码器描述WM8978是一个低功耗、高质量的立体声多媒体数字信号编译码器。
常用三极管参数大全
玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理玉林万顺达电脑芯片级维修资料 2010-07-20整理。
W78E058D资料
8-BIT MICROCONTROLLER Table of Contents-1GENERAL DESCRIPTION (4)2FEATURES (5)3PARTS INFORMATION LIST (6)3.1Lead Free (RoHS) Parts information list (6)4PIN CONFIGURATIONS (7)5PIN DESCRIPTIONS (9)6BLOCK DIAGRAM (10)7FUNCTIONAL DESCRIPTION (11)7.1On-Chip Flash EPROM (11)7.2I/O Ports (11)7.3Serial I/O (11)7.4Timers (11)7.4.1Clock (12)7.5Interrupts (12)7.6Data Pointers (12)7.7Architecture (12)7.7.1ALU (12)7.7.2Accumulator (12)7.7.3 B Register (12)7.7.4Program Status Word (12)7.7.5Stack Pointer (13)7.7.6Scratch-pad RAM (13)7.7.7AUX-RAM (13)8MEMORY ORGANIZATION (14)8.1Program Memory (on-chip Flash) (14)8.2Scratch-pad RAM and Register Map (14)8.2.1Working Registers (16)8.2.2Bit addressable Locations (16)8.2.3Stack (16)8.2.4AUX-RAM (16)9SPECIAL FUNCTION REGISTERS (17)9.1SFR Detail Bit Descriptions (19)10INSTRUCTION (37)11INSTRUCTION TIMING (45)12POWER MANAGEMENT (46)12.1Idle Mode (46)12.2Power Down Mode (46)13RESET CONDITIONS (47)Publication Release Date: Feb 15, 201113.1Sources of reset (47)13.1.1External Reset (47)13.1.2Watchdog Timer Reset (47)13.1.3Software Reset (47)13.1.4RESET STATE (47)13.2Interrupt Sources (48)13.3Priority Level Structure (48)13.4Interrupt Response Time (50)13.5Interrupt Inputs (50)14PROGRAMMABLE TIMERS/COUNTERS (52)14.1Timer/Counters 0 & 1 (52)14.2Time-Base Selection (52)14.2.1Mode 0 (52)14.2.2Mode 1 (52)14.2.3Mode 2 (53)14.2.4Mode 3 (54)14.3Timer/Counter 2 (54)14.3.1Capture Mode (54)14.3.2Auto-Reload Mode, Counting up (55)14.3.3Baud Rate Generator Mode (56)15WATCHDOG TIMER (57)16SERIAL PORT (59)16.1MODE 0 (59)16.2MODE 1 (60)16.3MODE 2 (61)17F04KBOOT MODE (BOOT FROM 4K BYTES OF LDROM ) (65)18ISP(IN-SYSTEM PROGRAMMING) (67)19CONFIG BITS (70)20TYPICAL APPLICATION CIRCUITS (72)21ELECTRICAL CHARACTERISTICS (73)21.1Absolute Maximum Ratings (73)21.2 D.C. ELECTRICAL CHARACTERISTICS (74)21.3AC CHARACTERISTICS (75)21.4TIMING waveforms (77)21.4.1Program Fetch Cycle (77)21.4.2Data Read Cycle (78)21.4.3Data Write Cycle (78)21.4.4Port Access Cycle (79)21.4.5Reset Pin Access Cycle (79)22PACKAGE DIMENSIONS (80)22.140-pin DIP (80)22.244-pin PLCC (81)22.344-pin PQFP (82)22.448-pin LQFP (83)23REVISION HISTORY (89)Publication Release Date: Feb 15, 20111 GENERAL DESCRIPTIONThe W78E516D/W78E058D series is an 8-bit microcontroller which has an in-system programmable Flash EPROM for on-chip firmware updating.The instruction sets of the W78E516D/W78E058D are fully compatible with the standard 8052. The W78E516D/W78E058D series contains a 64K/32K bytes of main Flash EPROM and a 4K bytes of auxiliary Flash EPROM which allows the contents of the 64K/32K bytes main Flash EPROM to be up-dated by the loader program located in the 4K bytes Flash EPROM; a 256 bytes of SRAM; 256 bytes of AUXRAM; four 8-bit bi-directional and bit-addressable I/O ports; an additional 4-bit port P4; three 16-bit timer/counters; a serial port. These peripherals are supported by an 8 sources 2-level interrupt capability. To facilitate programming and verification, the Flash EPROM inside the W78E516D/W78E058D series allows the program memory to be programmed and read electronically. Once the code is confirmed, the user can protect the code for security.The W78E516D/W78E058D series microcontroller has two power reduction modes, idle mode and power-down mode, both of which are software selectable. The idle mode turns off the processor clock but allows for continued peripheral operation. The power-down mode stops the crystal oscillator for minimum power consumption. The external clock can be stopped at any time and in any state without affecting the processor.2 FEATURES• Fully static design 8-bit CMOS microcontroller• Optional 12T or 6T mode12T Mode, 12 clocks per machine cycle operation (default), Speed up to 40 MHz/5V6T Mode, 6 clocks per machine cycle operation set by the writer, Speed up to 20 MHz/5V• Wide supply voltage of 2.4 to 5.5V• Temperature grade is (-40o C~85o C)• 64K/32K bytes of in-system programmable FLASH EPROM for Application Program (APROM)• 4K bytes of auxiliary FLASH EPROM for Loader Program (LDROM)• Low standby current at full supply voltage• 512 bytes of on-chip RAM. (include 256 bytes of AUX-RAM, software selectable)• 64K bytes program memory address space and 64K bytes data memory address space• One 4-bit multipurpose programmable port, additional INT2/INT3• Support Watch Dog Timer• Three 16-bit timer/counters• One full duplex serial port• 8-sources, 2-level interrupt capability• Software Reset• Built-in power management with idle mode and power down mode• Code protection• Packages:-Lead Free (RoHS) DIP 40: W78E516DDG-Lead Free (RoHS) PLCC 44: W78E516DPG-Lead Free (RoHS) PQFP 44: W78E516DFG-Lead Free (RoHS) LQFP 48: W78E516DLG-Lead Free (RoHS) DIP 40: W78E058DDG-Lead Free (RoHS) PLCC 44: W78E058DPG-Lead Free (RoHS) PQFP 44: W78E058DFG-Lead Free (RoHS) LQFP 48: W78E058DLGPublication Release Date: Feb 15, 20113 PARTS INFORMATION LIST3.1 Lead Free (RoHS) Parts information listTable 3-1: Lead Free (RoHS) Parts information listPART NO. APROM FLASH SIZE LDROM FLASH SIZERAM PACKAGETemperaturegrade W78E516DDG 512 Bytes DIP-40 Pin W78E516DPG 512 Bytes PLCC-44 Pin W78E516DFG 512 Bytes PQFP-44 Pin W78E516DLG 64K Bytes4K Bytes512 Bytes LQFP-48 Pin -40o C~85o CW78E058DDG 512 Bytes DIP-40 Pin W78E058DPG 512 Bytes PLCC-44 Pin W78E058DFG 512 Bytes PQFP-44 Pin W78E058DLG 32K Bytes4K Bytes512 BytesLQFP-48 Pin-40o C~85o CPublication Release Date: Feb 15, 20114 PIN CONFIGURATIONS1834341401921252728T2EX, P1.1 AD0, P0.0AD2, P0.2AD3, P0.3XTAL1P2.1, A9P2.3, A11P2.4, A12P3.7, RD P3.6, WR5 PIN DESCRIPTIONS* Note : TYPE I: input, O: output, I/O: bi-directional, H: pull-high, L: pull-low, D: open drainPublication Release Date: Feb 15, 20116 BLOCK DIAGRAMFigure 6- 1 W78E516D/W78E058D Block Diagram7 FUNCTIONAL DESCRIPTIONThe W78E516D/W78E058D series architecture consists of a core controller surrounded by various registers, four general purpose I/O ports, one special purpose programmable 4-bits I/O port, 512 bytes of RAM, three timer/counters, a serial port. The processor supports 111 different op-codes and refer-ences both a 64K program address space and a 64 K data storage space.7.1 On-Chip Flash EPROMThe W78E516D/W78E058D series includes one 64K/32K bytes of main FLASH EPROM for applica-tion program (APROM) and one 4K bytes of FLASH EPROM for loader program (LDROM) when op-erating the in-system programming feature. In normal operation, the microcontroller will execute the code from the 64K/32K bytes of main FLASH EPROM. By setting program registers, user can force microcontroller to switch to the programming mode which microcontroller will execute the code (loader program) from the 4K bytes of auxiliary FLASH EPROM, and this loader program is going to update the contents of the 64K/32K bytes of main FLASH EPROM. After reset, the microcontroller executes the new application program in the main FLASH EPROM. This in-system programming feature makes the job easy and efficient in which the application needs to update firmware frequently. In some appli-cations, the in-system programming feature make it possible that the end-user is able to easily update the system firmware by the them without opening the chassis.7.2 I/O PortsThe W78E516D/W78E058D series has four 8-bit ports and one extra 4-bit port. Port 0 can be used as an Address/Data bus when external program is running or external memory/device is accessed by MOVC or MOVX instruction. In these cases, it has strong pull-ups and pull-downs, and does not need any external pull-ups. Otherwise it can be used as a general I/O port with open-drain circuit. Port 2 is used chiefly as the upper 8-bits of the Address bus when port 0 is used as an address/data bus. It also has strong pull-ups and pull-downs when it serves as an address bus. Port1 and 3 act as I/O ports with alternate functions. Port 4 is only available on PLCC/QFP/LQFP package type. It serves as a general purpose I/O port as Port 1 and Port 3. Another bit-addressable bidirectional I/O port P4. P4.3 and P4.2 are alternative function pins. It can be used as general I/O port or external interrupt input sources (INT2/INT3).7.3 Serial I/OThe W78E516D/W78E058D series have one serial port that is functionally similar to the serial port of the original 8032 family. However the serial port on the W78E516D/W78E058D series can operate in different modes in order to obtain timing similarity as well.7.4 TimersTimers 0, 1, and 2 each consist of two 8-bit data registers. These are called TL0 and TH0 for Timer 0, TL1 and TH1 for Timer 1, and TL2 and TH2 for Timer 2. The TCON and TMOD registers provide con-trol functions for timers 0 and 1. The T2CON register provides control functions for Timer 2. RCAP2H and RCAP2L are used as reload/capture registers for Timer 2.The operations of Timer 0 and Timer 1 are the same as in the 8051 CPU. Timer 2 is a special feature of the W78E516D/W78E058D series: it is a 16-bit timer/counter that is configured and controlled by the T2CON register. Like Timers 0 and 1, Timer 2 can operate as either an external event counter orPublication Release Date: Feb 15, 2011as an internal timer, depending on the setting of bit C/T2 in T2CON. Timer 2 has three operating mod-es: capture, auto-reload, and baud rate generator. The clock speed at capture or auto-reload mode is the same as that of Timers 0 and 1.7.4.1 ClockThe W78E516D/W78E058D series are designed to be used with either a crystal oscillator or an ex-ternal clock. Internally, the clock is divided by two before it is used by default. This makes the W78E516D/W78E058D series relatively insensitive to duty cycle variations in the clock.7.5 InterruptsThe Interrupt structure in the W78E516D/W78E058D series is slightly different from that of the stan-dard 8052. Due to the presence of additional features and peripherals, the number of interrupt sources and vectors has been increased. The W78E516D/W78E058D series provides 8 interrupt resources with two priority level, including four external interrupt sources, three timer interrupts, serial I/O inter-rupts.7.6 Data PointersThe data pointer of W78E516D/W78E058D series is same as standard 8052 that have one 16-bit Da-ta Pointer (DPTR).7.7 ArchitectureThe W78E516D/W78E058D series are based on the standard 8052 device. It is built around an 8-bit ALU that uses internal registers for temporary storage and control of the peripheral devices. It can ex-ecute the standard 8052 instruction set.7.7.1 ALUThe ALU is the heart of the W78E516D/W78E058D series. It is responsible for the arithmetic and logi-cal functions. It is also used in decision making, in case of jump instructions, and is also used in calcu-lating jump addresses. The user cannot directly use the ALU, but the Instruction Decoder reads the op-code, decodes it, and sequences the data through the ALU and its associated registers to generate the required result. The ALU mainly uses the ACC which is a special function register (SFR) on the chip. Another SFR, namely B register is also used Multiply and Divide instructions. The ALU generates several status signals which are stored in the Program Status Word register (PSW).7.7.2 AccumulatorThe Accumulator (ACC) is the primary register used in arithmetic, logical and data transfer operations in the W78E516D/W78E058D series. Since the Accumulator is directly accessible by the CPU, most of the high speed instructions make use of the ACC as one argument.7.7.3 B RegisterThis is an 8-bit register that is used as the second argument in the MUL and DIV instructions. For all other instructions it can be used simply as a general purpose register.7.7.4 Program Status WordThis is an 8-bit SFR that is used to store the status bits of the ALU. It holds the Carry flag, the Auxiliary Carry flag, General purpose flags, the Register Bank Select, the Overflow flag, and the Parity flag.7.7.5 Stack PointerThe W78E516D/W78E058D series has an 8-bit Stack Pointer which points to the top of the Stack. This stack resides in the Scratch Pad RAM in the W78E516D/W78E058D series. Hence the size of the stack is limited by the size of this RAM.7.7.6 Scratch-pad RAMThe W78E516D/W78E058D series has a 256 bytes on-chip scratch-pad RAM. This can be used by the user for temporary storage during program execution. A certain section of this RAM is bit address-able, and can be directly addressed for this purpose.7.7.7 AUX-RAMAUX-RAM 0H~255H is addressed indirectly as the same way to access external data memory with the MOVX instruction. The data memory region is from 0000H to 00FFH. Memory MAP shows the mem-ory map for this product series. W78E516D/W78E058D series can read/write 256 bytes AUX RAM by the MOVX instruction.Publication Release Date: Feb 15, 20118 MEMORY ORGANIZATIONThe W78E516D/W78E058D series separate the memory into two separate sections, the Program Memory and the Data Memory. The Program Memory is used to store the instruction op-codes, while the Data Memory is used to store data or for memory mapped devices.Figure 8- 1 Memory Map8.1 Program Memory (on-chip Flash)The Program Memory on the W78E516D/W78E058D series can be up to 64K/32K bytes long. All in-structions are fetched for execution from this memory area. The MOVC instruction can also access this memory region.8.2 Scratch-pad RAM and Register MapAs mentioned before the W78E516D/W78E058D series have separate Program and Data Memory areas. There are also several Special Function Registers (SFRs) which can be accessed by software. The SFRs can be accessed only by direct addressing, while the on-chip RAM can be accessed by either direct or indirect addressing.Indirect RAM AddressingDirect &Indirect RAM AddressingSFR Direct Addressing Only00H7FH80H FFH256 bytes RAM and SFR Data Memory SpaceFigure 8- 2 W78E516D/W78E058D RAM and SFR Memory MapPublication Release Date: Feb 15, 2011Since the scratch-pad RAM is only 256bytes it can be used only when data contents are small. There are several other special purpose areas within the scratch-pad RAM. These are illustrated in next fig-ure.00H07H28H 08H 0FH10H 17H18H 1FH 20H 21H 22H 23H 24H 25H 26H 27H 29H 2AH 2BH 2CH 2DH 2EH 2FH 30H 7FH80H FFHFigure 8- 3 Scratch-pad RAM8.2.1 Working RegistersThere are four sets of working registers, each consisting of eight 8-bit registers. These are termed as Banks 0, 1, 2, and 3. Individual registers within these banks can be directly accessed by separate in-structions. These individual registers are named as R0, R1, R2, R3, R4, R5, R6 and R7. However, at one time the W78E516D/W78E058D series can work with only one particular bank. The bank selec-tion is done by setting RS1-RS0 bits in the PSW. The R0 and R1 registers are used to store the ad-dress for indirect accessing.8.2.2 Bit addressable LocationsThe Scratch-pad RAM area from location 20h to 2Fh is byte as well as bit addressable. This means that a bit in this area can be individually addressed. In addition some of the SFRs are also bit ad-dressable. The instruction decoder is able to distinguish a bit access from a byte access by the type of the instruction itself. In the SFR area, any existing SFR whose address ends in a 0 or 8 is bit address-able.8.2.3 StackThe scratch-pad RAM can be used for the stack. This area is selected by the Stack Pointer (SP), which stores the address of the top of the stack. Whenever a jump, call or interrupt is invoked the re-turn address is placed on the stack. There is no restriction as to where the stack can begin in the RAM. By default however, the Stack Pointer contains 07h at reset. The user can then change this to any value desired. The SP will point to the last used value. Therefore, the SP will be incremented and then address saved onto the stack. Conversely, while popping from the stack the contents will be read first, and then the SP is decreased.8.2.4 AUX-RAMAUX-RAM 0H~255H is addressed indirectly as the same way to access external data memory with the MOVX instruction. Address pointer are R0 and R1 of the selected register bank and DPTR register. A access to external data memory locations higher than 255 will be performed with the MOVX instruction in the same way as in the 8051. The AUX-RAM is disabled after power-on reset. Setting the bit 4 in CHPCON register will enable the access to AUX-RAM.Publication Release Date: Feb 15, 20119 SPECIAL FUNCTION REGISTERSThe W78E516D/W78E058D series uses Special Function Registers (SFRs) to control and monitor peripherals and their Modes. The SFRs reside in the register locations 80-FFh and are accessed by direct addressing only. Some of the SFRs are bit addressable. This is very useful in cases where us-ers wish to modify a particular bit without changing the others. The SFRs that are bit addressable are those whose addresses end in 0 or 8. The W78E516D/W78E058D series contain all the SFRs present in the standard 8052. However some additional SFRs are added. In some cases the unused bits in the original 8052, have been given new functions. The list of the SFRs is as follows. W78E516D/W78E058D Special Function Registers (SFRs) and Reset ValuesF8 FFF0 +B CHPENR F7E8 EFE0 +ACC E7D8 +P4 DF D0 +PSW D7C8 +T2CON RCAP2L RCAP2H TL2 TH2 CFC0 +XICON P4CONA P4CONBSFRAL SFRAH SFRFD SFRCN C7B8 +IP CHPCON BFB0 +P3 P43AL P43AH B7A8 +IE P42AL P42AH P2ECON AFA0 +P2 A798 +SCON SBUF 9F90 +P1 P41AL P41AH 9788 +TCON TMOD TL0 TL1 TH0 TH1 AUXR WDTC 8F 80 +P0 SP DPL DPH P40AL P40AH P0UPR PCON 87Figure 9-1: Special Function Register Location TableNote: 1.The SFRs marked with a plus sign(+) are both byte- and bit-addressable. 2. The text of SFR with bold type characters are extension function registers.Special Function Registers:SYMBOL DEFINITION ADDRESS MSB BIT ADDRESS, SYMBOL LSB RESET CHPENR Chip enable register F6H 1111 0110B BB registerF0H (F7) (F6) (F5) (F4) (F3) (F2) (F1) (F0) 0000 0000B ACC Accumulator E0H (E7) (E6) (E5) (E4) (E3) (E2) (E1) (E0) 0000 0000B P4 Port 4D8H P43 P42 P41 P40 0000 1111B PSWProgram status wordD0H(D7) CY(D6) AC(D5) F0(D4) RS1(D3) RS0(D2) OV(D1) F1(D0) P0000 0000BTH2 T2 reg. high CDH 0000 0000B TL2 T2 reg. low CCH 0000 0000B RCAP2H T2 capture low CBH 0000 0000B RCAP2L T2 capture high CAH 0000 0000B T2CONTimer 2 controlC8H(CF) TF2(CE) EXF2(CD) RCLK(CC) TCLK(CB) EXEN2(CA) TR2(C9) C/T2(C8) CP/RL20000 0000BSFRCN SFR for program control C7H 0000 0000B SFRFD SFR for program dataC6H 0000 0000BSFRAH Port4 base address high register C5H 0000 0000B SFRAL Port4 base address low register C4H 0000 0000B P4CONB Port 4 control B C3H P43FUN1P43FUN0P43CMP1P43COM0P42FUN1P42FUN0P42CMP1 P42CMP2 0000 0000B P4CONAPort 4 control AC2H P41UN1P41FUN0P41CMP1P41COM0P40FUN1P40FUN0P40CMP1 P40CMP2 0000 0000BXICON External interrupt control C0H PX3 EX3 IE3 IT3 PX2 EX2 IE2 IT2 0000 0000BCHPCON Chip ControlBFHSWRESETENAUXRAMFBOOTSL FPROGEN XXX00000B [1]IP Interrupt priorityB8H (BF) -(BE)- (BD) PT2 (BC) PS (BB) PT1 (BA) PX1 (B9) PT0 (B8) PX0 x000 0000BP43AH Port 4.3 comparator high address B5H 0000 0000B P43ALPort 4.3 comparator low addressB4H0000 0000B P3 Port 3 B0H (B7) RD(B6)WR(B5) T1(B4) T0(B3) INT1(B2) INT0(B1) TXD(B0) RXD1111 1111BP2ECON Port 2 expanded control AEHP43CSINVP42CSIN V P41CSIN V P40CSIN V - - 0000 0000BP42AH Port 4.2 comparator high address ADH 0000 0000B P42ALPort 4.3 comparator low addressACH0000 0000B IE Interrupt enable A8H (AF) EA(AE)-(AD) ET2 (AC) ES (AB) ET1 (AA) EX1 (A9) ET0 (A8) EX0 0000 0000BP2 Port 2 A0H (A7) A15(A6)A14(A5) A13(A4) A12(A3) A11(A2) A10(A1) A9(A0) A81111 1111B SBUF Serial buffer 99H xxxx xxxxB SCON Serial control98H(9F) SM0/FE(9E) SM1 (9D) SM2 (9C) REN (9B) TB8 (9A) RB8 (99) TI (98) RI 0000 0000BP41AH Port 4.1 comparator high address 95H 0000 0000B P41ALPort 4.1 comparator low address94H0000 0000B P1 Port 1 90H (97)(96)(95)(94)(93) (92)(91) T2EX(90) T21111 1111B WDTC Watchdog control 8FH ENW CLRW WIDL - -PS2 PS1 PS0 0000 0000BAUXR Auxiliary 8EH ALE_OFF 0000 0110B TH1 Timer high 1 8DH 0000 0000B TH0 Timer high 0 8CH 0000 0000B TL1 Timer low 1 8BH 0000 0000B TL0 Timer low 0 8AH 0000 0000B TMOD Timer mode89H GATE C/T M1 M0 GATE C/T M1 M0 0000 0000BPublication Release Date: Feb 15, 2011TCON Timer control 88H (8F) TF1(8E) TR1 (8D) TF0 (8C) TR0 (8B) IE1 (8A) IT1 (89) IE0 (88) IT0 0000 0000BPCON Power control87H SMOD SMOD0 - POR GF1 GF0 PD IDL 00x1 0000B P0UPR Port 0 pull up option register 86H P0UP 0000 0000B P40AH HI address comparator of P4.0 85H 0000 0000B P40ALLO address comparator of P4.084H0000 0000BDPH Data pointer high 83H 0000 0000B DPL Data pointer low 82H 0000 0000B SP Stack pointer 81H 0000 0111B P0Port 080H(87) (86) (85) (84) (83) (82) (81) (80) 1111 1111B[1]: When CPU in F04KBOOT mode (Ref. P65), CHPCON=1xx0 0000B, other mode the CHPCON=0xx0 0000B9.1 SFR Detail Bit DescriptionsPort 0Bit: 7 6 5 4 3 2 1 0 P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0Mnemonic: P0Address: 80hBIT NAME FUNCTION7-0P0.[7:0]Port 0 is an open-drain bi-directional I/O port. This port also provides a multiplexed low orderaddress/data bus during accesses to external memory.STACK POINTERBit: 7 6 5 4 3 2 1 0 SP.7 SP.6 SP.5 SP.4 SP.3 SP.2 SP.1 SP.0Mnemonic: SPAddress: 81hBIT NAME FUNCTION7-0 SP.[7:0]The Stack Pointer stores the Scratch-pad RAM address where the stack begins. In otherwords it always points to the top of the stack.DATA POINTER LOWBit: 7 6 5 4 3 2 1 0 DPL.7 DPL.6 DPL.5 DPL.4 DPL.3 DPL.2 DPL.1 DPL.0Mnemonic: DPL Address: 82hBIT NAME FUNCTION7-0DPL.[7:0]This is the low byte of the standard 8052 16-bit data pointer.DATA POINTER HIGHBit: 7 6 5 4 3 2 1 0DPH.7 DPH.6 DPH.5 DPH.4 DPH.3 DPH.2 DPH.1 DPH.0 Mnemonic: DPH Address: 83hBIT NAME FUNCTION7-0 DPH.[7:0] This is the high byte of the standard 8052 16-bit data pointer.P4.0 Base Address Low Byte RegisterBit:7 6 5 4 3 2 1 0P40AL.7 P40AL.6 P40AL.5 P40AL.4 P40AL.3 P40AL.2 P40AL.1 P40AL.0 Mnemonic: P40AL Address: 84hBIT NAME FUNCTION7-0 P40AL.[7:0] The Base address register for comparator of P4.0. P40AL contains the low-order byte of address.P4.0 Base Address High Byte RegisterBit:7 6 5 4 3 2 1 0P40AH.7 P40AH.6 P40AH.5 P40AH.4 P40AH.3 P40AH.2 P40AH.1 P40AH.0 Mnemonic:P40AH Address: 85hBIT NAME FUNCTION7-0 P40AH.[7:0] The Base address register for comparator of P4.0. P40AH contains the High-order byte of address.Port 0 Pull up Option RegisterBit:7 6 5 4 3 2 1 0- - - - - - - P0UP Mnemonic: P0UPR Address: 86hBIT NAME FUNCTION0 P0UP 0: Port 0 pins are open-drain.1: Port 0 pins are internally pulled-up. Port 0 is structurally the same as Port 2.Power ControlBit:7 6 5 4 3 2 1 0SMODSMOD0- - GF1GF0PD IDL Mnemonic: PCON Address: 87hBIT NAME FUNCTION7 SMOD 1: This bit doubles the serial port baud rate in mode 1, 2, and 3 when set to 1.6 SMOD0 0: Framing Error Detection Disable. SCON.7 (SM0/FE) bit is used as SM0 (stan-dard 8052 function).1: Framing Error Detection Enable. SCON.7 (SM0/FE) bit is used to reflect asPublication Release Date: Feb 15, 2011Frame Error (FE) status flag. 5 - Reserved4 POR 0: Cleared by software.1: Set automatically when a power-on reset has occurred. 3 GF1 General purpose user flags. 2 GF0 General purpose user flags.1 PD 1: The CPU goes into the POWER DOWN mode. In this mode, all the clocks are stopped and program execution is frozen.IDL1: The CPU goes into the IDLE mode. In this mode, the clocks CPU clock stopped, so program execution is frozen. But the clock to the serial, timer and interrupt blocks is not stopped, and these blocks continue operating.Timer ControlBit: 7 6 5 4 3 2 1 0 TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0Mnemonic: TCONAddress: 88hTimer Mode ControlBit: 7 6 5 4 3 2 1 0Mnemonic: TMOD Address: 89hM1, M0: Mode Select bits:M1 M0 MODE0 0 Mode 0: 8-bit timer/counter TLx serves as 5-bit pre-scale.0 1 Mode 1: 16-bit timer/counter, no pre-scale.1 0 Mode 2: 8-bit timer/counter with auto-reload from THx.1 1 Mode 3: (Timer 0) TL0 is an 8-bit timer/counter controlled by the standard Timer0 controlbits. TH0 is an 8-bit timer only controlled by Timer1 control bits. (Timer 1) Timer/Counter1 is stopped.Timer 0 LSB7 6 5 4 3 2 1 0 Bit:TL0.7 TL0.6 TL0.5 TL0.4 TL0.3 TL0.2 TL0.1 TL0.0 Mnemonic: TL0 Address: 8Ah BIT NAME FUNCTION7-0 TL0.[7:0] Timer 0 LSB.Timer 1 LSB7 6 5 4 3 2 1 0 Bit:TL1.7 TL1.6 TL1.5 TL1.4 TL1.3 TL1.2 TL1.1 TL1.0Publication Release Date: Feb 15, 2011Mnemonic: TL1Address: 8BhBIT NAME FUNCTION 7-0 TL1.[7:0] Timer 1 LSB.Timer 0 MSBBit: 7 6 5 4 3 2 1 0 TH0.7 TH0.6 TH0.5 TH0.4 TH0.3 TH0.2 TH0.1 TH0.0Mnemonic: TH0 Address: 8ChBIT NAME FUNCTION7-0 TH0.[7:0] Timer 0 MSB.Timer 1 MSBBit: 7 6 5 4 3 2 1 0 TH1.7 TH1.6 TH1.5 TH1.4 TH1.3 TH1.2 TH1.1 TH1.0Mnemonic: TH1 Address: 8DhBIT NAME FUNCTION7-0 TH1.[7:0] Timer 1 MSB.AUXRBit: 7 6 5 4 3 2 1 0 - - - - - - - ALE_OFFMnemonic: AUXR Address: 8EhBIT NAME FUNCTION 0 ALE_OFF1: Disable ALE output0: Enable ALE outputWatchdog Timer Control RegisterBit: 7 6 5 4 3 2 1 0ENW CLRW WIDL- - PS2 PS1 PS0Mnemonic: WDTC Address: 8FHBIT NAME FUNCTION7 ENW Enable watch-dog if set.6 CLRW Clear watch-dog timer and Pre-scalar if set. This flag will be cleared automati-cally.5WIDLIf this bit is set, watch-dog is enabled under IDLE mode. If cleared, watch-dog isdisabled under IDLE mode. Default is cleared.2-0 PS2-0 Watch-dog Pre-scalar timer select. Pre-scalar is selected when set PS2−0 as fol-lows:PS2 PS1 PS0 PRE-SCALAR SELECT0 0 0 20 0 1 40 1 0 80 1 1 161 0 0 321 0 1 641 1 0 1281 1 1 256Port 1Bit:7 6 5 4 3 2 1 0P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 Mnemonic: P1 Address: 90h BIT NAME FUNCTION7-0 P1.[7:0] General purpose I/O port. Most instructions will read the port pins in case of a port read access, however in case of read-modify-write instructions, the port latch isread.P4.1 Base Address Low Byte Register7 6 5 4 3 2 1 0 Bit:P41AL.7 P41AL.6 P41AL.5 P41AL.4 P41AL.3 P41AL.2 P41AL.1 P41AL.0 Mnemonic: P41AL Address: 94h BIT NAME FUNCTION7-0 P41AL.[7:0] The Base address register for comparator of P4.1. P41AL contains the low-order byte of address.P4.1 Base Address High Byte Register7 6 5 4 3 2 1 0 Bit:P41AH.7 P41AH.6 P41AH.5 P41AH.4 P41AH.3 P41AH.2 P41AH.1 P41AH.0 Mnemonic: P41AH Address: 95h BIT NAME FUNCTION7-0 P41AH.[7:0] The Base address register for comparator of P4.1. P41AH contains the High-order byte of address.。
BZT52C18中文资料
VOLTAGE RANGE: 2.4 - 39 VPOWER: 0.5Wa t BZT52C2V4 - BZT52C39Planar Die Construction500mW Power Dissipation on Ceramic PCBGeneral Purpose, Medium Current Ideally Suited for Automated AssemblyProcessesFeaturesCharacteristicSymbolValue Unit Forward Voltage (Note 2)@ I F = 10mAV F 0.9V Power Dissipation (Note 1)Pd 500mW Thermal Resistance, Junction to Ambient Air (Note 1)R q JA 305°C/W Operating and Storage Temperature RangeT j,T STG-65 to +150°CNotes:1. Device mounted on ceramic PCB; 7.6mm x 9.4mm x 0.87mm with pad areas 25mm2.2. Short duration test pulse used to minimize self-heating effect.!!!SURFACE MOUNT SILICON ZENER DIODESMaximum Ratings T A = 25°C unless otherwise specified: SOD-123FLplastic body over passivated junction Method 2026: Color band denotes cathode end : AnyCase Terminals Polarity Mounting Position : Plated axial leads,solderable per MIL-STD-750,Mechanical Data!!!!!!Weight:0.0007 ounce, 0.02 grams3.58 3.72 0.55 0.57 0.530.15 0.17 0.13E D 1.00 1.03 0.097 1.05 1.08 1.021 1.80 1.83 1.77 2.75 2.78 2.72A 3.653 SOD-123FLDim Min Max Typ B C H LAll Dimensions in mmHType NumberZener Voltage Range(Note 2)Maximum Zener Impedance (Note 3)Maximum Reverse Current (Note 2)Typical TemperatureCoefficient @I ZTC mV/°C Test Current I ZTC V z @I ZTI ZT Z ZT@I ZTZ ZK @I ZK I ZK I R @ V R Nom (V)Min (V)Max (V)mA WmAuA V Min Max mA BZT52C2V4BZT52C2V7BZT52C3V0BZT52C3V3BZT52C3V6BZT52C3V9BZT52C4V3BZT52C4V7BZT52C5V1BZT52C5V6BZT52C6V2BZT52C6V8BZT52C7V5BZT52C8V2BZT52C9V1BZT52C10BZT52C11BZT52C12BZT52C13BZT52C15BZT52C16BZT52C18BZT52C20BZT52C22BZT52C24BZT52C27BZT52C30BZT52C33BZT52C36BZT52C39Electrical Characteristics@ T A = 25°C unless otherwise specifiedNotes:1. Device mounted on ceramic PCB; 7.6mm x 9.4mm x 0.87mm with pad areas 25mm2.2. Short duration test pulse used to minimize self-heating effect.3. f = 1kHz.2.4 2.2 2.65100600 1.050 1.0-3.5052.7 2.5 2.95100600 1.020 1.0-3.5053.0 2.8 3.2595600 1.010 1.0-3.5053.3 3.1 3.5595600 1.0 5.0 1.0-3.5053.6 3.4 3.8590600 1.0 5.0 1.0-3.5053.9 3.74.1590600 1.0 3.0 1.0-3.5054.3 4.0 4.6590600 1.0 3.0 1.0-3.5054.7 4.45.0580500 1.0 3.0 2.0-3.50.255.1 4.8 5.4560480 1.0 2.0 2.0-2.7 1.255.6 5.26.0540400 1.0 1.0 2.0-2 2.556.8 6.47.251580 1.0 2.0 4.0 1.2 4.556.2 5.8 6.6510150 1.0 3.0 4.00.4 3.757.57.07.951580 1.0 1.0 5.0 2.5 5.358.27.78.751580 1.00.7 5.0 3.2 6.259.18.59.6515100 1.00.5 6.0 3.87.05109.410.6520150 1.00.27.0 4.58.051110.411.6520150 1.00.18.0 5.49.051211.412.7525150 1.00.18.0 6.010.051312.414.1530170 1.00.18.07.011.051513.815.6530200 1.00.110.59.213.051615.317.1540200 1.00.111.210.414.051816.819.1545225 1.00.112.612.416.052018.821.2555225 1.00.114.014.418.052220.823.3555250 1.00.115.416.420.052422.825.6570250 1.00.116.818.422.052725.128.92803000.50.118.921.425.323028.032.02803000.50.121.024.429.423331.035.02803250.50.123.127.433.423634.038.02903500.50.125.230.437.423937.041.021303500.50.127.333.441.220.10.20.30.40.5255075100125150P ,P O W E R D I S S I P A T I O N (W )D T ,AMBIENT TEMPERATURE (C)Fig.1Power Dissipation vs Ambient TemperatureA °0.61020304050012345678910I ,Z E N E R C U R R E N T (m A )Z V ,ZENER VOLTAGE (V)Fig.2Zener Breakdown CharacteristicsZ0102030I ,Z E N E R C U R R E N T (m A )Z V ,ZENER VOLTAGE (V)Fig.3Zener Breakdown CharacteristicsZ 10203040246810102030405060708090100I ,Z E N ER C U R R E N T (m A )Z V ,ZENER VOLTAGE (V)Fig.4Zener Breakdown CharacteristicsZ C ,T O T A L C A P A C I T A N C E (p F )T 101001000V ,NOMINAL ZENER VOLTAGE (V)Fig.5Total Capacitance vs Nominal Zener VoltageZ。
B08说明书
NC-B08车床数控系统用户手册广东省肇庆市凯龙数控科技有限公司智辉数控SYSViV—B08简介●两轴步进/伺服按键运动控制器●320×240点阵图形绿色液晶显示屏，机械按键●32路光耦输入，24路光耦输出，I/O逻辑可编程●2轴AB相脉冲输入●U盘通讯●可在线编程●释教功能功能描述：●2路步进/伺服电机脉冲光耦隔离输出●脉冲输出可用单脉冲（脉冲+方向）或双脉冲（脉冲+脉冲）方式●直线、圆弧插补、连续插补功能●最大进给速度12000mm/min，最大快速15000mm/min●前加减速或S曲线进行加/减速●32位计数（逻辑位置和实际位置）●运动中可实时改变速度●适应性极强的开关电源85~265V AC 45~65Hz。
一般特性：开关量输入：通道：32路，全部光耦隔离。
输入电压：5-24V开关量输出：输出通道：24路，全部光耦隔离。
脉冲输出：通道：2路，脉冲+方向或脉冲+脉冲，全部光耦隔离。
最高脉冲频率：1MHz输出类型：5V差动输出应用环境电源要求：85-265V AC 45-65Hz功 耗：<４W工作温度：0℃～60℃℃℃储存温度：-20·80工作湿度：20%～95%储存湿度：0%～95%应用领域：1～2轴步进/伺服电机控制的应用场合，包括塑胶机械、木工机械、五金加工、首饰加工、焊接、点胶、定位控制等各种行业1 示教功能在手动或手轮方式下，按【示教】键（目前为【图形】键），进入示教模式。
ENTER：示教点确认DEL：删除当前释教点【G】：示教移动G01或G00【F】：示教移动速度F【P】：示教程序号命令：显示当前示教的内容【ESC】：退出当前释教模式，将当前示教内容存入系统。
进入【EDIT】方式，可以打开当前示教的程序。
一次开机，若对于同一个程序，示教内容可以连续。
当换一个程序时，示教将重新开始（行号从1开始）。
示教内容格式：N1 G0 X_ Z_N2 G1 X_ Z_ F_…N100 G1 X_ Z_ F_N101 M22 输入输出控制2.1、输出口控制指令M10、M11M10 P_ 开指定的继电器，执行到该句后，系统使相应的继电器输出口有效。
垫片框式换热器 AQ 线用户手册说明书
Lit. Code200000284-4-ZH-CN操作手册中文由...出版阿法拉伐 Lund AB箱74参观：Rudeboksvägen 1226 55 Lund, 瑞典+46 46 36 65 00+46 46 30 50 90******************The original instructions are in English© Alfa Laval Corporate AB 2021-04本文件及其内容受阿法拉伐集团公司拥有的著作权及其他知识产权权利的保护。
未经阿法拉伐集团公司的事先明确书面许可，任何人不得以任何形式或通过任何方式，或出于任何目的，复制、重新制作或传输本文件的任何内容。
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保留所有权利。
EnglishDownload local language versions of this instruction manual from /gphe-manuals or use the QR codeбългарскиИзтеглете версиите на това ръководство заупотреба на местния език от / gphe-manuals или използвайте QR кода.ČeskýStáhněte si místní jazykovou verzi tohoto návodu k obsluze z /gphe-manuals nebo použijte QR kód.DanskHent lokale sprogversioner af denne brugervejledning på /gphe-manuals eller brug QR-koden.DeutschSie können die landessprachlichen Versionen dieses Handbuch von der Website /gphe-manuals oder über den QR-Code herunterladen.ελληνικάΠραγματοποιήστε λήψη εκδόσεων του παρόντοςεγχειριδίου οδηγιών σε τοπική γλώσσα από το/gphe-manuals ή χρησιμοποιήστετον κωδικό QR.EspañolDescárguese la versión de este Manual de instrucciones en su idioma local desde/gphe-manualso utilice el código QR.EestiSelle kasutusjuhendi kohaliku keele versiooni saate alla laadida lingilt /gphe-manuals või kasutades QR-koodi.SuomalainenLaitaa tämän käyttöohjeen suomenkielinen versio osoitteesta /gphe-manuals tai QR-koodilla.FrançaisTéléchargez des versions de ce manuel d’instructions en différentes langues sur /gphe-manuals ou utilisez le code QR.HrvatskiPreuzmite lokalne verzije jezika ovog korisničkog priručnika na poveznici /gphe-manuals ili upotrijebite QR kod.MagyarAz Ön nyelvére lefordított használati útmutatótletöltheti a /gphe-manuals weboldalról, vagy használja a QR-kódot.ItalianoScarica la versione in lingua locale del manuale di istruzioni da /gphe-manuals oppure utilizza il codice QR.日本の/gphe-manuals からご自分の言語の取扱説明書をダウンロードするか、QRコードをお使いください。
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6.45 6.45 7.13 7.13 7.79 7.79 8.65 8.65 9.50 9.50 10.5 10.5 11.4 11.4 12.4 12.4 14.3 14.3 15.2 15.2 17.1 17.1 19.0 19.0 20.9 20.9 22.8 22.8 25.7 25.7 28.5 28.5 31.4 31.4 34.2 34.2 37.1 37.1 40.9 40.9 44.7 44.7 48.5 48.5 53.2 53.2
(NOTE4)
Test Current at IT (mA)
Stand-off Voltage VWM (Volts)
Maximum Peak Pulse Current IPPM (Amps)
(NOTE 2)
Maximum Clamping Voltage at IPPM VC (Volts)
Maximum Temperature Coefficient of V(BR) (% / C)
1.0 (25.4) MIN. 0.107 (2.7) 0.080 (2.0) DIA.
0.205 (5.2) 0.160 (4.1)
1.0 (25.4) MIN. 0.034 (0.86) 0.028 (0.71) DIA.
NOTE: Lead diameter is 0.026 (0.66)
MECHANICAL DATA
Volts °C
NOTES: (1) Non-repetitive current pulse, per Fig. 3 and derated above TA=25°C per Fig. 2 (2) Mounted on copper pad area of 1.6 x 1.6” (40 x 40mm) per Fig. 5 (3) 8.3ms single half sine-wave or equivalent square wave, duty cycle=4 pulses per minute maximum (4) VF=3.5V max. for devices of V(BR)≤220V and VF=5.0 Volt max. for devices of V(BR)>220V 1/5/98
10.5 10.5 11.3 11.3 12.1 12.1 13.4 13.4 14.5 14.5 15.6 15.6 16.7 16.7 18.2 18.2 21.2 21.2 22.5 22.5 25.2 25.2 27.7 27.7 30.6 30.6 33.2 33.2 37.5 37.5 41.5 41.5 45.7 45.7 49.9 49.9 53.9 53.9 59.3 59.3 64.8 64.8 70.1 70.1 77.0 77.0
0.023 (0.58)
for suffix "E" part numbers
Dimensions are in inches and (millimeters)
Case: JEDEC DO-204AL molded plastic over passivated junction Terminals: Plated axial leads, solderable per MIL-STD-750, Method 2026 Polarity: For unidirectional types the color band denotes the cathode, which is postitive with respect to the anode under normal TVS operation Mounting Position: Any Weight: 0.012 ounce, 0.3 gram
ELECTRICAL CHARACTERISTICS at (TA=25°C unless otherwise noted) TABLE 1
Breakdown Voltage V(BR) Volts (NOTE 1) Device Type MIN MAX Maximum Reverse Leakage at VWM ID (µA)
MAXIMUM RATINGS AND CHARACTERISTICS
Ratings at 25°C ambient temperature unless otherwise specified.
SYMBOL
VALUE
UNITS
Peak pulse power dissipation with a 10/1000µs waveform
10.0 10.0 10.0 10.0 10.0 10.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0
BZW04P-5V8 THRU BZW04-376
TRANSZORB™ TRANSIENT VOLTAGE SUPPRESSOR
Stand-off Voltage - 5.8 to 376 Volts
DO204AL
Peak Pulse Power - 400 Watts
FEATURES
♦ Plastic package has Underwriters Laboratory Flammability Classification 94V-0 ♦ Glass passivated chip junction ♦ 400W peak pulse power capability with a 10/1000µs waveform, repetition rate (duty cycle): 0.01% ♦ Excellent clamping capability ♦ Low incremental surge resistance ♦ Fast response time: typically less than 1.0 ps from 0 Volts to V(BR) for unidirectional and 5.0ns for bi-directional types ♦ Typical ID less than 1µA above 10V rating ♦ High temperature soldering guaranteed: 265°C/10 seconds, 0.375" (9.5mm) lead length, 5lbs. (2.3 kg) tension
(NOTE 4)
1.0
IFSM
40.0
Amps
Maximum instantaneous forward voltage at 25A uni-directional only Operating junction and storage temperature range
VF TJ, TSTG
3.5/5.0 -55 to +175
BZW04P5V8 BZW04-5V8 BZW04P6V4 BZW04-6V4 BZW04P7V0 BZW04-7V0 BZW04P7V8 BZW04-7V8 BZW04P8V5 BZW04-8V5 BZW04P9V4 BZW04-9V4 BZW0P10 BZW04-10 BZW04P11 BZW04-11 BZW04P13 BZW04-13 BZW04P14 BZW04-14 BZW04P15 BZW04-15 BZW04P17 BZW04-17 BZW04P19 BZW04-19 BZW04P20 BZW04-20 BZW04P23 BZW04-23 BZW04P26 BZW04-26 BZW04P28 BZW04-28 BZW04P31 BZW04-31 BZW04P33 BZW04-33 BZW04P37 BZW04-37 BZW04P40 BZW04-40 BZW04P44 BZW04-44 BZW04P48 BZW04-48
1000 1000 500 500 200 200 50.0 50.0 10.0 10.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0
ቤተ መጻሕፍቲ ባይዱ
5.80 5.80 6.40 6.40 7.02 7.02 7.78 7.78 8.55 8.55 9.4 9.4 10.2 10.2 11.1 11.1 12.8 12.8 13.6 13.6 15.3 15.3 17.1 17.1 18.8 18.8 20.5 20.5 23.1 23.1 25.6 25.6 28.2 28.2 30.8 30.8 33.3 33.3 36.8 36.8 40.2 40.2 43.6 43.6 47.8 47.8
38.0 38.0 35.4 35.4 33.0 33.0 30.0 30.0 27.6 27.6 25.7 25.7 24.0 24.0 22.0 22.0 19.0 19.0 17.8 17.8 16.0 16.0 14.5 14.5 13.0 13.0 12.0 12.0 10.7 10.7 9.6 9.6 8.8 8.8 8.0 8.0 7.4 7.4 6.7 6.7 6.2 6.2 5.7 5.7 5.2 5.2
DEVICES FOR BIDIRECTIONAL APPLICATIONS
For bi-directional use add suffix Letter "B" (e.g. BZW04P-6V4B). Electrical characteristics apply in both directions.