M11C-MAIN-1.2

合集下载

DC10600M101_1111_4X(T C N)数据手册说明书

广州大彩光电科技有限公司版权所有版本记录销售与服务广州大彩光电科技有限公司电话：************-601传真：************Email：*************（咨询和支持服务）网站：地址：广州黄埔区（科学城）玉树华新园C栋3楼网络零售官方旗舰店：https://目录1.硬件介绍 (1)1.1产品外观 (1)1.2硬件配置 (2)1.3调试工具 (2)2.产品规格 (3)3.可靠性测试 (6)3.1ESD测试 (6)3.1.1执行标准 (6)3.1.2测试环境 (6)3.1.3测试数据 (6)3.2高低温老化测试 (7)3.2.1测试环境 (7)3.2.2测试数据 (7)3.3群脉冲测试 (8)3.3.1执行标准 (8)3.3.2测试环境 (8)3.3.3测试数据 (8)3.4辐射测试 (8)3.4.1执行标准 (8)3.4.2测试环境 (9)3.4.3测试数据 (9)4.产品尺寸 (11)5.型号定义 (12)6.协议配置 (13)7. LUA脚本配置 (14)8.包装与物理尺寸 (15)9.产品架构 (16)10.开发软件 (17)10.1什么是虚拟串口屏 (17)10.2Keil与虚拟串口屏绑定调试 (18)11.开发文档 (19)12.免责声明 (20)1. 硬件介绍本章节主要介绍产品的一些外观参考图、硬件配置图和调试所需工具。

1.1 产品外观以下为该尺寸不同型号的外观参考图，如图1-1、图1-2、图1-3所示。

注：未涉及关键结构工艺修改或布局大调整，仅产品工艺或可靠性方面的变更迭代，公司不予对外发起变更，具体以收到的实物为准。

图1-1 10.1寸电阻触摸参考图图1-2 10.1寸电容触摸参考图图1-3 10.1寸无触摸参考图1.2 硬件配置以下为该尺寸产品硬件配置参考图，以电容屏举例说明，如图1-4所示。

图1-4硬件配置图1.3 调试工具以下为该产品调试工具参考图，以电容屏举例说明，如图1-5所示。

BOM及条码编码原则详解-0322

BOM简介 BOM简介
BOM的概念 BOM的概念
BOM (Bill Of Material),即产品的组成内容表列. 供物料需求计划(MRP)及各相关单位作业使用之依据.
BOM的用途 BOM的用途新产品设计的基准计算成本的基准 IE安排生产线的重要文件生产制造的标准品质检验的标准物料需求计划的依据降低成本的参考资料进出口税务之参考资料生产发料的资料采购物料的依据
BOM及条码编码原则 BOM及条码编码原则详解
Prepared by:张峰梅 by:张峰梅 2005 03 20
AGENDA: AGENDA:
1. BOM简介简介 1.1 BOM的概念 1.2 BOM的用途 1.3 BOM的系统结构 1.4 BOM的格式 1.5 BOM阅读指南 1.6 常用料号之编码原则 2. 常用条码之编码原则 2.1 PANEL条码 2.2 PCBA条码 2.3 BARCODE LAD MONITOR) 8 B C D E F G H I J K L M
Product type:
Product classification:
Panel Source: 0:CPT 1:Sharp 2:Hitachi 3:Hydis 4:Hannstar 5:CMO 6:Innolux 7:AUO 8:Samsung 9:QDI A:LPL
15: 1. Entry 15”monitor 2. Performance 17: 17”monitor 3. Value 19: 19”monitor
Monitor change or OEM version
Monitor/monipoter good Monitor/monipoter good
BOM的系统结构 BOM的系统结构

IR公司_大功率MOS管选型

I DContinuous Drain Current(A)70°Micro3Surface Mount PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPartNumberPD Max.PowerDissipation (W)N-ChannelLogic LevelIRLML2402*912570.54200.25 1.20.95230H1IRLML2803912580.54300.251.20.93230P-ChannelLogic LevelIRLML6302*912590.54-200.6-0.62-4.8230H1IRLML5103912600.54-300.6-0.61-4.8230* Indicates low VGS(th), which can operate at VGS = 2.7VMeasured at ambient for Micro3, Micro6, Micro8, SO-8, and SOT-223 package styles. All others measured at case.1Micro3SO-8D-PakD -PakSOT-227Micro6SOT-223Micro82 Illustrations not to scaleI DContinuous Drain Current(A)70°Micro6Surface Mount PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPartNumberPD Max.PowerDissipation (W)N-ChannelLogic LevelIRLMS1902915401.7200.10 3.2 2.675H2IRLMS1503915081.7300.103.22.675P-ChannelLogic LevelIRLMS6702*914141.7-200.20-2.3-1.975H2IRLMS5703914131.7-300.20-2.3-1.975* Indicates low VGS(th), which can operate at VGS = 2.7VMeasured at ambient for Micro3, Micro6, Micro8, SO-8, and SOT-223 package styles. All others measured at case.1Micro3SO-8D-PakD -PakSOT-227Micro6SOT-223Micro82 Illustrations not to scaleI DContinuous Drain Current(A)70°Micro8Surface Mount PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart NumberP D Max.PowerDissipation (W)N-Channel Logic LevelIRF7601* 912611.820 0.035 5.7 4.6 70 H3IRF7603 912621.830 0.035 5.6 4.5 70Dual N-Channel Logic LevelIRF7501* 912651.220 0.135 2.4 1.9 100 H3IRF7503 912661.2530 0.135 2.4 1.9 100P-Channel Logic LevelIRF7604* 912631.8-20 0.09 -3.6 -2.9 70 H3IRF7606 912641.8-30 0.09 -3.6 -2.9 70Dual P-Channel Logic LevelIRF7504* 912671.25-20 0.27 -1.7 -1.4 100 H3IRF7506 912681.25-30 0.27 -1.7 -1.4 100Dual N- and P-Channel Logic LevelIRF7507* 912691.2520 0.1352.4 1.9 100 H3-20 0.27 -1.7 -1.4IRF7509 912701.2530 0.135 2.4 1.9 100-30 0.27 -1.7 -1.4* Indicates low VGS(th), which can operate at VGS = 2.7VMeasured at ambient for Micro3, Micro6, Micro8, SO-8, and SOT-223 package styles. All others measured at case.1Micro3SO-8D-Pak D -PakSOT-227Micro6SOT-223Micro8 2 Illustrations not to scaleI DContinuous Drain Current(A)70°SO-8Surface Mount PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart Number P D Max.PowerDissipation (W)N-ChannelIRF7413913302.5300.011139.250H4IRF7413A 916132.5300.0135128.450IRF9410915622.5300.0375.850Dual N-ChannelIRF7311914352.0200.029 6.6 5.362.5H4IRF7313914802.0300.029 6.5 5.262.5IRF7333917002.0300.10 3.5 2.862.5917002.0300.050 4.9 3.962.5IRF9956915592.0300.103.52.862.5Dual P-ChannelIRF7314914352.0-200.058-5.3-4.362.5H4IRF7316915052.0-300.058-4.9-3.962.5IRF9953915602.0-300.25-2.3-1.862.5* Indicates low VGS(th), which can operate at VGS = 2.7VMeasured at ambient for Micro3, Micro6, Micro8, SO-8, and SOT-223 package styles. All others measured at case.1Micro3SO-8D-PakD -PakSOT-227Micro6SOT-223Micro82 Illustrations not to scaleI DContinuous Drain Current(A)70°SO-8Surface Mount PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)RΘMax.ThermalResistance(°C/W)1FaxonDemand Number Case Outline KeyPart NumberP D Max.PowerDissipation (W)Dual N- and P-ChannelIRF7317 915682.020 0.029 6.6 5.3 62.5 H42.0-20 0.058 -5.3 -4.3 62.5IRF9952 915622.030 0.103.5 2.8 62.5915622.0-30 0.25 -2.3 -1.8 62.5IRF7319 916062.030 0.029 6.5 5.2 62.52.0-30 0.058 -4.9 -3.9 62.5* Indicates low VGS(th), which can operate at VGS = 2.7VMeasured at ambient for Micro3, Micro6, Micro8, SO-8, and SOT-223 package styles. All others measured at case.1Micro3SO-8D-Pak D -PakSOT-227Micro6SOT-223Micro8 2 Illustrations not to scaleI DContinuous Drain Current(A)70°SO-8Surface Mount PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart Number P D Max.PowerDissipation (W)N-ChannelLogic LevelIRF7401912442.5200.0228.77.050H4IRF7201911002.5300.0307.0 5.650IRF7403912452.5300.0228.55.450Dual N-ChannelLogic LevelIRF7101908712.0200.10 3.5 2.362.5H4IRF7301912382.0200.050 5.2 4.162.5IRF7303912392.0300.050 4.9 3.962.5IRF7103910952.0500.1303.02.362.5P-ChannelLogic LevelIRF7204911032.5-200.060-5.3-4.250H4IRF7404912462.5-200.040-6.7-5.450IRF7205911042.5-300.070-4.6-3.750IRF7406912472.5-300.045-5.8-3.750IRF7416913562.5-300.02-10-7.150* Indicates low VGS(th), which can operate at VGS = 2.7VMeasured at ambient for Micro3, Micro6, Micro8, SO-8, and SOT-223 package styles. All others measured at case.1Micro3SO-8D-PakD -PakSOT-227Micro6SOT-223Micro82 Illustrations not to scaleI DContinuous Drain Current(A)70°SO-8Surface Mount PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart Number P D Max.PowerDissipation (W)Dual P-ChannelLogic LevelIRF7104910962.0-200.250-2.3-1.862.5H4IRF7304912402.0-200.090-4.3-3.462.5IRF7306912412.0-300.10-3.6-2.962.5Dual N- and P-Channe Logic LevelIRF7307912421.4200.050 4.3 3.490H4-200.090-3.6-2.9IRF7105910972.0250.1093.5 2.862.52-250.25-2.3-1.862IRF7309912432.0300.050 4.9 3.962.5-300.10-3.6-2.9* Indicates low VGS(th), which can operate at VGS = 2.7VMeasured at ambient for Micro3, Micro6, Micro8, SO-8, and SOT-223 package styles. All others measured at case.1Micro3SO-8D-PakD -PakSOT-227Micro6SOT-223Micro82 Illustrations not to scaleI DContinuous Drain Current(A)70°SOT-223Surface Mount PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart Number P D Max.PowerDissipation (W)N-ChannelIRFL4105913812.1550.045 3.7 3.060H6IRFL110908612.01000.54 1.50.9660IRFL4310913682.11000.20 1.6 1.360IRFL21090868 2.02001.50.960.660IRFL214908622.02502.00.790.560P-ChannelIRFL9110908642.0-1001.2-1.1-0.6960H6N-ChannelLogic LevelIRLL3303913792.1300.031 4.6 3.760H6IRLL014N 914992.1550.14 2.0 1.660IRLL2705913802.1550.043.83.060* Indicates low VGS(th), which can operate at VGS = 2.7VMeasured at ambient for Micro3, Micro6, Micro8, SO-8, and SOT-223 package styles. All others measured at case.1Micro3SO-8D-PakD -PakSOT-227Micro6SOT-223Micro82 Illustrations not to scaleI DContinuous Drain Current(A)100°D-PakSurface Mount PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart Number P D Max.PowerDissipation (W)N-ChannelIRFR33039164257300.0313321 2.2H7IRFR024N9133638550.0751610 3.3IRFR41059130248550.0452516 2.7IRFR12059131869550.0273723 1.8IRFR11090524251000.54 4.3 2.75IRFR120N 91365391000.219.1 5.8 3.2IRFR391091364521000.11159.5 2.4IRFR2109052625200 1.5 2.6 1.75IRFR22090525422000.8 4.833IRFR21490703252502 2.2 1.45IRFR2249060042250 1.1 3.8 2.43IRFR3109059725400 3.6 1.7 1.15IRFR3209059842400 1.8 3.123IRFR42090599425003 2.4 1.53IRFRC2090637426004.421.33* Indicates low VGS(th), which can operate at VGS = 2.7VMeasured at ambient for Micro3, Micro6, Micro8, SO-8, and SOT-223 package styles. All others measured at case.1Micro3SO-8D-PakD -PakSOT-227Micro6SOT-223Micro82 Illustrations not to scaleI DContinuous Drain Current(A)100°D-PakSurface Mount PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart Number P D Max.PowerDissipation (W)P-ChannelIRFR55059161057-550.11-18-11 2.2H7IRFR53059140289-550.065-28-18 1.4IRFR90149065425-600.5-5.1-3.25IRFR90249065542-600.28-8.8-5.63IRFR91109051925-100 1.2-3.1-25IRFR91209052042-1000.6-5.6-3.63IRFR9120N 9150739-1000.48-6.5-4.1 3.2IRFR92109052125-2003-1.9-1.25IRFR92209052242-200 1.5-3.6-2.33IRFR92149165850-250 3.0-2.7-1.7 2.5IRFR93109166350-4007.0-1.8-1.12.5* Indicates low VGS(th), which can operate at VGS = 2.7VMeasured at ambient for Micro3, Micro6, Micro8, SO-8, and SOT-223 package styles. All others measured at case.1Micro3SO-8D-PakD -PakSOT-227Micro6SOT-223Micro82 Illustrations not to scaleI DContinuous Drain Current(A)100°D-PakSurface Mount PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart Number P D Max.PowerDissipation (W)N-ChannelLogic LevelIRLR27039133538300.0452214 3.3H7IRLR33039131657300.0313321 2.2IRLR31039133369300.0194629 1.8IRLR024N 9136338550.0651711 3.3IRLR27059131746550.042415 2.7IRLR29059133469550.0273623 1.8IRLR120N 91541391000.18511 6.9 3.2IRLR341091607521000.10159.52.4* Indicates low VGS(th), which can operate at VGS = 2.7VMeasured at ambient for Micro3, Micro6, Micro8, SO-8, and SOT-223 package styles. All others measured at case.1Micro3SO-8D-PakD -PakSOT-227Micro6SOT-223Micro82 Illustrations not to scaleI DContinuous Drain Current(A)100°D 2PakSurface Mount PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart NumberP D Max.PowerDissipation (W)N-ChannelIRFZ24NS 913554555 0.07 17 12 3.3 H10IRFZ34NS 913116855 0.04 29 20 2.2IRFZ44NS 9131511055 0.022 49 35 1.4IRFZ46NS 9130512055 0.020 53 37 1.3IRFZ48NS 9140814055 0.016 64 45 1.1IRF1010NS 913723.855 0.011 84 60 40IRF3205S 9130420055 0.008 110 80 0.75IRFZ44ES 9171411060 0.023 48 34 1.4IRF1010ES 9172017060 0.012 83 59 0.90IRF2807S 9151815075 0.013 71 50 1.0IRF520NS 9134047100 0.2 9.5 6.7 3.2IRF530NS 9135263100 0.11 15 11 2.4IRF540NS 91342110100 0.052 27 19 1.6IRF1310NS 91514120100 0.036 36 25 1.3IRF3710S 91310150100 0.028 46 33 1.0IRF3315S 9161794150 0.082 21 15 1.6IRF3415S 91509150150 0.042 37 26 1.0IRFBC20S 9.101450600 4.4 2.2 1.4 2.5IRFBC30S 9101574600 2.2 3.6 2.3 1.7IRFBC40S 91016130600 1.2 6.2 3.9 1.0* Indicates low VGS(th), which can operate at VGS = 2.7VMeasured at ambient for Micro3, Micro6, Micro8, SO-8, and SOT-223 package styles. All others measured at case.1Micro3SO-8D-Pak D -PakSOT-227Micro6SOT-223Micro8 2 Illustrations not to scaleI DContinuous Drain Current(A)100°D 2PakSurface Mount PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemandNumberCase Outline KeyPart NumberP D Max.PowerDissipation (W)IRFBF20S 9166554900 8.0 1.7 1.1 2.3 H10P-ChannelIRF5305S 91386110-55 0.06 -31 -22 1.4 H10IRF4905S 914783.8-55 0.02 -74 -52 40IRF9520NS 9152247-100 0.48 -6.7 -4.8 3.2IRF9530NS 9152375-100 0.20 -14 -9.9 2.0IRF9540NS 9148394-100 0.117 -19 -13 1.6IRF5210S 91405150-100 0.06 -35 -25 1.0* Indicates low VGS(th), which can operate at VGS = 2.7VMeasured at ambient for Micro3, Micro6, Micro8, SO-8, and SOT-223 package styles. All others measured at case.1Micro3SO-8D-Pak D -PakSOT-227Micro6SOT-223Micro8 2 Illustrations not to scaleI DContinuous Drain Current(A)100°D 2PakSurface Mount PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart NumberP D Max.PowerDissipation (W)N-Channel Logic LevelIRL3302S 916925720 0.020 39 25 2.2 H10IRL3202S916756920 0.016 48 30 1.8IRL3102S 916918920 0.013 61 39 1.4IRL3402S 9169311020 0.01 85 54 1.1IRL3502S 9167614020 0.007 110 67 0.89IRL2703S 913604530 0.04 24 17 3.3IRL3303S 913236830 0.026 38 27 2.2IRL3103S 9133811030 0.014 64 45 1.4IRL2203NS 9136717030 0.007 116 82 0.90IRL3803S 9131920030 0.006 140 98 0.75IRLZ24NS 913584555 0.06 18 13 3.3IRLZ34NS 913086855 0.035 30 21 2.2IRLZ44NS 9134711055 0.022 47 33 1.4IRL3705NS 9150217055 0.01 89 63 0.90IRL2505S 9132620055 0.008 104 74 0.75IRLZ44S 9090615060 0.028 50 36 1.0IRL530NS 9134963100 0.1 15 11 2.4IRL2910S 91376150100 0.026 48 34 1.0* Indicates low VGS(th), which can operate at VGS = 2.7VMeasured at ambient for Micro3, Micro6, Micro8, SO-8, and SOT-223 package styles. All others measured at case.1Micro3SO-8D-Pak D -PakSOT-227Micro6SOT-223Micro8 2 Illustrations not to scaleI DContinuous Drain Current(A)100°SOT-227Surface Mount PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous DrainCurrent 25°C(A)RΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart Number P D Max.PowerDissipation (W)N-ChannelFully Isolated Low ChargeFA38SA50LC 916155005000.1338240.25H21FA57SA50LC916506255000.0857360.20* Indicates low VGS(th), which can operate at VGS = 2.7VMeasured at ambient for Micro3, Micro6, Micro8, SO-8, and SOT-223 package styles. All others measured at case.1Micro3SO-8D-PakD -PakSOT-227Micro6SOT-223Micro82 Illustrations not to scaleI DContinuous Drain Current(A)100°I-PakThrough-Hole PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart Number P D Max.PowerDissipation (W)N-ChannelIRFU33039164257300.0313321 2.2H8IRFU024N 9133638550.0751610 3.3IRFU41059130248550.0452519 2.7IRFU12059131869550.0273723 1.8IRFU11090524251000.54 4.3 2.7 5.0IRFU120N 91365391000.219.1 5.8 3.2IRFU391091364521000.11159.5 2.4IRFU2109052625200 1.5 2.6 1.7 5.0IRFU22090525422000.80 4.8 3.0 3.0IRFU2149070325250 2.0 2.2 1.4 5.0IRFU2249060042250 1.1 3.8 2.4 3.0IRFU3109059725400 3.6 1.7 1.1 5.0IRFU3209059842400 1.8 3.1 2.0 3.0IRFU4209059942500 3.0 2.4 1.5 3.0IRFUC2090637426004.42.01.33.0I-PakTO-220 FullPakTO-262TO-247HEXDIPTO-220AB Illustrations not to scale** Not ratedI DContinuous Drain Current(A)100°I-PakThrough-Hole PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart Number P D Max.PowerDissipation (W)P-ChannelIRFU55059161057-550.11-18-11 2.2H8IRFU53059140289-550.065-28-18 1.4IRFU90149065425-600.50-5.1-3.2 5.0IRFU90249065542-600.28-8.8-5.6 3.0IRFU91109051925-100 1.2-3.1-2.0 5.0IRFU91209052042-1000.60-5.6-3.6 3.0IRFU9120N 9150739-1000.48-6.5-4.1 3.2IRFU92109052125-200 3.0-1.9-1.2 5.0IRFU92209052242-200 1.5-3.6-2.3 3.0IRFU92149165850-2503.0-2.7-1.7 2.5IRFU93109166350-4007.0-1.8-1.12.5N-ChannelLogic LevelIRLU27039133538300.0452214 3.3H8IRLU33039131657300.0313321 2.2IRLU31039133369300.0194629 1.8IRLU024N 9136338550.0651711 3.3IRLU27059131746550.04241715IRLU29059133469550.0273623 1.8IRLU120N 91541391000.18511 6.9 3.2IRLU341091607521000.10159.52.4I-PakTO-220 FullPakTO-262TO-247HEXDIPTO-220AB Illustrations not to scale** Not ratedI DContinuous Drain Current(A)100°HEXDIPThrough-Hole PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart Number P D Max.PowerDissipation (W)N-ChannelIRFD014907001.3600.2 1.7 1.2120H9IRFD024906991.3600.1 2.5 1.8120IRFD110903281.31000.54 1.00.71120IRFD120903851.31000.27 1.30.94120IRFD210903861.3200 1.50.60.38120IRFD220904171.32000.80.80.50120IRFD214912711.3250 2.00.570.32120IRFD224912721.3250 1.10.760.43120IRFD310912251.3400 3.60.420.23120IRFD320912261.3400 1.80.600.33120IRFD420912271.3500 3.00.460.26120IRFDC20912281.36004.40.320.21120I-PakTO-220 FullPakTO-262TO-247HEXDIPTO-220AB Illustrations not to scale** Not ratedI D Continuous Drain Current (A)100°TO-220Qg TotalGate Charge(nC)Through-Hole PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C (A)R ΘMax.Thermal Resistance(°C/W)1Faxon Demand Number Case OutlineKeyPart Number P D Max.Power Dissipation (W)N-ChannelLow ChargeIRF737LC91314743000.75 6.1** 1.7 3.9H11IRF740LC 910681254000.5510** 1.039IRF840LC 910691255000.858.0** 1.039IRFBC40LC910701256001.26.2**1.039I-PakTO-220 FullPakTO-262TO-247HEXDIPTO-220AB Illustrations not to scale** Not ratedI DContinuous Drain Current(A)100°TO-220ABThrough-Hole PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart Number P D Max.PowerDissipation (W)N-ChannelIRFZ24N 9135445550.071712 3.3H12IRFZ34N9127656550.042618 2.7IRFZ44N 9130383550.0244129 1.8IRFZ46N 9127788550.024633 1.7IRFZ48N 9140694550.0165337 1.6IRF1010N 91278130550.0127251 1.2IRF320591279150550.0089869 1.0IRFZ34E 9167268600.0422820 2.2IRFZ44E 91671110600.0234834 1.4IRF1010E 91670170600.01281570.90IRF280791517150750.0137150 1.0IRF520N 91339471000.209.5 6.79.5IRF530N 91351601000.111511 2.4IRF540N 91341941000.0522719 1.6IRF1310N 916111201000.0363625 1.3IRF3710913091501000.0284633 1.0IRF331591623941500.0822115 1.6IRF3415914771501500.0423726 1.0IRFBC209062350600 4.4 2.2 1.4 2.5IRFBC309048274600 2.2 3.6 2.3 1.7IRFBC4090506125600 1.2 6.2 3.9 1.0IRFBE2090610548006.51.81.22.3I-PakTO-220 FullPakTO-262TO-247HEXDIPTO-220AB Illustrations not to scale** Not ratedI DContinuous Drain Current(A)100°TO-220ABThrough-Hole PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart Number P D Max.PowerDissipation (W)IRFBE3090613125800 3.0 4.1 2.6 2.0H12IRFBF3090616125900 3.7 3.6 2.3 1.0IRFBG209060454100011 1.40.86 2.3IRFBG309062012510005.03.12.01.0P-ChannelIRF9Z24N 9148445-550.175-12-8.53.3H12IRF9Z34N 9148556-550.10-17-12 2.7IRF530591385110-550.06-31-22 1.4IRF490591280150-550.02-64-45 1.0IRF9530N 9148275-1000.20-13-9.2 2.0IRF9540N 9143794-1000.117-19-13 1.6IRF521091434150-1000.06-35-25 1.0IRF62159147983-1500.29-11-7.81.8I-PakTO-220 FullPakTO-262TO-247HEXDIPTO-220AB Illustrations not to scale** Not ratedI DContinuous Drain Current(A)100°TO-220ABThrough-Hole PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart NumberP D Max.PowerDissipation (W)N-Channel Logic LevelIRL3302 916965720 0.020 39 25 2.2 H12IRL3202 916956920 0.016 48 30 1.8IRL3102 916948920 0.013 61 39 1.4IRL3402 9169711020 0.01 85 54 1.1IRL3502 9169814020 0.007 110 67 0.89IRL2703 913594530 0.04 24 17 3.3IRL3303 913225630 0.026 34 24 2.7IRL3103 913378330 0.014 56 40 1.8IRL2203N 9136613030 0.007 100 71 1.230 0.007 61 43 3.2IRL3803 9130115030 0.006 120 83 1.0IRLZ24N 913574555 0.06 18 13 3.3IRLZ34N 913075655 0.035 27 19 2.7IRLZ44N 913468355 0.022 41 29 1.8IRL3705N 9137013055 0.01 77 54 1.2IRL2505 9132520055 0.008 104 74 0.75IRL520N 9149447100 0.18 10 7.1 3.2IRL530N 9134863100 0.10 15 11 2.4IRL540N 9149594100 0.044 30 21 1.6IRL2910 91375150100 0.026 48 34 1.0I-PakTO-220 FullPakTO-262TO-247HEXDIPTO-220AB Illustrations not to scale** Not ratedI D Continuous Drain Current (A)100°TO-220 FullPak (Fully Isolated)Qg TotalGate Charge(nC)Through-Hole PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous DrainCurrent 25°C(A)R ΘMax.Thermal Resistance (°C/W)1Fax on Demand Number Case OutlineKeyPart Number P D Max.Power Dissipation (W)N-ChannelLow ChargeIRFI740GLC91209404000.55 6.0** 3.139H13IRFI840GLC 91208405000.85 4.8** 3.139IRFIBC40GLC91211406001.24.0**3.139I-PakTO-220 FullPakTO-262TO-247HEXDIPTO-220AB Illustrations not to scale** Not ratedI DContinuous Drain Current(A)100°TO-220 FullPak (Fully Isolated)Through-Hole PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart Number P D Max.PowerDissipation (W)N-ChannelIRFIZ24N 9150126550.07139.2 5.8H14IRFIZ34N9148931550.041913 4.8IRFIZ44N 9140338550.02428200.024IRFIZ46N 9130640550.023122 3.8IRFIZ48N 9140742550.0163625 3.6IRFI1010N 9137347550.0124431 3.2IRFI32059137448550.0085640 3.1IRFIZ24E 9167329600.071149.6 5.2IRFIZ34E 9167437600.0422115 4.1IRFI510G 90829271000.54 4.5 3.2 5.5IRFI520N 91362271000.207.2 5.1 5.5IRFI530N 91353331000.11117.8 4.5IRFI540N 91361421000.0521813 3.6IRFI1310N 91611451000.0362216 3.3IRFI371091387481000.0252820 3.1IRFI620G 90832302000.8 4.1 2.6 4.1IRFI630G 90652322000.4 5.9 3.7 3.6IRFI640G 90649402000.189.8 6.2 3.1IRFI614G 9083123250 2.0 2.1 1.3 5.5IRFI624G 9083330250 1.1 3.4 2.2 4.1IRFI634G 90738322500.45 5.6 3.5 3.6IRFI644G 90739402500.287.953.1I-PakTO-220 FullPakTO-262TO-247HEXDIPTO-220AB Illustrations not to scale** Not ratedI DContinuous Drain Current(A)100°TO-220 FullPak (Fully Isolated)Through-Hole PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart Number P D Max.PowerDissipation (W)IRFI720G 9083430400 1.8 2.6 1.7 4.1H14IRFI730G 9065032400 1.0 3.7 2.3 3.6IRFI740G 90651404000.55 5.4 3.4 3.1IRFI734G 9100135450 1.2 3.4 2.1 3.6IRFI744G 91002404500.63 4.9 3.1 3.1IRFI820G 9064130500 3.0 2.1 1.3 4.1IRFI830G 9064632500 1.5 3.12 3.6IRFI840G 90642405000.85 4.6 2.9 3.1IRFIBC20G 90850306004.41.71.1 4.1IRFIBC30G 90851356002.2 2.5 1.63.6IRFIBC40G 9085240600 1.2 3.5 2.2 3.1IRFIBE20G 9085330800 6.5 1.4.86 4.1IRFIBE30G 9085435800 3.0 2.1 1.4 3.6IRFIBF20G 90855309008.0 1.2.79 4.1IRFIBF30G90856359003.71.91.23.6P-ChannelIRFI9Z24N 9152929-550.175-9.5-6.7 5.2H14IRFI9Z34N 9153037-550.10-14-10 4.1IRFI49059152663-550.02-41-29 2.4IRFI9540G 9083742-1000.117-13-9.2 3.6IRFI9540N 9148742-1000.117-13-9.2 3.6IRFI52109140448-1000.06-20-14 3.1IRFI9634G 9148835-2501.0-4.1-2.63.6I-PakTO-220 FullPakTO-262TO-247HEXDIPTO-220AB Illustrations not to scale** Not ratedI DContinuous Drain Current(A)100°TO-220 FullPak (Fully Isolated)Through-Hole PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C(A)R ΘMax.Thermal Resistance (°C/W)1FaxonDemand Number Case Outline KeyPart Number P D Max.PowerDissipation (W)N-ChannelLogic LevelIRLI2203N 9137847300.0076143 3.2H14IRLI38039132048300.0066747 3.1IRLIZ24N 9134426550.06149.9 5.8IRLIZ34N 9132931550.0352014 4.8IRLIZ44N 9149838550.0222820 4.0IRLI3705N 9136947550.014733 3.2IRLI25059132763550.00858412.4IRLI520N 91496271000.187.7 5.4 5.5IRLI530N 91350331000.10117.8 4.5IRLI540N 91497421000.04420143.6IRLI291091384481000.02627193.1P-ChannelLogic LevelIRFI9520G 9083537-1000.6-5.2-3.6 4.1H14IRFI9530G 9083638-1000.03-7.7-5.4 3.6IRFI9620G 9087430-200 1.5-3.0-1.9 4.1IRFI9630G 9083840-2000.8-4.3-2.7 3.6IRFI9640G9083940-2000.5-6.1-3.93.1I-PakTO-220 FullPakTO-262TO-247HEXDIPTO-220AB Illustrations not to scale** Not ratedI D Continuous Drain Current (A)100°TO-247Qg TotalGate Charge(nC)Through-Hole PackagesV (BR)DSSDrain-to-Source Breakdown Voltage (V)R DS(on)On-State Resistance ()ΩI D Continuous Drain Current 25°C (A)R ΘMax.Thermal Resistance (°C/W)1Fax on Demand Number Case OutlineKeyPart Number P D Max.Power Dissipation (W)1N-ChannelLow ChargeIRFP350LC912291904000.3018**0.6570H16IRFP360LC 912302804000.2023**0.4598IRFP450LC 912311905000.4016**0.6570IRFP460LC 912322805000.2720**0.4598IRFPC50LC 912331906000.6013**0.6570IRFPC60LC912342806000.4016**0.4598I-PakTO-220 FullPakTO-262TO-247HEXDIPTO-220AB Illustrations not to scale** Not rated。

ABB电机保护器M101-P_M102-P用户手册 (1)

7.2 通过 MD2/MD3 设置参数 ................................................... 50
7.3 M101-P/M102-P 参数 ..................................................... 50
6 M101-P/M102-P 的通讯 ..................................................... 49 6.1 概述 ................................................................... 49 6.2 RS485 通讯电缆 ......................................................... 49 6.3 PROFIBUS DP 描述 ....................................................... 49
M101-P/ M102-P
M101-P/ M102-P
REPEATER
M101-P/ M102-P
区段5：最大30个 M101-P/M102-P + 2 个中继
M101-P/ M102-P
REPEATER
M101-P/ M102-P
M101-P/ M102-P
区段6：最大31个 M101-P/M102-P + 1 个中继
3 安装及尺寸
M101-P/M102-P 的外形尺寸为：宽×高×深=110 ×140×75mm
安装方式：标准卡轨 TS35×15
MD2 的外形尺寸为：宽×高×深=88×72×30mm MD2 的面板开孔尺寸为：宽×高=84×68mm MD3 的外形尺寸为：宽×高×深=88×50×28mm MD3 的面板开孔尺寸为：宽×高=84×46mm M101-P/M102-P 及 MD2/MD3 安装注意事项请参照 M101-P/M102-P 安装手册。

SD200-30伺服驱动器用户手册

2.3.1 位置控制接线图 .............................................................. 5 2.3.2 配线规格 .................................................................... 6 2.4 注意事项....................................................................... 6
3.5.1 开关量输入接口 ............................................................. 11 3.5.2 开关量输出接口 ............................................................. 11 3.5.3 脉冲量输入接口 ............................................................. 12 3.5.4 编码器信号差分输出接口 ..................................................... 13 3.5.5 编码器 Z 信号集电极开路输出接口 ............................................. 13 3.5.6 伺服电机光电编码器输入接口 ................................................. 13
— II —
第一章规格
Ⅰ 规格－1.1(伺服驱动器规格)
1
第一章规格
1.1 伺服驱动器规格
型号

MicroDIMM设计规范

4.20.12 - 214-Pin DDR2 SDRAM Unbuffered MicroDIMM DesignSpecificationPC2-4200/PC2-3200 DDR2 Unbuffered MicroDIMM Reference Design SpecificationRevision 0.526,April, 2004Contents1. Product Description (3)Product Family Attributes (3)Raw Card Summary (3)2. Environmental Requirements (4)Absolute Maximum Ratings (4)3. Architecture (4)Pin Description (4)Input/Output Functional Description (5)DDR2 SDRAM MicroDIMM Pinout (6)Block Diagram x16 2Ranks Raw Card A (7)Block Diagram x16 1Rank Raw Card B (8)4. Component Details (9)x16 Ballout for 256Mb, 512Mb, 1Gb, 2Gb and 4Gb DDR2 SDRAMs (Top View) (9)DDR2 SDRAM FBGA Component Specifications (9)Reference SPD Component Specifications (9)SPD Component DC Electrical Characteristics (9)5. Unbuffered MicroDIMM Details (10)DDR2 SDRAM Module Configurations (Reference Designs) (10)Input Loading Matrix (10)DDR2 MicroDIMM Gerber File Releases (11)Example Raw Card Component Placement (12)6. MicroDIMM Wiring Details (13)Signal Groups (13)General Net Structure Routing Guidelines (13)Explanation of Net Structure Diagrams (13)Differential Clock Net Structures (14)Data Net Structures (16)Control Net Structures S[1:0], CKE[1:0], ODT[1:0] (18)Address/Control Net Structures Ax, BAx, RAS, CAS, WE (19)Cross Section Recommendations (21)Test Points (22)7. Serial Presence Detect Definition (23)Serial Presence Detect Data Example (23)8. Product Label (26)9. MicroDIMM Mechanical Specifications (27)1. Product DescriptionThis reference specification defines the electrical and mechanical requirements for the PC2-4200 memory module, a 214-pin, 267 MHz clock (533 MT/s data rate), 64-bit wide, Unbuffered Synchronous Double Data Rate 2(DDR2) DRAM Micro Dual In-Line Memory Module (DDR2 SDRAM MicroDIMMs). It also defines a slower version, the PC2-3200, using 200MHz clock (400 MT/s data rate) DDR2 SDRAMs. These DDR2 SDRAM MicroDIMMs are intended for use as main memory when installed in systems such as mobile per-sonal computers.Reference design examples are included which provide an initial basis for Unbuffered MicroDIMM designs. Any modifications to these reference designs must meet all system timing, signal integrity and thermal requirements for 267 MHz clock rate support. Other designs are acceptable, and all Unbuffered DDR2MicroDIMM implementations must use simulations and lab verification to ensure proper timing requirements and signal integrity in the design.Raw Card SummaryProduct Family AttributesAttribute:Values:Notes:MicroDIMM Organizationx 64MicroDIMM Dimensions (nominal)30 mm high, 54.0mm wide MicroDIMM Types Supported Unbuffered Pin Count214SDRAMs Supported 256 Mb, 512 Mb, 1 Gb, 2 Gb, 4 GbCapacity128 MB, 256 MB, 512 MB, 1 GB, 2GB, 4 GB Serial Presence DetectConsistent with JEDEC Rev. 1.0Voltage Options, Nominal1.8 V V DD 1.8 V V DD Q1.8 V to 3.3 V V DD SPD 1InterfaceSSTL_18Note 1: V DD SPD is not tied to V DD or V DD Q on the DDR2 MicroDIMM.Raw CardNumber of DDR2 SDRAMsSDRAM OrganizationNumber of RanksA 8x162B4x1612. Environmental RequirementsPC2-4200 DDR2 SDRAM Unbuffered MicroDIMMs are intended for use in mobile computing environments that have limited capacity for heat dissipation.3. ArchitectureAbsolute Maximum RatingsSymbol ParameterRating Units Notes T OPR Operating Temperature (ambient) 0 to +65°C 1H OPR Operating Humidity (relative) 10 to 90%1T STG Storage Temperature-50 to +100°C 1H STGStorage Humidity (without condensation) 5 to 95%1Barometric Pressure (operating & storage)105 to 69kPa1, 21.Stresses greater than those listed may cause permanent damage to the device. This is a stress rating only, and device functional operation at or above the conditions indicated is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.2.Up to 9850 ft.Pin DescriptionCK[1:0] Clock Inputs, positive line 2 DQ[63:0] Data Input/Output 64CK[1:0]Clock inputs, negative line 2DM[7:0] Data Masks 8CKE[1:0]Clock Enables 2DQS[7:0]Data strobes8RAS Row Address Strobe 1DQS[7:0]Data strobes complement8CAS Column Address Strobe 1WE Write Enable 1NC,TESTLogic Analyzer specific test pin (No connecton MicroDIMM1S[1:0]Chip Selects2A[9:0],A[15:11]Address Inputs15V DD Core and I/O Power 15A10/AP Address Input/Autoprecharge 1V SS Ground56BA[2:0] SDRAM Bank Address 3V REF Input/Output Reference 1ODT[1:0]On-die termination control2V DD SPD SPD Power1SCL Serial Presence Detect (SPD)Clock Input1RFU Reserved for future use 12 SDA SPD Data Input/Output 1 NCNo connect4SA[1:0]SPD address2Total:214Input/Output Functional DescriptionSymbol Type Polarity FunctionCK0/CK0, CK1/CK1InputCrosspointThe system clock inputs. All address and command lines are sampled on the cross point of therising edge of CK and falling edge of CK. A Delay Locked Loop (DLL) circuit is driven from theclock inputs and output timing for read operations is synchronized to the input clock.RFU pins for 2 CK pairs reserved.CKE[1:0]Input Active High Activates the DDR2 SDRAM CK signal when high and deactivates the CK signal when low. By deactivating the clocks, CKE low initiates the Power Down mode or the Self Refresh mode. RFU pins for 2 CKEs reserved.S[1:0]Input Active Low Enables the associated DDR2 SDRAM command decoder when low and disables the com-mand decoder when high. When the command decoder is disabled, new commands are ignored but previous operations continue. Rank 0 is selected by S0; Rank 1 is selected by S1. Ranks are also called "Physical banks". RFU pins for 2 Ss reserved.RAS, CAS,WE Input Active Low When sampled at the cross point of the rising edge of CK and falling edge of CK CAS, RAS, and WE define the operation to be executed by the SDRAM.BA[2:0]Input—Selects which DDR2 SDRAM internal bank of four or eight is activated.ODT[1:0]Input Active High Asserts on-die termination for DQ, DM, DQS, and DQS signals if enabled via the DDR2SDRAM mode register. RFU pins for 2 ODTs reserved.A[9:0],A10/AP, A[15:11]Input—During a Bank Activate command cycle, defines the row address when sampled at the crosspoint of the rising edge of CK and falling edge of CK. During a Read or Write command cycle,defines the column address when sampled at the cross point of the rising edge of CK and fall-ing edge of CK. In addition to the column address, AP is used to invoke autoprecharge opera-tion at the end of the burst read or write cycle. If AP is high, autoprecharge is selected andBA0-BAn defines the bank to be precharged. If AP is low, autoprecharge is disabled. During aPrecharge command cycle, AP is used in conjunction with BA0-BAn to control which bank(s) toprecharge. If AP is high, all banks will be precharged regardless of the state of BA0-BAninputs. If AP is low, then BA0-BAn are used to define which bank to precharge.DQ[63:0]In/Out—Data Input/Output pins.DM[7:0]Input Active High The data write masks, associated with one data byte. In Write mode, DM operates as a byte mask by allowing input data to be written if it is low but blocks the write operation if it is high. In Read mode, DM lines have no effect.DQS[7:0], DQS[7:0]In/Out CrosspointThe data strobes, associated with one data byte, sourced with data transfers. In Write mode,the data strobe is sourced by the controller and is centered in the data window. In Read mode,the data strobe is sourced by the DDR2 SDRAMs and is sent at the leading edge of the datawindow. DQS signals are complements, and timing is relative to the crosspoint of respectiveDQS and DQS. If the module is to be operated in single ended strobe mode, all DQS signalsmust be tied on the system board to VSS and DDR2 SDRAM mode registers programmedappropriately.V DD, V DD SPD,V SSSupply—Power supplies for core, I/O, Serial Presence Detect, and ground for the module.SDA In/Out—This is a bidirectional pin used to transfer data into or out of the SPD EEPROM. A resistor must be connected to V DD to act as a pull up.SCL Input—This signal is used to clock data into and out of the SPD EEPROM. A resistor may be con-nected from SCL to V DD to act as a pull up.SA[1:0]Input—Address pins used to select the Serial Presence Detect base address. RFU pins for 2nd SPD reserved.NC,TEST In/Out—The TEST pin is reserved for bus analysis tools and is not connected on normal memory mod-ules (MicroDIMMs)..DDR2 SDRAM MicroDIMM PinoutPin #LowerSidePin#UpperSidePin#LowerSidePin#UpperSidePin#LowerSidePin#UpperSidePin#LowerSidePin#UpperSide1V REF108V SS28DQS2135Vss55BA0162BA182DQ43189DQ47 2V SS109DQ429Vss136DQ2856WE163RAS83V SS190V SS 3DQ0110DQ530DQ18137DQ2957V DD164V DD84DQ48191DQ52 4DQ1111V SS31DQ19138Vss58RFU(S2)165S085DQ49192DQ535V SS112DM032Vss139DQS359RFU(ODT2)166ODT086V SS193V SS6DQS0113V SS33DQ24140DQS360CAS167A1387RFU(CK3)194CK17DQS0114DQ634DQ25141Vss61V DD168V DD88RFU(CK3)195CK18V SS115DQ735Vss142DQ3062S1169RFU(S3)89V SS196V SS9DQ2116V SS36DM3143DQ3163ODT1170RFU(ODT3)90DM6197DQS610DQ3117DQ1237Vss144Vss64V DD171V DD91V SS198DQS6 11V SS118DQ1338DQ26145NC,TEST65NC172NC92DQ50199V SS 12DQ8119V SS39DQ27146V DD66V SS173V SS93DQ51200DQ54 13DQ9120DM140Vss147CKE167DQ32174DQ3694V SS201DQ5514V SS121V SS41NC148RFU(CKE3)68DQ33175DQ3795DQ56202V SS15RFU(CK2)122CK042V DD149V DD69V SS176V SS96DQ57203DQ6016RFU(CK2)123CK043CKE0150A1570DQS4177DM497V SS204DQ6117V SS124V SS44RFU(CKE2)151A1471DQS4178V SS98DQS7205V SS18DQS1125DQ1445V DD152V DD72V SS179DQ3899DQS7206DM7 19DQS1126DQ1546BA2153A1273DQ34180DQ39100V SS207V SS 20V SS127V SS47A11154A974DQ35181V SS101DQ58208DQ62 21DQ10128DQ2048A7155A875V SS182DQ44102DQ59209DQ63 22DQ11129DQ2149V DD156V DD76DQ40183DQ45103V SS210V SS 23Vss130Vss50A5157A677DQ41184V SS104SDA211SA0 24DQ16131DM251A4158A378V SS185DQS5105SCL212RFU(*1) 25DQ17132Vss52A2159A179DM5186DQS5106NC213SA1 26Vss133DQ2253V DD160V DD80V SS187V SS107V DD SPD214RFU(*2) 27DQS2134DQ2354A10/AP161A081DQ42188DQ46Note: NC = No Connect; NC,TEST(pin 145) is for bus analysis tool and is not connected on normal memory modules. (*1) = SA0 for 2nd SPD, (*2) = SA1 for 2nd SPD.Block Diagram: Raw Card Version A (Populated as 2 ranks of x16 SDRAMs)Block Diagram: Raw Card Version B (Populated as 1 rank of x16 SDRAMs)#Unless otherwise noted, resistorand V DD Q values are 22 Ω ± 5%DQ wiring may differ from that described in this drawing;however, DQ/DM/DQS/DQS relationships are maintained as shown8pFLoad CapacitorsA0-AN RAS CAS WEmatching on ± 0.5pFBA0-BA23.0Ω±5%4. Component Detailsx16 Ballout for 256Mb, 512Mb, 1Gb, 2Gb and 4Gb DDR2 SDRAMs (Top View) 123789NC NC A NC NCBCVDD NC VSS D VSSQ UDQS VDDQ UDQ6VSSQ UDM E UDQS VSSQ UDQ7 VDDQ UDQ1VDDQ F VDDQ UDQ0VDDQ UDQ4VSSQ UDQ3G UDQ2VSSQ UDQ5VDD NC VSS H VSSQ LDQS VDDQ LDQ6VSSQ LDM J LDQS VSSQ LDQ7 VDDQ LDQ1VDDQ K VDDQ LDQ0VDDQ LDQ4VSSQ LDQ3L LDQ2VSSQ LDQ5 VDDL VREF VSS M VSSDL CK VDD CKE WE N RAS CK ODT BA2BA0BA1P CAS CSA10A1R A2A0VDD VSS A3A5T A6A4A7A9U A11A8VSS VDD A12A14V A15A13WYNC NC AA NC NCDDR2 SDRAM FBGA Component SpecificationsThe DDR2 SDRAM components used with this DIMM design specification are intended to be consistent with JEDEC MO-207 DK-Z and DL-Z.Reference SPD Component SpecificationsThe Serial Presence Detect EEPROMs have their own power pin, V DD SPD, so that they can be programmed or read without powering up the rest of the module. The wide voltage range permits use with 1.8V, 2.5V or 3.3V serial buses.SPD Component DC Electrical CharacteristicsSymbol Parameter Min Max UnitsV DD SPD Core Supply Voltage 1.7 3.6V5. Unbuffered MicroDIMM DetailsDDR2 SDRAM Module Configurations (Reference Designs)Raw Card MicroDIMMCapacityMicroDIMMOrganizationSDRAMDensitySDRAMOrganization# ofSDRAMs# ofRanksSDRAMPackage Type# of banks inSDRAM# Address bitsrow/colA256 MB32 M x 64256 Mbit16 M x 1682FBGA413/9 A512 MB64 M x 64512 Mbit32 M x 1682FBGA413/10 A 1 GB128 M x 64 1 Gbit64 M x 1682FBGA813/10 A 2 GB256 M x 64 2 Gbit128 M x 1682FBGA814/10 A 4 GB512 M x 64 4 Gbit256 M x 1682FBGA8TBDRaw Card MicroDIMMCapacityMicroDIMMOrganizationSDRAMDensitySDRAMOrganization# ofSDRAMs# ofRanksSDRAMPackage Type# of banks inSDRAM# Address bitsrow/colB128 MB16 M x 64256 Mbit16 M x 1641FBGA413/9 B256 MB32 M x 64512 Mbit32 M x 1641FBGA413/10 B512 MB64 M x 64 1 Gbit64 M x 1641FBGA813/10B 1 GB128 M x 64 2 Gbit128 M x 1641FBGA814/10B 2 GB256 M x 64 4 Gbit256 M x 1641FBGA8TBD Input Loading MatrixSignal NamesInputDeviceR/C A R/C BClock (CKn, CKn )SDRAM42 CKEn/Sn/ODTn SDRAM44 Addr/RAS/CAS/BA/WE SDRAM84 DQn/DQSn/DQSn/DMn SDRAM21 SCL/SDA/SAn EEPROM11DDR2 MicroDIMM Gerber File ReleasesReference design file updates will be released as needed. This specification will reflect the most recent design files, but may be updated to reflect clarifications to the specification only; in these cases, the design files will not be updated. The following table outlines the most recent design file releasesNote: Future design file releases will include both a date and a revision label. All changes to the design file are also documented within the ‘read-me’ file.Raw Card SpecificationRevisionApplicable Design File NotesA0.5A0 B0.5B0Example Raw Card Component PlacementThe component layout for Raw Cards A, and B are similar. In the case of Raw Card B, DDR2 SDRAMs will be included on the front side of the card; however, passive components are on both sides of the board. This example is for reference only; refer to JEDEC standard MO-TBD for details.6. MicroDIMM Wiring DetailsSignal GroupsThis specification categorizes SDRAM timing-critical signals into four groups whose members have identical loadings and routings. The following table summarizes the signals contained in each group..Signal Group Signals In Group PageClocks for Unbuffered MicroDIMM CK [1:0], CK [1:0]14, 15Data, Data Mask, Data Strobe DQ [63:0], DM[7:0], DQS[7:0], DQS[7:0]16, 17Select, Clock Enable, ODT S [1:0], CKE [1:0], ODT[1:0]18Address/Control Ax, BAx, RAS, CAS, WE19, 20General Net Structure Routing GuidelinesNet structures and lengths must satisfy signal quality and setup/hold time requirements for the memory inter-face. Net structure diagrams for each signal group are shown in the following sections. Each diagram is accompanied by a trace length table that lists the minimum and maximum allowable lengths for each trace segment and/or net.The general routing recommendations are as follows. Other stackups and layouts are possible that meet the electrical characteristics.•Route all signal traces using appropriate trace width(e.g: 0.075mm) and enough spacing(e.g: 0.15mm) between adjacent traces considering cross talk effect.•Route clocks as much as possible using the inner layers.•Test points are required.Explanation of Net Structure DiagramsThe net structure routing diagrams provide a reference design example for each raw card version. These designs provide an initial basis for unbuffered MicroDIMM designs. The diagrams should be used to deter-mine individual signal wiring on a MicroDIMM for any supported configuration. Only transmission lines (repre-sented as cylinders and labeled with trace length designators “TL”) represent physical trace segments. All other lines are zero in length. To verify MicroDIMM functionality, a full simulation of all signal integrity and tim-ing is required. The given net structures and trace lengths are not inclusive for all solutions.Once the net structure has been determined, the permitted trace lengths for the net structure can be read from the table below each net structure routing diagram. Some configurations require the use of multiple net structure routing diagrams to account for varying load quantities on the same signal. All diagrams define one load as one DDR2 SDRAM input unless mentioned. It is highly recommended that the net structure routing data in this document be simulated by the user.Differential Clock Net Structures CK[1:0], CK[1:0]DDR2 SDRAM clock signals must be carefully routed to meet the following requirements:•Signal quality •Rise/Fall time•Cross point of the differential pair in the SDRAM •JEDEC-compatible reference delays•Minimal segment length differences (less than 2.54mm total) between clocks of the same functionClock Net Wiring (Raw card A)Clock Routing Trace Lengths (Raw card A)Raw card TL0 Outer TL1 Inner TL2 Inner TL3 Outer TL4 Inner TL5 Outer Notes Min Max Min Max Min Max Min Max Min Max Min Max A2.02.36.26.77.78.13.84.36.37.90.70.911.All distances are given in millimeters and must be kept within a tolerance of ± 0.8 millimeter.TL0MicroDIMM ConnectorTL1TL2TL3TL3CK CKSDRAM SDRAMTL5TL2TL3TL3SDRAMSDRAMTL5R = 200 Ω± 5%R = 200 Ω± 5%TL4TL4Clock Net Wiring (Raw card B)Clock Routing Trace Lengths (Raw card B)Raw card TL0 Outer TL1 Inner TL2 Inner TL3 Outer TL4 Outer Notes Min Max Min Max Min Max Min Max Min Max B2.02.318.218.47.78.13.84.31.52.011.All distances are given in millimeters and must be kept within a tolerance of ± 0.8 millimeter.TL0MicroDIMM ConnectorTL1TL2TL3CK CKSDRAMTL2TL3SDRAMR = 200 Ω± 5%R = 200 Ω± 5%TL4TL4Data Net StructuresDQ[63:0], DM[7:0], DQS[7:0], DQS[7:0]Special attention has been paid to balancing the data nets within a DDR2 SDRAM, within a particularMicroDIMM, and across the MicroDIMM family. Data nets have been placed in order to bound the data strobe nets. Because data travels with the data strobe, the placement of the strobe in the middle of the narrow win-dow aids in data timing. Although it is not necessary to ensure consistent delays between SDRAMs and/or card types, doing so facilitates system design, system simulation, and DIMM specifications. It is recommend to maintain consistent delays for all nets as described in the following tables.Net Structure Routing for DQ[63:0], DM[7:0], DQS[7:0], DQS[7:0] (Raw card A)Trace Lengths for DQ[63:0], DM[7:0], DQS[7:0], DQS[7:0] (Raw card A)Raw card TL0 Outer TL1 Outer TL2 Outer TotalR1Ohms Notes Min Max Min Max Min Max Min Max A1.04.618.720.92.93.125.325.5221,2,3,41.All distances are given in millimeters and must be kept within a tolerance of ± 0.8 millimeter.2.Total Min and Total Max refer to the min and max respectively of TL0 + TL1 + TL2.3.TL0 and TL1 of Raw Card A is adjusted to compensate for the delay caused by vias on DQ nets. Traces with one via are assumed to have 1.6mm additional length. Traces with two vias are assumed to have 3.2mm additional length.4.These signals must be referenced to ground.TL0MicroDIMM Connector22 Ω ± 5%TL2SDRAM PinTL2SDRAM PinTL1Net Structures Routing for DQ[63:0], DM[7:0], DQS[7:0], DQS[7:0] (Raw card B )Trace Lengths for DQ[63:0], DM[7:0], DQS[7:0], DQS[7:0] (Raw card B )Raw cardTL0 Outer TL1 OuterTotalR1Ohms Notes Min Max Min Max Min Max B1.04.621.723.925.325.5221,2,3,41.All distances are given in millimeters and must be kept within a tolerance of ± 0.8 millimeter.2.Total Min and Total Max refer to the min and max respectively of TL0 + TL1.3.TL0 and TL1 of Raw Card B is adjusted to compensate for the delay caused by via on DQ nets.Traces with one via are assumed to have 1.6mm additional length. Traces with two vias are assumed to have 3.2mm additional length.4.These signals must be referenced to ground.TL0MicroDIMM Connector22 Ω ± 5%SDRAM PinTL1Control Net Structures S [1:0], CKE[1:0], ODT[1:0] (Raw cards A, B)Net Structure Routing for Control Net Structures S [1:0], CKE[1:0], ODT[1:0] (Raw cards A, B)Trace Lengths for Control Net Structures S [1:0], CKE[1:0], ODT[1:0] (Raw cards A, B)TL0 OuterTL1 Outer/Inner TL2 Inner TL3 Inner TL4 Outer Notes Raw CardMin Max Min Max Min Max Min Max Min Max A 1.0 4.622.029.116.017.5 6.57.1 2.7 4.21,2,3B1.04.622.029.116.017.56.57.12.74.21,2,31. All distances are given in mm and should be kept within a tolerance of ± 0.8 mm2. TL0 and TL1 are adjusted to compensate for the delay caused by via. Traces with one via are assumed to have 1.6mm additional length. Traces with two vias are assumed to have3.2mm additional length.3. These signals must be referenced to VDD.TL0MicroDIMM ConnectorTL2TL23.0 Ω ± 5%TL1TL3TL3TL4SDRAM PinTL4SDRAM PinTL4SDRAM PinTL3TL3TL4SDRAM PinAddress/Control Net Structures Ax, BAx, RAS, CAS, WE (Raw card A ).Net Structure Routing for Address/Control Net Structures Ax, BAx, RAS, CAS, WE (Raw card A )Trace Lengths for Address/Control Net Structures Ax, BAx, RAS, CAS, WE (Raw card A )TL0 OuterTL1 Outer/Inner TL2 Inner TL3 inner TL4 Outer Notes Raw CardMin Max Min Max Min Max Min Max Min Max A1.04.622.029.116.017.56.57.11.08.31,2,31. All distances are given in mm and should be kept within a tolerance of ± 0.8 mm2. TL0 and TL1 are adjusted to compensate for the delay caused by via. Traces with one via are assumed to have 1.6mm additional length. Traces with two vias are assumed to have3.2mm additional length. 3. These signals must be referenced to VDD.TL0MicroDIMM ConnectorTL4SDRAM PinTL2TL23.0 Ω ± 5%TL1TL3TL3TL4SDRAM PinTL4SDRAM PinTL4SDRAM PinTL4SDRAM PinTL3TL3TL4SDRAM Pin TL4SDRAM PinTL4SDRAM PinAddress/Control Net Structures Ax, BAx, RAS, CAS, WE (Raw card B).Net Structure Routing for Address/Control Net Structures Ax, BAx, RAS, CAS, WE (Raw card B)Trace Lengths for Address/Control Net Structures Ax, BAx, RAS, CAS, WE (Raw card B)TL0 OuterTL1 Outer/Inner TL2 Inner TL3 inner TL4 Outer TL5 Outer Notes Raw CardMin Max Min Max Min Max Min Max Min Max Min Max B1.04.622.029.116.017.56.57.11.08.33.04.01,2,31. All distances are given in mm and should be kept within a tolerance of ± 0.8 mm2. TL0 and TL1 are adjusted to compensate for the delay caused by via. Traces with one via are assumed to have 1.6mm additional length. Traces with two vias are assumed to have3.2mm additional length.3. These signals must be referenced to VDD.TL0MicroDIMM ConnectorTL2TL23.0 Ω ± 5% TL1TL3TL3TL4SDRAM PinTL4SDRAM PinTL4SDRAM PinTL3TL3TL4SDRAM PinTL58pF ± 0.5pFCross Section RecommendationsAn example of the DDR2 MicroDIMM printed circuit board design uses six-layers of glass epoxy material. PCBs should contain full plane layers for reference plane. The reference planes can be divided so adjacent signal layers maintain a constant Vss or Vdd reference. All data group signals are referenced to Vss and all address/command are referenced to Vdd. The required board impedance is 60 Ω± 10%.PCB Electrical SpecificationsParameter Min Max UnitsTrace velocity: S0 (outer layers) 5.5 6.7ps/mmTrace velocity: S0 (inner layers) 6.57.6ps/mmTrace impedance: Z0 (all layers)5466OhmsExample Layer Stackup for 0.075mm width traceTest PointsAll DDR2 components are in BGA packages which makes the package pads inaccessible for probing during-system development. The DDR2 MicroDIMMs have test points identified to make initial evaluation easier. In some cases test pads have been added and in other cases existing vias are used as test points. An effort has been made to provide testability on some signals in all signal groups but 100% coverage is not possible.Raw Card A Test Points Example(Front View)DQ22CK0-CK1-DQS at resistor pack.CK0CK1DQ7DQ44DQ52DQ28Raw Card B Test Points Example(Front View)BA2DQ22CK0-CK1-A7A3A12A10A9A14S0-A11A6BA0A2BA1CKE0A15A5A1CAS-ODT0RAS-WE-DQS at resistor pack.CK0CK1DQ7DQ44DQ52A13A0A4A8DQ28DQ367. Serial Presence Detect DefinitionThe Serial Presence Detect (SPD) function MUST be implemented on the PC2-4200 DDR2 SDRAM Unbuf-fered MicroDIMM. The component used and the data contents must adhere to the most recent version of the JEDEC DDR2 SDRAM SPD Specifications. Please refer to this document for all technical specifications and requirements of the serial presence detect devices.The following table is intended to be an example of a typical PC2-4200 MicroDIMM. SPD values indicating different MicroDIMM performance characteristics will be utilized based on specific characteristics of the SDRAMs or MicroDIMMs. This example assumes:•Module Organization: 512MB•Device Composition: 32Mx16•Device Package: FBGA•Module Physical Ranks: 2•CAS latency: 4(DDR2-533), 3(DDR2-400)Serial Presence Detect Data Example (Part 1 of 3)Byte # (dec)Byte #(hex)DescriptionSPD Entry ValueSerial PDData Entry(Hexadecimal)NotesDDR2-533DDR2-400DDR2-533DDR2-400000Number of Serial PD Bytes written during production128801 101Total Number of Bytes in Serial PD device256082202Fundamental Memory Type (FPM, EDO, SDRAM,DDR, DDR2, ...)DDR2 SDRAM08303Number of Row Addresses on Assembly130D 404Number of Column Addresses on Assembly100A505Number of DIMM RanksModule height:30mm, Planar,card on card: no,2Ranks61606Data Width of this Assembly x6440 707Reserved Undefined00 808Voltage Interface Level of this assembly SSTL 1.8V05909SDRAM Cycle Time at maximum supported CASlatency (CL), CL = X3.75ns 5.00ns3D503100A SDRAM Access from Clock+/-0.50ns+/-0.50ns5050110B DIMM configuration type (Non-parity, or ECC)Non-Parity00120C Refresh Rate/Type7.8us/SR823,4 130D Primary SDRAM Width x1610140E Error Checking SDRAM Width NA00150F Reserved Undefined001.This will typically be programmed as 128 bytes.2.This will typically be programmed as 256 bytes.3.From Data sheet.4.High order bit is self refresh "flag". If set to "1", the assembly supports self refresh.5.These are optional, in accordance with JEDEC specification.1610SDRAM device attributes: Burst lengths supported4,80C1711SDRAM device attributes: Number of Banks onSDRAM device40431812SDRAM device attributes: CAS Latency4310083 1913Reserved Undefined000 2014DIMM type information MicroDIMM082115SDRAM Module Attributes Normal DIMM002216SDRAM device attributes: General no optional aspect002317Minimum Clock Cycle at CLX -1Undefined FF32418Maximum Data Access Time (t AC) from Clock at CLX -1Undefined FF32519Minimum Clock Cycle Time at CLX-2Undefined FF3261A Maximum Data Access Time (t AC) from Clockat CLX-2Undefined FF3271B Minimum Row Precharge Time (t RP)15.0ns15.0ns3C3C3 281C Minimum Row Active to Row Active delay (t RRD)7.5ns7.5ns1E1E3 291D Minimum RAS to CAS delay (t RCD)15.0ns15.0ns3C3C3 301E Minimum Active to Precharge Time (t RAS)45.0ns45.0ns2D2D3 311F Module Rank Density256MB403220Address and Command input Setup Time BeforeClock (t IS)0.60ns0.60ns606033321Address and Command input Hold Time After Clock(t IH)0.60ns0.60ns606033422Data Input Setup Time Before Clock (t DS)0.35ns0.35ns35353 3523Data Input Hold Time After Clock (t DH)0.35ns0.35ns35353 3624Write recovery time (t WR)15.0ns15.0ns3C3C3 3725Internal write to read command delay (t WTR)7.5ns10ns1E283 3826Internal read to precharge command delay (t RTP)7.5ns7.5ns1E1E3 3927Memory analysis probe characteristics Undefined004028Reserved Undefined004129SDRAM device minimum active to active/auto refreshtime (t RC)60.0ns60.0ns3C3C3422A SDRAM device minimum auto-refresh to active/autorefresh command period (t RFC)105.0ns105.0ns69693Serial Presence Detect Data Example (Part 2 of 3)Byte # (dec)Byte #(hex)DescriptionSPD Entry ValueSerial PDData Entry(Hexadecimal)NotesDDR2-533DDR2-400DDR2-533DDR2-4001.This will typically be programmed as 128 bytes.2.This will typically be programmed as 256 bytes.3.From Data sheet.4.High order bit is self refresh "flag". If set to "1", the assembly supports self refresh.5.These are optional, in accordance with JEDEC specification.。

AT89C5131A微控制器开发板用户指南说明书

AT89C5131A Starter Kit .............................................................................................. Hardware User GuideTable of ContentsSection 1Introduction...........................................................................................1-11.1Features....................................................................................................1-1Section 2Hardware Description...........................................................................2-32.1Block Diagram...........................................................................................2-32.2Power Supply............................................................................................2-42.3C51 Standard Settings..............................................................................2-52.4Feature Description...................................................................................2-62.5External Connectors.................................................................................2-8Section 3Device Programming............................................................................3-93.1In-System Programming...........................................................................3-93.2Using a Programmer.................................................................................3-9Section 4Appendix.............................................................................................4-114.1Electrical Schematics..............................................................................4-124.2Component Placement...........................................................................4-164.3Mechanical Outlines................................................................................4-174.4Bill of Materials........................................................................................4-17Section 1IntroductionThis document describes the AT89C5131A Starter Kit Evaluation Board dedicated tothe AT89C5131A USB microcontroller. This board is designed to allow an easy evalua-tion of the product using demonstration software (refer to Software Guide).1.1Features The AT89C5131A evaluation board provides the following features:Possibility to choose between two packages for the AT89C5131A–PLCC 52-pin package–VQFP 64-pin packageOn-board power supply circuitry–from an external power connector–from an external battery–from the USB line via the USB on-board connectorOn-board reset, INT0, LEDs, EA, ISP and programming interfacePower, ALE, RS232 Rx and Tx LEDsExternal system clock connectorPCA clock connectorUSB, TWI, SPI and RS232 hardware connectorsTwo Connectors available for extended boardIntroductionFigure 1-1. AT89C5131A Evaluation BoardHardware DescriptionSection 2Hardware Description2.1Block DiagramFigure 2-1. AT89C5131A Evaluation Board ComponentsAT89C5131APowerSupplyUSB TWISPIRS232LEDC51 Generic Board InterfaceResetISPEAINT0DeviceDeviceHost,Device...HumanC51 Generic BoardProgrammingSpecific DeviceInterfaceHardware Description2.2Power SupplyThe on-board power supply circuitry allows various power supply configurations.The power source can be:–V BUS from USB (5V)–V BUS from USB (5V) through the current limiter –External power supply (from 6 to 12V) or 9V batteryThe voltage output can be the direct power source, regulated at 5V or 3.3V.The power supply selection is performed using the JP2, JP3, JP4 and JP5 jumpers.The power supply can be turned on/off using the “power” switch (SW6). Once the power is established, the power LED (D9) is lit.Figure 2-2. Different Power ConfigurationsLIMREG V B U S5V 3.3V I C CPWR.S.PWRVCC LIMREG V B U S5V 3.3V I C CPWR.S.PWRVCC LIMREG V B U S5V 3.3V I C CPWR.S.PWR VCC LIM REGV B U S5V3.3V I C CPWR.S.PWRVCC LIMREGV B U S5V 3.3V I C CPWR.S.PWRVCC LIMREG V B U S5V 3.3V I C CPWR.S.PWRVCC LIM REGV B U S5V3.3V I C CPWR.S.PWRVCC LIMREGV B U S5V 3.3V I C CPWR.S.PWRVCC LIMREG V B U S5V 3.3V I C CPWR.S.PWRVCC VBUSVBUS and Current LimiterExternalDirect Input5V Regulate3.3V RegulatePower SourceRegulationHardware Description 2.3C51 StandardSettings2.3.1Reset The external Reset push-button (SW3) is provided to easily generate a warm reset. Thisbutton is used for ISP process. The Reset applied is active low.2.3.2Clock A crystal can be easily installed on the Y1 socket. The clock can also be provided usingthe J8 connector instead of the crystal.Note:Remove the clock generators before the using the programmer.2.3.3EA Place a jumper on the EA connector (J10) to force the EA pin to ground and executeexternal code. Otherwise internal code will be executed.Figure 2-3. EA Circuitry2.3.4INT0In order to use the on-board INT0 circuitry, connect the J7 Jumper to the AT89C5131A.When you press the INT0 button (SW5), the P3.2 pin will go low which induces an inter-rupt event.Note:Remove the J7 jumper before using the programmer. Otherwise the program-mer will not function.Figure 2-4. INT0 CircuitryHardware Description2.4FeatureDescription2.4.1RS232The AT89C5131A evaluation board includes all the required hardware to manage theRS232 communication.Figure 2-5. RS232 On-board Circuitry2.4.2USB Peripheral The AT89C5131A evaluation board provides all the required hardware to develop aUSB firmware for the AT89C5131A, this includes:–a USB connector–2 test points on D+ and D-–1 test point on V BUS–a USB UNLOAD button which allows to disconnect the pull-up on D+ and thento simulate an Attach/Detach of the USB cableThe USB peripheral can also be used to perform an In-System Programming.Hardware Description2.4.3TWI PeripheralThe CT3 and CT5 contacts have to be soldered in order to use the SDA and SCL alter-nate P4.1 and P4.0 port configuration on the SPI connector (J4).In order to use these signals on the J5 extension connector (SDA and SCL), the CT4and CT6 contacts have to also be soldered.2.4.4SPI Peripheral2.4.5LED Controller The AT89C5131A controller includes an LED controller on:–P3.3 (LED 0)–P3.5 (LED 1)–P3.6 (LED 2)–P3.7 (LED 3)The on board LEDs can be controlled with the AT89C5131A if the corresponding con-tacts CT9, CT10, CT11 and CT12 are bypassed.Figure 2-6. On-board LEDs for LED Controller1LED32CT9CT10CT11CT12LED 0LED 1LED 2LED 3Hardware Description2.5ExternalConnectorsThese two external connectors to build a customer extended board easily.Figure 2-7. Top View of J5 and J6 ConnectorsP1.0P1.1P1.2P1.3P1.4P1.5P1.6P1.7P3.0P3.1P3.2P3.3P3.4P3.5 P3.6 - WR P3.7 - RDNCNCNCNCNCNCNCNCVCCVSSSDASCLNCRESETEABP1A16NCVSSXTAL2VSSNCNCNCNCNCNCNCNCBUZZERVSSVSS4745434139373533312927252321191715131197531484644424038363432302826242220181614121086424.35 12V4.35 12VVSSNCNCNCNCNCNCNCNCPSENVSSALEP1.0 - KBD 0P1.1 - KBD 1P1.2 - KBD 2P1.3 - KBD 3P1.4 - KBD 4P1.5 - KBD 5P1.6 - KBD 6P1.7 - KBD 7VSSVSSP0.0P0.1P0.2P0.3P0.4P0.5P0.6P0.7P2.0P2.1P2.2P2.3P2.4P2.5P2.6P2.7P4.0P4.1NCNCNCNCNCNC474543413937353331292725232119171513119753148464442403836343230282624222018161412108642 J5J6AT89C5131A Starter Kit Hardware User Guide3-9Rev. 4245A–USB–11/04Section 3Device Programming3.1In-System ProgrammingThe user memory of the AT89C5131A part can be programmed using the ISP mode of the device. In order to enter in ISP mode, first select the high pin count mode (PSEN) or the low pin count mode (P1.0) using the ISP switch (SW2).To enter in ISP mode, press both the RESET (SW3) and ISP (SW4) buttons simulta-neously. First release the RESET button and then the ISP button. The device enters in ISP mode.ISP can then be performed using the USB bus (or with the peripheral corresponding with the bootloader version). The user may need to re-enumerate the USB bus using the USB UNLOAD button (SW1) if the USB cable is already connected.3.2Using aProgrammerThe AT89C5131A microcontroller can also be programmed using a programmer with the J3 connector. Connect all required signals between the programmer and the J3 con-nector and remove the J7 jumper to disconnect the EA circuitry. No clock should be enabled on the board, except the clock coming from the J3 connector.Figure 3-1. J3 Connector Schematic1VCC 2VSS 3XTAL14VSS 5NC 6RST7P3.2 (Test0)8VSS9P3.4 (Test1)10VSSJ3AT89C5131A Starter Kit Hardware User Guide4-11Rev. 4245A–USB–11/04Section 4Appendix4.14245A–USB–11/044245A–USB–11/04Appendix4245A–USB–11/04Appendix4245A–USB–11/04Appendix4245A–USB–11/04Appendix4245A–USB–11/044.2Component PlacementFigure 4-1. AT89C5131A Evaluation Board OverviewFigure 4-2. AT89C5131A Evaluation Board Component ImplementationAT89C5131A Evab 1.0.2J5J6Appendix4245A–USB–11/044.3Mechanical OutlinesFigure 4-3. AT89C5131A Evaluation Board Mechanical Outlines4.4Bill of MaterialsTable 4-1. Bill of MaterialsReference Part C11, C1222 pF C2 2.2 nF C1, C10, C1410 nF C9, C13100 nF C3, C4, C5, C6, C7, C8, C15, C17,C20, C210.1 µFC16, C1910 µF R4, R527R3100R15180R1, R6, R13, R191K R2 1.5K R10 2.2K R7, R8, R9 4.7K R11, R12, R1410KAppendix4245A–USB–11/04D2LED GREEN D1, D7, D9LEDs RED D3, D4, D5, D6LEDs PWR GREEND8MRA4007D11SMBJ9.0A U1MAX202ECSE U8DF005S TP1, TP2, TP3, TP4, TP5, TP6TEST POINTS J7, J10, J12JUMPERJ13CONNECTOR JACK PWR J8, J9CONNECTORS BNC P1SUB-D9 FEMALEJ1USB B J6, J5HEADER 24X2J11CONNECTOR SIP2J4CONNECTOR SIP4 RA J2CONNECTOR SIP6 RA J3CONNECTOR HE10SW2, SW6SW KEY-SPDT U3AT89C5131A_52U5AT89C5131A_VQFP64CT1, CT2, CT3, CT4, CT5, CT6, CT7, CT8, CT9, CT10, CT11, CT12, CT13,CT14CONTACTC1810 µF TANTALD101N4002JP1A16_Buzz Jumper JP2Limiter Jumper JP3Power Source Jumper JP4Regulator Jumper JP5V CC Level jumperR20121-1%R21365-1%R22196-1%SW1CONTACT BREAKERTable 4-1. Bill of Materials (Continued)ReferencePartAppendixTable 4-1. Bill of Materials (Continued)Reference PartSW3, SW4, SW5PUSH-BUTTONU2MAX708SCSAU6TPS2041ADU9LM1084/TO263Y1CRYSTAL4245A–USB–11/04Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems.Atmel CorporationAtmel Operations2325 Orchard Parkway San Jose, CA 95131Tel: 1(408) 441-0311Fax: 1(408) 487-2600Regional HeadquartersEuropeAtmel SarlRoute des Arsenaux 41Case Postale 80CH-1705 Fribourg SwitzerlandTel: (41) 26-426-5555Fax: (41) 26-426-5500AsiaRoom 1219Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong KongTel: (852) 2721-9778Fax: (852) 2722-1369Japan9F, Tonetsu Shinkawa Bldg.1-24-8 ShinkawaChuo-ku, Tokyo 104-0033JapanTel: (81) 3-3523-3551Fax: (81) 3-3523-7581Memory2325 Orchard Parkway San Jose, CA 95131Tel: 1(408) 441-0311Fax: 1(408) 436-4314Microcontrollers2325 Orchard Parkway San Jose, CA 95131Tel: 1(408) 441-0311Fax: 1(408) 436-4314La Chantrerie BP 7060244306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18Fax: (33) 2-40-18-19-60ASIC/ASSP/Smart CardsZone Industrielle13106 Rousset Cedex, France Tel: (33) 4-42-53-60-00Fax: (33) 4-42-53-60-011150 East Cheyenne Mtn. Blvd.Colorado Springs, CO 80906Tel: 1(719) 576-3300Fax: 1(719) 540-1759Scottish Enterprise Technology Park Maxwell BuildingEast Kilbride G75 0QR, Scotland Tel: (44) 1355-803-000Fax: (44) 1355-242-743RF/AutomotiveTheresienstrasse 2Postfach 353574025 Heilbronn, Germany Tel: (49) 71-31-67-0Fax: (49) 71-31-67-23401150 East Cheyenne Mtn. Blvd.Colorado Springs, CO 80906Tel: 1(719) 576-3300Fax: 1(719) 540-1759Biometrics/Imaging/Hi-Rel MPU/High Speed Converters/RF DatacomAvenue de Rochepleine BP 12338521 Saint-Egreve Cedex, France Tel: (33) 4-76-58-30-00Fax: (33) 4-76-58-34-80e-mail********************Web Site4245A–USB–11/04/xM© Atmel Corporation 2004. All rights reserved. Atmel ® and combinations thereof are the registered trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be the trademarks of others.。

3COM 1200 1201用户手册.pdf说明书

USER MANUALMODEL 1200/1201SynchronousModem EliminatorSALES OFFICE (301) 975-1000TECHNICAL SUPPORT P/N: 07M1200-CDoc# 049011U,Rev. DRevised 1/22/081.0Warranty Information (5)1.1Warranty Statement (5)1.2Radio and TV Interference (5)1.3CE Notice (6)1.4Service (6)2.0General Information (7)2.1Features (7)2.2Description (7)3.0Installation (8)4.0Configuration (9)4.1Data Rate (9)4.2Carrier Detect (9)4.3RTS/CTS Delay (10)4.4Ground (10)5.0Operation (11)5.1LED Status Indicators (Model 1201 only) (11)A Specifications (12)A.1Data Rates (12)A.2Clocking (12)A.3Grounding (12)A.4Range (12)A.5Functional (12)A.6RTS/CTS Delay (12)A.7DCD (12)A.8Ring Indicator (12)A.9Interface (12)A.10Connectors (12)A.11Power Supply (12)A.12Altitude (12)A.13Humidity (12)A.14Dimensions (12)B Block Diagram (13)1.0 WARRANTY INFORMATIONPatton Electronics warrants all Model 1200/1201 components to be free from defects, and will—at our option—repair or replace the product should it fail within one year from the ﬁrst date of shipment.1.1 WARRANTY STATEMENTPatton Electronics warrants all Model 2701RC Series components to be free from defects, and will—at our option—repair or replace the prod-uct should it fail within one year from the ﬁrst date of shipment. This war-ranty is limited to defects in workmanship or materials, and does not cover customer damage, abuse, or unauthorized modiﬁcation. This prod-uct contains no serviceable parts; therefore the user shall not attempt to modify the unit in any way. If this product fails or does not perform as warranted, your sole recourse shall be repair or replacement as described above. Under no condition shall Patton Electronics be liable for any damages incurred by the use of this product. These damages include, but are not limited to, the following: lost proﬁts, lost savings and incidental or consequential damages arising from the use of or inability to use this product. Patton Electronics speciﬁcally disclaims all other war-ranties, expressed or implied, and the installation or use of this product shall be deemed an acceptance of these terms by the user. In the event the user detects intermittent or continuous product malfunction due to nearby high power transmitting radio frequency equipment, the user is strongly advised to use only data cables with an external outer shield bonded to a metal or metalized connector.1.2 RADIO AND TV INTERFERENCEThe Model 1200/1201 generates and uses radio frequency energy, and if not installed and used properly-that is, in strict accordance with the man-ufacturer’s instructions-may cause interference to radio and television reception. The Model 1200/1201 has been tested and found to comply with the limits for a Class A computing device in accordance with speciﬁ-cations in Subpart B of Part 15 of FCC rules, which are designed to pro-vide reasonable protection from such interference in a commercial installation. However, there is no guarantee that interference will not occur in a particular installation. If the Model 1200/1201 does cause interference to radio or television reception, which can be determined by disconnecting the unit , the user is encouraged to try to correct the inter-ference by one or more of the following measures: moving the computing equipment away from the receiver, re-orienting the receiving antenna and/or plugging the receiving equipment into a different AC outlet (such that the computing equipment and receiver are on different branches).1.3 CE NOTICEThe CE symbol on your Patton Electronics equipment indicates that it is in compliance with the Electromagnetic Compatibility (EMC) directive and the Low Voltage Directive (LVD) of the European Union (EU). A Cer-tiﬁcate of Compliance is available by contacting Technical Support.This device is not intended to be connected to the publictelephone network.Caution1.4 SERVICEAll warranty and nonwarranty repairs must be returned freight prepaid and insured to Patton Electronics. All returns must have a Return Materi-als Authorization number on the outside of the shipping container. This number may be obtained from Patton Electronics T echnical Services at:•Tel: +1(301) 975-1007•Email: ******************•URL: Note Packages received without an RMA number will not beaccepted.2.0 GENERAL INFORMATIONThank you for your purchase of this Patton Electronics product. This product has been thoroughly inspected and tested and is warranted for One Y ear parts and labor. If any questions or problems arise during installation or use of this product, please contact Patton Electronics Customer Service at (301) 975-1007.2.1 FEATURES•Smallest synchronous modem eliminator available•Data rates to 38.4 Kbps•Synchronous cable runs to 300 feet on each side of device •Constant or RTS controlled carrier selections•RTS-CTS delay options of 0mS, 6.6mS or 53mS•DB-25 connector on each end•Half or full duplex•Internal or external clocking•No external power required•LEDs monitor data and control signals (Model 1201 only)2.2 DESCRIPTIONMeasuring only 5.3 x 2 x 1.2 inches, the Patton Model 1200 is the small-est self-powered synchronous modem eliminator on the market. All power is derived from the RS-232 data signals, so no AC power or bat-teries are required. Constructed with a DB-25 connector on each end, the Model 1200 can extend synchronous cable runs to 300 feet on each side of the device. Optimum distance is achieved at 9600 bps, and strap selectable data rates may extend up to 38,400 bps.The Model 1200 provides internal or external clock options and operates half or full duplex. To emulate dial-up or dedicated service, the delay between RTS and CTS can be set to either 0mS, 6.6mS or 53mS. The carrier can be conﬁgured either as “constantly on” or “controlled by RTS”. The Model 1201 has all the features of the Model 1200, plus LED indica-tors that monitor receive data, request to send and data carrier detect on each side of the device.Do the following to install the Patton Model 1200:1.Conﬁgure according to the instructions listed in section 4.0, “Conﬁg-uration” on page 7.2.Turn off the computer or device to which the Model 1200 is to beconnected.3.Plug the DB-25 connectors directly into the serial ports of your RS-232 devices. If you wish to extend the distance, you can add cableson both sides (see Figure 1).Note Cables must not be longer than 300 feet (see Figure 1).Figure 1.ConﬁgurationThe Model 1200 is equipped with four strapping options that allow conﬁg-uration to a wide range of applications. To gain access to the internal straps, loosen the hex nuts on the DB-25 connectors and pry open the case between the plastic shell ears. Figure 2 shows the location of each strapping option.Figure 2. Strap settings for the Model 1200/12014.1 DATA RATEThe data rate strap controls the rate at which data is transmitted. Adjust the strap to select one of the following options: 1.2, 2.4, 4.8, 9.6, 19.2, 38.4 or external clocking. If “external clocking” is selected, the Model 1200 will automatically match the clocking between your two synchro-nous devices. The default setting is 9.6 Kbps.4.2 CARRIER DETECTThe carrier detect straps allow you to determine whether the carrier is “constantly on” or “controlled by RTS”. By adjusting the strap, you may operate in switched carrier, multi-point and/or hardware handshaking applications. Port 1 and port 2 may be conﬁgured separately. The defaults setting is “on” for both ports.4.3 RTS/CTS DELAYThe RTS/CTS delay straps determine the amount of delay between the time the Model 1200 “sees” RTS and when it sends CTS. In order to emulate either dial-up or leased line modems, you can set this strap at either no delay, 6.6mS or 53mS. Port 1 and port 2 may be conﬁgured separately. The default setting is 6.6mS for both ports.4.4 GROUNDThe ground strap setting connects the protective ground from port 1 or 2 to the Model 1200’s signal ground. The default setting is port 1.5.0 OPERATIONOnce you have conﬁgured the Model 1200 properly (see section 4.0, “Conﬁguration” on page 7) and plugged it into your equipment, you are ready to operate the unit. After the Model 1200 is properly installed, it should operate transparently—as if it were a standard cable connection. Operating power is derived from the RS-232 data and control signals; there is no “ON/OFF” switch.5.1 LED STATUS INDICATORS (MODEL 1201 ONLY)The Model 1201 features six front panel status LEDs that indicate the condition of the modem eliminator and the communication link. The dia-gram below shows the location of each of these LEDs. Following the dia-gram is a description of each LED’s function.•“TD” and “RTS” indicators blink with data activity.•“CD” lights for an incoming signal on the line side and the resulting out-put signal on the RS-232.APPENDIX ASPECIFICATIONSA.1 DATA RATESSelectable: 1200, 2400, 4800, 9600, 19200, 38400A.2 CLOCKINGInternal or externalA.3 GROUNDINGProtective ground (pin 1) may be strapped to signal ground (pin 7)A.4 RANGE300 feet on either side (for a total of 600 feet) at 9600 bps, range extends linearly for lower bit rates and decreases for higher bit ratesA.5 FUNCTIONALEmulates half or full duplex, dial-up or dedicated lineA.6 RTS/CTS DELAYSelectable per port: 0mS, 6.6mS, 53mSA.7 DCDSelectable per port: continuous or RTS controlledA.8 RING INDICATORConstantly onA.9 INTERFACEEIA RS-232C/CCITT V.24A.10 CONNECTORSChoice of two male or two female DB-25 RS-232 connectorsA.11 POWER SUPPLYNone requiredA.12 ALTITUDE0 to 10,000 feetA.13 HUMIDITYUp to 95% non-condensingA.14 DIMENSIONSApproximately 5.3 x 2 x 1.2 in.APPENDIX BBLOCK DIAGRAMCopyright © 2001 Patton Electronics Company All Rights Reserved.Dear Valued Customer,Thank you for purchasing Patton Electronics products! We do appreci-ate your business. I trust that you ﬁnd this user manual helpful.We manufacture one of the widest selections of data communications products in the world including CSU/DSU's, network termination units, powered and self-powered short range modems, ﬁber optic modems, interface converters, baluns, electronic data switches, data-line surge protectors, multiplexers, transceivers, hubs, print servers and much more. We produce these products at our Gaithersburg, MD, USA, facility, and can custom manufacture products for your unique needs.We would like to hear from you. Please contact us in any of the following ways to tell us how you like this product and how we can meet your prod-uct needs today and in the future.Web: Sales E-mail: ****************SupportE-mail:******************Phone - Sales (301) 975-1000Phone - Support (301) 975-1007Fax: (301) 869-9293Mail: Patton Electronics Company7622 Rickenbacker DriveGaithersburg, MD 20879 USAWe are committed to a quality product at a quality price. Patton Electron-ics is ISO 9001 certiﬁed. We meet and exceed the highest standards in the industry (CE, UL, etc.).It is our business to serve you. If you are not satisﬁed with any aspect of this product or service provided by Patton Electronics or its distributors, please let us know.Thank you.Burton A.PattonVice PresidentP.S. Please tell us where you purchased this product.________________________________________________________ ________________________________________________________ ________________________________________________________。

Service Manual PESMX22110001CE 版本 2201 内容说明书

Service ManualPESMX22110001CEVersion:2201CONTENTS3.Wiring Diagram4. Troubleshooting PAGE 7Energy Recovery VentilatorFV-10VEC2R8(North America Market)WARNINGThis service information is designed for experienced repair technicians only and is not designed for use by the general public. It does not contain warnings or cautions to advise non-technical individuals of potential dangers in attempting to service a product. Products powered by electricity should be serviced or repaired only by experienced professional technicians.Any attempt to service or repair the product or products dealt with in this service information by anyone else could result in serious injury or death.IMPORTANT SAFETY NOTICEThere are special components used in this equipment which are important for safety.These parts are marked by in the Schematic Diagrams, Exploded Views and Replacement Parts List. It is essential that these critical parts should be replaced with manufacturer's specified parts to prevent shock, fire or other hazards. Do not modify the original design without permission of manufacture.We suggest to handle such parts after the static electricity prevention.It is forbidden to touch the PCB parts by bare hands during the repairing process.2.Parts Identification 2~61.Specifications14.Parts List9~111. Specifications<Ventilation Performance><Energy Performance>The testing of the ventilation performance and the energy performance in accordance withCSA-C439 standard.FV-10VEC2R Model No.Mode Heating Cooling Supply temperatureNet air flow Apparent sensible effectiveness Sensible recovery efficiency Total recovery efficiencyNet moisture transfer Powerconsumption (W)-25492325275357-13-253064-1332°F °C L/s CFM 9535031663204060%55%2977100326631953542396880%65%56%77%73%83%67%60%81%77%0.780.710.580.740.71853202. Parts IdentificationFV-10VEC2R Main Body Section1516Frame Cover Assy17FV-10VEC2RFrame Body AssySA Fan Assy / EA Fan Assy20AA(4pcs)22232124252627282930D(4pcs)A(4pcs)31FV-10VEC2RFrame Cover Assy38394049(2pcs)50(4pcs)51(4pcs)A(4pcs)A (4pcs)2. Parts IdentificationFV-10VEC2RMain Labels622. Parts IdentificationFV-10VEC2R63(4pcs)64(4pcs)657374Packing Case Assy3. Wiring diagramFV-10VEC2R4. TroubleshootingFV-10VEC2RIf a problem is encountered, please investigate it by going through the following items.If the problem still persists, please disconnect the power and contact the dealer for repair.*The time under “Blink” means the frequency of blink.4. Parts ListFV-10VEC2R4. Parts ListFV-10VEC2R4. Parts ListFV-10VEC2R。

CattronControl CCM12 机器控制单元 (MCU) 用户手册说明书

CattronControl™CCM12机器控制单元 (MCU)用户手册9M02-7717-A001-ZH修订历史版本日期说明EP1a 2008 年 11 月 19 日新增物理尺寸图新增熔断器规格A1 2012 年 11 月 23 日全面修订：新增 CANbus 冗余操作、CCM12 旋转开关、CANopen 和 J1939 特定信息部分3.0 2019 年 3 月部件号从 9M04- 更改为 9M02-7717-A001 并更名4.1 2021.03.28 Chinese translation created ECO-20-0464Cattron™及其代理提供的任何信息均被认为准确可靠。

所有规格均可能会更改，恕不另行通知。

Cattron 产品的使用和应用由最终用户负责，因为Cattron 及其代理不可能知道所有潜在用途。

对任何Cattron 产品的任何特定或一般用途，Cattron 不保证不侵权，也不保证其适用性、适销性或可持续性。

Cattron Holdings, Inc. 或其任何附属公司或代理不对任何形式的附带或因果损失负责。

所有 Cattron 产品均根据《销售条款和条件》进行销售，可应要求提供《销售条款和条件》的副本。

在本文中用作商标名称时，Cattron 是指Cattron Holdings, Inc. 或 Cattron Holdings, Inc. 的一个或多个子公司。

Cattron™、相应徽标和其他标志是 Cattron Holdings, Inc. 的商标或注册商标。

其他标志可能是第三方的财产。

本文中的任何内容均未提供任何 Cattron 或第三方知识产权下的许可。

目录1. 功能概述 (5)1.1 功能 (5)1.2 框图 (6)2. 物理描述和接口 (7)2.1 物理描述 (7)2.2 接口描述 (9)2.2.1 电源 (9)2.2.2 安全继电器 (9)2.2.3 CAN 接口 (10)2.2.4 RS485 (11)2.2.5 LED 指示灯 (12)3. CANbus 操作 (13)3.1 用于安全相关应用的 CANbus 冗余控制器 (13)3.1.1 并行操作 (13)3.1.2 交叉监控操作 (13)3.2 CANbus 协议 (14)3.3 CANopen (14)3.3.1 标准配置 (14)3.3.2 定制配置 (15)3.3.3 旋转开关–波特率和节点 ID (15)3.3.4 LED (16)3.4 J1939 (17)3.4.1 标准配置 (17)3.4.2 定制配置 (17)3.4.3 旋转开关 (17)3.4.4 LED (17)3.5 CANbus 终端电阻 (18)3.6 CCM12 开机顺序 (18)3.7 主动停止和被动停止 (19)3.8 错误行为 (19)3.9 RF 自动扫描模式 (19)4.1 主连接器 (20)4.2 编程连接器 (21)4.3 RF 连接器 (21)5.1 FCC 第 15 部分声明 (22)5.2 加拿大工业部 (22)5.3 获准天线 (22)6. CE 符合性声明 (22)附录 A：错误代码 (23)附录 B：备件清单 (24)1. 功能概述Cattron CANbus 紧凑型 MCU (CCM12) 是具有 CANbus 接口的无线电远程控制接收器。

(仅供参考)米亚基控制器(CT-110C中文版)

１
正面操作板···························································································································· ２
背面操作板···························································································································· ３
最大电流的设定 ···················································································································· ６
电流校正的方法 ···················································································································· 电池和保险丝的更换 -----------------------------------------------------------------------------------------

● 打开捆包箱后，请确认本装置是否在运输过程中受到破损、附属品是否配备齐全。万一发现装置受损或附属品不全，请立即与销售商或营业担当联系。

注意事项
①禁止擅自复制本本使用说明书的全部或部分章节。 ②关于本使用说明书的内容，将来可能会不经预告而有变更。 ③若发现本使用说明书中有无法理解之处或者记载错误的地方，敬请联系。

RA参数表

10) 参数在第 8 章指定的功能图加以表示(此处为图 G153)。
11-4
Siemens Electrical Drives Ltd. 6RX1700-0AD50 SIMOREG DC Master 使用说明书
05.2007
参数号说明
值范围 [单位] 步长
11.1
r000
运行状态显示
运行状态显示状态显示，故障和报警信息
(控制字 2，位 31，见 P691)
[自版本 1.8 起]
o4 等待电压(电枢)
o4.0 等待在电源端子 1U1，1V1，1W1 的电压。电压和频率必须在参数
P351，P352，P353，P363 和 P364 规定的范围内。也见 P078.001。
o4.1 等待熔断器监控器 OK 信号
[自版本 1.7 起]
o7 等待合闸指令( = READY TO SWITCH ON) o7.0 等待通过端子 37 的合闸指令。 o7.1 等待由开关量连接器(根据在参数 P654 中的选择)或控制字，0 位
(根据在参数 P648 中的选择)的合闸指令。 o7.2 等待通过一个外部分闸指令输入的内部分闸取消或等待“用励磁
功能模拟量输出开关量输出基本整流器上串行接口的配置监控功能的解除补偿值晶闸管诊断关于 DriveMonitor 和 OP1S 的参数程序文件参数故障存贮器只读参数: 报警装置标志只读参数: 控制字和状态字复位和存储参数，现有的和更改的 P 和 r 参数密码保护，钥匙/锁的作用原理处理器利用率其他串行接口的开关量连接器/连接器的转换换向监控设定值的减小输入和输出功能定义继电器输出端子 109/110 功能意义启动脉冲速度调节器用于起重机 4 级主开关的计算带有 SCI1 的 SCB1 的配置在板安装位置 2 和 3 的附加板的配置 SIMOLINK 板的配置 EB1 扩展板的配置 EB2 扩展板的配置 SBP 脉冲编码器板的配置并行接口的配置用于 SIMOREG CM (控制模块)的参数外部励磁单元额定直流电流模拟工作模式 DriveMonitor 的参数槽禁止激活 DriveMonitor 的参数 DriveMonitor 的参数专家的参数存取现存的和更改的 U 和 n 参数

ABB马达保护器

说明：MD2/MD3 的详细描述请参阅第 8 节：附件。
3 安装及尺寸
M101-M/M102-M 的外形尺寸为：宽×高×深=110 ×140×75mm
安装方式：标准卡轨 TS35×15 MD2 的外形尺寸为：宽×高×深=88×72×35mm MD2 的面板开孔尺寸为：宽×高=84×68mm MD3 的外形尺寸为：宽×高×深=88×50×33mm MD3 的面板开孔尺寸为：宽×高=84×46mm M101-M/M102-M 及 MD2/MD3 安装注意事项请参照 M101-M/M102-M 安装手册。
4 M101-M/M102-M 的接口
MD3
M101-M/ M102-M
图 3 M101-M/M102-M 的典型安装
M101-M/M102-M 具有 4 块 I/O 端子排。 I/O 端子板安装在主单元的上部，如图 4 所示：（端子定义参见 4.1）
4 技术说明,如有变更恕不另行通知。
ABB © 厦门 ABB 低压电器设备有限公司 200703
3 安装及尺寸 ................................................................ 4
4 M101-M/M102-M 的接口 ...................................................... 4 4.1 端子定义 ................................................................ 5 4.2 典型应用图 ............................................................. 10

OMRONPLCEView触摸屏编程使用说明书

OMRONPLCEView触摸屏编程使用说明书DMP-300F型中小型水电站触摸式机组自动化屏(OMRON PLC +EView 触摸屏)编程使用讲明书文件编号：HN/QF.13-0002-004版本号： A发放编号：持册人：长沙华能自控集团有限公司目录1.OMRON CJ1M系列PLC介绍 (3)1.1.CPU单元（使用CJ1M-CPU13） (3)1.2.通信单元（使用CJ1W-SCU41） (8)1.3.I/O单元 (8)1.4.模块安装及地址分配 (9)2.OMRON PLC常用编程指令 (9)2.1.梯形图指令 (9)2.2.位元（B IT）操纵指令 (9)2.3.终止指令（END） (10)2.4.定时器和计数器指令 (10)2.5.数据移位元元元指令 (11)2.6.数据传送指令 (11)2.7.数据比较指令 (13)2.8.数据转换指令 (14)2.9.BCD码运算指令 (14)2.10.二进制元运算指令 (17)2.11.逻辑指令 (17)2.12.子程序和中断操纵指令 (18)2.13.串行通信指令（PMCR） (19)3.OMRON PLC程序编辑软件 (20)3.1.CX-P ROGRAMMER中对PLC的初始化设置 (20)3.2.PLC设定 (20)3.3.CX-P ROGRAMMER中对PLC的联机操作 (21)3.4.程序中各个子程序的用途定义 (21)4.OMRON PLC通信程序编辑软件 (22)4.1.与PLC通信单元箱地址设定 (22)4.2.4-2PLC协议编制软件（CX-P ROTOCOL）通信口设定 (23)4.3.PLC协议编制软件使用简单讲明 (23)4.4.PLC与单元箱通信协议注意事项： (24)5.EASYVIEW触摸屏程序编辑软件 (24)5.1.与OMRON PLC连接参数设定 (24)5.2.一样参数设定（通过“编辑――系统参数的一样页进行设定） (24)5.3.组件功能讲明 (25)5.4.触摸屏程序的下载 (28)5.5.触摸屏程序调试 (28)6.水机屏PLC程序资料寄存器分配 (29)6.1.PLC内部时钟存放区(D0～D6) (29)6.2.PLC事故资料中转区（D10～D19） (29)6.3.发生的水机操作、故障、事故报警个数存放区（D20）： (29)6.4.水机状态（遥信量）存放区（D21～D30）： (29)6.5.PLC事故存放区：（D4000～D5999）共存放200条事故资料 (30)6.6.PLC与单元箱通信辅助中间寄存器: (30)6.7.PLC与单元通信中断判定辅助寄存器: (30)6.8.PLC与HMI(触摸屏)间固定使用寄存器: (31)6.9.触摸屏及后台操作定义（无专门要求） (32)7.触摸屏模拟量显示设定 (32)8.OMRON PLC通信协议 (34)8.1.PLC使用 (34)8.2.对时使用 (35)8.3.单元箱使用 (35)8.4.PLC通信协议接线图 (39)1.OMRON CJ1M系列PLC介绍当前水机自动化屏大多使用OMRON CJ1M系列PLC，这种PLC为模块式，而且没有底板。

X20(c)DI9371 12通道1-线连接数字输入模块说明书

X20(c)DI93711 General InformationThe module is equipped with 12 inputs for 1-wire connections. The module is designed for sink input wiring.•12 digital inputs•Sink connection•1-wire connections•Software input filter can be configured for entire module2 Coated modulesCoated modules are X20 modules with a protective coating for the electronics component. This coating protects X20c modules from condensation and corrosive gases.The modules' electronics are fully compatible with the corresponding X20 modules.For simplification purposes, only images and module IDs of uncoated modules are used in this data sheet.The coating has been certified according to the following standards:•Condensation: BMW GS 95011-4, 2x 1 cycle•Corrosive gas: EN 60068-2-60, method 4, exposure 21 days2.1 -40°C starting temperatureThe starting temperature describes the minimum permissible ambient temperature when the power is switched off at the time the coated module is switched on. This is permitted to be as low as -40°C. During operation, the conditions as specified in the technical data continue to apply.Information:It is important to absolutely ensure that there is no forced cooling by air currents in a closed control cabinet, for example using a fan or ventilation slots.3 Order dataTable 1: X20DI9371, X20cDI9371 - Order data4 Technical dataTable 2: X20DI9371, X20cDI9371 - Technical dataTable 2: X20DI9371, X20cDI9371 - Technical data5 Status LEDsFor a description of the various operating modes, see section "Additional information - Diagnostic LEDs" of the X20 system user's manual.6 Pinout179X 20 D I 9371110112234568r e 7 Connection exampleDI8 Input circuit diagram9 Input filterAn input filter is available for each input. The input delay can be set using register "ConfigOutput01" on page 7. Disturbance pulses which are shorter than the input delay are suppressed by the input filter.10 DeratingBe aware of the derating values below for the simultaneity factor. Derating of simultaneity factor at 24 VDC input voltageDerating of simultaneity factor at 28.8 VDC input voltage11 Register description11.1 General data pointsIn addition to the registers described in the register description, the module has additional general data points. These are not module-specific but contain general information such as serial number and hardware variant. General data points are described in section "Additional information - General data points" of the X20 system user's manual.11.2 Function model 0 - StandardFixed modules require their data points to be in a specific order in the X2X frame. Cyclic access occurs according to a predefined offset, not based on the register address.Acyclic access continues to be based on the register numbers.11.3 Function model 254 - Bus Controller1)The offset specifies where the register is within the CAN object.11.3.1 Using the module on the bus controllerFunction model 254 "Bus controller" is used by default only by non-configurable bus controllers. All other bus controllers can use other registers and functions depending on the fieldbus used.For detailed information, see section "Additional information - Using I/O modules on the bus controller" of the X20 user's manual (version 3.50 or later).11.3.2 CAN I/O bus controllerThe module occupies 2 digital logical slots on CAN I/O.11.4 Digital inputsUnfilteredThe input state is collected with a fixed offset to the network cycle and transferred in the same cycle.FilteredThe filtered status is collected with a fixed offset to the network cycle and transferred in the same cycle. Filtering takes place asynchronously to the network in multiples of 200 µs with a network-related jitter of up to 50 µs.11.4.1 Digital input filterName:ConfigOutput01This register can be used to specify the filter value for all digital inputs.The filter value can be configured in steps of 100 μs. It makes sense to enter values in steps of 2, however, since the input signals are sampled every 200 μs.11.4.2 Input state of digital inputs 1 to 12Name:DigitalInput orDigitalInput01 to DigitalInput12This register indicates the input state of digital inputs 1 to 12.Only function model 0 - StandardThe "Packed inputs" setting in the Automation Studio I/O configuration is used to determine whether all of the bits from these registers should be set up individually as data points in the Automation Studio I/O mapping ("Digi-talInput01" to "DigitalInput12") or whether this register should be displayed as an individual UINT data point ("Dig-italInput").Bit structure:Register 0Register 111.5 Minimum cycle timeThe minimum cycle time specifies the time up to which the bus cycle can be reduced without communication errors occurring. It is important to note that very fast cycles reduce the idle time available for handling monitoring, diagnostics and acyclic commands.11.6 Minimum I/O update timeThe minimum I/O update time specifies how far the bus cycle can be reduced so that an I/O update is performed in each cycle.。

mainunit

Model No.Global Code LT3201-A1-D24-K PFXLT3201AADK LT3201-A1-D24-C PFXLT3201AADC LT3300-L1-D24-K PFXLT3300LADK LT3300-L1-D24-C PFXLT3300LADC LT3300-S1-D24-K PFXLT3300SADK LT3300-S1-D24-C PFXLT3300SADC LT3301-L1-D24-K PFXLT3301LADK LT3301-L1-D24-CPFXLT3301LADCSoftware" ** " is changed with the version of software.Model No.Global CodeEX-ED-V**PFXEXEDV**EXEDV**PFXEXEDV**EX-ED-LICENSE-V**PFXEXEDLSV**EX-SDV-V**PFXEXSDVV**EX-SED-LICENSEPFXEXSDLS EX-SRT-LICENSEPFXEXSRLS EX-MES-LICENSE-V**PFXEXMSLSV**Model No.Global Code EXM-DDI8DT PFXZLTEUDDI8DT EXM-DDI16DT PFXZLTEUDDI16DT EXM-DRA8RT PFXZLTEUDRA8RT EXM-DRA16RT PFXZLTEUDRA16RT EXM-DDO8UT PFXZLTEUDDO8UT EXM-DDO16UK PFXZLTEUDDO16UK EXM-DDO8TT PFXZLTEUDDO8TT EXM-DDO16TK PFXZLTEUDDO16TK EXM-DMM8DRT PFXZLTEUDMM8DRT EXM-DMM24DRF PFXZLTEUDMM24DRF EXM-AMI2HT PFXZLTEUAMI2HT EXM-ALM3LT PFXZLTEUALM3LT EXM-AMM3HT PFXZLTEUAMM3HT EXM-AMO1HT PFXZLTEUAMO1HT EXM-AMI4LT PFXZLTEUAMI4LT EXM-AVO2HT PFXZLTEUAVO2HT EXM-AMM6HT PFXZLTEUAMM6HT EXM-ARI8LT PFXZLTEUARI8LT CA8-CANLT-01PFXZC8EUCA1HTB1C0DM9LPPFXHTB1C0DM9LPProduct NameProduct Name GP-Pro EXGP-Pro EX Editor-License LT3000 SeriesLT-3201A LT-3300LLT-3300S LT-3301LPro-Server EX DeveloperPro-Server EX Developer License Pro-Server EX Runtime LicenseMES Action LicenseProduct Name8-point Input Module 16-point Input Module 8-point Relay Output module 16-point Relay Output module 8-point Shink Output module 16-point Shink Output module 8-point Source Output module 16-point Source Output module 4-Point Input/ 4-Point Reley Output Module 16-Point Input/ 8-point Relay Output Module 2-ch Analog Input Module2-ch Analog Output Module4-ch Analog Input/ 2-ch Analog OutputModule8-ch Thermocouple Pt100/ Pt1000 InputModule2-ch Thermocouple Pt100 Input/ 1-ch AnalogOutput Module2-ch Analog Input/ 1-ch Analog OutputModule1-ch Analog Output Module4-ch Analog Input/ Thermocouple InputModuleCANopen Master Unit CANopen Slave HTB UnitModel No.Global Code 5m CA3-CBL232/5M-01PFXZC3CBR2515m CA3-CBL422-01PFXZC3CBR452 5mCA3-CBL422/5M-01PFXZC3CBR451CA3-ADPCOM-01PFXZC3ADCM1CA3-ADPTRM-01PFXZC3ADR41CA3-ISO232-01PFXZC3ADISR212mCA3-USBCB-01PFXZC3CBUSA15m FP-US00PFXZC0CBUS11mCA5-USBEXT-01PFXZC5CBUBEX150cmCA6-USB232-01PFXZC6CBCVUSR21CA6-DFS4-01PFXZC6DS41CA3-DFS6-01PFXZC3DS61Environmentally-resistant Cover CA4-DCMDL-01PFXZC4CNDCM1Panel Cutout AdapterCA4-ATM5-01PFXZC4AT61SPIDER8TX-PROPFXSPIDER8TXPROPlease purchase when the products is damaged or lost.Model No.Global CodeST400-WP01PFXZSTWG41CA3-WPG6-01PFXZC3WG61CA5-USBATL-01PFXZC5CLUSBL CA7-USBAT6-01PFXZC7CLUSB1DC Power SupplyConnectorCA5-DCCNM-01PFXZC5CNDCM1CA3-ATFALL-01PFXZC3AT1CA6-DIOCN4-01PFXZC6CNXY181CA7-DIOCN5-01PFXZC7CNXY321CA6-EXMCNHE20P-01PFXZC6CNEXHE201CA6-EXMCNRS10P-01PFXZC6CNEXRS101CA6-EXMCNRS11P-01PFXZC6CNEXRS111EX Module SecuringHookCA7-FIXEXM-01PFXZC7CLEXM1CA7-HTBCNSET-01PFXZC7CNHTB1USB Cable ClampFor 5.7 InchFor 3.8 InchFor 5.7 Inch DIO ConnectorInstallation FastenerScree Protection SheetFor 3.8 InchFor 5.7 Inch For 3.8 InchInstallation GasketFor 3.8 InchFor 5.7 Inch For 5.7 InchFor 5.7 InchProduct NameIndustrial HUBFor 5.7 InchProduct NameUSB Serial RS-232C ConversionCableRS-232C Cable RS-422 Cable USB Transfer Cable USB Cable RS-422 Cable(For a Unit of Terminal Resistance 100 Ohm)USB Front Cable COM Port Conversion Adapter RS-232C Isolation Unit Terminal Block Conversion Adapter MIL Connecter (20-pins) for EX module Terminal Connecter (10-pins) for EX module Terminal Connecter (11-pins) for EX module DIO Connecter for HTBFor 5.7 Inch。

Moxa MPC-2121 系列 12 吋工業無風扇面板電腦說明说明书

MPC-2121系列符合EN50155標準的12吋工業無風扇面板電腦，適用於鐵路市場特色與優點•12吋面板電腦•Intel Atom®處理器E38451.91GHz•1000尼特日光下可視的LCD•-40至70°C寬溫設計，無風扇或加熱器•符合EN50155:2017標準認證簡介MPC-212112吋面板電腦搭載E3800系列Intel Atom®處理器，為工業環境提供可靠耐用的多功能平台。

所有介面均配備IP66防護等級M12連接器，藉以提供防震和防水連接。

MPC-2121面板電腦配備兩種軟體可選擇的RS-232/422/485串列埠和兩個乙太網路連接埠，支援多種串列介面以及高速IT通訊，所有這些都提供本機網路備援。

MPC-2121系列面板電腦支援-40至70°C的寬溫工作範圍，並採用無風扇、流線型外殼，專為高效散熱而設計，成為易震動、嚴苛、炎熱的戶外環境中最可靠工業平台之一。

MPC-2121也配備1000尼特LCD面板，提供日光下可視的投射電容式多點觸控螢幕，達到絕佳使用者體驗。

外觀規格ComputerCPU Intel Atom®Processor E3845(2M Cache,1.91GHz)Graphics Controller Intel®HD GraphicsSystem Memory Pre-installed4(8GB Max.)GB DDR3LSystem Memory Slot SODIMM DDR3/DDR3L slot x1Pre-installed OS MPC-2121-E4-LB-CT-T-W7E/MPC-2101-E4-CT-T-W7E:Windows Embedded Standard7(WS7P)64-bit pre-installedMPC-2121-E4-LB-CT-T-LX/MPC-2121-E4-CT-T-LX:Linux9pre-installedSupported OS Windows10Pro64-bitWindows10Embedded IoT Ent2019LTSC64-bitWindows10Embedded IoT Ent2016LTSBWindows7Pro for Embedded SystemsWindows Embedded Standard7(WS7P)64-bitLinux Debian9Expansion Slots Mini PCIeStorage Slot CFast slot x1SD slots x1,SD3.0(SDHC/SDXC)socketStorage Pre-installed MPC-2121-E4-LB-CT-T-W7E/MPC-2121-E4-CT-T-W7E:32GB CFast CardMPC-2121-E4-LB-CT-T-LX/MPC-2121-E4-CT-T-LX:32GB CFast CardComputer InterfaceEthernet Ports Auto-sensing10/100Mbps ports(M12D-coded4P)x2Serial Ports RS-232/422/485ports x1(M12A-code12P)USB2.0USB2.0hosts x1(M12A-coded5P)Digital Input DIs x4(M12A-code)Digital Output DOs x2(M12A-code)LED IndicatorsSystem Power x1DisplayActive Display Area245.76(H)x184.32(V)mmAspect Ratio4:3Contrast Ratio1000:1Light Intensity(Brightness)500/1000cd/m2Max.No.of Colors16.2M(8-bit/color)Panel Size12-inch viewable imagePixel Pitch(RGB)0.240(H)x0.240(V)mmPixels1024x768Response Time5ms(gray to gray)Viewing Angles176°/176°Touch FunctionTouch Type Capacitive Touch(PCAP)Touch Support Points4pointsGlove Support YesSerial InterfaceBaudrate50bps to115.2kbpsData Bits5,6,7,8Flow Control RTS/CTS,XON/XOFFParity None,Even,Odd,Space,MarkStop Bits1,1.5,2Serial SignalsRS-232TxD,RxD,RTS,CTS,DTR,DSR,DCD,GND RS-422Tx+,Tx-,Rx+,Rx-,GNDRS-485-2w Data+,Data-,GNDRS-485-4w Tx+,Tx-,Rx+,Rx-,GNDPower ParametersInput Voltage24to110VDCPhysical CharacteristicsHousing MetalIP Rating IP66Dimensions297x238x59mm(11.69x9.37x2.32in) Weight2850g(6.28lb)Environmental LimitsOperating Temperature-40to70°C(-40to158°F)Storage Temperature(package included)-40to70°C(-40to158°F)Ambient Relative Humidity5to95%(non-condensing)Standards and CertificationsEMI CISPR32,FCC Part15B Class AEMS IEC61000-4-2ESD:Contact:6kV;Air:8kVIEC61000-4-3RS:80MHz to1GHz:20V/mIEC61000-4-4EFT:Power:2kV;Signal:2kVIEC61000-4-5Surge:Power:2kV;Signal:1kVIEC61000-4-6CS:10VIEC61000-4-8PFMFMechanical Protection Rating IEC60529,IP codeShock EN50155standardVibration EN50155standardEMC EN55032/35Safety IEC60950-1,IEC62368-1,UL62368-1 DeclarationGreen Product RoHS,CRoHS,WEEEWarrantyWarranty Period LCD:1yearSystem:3yearsDetails See /tw/warrantyPackage ContentsDevice1x MPC-2121Series computerInstallation Kit6x screw,for panel-mounting1x M12-Phone jack power cable1x M12-Type A USB cable1x terminal block,2-pin(for remote power input) Documentation1x quick installation guide1x warranty card尺寸訂購資訊2.0MPC-2121-E4-LB-CT-T-W7E 12"(4:3)500nitsE3845Quadcore4GBW7E(64-bit)2(M12)1(M12)1(M12)4/2(M1-2)24to110VDCIP66-40to70°CMPC-2121-E4-CT-T-W7E12"(4:3)1,000nitsE3845Quadcore4GBW7E(64-bit)2(M12)1(M12)1(M12)4/2(M1-2)24to110VDCIP66-40to70°CMPC-2121-E4-LB-CT-T-LX 12"(4:3)500nitsE3845Quadcore4GB Debian92(M12)1(M12)1(M12)4/2(M1-2)24to110VDCIP66-40to70°CMPC-2121-E4-CT-T-LX12"(4:3)1,000nitsE3845Quadcore4GB Debian92(M12)1(M12)1(M12)4/2(M1-2)24to110VDCIP66-40to70°CMPC-2121-E4-LB-CT-T 12"(4:3)500nitsE3845Quadcore4GB–2(M12)1(M12)1(M12)4/2(M1-2)24to110VDCIP66-40to70°CMPC-2121-E4-CT-T12"(4:3)1,000nitsE3845Quadcore4GB–2(M12)1(M12)1(M12)4/2(M1-2)24to110VDCIP66-40to70°C©Moxa Inc.版權所有.2021年3月11日更新。

新时达主板说明

第一讲全并行控制系统功能介绍1.1.系统功能列表1.2.安全保护功能列表第二讲全并行控制系统构成 2.1.产品分类2.2. 系统主要部件性能指标2.2.1性能特点➢富士通工控单片机；➢四层板表贴工艺，CAN总线串行通讯；➢高智能，高可靠性；➢键盘操作，液晶显示；➢配有RS232/RS485接口。

2.2.2. 适用范围➢载货电梯(变频驱动、液压驱动、双速驱动)；➢速度范围0～1.0m/s；2.2.3. 参照标准➢《（GB7588-2003）电梯制造与安装规范》2.2.4. 电源规格➢电压：DC24V ±1.0V；➢功耗：主控制电脑板SM-01-DP/C 25W；扩展板SM-10-IO/C 6W。

2.2.5. 工作温度➢器件工作温度-20ºC ~ +60ºC（液晶显示器件除外）2.3. 系统主要部件分类介绍2.3.1. 主控电脑板SM-01-DP/C和扩展板SM-10-IO/C图2-1(A) 主控电脑板SM-01-DP/C 外形图2-1(B) 扩展板SM-10-IO/C 外形安装底板1安装底板22－?52－?52－?42851701202541808022540图2-1(C) 主控电脑板SM-01-DP/C 安装尺寸图2-1(D) 扩展板SM-10-IO/C安装尺寸1．插件规格2．SM-01-DP/C接口定义及规格3．SM-10-IO/C接口定义及规格第三讲主控制板SM-01-DP/C参数介绍3.1 主板参数表3.2 主板F参数设置详细说明：F02——双速梯1A延迟时间即快车接触器吸合后经过该时间快车切换接触器1A吸合，参考值75，范围0S~200,单位：20ms。

F03——双速梯2A延迟时间即慢车接触器吸合后经过该时间慢车切换接触器2A吸合，参考值40，范围0~200,单位：20ms。

F04——双速梯3A延迟时间即慢车切换接触器2A吸合后经过该时间慢车切换接触器3A吸合，参考值25，范围0~200，单位：20ms。

SM-01-C主板参数定义

系统
电机额定转速
电动机铭牌值
1380
50～5000
rpm
9
Encoder Pulses
编码器脉冲数
选用编码器的每转脉冲数
2048
100～5000
pr
10
Main Floor
1
11
Floor Offset
楼层偏置
0
12
No. Of Floor
预设总层数
16
1～48
13
Inspec. Speed
检修速度
检修运行时的速度
抱闸延时1
启动松开抱闸后经延时1给定速度曲线
10
0～40
0.1s
18
Brake Delay2
抱闸延时2
停车时, 抱闸在给定的零速后延时抱闸
5
0～40
0.1s
19
Fire Home
消防基站
1
20
Park Home
关梯基站
1
21
Home Delay
返基时间
0
22
Level Adj.
平层调整
平层不准时调整平层精度
S曲线T0
130
30～400
0.01s
4
S Jerk t1
S曲线T1
100
30～250
0.01s
5
S Jerk t2
S曲线T2
100
30～250
0.01s
6
S Jerk t3
S曲线T3
130
30～400
0.01s
7
Motor Speed
电梯额定速度
电梯标定值
250
50～600