1246中文资料
职称评定认可 期刊名录
复印报刊资料(中小学教育)
11-4299/G4
复印报刊资料(高等教育)
11-4309/G4
复印报刊资料(成人教育学刊)
11-4310/G2
复印报刊资料(幼儿教育导读)
11-4311/G4
复印报刊资料(职业技术教育)
11-4312/G4
复印报刊资料(家庭教育导读)
11-4348/G4
文种 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文 汉文
85 河北教育
13-1036/G4
86 教育实践与研究
13-1259/G4
87 河北大学成人教育学院学报
13-1264/G4
88 河北农业大学学报（农林教育版）
13-1266/G4
89 河北师范大学学报（教育科学版）
13-1286/G
90 中国军事教育
13-1290/G4
91 学苑教育
13-1386/G4
11-1610/G4
学位与研究生教育
11-1736/G4
化学教育
11-1923/O6
中国健康教育
11-2513/R
中国音乐教育
11-2543/J
思想教育研究
11-2549/D
中国教育学刊
11-2606/G4
中-2688/G4
中国林业教育
11-2729/S
序号123456789101112131415161718192021222324252627282930313233343536373839404142434445期刊名称期刊cn号文种出版状态未来教育家101044g4汉文教育与职业111004g4汉文北京教育111129g4汉文艺术教育111188j汉文人民教育111199g4汉文中国高等教育111200g4汉文教育研究111281g4汉文中医教育111349r汉文学前教育111371g4汉文心理发展与教育111608b汉文清华大学教育研究111610g4汉文学位与研究生教育111736g4汉文化学教育111923o6汉文中国健康教育112513r汉文中国音乐教育112543j汉文思想教育研究112549d汉文中国教育学刊112606g4汉文中国基础教育研究115187g4汉文民族教育研究112688g4汉文中国林业教育112729s汉文中国民族教育112792g4汉文比较教育研究112878g4汉文公安教育112963d汉文中国职业技术教育113117g4汉文中国校外教育113173g4汉文中国职工教育113311g4汉文继续教育113315g4石油教育113322g4汉文中国冶金教育113775g4汉文中国电力教育113776g4汉文中国地质教育113777g4汉文环境教育113784g4汉文中国电化教育113792g4汉文中国特殊教育113826g4汉文思想理论教育导刊114062g4汉文中国远程教育114089g4汉文世界教育信息114123g4汉文复印报刊资料教育学114297g4汉文复印报刊资料思想政治教育114298g4汉文复印报刊资料中小学教育114299g4汉文复印报刊资料高等教育114309g4汉文复印报刊资料成人教育学刊114310g2汉文复印报刊资料幼儿教育导读114311g4汉文复印报刊资料职业技术教育114312g4汉文复印报刊资料家庭教育导读114348g4汉文职称评定认可教育类期刊名录4647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192复印报刊资料素质教育114350g4汉文报刊资料索引文化教育体育分册114364g汉文中国口腔医学继续教育杂志114430r汉文现代教育技术114525n汉文教
中英文国家长途区号和代号
长途区号国家代号国家名称（中文）国家名称（英文）684AS美属萨摩亚American Samoa1264AI安圭拉岛(英)Anguilla1268AG安提瓜和巴布达Antigua and Barbuda1242BS巴哈马国Bahamas (Commonwealth of the)1246BB巴巴多斯Barbados1441BM百慕大群岛(英)Bermuda1284VG英属维尔京群岛British Virgin Islands1CA加拿大Canada1345KY开曼群岛(英)Cayman Islands1767DM多米尼加联邦Dominica (Commonwealth of)1809DO多米尼加共和国Dominican Republic1473GD格林纳达Grenada1671GU关岛(美)Guam1876JM牙买加Jamaica1664蒙特塞拉特岛(英)Montserrat1670MP北马里亚纳群岛Northern Mariana Islands (Commonwealth of the) 1787PR波多黎各(美)Puerto Rico1869KN圣基茨和尼维斯Saint Kitts and Nevis1758LC圣卢西亚Saint Lucia1784VC圣文森特和格林纳丁斯Saint Vincent and the Grenadines1868特立尼达和多巴哥Trinidad and Tobago1649特克斯和凯科斯群岛Turks and Caicos Islands1US美国United States of America1VI美属维尔京群岛United States Virgin Islands20EG埃及Egypt (Arab Republic of)212MA摩洛哥Morocco (Kingdom of)213DZ阿尔及利亚Algeria (People's Democratic Republic of)216突尼斯Tunisia218LY利比亚Libya (Socialist People's Libyan Arab Jamahiriya) 220GM冈比亚Gambia (Republic of the)221SN塞内加尔Senegal (Republic of)222MR毛里塔尼亚Mauritania (Islamic Republic of)223马里Mali (Republic of)224GN几内亚Guinea (Republic of)225科特迪瓦C魌e d'Ivoire (Republic of)226布基纳法索Burkina Faso227NE尼日尔Niger (Republic of the)228TG多哥Togolese Republic229BJ贝宁Benin (Republic of)230MU毛里求斯Mauritius (Republic of)231LR利比里亚Liberia (Republic of)232SL塞拉利昂Sierra Leone233加纳Ghana234GG格恩西岛(英)Guernsey234NG尼日利亚Nigeria (Federal Republic of)235TD乍得共和国Chad (Republic of)236CF中非共和国Central African Republic237CM喀麦隆共和国Cameroon (Republic of)238佛得角共和国Cape Verde (Republic of)239ST圣多美和普林西比Sao Tome and Principe (Democratic Republic of)240GN赤道几内亚Equatorial Guinea (Republic of)241GB加蓬Gabonese Republic242CG刚果(布)Congo (Republic of the)243DC刚果民主(金)Democratic Republic of the Congo244AO安哥拉Angola (Republic of)245GW几内亚比绍共和国Guinea-Bissau (Republic of)246DG迪戈加西亚岛Diego Garcia247阿森松岛Ascension248塞舌尔Seychelles (Republic of)249SD苏丹Sudan (Republic of the)250RW卢旺达Rwanda (Republic of)251ET埃塞俄比亚Ethiopia (Federal Democratic Republic of)252SO索马里Somali Democratic Republic253吉布提Djibouti (Republic of)254KE肯尼亚Kenya (Republic of)255TZ坦桑尼亚Tanzania (United Republic of)256UG乌干达Uganda (Republic of)257BI布隆迪Burundi (Republic of)258MZ莫桑比克Mozambique (Republic of)260ZM赞比亚Zambia (Republic of)261MG马达加斯加Madagascar (Republic of)262留尼汪(法)French Departments and Territories in the Indian Ocean 263ZW津巴布韦Zimbabwe (Republic of)264纳米比亚Namibia (Republic of)265MW马拉维Malawi266LS莱索托Lesotho (Kingdom of)267BW博茨瓦纳Botswana (Republic of)268SZ斯威士兰Swaziland (Kingdom of)269科摩罗Comoros (Union of the)269马约特岛Mayotte27ZA南非South Africa (Republic of)290圣赫勒拿(英)Saint Helena290特里斯坦-达库尼亚群岛Tristan da Cunha291厄立特里亚Eritrea297阿鲁巴(荷)Aruba298FO法罗群岛(丹)Faroe Islands299GL格陵兰(丹)Greenland (Denmark)30GR希腊Greece31NL荷兰Netherlands (Kingdom of the)32BE比利时Belgium33FR法国France34ES西班牙Spain350GI直布罗陀(英)Gibraltar351PT葡萄牙Portugal352LU卢森堡Luxembourg353IE爱尔兰Ireland354IS冰岛Iceland355AL阿尔巴尼亚Albania (Republic of)356马耳他Malta357塞浦路斯Cyprus (Republic of)358FI芬兰Finland359BG保加利亚Bulgaria (Republic of)36HU匈牙利Hungary (Republic of)370LT立陶宛Lithuania (Republic of)371LV拉脱维亚Latvia (Republic of)372EE爱沙尼亚Estonia (Republic of)373MD摩尔多瓦Moldova (Republic of)374AM亚美尼亚Armenia (Republic of)375BY白俄罗斯Belarus (Republic of)376AD安道尔Andorra (Principality of)377MC摩纳哥Monaco (Principality of)378圣马力诺San Marino (Republic of)379梵蒂冈Vatican City State380UA乌克兰Ukraine381塞尔维亚Serbia (Republic of)382黑山Montenegro (Republic of)385克罗地亚Croatia (Republic of)386SI斯洛文尼亚Slovenia (Republic of)387波黑Bosnia and Herzegovina389MK马其顿The Former Yugoslav Republic of Macedonia39IT意大利Italy39梵蒂冈Vatican City State40RO罗马尼亚Romania41CH瑞士Switzerland (Confederation of)420CZ捷克Czech Republic421SK斯洛伐克Slovak Republic423LI列支敦士登Liechtenstein (Principality of)43AT奥地利Austria44GB英国United Kingdom of Great Britain and Northern Ireland45DK丹麦Denmark46SE瑞典Sweden47NO挪威Norway48PL波兰Poland (Republic of)49DE德国Germany (Federal Republic of)500FK福克兰群岛（马尔维纳斯群岛）Falkland Islands (Malvinas)501BZ伯利兹Belize502GT危地马拉Guatemala (Republic of)503SV萨尔瓦多El Salvador (Republic of)504HN洪都拉斯Honduras (Republic of)505NI尼加拉瓜Nicaragua506CR哥斯达黎加Costa Rica507PA巴拿马Panama (Republic of)508PM圣皮埃尔和密克隆(法)Saint Pierre and Miquelon (Collectivit?territoriale de la R閜ublique 509HT海地Haiti (Republic of)51PE秘鲁Peru52MX墨西哥Mexico53CU古巴Cuba54AR阿根廷Argentine Republic55BR巴西Brazil (Federative Republic of)56CL智利Chile57CO哥伦比亚Colombia (Republic of)58VE委内瑞拉Venezuela (Bolivarian Republic of)58LC圣卢西亚590瓜德罗普(法)Guadeloupe (French Department of)591BO玻利维亚Bolivia (Republic of)592GF圭亚那Guyana593EC厄瓜多尔Ecuador594GF法属圭亚那French Guiana (French Department of)595PY巴拉圭Paraguay (Republic of)596MQ马提尼克(法)Martinique (French Department of)597苏里南Suriname (Republic of)598UY乌拉圭Uruguay (Eastern Republic of)599荷属安第列斯Netherlands Antilles60MY马来西亚Malaysia61AU澳大利亚Australia62ID印尼Indonesia (Republic of)63PH菲律宾Philippines (Republic of the)64NZ新西兰New Zealand65SG新加坡Singapore (Republic of)66TH泰国Thailand670TL东帝汶Democratic Republic of Timor-Leste672AU澳大利亚Australian External Territories673文莱Brunei Darussalam674NR瑙鲁Nauru (Republic of)675PG巴布亚新几内亚Papua New Guinea676TO汤加Tonga (Kingdom of)677所罗门群岛Solomon Islands678瓦努阿图Vanuatu (Republic of)679斐济群岛Fiji (Republic of)680帕劳Palau (Republic of)681WF沃利斯群岛和富图纳群岛Wallis and Futuna (Territoire fran鏰is d'outre-mer) 682库克群岛(新)Cook Islands683纽埃(新)Niue685WS萨摩亚Samoa (Independent State of)686基里巴斯Kiribati (Republic of)687新喀里多尼亚(法)New Caledonia (Territoire fran鏰is d'outre-mer) 688TV图瓦卢Tuvalu689法属玻利尼西亚French Polynesia (Territoire fran鏰is d'outre-mer) 690TK托克劳(新)Tokelau691FM密克罗尼西亚联邦Micronesia (Federated States of)692MH马绍尔群岛共和国Marshall Islands (Republic of the)7KZ哈萨克斯坦Kazakhstan (Republic of)7RU俄罗斯Russian Federation81JP日本Japan82KR韩国Korea (Republic of)84VN越南Viet Nam (Socialist Republic of)850KP朝鲜Democratic People's Republic of Korea852HK香港Hong Kong, China853MO澳门Macao, China855柬埔寨Cambodia (Kingdom of)856LA老挝Lao People's Democratic Republic86CN中国China (People's Republic of)870海事卫星电话Inmarsat SNAC880BD孟加拉Bangladesh (People's Republic of)886TW台湾Taiwan, China90TR土耳其Turkey91IN印度India (Republic of)92PK巴基斯坦Pakistan (Islamic Republic of)93AF阿富汗Afghanistan94LK斯里兰卡Sri Lanka (Democratic Socialist Republic of) 95MM缅甸Myanmar (Union of)960MV马尔代夫Maldives (Republic of)961LB黎巴嫩Lebanon962JO约旦Jordan (Hashemite Kingdom of)963SY叙利亚Syrian Arab Republic964IQ伊拉克Iraq (Republic of)965KW科威特Kuwait (State of)966SA沙特Saudi Arabia (Kingdom of)967YE也门Yemen (Republic of)968OM阿曼Oman (Sultanate of)970PS巴勒斯坦Reserved for the Palestinian Authority.971阿联酋United Arab Emirates972IL以色列Israel (State of)973BH巴林Bahrain (Kingdom of)974QA卡塔尔Qatar (State of)975BT不丹Bhutan (Kingdom of)976MN蒙古Mongolia977NP尼泊尔Nepal (Federal Democratic Republic of)98IR伊朗Iran (Islamic Republic of)992TJ塔吉克斯坦Tajikistan (Republic of)993TM土库曼斯坦Turkmenistan994AZ阿塞拜疆Azerbaijani Republic995GE格鲁吉亚Georgia996吉尔吉斯斯坦Kyrgyz Republic998UZ乌兹别克斯坦Uzbekistan (Republic of)h of the) an Arab Jamahiriya) mocratic Republic of)e Indian Oceanoniaain and Northern Irelandollectivit?territoriale de la R閜ublique fran鏰ise)鏰is d'outre-mer)n鏰is d'outre-mer) ran鏰is d'outre-mer)of)。
管件中英文对照
管件曲率半径
曲率半径
曲线的曲率。
平面曲线的曲率就是是针对曲线上某个点的切线方向角对弧长的转动率，通过微分来定义，表明曲线偏离直线的程度。
K=lim|Δα/Δs| Δs趋向于0的时候，定义k就是曲率。
曲率的倒数就是曲率半径。
曲率半径主要是用来描述曲线上某处曲线弯曲变化的程度特殊的如：一个圆上任一圆弧的曲率半径恰好等于圆的半径 ,也许可以这样理解：就是把那一段曲线尽可能的微分，直到最后近似一个圆弧，这个圆弧对应的半径吧，个人理解
比如说
曲率/曲率半径应用题
一飞机沿抛物线路径y=(x^2)/10000（y轴铅直向上，单位为m）作俯冲飞行，在坐标原点O处飞机的速度为v=200m/s。
飞行员体重G=70kg。
求飞机俯冲至最
低点即原点O处时座椅对飞行员的反力。
解:
y=x^2/10000
y''=1/2x/10000=x/5000
y"=1/5000
要求飞机俯冲至原点O处座椅对飞行员的反力,令x=0,则:
y''=0
y"=1/5000
代入曲率半径公式ρ=1/k=[(1+y''^2)^(3/2)]/∣y"∣=5000米
所以飞行员所受的向心力F=mv^2/ρ=70*200^2/5000=560牛
得飞机俯冲至原点O处座椅对飞行员的反力
R=F+mg=560+70*9.8=1246N。
050-607-5517899中文资料
Part Number F50-A28-3002A90 F50-A28-3003A90 F50-A28-3033A90 F50-A28-3035A90 Assembly Instructions F50-A28-3002A90 F50-A28-3003A90 F50-A28-3033A90 F50-A28-3035A90 Cable Numbers 2YCCY 0.4/2.5 2YCY 0.7/4.4 BT2003 BT3002, TZC75024
Part Number F50-A11-3002A90 F50-A11-3003A90 Cable Numbers 2YCCY 0.4/2.5, 2YC(MS)CY 0.4/2.5 ST121 2YCY 0.7/4.4 RG59B/U, ST120, ST214
Assembly Instruction BBAI-1231 (Apply ITT Cannon Sales Dept.) Right Angle Crimp Plug Screw Coupling
ADC12062CIVF中文资料
TL H 11490ADC12062 12-Bit1 MHz 75 mW A D Converter with Input Multiplexer and Sample HoldDecember1994 ADC1206212-Bit 1MHz 75mW A D Converterwith Input Multiplexer and Sample HoldGeneral DescriptionUsing an innovative multistep conversion technique the12-bit ADC12062CMOS analog-to-digital converter digitizessignals at a1MHz sampling rate while consuming a maxi-mum of only75mW on a single a5V supply TheADC12062performs a12-bit conversion in three lower-res-olution‘‘flash’’conversions yielding a fast A D without thecost and power dissipation associated with true flash ap-proachesThe analog input voltage to the ADC12062is tracked andheld by an internal sampling circuit allowing high frequencyinput signals to be accurately digitized without the need foran external sample-and-hold circuit The multiplexer outputis available to the user in order to perform additional exter-nal signal processing before the signal is digitizedWhen the converter is not digitizing signals it can be placedin the Standby mode typical power consumption in thismode is100m WFeaturesY Built-in sample-and-holdY Single a5V supplyY Single channel or2channel multiplexer operationY Low Power Standby modeKey SpecificationsY Sampling rate1MHz(min)Y Conversion time740ns(typ)Y Signal-to-Noise Ratio f IN e100kHz69 5dB(min)Y Power dissipation(f s e1MHz)75mW(max)Y No missing codes over temperature GuaranteedApplicationsY Digital signal processor front endsY InstrumentationY Disk drivesY Mobile telecommunicationsY Waveform digitizersBlock DiagramTL H 11490–1 Ordering InformationIndustrial(b40 C s T A s a85 )PackageADC12062BIV V44Plastic Leaded Chip CarrierADC12062BIVF VGZ44A Plastic Quad Flat PackageADC12062CIV V44Plastic Leaded Chip CarrierADC12062CIVF VGZ44A Plastic Quad Flat PackageADC12062EVAL Evaluation BoardTRI-STATE is a registered trademark of National Semiconductor CorporationC1995National Semiconductor Corporation RRD-B30M75 Printed in U S AAbsolute Maximum Ratings(Notes1 2)If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage(V CC e DV CC e AV CC)b0 3V to a6V Voltage at Any Input or Output b0 3V to V CC a0 3V Input Current at Any Pin(Note3)25mA Package Input Current(Note3)50mA Power Dissipation(Note4)875mW ESD Susceptibility(Note5)2000V Soldering Information(Note6)V Package Infrared 15seconds a300 C VF PackageVapor Phase(60seconds)a215 C Infrared(15seconds)a220 C Storage Temperature Range b65 C to a150 C Maximum Junction Temperature(T JMAX)150 C Operating Ratings(Notes1 2)Temperature Range T MIN s T A s T MAX ADC12062BIV ADC12062CIVADC12062BIVF ADC12062CIVF b40 C s T A s a85 C Supply Voltage Range(DV CC e AV CC)4 5V to5 5VConverter Characteristics The following specifications apply for DV CC e AV CC e a5V V REF a(SENSE)e a4 096V V REF b(SENSE)e AGND and f s e1MHz unless otherwise specified Boldface limits apply for T A e T J from T MIN to T MAX all other limits T A e T J e a25 CSymbol Parameter ConditionsTyp Limit Units (Note7)(Note8)(Limit)Resolution12BitsDifferential Linearity Error T A e25 C g0 4g0 8LSB(max)T MIN to T MAX g0 95LSB(max)Integral Linearity Error T MIN to T MAX(BIV Suffix)g0 4g1 0LSB(max) (Note9)TA e a25 C(CIV Suffix)g0 4g1 0LSB(max)T MIN to T MAX(CIV Suffix)g1 5LSB(max) Offset Error T MIN to T MAX(BIV Suffix)g0 3g1 25LSB(max)T A e a25 C(CIV Suffix)g0 3g1 25LSB(max)T MIN to T MAX(CIV Suffix)g2 0LSB(max) Full Scale Error T MIN to T MAX(BIV Suffix)g0 2g1 0LSB(max)T A e a25 C(CIV Suffix)g0 2g1 0LSB(max)T MIN to T MAX(CIV Suffix)g1 5LSB(max) Power Supply Sensitivity DV CC e AV CC e5V g10%g1 0LSB(max) (Note15)R REF Reference Resistance750500X(min) 1000X(max)V REF(a)V REF a(SENSE)Input Voltage AV CC V(max)V REF(b)V REF b(SENSE)Input Voltage AGND V(min)V IN Input Voltage Range To V IN1 V IN2 or ADC IN AV CC a0 05V V(max)AGND b0 05V V(min) ADC IN Input Leakage AGND to AV CC b0 3V0 13m A(max) C ADC ADC IN Input Capacitance25pFMUX On-Channel Leakage AGND to AV CC b0 3V0 13m A(max)MUX Off-Channel Leakage AGND to AV CC b0 3V0 13m A(max) C MUX Multiplexer Input Cap7pFMUX Off Isolation f IN e100kHz92dB2Dynamic Characteristics(Note10)The following specifications apply for DV CC e AV CC e a5V V REF a(SENSE)e a4 096V V REF b(SENSE)e AGND R S e25X f IN e100kHz 0dB from fullscale and f s e1MHz unless otherwise specified Boldface limits apply for T A e T J from T MIN to T MAX all other limits T A e T J e a25 CSymbol Parameter ConditionsTyp Limit Units (Note7)(Note8)(Limit)SINAD Signal-to-Noise Plus T MIN to T MAX7168 0dB(min) Distortion RatioSNR Signal-to-Noise Ratio T MIN to T MAX7269 5dB(min) (Note11)THD Total Harmonic Distortion T A e a25 C b82b74dBc(max) (Note12)T MIN to T MAX b70dBc(max) ENOB Effective Number of Bits T MIN to T MAX11 511 0Bits(min) (Note13)IMD Intermodulation Distortion f IN e102 3kHz 102 7kHz b80dBc DC Electrical Characteristics The following specifications apply for DV CC e AV CC e a5V V REF a(SENSE)e a4 096V V REF b(SENSE)e AGND and f s e1MHz unless otherwise specified Boldface limits apply for T A e T J from T MIN to T MAX all other limits T A e T J e a25 CSymbol Parameter ConditionsTyp Limit Units (Note7)(Note8)(Limit)V IN(1)Logical‘‘1’’Input Voltage DV CC e AV CC e a5 5V2 0V(min)V IN(0)Logical‘‘0’’Input Voltage DV CC e AV CC e a4 5V0 8V(max) I IN(1)Logical‘‘1’’Input Current0 11 0m A(max) I IN(0)Logical‘‘0’’Input Current0 11 0m A(max)V OUT(1)Logical‘‘1’’Output Voltage DV CC e AV CC e a4 5VI OUT e b360m A2 4V(min)I OUT e b100m A4 25V(min) V OUT(0)Logical‘‘0’’Output Voltage DV CC e AV CC e a4 5V0 4V(max)I OUT e1 6mAI OUT TRI-STATE Output Pins DB0–DB110 13m A(max)Leakage CurrentC OUT TRI-STATE Output Capacitance Pins DB0–DB115pFC IN Digital Input Capacitance4pFDI CC DV CC Supply Current23mA(max) AI CC AV CC Supply Current1012mA(max) I STANDBY Standby Current(DI CC a AI CC)PD e0V20m A3AC Electrical Characteristics The following specifications apply for DV CC e AV CC e a5V V REF a(SENSE)e a4 096V V REF b(SENSE)e AGND and f s e1MHz unless otherwise specified Boldface limits apply for T A e T J from T MIN to T MAX all other limits T A e T J e a25 CSymbol Parameter ConditionsTyp Limit Units (Note7)(Note8)(Limits)f s Maximum Sampling Rate1MHz(min)(1 t THROUGHPUT)t CONV Conversion Time740600ns(min) (S H Low to EOC High)980ns(max)t AD Aperture Delay20ns (S H Low to Input Voltage Held)t S H S H Pulse Width5ns(min)550ns(max)t EOC S H Low to EOC Low9560ns(min) 125ns(max)t ACC Access Time C L e100pF1020ns(max) (RD Low or OE High to Data Valid)t1H t0H TRI-STATE ControlR L e1k C L e10pF2540ns(max) (RD High or OE Low to Databus TRI-STATE)t INTH Delay from RD Low to INT High C L e100pF3560ns(max)t INTL Delay from EOC High to INT Low C L e100pFb25b35ns(min) b10ns(max)t UPDATE EOC High to New Data Valid515ns(max)t MS Multiplexer Address Setup Time50ns(min) (MUX Address Valid to EOC Low)t MH Multiplexer Address Hold Time50ns(min) (EOC Low to MUX Address Invalid)t CSS CS Setup Time20ns(min) (CS Low to RD Low S H Low or OE High)t CSH CS Hold Time20ns(min) (CS High after RD High S H High or OE Low)t WU Wake-Up Time1m s (PD High to First S H Low)Note1 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur Operating Ratings indicate conditions for which the device is functional These ratings do not guarantee specific performance limits however For guaranteed specifications and test conditions see the Electrical Characteris-tics The guaranteed specifications apply only for the test conditions listed Some performance characteristics may degrade when the device is not operated under the listed test conditionsNote2 All voltages are measured with respect to GND(GND e AGND e DGND) unless otherwise specifiedNote3 When the input voltage(V IN)at any pin exceeds the power supply rails(V IN k GND or V IN l V CC)the absolute value of current at that pin should be limited to25mA or less The50mA package input current limits the number of pins that can safely exceed the power supplies with an input current of25mA to twoNote4 The maximum power dissipation must be derated at elevated temperatures and is dictated by T JMAX i JA and the ambient temperature T A The maximum allowable power dissipation at any temperature is P D e(T JMAX b T A) i JA or the number given in the Absolute Maximum Ratings whichever is lower i JA for the V (PLCC)package is55 C W i JA for the VF(PQFP)package is62 C W In most cases the maximum derated power dissipation will be reached only during fault conditions4Note5 Human body model 100pF discharged through a1 5k X resistor Machine model ESD rating is200VNote6 See AN-450‘‘Surface Mounting Methods and Their Effect on Product Reliability’’or the section titled‘‘Surface Mount’’found in a current National Semiconductor Linear Data Book for other methods of soldering surface mount devicesNote7 Typicals are at a25 C and represent most likely parametric normNote8 Tested limits are guaranteed to National’s AOQL(Average Outgoing Quality Level)Note9 Integral Linearity Error is the maximum deviation from a straight line between the measured offset and full scale endpointsNote10 Dynamic testing of the ADC12062is done using the ADC IN input The input multiplexer adds harmonic distortion at high frequencies See the graph in the Typical Performance Characteristics section for a typical graph of THD performance vs input frequency with and without the input multiplexerNote11 The signal-to-noise ratio is the ratio of the signal amplitude to the background noise level Harmonics of the input signal are not included in its calculation Note12 The contributions from the first nine harmonics are used in the calculation of the THDNote13 Effective Number of Bits(ENOB)is calculated from the measured signal-to-noise plus distortion ratio(SINAD)using the equation ENOB e(SINAD b 1 76) 6 02Note14 The digital power supply current takes up to10seconds to decay to its final value after PD is pulled low This prohibits production testing of the standby current Some parts may exhibit significantly higher standby currents than the20m A typicalNote15 Power Supply Sensitivity is defined as the change in the Offset Error or the Full Scale Error due to a change in the supply voltageTRI-STATE Test Circuit and WaveformsTL H 11490–2TL H 11490–3TL H 11490–4TL H 11490–55Typical Performance CharacteristicsReference VoltageError Change vs Offset and Fullscale vs Reference VoltageLinearity Error Change Input VoltageMux ON Resistance vs vs Temperature Digital Supply Current vs TemperatureAnalog Supply Current on Digital Input PinsStandby Mode vs Voltage Current Consumption in vs Temperature Conversion Time (t CONV )vs TemperatureEOC Delay Time (t EOC )Spectral Response(ADC IN)SINAD vs Input Frequency (ADC IN)SNR vs Input Frequency (ADC IN)THD vs Input Frequency TL H 11490–276Typical Performance Characteristics(Continued)(Through Mux)SINAD vs Input Frequency (Through Mux)SNR vs Input Frequency (Through Mux)THD vs Input Frequency Impedance SNR and THD vs Source Reference VoltageSNR and THD vs TL H 11490–28Timing DiagramsTL H 11490–9FIGURE 1 Interrupt Interface Timing (MODE e 1 OE e 1)7Timing Diagrams (Continued)TL H 11490–10FIGURE 2 High Speed Interface Timing (MODE e 1 OE e 1 CS e 0 RD e 0)TL H 11490–11FIGURE 3 CS Setup and Hold Timing for S H RD and OEConnection DiagramsTL H 11490–13Top ViewTL H 11490–29Top View8Pin DescriptionsAV CC These are the two positive analog supplyinputs They should always be connectedto the same voltage source but arebrought out separately to allow for sepa-rate bypass capacitors Each supply pinshould be bypassed to AGND with a0 1m F ceramic capacitor in parallel with a10m F tantalum capacitorDV CC This is the positive digital supply input Itshould always be connected to the samevoltage as the analog supply AV CC Itshould be bypassed to DGND2with a0 1m F ceramic capacitor in parallel with a10m F tantalum capacitorAGND These are the power supply ground pins DGND1 There are separate analog and digital DGND2ground pins for separate bypassing of theanalog and digital supplies The groundpins should be connected to a stablenoise-free system ground All of theground pins should be returned to thesame potential AGND is the analogground for the converter DGND1is theground pin for the digital control linesDGND2is the ground return for the outputdatabus See Section6 0LAYOUT ANDGROUNDING for more informationDB0–DB11These are the TRI-STATE output pins en-abled by RD CS and OEV IN1 V IN2These are the analog input pins to the mul-tiplexer For accurate conversions no in-put pin(even one that is not selected)should be driven more than50mV belowground or50mV above V CCMUX OUT This is the output of the on-board analoginput multiplexerADC IN This is the direct input to the12-bit sam-pling A D converter For accurate conver-sions this pin should not be driven morethan50mV below AGND or50mV aboveAV CCS0This pin selects the analog input that willbe connected to the ADC12062during theconversion The input is selected based onthe state of S0when EOC makes its high-to-low transition Low selects V IN1 highselects V IN2MODE This pin should be tied to DV CCCS This is the active low Chip Select controlinput When low this pin enables the RDS H and OE inputs This pin can be tiedlowINT This is the active low Interrupt outputWhen using the Interrupt Interface Mode(Figure1) this output goes low when aconversion has been completed and indi-cates that the conversion result is avail-able in the output latches This output isalways high when RD is held low(Figure2)EOC This is the End-of-Conversion control out-put This output is low during a conversion RD This is the active low Read control inputWhen RD is low(and CS is low) the INToutput is reset and(if OE is high)data ap-pears on the data bus This pin can be tiedlowOE This is the active high Output Enable con-trol input This pin can be thought of as aninverted version of the RD input(see Fig-ure6) Data output pins DB0–DB11areTRI-STATE when OE is low Data appearson DB0–DB11only when OE is high andCS and RD are both low This pin can betied highS H This is the Sample Hold control input Theanalog input signal is held and a new con-version is initiated by the falling edge ofthis control input(when CS is low) PD This is the Power Down control input Thispin should be held high for normal opera-tion When this pin is pulled low the devicegoes into a low power standby mode V REF a(FORCE) These are the positive and negative volt-V REF b(FORCE)age reference force inputs respectivelySee Section4 REFERENCE INPUTS formore informationV REF a(SENSE) These are the positive and negative volt-V REF b(SENSE)age reference sense pins respectivelySee Section4 REFERENCE INPUTS formore informationV REF 16This pin should be bypassed to AGND witha0 1m F ceramic capacitorTEST This pin should be tied to DV CC9Functional DescriptionThe ADC12062performs a12-bit analog-to-digital conver-sion using a3step flash technique The first flash deter-mines the six most significant bits the second flash gener-ates four more bits and the final flash resolves the two least significant bits Figure4shows the major functional blocks of the converter It consists of a2 -bit Voltage Estimator a resistor ladder with two different resolution voltage spans a sample hold capacitor a4-bit flash converter with front end multiplexer a digitally corrected DAC and a capacitive volt-age dividerThe resistor string near the center of the block diagram in Figure4generates the6-bit and10-bit reference voltages for the first two conversions Each of the16resistors at the bottom of the string is equal to of the total string resist-ance These resistors form the LSB Ladder and have a voltage drop of of the total reference voltage(V REF a b V REF b)across each of them The remaining resistors form the MSB Ladder It is comprised of eight groups of eight resistors each connected in series(the lowest MSB ladder resistor is actually the entire LSB ladder) Each MSB Ladder section has of the total reference voltage across it Within a given MSB ladder section each of the eight MSB resistors has of the total reference voltage across it Tap points are found between all of the resistors in both the MSB and LSB ladders The Comparator MultipIexer can connect any of these tap points in two adjacent groups of eight to the sixteen comparators shown at the right of Figure4 This function provides the necessary reference voltages to the comparators during the first two flash con-versionsThe six comparators seven-resistor string(Estimator DAC ladder) and Estimator Decoder at the left of Figure4form Note The weight of each resistor on the LSB ladder is actually equivalent to four12-bit LSBs It is called the LSB ladder because it has thehighest resolution of all the ladders in the converter the Voltage Estimator The Estimator DAC connected be-tween V REF a and V REF b generates the reference volt-ages for the six Voltage Estimator comparators The com-parators perform a very low resoIution A D conversion to obtain an‘‘estimate’’of the input voltage This estimate is used to control the placement of the Comparator Multiplex-er connecting the appropriate MSB ladder section to the sixteen flash comparators A total of only22comparators(6 in the Voltage Estimator and16in the flash converter)is required to quantize the input to6bits instead of the64that would be required using a traditional6-bit flashPrior to a conversion the Sample Hold switch is closed allowing the voltage on the S H capacitor to track the input voItage Switch1is in position1 A conversion begins by opening the Sample Hold switch and latching the output of the Voltage Estimator The estimator decoder then selects two adjacent banks of tap points aIong the MSB ladder These sixteen tap points are then connected to the sixteen flash converters For exampIe if the input voltage is be-tween and of V REF(V REF e V REF a b V REF b) the estimator decoder instructs the comparator multiplexer to select the sixteen tap points between and ( and )of V REF and connects them to the sixteen comparators The first flash conversion is now performed producing the first6MSBs of dataAt this point Voltage Estimator errors as large as of V REF will be corrected since the comparators are connect-ed to ladder voltages that extend beyond the range speci-fied by the Voltage Estimator For example if( )V REF k V IN k( )V REF the Voltage Estimator’s comparators tied to the tap points below( )V REF will output‘‘1’’s (000111) This is decoded by the estimator decoder to‘‘10’’ The16comparators will be placed on the MSB ladderTL H 11490–14FIGURE4 Functional Block Diagram10Functional Description(Continued)tap points between( )V REF and( )V REF This overlap of ( )V REF will automatically cancel a Voltage Estimator er-ror of up to256LSBs If the first flash conversion deter-mines that the input voltage is between( )V REF and (( )V REF b LSB 2) the Voltage Estimator’s output code will be corrected by subtracting‘‘1’’ resulting in a corrected value of‘‘01’’for the first two MSBs If the first flash conver-sion determines that the input voltage is between( )V REF b LSB 2)and( )V REF the voltage estimator’s output code is unchangedThe results of the first flash and the Voltage Estimator’s output are given to the factory-programmed on-chip EEPROM which returns a correction code corresponding to the error of the MSB ladder at that tap This code is convert-ed to a voltage by the Correction DAC To generate the next four bits SW1is moved to position2 so the ladder voltage and the correction voltage are subtracted from the input voltage The remainder is applied to the sixteen flash con-verters and compared with the16tap points from the LSB ladderThe result of this second conversion is accurate to10bits and describes the input remainder as a voltage between two tap points(V H and V L)on the LSB ladder To resolve the last two bits the voltage across the ladder resistor(between V H and V L)is divided up into4equal parts by the capacitive voltage divider shown in Figure5 The divider also creates 6LSBs below V L and6LSBs above V H to provide overlap used by the digital error correction SW1is moved to posi-tion3 and the remainder is compared with these16new voltages The output is combined with the results of the Voltage Estimator first flash and second flash to yield the final12-bit resultBy using the same sixteen comparators for all three flash conversions the number of comparators needed by the multi-step converter is significantly reduced when compared to standard multi-step techniquesApplications Information1 0MODES OF OPERATIONThe ADC12062has two interface modes An interrupt read mode and a high speed mode Figures1and2show the timing diagrams for these interfacesIn order to clearly show the relationship between S H CS RD and OE the control logic decoding section of the ADC12062is shown in Figure6Interrupt InterfaceAs shown in Figure1 the falling edge of S H holds the input voltage and initiates a conversion At the end of the conver-sion the EOC output goes high and the INT output goes low indicating that the conversion results are latched and may be read by pulling RD low The falling edge of RD re-sets the INT line Note that CS must be low to enable S H or RDHigh Speed InterfaceThis is the fastest interface shown in Figure2 Here the output data is always present on the databus and the INT to RD delay is eliminatedTL H 11490–15FIGURE5 The Capacitive Voltage Divider11Applications Information (Continued)TL H 11490–16FIGURE 6 ADC Control Logic2 0THE ANALOG INPUTThe analog input of the ADC12062can be modeled as two small resistances in series with the capacitance of the input hold capacitor (C IN ) as shown in Figure 7 The S H switch is closed during the Sample period and open during Hold The source has to charge C IN to the input voltage within the sample period Note that the source impedance of the input voltage (R SOURCE )has a direct effect on the time it takes to charge C IN If R SOURCE is too large the voltage across C IN will not settle to within 0 5LSBs of V SOURCE before the conversion begins and the conversion results will be incor-rect From a dynamic performance viewpoint the combina-tion of R SOURCE R MUX R SW and C IN form a low pass filter Minimizing R SOURCE will increase the frequency re-sponse of the input stage of the converterTypical values for the components shown in Figure 7are R MUX e 100X R SW e 100X and C IN e 25pF The set-tling time to n bits ist SETTLE e (R SOURCE a R MUX a R SW ) C IN n ln (2) The bandwidth of the input circuit isf b 3dB e 1 (2 3 14 (R SOURCE a R MUX a R SW ) C IN )For maximum performance the impedance of the source driving the ADC12062should be made as small as possible A source impedance of 100X or less is recommended A plot of dynamic performance vs source impedance is given in the Typical Performance Characteristics sectionIf the signal source has a high output impedance its output should be buffered with an operational amplifier capable of driving a switched 25pF 100X load Any ringing or instabili-ties at the op amp’s output during the sampling period can result in conversion errors The LM6361high speed op amp is a good choice for this application due to its speed and its ability to drive large capacitive loads Figure 8shows the LM6361driving the ADC IN input of an ADC12062 The 100pF capacitor at the input of the converter absorbs some of the high frequency transients generated by the S H switching reducing the op amp transient response require-ments The 100pF capacitor should only be used with high speed op amps that are unconditionally stable driving ca-pacitive loadsTL H 11490–17FIGURE 7 Simplified ADC12062Input Stage12Applications Information (Continued)TL H 11490–18FIGURE 8 Buffering the Input with an LM6361High Speed Op AmpAnother benefit of using a high speed buffer is improved THD performance when using the multiplexer of the ADC12062 The MUX on-resistance is somewhat non-linear over input voltage causing the RC time constant formed by C IN R MUX and R SW to vary depending on the input voltage This results in increasing THD with increasing frequency Inserting the buffer between the MUX OUT and the ADC IN terminals as shown in Figure 8will eliminate the loading on R MUX significantly reducing the THD of the multiplexed sys-temCorrect converter operation will be obtained for input volt-ages greater than AGND b 50mV and less than AV CC a50mV Avoid driving the signal source more than 300mV higher than AV CC or more than 300mV below AGND If an analog input pin is forced beyond these voltages the cur-rent flowing through that pin should be limited to 25mA or less to avoid permanent damage to the IC The sum of all the overdrive currents into all pins must be less than 50mA When the input signal is expected to extend more than 300mV beyond the power supply limits for any reason (un-known uncontrollable input voltage range power-on tran-sients fault conditions etc )some form of input protection such as that shown in Figure 9 should be usedTL H 11490–19FIGURE 9 Input Protection13Applications Information(Continued)3 0ANALOG MULTIPLEXERThe ADC12062has an input multiplexer that is controlled by the logic level on pin S0when EOC goes low as shown in Figures1and2 Multiplexer setup and hold times with re-spect to the S H input can be determined by these two equationst MS(wrt S H)e t MS b t EOC(min)e50b60e b10ns t MH(wrt S H)e t MH a t EOC(max)e50a125e175ns Note that t MS(wrt S H)is a negative number this indicates that the data on S0must become valid within10ns after S H goes low in order to meet the setup time requirements S0must be valid for a length of(t MH a t EOC(max))b(t MS b t EOC(min))e185ns Table I shows how the input channels are assignedTABLE I ADC12062InputMultiplexer ProgrammingS0Channel0V IN11V IN2The output of the multiplexer is available to the user via the MUX OUT pin This output allows the user to perform addi-tional signal processing such as filtering or gain before the signal is returned to the ADC IN input and digitized If no additional signal processing is required the MUX OUT pin should be tied directly to the ADC IN pinSee Section9 0(APPLICATIONS)for a simple circuit that will alternate between the two inputs while converting at full speed4 0REFERENCE INPUTSIn addition to the fully differential V REF a and V REF b refer-ence inputs used on most National Semiconductor ADCs the ADC12062has two sense outputs for precision control of the ladder voltage These sense inputs compensate for errors due to IR drops between the reference source and the ladder itself The resistance of the reference ladder is typically750X The parasitic resistance(R P)of the package leads bond wires PCB traces etc can easily be0 5X to 1 0X or more This may not be significant at8-bit or10-bit resolutions but at12bits it can introduce voltage drops causing offset and gain errors as large as6LSBsThe ADC12062provides a means to eliminate this error by bringing out two additional pins that sense the exact voltage at the top and bottom of the ladder With the addition of two op amps the voltages on these internal nodes can be forced to the exact value desired as shown in Figure10TL H 11490–20FIGURE10 Reference Ladder Force and Sense Inputs14。
L6997资料
PIN CONNECTION (Top View)
NOSKIP GNDSENSE INT VSENSE VCC GND VREF VFB OSC SS
1 2 3 4 5 6 7 8 9 10
TSSOP20
20 19 18 17 16 15 14 13 12 11
BOOT HGATE PHASE VDR LGATE PGND PGOOD OVP SHDN ILIM
SHUTDOWN SECTION SHDN Device On Device Off ISHVDR ISHVCC Drivers shutdown current Devices shutdown current 1.2
SOFT START SECTION ISS Soft Start current Active Soft start and voltage CURRENT LIMIT AND ZERO CURRENT COMPARATOR ILIM input bias current Zero Crossing Comparator offset Phase-gnd DKILIM Current limit factor RILIM = 2KΩ to 200KΩ 4.6 -2 1.6 1.8 5 5.4 2 2 VSS = 0.4V 4 300 400 6 500
ELECTRICAL CHARACTERISTICS (VCC = VDR = 3.3V; Tamb = 0°C to 85°C unless otherwise specified)
Symbol SUPPLY SECTION Vin VCC, VDR VCC Turn-onvoltage Turn-off voltage Hysteresis IqVDR IqVcc Quiescent Current Drivers Device Quiescent current VFB > VREF VFB > VREF Input voltage range Vout=Vref Fsw=110Khz Iout=1A 1 3 2.86 2.75 90 7 400 20 600 28 5.5 2.97 2.9 V V V V mV µA µA V 0.6 SHDN to GND SHDN to GND 1 5 15 V µA µA µA mV µA mV µA Parameter Test Condition Min. Typ. Max. Unit
肿瘤学中文核心期刊高被引论文分析
［基金项目］济宁医学院青年教师科研扶持基金（ＪＹ２０１７ＲＷ０１２）△［通信作者］石俊强，Ｅ ｍａｉｌ：５１０９００３３８＠ｑｑ．ｃｏｍＤＯＩ：１０．３９６９／ｊ．ｉｓｓｎ．１０００ ９７６０．２０２０．０６．０１５肿瘤学中文核心期刊高被引论文分析李建美１ 甘慧敏２ 石俊强２△（１济宁医学院基础医学院；２《济宁医学院学报》编辑部，济宁２７２０００） 摘 要 目的 探讨入选２０１７年版《中文核心期刊要目总览》的１０种肿瘤学期刊高被引论文的文献计量学特征。
方法 采用文献计量法分析１０种肿瘤学核心期刊刊载的高被引论文被引情况、基金资助、栏目分布、作者地区分布、作者及机构合作等特征。
结果 ２０１５－２０１９年１０种肿瘤学核心期刊发表论文１４０１７篇，被引论文９６９４篇（６９．１６％），高被引论文２４８篇。
高被引论文的作者主要分布在中国３０个地区，其中发表高被引论文数量排在前５位的地区分别是北京市、上海市、天津市、四川省和广东省，基金资助以国家级为主，作者以≥７人合作为主；篇均被引频次居前３位的高被引论文来源于“临床流行病学”“指南与共识”和“专家论坛”栏目。
结论 高被引论文的地区、机构分布不均；我国中文核心期刊应积极开拓优秀原创性科学研究和技术创新类稿源，进一步提升期刊的国际竞争力。
关键词 肿瘤学；被引频次；高被引论文；引文分析中图分类号：Ｒ９７ 文献标识码：Ａ 文章编号：１０００ ９７６０（２０２０）１２ ４４２ ０４ＡｎａｌｙｓｉｓｏｆｈｉｇｈｌｙｃｉｔｅｄｐａｐｅｒｓｉｎＣｈｉｎｅｓｅｃｏｒｅｊｏｕｒｎａｌｓｏｆｏｎｃｏｌｏｇｙＬＩＪｉａｎｍｅｉ１，ＧＡＮＨｕｉｍｉｎ２，ＳＨＩＪｕｎｑｉａｎｇ２△（１ＣｏｌｌｅｇｅｏｆＢａｓｉｃＭｅｄｉｃｉｎｅ，ＪｉｎｉｎｇＭｅｄｉｃａｌＵｎｉｖｅｒｓｉｔｙ；２ＥｄｉｔｏｒｉａｌＤｅｐａｒｔｍｅｎｔｏｆＪｏｕｒｎａｌｏｆＪｉｎｉｎｇＭｅｄｉｃａｌＵｎｉｖｅｒｓｉｔｙ，Ｊｉｎｉｎｇ２７２０００，Ｃｈｉｎａ）Ａｂｓｔｒａｃｔ：Ｏｂｊｅｃｔｉｖｅ ＴｏｉｎｖｅｓｔｉｇａｔｅｔｈｅｂｉｂｌｉｏｍｅｔｒｉｃｃｈａｒａｃｔｅｒｉｓｔｉｃｓｏｆｈｉｇｈｌｙｃｉｔｅｄｐａｐｅｒｓｉｎｔｅｎＣｈｉｎｅｓｅｃｏｒｅｊｏｕｒｎａｌｓ（２０１７ｅｄｉｔｉｏｎ）．Ｍｅｔｈｏｄｓ Ｔｈｅｃｉｔａｔｉｏｎｓｔａｔｕｓ，ｆｕｎｄａｓｓｉｓｔａｎｃｅ，ｃｏｌｕｍｎｄｉｓｔｒｉｂｕｔｉｏｎ，ｒｅｇｉｏｎａｌｄｉｓ ｔｒｉｂｕｔｉｏｎ，ａｕｔｈｏｒａｎｄｏｒｇａｎｉｚａｔｉｏｎｃｏｏｐｅｒａｔｉｏｎａｎｄｏｔｈｅｒｃｈａｒａｃｔｅｒｉｓｔｉｃｓｏｆｈｉｇｈｌｙｃｉｔｅｄｐａｐｅｒｓｐｕｂｌｉｓｈｅｄｉｎｔｅｎｏｎｃｏｌｏｇｙｃｏｒｅｊｏｕｒｎａｌｓｗｅｒｅａｎａｌｙｚｅｄｕｓｉｎｇｂｉｂｌｉｏｍｅｔｒｉｃｍｅｔｈｏｄ．Ｒｅｓｕｌｔｓ １４０１７ｐａｐｅｒｓｗｅｒｅｐｕｂｌｉｓｈｅｄｉｎｔｅｎｏｎｃｏｌｏｇｙｃｏｒｅｊｏｕｒｎａｌｓｆｒｏｍ２０１５ｔｏ２０１９ｗｈｉｌｅ９６９４ｐａｐｅｒｓ（６９．１６％）ｗｅｒｅｃｉｔｅｄ，ａｎｄ２４８ｐａｐｅｒｓｗｅｒｅｈｉｇｈｌｙｃｉｔｅｄ．Ｔｈｅａｕｔｈｏｒｓｏｆｈｉｇｈｌｙｃｉｔｅｄｐａｐｅｒｓａｒｅｍａｉｎｌｙｄｉｓｔｒｉｂｕｔｅｄｉｎ３０ｒｅｇｉｏｎｓｏｆＣｈｉｎａ，ｏｆｗｈｉｃｈｔｈｅｔｏｐｆｉｖｅｒｅｇｉｏｎｓａｒｅＢｅｉｊｉｎｇ，Ｓｈａｎｇｈａｉ，Ｔｉａｎｊｉｎ，ＧｕａｎｇｄｏｎｇＰｒｏｖｉｎｃｅａｎｄＳｉｃｈｕａｎＰｒｏｖｉｎｃｅ．Ｔｈｅｆｕｎｄｉｎｇｏｆｈｉｇｈｌｙｃｉｔｅｄｐａｐｅｒｓｉｓｍａｉｎｌｙａｔｔｈｅｎａｔｉｏｎａｌｌｅｖｅｌ，ａｎｄｔｈｅａｕｔｈｏｒｓｍａｉｎｌｙｃｏｏｐｅｒａｔｅｗｉｔｈｍｏｒｅｔｈａｎ７ｐｅｒｓｏｎｓ．Ｔｈｅｔｏｐ２ｈｉｇｈｌｙｃｉｔｅｄｐａｐｅｒｓａｒｅｆｒｏｍｔｈｅｃｏｌｕｍｎｏｆ“ｇｕｉｄｅｌｉｎｅｓａｎｄｃｏｎｓｅｎｓｕｓ”ａｎｄ“ｅｘｐｅｒｔｆｏｒｕｍ”．Ｃｏｎｃｌｕｓｉｏｎ Ｔｈｅｄｉｓｔｒｉｂｕｔｉｏｎｏｆｈｉｇｈｌｙｃｉｔｅｄｐａｐｅｒｓｉｎｄｉｆｆｅｒｅｎｔｒｅｇｉｏｎｓａｎｄｉｎｓｔｉｔｕｔｉｏｎｓｉｓｕｎｅｖｅｎ；Ｃｈｉｎｅｓｅｃｏｒｅｊｏｕｒｎａｌｓｓｈｏｕｌｄａｃｔｉｖｅｌｙｅｘｐｌｏｒｅｔｈｅｓｏｕｒｃｅｏｆｏｒｉｇｉｎａｌｓｃｉｅｎｔｉｆｉｃｒｅｓｅａｒｃｈａｎｄｔｅｃｈｎｏｌｏｇｉｃａｌｉｎｎｏｖａｔｉｏｎｉｎｏｒｄｅｒｔｏｉｍ ｐｒｏｖｅｊｏｕｒｎａｌｉｎｔｅｒｎａｔｉｏｎａｌｃｏｍｐｅｔｉｔｉｖｅｎｅｓｓ．Ｋｅｙｗｏｒｄｓ：Ｏｎｃｏｌｏｇｙ；Ｃｉｔｅｄｆｒｅｑｕｅｎｃｙ；Ｈｉｇｈｌｙｃｉｔｅｄｐａｐｅｒｓ；Ｃｉｔａｔｉｏｎａｎａｌｙｓｉｓ 科学论文的关注度可以通过引文分析来评估，而被引频次是一种对已发表论文利用率和贡献率的定量评估方法之一［１ ２］。
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参考手册NDXS和ND5XS网络音频播放器中文-NaimAudio
注意: 可以使用以太网供电硬件，其提供了有线家庭网络连接的简 便方法。不过，根据每个家庭环境的电源配线因素，电源的网络 数据可能会影响整个系统的音响质量。如果受到影响的音响质量 令人无法接受，则应安装专用网络布线或应采用无线网络。
2.10 网络连接
4
5.5 存储电台预设
18
2.11 系统自动化
5
5.6 利用收音机预设
18
2.12 外部控制和更新
5
2.13 信号接地开关
5
6 NDX/5XS通用即插即用™音频接口
19
6.1 通用即插即用™服务器
19
3 NDX/5XS操作
6
6.2 音频文件的兼容性
19
3.1 前面板特点
6
6.3 扫描服务器和播放文件
21
3.8 n-Stream控制应用程序
9
iPod和iPhone是苹果公司在美国和其他国家注册的商标。 Windows媒体™ 是微软公司的商标。 UPnP™是UPnP™社区的商标。
NDX/5XS简介
1 NDX/5XS简介
NDX和ND5 XS（NDX/5XS）是能效非常高的网络和数字音频播放器，您花费在安装和设置上的时 间和精力将会得到回报。我们强烈建议您阅读本手册。
NDX/5XS有效地整合了四个不同的的音频元件，其中每一个均接入用于连接到相关前置扩音器输 入的模拟或数字输出。每一个元件均将在下面的段落中予以介绍，并依次在第5节到第8节中详细描 述。各元件如下：
多模式收音机 通用即插即用™音频接口 USB音频接口 数模转换器
情感语音信号中共振峰参数的提取方法毕业论文[管理资料]
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太原理工大学毕业设计（论文）任务书第1页第2页第3页第4页情感语音信号中共振峰参数的提取方法摘要语音情感识别是新型人机交互技术的研究热点之一，在人工智能方面有着较广泛的应用前景。
共振峰频率是反映声道谐振特性的重要特征，它代表了发音信息的最直接的来源。
所以研究情感语音信号中共振峰参数是有很大意义的。
基于共振峰参数在情感语音信号中的重要性，本文主要研究了情感语音信号中共振峰参数的提取方法。
提取共振峰的常用方法包括：谱包络提取法、倒谱法和LPC法。
由于倒谱法根据对数功率谱的逆傅立叶变换，能够分离频谱包络和细微结构，很精确地得到共振峰信息，所以本文重点研究倒谱法提取共振峰。
本文通过MATLAB软件利用倒谱法实现了对高兴、生气、中立三种情感状态的共振峰参数的提取。
分析提取结果，得到了下面的一些结论：相对于中立发音而言，高兴和生气的第一共振峰频率相对升高，从人的发音特点来看，人们在表达高兴和生气时，嘴比平静发音时张得更大，因此会出现这样的结果。
所以说，可以用共振峰作为区分不同情感语音的手段。
关键词：语音情感识别；共振峰参数；共振峰提取方法；倒谱法Extraction method of emotional speech signal of the formantparametersAbstractSpeech emotion recognition is one of the hot research of new human-computer interaction technology, which has a wide application prospect in artificial intelligence. Formant frequency is an important characteristic of reflecting the resonant characteristics of channel, it represents the pronunciation of the most direct source of information. So the research of emotional speech signal of the formant parameters is of great significance.Based on the importance of formant parameter in the emotional speech signals, this paper mainly studied the extraction method of emotional speech signal of the formant parameters. Several main methods of extraction of formant are: spectral envelope extraction, cepstrum method and LPC method. Since cepstrum based on the number of inverse Fourier transform power spectrum, it can separate spectral envelope and the fine structure and get very precise information on the formant, so this paper focuses on research cepstrum formant extraction.This paper use MATLAB software cepstrum emotional state to achieve happy, angry and neutral three formant parameter extraction. Analysis to extract a result, I get some of the following conclusions: Relative to the neutral pronunciation, the happy and angry the first formant frequency is relatively increased. Pronunciation features from the human point of view, people are happy and angry expression, mouth to pronounce than when Zhang was more calm, so there will be such an outcome. So, you can use the formant speech as a means to distinguish between different emotions.Key Words: Speech Emotion Recognition; Formant parameters; Formant extraction method; Cepstrum目录摘要 ..................................................................... Abstract .. (I)第1章绪论 0选题意义 0情感语音识别技术的国内外发展现状 0国际情感语音识别发展现状 0国内情感语音识别发展现状 (1)本文的主要研究内容及结构安排 (2)本文的主要研究内容 (2)本文的结构安排 (2)第2章情感的分类与语音情感识别 (3)情感的分类 (3)情感语音数据库 (4)语音情感识别系统 (5)第3章共振峰的基本概念 (5)共振峰参数的概念及产生原理 (5)共振峰参数的研究意义 (6)提取共振峰参数所遇到的问题 (6)第4章共振峰的提取方法及分析 (7)谱包络提取法 (7)倒谱法提取共振峰 (8)LPC法提取共振峰 (9)求根法提取共振峰 (10)LPC倒谱法提取共振峰 (10)几种提取方法分析比较 (12)同类文章提取方法比较 (13)第5章倒谱法提取共振峰的实现 (15)倒谱的定义 (15)倒谱法提取共振峰原理 (16)倒谱法提取情感语音共振峰具体实现过程 (16)共振峰提取结果及结论分析 (18)情感语音原始波形 (18)情感语音共振峰提取结果 (19)结论分析 (21)第6章总结与展望 (22)全文总结 (22)展望 (22)参考文献 (23)致谢 (24)外文原文 (25)中文翻译 (35)第1章绪论选题意义随着多模态人机交互技术的发展，新型人机交互模式的应用前景更加广阔。
人类26对染色体基本信息速查
只有三种染色体异常（形成三倍体）的人可以长大，这在其中包含了18号染色体。另外还有许多遗传疾病是由于18号染色体的三倍体或非整倍而造成的。尽管基因密度低，但它所有哺乳动物进化上保守的非编码蛋白区域所占比例与整个基因组范围的平均值相接近。
19
0.56
1782
包括与遗传性高胆固醇和抗胰岛素糖尿病相关的基因，人体遭到辐射或其他环境污染，控制DNA修复的基因也在该染色体上
16
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880
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17
0.79 (78,839,971)
1540
很特殊的染色体，包括多种与疾病有关的基因例如确定出的第一个乳腺癌基因BRCA1、神经纤维瘤基因NF1、与修复DNA损伤有关的TP53基因、SMS（Smith-Magenis综合症）和CMT1A
22
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679
与先天性心脏病、免疫功能低下、精神分裂症、智力低下、出生缺陷以及许多恶性肿瘤如白血病等有关
X
1.50
1098
X染色体上一旦出现某个基因，就不会在进化中再失去它。同时X染色体与遗传性疾病高度相关，还有许多与智力缺陷有关的基因以及人类基因组中称为DMD的最大基因
Y
0.23
78
这个一向被认为很脆弱的性染色体内部存在一些“回文结构”，可能有着基因修复作用，使它在一定程度上能够自我修复有害的基因变异。这一成果增进了人们对男性不育症的了解，有助于研究更好的诊断和治疗方法。它还将重新激起有关性别的进化历程的争论。
20
0.59
727
是被“破译”的第一对具有典型长短臂结构的人类染色体，为糖尿病、肥胖症、小儿湿疹等疾病的治疗找到了新方法。该染色体上还有一个基因能增加部分人群因疯牛病感染新型克雅氏症的危险，这将增进人们对该疾病的了解。
PowerCube PB 系列中文名字说明书
• Modular structure• Mechanical and electromechanicalsafety locks to prevent incorrect operations• Metallic shutters with fail safe device (prevention of manual opening)• Circuit-breaker/contactor racking in / out with door closed• Gas insulated circuit-breakersand vacuum circuit-breakers and contactors can be installed• Version with earthing switch with making capacity• Earthing switch fitted with interlocks with the circuit-breaker2PowerCube PB6A12PowerCube PB/M PB/M PB/M PB/M Rated voltage[kV]1217.52436 Rated insulation voltage [kV]1217.52436Withstand voltage (50 Hz) [kV]28385070 Impulse withstand voltage [kV]7595125170Rated frequency[Hz]50-6050-6050-6050-60Rated normal current (40 °C)[A]630630630630125012501250125016001600160016002000200020002000250025002500 (1)2500 (1)31503150--3600 (1)3600 (1)--4000 (1)4000 (1)--Rated short-time withstand current (3 s)[kA]25-31.5-40-50 (2)25-31.5-40-50 (2)25-31.5 25 (3s)-31.5 (1s)Overall dimensions (excluding monoblocs)H [mm]1680168016802034W [mm]600/750/1000600/750/1000750/10001000D [mm]103010301030920Weight[Kg]120450320ask ABB Degree of protectionIP 3XIP 3XIP 3XIP 3XCompatible circuit-breakers and contactors– HD4••••– VD4•••-– V-Contact (module width 600 mm)•---Technical catalogueNo.1VCP0000911VCP0000911VCP0000911VCP000178(1) With forced ventilation using fan built into the enclosure (for 4000 A another fan must be installed in the rear part of the switchgear), (2) 25-31.5 kA for PowerCube module width 600 mm.Technical data PB/MMain componentsA Circuit-breaker compartment1 Voltage signalling device (on request)2 Circuit-breaker/contactor3 Shutters4 Lower and upper monoblocks5 Earthing switch (on request)6 Door7 FanB Feeder cable compartment 8 VT compartment (on request)9 DoorH W D3A Circuit-breaker compartment1 Voltage signalling device (on request)2 Circuit-breaker/contactor3 Shutters4 Lower and upper monoblocks5 Earthing switch (on request)6 Door7 FanPowerCube PB/E PB/E PB/E Rated voltage[kV]1217.524Rated insulation voltage [kV]1217.524Withstand voltage (50 Hz) [kV]283850Impulse withstand voltage [kV]7595125Rated frequency[Hz]50-6050-6050-60Rated normal current (40 °C)[A]630630630125012501250160016001600200020002000250025002500 (1)31503150-3600 (1)3600 (1)-4000 (1)4000 (1)-Rated short-time withstand current (3 s)[kA]25-31.5-40-50 (2)25-31.5-40-50 (2)25-31.5 Overall dimensions (excluding monoblocs)H [mm]112011201230W [mm]600/750/1000600/750/1000750/1000D [mm]1016/10301016/10301246Weight[Kg]120450320Degree of protectionIP 3XIP 3XIP 3XCompatible circuit-breakers and contactors– HD4•••– VD4•••– V-Contact (module width 600 mm)•--Technical catalogueNo.1VCP0000911VCP0000911VCP000091Technical data PB/E(1) With forced ventilation using fan built into the enclosure (for 4000 A another fan must be installed in the rear part of the switchgear). (2) 25-31.5 kA for PowerCube module width 600 mm.Main componentsHWD1V C P 000092 - R e v . G , e n - L e a f l e t - 2009-02 - (P o w e r C u b e )For more information please contact:ABB S.p.A.Power Products Division Unità Operativa Sace-MV Via Friuli, 4I-24044 DalmineTel.: +39 035 6952 111Fax: +39 035 6952 874E-mail:*******************.comABB AGCalor Emag Medium Voltage ProductsOberhausener Strasse 33 Petzower Strasse 8 D-40472 Ratingen D-14542 Glindow Phone: +49(0)2102/12-1230, Fax: +49(0)2102/12-1916 E-mail:*****************.com The data and illustrations are not binding. We reserve the right to make changes without notice in the course of technical development of the product.Copyright 2009 ABB.All rights reserved.。
PS21246-E中文资料
Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272Intellimod™ ModuleDual-In-Line Intelligent Power Module25 Amperes/600 VoltsPS21246-EDescription:DIP and mini-DIP IPMs are intelligent power modules that integrate power devices, drivers,and protection circuitry in an ultra compact dual-in-line transfer-mold package for use in driving small three phase motors. Use of 4th generation IGBTs, DIP packaging,and application specific HVICs allow the designer to reduce inverter size and overall design time.Features:□Compact Packages □Single Power Supply □Integrated HVICs□Direct Connection to CPU □Optimized for 5kHz Operation Applications:□Washing Machines □Refrigerators □Air Conditioners □Small Servo Motors □Small Motor ControlOrdering Information:PS21246-E is a 600V , 25 Ampere DIP Intelligent Power Module.DimensionsInches Millimeters A 3.07±0.0279.0±0.5B 1.22±0.0231.0±0.5C 0.32±0.028.0±0.5D 2.64±0.0167.0±0.3E 0.53±0.01 Dia.13.4±0.2 Dia.F 0.84±0.0221.4±0.5G 1.10±0.0228.0±0.5H 0.15±0.01 3.8±0.2J 0.11±0.01 2.8±0.3K 0.39±0.0110.0±0.3L 0.79±0.0120.0±0.3M0.50±0.0412.8±1.0DimensionsInches Millimeters N 2.9875.6P 0.02±0.010.5±0.2Q 0.18±0.01 Dia. 4.5±0.2 Dia.R 0.08±0.02 1.9±0.05S 0.04±0.01 1.0±0.2T 0.02 Max.0.5 Max.U 0.02±0.020.6±0.5V 0.07 Max. 1.75 Max.W 0.03±0.010.8±0.2X 0.45±0.0211.5±0.5Y 0.13 Max. 3.25 Max.Z0.030.7Outline Drawing and Circuit DiagramPowerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272PS21246-EIntellimod™ ModuleDual-In-Line Intelligent Power Module25 Amperes/600 VoltsAbsolute Maximum Ratings, T j = 25°C unless otherwise specifiedCharacteristics Symbol PS21246-E Units Power Device Junction T emperature*T j-20 to 150°C Storage Temperature T stg-40 to 125°C Case Operating Temperature (See T C Measure Point Illustration)T C-20 to 100°C Mounting Torque, M4 Mounting Screws—13in-lb Module Weight (Typical)—54Grams Heatsink Flatness—-50 to 100µm Self-protection Supply Voltage Limit (Short Circuit Protection Capability)**V CC(prot.)400Volts Isolation Voltage, AC 1 minute, 60Hz Sinusoidal, Connection Pins to Heatsink Plate V ISO1500Volts *The maximum junction temperature rating of the power chips integrated within the DIP-IPM is 150°C (@T C≤ 100°C). However, to ensure safe operation of the DIP-IPM,the average junction temperature should be limited to T j(avg)≤ 125°C (@T C≤ 100°C).**V D = V DB = 13.5 ~ 16.5V, Inverter Part, T j = 125°C, Non-repetitive, Less than 2µsIGBT Inverter SectorCollector-Emitter Voltage V CES600Volts Collector Current, ± (T C = 25°C)I C25Amperes Peak Collector Current, ± (T C = 25°C, Instantaneous Value (Pulse))I CP50Amperes Supply Voltage (Applied between P - N)V CC450Volts Supply Voltage, Surge (Applied between P - N)V CC(surge)500Volts Collector Dissipation (T C = 25°C, per 1 Chip)P C59.5WattsControl SectorSupply Voltage (Applied between V P1-V PC, V N1-V NC)V D20Volts Supply Voltage (Applied between V UFB-V UFS,V VFB-V VFS, V WFB-V WFS)V DB20Volts Input Voltage (Applied between U P, V P, W P-V PC, U N, V N, W N-V NC)V CIN-0.5 ~ 5.5Volts Fault Output Supply Voltage (Applied between F O-V NC)V FO-0.5 ~ V D+0.5Volts Fault Output Current (Sink Current at F O T erminal)I FO15mA Current Sensing Input Voltage (Applied between C IN-V NC)V SC-0.5 ~ V D+0.5VoltsPowerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272PS21246-EIntellimod™ ModuleDual-In-Line Intelligent Power Module25 Amperes/600 VoltsElectrical and Mechanical Characteristics, T j = 25°C unless otherwise specifiedCharacteristics Symbol Test Conditions Min. Typ.Max.UnitsIGBT Inverter SectorCollector Cutoff Current I CES V CE = V CES, T j = 25°C—— 1.0mAV CE = V CES, T j = 125°C——10mA Diode Forward Voltage V EC T j = 25°C, -I C = 25A, V CIN = 5V— 2.5 3.4Volts Collector-Emitter Saturation Voltage V CE(sat)I C = 25A, T j = 25°C, V D = V DB = 15V, V CIN = 0V— 1.55 2.15VoltsI C = 25A, T j = 125°C, V D = V DB = 15V, V CIN = 0V— 1.65 2.25Volts Inductive Load Switching Times on CC Drr CC(on)joffC(off)CINT C Measure PointCPowerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272PS21246-EIntellimod™ ModuleDual-In-Line Intelligent Power Module25 Amperes/600 VoltsElectrical and Mechanical Characteristics, T j = 25°C unless otherwise specifiedCharacteristics Symbol Test Conditions Min. Typ.Max.UnitsControl SectorSupply Voltage V D Applied between V P1-V PC, V N1-V NC13.515.016.5VoltsV DB Applied between V UFB-V UFS,13.515.016.5VoltsV VFB-V VFS, V WFB-V WFSCircuit Current I D V D = 15V, V CIN = 5V, V DB = 15V,——8.50mATotal of V P1-V PC, V N1-V NCV D = 15V, V CIN = 5V, V DB = 15V,—— 1.00mAV UFB-V UFS, V VFB-V VFS, V WFB-V WFSFault Output Voltage V FOH V SC = 0V, F O Circuit: 10k Ω to 5V Pull-up 4.9——VoltsV FOL V SC = 1V, F O Circuit: 10k Ω to 5V Pull-up—0.8 1.2VoltsV FO(sat)V SC = 1V, I FO = 15mA0.8 1.2 1.8Volts PWM Input Frequency f PWM T C≤ 100°C, T j≤ 125°C—5—kHz Allowable Dead Time t DEAD Relates to Corresponding Input Signal for 2.5——µSBlocking Arm Shoot-through (-20°C ≤ T C≤ 100°C)Short Circuit Trip Level*V SC(ref)T j = 25°C, V D = 15V*0.450.50.55Volts Supply Circuit Under-voltage UV DBt Trip Level, T j≤ 125°C10.0—12.0VoltsUV DBr Reset Level, T j≤ 125°C10.5—12.5VoltsUV Dt Trip Level, T j≤ 125°C10.3—12.5VoltsUV Dr Reset Level, T j≤ 125°C10.8—13.0Volts Fault Output Pulse Width**t FO C FO = 22nF 1.0 1.8—mSth(on)P P P PCth(off)th(on)N N N NCth(off)* Short Circuit protection is functioning only at the low-arms. Please select the value of the external shunt resistor such that the SC trip level is less than 25.5A.**Fault signal is asserted when the low-arm short circuit or control supply under-voltage protective functions operate. The fault output pulse-width t FO depends on the capacitance value of C FO according to the following approximate equation: C FO = (12.2 x 10-6) x t FO {F} .Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272PS21246-EIntellimod™ ModuleDual-In-Line Intelligent Power Module25 Amperes/600 VoltsThermal CharacteristicsCharacteristic Symbol Condition Min. Typ.Max.Units Junction to Case R th(j-c)Q Each IGBT—— 2.1°C/WattR th(j-c)D Each FWDi—— 3.0°C/Watt Contact Thermal Resistance R th(c-f)Case to Fin Per Module.——0.067°C/WattThermal Grease AppliedRecommended Conditions for UseCharacteristic Symbol Condition Min.Typ.Value Units Supply Voltage V CC Applied between P-N Terminals0300400Volts Control Supply Voltage V D Applied between V P1-V PC, V N1-V NC13.515.016.5VoltsV DB Applied between V UFB-V UFS,13.515.016.5VoltsV VFB-V VFS, V WFB-V WFSControl Supply dv/dt dV D/dt, dV DB/dt-1—1V/µs Input ON Voltage V CIN(on)Applied between U P, V P, W P-V PC0 ~ 0.65Volts Input OFF Voltage V CIN(off)Applied between U N, V N, W N-V NC 4.0 ~ 5.5Volts PWM Input Frequency f PWM T C≤ 100°C, T j≤ 125°C—5—kHz Arm Shoot-through Blocking Time t DEAD For Each Input Signal 2.5——µSPowerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272PS21246-EIntellimod™ ModuleDual-In-Line Intelligent Power Module25 Amperes/600 Voltsplane.Component Selection:Dsgn.Typ. Value DescriptionD11A, 600V Boot strap supply diode – Ultra fast recoveryC110-100uF, 50V Boot strap supply reservoir – Electrolytic, long life, low Impedance, 105°C (Note 5)C20.22-2.0uF, 50V Local decoupling/High frequency noise filters – Multilayer ceramic (Note 8)C31-100uF, 50V Control power supply filter – Electrolytic, long life, low Impedance, 105°CC422nF, 50V Fault lock-out timing capacitor – Multilayer ceramic (Note 4)C5100-1000pF, 50V Input signal noise filter – Multilayer ceramic (Note 1)C6200-2000uF, 450V Main DC bus filter capacitor – Electrolytic, long life, high ripple current, 105°CC70.1-0.22uF, 450V Surge voltage suppression capacitor – Polyester/Polypropylene film (Note 9)C SF1000pF, 50V Short circuit detection filter capacitor – Multilayer Ceramic (Note 6, Note 7)R SF 1.8k ohm Short circuit detection filter resistor (Note 6, Note 7)R SHUNT5-100 mohm Current sensing resistor - Non-inductive, temperature stable, tight tolerance (Note 10)R11-100 ohm Boot strap supply inrush limiting resistor (Note 5)R2 4.7k ohm Control input pull-up resistor (Note 1, Note 2)R3 5.1k ohm Fault output signal pull-up resistor (Note 3)Notes:1) To prevent input signal oscillations minimize wiring length to controller (~2cm). Additional RC filtering (C5 etc.) may berequired. If filtering is added be careful to maintain proper dead time. See application notes for details.2) Internal HVIC provides high voltage level shifting allowing direct connection of all six driving signals to the controller.3) F O output is an open collector type. This signal should be pulled high with 5.1k ohm resistor (R3).4) C4 sets the fault output duration and lock-out time. C4 ≈ 12.2E-6 x t FO, 22nF gives ~1.8ms5) Boot strap supply component values must be adjusted depending on the PWM frequency and technique.6) Wiring length associated with R SHUNT, R SF, C SF must be minimized to avoid improper operation of the OC function.7) R SF, C SF set over current protection trip time. Recommend time constant is 1.5us-2.0us. See application notes.8) Local decoupling/high frequency filter capacitors must be connected as close as possible to the modules pins.9) The length of the DC link wiring between C6, C7, the DIP’s P terminal and the shunt must be minimized to preventexcessive transient voltages. In particular C7 should be mounted as close to the DIP as possible.10) Use high quality, tight tolorance current sensing resistor. Connect resistor as close as possible to the DIP’sN terminal. Be careful to check for proper power rating. See application notes for calculation of resistance value.。
南开大学研究生学位论文写作规范
南开大学研究生学位论文写作规范（试行）南开大学学位评定委员会办公室编二○○五年二月前言学位论文是研究生科研工作成果的集中体现，是研究生申请博士、硕士学位的主要依据，也是社会重要的文献资料。
为了进一步推进我校研究生学位论文的规范化，提高写作质量，我们编写了《南开大学研究生学位论文写作规范（试行）》，供申请学位的研究生参考。
目录目录第1章内容要求 (1)第2章格式要求 (2)2．1 中文封面 (2)2．2 学位论文版权使用授权书 (2)2．3 学位论文原创性声明 (2)2．4 中文摘要 (3)2．5 Abstract (3)2．6 目录 (3)2．7 符号说明 (3)2．8 正文 (3)2．9 致谢 (5)2．10 参考文献 (4)2．11 附录 (4)2．12 个人简历在学期间发表的学术论文与研究成果 (4)第3章书写要求 (5)3．1 文字、标点符号和数字 (6)3．2 密级 (6)3．3 层次标题 (6)3．4 篇眉和页码 (7)3．5 有关图、表、表达式 (7)3.5.1 图 (7)3.5.2 表 (7)3.5.3 表达式 (8)目录3．6 参考文献 (8)3．7 量和单位 (9)第4章排版及印刷要求 (11)4．1 纸张要求及页面设置 (11)4．2 中文封面 (11)4．3 书脊 (11)4．4 中、英文摘要 (12)4．5 目录 (12)4．6 正文 (12)4．7 其它 (13)4．8 印刷及装订要求 (13)第1章内容要求第1章内容要求研究生学位论文使用汉字（除外国语言文学专业要求用其它文字外）撰写。
学位论文一般由十二部分组成，依次为：1．中文封面；2．学位论文版权使用授权书；3．学位论文原创性声明；4．中文摘要； 5．Abstract； 6．目录； 7．符号说明； 8．正文（第1章，第2章……）； 9．致谢； 10．参考文献； 11．附录； 12．个人简历、在学期间发表的学术论文及研究成果。
俄罗斯的起源
斯拉夫人是东欧人数最多、分布最广的民族；俄罗斯人是东斯拉夫民族中最强大的一支。
斯拉夫人的故乡大致是在喀尔巴阡山以北、维斯瓦河和第聂伯河之间的地区，即东欧大平原的西南部。
后来他们不断向周围扩展，西达易北河，东至顿河、伏尔加河上游，北抵波罗的海，南到黑海。
约在公元1世纪，斯拉夫人逐渐形成东西两大支，即东斯拉夫人和西斯拉夫人。
在欧洲民族大迁徙期间，东西斯拉夫人大批南移，进入多瑙河流域和巴尔干半岛，并同化了当地居民。
约至6、7世纪，又形成南方斯拉夫人。
这样，整个斯拉夫民族便分为三大支：东斯拉夫人包括俄罗斯人、乌克兰人、白俄罗斯人；西斯拉夫人包括波兰人、捷克人、斯洛伐克人等；南斯拉夫人包括塞尔维亚人、克罗地亚人、斯洛文尼亚人、黑山人和保加利亚人。
后来由于马扎尔人向西进入匈牙利平原，他们好似一个楔子一样把南方斯拉夫人和北部的东、西斯拉夫人分隔开来，因而有了不同的发展道路。
公元以前斯拉夫人的历史情况无文字可考，最早的文字记载出现于公元1世纪罗马作家塔西陀的著作里，他称之为维涅德人。
至公元6世纪，维涅德人被称作“斯拉夫人”，东斯拉夫人则被称为“安特人。
”那时他们还没有国家，处在原始公社末期。
在斯拉夫语言里，“斯拉夫”一词是“光荣”、“荣誉”（Слава）的意思；而在西方拉丁语言里，“斯拉夫”则是“奴隶”（slave）。
据说，哥特人曾把他们大批地卖给罗马人当奴隶，所以后来便称他们为斯拉夫族。
这里有侮辱、蔑视的含义。
东斯拉夫人从喀尔巴阡山脉的各个斜坡进入广阔的俄罗斯平原，“他们像飞鸟般从一端迁居到另一端，抛弃了住腻的地方，在新的地方居住下来。
”因此后来的俄国史学家说：“移民和国土的开拓是我国历史中的主要事情，所有其余的事情都和它们有或近或远的关系。
①俄罗斯（россия）在15世纪中叶以前称罗斯（русь），俄文里这两个词出现先后不同，中文里都译为俄罗斯。
自清朝康熙时代开始与俄国打交道时即有这一译法，当时称“斡罗斯”。
1026中文资料
1025 3 2 .935 (23.7) .630 (16.0) .064 (1.6) .452 (11.5) .100 (2.6) 1.219 (31.0) 1.093 (27.8)
1025-7 3 1 .935 (23.7) .681 (17.3) .064 (1.6) .503 (12.8) .100 (2.6) 1.219 (31.0) 1.093 (27.8)
• Reliable spring tension assures low contact resistance
• Preprogrammed video and electronic games
• Retains battery securely to withstand shock and vibration
• Allows components to be placed underneath the holder
• Ideal when board space is more important than board height;
such as PC/104 applicatons
M
DWG. 1
POSITIVE CONTACT (TOP) .015 [.38] SPRING STEEL, TIN NICKEL PLATE
101 3 1 .796 (20.2) .593 (15.1) .070 (1.8) .374 (9.5) .179 (4.6) 1.130 (28.7) .896 (22.8)
103 3 1 .796 (20.2) .513 (13.0) .070 (1.8) .335 (8.5) .100 (2.6) 1.130 (28.7) .896 (22.8)
Autolab中文操作手册
五
电化学技术手册…………………………………………………………………………………… 55 1. 2. 3. 4. 5. 6. 7. Autolab 电化学试验………………………………………………………………………………55 伏安分析………………………………………………………………………………………… 57 循环和线性扫描伏安…………………………………………………………………………… 62 记时方法………………………………………………………………………………………… 65 多模式电化学检测……………………………………………………………………………… 67 电位溶出分析…………………………………………………………………………………… 68 阶跃与扫描……………………………………………………………………………………… 69
14
第三章
1 主窗口：
GPES 软 件
1.1 文件菜单 File 1.1.1 Open procedure
打开测量条件
测量条件是作为一份独立的文件保存，该文件包含了 所有的测量参数， 1.1.2 Save procedure
保存测量条件
允许用户把修改的测量条件保存在当前目录下。 1.1.3 Save procedure as
三
GPES 软件………………………………………………………………………………………… 15 1． 窗口…………………………………………………………………………………………… 15 2． 手动控制窗口…………………………………………………………………………………… 24 3． 测量条件窗口………………………………………………………………………………… 25 4． 数据分析窗口…………………………………………………………………………………… 26
糖化血红蛋白分析仪说明书
应符合 Ｙ 丫 ０ ３．１０ 环境七
应符合 Ｂ ／ １ ４７１０中
４ 试 验方法
４．１ 正常工作
月
叶 １．１ 电源要求 ：洲 Ｖ卫吸２Ｖ；频率 ５０ Ｈｚ士１ Ｈｚ，
浦
“ ．
１．２
环境温度 ：＋
℃ ￣，目 ０ ℃
４．１．３ 相对湿度：３０％产、
４．１．４ 大气压 ：８５ ｋＰａ－－ １０
４．１０ 安全要求
按 ＧＢ ４７９３ ．１， ＹＹ ０ ６４８中规定的方法进行检测，应满足 ３．９要求。
４．１１ 环境试验
环境试验应 按 Ｇ Ｂ／ Ｔ １４７１０规定的方法进行检测，应满足 ３．１０要求。
５ 标志、标签及使用说明书
５．１ 分析仪的标志、标签
分析仪应在明显位置 固定标志 、标签，并至少注明下列 内容 ： ａ） 产品名称、型号； ｂ） 电源连接条件、输人功率； ｃ） 生产 日期或序列号； ｄ） 生产企业名称、注册地址、生产地址、联系方式。
ＹＹ／Ｔ １２４６－２０１４
ｉ３、ｊ４）后，立即连续测定高值血液样本（糖化血红蛋白浓度应）１２．０％（１２９．Ｏ ｍｍｏｌ／ｍｏｌ）） ４次（ｉｉ．ｉｚ．
ｉ３、￡‘），再测定原低浓度样本 １次（ｊ ｓ），根据式（６）计算携带污染率（％），应满足 ３．５要求。
Ｃｏ＿７５三一垫生立土些业Ｘ １００％
（ｊ：＋ ｊ：＋ ｊ４）／３
本标准起草单位 ：北京市 医疗器械检验所 、上海惠 中医疗科技有 限公司 、希森美康 医用 电子 （ 上 海 ）
有限公司 、中国食品药 品检定研究院。
本标准主要起草人 ：续勇、贺学英 、戴 长 生 、范宜静 、王建宇 。
ＹＹ／Ｔ １２４６－２０１４
糖化血红 蛋 白分析仪