105-1042-001;中文规格书,Datasheet资料
B0540WS-7;中文规格书,Datasheet资料
SURFACE MOUNT SCHOTTKY BARRIER RECTIFIERFeatures• Low Forward Voltage Drop• Guard Ring Construction for Transient Protection • High Conductance• Lead Free By Design/RoHS Compliant (Note 3) • "Green" Device (Note 4)Mechanical Data• Case: SOD-323• Case Material: Molded Plastic, "Green" Molding Compound.UL Flammability Rating Classification 94V-0• Moisture Sensitivity: Level 1 per J-STD-020D• Polarity: Cathode Band• Terminals: Finish - Matte Tin Annealed Over Alloy 42leadframe. Solderable per MIL-STD-202, Method 208 • Marking Information: See Page 2• Ordering Information: See Page 2• Weight: 0.004 grams (approximate)Top ViewMaximum Ratings@T A = 25°C unless otherwise specifiedSingle phase, half wave, 60Hz, resistive or inductive load.For capacitance load, derate current by 20%.Characteristic Symbol Value UnitPeak Repetitive Reverse Voltage Working Peak Reverse Voltage DC Blocking Voltage V RRMV RWMV R40 VRMS Reverse Voltage V R(RMS)28 V Average Rectified Output Current I O0.5 ANon-Repetitive Peak Forward Surge Current8.3ms single half sine-wave superimposed on rated load I FSM3 A Thermal CharacteristicsCharacteristic Symbol Value Unit Power Dissipation (Note 1) P D235 mW Typical Thermal Resistance Junction to Ambient (Note 1) RθJA426 °C/W Operating and Storage Temperature Range T J, T STG-40 to +125 °CElectrical Characteristics@T A = 25°C unless otherwise specifiedCharacteristic Symbol Min Typ Max Unit Test Condition Reverse Breakdown Voltage (Note 2) V(BR)R40 ⎯⎯V I R = 1mAForward Voltage V F⎯285480300550mVI F = 10mAI F = 500mAReverse Current (Note 2) I R ⎯⎯1.02.035μAμAV R = 10VV R = 30VTotal Capacitance C T ⎯⎯12520⎯⎯pFpFV R = 0V, f = 1.0MHzV R = 10V, f = 1.0MHzNotes: 1. Part mounted on FR-4 PC board with recommended pad layout, which can be found on our website at /datasheets/ap02001.pdf.2. Short duration pulse test used to minimize self-heating effect.3. No purposefully added Lead.4. Diodes Inc.'s "Green" policy can be found on our website at /products/lead_free/index.php.Please click here to visit our online spice models database.10100V, INSTANTANEOUS REVERSE VOLTAGE (V)Fig. 2 Typical Reverse CharacteristicsRI,INSTANTANEOUSFORWARDCURRENT(mA)FV, INSTANTANEOUS FORWARD VOLTAGE (V)Fig. 1 Typical Forward CharacteristicsF100C,TOTALCAPACITANCE(pF)TV, DC REVERSE VOLTAGE (V)Fig. 3 Total Capacitance vs. Reverse VoltageR0.250.50050100I,AVE150RAGEFORWARDCURRENT(A)F(AV)T, TERMINAL TEMPERATURE (C)Fig. 4 Forward Current Derating CurveT°0.751.02575125Ordering Information(Note 5)Part Number Case PackagingB0540WS-7 SOD-323 3000/Tape & ReelNotes: 5. For packaging details, go to our website at /datasheets/ap02007.pdf.Marking InformationSF SF = Product Type Marking CodePackage Outline DimensionsSuggested Pad LayoutIMPORTANT NOTICEDiodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to any product herein. Diodes Incorporated does not assume any liability arising out of the application or use of any product described herein; neither does it convey any license under its patent rights, nor the rights of others. The user of products in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on our website, harmless against all damages.LIFE SUPPORTDiodes Incorporated products are not authorized for use as critical components in life support devices or systems without the expressed written approval of the President of Diodes Incorporated.SOD-323 Dim Min Max A 0.25 0.35 B 1.20 1.40 C 2.30 2.70 H 1.60 1.80 J 0.00 0.10 K 1.0 1.1 L0.20 0.40 M 0.10 0.15α0° 8°All Dimensions in mmDimensions Value (in mm)Z 3.75 G 1.05 X 0.65 Y 1.35 C 2.40分销商库存信息: DIODESB0540WS-7。
104R功率电感规格书
AMENDMENT RECORD TYPESDRH104 SYMBOL DATE PAGE CONTENTS DWN. BY CHK. BY APP. BY00 2010/09/09 NEW ISSUE L.WANG Y.L.LI Y.B.ZENGSPEC. No. 2/6U666-6063SPECIFICATION 1. DIMENSION（UNIT：mm）※ THE DIMENSIONS WITHOUT TOLERANCE ARE APPROX.2. RECOMMENDED DIMENSIONS (mm)3. CONNECTION (TOP VIEW)4.STAMPING (e.g.)TYPESDRH1044.7µH～39µHUNFIXED POSITION2.047µH～470µH5.ELECTRICAL CHARACTERISTIC* TESTING INSTRUMENTINDUCTANCE : HP 4284A OR EQUIV ALENT. D.C.R : TH2512B OR EQUIV ALENT. (Ta= 20℃)SATURA TION CURRENT: WK 3260B+3265B OR EQUIV ALENT.* TESTING CONDITIONS OF INDUCTANCE :(4.7-6.8µH )at 100 kHz /1V (10-470µH )at 1 kHz /1V . * SATURA TION CURRENT: INDICATES THE CURRENT WHEN THE INDUCTANCE DECREASES TO 75% OF INITIAL V ALUE. (Ta=20℃)No.UTOP P /N.CUS TOMERP /N.STAMPINDUCTANCE (µH)WI THI ND.C.R.(m Ω)Max.S ATURATION CURRENT(A)01 SDRH104-4R7NC 4R7 4.7±30% 35 3.2 02 SDRH104-6R8NC 6R8 6.8±30% 44 2.8 03 SDRH104-100MC 100 10±20% 50 2.4 04 SDRH104-120MC 120 12±20% 54 2.25 05 SDRH104-150MC 150 15±20% 61 2.0 06 SDRH104-180MC 180 18±20% 84 1.8 07 SDRH104-220MC 220 22±20% 94 1.65 08 SDRH104-270MC 270 27±20% 110 1.45 09 SDRH104-330MC 330 33±20% 150 1.35 10 SDRH104-390MC 390 39±20% 170 1.2 11 SDRH104-470MC 470 47±20% 210 1.1 12 SDRH104-560MC 560 56±20% 230 1.0 13 SDRH104-680MC 680 68±20% 260 0.93 14 SDRH104-820MC 820 82±20% 360 0.84 15 SDRH104-101MC 101 100±20% 410 0.76 16 SDRH104-121MC 121 120±20% 450 0.70 17 SDRH104-151MC 151 150±20% 640 0.63 18 SDRH104-181MC 181 180±20% 840 0.57 19 SDRH104-221MC 221 220±20% 960 0.52 20 SDRH104-271MC 271 270±20% 1070 0.47 21 SDRH104-331MC 331 330±20% 1370 0.43 22 SDRH104-391MC 391 390±20% 1550 0.39 23SDRH104-471MC471470±20%17400.36TYPESDRH104REMARKSPEC. No. 4/6U666-60636. GENERAL CHARACTERISTICS* STANDARD TESTING CONDITIONS:UNLESS OTHERWISE SPECIFIED, THE STANDARD RANGE OF ATMOSPHERIC CONDITIONS FOR MEASUREMENTS AND TESTS ARE AS FOLLOWS: AMBIENT TEMPERATURE: 15℃~35℃.RELATIVE HUMIDITY : 25% ~85%. AIR PRESSURE : 86kPa ~106kPa.IF THERE IS ANY DOUBT ABOUT THE RESULTS, MEASUREMENT SHALL BE MADE WITHIN THE FOLLOWING LIMITS: AMBIENT TEMPERATURE: 20℃±1℃. RELATIVE HUMIDITY: 63% ~67%.AIR PRESSURE : 86kPa ~106kPa.No. ITEMS CONDITIONS SPECIFICATION1 OPERA TION TEMPERA TURESTORAGE TEMPERA TURE -25 ～+ 85℃(INCLUDING COIL TEMPERA TURE RISE) -30 ～+ 85℃2 TEMPERA TURE COEFFICIENT -30 ～+85℃0 ～2000 ppm/℃3 FIXING STRENGTH SAMPLE IS PUSHED IN THREE DIRECTIONS OFX, Y AND Z WITH FORCE OF 5. 0N FOR 10±5SECONDS. AFTER SOLDERING BETWEENCOPPER PLA TE AND ELECTRODES.NO ELECTRODE DETACHMENT.4 RESISTANCE TO SOLDERINGHEA T TEST REFER TO THE SPEC “STD-001NP”. NO MECHANICAL BREAKAGE.DEVIA TION RELATIVE TO INITIALV ALUE:L: WITHIN ±5.0%5 SOLDERABILITY TEST IMMERSE THE ELECTRODE IN FLUX FOR 5SECONDS. THEN DIP THE ELECTRODE INTO ASOLDERING BA TH OF 245±5℃ FOR 2±0.5SECONDS. OVER 95% OF THE SURFACE BEING IMMERSED SHALL BE COVERED WITH NEW SOLDER UNIFORMLY.6 VIBRA TION TEST AMPLITUDE: 1.5mm P-PFREQUENCY:10～55～10Hz (1 MINUTE PER CYCLE)DURATION: 1 HOUR IN EACH OF X, Y, Z AXIS. DEVIA TION RELATIVE TO INITIAL V ALUE:L: WITHIN ±5.0%7 HUMIDITY TEST TEMPERA TURE: 40℃±2℃HUMIDITY: 90%～95%RHDURATION: 96±4 HOURS. DEVIA TION RELATIVE TO INITIAL V ALUE:L: WITHIN ±5.0%8 THERMAL SHOCK TEST 20 CYCLES OF +85℃FOR 30 MINUTES, -40℃FOR 30 MINUTES. CHARACTERISTICS AREMEASURED AFTER THE AMBIENT AIREXPOSURE OF 1 HOUR9 HIGH TEMPERA TURESTORAGE TEST TEMPERA TURE: 85℃±2℃DURATION: 96±4 HOURS10 LOW TEMPERA TURESTORAGE TEST TEMPERA TURE: -30℃±3℃DURATION: 96±4 HOURS.DEVIA TION RELATIVE TO INITIALV ALUE:L: WITHIN ±5.0%REMARK SPEC. No.5/6U666-60637. PACKINGPACKAGE TO BE ACCORDING TO PACKAGE SPECIFICATIONS (TICK THE RELEV ANT “ ” ) □KB-CTR049;* ENCLOSING CONDITION OF COILS.8. REMARK1.RoHS COMPLIANCE REMARKS* LEAD WILL BE PRESENT IN THE FERRITE CORE OF THE FRIT MATRIX IN THE COMPONENT.THIS USE, IS EXEMPT FROM RoHS LEGISLATION PER THE ANNEX (ITEM 7), WHICHREFERS TO “LEAD IN ELECTRONIC CERAMIC PART”.REMARK SPEC. No.6/6U666-6063。
BLF888A,112;中文规格书,Datasheet资料
RF performance in a common source 860 MHz narrowband test circuit f1 = 860; f2 = 860.1 860 858 858 DVB-T (8k OFDM) 858 858
[1] [2] [3] Measured at = 10 %; tp = 100 s. Measured [dBc] with delta marker at 4.3 MHz from center frequency. PAR (of output signal) at 0.01 % probability on CCDF; PAR of input signal = 9.5 dB at 0.01 % probability on CCDF.
Graphic symbol
BLF888A (SOT539A)
1 2 5 3 3 4 4 5 1
2
sym117
BLF888AS (SOT539B) 1 2 3 4 5 drain1 drain2 gate1 gate2 source
[1]
1
2 5
1
3
4
3 5 4
2
sym117
[1]
Connected to flange.
[1] [2]
Conditions VGS = 0 V; ID = 2.4 mA VDS = 10 V; ID = 240 mA VGS = 0 V; VDS = 50 V VGS = VGS(th) + 3.75 V; VDS = 10 V VGS = 10 V; VDS = 0 V VGS = VGS(th) + 3.75 V; ID = 8.5 A VGS = 0 V; VDS = 50 V; f = 1 MHz VGS = 0 V; VDS = 50 V; f = 1 MHz VGS = 0 V; VDS = 50 V; f = 1 MHz
NOIH2SM1000S-HHC;中文规格书,Datasheet资料
NOIH2SM1000AHAS2 Image SensorINTRODUCTIONScopeThis ICD version is generated after qualification campaign closure. This specification details the ratings, physical, geometrical, electrical and electro-opticalcharacteristics, and test- and inspection-data for the High Accuracy Star Tracker (HAS2) CMOS active pixel image sensor (CMOS APS).The device described in this document is protected by US patent 6,225,670 and others.Component Type ValuesTable 10 on page 8 provides a summary of the type variants of the basic CMOS image sensor. The complete list of specifications for each type variant is given in Detailed Specifications on page 9.All specifications in Detailed Specifications on page 9 are given at 25 ±3°C, under nominal clocking and bias conditions. Exceptions are noted in the ‘Remarks’ field. Maximum RatingTable 11 on page 9 specifies the maximum ratings. Do not exceed these ratings at any times, during use or storage. Physical Dimension and Geometrical Information Figure 2 on page 24 shows the physical dimensions of the assembled component. The geometrical information in Figure 4 on page 25 describes the position of the die in the package.Pin AssignmentFigure 5 on page 26 contains the pin assignment. The figure contains a schematic drawing and a pin list. A detailed functional description of each pin is available in Pin List on page 36.Soldering InstructionsSoldering is restricted to manual soldering only. No wave or reflow soldering is allowed. For manual soldering, the following restrictions are applicable:•Solder 1 pin on each of the four sides of the sensor.•Cool down for a minimum period of 1 minute before soldering another pin on each of the four sides.•Repeat soldering of 1 pin on each side, including a 1 minute cool down period.Handling PrecautionsThe component is susceptible to damage by electro-static discharge. Therefore, use suitable precautions for protection during all phases of manufacture, testing, packaging, shipment, and any handling. Follow these guidelines:•Always manipulate devices in an ESD controlled environment.•Always store the devices in a shielded environment that protects against ESD damage (at least a non-ESD generating tray and a metal bag).•Always wear a wrist strap when handling the devices and use ESD safe gloves.•The HAS2 is classified as class 1A (JEDEC classification - [AD03]) device for ESD sensitivity. For proper handling and storage conditions, refer to the ON Semiconductor application note AN52561.Limited WarrantyON Semiconductor’s Image Sensor Business Unit warrants that the image sensor products to be delivered hereunder, if properly used and serviced, will conform to Seller’s published specifications and will be free from defects in material and workmanship for two (2) years following the date of shipment. If a defect were to manifest itself within two (2) years period from the sale date, ON Semiconductor will either replace the product or give credit for the product.Return Material Authorization (RMA)ON Semiconductor packages its image sensor products in a clean room environment under strict handling procedures and ships all image sensor products in ESD-safe, clean-room-approved shipping containers. Products returned to ON Semiconductor for failure analysis should be handled under these same conditions and packed in its original packing materials, or the customer may be liable for the product.Storage InformationThe components must be stored in a dust-free and temperature-, humidity-and ESD-controlled environment.•Store devices in special ESD-safe trays such that the glass window is never touched.•Close the trays with EDS-safe rubber bands.•Seal the trays in an ESD-safe conductive foil in clean room conditions.•For transport and storage outside a clean room, pack the trays in a second ESD-save bag that is sealed in cleanroom.Additional InformationThe HAS sensor is subject to the standard European export regulations for dual use products. A Certificate of Conformance will be issued upon request at no additional charge. The CoC refers to this document. Additional screening tests is done on request at additional cost.The following data is delivered by default with FM sensors:•Sensor calibration data •Temperature calibration data •Certificate of Conformance to this detailed specification•Visual inspection report•Bad pixel mapITAR InformationThe NOIH2SM1000A is an ITAR-free component.Table 1. ORDERING INFORMATIONMarketing Part Number Description Package NOIH2SM1000T-HHC HAS2 Mono, Flight Model, Level 284-pin JLCC NOIH2SM1000A-HHC HAS2 Mono, Engineering ModelNOIH2SM1000S-HHC HAS2 Mono, Flight Model, Level 1NOIH2SM1000A-HWC HAS2 Mono Windowless, Engineering ModelNOIH2SM1000S-HWC HAS2 Mono Windowless, Flight Model, Level 1ORDERING CODE DEFINITIONO = OptoN = ON SemiconductorHAS2M=MonoH= JLCCCommercial Temperature Range 1000M HS = Standard Process1.0 MP Resolution A= Engineering Model H= BK7G18 GlassI I = Image Sensors H CN O H2S A −S= Flight Model, Level 1T= Flight Model, Level 2W= WindowlessAPPLICABLE DOCUMENTSThe following documents form part of this specification:Table 2. APPLICABLE DOCUMENTSNo.Reference Title Issue DateAD01ESCC Generic Specification 9020Charge Coupled Devices, Silicon, Photosensitive2March 2010AD02001-06225(Note 1)Electro-optical test methods for CMOS image sensors E October, 2008AD03JESD22-A114-B Electrostatic Discharge (ESD) Sensitivity Testing HumanBody Model (HBM)B June, 2000AD04APS2-FVD-06-003Process Identification Document for HAS22February, 2008 AD05001-49283Visual Inspection for FM devices1January, 2008 AD06001-49280HAS2 FM Screening2June, 20091.This specification will be superseded by the ESCC basic specification 25000, which is currently under development. The current referenceis an internal ON Semiconductor procedure and is a confidential document.2.Lot acceptance and screening are based on ESCC 9020 issue 2. Please note that Lot Acceptance and Screening on page 6 − is valid forthe Flight Model Level 1 devices. For more information on Flight Model 1 Windowless devices, please contact imagesensors@DETAILED INFORMATIONDeviations from Generic SpecificationLot acceptance and screening are based on ESCC 9020 issue 2. See Lot Acceptance and Screening on page 6 for more information.Mechanical RequirementsDimension CheckThe dimensions of the components specified here is checked and must comply with the specifications and the tolerances indicated in Figure 2 on page 24 Geometrical CharacteristicsThe geometrical characteristics of the components specified here is checked and must comply with the specifications and tolerances given in Figure 2 on page 24 and Figure 3 on page 25WeightThe maximum weight of the components specified here is specified in Table 14 on page 9Materials and FinishesThe materials and finishes is as specified in this document. Where a definite material is not specified, a material which enables the components to meet the performance requirements of this specification must be used. See Note 2. CaseThe case is hermetically sealed and must have a ceramic body and a glass window.Table 3. CASEType JLCC−84Material Black Alumina BA−914 Thermal expansion coefficient7.6 x 10−6/KHermeticity< 5 x 10−7 atms. cm3/s Thermal resistance(Junction to case)3.633°C/WLead Material and FinishTable 4. LEAD MATERIAL AND FINISHLead Material KOVAR1e Finish Nickel, min 2 m m2nd Finish Gold, min 1.5 m mWindowThe window material is a BK7G18 glass lid with anti-reflective coating applied on both sides.The optical quality of the glass must have the specifications in Table 15 on page 9.The anti reflective coating has a reflection coefficient less than 1.3% absolute and less than 0.8% on average, over a bandwidth from 440 nm to 1100 nm.Level 2 versus Level 1 differencesHAS2 Level 2 devices are differing from Level 1 devices in Lot Acceptance and Screening on page 6•100% screening is applied with burn-in limited to 168 hinstead of 240 h as for Level 1.•Assembly process is based on ESA qualified process (same procedures and materials)•Devices will be fully tested at room temperature, electrical testing at 85 degrees is limited to power consumption measurements only.•X/Y dye placement is relaxed to +/- 200 m m.•Mismatching between odd and even columns in Direct Readout is allowed but shall stay in the limit of127LSB.•The defect and particles specification will be the same as for the Engineering Model - NOIH2SM1000A-HHC – with the exception of the defective columns which are not allowed in the Level 2 devices. Refer to Table 10“Type Variant Summary” on page 8.•Endurance testing during wafer LAT is limited to a 1000 h burn in instead of 2000 h and will be performed on 3 un-screened parts instead of 6.•Prior to endurance testing and total dose testing, a stabilization bake of 48 hrs, followed by a 168 hrs burn-in, shall be performed.•During wafer LAT, the Electro-optical measurements is limited on 2 parts (1 from endurance testing and 1 from radiation testing) instead of 6.•For each assembly batch (manufacturing-lot), 2 screened devices will be made available for a DPA test. An assembly batch is defined as a group of parts which have been assembled within a time window of less than one week. The DPA devices can be rejected devices (glass lid cosmetic defects, electrical defects,…) but has to be screened through the same thermal steps as the HAS2 “level2”. The DPA test will be carried out by ON Semiconductor as a customer courtesy.Prior to DPA testing, the following tests are performed: Solderability and Resistance to Solvents (marking permeability).NOTE:As the glass lid removal is a best effort activity, the DPA test cannot be 100% guaranteed.•Pictures and defect maps are not included in the data pack, but will be made available upon request.•Assembly lot acceptance testing is not performed.Data PackEach set of devices will have a data pack which will be made available to the customer. The data pack consists of:•CoC form referring to the applicable specification •Calibration data •Screening Report•Life Test Report and Radiation (Total Dose) Test Report for each wafer lot •Electrical Test Report •Spectral response data •Visual Inspection Report •DPA Test ReportMarkingGeneralThe marking must consist of lead identification and traceability information.Lead IdentificationAn index to pin 1 must be located on the top of the package in the position defined in Figure 2 on page 24. The pin numbering is counter clock-wise, when looking at the top-side of the component.Traceability InformationEach component must be marked such that complete traceability is maintained.The component must have a number as follows:Figure 1. Product MarkingXXXXX = Specific Device Code A = Assembly Location WL = Wafer Lot YY = YearWW = Work WeekNNNN = Serial NumberTable 5. PACKAGE MARK DECODEROrderable Part Number Package Mark: Line 1Package Mark: Line 2Package Mark: Line 3NOIH2SM1000T-HHC NOIH2SM1000T -HHC_NNNN AWLYYWW NOIH2SM1000A-HHC NOIH2SM1000A -HHC_NNNN AWLYYWW NOIH2SM1000S-HHC NOIH2SM1000S -HHC_NNNN AWLYYWW NOIH2SM1000A-HWC NOIH2SM1000A -HWC_NNNN AWLYYWW NOIH2SM1000S-HWCNOIH2SM1000S-HWC_NNNNAWLYYWWwhere NNNN- serialized number controlled manually by ON Semiconductor, BELGIUM where DD-MM-YYYY represents the lot assembly date NOIH2SM1000T-HHC has a Minimum Order Quantity of 10Electrical and Electro −optical MeasurementsElectrical and Electro −optical Measurements at Reference TemperatureThe parameters to be measured to verify the electrical and electro-optical specifications are given in Table 18 on page 13 and Table 27 on page 23. Unless otherwise specified, the measurements must be performed at a environmental temperature of 22 ±3°C.For all measurements, the nominal power supply, bias,and clocking conditions apply. The nominal power supply and bias conditions are given in Table 28 on page 23; thetiming diagrams in Figure 35 on page 47 and Figure 37 on page 49.NOTE:The given bias and power supply settings implythat the devices are measured in ‘soft-reset’condition.Electrical and Electro −optical Measurements at High and Low TemperatureTable 19 on page 14 and Table 20 on page 15 list the parameters to be measured to verify electrical and electro-optical specifications. Unless otherwise specified,the measurements must be performed at –40 (–5 +0) °C and at +85 (+5 –0) °C.Circuits for Electrical and Electro−optical Measurements Circuits for performing the electro−optical tests in Table18 on page13 and Table 27 on page 23 are shown in Figure 49 on page 59 to Figure 52 on page 59.Burn−in TestParameter Drift ValuesThe parameter drift values for power burn-in are specified in Table 21 on page 17. Unless otherwise specified, the measurements must be conducted at an environmental temperature of 22 ±3°C and under nominal power supply, bias, and timing conditions.Do not exceed the parameter drift values. In addition to these drift value requirements, do not exceed the limit values of any parameter, as indicated in Table 18 on page13 Conditions for High Temperature Reverse Bias Burn-in Not ApplicableConditions for Power Burn-inThe conditions for power burn-in is specified in Table 24 on page 19 of this specification.Electrical Circuits for High Temperature Reverse Bias Burn-inNot ApplicableElectrical Circuits for Power Burn-inCircuits to perform the power burn-in test are shown in Figure 48 on page 58 and Figure 49 on page 59 of this specification.Environmental and Endurance TestsElectrical and Electro-optical Measurements on Completion of Environmental TestThe parameters to be measured on completion of environmental tests are listed in Table 25 on page 20. Unless otherwise stated, the measurements must be performed at a environmental temperature of 22 ±3°C. Measurements of dark current must be performed at 22 ±1°C and the actual environmental temperature must be reported with the test results.Electrical and Electro-optical Measurements At Intermediate Point During Endurance TestThe parameters to be measured at intermediate points during endurance test of environmental tests are listed in Table 25 on page 20. Unless otherwise stated, the measurements must be performed at an environmental temperature of 22 ±3°C.Electrical and electro-optical Measurements on Completion of Endurance TestThe parameters to be measured on completion of endurance tests are listed in Table 25 on page 20. Unless otherwise stated, the measurements must be performed at a environmental temperature of 22 ±3°C.Conditions for Operating Life TestThe conditions for operating life tests must be as specified in Table 24 on page 19 of this specification.Electrical Circuits for Operating Life TestCircuits for performing the operating life test are shown in Figure 49 on page 59 and next ones of this specification. Conditions for High Temperature Storage TestThe temperature to be applied must be the maximum storage temperature specified in Table 11 on page 9 of this specification.Total Dose Radiation TestApplicationThe total dose radiation test must be performed in accordance with the requirements of ESCC Basic Specification 22900.Parameter Drift ValuesThe allowable parameter drift values after total dose irradiation are listed in Table 22 on page 18 . The parameters shown are valid after a total dose of 42 KRad and 168h/100°C annealing.Bias ConditionsContinuous bias must be applied during irradiation testing as shown in Figure 49 on page 59 and next ones of this specification.Electrical and Electro-optical MeasurementsThe parameters to be measured, prior to, during and on completion of the irradiation are listed in Table 27 on page23 of this specification. Only devices that meet the specification in Table 18 on page 13 of this specification must be included in the test samples.Lot Acceptance and ScreeningThis section describes the Lot Acceptance Testing (LAT) and screening on the HAS2 FM devices. All tests on device level must be performed on screened devices (see Table 9 on page 7)Wafer Lot AcceptanceThis is the acceptance of the silicon wafer lot. This must be done on every wafer lot that is used for the assembly of flight models.Table 6.Test Test Method Number of Devices Test Condition Test Location Wafer processingdata reviewPID NA NA ON Semiconductor SEM ESCC 21400 4 naked dies NA Test houseTotal dose test ESCC 22900 3 devices42 krad, not to exceed3.6 krad/hr Test house by ON SemiconductorEndurance test MIL-STD-883 Method 1005 6 devices2000h at +125°C Test houseBefore and after total dose test and endurance test:•Electrical measurements before and after at high, low, and room temperature. See Table 18 on page13, Table 19 on page 14 and Table 20 on page 15 of this specification.•Visual inspection before and after•Detailed electro-optical measurements before and after Glass Lot AcceptanceTransmission and reflectance curves that are delivered with each lot must be compared with the specifications in Table 15. Three glass lids are chosen randomly from the lot and measured in detail. The results are compared with Figure 5 on page 26.Package Lot Acceptance•Five packages are chosen randomly from the lot and measured in detail. The results are compared with Figure 2 on page 24.•A solderability test is covered in the assembly lot acceptance tests (Table 7)Table 7. ASSEMBLY LOT ACCEPTANCETest Test Method Number ofDevices Test Condition Test LocationSpecial assembly house inprocess controlAssembly House Bond strength test MIL-STD-883 method 20112D Assembly HouseAssembly house geometrical datareviewReview All CYSolder ability MIL-STD883, method 20033D Test House Terminal strength MIL-STD 883, method 2004Marking permanence ESCC 24800Geometrical measurements PID All CY Temperature cycling MIL-STD 883, method 10105Condition B50 cycles–55°C / +125°CTest House Moisture resistance JEDEC Std. Method A101-B240 h at 85°C / 85%Test HouseTable 7. ASSEMBLY LOT ACCEPTANCETestTest LocationTest ConditionNumber of DevicesTest MethodDPADie shear test MIL-STD-883 method 20194N/A Test House Bond pull testMIL-STD-883 method 2011All wiresTest HouseNOTE:As the glass lid is removed from the packageprior to DPA, the results of the DPA cannot be guaranteed.Before and after the following tests are done:•Electrical measurements conform to Table 18 on page 13 of this specification •Detailed visual inspection •Fine leak test + gross leak testFine- and gross-leak tests must be performed using the following methods:Fine Leak test : MIL-STD-883, Test Method 1014,Condition AGross Leak test : MIL-STD-883, Test Method 1014,Condition CThe required leak rate for fine leak testing is 5x 10−7atms.cm 3/sTable 8. PERIODIC TESTINGTestTest MethodNumber of DevicesTest ConditionTest Location Mechanical shock MIL-STD 883, method 20022 B - 5 shocks, 1500 g – 0.5 ms – ½ sine, 6 axesTest House Mechanical vibration MIL-STD 883, method 20072A - 4 cycles, 20 g 80 to 2000 Hz, 0.06 inch 20 to 80 Hz, 3 axesTest HouseDPADie shear test MIL-STD-883 method 20192N/A Test House Bond pull testMIL-STD-883 method 2011All wiresTest HouseNOTE:As the glass lid is removed from the packageprior to DPA, the results of the DPA cannot be guaranteed.Periodic testing is required every two years. Before and after the following tests are done:•Electrical measurements conform to Table 18 on page 13•Detailed visual inspection •Fine leak test + gross leak testFine- and gross-leak tests must be performed using the following methods:Fine Leak Test : MIL-STD-883, Test Method 1014,Condition AGross Leak Test : MIL-STD-883, Test Method 1014,Condition CThe required leak rate for fine leak testing is 5x 107atms.cm 3/sTable 9. SCREENINGNo.TestTest MethodNumber of DevicesTest Condition Test Location 1HCRT Electrical measurements001-53958AllHT +85°C LT –40°C RT +25°CON Semiconductor2Visual inspection001-49283 + ICD All ON Semiconductor 3Die placement measurements Internal proc.All ON Semiconductor 4XRAYESCC 20900All Test House 5Stabilization bake MIL-STD-883 method 1008All 48h at 125°C Test House 6Fine leak testMIL-STD-883 method 1014AllATest HouseTable 9. SCREENING7Gross leak test MIL-STD-883 method 1014All C Test HouseTest House 8Temperature cycling MIL-STD-883 method 1010All B - 10 cycles–55°C +125°C 9Biased Burn-in ICD All240 h at +125°C ON Semiconductor 10Mobile Particle Detection MIL-STD-883 method 2020All A Test House 11Fine leak test MIL-STD-883 method 1014All A Test House 12Gross leak test MIL-STD-883 method 1014All C Test HouseON Semiconductor 13HCRT Electrical measurements001-53958All HT +85°CLT –40°CRT +25°C 14Final Visual Inspection001-49283 + ICD All ON SemiconductorTABLES AND FIGURESSpecification TablesTable 10. TYPE VARIANT SUMMARYHAS2 Type Variants Engineering Model Flight Model Optical quality (see Optical Quality − Definitions on page 67)Dead pixels10020Bright pixels in FPN image5020Bad pixels in PRNU image15050Bad columns50Bad rows50Bright pixel clusters2 adjacent bright pixels2524 or more adjacent bright pixels100DSNU defects at 22 dec BOL12001000DSNU defects at 22 dec EOL15001250 Particle contaminationFixed particles outside focal plane N/A N/AMobile particles > 20 m m00Fixed particles on focal plane > 20 m m00Mobile particles > 10 m m and < 20 m m2010Fixed particles on focal plane > 10 m m and < 20 m mParticles < 10 m m N/A N/AWafer lot acceptance (see section Wafer Lot Acceptance on page 6)NO YesGlass lot acceptance (see section Glass Lot Acceptance on page 6)NO Yes Assembly lot acceptance (Table 7 on page 6)NO Yes Periodic testing (Table 8 on page 7)NO Yes Screening (Table 9 on page 7)NO Yes Calibration data NO YesVisual Inspection + particle mapping NO YesTable 11. MAXIMUM RATINGSNo.Characteristic Min Typ Max Unit Remarks1Any supply voltage except VDD_RES–0.5 3.3+7.0V2Supply voltage at VDD_RES–0.5 3.3+5.0V 3.3 V for normal operation; up to5V for increased full well capacity.3Voltage on any input terminal–0.5 3.3Vdd + 0.5V4Soldering temperature NA NA260°C Hand soldering only; See Solder-ing Instructions on page 1 5Operating temperature–40NA+85°C6Storage temperature–55NA+125°CStresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.Detailed Specifications − All Type VariantsTable 12. GENERAL SPECIFICATIONSNo.Characteristic Min Typ Max Unit Remarks1Image sensor format N/A1024 x 1024N/A pixels2Pixel size N/A18N/A m m3ADC resolution N/A12N/A bit10-bit accuracy at 5 Msamples/secTable 13. SILICON PARTICLE CONTAMINATION SPECIFICATIONSNo.Characteristic Min Typ Max Unit Remarks1Optical quality: Particle max size N/A N/A20m m See Type Variant Summary onpage 8Table 14. MECHANICAL SPECIFICATIONSNo.Characteristic Min Typ Max Unit Remarks1a Flatness of image area NA7.4NA m m Peak-to-peak at 25 ±3°CSpecified by the foundry over anentire 8-inch wafer 1b Flatness of glass lid NA90150m m Towards ceramic package2Mass7.77.858.0g3Total thickness 3.2 3.3 3.4mm Package + epoxy + glass lid4a Die position, X offset NA NA0.1mm Die in center of cavity4b Die position, Y offset NA NA0.1mm Die in center of cavity5Die position, parallelism vs window Die position, parallelism vs backside –0.10.10.10.1mm6Die position, Y tilt–0.100.1°7Die position, X tilt–0.100.1°8Die – window distance0.250.30.35mmTable 15. GLASS LID SPECIFICATIONSNo.Characteristic Min Typ Max Unit Remarks 1a XY size26.7 x 26.726.8 x 26.826.9 x 26.9mm1b Thickness 1.4 1.5 1.6mmTable 15. GLASS LID SPECIFICATIONSNo.RemarksUnitMaxTypMinCharacteristic2a Spectral range for optical coating ofwindow440NA1100nm2b Reflection coefficient for window NA<0.8<1.3%Over bandwidth indicated in 2a3Optical quality:Scratch max widthScratch max numberDig max sizeDig max number N/A N/A1056025m mTable 16. ENVIRONMENTAL SPECIFICATIONSNo.Characteristic Min Typ Max Unit Remarks1Operating temperature–40NA+85°C2Storage temperature–55NA+125°C Lower storage temperatures (up to–80°C) have been tested and thedevice survives, but this is not afully qualified temperature.3Sensor total dose radiation tolerance N/A42N/A krad (Si)Tested for functionality up to300krad, 42 krad is guaranteed4Sensor SEL threshold with ADC enabled NA NA>110MeV cm3mg-1Equivalent LET valueTable 17. ELECTRICAL SPECIFICATIONSNo Characteristic Min Typ Max Unit Remarks1Total power supply current stand-by1618.521mA2Total power supply current, operational353740mA ADC at 5 MHz sampling ratemeasured3Power supply current to ADC, operational: analog + digital 171921mA ADC at 5 MHz sampling ratemeasured4Power supply current to image core,operational1415.517mA5Input impedance digital input3NA NA M W6Input impedance ADC input3NA NA M W7Output amplifier voltage range 2.2 2.45 2.6V8Output amplifier gain setting 0NA1NA–Nominal 1measured reference9Output amplifier gain setting 1 1.9 2.1 2.3–Nominal 2relative to setting 010Output amplifier gain setting 2 3.8 4.1 4.4–Nominal 4relative to setting 011Output amplifier gain setting 37.27.78.2–Nominal 8relative to setting 012Output amplifier offset setting 00.860.93 1.0V0 decodes to middle value 13Output amplifier offset setting 31 1.30 1.35 1.40V14Output amplifier offset setting 320.430.510.6V15Output amplifier offset setting 630.800.90 1.0V16ADC ladder network resistance NA 1.8NA k W Typical value17ADC differential nonlinearity NA711lsb18ADC integral nonlinearity NA818lsb分销商库存信息: ONSEMINOIH2SM1000S-HHC。
GFC0412DS-DF00;中文规格书,Datasheet资料
SPECIFICATION FOR APPROVALCustomerDescription D C F A NPart No. R E V.Delta Model No.GFC0412DS-DF00 REV. 01 Sample Issue No.Sample Issue Date FEB.03.2009PLEASE SEND ONE COPY OF THIS SPECIFICAITONBACK AFTER YOU SIGNED APPROVAL FOR PRODUCTION PRE-ARRANGMENT.APPROVED BY:DATE :DELTA ELECTRONICS, INC.TAOYUAN PLANT252, SHANG YING ROAD, KUEI SAN INDUSTRIAL ZONE TAOYUAN SHIEN, TAIWAN, R.O.C.TEL:886-(0)3-3591968FAX:886-(0)3-3591991Application Notice1.Delta will not guarantee the performance of the products if the application conditionfalls outside the parameters set forth in the specification.2. A written request should be submitted to Delta prior to approval if deviation fromthis specification is required.3.Please exercise caution when handling fans. Damage may be caused when pressure isapplied to the impeller, if the fans are handled by the lead wires, or if the fan washard-dropped to the production floor.4.Except as pertains to some special designs, there is no guarantee that the products willbe free from any such safety problems or failures as caused by the introduction ofpowder, droplets of water or encroachment of insect into the hub.5.The above-mentioned conditions are representative of some unique examples and viewedas the first point of reference prior to all other information.6.I t is very important to establish the correct polarity before connecting the fan to thepower source. Positive (+) and Negative (-). Damage may be caused to the fans ifconnection is with reverse polarity, if there is no foolproof method to protect againstsuch error specifically mentioned in this spec.7.Delta fans without special protection are not suitable where any corrosive fluids areintroduced to their environment.8.Please ensure all fans are stored according to the storage temperature limits specified.Do not store fans in a high humidity environment. We highly recommend performance testing is conducted before shipping, if the fans have been stored over 6 months.9.Not all fans are provided with the Lock Rotor Protection feature. If you impair therotation of the impeller for the fans that do not have this function, the performanceof those fans will lead to failure.10. Please be cautious when mounting the fan. Incorrect mounting of fans may causeexcess resonance, vibration and subsequent noise.11.It is important to consider safety when testing the fans. A suitable fan guard should befitted to the fan to guard against any potential for personal injury.12.Except where specifically stated, all tests are carried out at room (ambient) temperature and relative humidity conditions of 25o C, 65% RH. The test value is only for fan performance itself.13.Be certain to connect an “ 4.7µF or greater” capacitor to the fan externally whenthe application calls for using multiple fans in parallel, to avoid any unstable power.Doc. No: FMBG-ES Form 001 Rev. 0001Date: June 24, 2009分销商库存信息: DELTA-PRODUCT-GROUPS GFC0412DS-DF00。
EV2011;中文规格书,Datasheet资料
ContentsSection Page No.Introduction1Functional Description1Contents2EV2011 Connections2EV2011 Configuration2Installing the User Interface Program3Using the EV2011 Program3Main Menu3Output Control Screen4Monitor Screen4Display Program Screen6Data Logging7Measure V OS Screen8Appendix A:AP11 User's Guide9Appendix B:Troubleshooting10Appendix C:EV2011 Schematic11 IntroductionThe bq2011Gas Gauge IC provides battery capacity monitoring in a single16-pin SOIC or DIP package.The EV2011Evaluation Board provides a useful means to test bq2011functionality and easily interface with the de-vice over the RS-232port of a PC.The bq2011features:n Battery capacity monitoring functionsn LED display of available chargen DQ serial I/O port communications functions Functional DescriptionThe EV2011provides functional evaluation of the bq2011 IC on a PCB.The actual implementation of a bq2011-based design will be significantly smaller in size.See the bq2011data sheet(July1994C or later)for bq2011 specifications.Power SourceThe bq2011derives its V CC from either an external source or from the battery connected to the BAT+(J1) and BAT–(J2)terminal blocks.Refer to Table4in Us-ing the bq2010—A Tutorial for Gas Gauging for the proper size of R16as part of the V CC regulation.The EV2011Evaluation Board is shipped with a301KΩre-sistor for R16.Current PathThe bq2011uses a sense resistor(R15)on the negative terminal of the battery to measure charge and discharge of the battery.This resistor may be changed if necessary.The system load is connected between the BAT+(J1)and RET–(J2)terminal blocks(see the schematic in AppendixC).Parameter ProgrammingThe EV2011is programmed by the MODE and PFC pro-gramming pins.The programming pins determine:n Programmed full countn Scale factorn Display mode1EV2011Gas Gauge EvaluationBoard 12/96Rev.C BoardEV2011 ContentsEach package contains the following items:1EV2011 PC BoardThis includes the bq2011sample,current regulator, programming jumpers,battery divider resistors, and the PC serial port interface.1EV2011 DQ/RS-232 Cable1EV2011 (v2.0) User Interface Program Diskette This program runs on any AT-compatible computer equipped with a standard RS-232(COM1,COM2, COM3,or COM4)serial port,and provides the user with a complete menu-driven system to control, monitor,and log data from the EV2011Evaluation Board.The User Interface Program communicates with the bq2011over the DQ serial I/O port using the RS-232interface.Please check to make sure that all items are present and in good condition.If you have any problems,please con-tact your Benchmarq representative or call Benchmarq at214-407-0011.EV2011 ConnectionsThe connections for the EV2011are described below. Please refer to the attached schematic in conjunction with these descriptions.JP1–JP8Battery cell divider.JP1-JP6are usedto divide the battery voltage by5to10.JP7and JP8are user-definable,but areconfigured for11and12cells on thisboard.JP9V CC supply.This jumper is used to se-lect the V CC supply for the bq2011.WhenJP9is on B(near Q1),the supply is takenfrom the BAT+input and is regulated bythe bq2011and Q1.When JP9is on L(near D12),the V CC supply is provided byLBAT+.If V CC is supplied by LBAT+,itmust not exceed the specified V CC voltagerange in the bq2011data sheet.JP11PFC programming pins.This jumpercan be set low,high impedance,or high.Ifthe jumper is between the middle pin andlow,PFC is set low.If the jumper is re-moved,the PFC is high impedance,or Z.If the jumper is between the middle pinand high,PFC is set high.JP10MODE selection jumper.If the jumperis between the middle pin and V CC,thedisplay mode is relative.If the jumper isbetween the middle pin and MODE,thedisplay mode is absolute.If the jumper isremoved,no display is available.DSP Display input(DISP pin).DSP is con-nected in parallel with the push-buttonswitch S1provided on the EV2011board.An external switch configuration can bemade using DSP.When the EV2011isfloating and detects charging or dis-charging,the LED outputs are active toreflect the charge state.When the DISPinput is pulled low,the LEDs reflects thecharge state.EV2011 ConfigurationThe EV2011Evaluation Board may be used with or without the DQ/RS-232Interface Program.The Evalua-tion Board should first be configured before connecting the battery or the RS-232cable.Step1Connecting the power supplyThe EV2011can operate from power pro-vided by the battery being monitored orfrom LBAT+.Set the battery divider(JP1–JP8)to the correct number of bat-tery cells prior to connecting the battery.If the bq2011will be powered from thebattery,connect JP9to B.If the bq2011will be powered from an external supply,connect JP9to L.Important:Connectthe battery ONLY after setting JP1-JP8and JP9.Step3Connecting the RS-232cableConnect the cable provided to the serialport of any PC.Please ensure no mem-ory-resident programs use this serialport.Step4Connecting the loadThe external load is connected betweenBAT+and RET-(J2)on the EV2011.Asense resistor(R15)is in series with thenegative terminal of the battery.TheEV2011board is supplied with a0.005,1%3W resistor.Please ensure that thedischarge load does not exceed the V SRspecification for the bq2011.R15may bechanged to a different-value resistor.2Rev.C Board EV2011Installing the User Interface ProgramThe User Interface Program(named“EV2011”)runs on any PC-compatible computer.The program may be run from the disk provided,or it may be installed on any di-rectory on the computer's hard disk.To run the program from the hard disk,simply copy all the files from the disk supplied to the hard disk.All the files should re-side in the same directory.The User Interface Program installs a driver to control the DQ/RS-232interface.This driver asks which COM port is connected to the EV2011Evaluation board.If communication is not established with the EV2011 board,the Main Menu does not appear.Please refer to Appendix B(Troubleshooting)if the program does not establish communication with the EV2011.The EV2011uses the PC-AT real-time clock to provide the proper bit timing for serial communication with the bq2011.The modem control lines are used as the single-wire serial interface to the bq2011.Any TSR that uses the PC real-time clock affects the operation of the EV2011.For proper operation,the EV2011should not be operated from a DOS shell program.If the PC is a notebook or portable type,it may be config-ured to save battery power by adjusting the clocks ac-cording to the activity under way.Configure the notebook to run in“High Performance”mode for reliable communication between the EV2011and the PC.The EV2011UIP terminates if communication with the EV2011board is lost.Start the User Interface Program as follows:C>EV2011Using the EV2011 ProgramEV2011is a menu-driven program.Almost all of the functions and entries are made by positioning the high-lighted cursor on the function desired and pressing the ENTER key,or by typing a value and then pressing the ENTER key.Key functions are as follows:ARROWkeysUse the arrow keys to move the high-lighted cursor around the screen.ENTERkeyPress the ENTER key to select the valuecurrently being displayed for a parameter,or to perform a function selected by thehighlighted cursor.ESCAPEkeyPress the ESCAPE key to escape from anyfunction back to the main menu,or to es-cape from any parameter value screen backto the menu displaying that parameter.F3key Press the F3key to display a help file forthe selected function or parameter. Main MenuThe Main Menu appears after the EV2011program has started.If this menu does not appear,communication with the EV2011has not been established;please refer to Appendix B(Troubleshooting)if the EV2011does not display the Main Menu.The Main Menu shows six functions that may be activated;see e the cursor keys(arrow keys)to position the highlighted cursor over the function to be activated and press the ENTER key.For help,press the F3key,and a help note about the function appears.Press the ESCAPE key to exit from the EV2011program.3EV2011Rev.C BoardBenchmarq BQ2011Evaluation Board Main Menu(v2.0)<Initialize><Monitor><Output Control><Data Log><Display Program><Measure Vos>Please enter SR value B in Display Program for Proper OperationESC to exit program F3for HelpFigure 1. Main MenuThe Main Menu functions are as follows:<Initialize>Sends a reset command to the bq2011.<Output Control>Activates a screen from which the LEDs can be controlled.<Monitor>Activates a screen from which the bq2011activity is monitored on a real-time basis. <Data Log>Allows entering a file name to whichbq2011data will be logged,and the log-ging period in seconds.When the log isactivated,the display changes to theMonitor screen with a top display of:Logging Record:xx<Display Program>Activates a screen showing the current program settings for the bq2011.<Measure V OS>This allows the user to determine the ap-parent offset voltage of the bq2011under test.A minimum of2minutes is required to complete the V OS measurement,which has a resolution of±0.15mV per2minutes.Output Control ScreenThis screen controls the bq2011LEDs;see Figure2. Press the space bar to toggle the LED OFF and ON. Pressing the push-button switch activates the display. The bq2011LED output returns to normal on exiting this screen.Monitor ScreenThis screen monitors real-time changes of the bq2011; see Figure 3.The program continually updates the monitor screen.As conditions change,the new values are displayed.Time Time of day in HH:MM:DD,24-hour nota-tion.Empty/Full This indicates the current value for GG inthe TMPGG register of the bq2011.Thecapacity value is giventh steps.Date Current date in MM/DD/YY notation.NAC NAC register values multiplied by thescale value and divided by the sense re-sistor value to give mAH.LMD Last Measured Discharge expressed interms of mAH.This is the8-bit LMD reg-ister value multiplied by the scale valuetimes256and divided by the sense resis-tor to give mAH.Sense Resis-tor ValueThis is the sense resistor value from theProgramming menu.Average V SRCurrentThis is the average battery current.TimeRemainingDuring discharge only,this is the time re-maining at the average current(NAC/Avg.V SR current)DigitalFilter SettingThis is the value of the digital magnitudefilter.Temp Step This is a display of the active tempera-ture step,which ranges from0(for tem-peratures<-30°C)to12for temperatures>80°C).Activity This indicates the charging/dischargingactivity occurring with the battery.CHARGE is displayed if the battery ischarging,while DISCHARGING is dis-played if the battery is being discharged,or if it is idle(no charging taking place).OVERLOAD is displayed if the voltagedrop across the sense resistor exceeds the 4Rev.C BoardBenchmarq BQ2011Evaluation Board Output Control ScreenOutput PinsLED Display LED1:OFF/ON LED2:OFF/ONLED Display LED3:OFF/ON LED4:OFF/ONLED Display LED5:OFF/ONESC to main menuFigure 2. Output Control ScreenEV2011V SR1threshold.Please note that the ap-dependent,and may take some time after the application of a charging current or a discharge load depending on the PFC and scale selected,and the rate of charge or discharge being applied.VSR Step This is the value of the V SR current step as defined in the bq2011data sheet.GG StepThis is the lower four bits of the TMPGG register that correspond to the current NAC value relative to either the LMD or the original programmed full count (as determined by PROG 1-4).The GG step is reported as a step number from 0to 15,with step 0available capac-ity from 0to offull,and 15represent-ing available from full to full.Charge RateIndicates whether the present charge is TRICKLE or FAST depending on thestate of the charge rate (CR)bit in FLGS2.EDVThis is the state of the EDV flag.The EDV flag latches ON if V SB drops below the EDV threshold value.It remains latched until charging is detected,at which time it is cleared.Battery RemovedThis is the state of the battery removed flag.It is set (BRM =yes)if one of the conditions indicating battery removed oc-curs.This flag is reset when the battery is replaced.ValidDischargeThis is the state of the VDQ bit in FLGS1.VDQ =yes if the bq2011is charged until NAC =LMD.VDQ =no indi-cates the present discharge is not valid for LMD update.Full CountThis value is the contents of the Full Count register.This value times 16is the5EV2011Benchmarq BQ2011Evaluation Board Real-Time Monitor ScreenTime:99:99:99EMPTY ****_____FULL Date:99/99/99NAC:99999mAHLMD:99999mAHSense Resistor Value:XXX ΩAvg Vsr Current:±9999mATime remaining:9999min.Digital Filter Setting:+0.50mV=Vsrd -0.40mV=Vsrq Temp Step:XX Activity:XXXXX Vsr Current Step:XX GG Step:XX Charge Rate:XXXX First EDV:XXX Batt.Rem'vd:XXX Valid Discharge:XXXFull Count:XXXBatt.Repl'd:XXXCapacity Inaccurate:XXX Capacity Inaccurate Count:XXXFLGS1:XX X X X _X _FLGS2:X X X X___X C B B C V N E N C D D D N N N O H R R I D /D /R R R R ///V G PM Q U VU210U U U L S1DESC to main menu F1to modify NAC F2to modify LMDFigure 3. Real-Time Monitor ScreenRev.C Boardnumber of times that NAC has counted up to LMD after a valid discharge.Battery Replaced This is the state of the battery replaced flag.It is set(BRP=yes)if the battery valid condition returns after setting the battery removed flag.The battery re-placed flag is cleared if the battery is dis-charged to the EDV1level or if it is charged to NAC=LMD.This flag is set after a EV2011initialization.Capacity Inaccurate This is the state of the capacity inaccu-rate bit in FLGS1.It is set(CI=yes)to indicate that the battery capacity has not been updated during the last64charge cycles.Capacity Inaccurate Count This is the number of charge cycles be-tween an LMD update.This counter is reset to zero when NAC=LMD after a valid LMD update.FLGS1This indicates the present state of theFLGS1resistor.FLGS2This indicates the present state of theFLGS2resistor.Modifying NAC and LMDIt is possible to change the values of the NAC and LMD parameters from the screen using the F1and F2func-tion keys as follows.Changing NAC(F1)1)Press the F1 key.The NAC field is highlighted.2)Enter the value in mAH and press the ENTERkey to store the value.Note:Changing NAC disqualifies a subsequent LMD update.Changing LMD(F2)1)Press the F2 key.The LMD field is highlighted.2)Enter the value in mAH and press the ENTERkey to store the value.Display Program ScreenThis menu is accessed by selecting the<Display Pro-gram>function on the Main Menu.The Display Pro-gram Screen represents the state of the bq2011 programming pins;see Figure4.To change the bq2011 programming,reconfigure jumpers MODE and PFC and 6Rev.C BoardBenchmarq BQ2011Programming ScreenSense Resistor:0.005ΩScale Factor:1/80Display Full:RELATIVE PFC Count:XXXXPFC(mVH):XXXX mVHSelf-Discharge Battery Capacity:9999mAHRate:1/64NAC/dayProgramming Pin ConfigurationLED Drive***PFC***ESC to main menu F3for HelpFigure 4. Programming MenuEV2011initialize the bq2011.The reset allows the bq2011to read the program pins.Sense Resistor Enter the value of sense resistor in ohms. Typical values range from0.001to 0.005Ω.The sense resistor value is used by the EV2011UIP to develop meaningful infor-mation in terms of A,mA,and mAH in re-lation to battery capacity and current. The default value is0.005.Values from 0.001to0.256are saved in the battery ID RAM byte of the bq2011.Values greater than0.256must be re-entered each time EV2011is started.Scale Factor Select the scale factor from the available scales using JP11.Like the sense resistor,the scale factor is used to develop meaningful information for the programmed full count tables,battery full,and available capacity indications.Display Full Use JP10to choose between RELATIVE and ABSOLUTE full reference for the LED display.PFC Select the programmed full count usingJP11.Note that the selected PFC and thesense resistor value are used to determinethe initial battery full capacity(mAh)rep-resented by the PFC.Battery Capacity This display indicates the battery capac-ity represented by dividing the PFC by the sense resistor.In practice,picking a PFC and sense resistor that provide a battery full value slightly lower than (within5%)the rated battery capacity is recommended.Program-ming Pin Configura-tion This indicates the display mode as either LED DRIVE by MODE or V CC.The PFC pin state is shown as L,Z,H.Please refer to the bq2011data sheet for more infor-mation.Data LoggingThe data log is activated from the Main Menu by select-ing the Data Log function.A filename to be used and the log sample period must be entered.For example: Log Data to Filename:<filename.ext>Enter Sample Period(10sec or greater):<xx>Opening Data Log FileWhen the data log is started,the Monitor Screen dis-plays the number of the current log record between thetime and date fields at the top of the screen.To termi-nate the data log,press the ESCAPE key.The file is closed and data logging is terminated.The data log record contains fields of ASCII data sepa-rated by tab characters.The field names and descrip-tions in record order follow.TIME Time record written in secondsLMD LMD value in mAHNAC NAC value in mAHAvg.DischargeCurrentAverage V SR battery currentFLAGS1Binary setting of FLAGS1flags:Bit Meaning0Not used1EDV flag state2Not used3VDQ (valid discharge)4Capacity inaccurate5Battery removed flag state6Battery replaced flag state7Charge active flag stateFLAGS2Binary setting of FLAGS2flags:Bit Meaning0Overload flag state1–3Not used4–6Discharge rate7Charge rateThe log records should be readable by most spreadsheet programs.7EV2011Rev.C BoardMeasure V OS ScreenThis screen is used to measure the V OS of the bq2011; see Figure5.A minimum of120seconds are required to perform this test.Pressing the ESC key terminates thetest in progress.Operating the test for a longer period increases the resolution of the test.A“beep”signals test completion.8Benchmarq EV2011Evaluation Board VO SMeasurementPresent DMF Setting+0.50mV=Vsrd-0.40mV=VsrqCurrent Threshold(DMF(mv)/Rsns):XXXXmADo you want to test Vos?:Y/NCalculated Vos:Vos XXXmV,over last xxxx secondsElapsed time:XXXX seconds**Note:There must be no charge/discharge activity on the bq2011for this testto be valid.Running the test for a longer period of time increasesthe Vos measurement resolution.This test requires a minimumof2minutes before any value is displayed.ESC to main menuFigure 5. VOS Measurement ScreenEV2011Rev.C BoardAppendix A:AP11 User's GuideThe AP11utility(AP11.EXE)is used to communicate with the bq2011on a register basis.AP11uses a driver to communicate with the EV2011over serial port on a PC-AT personal computer.AP11The AP11utility is started by executing AP11.EXE.After AP11is started,the following prompt is displayed: Select COM Port<1234>CommandsThe user can respond with various commands at the prompt.Pressing“Q”causes the program to terminate.–>?Pressing the?key displays following menu:These commands may be used to send or receive data from the EV2011.–>AIf A is entered in response to–>,then a break bit is sent to the EV2011.This may be used to restart the commu-nication if a problem appears.If the prompt does not re-turn immediately,then proper communication has not been established;please refer to Appendix B for trouble-shooting procedures.–>R#If R#is entered in response to–>,where#is an applica-ble address in HEX format,AP11returns the value at that location from the EV2011.The addresses are de-fined in the bq2011data sheet.For example:–>R03causes the display to show:R03=##where##is the current NAC value in HEX format.Address00is used to read and display all readable reg-isters.–>S#If S#is entered in response to–>,where#is a valid bq2011address in HEX format,AP11continuously reads and displays the value at that location.The ad-dressed are defined in the bq2011data sheet.For exam-ple:–>S03causes the display to show:Address3=##after XXX.XX sec.where##is the value at location03and XXX.XX isthe number of seconds between changes in thisvalue.–>W#=**If W#=**is entered in response to–>,where#is an ap-plicable address in HEX format and**is the value to be written,AP11writes the value to that location.The ad-dresses are defined in the bq2011data sheet.For exam-ple:–>W05=A0causes the program to write A0in location05hex(LMD register).9EV2011Rev.C BoardThe following commands are available:?This display is shown.A Send break.Q Quit and return to DOS.R#Read at address#.S#Scan at address#.W#=**Write at address#value**.Appendix B:Troubleshooting If the EV2011Main Menu does not appear after starting EV2011,then communication to the bq2011has not been established.Please check the following:1.Confirm the proper serial port is being used.2.Confirm the battery divider is properly set for thenumber of cells in the battery pack.3.Confirm JP9is properly set for either an externalsupply through LBAT+(J1)or the microregulator.JP9on B enables the microregulator,while JP9on L enables LBAT+.If the battery divider on JP1–JP8is not set properly,the bq2011will not op-erate,and the EV2011UIP or AP11will not work.4.Confirm the battery is attached between BAT+andBAT–(J1and J2).5.Push S1.SEG1LED should be on indicating thatthe bq2011is properly powered.6.If the LED is not on,check the battery voltage onpin16of the bq2011to determine if it is above3Vbut below6.5V.7.If the LED is on,and the EV2011Main Menu stilldoes not appear,try using AP11to establish com-munication.Appendix A describes AP11.8.If communication cannot be established usingAP11,the problem is either the RS-232port in thePC or the EV2011interface section.Please contactBenchmarq if the interface section is not workingproperly on the EV2011board.10Rev.C Board EV2011分销商库存信息: TIEV2011。
MAC4DLMT4G;MAC4DLM-1G;MAC4DLM-001;中文规格书,Datasheet资料
MAC4DLMSensitive Gate TriacsSilicon Bidirectional ThyristorsDesigned for high volume, low cost, industrial and consumer applications such as motor control; process control; temperature, light and speed control.Features•Small Size Surface Mount DPAK Package •Passivated Die for Reliability and Uniformity•Four−Quadrant Triggering•Blocking V oltage to 600 V•On−State Current Rating of 4.0 Amperes RMS at 93°C •Low Level Triggering and Holding Characteristics •Epoxy Meets UL 94 V−0 @ 0.125 in•ESD Ratings:Human Body Model, 3B u 8000 VMachine Model, C u 400 V•Pb−Free Packages are AvailableMAXIMUM RATINGS (T J = 25°C unless otherwise noted)Rating Symbol Value UnitPeak Repetitive Off−State Voltage (Note 1) (T J = −40 to 110°C, Sine Wave,50 to 60 Hz, Gate Open)V DRM,V RRM600VOn−State RMS Current(Full Cycle Sine Wave, 60 Hz, TC = 93°C)I T(RMS) 4.0APeak Non-Repetitive Surge Current(One Full Cycle, 60 Hz, T J = 110°C)I TSM40A Circuit Fusing Consideration (t = 8.3 msec)I2t 6.6A2secPeak Gate Power(Pulse Width ≤ 10 m sec, T C= 93°C)P GM 2.0WAverage Gate Power(t = 8.3 msec, T C = 93°C)P G(AV) 1.0W Peak Gate Current(Pulse Width ≤ 20m sec, T C = 93°C)I GM 4.0APeak Gate Voltage(Pulse Width ≤ 20m sec, T C = 93°C)V GM 5.0V Operating Junction Temperature Range TJ−40 to 110°C Storage Temperature Range T stg−40 to 150°C Stresses exceeding Maximum Ratings may damage the device. MaximumRatings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.1.V DRM and V RRM for all types can be applied on a continuous basis. Blockingvoltages shall not be tested with a constant current source such that the voltage ratings of the device are exceeded.TRIACS4.0 AMPERES RMS600 VOLTSPIN ASSIGNMENT123GateMain Terminal 1Main Terminal 24Main Terminal 2MT1MT2See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.ORDERING INFORMATIONDPAK−3CASE 369DSTYLE 6DPAKCASE 369CSTYLE 6MARKINGDIAGRAMSY= YearWW= Work WeekAC4DLM= Device CodeG=Pb−Free PackageYWWAC4DLMGTHERMAL CHARACTERISTICSCharacteristic Symbol Max UnitThermal Resistance− Junction−to−Case− Junction−to−Ambient− Junction−to−Ambient (Note 2)R q JCR q JAR q JA3.58880°C/WMaximum Lead Temperature for Soldering Purposes (Note 3)T L260°C ELECTRICAL CHARACTERISTICS (T J = 25°C unless otherwise noted; Electricals apply in both directions)Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICSPeak Repetitive Blocking Current(V D = Rated V DRM, V RRM; Gate Open)T J = 25°CT J = 110°C I DRM,I RRM−−−−0.012.0mAON CHARACTERISTICSPeak On−State Voltage (Note 4) − (I TM = ± 6.0 A)V TM− 1.3 1.6VGate Trigger Current (Continuous dc) (V D = 12 V, R L = 100 W) MT2(+), G(+)MT2(+), G(−)MT2(−), G(−)MT2(−), G(+)I GT−−−−1.82.12.44.23.03.03.05.0mAGate Trigger Voltage (Continuous dc) (V D = 12 V, R L = 100 W) MT2(+), G(+)MT2(+), G(−)MT2(−), G(−)MT2(−), G(+)V GT0.50.50.50.50.620.570.650.741.31.31.31.3VGate Non−Trigger Voltage(V D = 12 V, R L = 100 W, T J = 110°C)MT2(+), G(+); MT2(+), G(−); MT2(−), G(−); MT2(−), G(+)V GD0.10.4−VHolding Current(V D = 12 V, Gate Open, Initiating Current = ± 200 mA)I H− 1.515mALatching CurrentMT2(+), G(+)(V D = 12 V, I G = 5.0 mA) MT2(+), G(−)(V D = 12 V, I G = 5.0 mA) MT2(−), G(−)(V D = 12 V, I G = 5.0 mA) MT2(−), G(+)(V D = 12 V, I G = 10 mA)I L−−−−1.755.22.12.210101010mADYNAMIC CHARACTERISTICSRate of Change of Commutating Current(V D = 200 V, I TM = 1.8 A, Commutating dv/dt = 1.0 V/m sec,T J = 110°C, f = 250 Hz, CL = 5.0 m fd, LL = 80 mH, RS = 56 W, CS = 0.03 m fd) With snubber see Figure 11di/dt(c)− 3.0−A/msCritical Rate of Rise of Off−State Voltage(V D = 0.67 X Rated V DRM, Exponential Waveform, Gate Open, T J = 110°C)dv/dt10−−V/m s2.These ratings are applicable when surface mounted on the minimum pad sizes recommended.3.1/8″ from case for 10 seconds.4.Pulse Test: Pulse Width ≤ 2.0 msec, Duty Cycle ≤ 2%.ORDERING INFORMATIONDevice Package Type Package Shipping†MAC4DLM−001DPAK−3369D75 Units / RailMAC4DLM−001G DPAK−3(Pb−Free)369D75 Units / RailMAC4DLMT4DPAK369C2500 / Tape & ReelMAC4DLMT4G DPAK(Pb−Free)369C2500 / Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.+ CurrentSymbolParameterV DRM Peak Repetitive Forward Off −State Voltage I DRM Peak Forward Blocking CurrentV RRM Peak Repetitive Reverse Off −State Voltage I RRM Peak Reverse Blocking Current Voltage Current Characteristic of Triacs(Bidirectional Device)V TM Maximum On −State Voltage I HHolding CurrentQuadrant Definitions for a TriacAll polarities are referenced to MT1.With in −phase signals (using standard AC lines) quadrants I and III are used.Figure 1. RMS Current Derating Figure 2. On −State Power DissipationFigure 3. On −State Characteristics Figure 4. Transient Thermal ResponseFigure 5. Typical Gate Trigger Current versusJunction Temperature Figure 6. Typical Gate Trigger Voltage versusJunction Temperature2.54.0I T(RMS), RMS ON-STATE CURRENT (AMPS)110105100I T(RMS), RMS ON-STATE CURRENT (AMPS)4.02.01.004.0V T , INSTANTANEOUS ON-STATE VOLTAGE (VOLTS)100101.00.1t, TIME (ms)1.00.11.00.10.013.5-2520-40T J , JUNCTION TEMPERATURE (°C)8.03.02.00T J , JUNCTION TEMPERATURE (°C)-2565-400.80.60.2205.0T C , M A X I M U M A L L O W A B L E C A S E T E M P E R A T U R E ( C )P I r (t ), T R A N S I E N T R E S I S T A N C E (N O R M A L I Z E D )95900.51.01.52.03.03.53.05.06.01.00.53.010100100010 K, G A T E T R I G G E R C U R R E N T (m A )I G T 50110654.05.011035500.4V G T , G A T E T R I G G E R V O L T A G E (V O L T S )°, A V E R A G E P O W E R D I S S I P A T I O N (W A T T S )(A V ), I N S T A N T A N E O U S O N -S T A T E C U R R E N T (A M P S )T 805.0Q3Q2Q11.0 1.02.52.01.5-1035956.07.0Q4-109580Figure 7. Typical Holding Current versusJunction TemperatureFigure 8. Typical Latching Current versusJunction TemperatureFigure 9. Minimum Exponential Static dv/dtversus Gate −MT1 Resistance 65110-40T J , JUNCTION TEMPERATURE (°C)2.0T J , JUNCTION TEMPERATURE (°C)4.02.00100010 K100R GK , GATE-MT1 RESISTANCE (OHMS)4015105.0I H , H O L D I N G C U R R E N T (m A )I S T A T I C d v /d t (V / s )1.00-255.02050958.01012, L A T C H I N G C U R R E N T (m A )L 4.03.05.0m 6.0-103580Figure 10. Critical Rate of Rise ofCommutating Voltage1.0di/dt(c), RATE OF CHANGE OF COMMUTATING CURRENT (A/ms)101.00.1C O M MU T A T I N G V O L T A G E (V / s )m 2.03.0d v /d t (c ), C R I T I C A L R A T E O F R I S E O F 4.05.06.020253035Figure 11. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Current (di/dt)c200 VI TM Note: Component values are for verification of rated (di/dt)c . See AN1048 for additional information.DPAK CASE 369C ISSUE OVSUDIM MIN MAX MIN MAXMILLIMETERSINCHESA0.2350.245 5.97 6.22B0.2500.265 6.35 6.73C0.0860.094 2.19 2.38D0.0270.0350.690.88E0.0180.0230.460.58F0.0370.0450.94 1.14G0.180 BSC 4.58 BSCH0.0340.0400.87 1.01J0.0180.0230.460.58K0.1020.114 2.60 2.89L0.090 BSC 2.29 BSCR0.1800.215 4.57 5.45S0.0250.0400.63 1.01U0.020−−−0.51−−−V0.0350.0500.89 1.27Z0.155−−− 3.93−−−NOTES:1.DIMENSIONING AND TOLERANCINGPER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: INCH.ǒmminchesǓSCALE 3:1STYLE 6:PIN 1.MT12.MT23.GATE4.MT2*For additional information on our Pb−Free strategy and solderingdetails, please download the ON Semiconductor Soldering andMounting Techniques Reference Manual, SOLDERRM/D.SOLDERING FOOTPRINT*DPAK −3CASE 369D −01ISSUE BEDIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.2350.245 5.97 6.35B 0.2500.265 6.35 6.73C 0.0860.094 2.19 2.38D 0.0270.0350.690.88E 0.0180.0230.460.58F 0.0370.0450.94 1.14G 0.090 BSC 2.29 BSC H 0.0340.0400.87 1.01J 0.0180.0230.460.58K 0.3500.3808.899.65R 0.1800.215 4.45 5.45S 0.0250.0400.63 1.01V 0.0350.0500.89 1.27NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: INCH.Z0.155−−−3.93−−−STYLE 6:PIN 1.MT12.MT23.GATE 4.MT2ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION分销商库存信息:ONSEMIMAC4DLMT4G MAC4DLM-1G MAC4DLM-001。
PUMH20,115;中文规格书,Datasheet资料
1.Product profile1.1General descriptionNPN/NPN resistor-equipped transistors.1.2FeaturesBuilt-in bias resistors Simplifies circuit design Reduces component countReduces pick and place costs1.3ApplicationsLow current peripheral driver Control of IC inputsReplaces general-purpose transistors in digital applications1.4Quick reference dataPEMH20; PUMH20NPN/NPN resistor-equipped transistors; R1 = 2.2 k Ω, R2 = 2.2 k ΩRev. 04 — 15 November 2009Product data sheetTable 1.Product overviewType number Package NPN/PNP complement PNP/PNP complement NXPJEITA PEMH20SOT666-PEMD20PEMB20PUMH20SOT363SC-88PUMD20PUMB20Table 2.Quick reference data Symbol ParameterConditions Min Typ Max Unit V CEO collector-emitter voltage open base--50V I O output current (DC)--100mA R1bias resistor 1 (input) 1.54 2.2 2.86k ΩR2/R1bias resistor ratio0.811.22.Pinning information3.Ordering information4.Marking[1]* = -: made in Hong Kong * = p: made in Hong Kong * = t: made in Malaysia * = W: made in ChinaTable 3.PinningPin Description Simplified outlineSymbol1GND (emitter) TR12input (base) TR13output (collector) TR24GND (emitter) TR25input (base) TR26output (collector) TR1001aab555645132sym063Table 4.Ordering informationType number Package NameDescriptionVersion PEMH20-plastic surface mounted package; 6 leads SOT666PUMH20SC-88plastic surface mounted package; 6 leadsSOT363Table 5.Marking codesType numberMarking code [1]PEMH206K PUMH20H7*5.Limiting valuesTable 6.Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).Symbol Parameter Conditions Min Max UnitPer transistorV CBO collector-base voltage open emitter-50VV CEO collector-emitter voltage open base-50VV EBO emitter-base voltage open collector-10VV I input voltagepositive-+12Vnegative-−10VI O output current (DC)-100mAI CM peak collector current-100mAP tot total power dissipation T amb≤ 25 °CSOT363[1]-200mWSOT666[1][2]-200mW T stg storage temperature−65+150°CT j junction temperature-150°CT amb ambient temperature−65+150°CPer deviceP tot total power dissipation T amb≤ 25 °CSOT363[1]-300mWSOT666[1][2]-300mW[1]Device mounted on a FR4 printed-circuit board, single-sided copper, tin-plated and standard footprint.[2]Reflow soldering is the only recommended soldering method.6.Thermal characteristics[1]Device mounted on a FR4 printed-circuit board, single-sided copper, tin-plated and standard footprint.[2]Reflow soldering is the only recommended soldering method.7.CharacteristicsTable 7.Thermal characteristics Symbol ParameterConditionsMinTypMaxUnitPer transistorR th(j-a)thermal resistance from junction to ambient in free air SOT363[1]--625K/W SOT666[1][2]--625K/WPer device R th(j-a)thermal resistance from junction to ambient in free air SOT363[1]--416K/W SOT666[1][2]--416K/WTable 8.CharacteristicsT amb = 25 °C unless otherwise specified.Symbol ParameterConditions Min Typ Max Unit Per transistorI CBO collector-base cut-off currentV CB = 50 V; I E = 0 A --100nA I CEOcollector-emitter cut-off current V CE = 30 V; I B = 0 A --1μA V CE = 30 V; I B = 0 A; T j =150°C --50μA I EBO emitter-base cut-off current V EB = 5 V; I C = 0 A --2mAh FE DC current gain V CE = 5 V; I C = 20 mA 30--V CEsat collector-emitter saturation voltage I C = 10 mA; I B = 0.5 mA --150mV V I(off)off-state input voltage V CE = 5 V; I C = 1 mA - 1.20.5V V I(on)on-state input voltage V CE = 0.3 V; I C = 20 mA2 1.6-V R1bias resistor1 (input) 1.54 2.2 2.86k ΩR2/R1bias resistor ratio 0.81 1.2C ccollector capacitanceV CB = 10 V; I E = i e = 0 A; f =1MHz -- 2.5pF8.Package outline9.Packing informationTable 9.Packing methodsThe indicated -xxx are the last three digits of the 12NC ordering code.[1]Type number Package Description Packing quantity30004000800010000 PEMH20SOT666 2 mm pitch, 8 mm tape and reel---315-4 mm pitch, 8 mm tape and reel--115--PUMH20SOT363 4 mm pitch, 8 mm tape and reel; T1[2]-115---1354 mm pitch, 8 mm tape and reel; T2[3]-125---165[1]For further information and the availability of packing methods, see Section12.[2]T1: normal taping[3]T2: reverse taping10.Revision historyTable 10.Revision historyDocument ID Release date Data sheet status Change notice SupersedesPEMH20_PUMH20_420091115Product data sheet-PEMH20_PUMH20_3 Modifications:•This data sheet was changed to reflect the new company name NXP Semiconductors,including new legal definitions and disclaimers. No changes were made to the technicalcontent.•Figure 5 “Package outline SOT363 (SC-88)”: updatedPEMH20_PUMH20_320050214Product data sheet-PUMH20_2PUMH20_220040414Product specification-PUMH20_1PUMH20_120031016Product specification--11.Legal information11.1Data sheet status[1]Please consult the most recently issued document before initiating or completing a design. [2]The term ‘short data sheet’ is explained in section “Definitions”.[3]The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL .11.2DefinitionsDraft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness ofinformation included herein and shall have no liability for the consequences of use of such information.Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.11.3DisclaimersGeneral — Information in this document is believed to be accurate andreliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including withoutlimitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure ormalfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmentaldamage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in theCharacteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability.Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at /profile/terms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unlessexplicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.Quick reference data — The Quick reference data is an extract of theproduct data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.11.4TrademarksNotice: All referenced brands, product names, service names and trademarks are the property of their respective owners.12.Contact informationFor more information, please visit: For sales office addresses, please send an email to: salesaddresses@Document status [1][2]Product status [3]DefinitionObjective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheetProductionThis document contains the product specification.13.Contents1Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . 11.1General description . . . . . . . . . . . . . . . . . . . . . 11.2Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.3Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.4Quick reference data . . . . . . . . . . . . . . . . . . . . 12Pinning information. . . . . . . . . . . . . . . . . . . . . . 23Ordering information. . . . . . . . . . . . . . . . . . . . . 24Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 36Thermal characteristics . . . . . . . . . . . . . . . . . . 47Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 48Package outline. . . . . . . . . . . . . . . . . . . . . . . . . 69Packing information . . . . . . . . . . . . . . . . . . . . . 610Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 711Legal information. . . . . . . . . . . . . . . . . . . . . . . . 811.1Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 811.2Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 811.3Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 811.4Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 812Contact information. . . . . . . . . . . . . . . . . . . . . . 813Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Please be aware that important notices concerning this document and the product(s)described herein, have been included in section ‘Legal information’.© NXP B.V.2009.All rights reserved.For more information, please visit: For sales office addresses, please send an email to: salesaddresses@分销商库存信息: NXPPUMH20,115。
PMEG3010EP,115;中文规格书,Datasheet资料
103 Zth(j-a) (K/W)
102
10
1
duty cycle =
1 0.75
0.5 0.33
0.25 0.2
0.1 0.05
0.02 0.01
0
006aab298
10−1
10−3
10−2
10−1
1
10
102
103
tp (s)
Ceramic PCB, Al2O3, standard footprint Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
1 A low VF MEGA Schottky barrier rectifier
2. Pinning information
Table 2. Pin 1 2
Pinning Description cathode anode
[1] The marking bar indicates the cathode.
square wave; δ = 0.5; f = 20 kHz
Tamb ≤ 130 °C [1] -
-
1
Tsp ≤ 145 °C
-
-
1
VR
reverse voltage
-
-
30
VF
forward voltage
IR
reverse current
IF = 1 A VR = 30 V
-
320 360
-
total power dissipation
RP10-1205SE;RP10-1212SE;RP10-1215SE;RP10-123.3SE;RP10-2405SE;中文规格书,Datasheet资料
Input Range VDC 9-18 9-18 9-18 18-36 18-36 18-36 36-75 36-75 36-75 9-18 9-18 9-18 18-36 18-36 18-36 36-75 36-75 36-75
Output Voltage
VDC 5 12 15 5 12 15 5 12 15 ±5
REV:1/2010
P-11
/
POWERLINE
DC/DC-Converter
RP10-S_DE Series
Specifications (typical at nominal input and 25°C unless otherwise noted)
Ambient Temperature Range (°C)
85
RP10-2405SE_DE/M1 With Heat Sink
125
100
75
Natural Convection 50
25
0 -40 -25 -10 0 50 60 70 80 90 100
Ambient Temperature Range (°C)
REV: 1/2010
Please Read Application Notes
POWERLINE
DC/DC-Converter
Derating Graph (Ambient Temperature)
RP10-S_DE Series
RP10-E
Output Power (%)
125
100
75 Natural Convection
50
25
0 -25 -10 0 50 60 70 80 90 100 Ambient Temperature Range (°C) 83
FGH40N60UFDTU;中文规格书,Datasheet资料
©2009 Fairchild Semiconductor Corporation
1
FGH40N60UFD Rev. C1
C
G
E
Ratings 600 ± 20 80 40 120 40 20 80 290 116
-55 to +150 -55 to +150
300
Units V V A A A A A A
W W oC oC
oC
Typ.
-
Max.
0.43 1.45 40
Units
oC/W oC/W oC/W
/
FGH40N60UFD 600V, 40A Field Stop IGBT
Package Marking and Ordering Information
TC = 25oC TC = 125oC TC = 25oC TC = 125oC
Min.
-
Typ.
1.95 1.85 45 140 75 375
Max
2.6 -
Units
V ns nC
FGH40N60UFD Rev. C1
3
/
Symbol
Parameter
Test Conditions
VFM
Diode Forward Voltage
IF = 20A
TC = 25oC TC = 125oC
trr Qrr
Diode Reverse Recovery Time
IES =20A, dIES/dt = 200A/µs Diode Reverse Recovery Charge
FGH40N60UFD 600V, 40A Field Stop IGBT
EVAL-ADUSB2EBUZ;中文规格书,Datasheet资料
AN-1006APPLICATION NOTE One Technology Way•P.O.Box9106•Norwood,MA02062-9106,U.S.A.•Tel:781.329.4700•Fax:781.461.3113•Using the EVAL-ADUSB2EBZby Brett GildersleeveINTRODUCTIONThe EV AL-ADUSB2EBZ features USB-to-I2C and SPI conversion. It is compatible with 1.8 V and 3.3 V target devices and allows for SigmaStudio™ integration for most SigmaDSP® processors. Its on-board power regulators are capable of supplying the target board, and it features a standard Aardvark-compatible programming header. The EV AL-UDSUB2EBZ provides SPI control of up to five slave devices with a low profile surface-mount USB miniature Type B connector, and it allows for plug-and-play operation.The EV AL-ADUSB2EBZ is ideal for downloading codeand register settings to SigmaDSP processors and codecswith SigmaStudio. It can also be used for real-time tuningof SigmaDSP production units with SigmaStudio. GENERAL DESCRIPTIONThe EV AL-ADUSB2EBZ, also known as the USBi, is a standalone communications interface and programmer for SigmaDSPsystems. It translates USB control commands from SigmaStudio to the I2C and SPI communications protocols. The USBi is powered over the USB cable; therefore, no external power supply is required. The ribbon cable and 10-pin header form a bridge to the target board to connect the communications signals to the target IC. The ribbon cable also carries 5 V power from the USB hub, which can be used to power the target board if desired.The on-board regulators enable both 1.8 V and 3.3 V IOVDD operation, allowing for increased compatibility with target devices.Up to five slave devices can be controlled by the USBi simulta-neously. To control multiple SPI devices, additional latch signals are provided, although they are not connected to the ribbon cable.The USBi can be used to control SigmaDSP systems in real time via SigmaStudio, and is capable of programming an EEPROM in self-boot systems. It is an ideal solution for in-circuit program-ming and tuning of prototype systems.The USBi only supports USB 2.0 interfaces; the USBi will not work with PCs that only support USB Version 1.0 and USB Version 1.1.FUNCTIONAL BLOCK DIAGRAMFigure 1.AN-1006 Application Note TABLE OF CONTENTSIntroduction (1)General Description (1)Functional Block Diagram (1)Using the USB Interface with SigmaStudio (3)Installing the Drivers (3)Adding the USBi to a SigmaStudio Project (4)Configuring the USBi to Communicate with an IC (4)Configuring the USBi to Communicate with Multiple ICs (4)Controlling the USBi (5)Monitoring the USBi (6)Using the USBi to Program a Self-Boot EEPROM (6)Warning (6)Circuit Schematics (7)USB Connector (7)Power Regulator (7)Cypress USB Interface (8)Crystal Oscillator Schematic (8)LEDs (9)EEPROM (9)Target Board Power Switch (9)Target Board Programming Header (9)Evaluation Board Schematics and Artwork (10)Schematics (10)Board Layout (12)Bill of Materials (13)REVISION HISTORY4/10—Rev. 0 to Rev. AChanges to General Description Section (1)Added Warning Section (6)5/09—Revision 0: Initial VersionApplication NoteAN-1006USING THE USB INTERFACE WITH SIGMASTUDIOINSTALLING THE DRIVERSSigmaStudio must be installed to use the USBi. OnceSigmaStudio has been properly installed, connect the USBi to an available USB port with the included USB cable. At this point, Windows® XP recognizes the device and prompts the user to install drivers.08093-002Figure 2. Found New Hardware NotificationSelect the Install from a list or specific location (Advanced) option and click Next >.08093-003Figure 3. Found New Hardware Wizard—InstallationClick Search for the best driver in these locations , then select Include this location in the search . Click Browse to find the SigmaStudio 3.0\USB drivers directory.08093-004Figure 4. Windows Found New Hardware Wizard—Search andInstallation OptionsWhen the warning about Windows Logo testing appears on the screen, click Continue Anyway .08093-005Figure 5. Windows Logo Testing WarningAN-1006Application NoteADDING THE USBi TO A SIGMASTUDIO PROJECTTo use the USBi in conjunction with SigmaStudio, first select it in the Communication Channels subsection of the toolbox in the Hardware Configuration tab, and add it to the project space.08093-006Figure 6. Adding the USBi Communication ChannelIf SigmaStudio cannot detect the USBi on the USB port of the computer, then the background of the USB label will be red. This may happen when the USBi is not connected or when the drivers are incorrectly installed.08093-007Figure 7. USBi Not Detected by SigmaStudioIf SigmaStudio detects the USBi on the USB port of the computer, the background of the USB label changes to orange.08093-008Figure 8. USBi Detected by SigmaStudioCONFIGURING THE USBi TO COMMUNICATE WITH AN ICTo use the USBi to communicate with the target IC, connect it by click-dragging a wire between the blue pin of the USBi and the green pin of the IC. The corresponding drop-down box of the USBi automatically fills with the default mode and channel for that IC.08093-009Figure 9. Connecting the USBi to an ICTo change the communication mode and channel, click the drop-down box and select the appropriate mode and channel from the list.08093-010Figure 10. Selecting the Communications Mode and ChannelCONFIGURING THE USBi TO COMMUNICATE WITH MULTIPLE ICSThe USBi can communicate with up to five ICs simultaneously. To communicate with more than one IC, add another IC to the project and connect it to the next available pin of the USBi.Multiple Address Operation with I2CThe USBi can support up to four identical devices on the same bus if the I 2C address pins of the target devices are indepen-dently set to four different addresses, matching the addresses in the drop-down box in the Hardware Configuration tab of SigmaStudio.08093-011Figure 11. Multiple Address Operation with I 2CApplication NoteAN-1006Multiple Address Operation with SPICombined Multiple Latch and Multiple Address Operation with SPIThe USBi can support up to two identical devices on the same SPI latch if the SPI address pins of the target devices are indepen-dently set to two different addresses, matching the addresses in the drop-down box in the Hardware Configuration tab ofSigmaStudio.A combination of multiple latch and multiple address schemes can be used, but the total number of devices cannot exceed five.CONTROLLING THE USBiThe USBi has several functions for controlling the target hardware. The control options are accessed in SigmaStudio by right-clicking on the USB Interface in the Hardware Configurationtab.08093-01208093-015Figure 15. USBi Control MenuFigure 12. Multiple Address Operation with SPICapture Output DataMultiple Latch Operation with SPIThis option accesses the Capture Window, which displays a log of all communication between the PC and the target IC (see Figure 1The USBi can support devices on five different SPI latches. When multiple latches are used, the additional SPI latch signals from the USBi that are not connected to the ribbon cable need to be manually wired to the target.7).Device Power On/OffThis option switches the line that supplies power to the target board. By default, the device power is on.08093-013Device Enable/DisableFor supported ICs, selecting this option switches the device to low power mode.Reset USB InterfaceThis function performs a software reset of the USB driver, and causes the Cypress USB microcontroller to reload its firmware.Figure 13. Multiple Latch Operation with SPIThe locations of extended SPI latch signals are shown in Figure 14.08093-014Figure 14. Extended SPI Latch Signal Pinout (Bottom View of Board)AN-1006Application NoteMONITORING THE USBiUsing the Capture Window , it is possible to view all outgoing communications transfers from the PC to the target IC. For each write, the write mode, time of write, cell name (if applica-ble), parameter name, address, value, data (in decimal and hexadecimal), and byte length are shown.For block writes where more than one memory location is written, only the first location is shown. The expand/collapse button in the leftmost column allows the user to view the full data write.USING THE USBi TO PROGRAM A SELF-BOOT EEPROMAfter compiling a project, the registers and RAM contents can be written to a target EEPROM for self-boot. To use this functionality, an EEPROM IC must be connected to the USBi in the Hardware Configuration window. After verifying that the EEPROM write protect pin is disabled on the target board, right-click the target IC (SigmaDSP), and select Write Latest Compilation to E2PROM .08093-017Figure 16. Writing to the Self-Boot EEPROMWARNINGThe USBi has an EEPROM on the I 2C bus at Address 0x51, which it uses to indicate its Vendor ID and Product ID to the PC, as well as boot its internal program. Y ou should avoid having any other EEPROMs in your system design at this address. This EEPROM is not write-protected; therefore, if you attempt to write to Address 0x51, you will overwrite the USBi's onboard EEPROM, and the USBi will cease to function. The USBi cannot bereprogrammed without returning the board to Analog Devices. Most EEPROMs are set to Address 0x51 by setting its pins A0 = 1 and A1 = A2 = 0.08093-016Figure 17. Output Capture WindowApplication NoteAN-1006CIRCUIT SCHEMATICSUSB CONNECTORThe connection between the host PC and the Cypress USB interface device is via a standard USB cable that carries D+ and D− signals for data communications, a 5 V power supply, and ground. The D+ and D− lines are a one-wire communication interface carried by half-duplex differential signals on a twisted pair. The clock is embedded in the data using the nonreturn-to-zero inverted (NRZI) line code. These signal lines connect directly to pins on the Cypress USB interface.A surface-mounted USB miniature Type B jack was selected for its low profile and increasing ubiquity in consumer electronics.J308093-018Figure 18. USB Connector SchematicPOWER REGULATORThe Cypress USB Interface I/O ports are capable of operating in both 1.8 V and 3.3 V modes, depending on the target device in the system. Two regulators, one for 5 V to 3.3 V regulation and the other for 5 V to 1.8 V regulation, run simultaneously when the board is powered. A switch (S1) is provided to easily switch the IOVDD supply between the two regulators. LED D4 provides visual feedback that the board is being supplied with 5 V power from the PC USB port.The position of switch S1 should not be changed when the board is connected to the USB bus.08093-019Figure 19. Power Regulator SchematicAN-1006Application NoteCYPRESS USB INTERFACEThe Cypress USB interface is the core of the system, including all of the necessary functionality to convert USB commands into corresponding I 2C or SPI read/write transfers, and acts as a FIFO to route data between the host PC and the target device.CRYSTAL OSCILLATOR SCHEMATICThe Cypress USB interface is its own clock master, and the board includes a crystal oscillator circuit with a 24 MHz piezoelectric crystal resonator to provide stability to the oscillator circuit. The crystal resonator is driven in parallel by the XTALOUT and XTALIN pins of the Cypress USB interface.112p F08093-021Figure 20. Crystal Oscillator Schematic08093-020Figure 21. Cypress USB Interface SchematicApplication NoteAN-1006LEDSThe LEDs provide feedback to the user about the status of the Cypress USB microcontroller.08093-022Figure 22. LEDs SchematicTable 1. LED FunctionsReferenceDesignator Color Functionality D1 Yellow I 2C mode is active D2 Blue GPIO LED, for firmware debug purposes D3 Yellow SPI mode is active D4 Red 5 V power being is supplied over the USB busEEPROMThe EEPROM is an important system element that identifies the board to the host PC and stores the firmware for theCypress USB Interface. The EEPROM is programmed during manufacturing via the J2 connector.8093-0230Figure 23. EEPROM SchematicTARGET BOARD POWER SWITCHThe USBi is capable of supplying power to the target board after the Cypress USB microcontroller has finished its boot up process. The USB_PWR_ON signal connects to the base of Q2 and turns on both transistors when driven high.This circuit also enables a software-controlled target reset from SigmaStudio.08093-024LOCAL FOR ADG721Figure 24. Target Power Switch SchematicTARGET BOARD PROGRAMMING HEADERTo properly boot the Cypress USB microcontroller from the EEPROM, it is necessary to remove all other devices from the I 2C bus. The ADG721BRMZ analog switch remains open, isolating the I 2C bus from the target, until the boot process has completed.13579246810111312142X5 CUSTOM RIBBONJ15V0DD_USBCTRL CTRL S1IN1D1U2-AADG721BRMZS2IN2D2U2-B ADG721BRMZC20.10uFSCLSDACDATA CLATCH1CCLK BRD_RESET COUT USB_CLK CLATCH2CLATCH3CLATCH4CLATCH5USB_PWR_ONUSB_PWR_ON3V3DD8093-025Figure 25. Target Board Programming Header SchematicAN-1006 Application Note EVALUATION BOARD SCHEMATICS AND ARTWORKSCHEMATICSLOCALFORFXLP34CCLDAVDD_USBUSB_PWR_893-028分销商库存信息: ANALOG-DEVICES EVAL-ADUSB2EBUZ。
datasheet芯片资料
© 2005 Fairchild Semiconductor Corporation DS005165September 1983Revised May 2005MM74HC245A Octal 3-STATE TransceiverMM74HC245AOctal 3-STATE TransceiverGeneral DescriptionThe MM74HC245A 3-STATE bidirectional buffer utilizes advanced silicon-gate CMOS technology, and is intended for two-way asynchronous communication between data buses. It has high drive current outputs which enable high speed operation even when driving large bus capaci-tances. This circuit possesses the low power consumption and high noise immunity usually associated with CMOS cir-cuitry, yet has speeds comparable to low power Schottky TTL circuits.This device has an active LOW enable input G and a direc-tion control input, DIR. When DIR is HIGH, data flows from the A inputs to the B outputs. When DIR is LOW, data flows from the B inputs to the A outputs. The MM74HC245A transfers true data from one bus to the other.This device can drive up to 15 LS-TTL Loads, and does not have Schmitt trigger inputs. All inputs are protected from damage due to static discharge by diodes to V CC and ground.Featuress Typical propagation delay: 13 ns s Wide power supply range: 2–6Vs Low quiescent current: 80 P A maximum (74 HC)s 3-STATE outputs for connection to bus oriented systems s High output drive: 6 mA (minimum)s Same as the 645Ordering Code:Devices also available in T ape and Reel. Specify by appending the suffix letter “X ” to the ordering code.Connection DiagramPin Assignments for DIP , SOIC, SOP and TSSOPTop ViewTruth TableH HIGH Level L LOW Level X IrrelevantOrder Number Package NumberPackage DescriptionMM74HC245AWM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide MM74HC245ASJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm WideMM74HC245AMTC MTC2020-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC245ANN20A20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" WideControl Inputs OperationG DIR L L B data to A bus L H A data to B busHXIsolation 2M M 74H C 245ALogic DiagramMM74HC245AAbsolute Maximum Ratings (Note 1)(Note 2)Recommended Operating ConditionsNote 1: Maximum Ratings are those values beyond which damage to the device may occur.Note 2: Unless otherwise specified all voltages are referenced to ground.Note 3: Power Dissipation temperature derating — plastic “N ” package: 12 mW/q C from 65q C to 85q C.DC Electrical Characteristics (Note 4)Note 4: For a power supply of 5V r 10% the worst case output voltages (V OH , and V OL ) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case V IH and V IL occur at V CC 5.5V and 4.5V respectively. (The V IH value at 5.5V is 3.85V.) The worst case leakage cur-rent (I IN , I CC , and I OZ ) occur for CMOS at the higher voltage and so the 6.0V values should be used.Supply Voltage (V CC )0.5 to 7.0V DC Input Voltage DIR and G pins (V IN ) 1.5 to V CC 1.5V DC Input/Output Voltage (V IN , V OUT ) 0.5 to V CC 0.5VClamp Diode Current (I CD )r 20 mA DC Output Current, per pin (I OUT )r 35 mA DC V CC or GND Current, per pin (I CC )r 70 mAStorage Temperature Range (T STG ) 65q C to 150q CPower Dissipation (P D )(Note 3)600 mW S.O. Package only 500 mWLead Temperature (T L )(Soldering 10 seconds)260q C MinMax Units Supply Voltage (V CC )26VDC Input or Output Voltage (V IN , V OUT )V CCVOperating Temperature Range (T A ) 40 85q CInput Rise/Fall Times (t r , t f )V CC 2.0V 1000ns V CC 4.5V 500ns V CC 6.0V400nsSymbol ParameterConditionsV CC T A 25q C T A 40 to 85q C T A 55 to 125q CUnits TypGuaranteed LimitsV IHMinimum HIGH Level Input 2.0V 1.5 1.5 1.5V Voltage4.5V 3.15 3.15 3.15V 6.0V 4.2 4.2 4.2V V ILMaximum LOW Level Input2.0V 0.50.50.5V Voltage 4.5V1.35 1.35 1.35V 6.0V1.8 1.8 1.8V V OHMinimum HIGH Level Output V IN V IH or V IL Voltage|I OUT | d 20 P A2.0V 2.0 1.9 1.9 1.9V 4.5V 4.5 4.4 4.4 4.4V 6.0V6.05.95.95.9VV IN V IH or V IL |I OUT | d 6.0 mA 4.5V 4.2 3.98 3.84 3.7V |I OUT | d 7.8 mA6.0V5.75.485.345.2VV OLMaximum LOW Level Output V IN V IH or V IL Voltage|I OUT | d 20 P A2.0V 00.10.10.1V 4.5V 00.10.10.1V 6.0V0.10.10.1VV IN V IH or V IL |I OUT | d 6.0 mA 4.5V 0.20.260.330.4V |I OUT | d 7.8 mA6.0V 0.20.260.330.4V I IN Input Leakage V IN V CC to GND6.0Vr 0.1r 1.0r 1.0P ACurrent (G and DIR)I OZ Maximum 3-STATE Output V OUT V CC or GND 6.0Vr 0.5r 5.0r 10P ALeakage CurrentEnable G V IH I CCMaximum Quiescent Supply V IN V CC or GND 6.0V8.080160P ACurrentI OUT 0 P A 4M M 74H C 245AAC Electrical CharacteristicsV CC 5V, T A 25q C, t r t f 6ns AC Electrical CharacteristicsV CC 2.0V to 6.0V, C L 50 pF, t r t f 6ns (unless otherwise specified)Note 5: C PD determines the no load dynamic power consumption, P D C PD V CC 2 f I CC V CC , and the no load dynamic current consumption, I S C PD V CC f I CC .Symbol ParameterConditionsTyp GuaranteedUnits Limit t PHL , t PLH Maximum Propagation Delay C L 45 pF 1217ns t PZH , t PZL Maximum Output Enable R L 1 k :2435nsTimeC L 45 pF t PHZ , t PLZMaximum Output Disable R L 1 k :1825nsTimeC L 5 pFSymbol ParameterConditions V CC T A 25q C T A 40 to 85q C T A 55 to 125q C Units Typ Guaranteed Limitst PHL ,Maximum Propagation C L 50 pF 2.0V 3190113135ns t PLHDelayC L 150 pF 2.0V 4196116128ns C L 50 pF 4.5V 13182327ns C L 150 pF 4.5V 17222833ns C L 50 pF 6.0V 11151923ns C L 150 pF6.0V14192328ns t PZH ,Maximum Output Enable R L 1 k :t PZLTimeC L 50 pF 2.0V 71190240285ns C L 150 pF 2.0V 81240300360ns C L 50 pF 4.5V 26384857ns C L 150 pF 4.5V 31486072ns C L 50 pF 6.0V 21324148ns C L 150 pF6.0V 25415161ns t PHZ ,Maximum Output Disable R L 1 k : 2.0V 39135169203ns t PLZTimeC L 50 pF 4.5V 20273441ns 6.0V18232934ns t TLH , t THL Output Rise and Fall TimeC L 50 pF2.0V 20607590ns 4.5V 6121518ns 6.0V5101315ns C PD Power Dissipation G V IL 50pF Capacitance (Note 5)G V IH5pFC IN Maximum Input Capacitance 5101010pF C IN/OUTMaximum Input/Output 15202020pFCapacitance, A or B MM74HC245APhysical Dimensions inches (millimeters) unless otherwise noted20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" WidePackage Number M20B 6M M 74H C 245APhysical Dimensionsinches (millimeters) unless otherwise noted (Continued)20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm WidePackage Number M20D MM74HC245APhysical Dimensions inches (millimeters) unless otherwise noted (Continued)20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WidePackage Number MTC208M M 74H C 245A O c t a l 3-S T A T E T r a n s c e i v e rPhysical Dimensions inches (millimeters) unless otherwise noted (Continued)20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" WidePackage Number N20AFairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICYFAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.。
AD9273BSVZ-50;AD9273BSVZ-25;AD9273BBCZ-25;AD9273BSVZ-40;AD9273BBCZ-40;中文规格书,Datasheet资料
/
CLK+ CLK–
AD9273 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Product Highlights ........................................................................... 3 Specifications..................................................................................... 4 AC Specifications.......................................................................... 4 Digital Specifications ................................................................... 8 Switching Specifications .............................................................. 9 ADC Timing Diagrams ................................................................. 10 Absolute Maximum Ratings.......................................................... 11 Thermal Impedance ................................................................... 11 ESD Caution ................................................................................ 11 Pin Configuration and Function Descriptions ........................... 12 Typical Performance Characteristics ........................................... 15 Equivalent Circuits ......................................................................... 19 Theory of Operation ...................................................................... 21 Ultrasound .................................................................................. 21 Channel Overview ..................................................................... 22 Input Overdrive .......................................................................... 25 CW Doppler Operation............................................................. 25 TGC Operation ........................................................................... 27 ADC ............................................................................................. 31 Clock Input Considerations ...................................................... 31 Serial Port Interface (SPI) .............................................................. 38 Hardware Interface..................................................................... 38 Memory Map .................................................................................. 40 Reading the Memory Map Table .............................................. 40 Reserved Locations .................................................................... 40 Default Values ............................................................................. 40 Logic Levels ................................................................................. 40 Outline Dimensions ....................................................................... 44 Ordering Guide .......................................................................... 45
DC1018B-A;中文规格书,Datasheet资料
LT4356 FEATURESStuffed for Automotive Applications up to 3A Triple Layout for D-Pak, D2-Pak or S-8 M OSFETs 0.093-inch Turret Holes Accommodate 12 AW G W ire LEDs Show Input, Outputs, Fault and Enable Easily M odified for up to 20AAP P L IC ATIO N SServers, Routers, Switches M ass Storage Fan TraysAutomotive M odulesD ESC RIP TIO NDemonstration Circuit DC-1018B-A showcases the LT4356-1 Surge Stopper in a 12V, 3A application. Input transients of up to 60V are limited to 16V at the output; sustained overvoltage conditions cause the limiter to trip off and retry after the overvoltage is removed.LEDs indicate the presence of +12V input and output, as well as state of the fault output, FLT# and enable output, EN.Input and output connections are made by 93 mil turrets which if removed, accommodate insertion of up to 12 gauge wires for in-situ testing.L , LTC, LTM , LT, Burst M ode, OPTI-LOOP, Over-The-Top and PolyPhase are registeredtrademarks of Linear Technology Corporation. Adaptive Power, C-Load, DirectSense, Easy Drive, FilterCAD, Hot Swap, LinearView, µM odule, M icropower SwitcherCAD, M ultimode Dimming, No Latency , No Latency Delta-Sigma, No R SENSE , Operational Filter, PanelProtect, PowerPath, PowerSOT, SmartStart, SoftSpan, Stage Shedding, SwitcherCAD, ThinSOT, UltraFast and VLDO are trademarks of Linear Technology Corporation. Other product names may be trademarks of the companies that manufacture the products.P ERFO RM AN C E SUM M ARY Speci f i cat i ons ar e at TA = 25°CSYM BOL PARAM ETER CONDI TI ONSM I N TYP M AX UNI TS V IN Input Operating Range4 12 60 VPeak Input Voltage Clipped by Transient Voltage Suppressor100 V V LIM IT Output Limiting Voltage15.3 16 16.7 V I OUT M aximum Load Current3.5ADEMO C IR C U IT 1018B-AQ U IC K S TAR T G U IDE L T 4356-1Ov e rv o lta g e P ro te c tio nR e g u la to rLT4356 Boar d LayoutDC1018B-A is a 4-layer board. There are planes for input, output, drain and ground; these are replicated on each layer.DC1018B-A is stuffed with the LT4356CDE-1 which has a 5µA typical shutdown current.The 93 mil input and output connection turrets are not swaged and may be removed for attachment of up to 12 gauge wire. Banana j acks facilitate bench testing. Sufficient copper is available to support applications of at least 20A.LEDs are included as quick debug indicators. These LEDs show:LED1 12V input GreenLED3 12V output GreenLED4 FLT# RedLED5 EN GreenThe enable and fault LEDs are both powered in such a way that the signals present on their associated turrets are limited in voltage (see schematic). To this end a simple series regulator (Q2 and D6) has been included on the demo board for powering the FLT# output; the FLT# pin itself is rated to 80V.R8 is an optional pull-up resistor for the SHDN# pin.M odi f yi ng Cur r ent Li m i tDC1018B-A is designed for 3.5A maximum load cur-rent and may be modified for higher or lower current levels. Sense resistor RSNS1-3 pads are designed for 1206 or 2010 sense resistors. The LT4356-1 current sense voltage is 50mV, with limiting occurring at 50mV/RSNS. Optional footprints for D2-pak or S-8 M OSFETs allow for much higher or lower current lev-els. Sufficient copper is present to handle in excess of 20A. If the S-8 footprint is used, move R3 (10 ohms) to the bottom of the board, R3B. This is the gate resis-tor for the S-8 M OSFET.At higher currents the clamp DCL must be proportion-ately increased. This catches the locally generated spike at the M OSFET drain when the output goes into regulation. The energy content of this spike is a direct function of input slew rate and output load capacitance. Changi ng Out put Regul at i on LevelThe output limiting or regulation voltage is easily modi-fied by simply changing R1 and R2 to values appropri-ate for the application. The FB pin servo voltage is 1.25V. See the data sheet for a full description of this pin and equations. As built, the demo board clamps at 16V.The actual operating voltage is independent of the clamping voltage, and may be anything from the mini-mum operating voltage of 4V up to the clamping volt-age. Thus while the demo board is labeled "12V", it can operate with any other sub-16V input such as a 5V regulated supply, a 6V gelcell, or a stack of 8 NiM H cells, or a 9V impedance limited wall cube, to name but a few possible inputs.Suppl y Cur r entThe low shutdown current of the LT4356-1 is impossi-ble to measure on the demo board because of the presence of the input LED, LED1, and the LED Supply. Remove R10 and R17 to eliminate these paths.Note that above 16V, D4 will draw current. Below 16V leakage in D4, Q2's collector-base j unction in series with D6 and Q1 will add to the LT4356-1's supply cur-rent. These effects are insignificant at room tempera-ture.LT4356Sm al l Tur r et sNo connection to any of the small turrets is necessary to make the board operate--the LT4356-1 defaults to the ON state.SHDN# is pulled high internally. If this turret is left open, the board will turn on when power is applied. Short this turret to ground to turn off the LT4356-1.FLT# pulls low after a TM R interval if there is a sus-tained input overvoltage, and does so 2ms before the output shuts down. Otherwise FLT# is high, pulled up by LED4 and the 5V LED Supply.EN is an output. It goes high when the 12V output rises to within 700mV of the input. EN is latched and does not pull low again until the LT4356-1 trips off from a sustained overvoltage or is shut down. EN is pulled up to the output through a 3.9kilo-ohm resistor, and is shunted by LED5. Use EN to enable downstream cir-cuitry.I nput Over vol t ages and Bench Test i ngThe LT4356-1 is designed to block transient voltages and surges from reaching load circuitry of limited volt-age capability. This has a profound impact on the volt-age rating of downstream components as well as to-pology where dc-to-dc converters are concerned, not to mention elimination of bulky input filter inductors and capacitors.To this end, Q1 is selected for a 3A application where the surges and transients are consistent with an auto-motive environment.Sustained dc overvoltage conditions are not part of the automotive environment, and in the standard circuit configuration Q1 would likely overheat from continu-ous autoretry if, for example, 60Vdc was applied to the input. Yet a 60Vdc input is a likely event during initial bench testing.An Overvoltage Lockout circuit has been included on the demo board to prevent M OSFET destruction during bench testing. This operates by pulling up on the TM R pin and preventing autoretry when the input voltage exceeds approximately 18V.If the board is only subj ected to surges and transients, the Overvoltage Lockout circuit is unnecessary and in fact plays a nuisance-to-nothing role. Remove R16 to defeat the Overvoltage Lockout circuit function.DC1018B-A is designed to ride through input tran-sients of 1 or 2ms duration, but will shut down during load dump. Q1 must dissipate significant energy to support a 3A load during load dump, so a larger M OSFET is necessary if Q1 is to survive. CTM R must be increased to accommodate the proposed time inter-val if this modification is contemplated.Local l y Gener at ed Dr ai n Spi kesW hen an input transient waveform is applied to an op-erating LT4356-1, the M OSFET is fully on and a large magnitude displacement current flows into the load capacitors, CL1 and CL2 (collectively, CL)and any other off-board load capacitors. The LT4356-1 has a relatively soft current limit amplifier to prevent detec-tion of current pulses generated by noise spikes. This soft response prevents the LT4356-1 from responding to the initial current surge in CL.The current surge is limited only by the feedpoint im-pedance of the supply, the transient rising slew rate and the capacitance and ESR of CL. The current surge is commutated by the M OSFET once CL charges to Vgate-Vthreshold, and results in a wide-bandwidth voltage spike at the input, limited only by the break-down of input clamp DCL. W ithout DCL the input volt-age could easily exceed 100V and destroy the LT4356-1.Under normal conditions (typical automotive transients and surges)the input rise time is 10µs or more, and the CL displacement current is moderate. Drain spikes are thereby limited in amplitude.W hen bench testing, input rise times may easily reachLT4356100ns creating an environment for destructive drain spikes, generated by the M OSFET itself.To protect the LT4356-1 from damage during bench testing with fast-rising input edges, an SM AJ58A Tran-sZorb has been chosen for diode clamp DCL. This component clamps the drain spike to less than 100V. The knee is around 64V. If a dc voltage higher than 60V is connected to DC1018B-A, DCL will be de-stroyed. Transients to 80V are permissible as the cur-rent in DCL will be limited by wiring inductance. Fur-ther, the energy is limited because the time spent in conduction by DCL is short.Basi c Oper at i onConnect a 12V supply to input, and the load to output. The circuit will turn on automatically when power is applied.To test the voltage limiter, apply a transient to the 12V Input. One method of coupling a transient without backfeeding the 12V supply is shown in the Connection Diagram, attached. If the input transient is short the output simply limits at 16V and then recovers to 12V. If the transient is sustained, the output will rise to 16V, regulate there and then shut down. The exact timing and the dividing line between "short" and "sustained" is a function of the input waveform amplitude and shape (see the data sheet). Once the input voltage falls below the Overvoltage Lockout level, autoretry is initiated af-ter a cooldown period of 42.5ms. The timing intervals are controlled by CTM R and the TM R pin according to equations in the data sheet.Fi gur e 1: Proper M easurement Equipment SetupLT4356分销商库存信息: LINEAR-TECHNOLOGY DC1018B-A。
BYV40E-150,115;中文规格书,Datasheet资料
BYV40E series Rectifier diodes ultrafast, ruggedNXP Semiconductors Product specificationRectifier diodes BYV40E seriesultrafast, ruggedESD LIMITING VALUESYMBOL PARAMETER CONDITIONSMIN.MAX.UNIT V CElectrostatic discharge Human body model;-8kVcapacitor voltageC = 250 pF; R = 1.5 k ΩTHERMAL RESISTANCESSYMBOL PARAMETER CONDITIONSMIN.TYP.MAX.UNIT R th j-sp Thermal resistance one or both diodes conducting --15K/W junction to solder point R th j-aThermal resistance pcb mounted; minimum footprint -156-K/W junction to ambientpcb mounted; pad area as in fig:11-70-K/WELECTRICAL CHARACTERISTICScharacteristics are per diode at T j = 25 ˚C unless otherwise stated SYMBOL PARAMETER CONDITIONSMIN.TYP.MAX.UNIT V F Forward voltage I F = 0.5 A; T j = 150˚C -0.500.7V I F = 1.5 A-0.82 1.0V I R Reverse currentV R = V RWM ; T j = 100 ˚C -100300µA V R = V RWM-510µA Q s Reverse recovery charge I F = 2 A; V R ≥ 30 V; -dI F /dt = 20 A/µs --11nC t rr1Reverse recovery time I F = 1 A; V R ≥ 30 V;--25ns -dI F /dt = 100 A/µst rr2Reverse recovery time I F = 0.5 A to I R = 1 A; I rec = 0.25 A -1020ns V frForward recovery voltageI F = 2 A; dI F /dt = 20 A/µs-3-VLegal informationDATA SHEET STATUSNotes1.Please consult the most recently issued document before initiating or completing a design.2.The product status of device(s) described in this document may have changed since this document was publishedand may differ in case of multiple devices. The latest product status information is available on the Internet at URL . DOCUMENT STATUS (1)PRODUCT STATUS (2)DEFINITIONObjective data sheet Development This document contains data from the objective specification for product development.Preliminary data sheet Qualification This document contains data from the preliminary specification. Product data sheet ProductionThis document contains the product specification.DEFINITIONSProduct specification ⎯ The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXPSemiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.DISCLAIMERSLimited warranty and liability ⎯ Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give anyrepresentations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or reworkcharges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’aggregate and cumulative liability towards customer for the products described herein shall be limited inaccordance with the Terms and conditions of commercial sale of NXP Semiconductors.Right to make changes ⎯ NXP Semiconductors reserves the right to make changes to informationpublished in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.Suitability for use ⎯ NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severeproperty or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment orapplications and therefore such inclusion and/or use is at the customer’s own risk.Applications ⎯ Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXPSemiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXPSemiconductors product is suitable and fit for thecustomer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.Legal informationNXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third partycustomer(s). NXP does not accept any liability in this respect.Limiting values ⎯ Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or theCharacteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.Terms and conditions of commercial sale ⎯ NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at /profile/terms, unless otherwiseagreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer.No offer to sell or license ⎯ Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.Export control ⎯ This document as well as the item(s) described herein may be subject to export controlregulations. Export might require a prior authorization from national authorities.Quick reference data ⎯ The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.Non-automotive qualified products ⎯ Unless this data sheet expressly states that this specific NXPSemiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications.In the event that customer uses the product for design-in and use in automotive applications to automotivespecifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXPSemiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications.Contact informationFor additional information please visit: For sales offices addresses send e-mail to: salesaddresses@Customer notificationThis data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions and disclaimers. No changes were made to the content, except for the legal definitions and disclaimers. © NXP B.V. 2011All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.Printed in The Netherlands分销商库存信息: NXPBYV40E-150,115。
Z515中文资料(Intel)中文数据手册「EasyDatasheet - 矽搜」
UNLESS O THERW ISE AGREED IN W RITING BY INTEL, THE INTEL PRO DUCTS ARE NO T DESIGNED NO R INTENDED FO R ANY APPLICATIO N IN W HICH THE FAILURE O F THE INTEL PRO DUCT CO ULD CREATE A SITUATIO N W HERE PERSO NAL INJURY O R DEATH MAY O CCUR.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copie s of docum ents which have an orde r num be r and are re fere nce d in this docum ent, or othe r Inte l lite rature , m ay be obtaine d
TEA1622PN1,112;中文规格书,Datasheet资料
8.2 Oscillator
The frequency of the oscillator is set by the external resistor and capacitor on pin RC. The external capacitor is charged rapidly to the VRC(max) level and, starting from a new primary stroke, it discharges to the VRC(min) level. Because the discharge is exponential, the relative sensitivity of the duty factor to the regulation voltage at low duty factor is almost equal to the sensitivity at high duty factors. This results in a more constant gain over the duty factor range compared to PWM systems with a linear sawtooth oscillator. Stable operation at low duty factors is easily realized. For high efficiency, the frequency is reduced as soon as the duty factor drops below a certain value. This is accomplished by increasing the oscillator charge time.