DRV8842PWP;DRV8842PWPR;中文规格书,Datasheet资料

DRV8842 SLVSAB8D–MAY2010–REVISED JANUARY2012DC MOTOR DRIVER ICCheck for Samples:DRV8842FEATURES•Single H-Bridge Current-Control Motor Driver•Thermally Enhanced Surface Mount Package –Drives One DC Motor,One Coil of a StepperAPPLICATIONSMotor,or Other Actuators•Printers–Five-Bit Winding Current Control Allows Upto32Current Levels•Scanners–Low MOSFET On-Resistance•Office Automation Machines•5-A Maximum Drive Current at24V,25°C•Gaming Machines•Built-In3.3-V Reference Output•Factory Automation•Industry-Standard PWM Control Interface•Robotics•8.2-V to45-V Operating Supply Voltage RangeDESCRIPTIONThe DRV8842provides an integrated motor driver solution for printers,scanners,and other automated equipment applications.The device has one H-bridge driver,and is intended to drive one DC motor,one coil of a stepper motor,or other loads.The output driver block consists of N-channel power MOSFET’s configured as an H-bridge.The DRV8842can supply up to5-A peak or3.5-A RMS output current(with proper heatsinking at24V and25°C).Separate inputs to independently control each half of the H-bridge are provided.Internal shutdown functions are provided for over current protection,short circuit protection,under voltage lockout and overtemperature.TheDRV8842is available in a28-pin HTSSOP package with PowerPAD™(Eco-friendly:RoHS&no Sb/Br).ORDERING INFORMATION(1)ORDERABLE PART TOP-SIDE T A PACKAGE(2)NUMBER MARKING –40°C to85°C PowerPAD™(HTSSOP)-PWP Reel of2000DRV8842PWPR8842(1)For the most current packaging and ordering information,see the Package Option Addendum at the end of this document,or see the TIweb site at .(2)Package drawings,thermal data,and symbolization are available at /packaging.Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PowerPAD is a trademark of Texas Instruments.PRODUCTION DATA information is current as of publication date.Copyright©2010–2012,Texas Instruments Incorporated Products conform to specifications per the terms of the TexasInstruments standard warranty.Production processing does notnecessarily include testing of all parameters.DRV8842SLVSAB8D–MAY2010–REVISED DEVICE INFORMATIONFunctional Block Diagram2Submit Documentation Feedback Copyright©2010–2012,Texas Instruments IncorporatedProduct Folder Link(s):DRV8842DRV8842 SLVSAB8D–MAY2010–REVISED JANUARY2012Table1.TERMINAL FUNCTIONSEXTERNAL COMPONENTS NAME PIN I/O(1)DESCRIPTIONOR CONNECTIONSPOWER AND GROUNDGND14,28-Device groundConnect to motor supply(8.2-45V).BothVM4,11-Bridge A power supplypins must be connected to same supply.Bypass to GND with a0.47-μF,6.3-V ceramic V3P3OUT15O 3.3-V regulator outputcapacitor.Can be used to supply VREF.CP11IO Charge pump flying capacitor Connect a0.01-μF50-V capacitor betweenCP1and CP2.CP22IO Charge pump flying capacitorConnect a0.1-μF16-V ceramic capacitor to VCP3IO High-side gate drive voltageVM.CONTROLLogic input controls state of OUT1.InternalIN121I Input1pulldown.Logic input controls state of OUT2.InternalIN220I Input2pulldown.I023II124ISets winding current as a percentage ofI225I Current set inputsfull-scale.Internal pulldown.I326II427ILow=slow decay,open=mixed decay, DECAY19I Decay mode high=fast decay.Internal pulldown andpullup.Active-low reset input initializes the logic and nRESET16I Reset input disables the H-bridge outputs.Internalpulldown.Logic high to enable device,logic low to enter nSLEEP17I Sleep mode inputlow-power sleep mode.Internal pulldown.Reference voltage for winding current set. VREF12,13I Current set reference input Both pins must be connected together on thePCB.STATUSLogic low when in fault condition(overtemp, nFAULT18OD Faultovercurrent)OUTPUTConnect to current sense resistor.Both pins ISEN6,9IO Bridge ground/Isensemust be connected together on the PCB.Connect to motor winding.Both pins must be OUT15,10O Bridge output1connected together on the PCB.Connect to motor winding.Both pins must be OUT27,8O Bridge output2connected together on the PCB.(1)Directions:I=input,O=output,OZ=tri-state output,OD=open-drain output,IO=input/outputCopyright©2010–2012,Texas Instruments Incorporated Submit Documentation Feedback3Product Folder Link(s):DRV8842GNDI4I3I2I1I0NCIN1IN2DECAYnFAULTnSLEEPnRESETV3P3OUTVREFGNDVMVREFISENOUT1OUT2OUT2OUT1ISENVCPVMCP1CP2PWP PACKAGE(TOP VIEW)DRV8842SLVSAB8D–MAY2010–REVISED ABSOLUTE MAXIMUM RATINGSover operating free-air temperature range(unless otherwise noted)(1)(2)VALUE UNITVM Power supply voltage range–0.3to47V Digital pin voltage range–0.5to7V VREF Input voltage–0.3to4V ISENSEx pin voltage–0.3to0.8VPeak motor drive output current,t<1μS Internally limited AContinuous motor drive output current(3)5AContinuous total power dissipation See Dissipation Ratings tableT J Operating virtual junction temperature range–40to150°CT A Operating ambient temperature range–40to85°CT stg Storage temperature range–60to150°C (1)Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device.These are stress ratingsonly,and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied.Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.(2)All voltage values are with respect to network ground terminal.(3)Power dissipation and thermal limits must be observed.4Submit Documentation Feedback Copyright©2010–2012,Texas Instruments IncorporatedProduct Folder Link(s):DRV8842DRV8842 SLVSAB8D–MAY2010–REVISED JANUARY2012THERMAL INFORMATIONDRV8842THERMAL METRIC(1)PWP UNITS28PINSθJA Junction-to-ambient thermal resistance(2)31.6θJCtop Junction-to-case(top)thermal resistance(3)15.9θJB Junction-to-board thermal resistance(4) 5.6°C/WψJT Junction-to-top characterization parameter(5)0.2ψJB Junction-to-board characterization parameter(6) 5.5θJCbot Junction-to-case(bottom)thermal resistance(7) 1.4(1)For more information about traditional and new thermal metrics,see the IC Package Thermal Metrics application report,SPRA953.(2)The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard,high-K board,asspecified in JESD51-7,in an environment described in JESD51-2a.(3)The junction-to-case(top)thermal resistance is obtained by simulating a cold plate test on the package top.No specificJEDEC-standard test exists,but a close description can be found in the ANSI SEMI standard G30-88.(4)The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCBtemperature,as described in JESD51-8.(5)The junction-to-top characterization parameter,ψJT,estimates the junction temperature of a device in a real system and is extractedfrom the simulation data for obtainingθJA,using a procedure described in JESD51-2a(sections6and7).(6)The junction-to-board characterization parameter,ψJB,estimates the junction temperature of a device in a real system and is extractedfrom the simulation data for obtainingθJA,using a procedure described in JESD51-2a(sections6and7).(7)The junction-to-case(bottom)thermal resistance is obtained by simulating a cold plate test on the exposed(power)pad.No specificJEDEC standard test exists,but a close description can be found in the ANSI SEMI standard G30-88.RECOMMENDED OPERATING CONDITIONSover operating free-air temperature range(unless otherwise noted)MIN NOM MAX UNITV M Motor power supply voltage range(1)8.245VV REF VREF input voltage(2)1 3.5VI V3P3V3P3OUT load current01mAf PWM Externally applied PWM frequency0100kHz(1)All V M pins must be connected to the same supply voltage.(2)Operational at VREF between0V and1V,but accuracy is degraded.Copyright©2010–2012,Texas Instruments Incorporated Submit Documentation Feedback5Product Folder Link(s):DRV8842DRV8842SLVSAB8D–MAY2010–REVISED ELECTRICAL CHARACTERISTICSover operating free-air temperature range(unless otherwise noted)PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLIESI VM VM operating supply current V M=24V,f PWM<50kHz58mAI VMQ VM sleep mode supply current V M=24V1020μAV UVLO VM undervoltage lockout voltage V M rising7.88.2VV3P3OUT REGULATORV3P3V3P3OUT voltage IOUT=0to1mA 3.2 3.3 3.4V LOGIC-LEVEL INPUTSV IL Input low voltage0.60.7VV IH Input high voltage 2.2 5.25VV HYS Input hysteresis0.30.450.6VI IL Input low current VIN=0–2020μAI IH Input high current VIN=3.3V33100μAR PD Internal pulldown resistance100kΩnFAULT OUTPUT(OPEN-DRAIN OUTPUT)V OL Output low voltage I O=5mA0.5VI OH Output high leakage current V O=3.3V1μA DECAY INPUTV IL Input low threshold voltage For slow decay(brake)mode00.8VV IH Input high threshold voltage For fast decay(coast)mode2VI IN Input current±40μAR PU Internal pullup resistance(to3.3V)130kΩR PD Internal pulldown resistance80kΩH-BRIDGE FETSV M=24V,I O=1A,T J=25°C0.1R DS(ON)HS FET on resistanceΩV M=24V,I O=1A,T J=85°C0.130.16V M=24V,I O=1A,T J=25°C0.1R DS(ON)LS FET on resistanceΩV M=24V,I O=1A,T J=85°C0.130.16I OFF Off-state leakage current–4040μA MOTOR DRIVERf PWM Internal current control PWM frequency50kHzt BLANK Current sense blanking time 3.75μst R Rise time30200nst F Fall time30200ns PROTECTION CIRCUITSI OCP Overcurrent protection trip level6At TSD Thermal shutdown temperature Die temperature150160180°C CURRENT CONTROLI REF VREF input current VREF=3.3V–33μAV TRIP ISENSE trip voltage VREF=3.3V,100%current setting635660685mVVREF=3.3V,5%current setting–2525VREF=3.3V,10%-34%current setting–1515 Current trip accuracyΔI TRIP% (relative to programmed value)VREF=3.3V,38%-67%current setting–1010VREF=3.3V,71%-100%current setting–55A ISENSE Current sense amplifier gain Reference only5V/V6Submit Documentation Feedback Copyright©2010–2012,Texas Instruments IncorporatedProduct Folder Link(s):DRV8842DRV8842 SLVSAB8D–MAY2010–REVISED JANUARY2012FUNCTIONAL DESCRIPTIONPWM Motor DriversThe DRV8842contains one H-bridge motor driver with current-control PWM circuitry.A block diagram of the motor control circuitry is shown in Figure1.Figure1.Motor Control CircuitryNote that there are multiple VM,ISEN,OUT,and VREF pins.All like-named pins must be connected together on the PCB.Bridge ControlThe IN1and IN2input pins directly control the state of the OUT1and OUT2outputs.Either input can also be used for PWM control of the load.Table2shows the logic.Table2.H-Bridge LogicxIN1xIN2xOUT1xOUT200L L01L H10H L11H HThe control inputs have internal pulldown resistors of approximately100kΩ.Current RegulationThe maximum current through the load is regulated by a fixed-frequency PWM current regulation,or current chopping.When the H-bridge is enabled,current rises through the winding at a rate dependent on the DC voltage and inductance of the winding.Once the current hits the current chopping threshold,the bridge disables the current until the beginning of the next PWM cycle.For DC motors,current regulation is used to limit the start-up and stall current of the motor.Speed control is typically performed by providing an external PWM signal to the xIN1or xIN2input pins.If the current regulation feature is not needed,it can be disabled by connecting the ISENSE pins directly to ground and the VREF pins to V3P3.Copyright©2010–2012,Texas Instruments Incorporated Submit Documentation Feedback7Product Folder Link(s):DRV8842I= CHOPVREFX 5·RISENSE ¾DRV8842SLVSAB8D–MAY2010–REVISED The PWM chopping current is set by a comparator which compares the voltage across a current sense resistor connected to the ISEN pin,multiplied by a factor of5,with a reference voltage.The reference voltage is input from the VREF pin,and is scaled by a5-bit DAC that allows current settings of zero to100%in an approximately sinusoidal sequence.The full-scale(100%)chopping current is calculated in Equation1.(1)Example:If a0.25-Ωsense resistor is used and the VREFx pin is2.5V,the full-scale(100%)chopping current will be2.5V/(5x0.25Ω)=2A.Five input pins(I0-I4)are used to scale the current in the bridge as a percentage of the full-scale current set by the VREF input pin and sense resistance.The I0-I4pins have internal pulldown resistors of approximately 100kΩ.The function of the pins is shown in Table3.Table3.Pin FunctionsRELATIVE CURRENTI[4..0](%FULL-SCALE CHOPPING CURRENT)0x00h0%0x01h5%0x02h10%0x03h15%0x04h20%0x05h24%0x06h29%0x07h34%0x08h38%0x09h43%0x0Ah47%0x0Bh51%0x0Ch56%0x0Dh60%0x0Eh63%0x0Fh67%0x10h71%0x11h74%0x12h77%0x13h80%0x14h83%0x15h86%0x16h88%0x17h90%0x18h92%0x19h94%0x1Ah96%0x1Bh97%0x1Ch98%0x1Dh99%0x1Eh100%0x1Fh100%8Submit Documentation Feedback Copyright©2010–2012,Texas Instruments IncorporatedProduct Folder Link(s):DRV8842DRV8842 SLVSAB8D–MAY2010–REVISED JANUARY2012Decay ModeDuring PWM current chopping,the H-bridge is enabled to drive current through the motor winding until the PWM current chopping threshold is reached.This is shown in Figure2as case1.The current flow direction shown indicates the state when the IN1pin is high and the IN2pin is low.Once the chopping current threshold is reached,the H-bridge can operate in two different states,fast decay or slow decay.In fast decay mode,once the PWM chopping current level has been reached,the H-bridge reverses state to allow winding current to flow in a reverse direction.As the winding current approaches zero,the bridge is disabled to prevent any reverse current flow.Fast decay mode is shown in Figure2as case2.In slow decay mode,winding current is re-circulated by enabling both of the low-side FETs in the bridge.This is shown in Figure2as case3.Figure2.Decay ModeThe DRV8842supports fast decay,slow decay and a mixed decay mode.Slow,fast,or mixed decay mode is selected by the state of the DECAY pin-logic low selects slow decay,open selects mixed decay operation,and logic high sets fast decay mode.The DECAY pin has both an internal pullup resistor of approximately130kΩand an internal pulldown resistor of approximately80kΩ.This sets the mixed decay mode if the pin is left open or undriven.Mixed decay mode begins as fast decay,but at a fixed period of time(75%of the PWM cycle)switches to slow decay mode for the remainder of the fixed PWM period.Blanking TimeAfter the current is enabled in an H-bridge,the voltage on the xISEN pin is ignored for a fixed period of time before enabling the current sense circuitry.This blanking time is fixed at3.75μs.Note that the blanking time also sets the minimum on time of the PWM.Copyright©2010–2012,Texas Instruments Incorporated Submit Documentation Feedback9Product Folder Link(s):DRV8842DRV8842SLVSAB8D–MAY2010–REVISED nRESET and nSLEEP OperationThe nRESET pin,when driven active low,resets the internal logic.It also disables the H-bridge driver.All inputs are ignored while nRESET is active.Driving nSLEEP low will put the device into a low power sleep state.In this state,the H-bridges are disabled,the gate drive charge pump is stopped,the V3P3OUT regulator is disabled,and all internal clocks are stopped.In this state all inputs are ignored until nSLEEP returns inactive high.When returning from sleep mode,some time (approximately1ms)needs to pass before the motor driver becomes fully operational.Note that nRESET and nSLEEP have internal pulldown resistors of approximately100kΩ.These signals need to be driven to logic high for device operation.Protection CircuitsThe DRV8842is fully protected against undervoltage,overcurrent and overtemperature events.Overcurrent Protection(OCP)An analog current limit circuit on each FET limits the current through the FET by removing the gate drive.If this analog current limit persists for longer than the OCP time,all FETs in the H-bridge will be disabled and the nFAULT pin will be driven low.The device will remain disabled until either nRESET pin is applied,or VM is removed and re-applied.Overcurrent conditions on both high and low side devices;i.e.,a short to ground,supply,or across the motor winding will all result in an overcurrent shutdown.Note that overcurrent protection does not use the current sense circuitry used for PWM current control,and is independent of the I SENSE resistor value or VREF voltage.Thermal Shutdown(TSD)If the die temperature exceeds safe limits,all FETs in the H-bridge will be disabled and the nFAULT pin will be driven low.Once the die temperature has fallen to a safe level operation will automatically resume. Undervoltage Lockout(UVLO)If at any time the voltage on the VM pins falls below the undervoltage lockout threshold voltage,all circuitry in the device will be disabled and internal logic will be reset.Operation will resume when V M rises above the UVLO threshold.10Submit Documentation Feedback Copyright©2010–2012,Texas Instruments IncorporatedProduct Folder Link(s):DRV8842分销商库存信息:TIDRV8842PWP DRV8842PWPR。