ADS1282IPW;ADS1282IPWR;ADS1282IPWRG4;ADS1282IPWG4;ADS1282EVM-PDK;中文规格书,Datasheet资料

Over-RangeModulator OutputInput 1Input 2ADS1282 SBAS418G–SEPTEMBER2007–REVISED MAY2010High-Resolution Analog-to-Digital ConverterCheck for Samples:ADS1282FEATURES DESCRIPTION•High Resolution:The ADS1282is an extremely high-performance, 130dB SNR(250SPS,High-Resolution Mode)single-chip analog-to-digital converter(ADC)with an 127dB SNR(250SPS,Low-Power Mode)integrated,low-noise programmable gain amplifier(PGA)and two-channel input multiplexer(MUX).The •High Accuracy:ADS1282is suitable for the demanding needs of THD:–122dBenergy exploration and seismic monitoring INL:0.5ppmenvironments.•Low-Noise PGAThe converter uses a fourth-order,inherently stable,•Two-Channel Input MUXdelta-sigma(ΔΣ)modulator that provides outstanding •Inherently-Stable Modulator with Fast noise and linearity performance.The modulator is Responding Over-Range Detection used either in conjunction with the on-chip digitalfilter,or can be bypassed for use with post •Flexible Digital Filter:processing filters.Sinc+FIR+IIR(Selectable)Linear or Minimum Phase Response The flexible input MUX provides an additional Programmable High-Pass Filter external input for measurement,as well as internalself-test connections.The PGA features outstanding Selectable FIR Data Rates:250SPS to4kSPSlow noise(5nV/√Hz)and high input impedance,•Filter Bypass Optionallowing easy interfacing to geophones and •Low Power Consumption:hydrophones over a wide range of gains.High-Resolution Mode:25mWThe digital filter provides selectable data rates from Low-Power Mode:17mW250to4000samples per second(SPS).The Shutdown:10m Whigh-pass filter(HPF)features an adjustable corner •Offset and Gain Calibration Engine frequency.On-chip gain and offset scaling registers •SYNC Input support system calibration.•Analog Supply:The synchronization input(SYNC)can be used to Unipolar(+5V)or Bipolar(±2.5V)synchronize the conversions of multiple ADS1282s.The SYNC input also accepts a clock input for •Digital Supply:1.8V to3.3Vcontinuous alignment of conversions from an externalsource.APPLICATIONSTwo operating modes allow optimization of noise and •Energy Explorationpower.Together,the amplifier,modulator,and filter •Seismic Monitoringdissipate25mW and only17mW in low-power mode.•High-Accuracy InstrumentationThe ADS1282is available in a compact TSSOP-28package and is fully specified from–40°C to+85°C,with a maximum operating range to+125°C.Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.All trademarks are the property of their respective owners.PRODUCTION DATA information is current as of publication date.Copyright©2007–2010,Texas Instruments Incorporated Products conform to specifications per the terms of the TexasInstruments standard warranty.Production processing does notnecessarily include testing of all parameters.ADS1282SBAS418G–SEPTEMBER2007–REVISED This integrated circuit can be damaged by ESD.Texas Instruments recommends that all integrated circuits be handled with appropriate precautions.Failure to observe proper handling and installation procedures can cause damage.ESD damage can range from subtle performance degradation to complete device failure.Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.ORDERING INFORMATIONFor the most current package and ordering information,see the Package Option Addendum at the end of this document,or visit the device product folder at .ABSOLUTE MAXIMUM RATINGS(1)Over operating free-air temperature range(unless otherwise noted).ADS1282UNITAVDD to AVSS–0.3to+5.5VAVSS to DGND–2.8to+0.3VDVDD to DGND–0.3to+3.9VInput current100,momentary mAInput current10,continuous mAAnalog input voltage AVSS–0.3to AVDD+0.3VDigital input voltage to DGND–0.3to DVDD+0.3VMaximum junction temperature+150°COperating temperature range–40to+125°CStorage temperature range–60to+150°C(1)Stresses above these ratings may cause permanent damage.Exposure to absolute maximum conditions for extended periods maydegrade device reliability.These are stress ratings only,and functional operation of the device at these or any other conditions beyond those specified is not implied.2Submit Documentation Feedback Copyright©2007–2010,Texas Instruments IncorporatedProduct Folder Link(s):ADS1282ADS1282 SBAS418G–SEPTEMBER2007–REVISED MAY2010ELECTRICAL CHARACTERISTICSLimit specifications at–40°C to+85°C.Typical specifications at+25°C,AVDD=+2.5V,AVSS=–2.5V,f CLK(1)=4.096MHz,VREFP=+2.5V, VREFN=–2.5V,DVDD=+3.3V,CAPN–CAPP=10nF,PGA=1,High-Resolution Mode,and f DATA=1000SPS,unless otherwise noted.ADS1282PARAMETER CONDITIONS MIN TYP MAX UNIT ANALOG INPUTSFull-scale input voltage V IN=(AINP–AINN)±V REF/(2×PGA)V Absolute input range AINP or AINN AVSS+0.7AVDD–1.25VPGA input voltage noise density5nV/√Hz Differential input impedance(2)1GΩCommon-mode input impedance100MΩInput bias current1nA Crosstalk f=31.25Hz–135dB MUX on-resistance30ΩPGA OUTPUT(CAPP,CAPN)Absolute output range AVSS+0.4AVDD–0.4VPGA differential output impedance600ΩOutput impedance tolerance±10% External bypass capacitance10100nFHigh-resolution mode55kΩModulator differential input impedanceLow-power mode110kΩAC PERFORMANCEHigh-resolution mode120124Signal-to-noise ratio(3)SNR dBLow-power mode117121High-resolution modePGA=1...16–122–114PGA=32–117–110dBPGA=64–115Total harmonic distortion(4)THDLow-power modePGA=1...16–122–114PGA=32–113–108dBPGA=64–109Spurious-free dynamic dBSFDR123rangeDC PERFORMANCEResolution No missing codes31BitsFIR filter mode2504000SPS Data rate f DATASinc filter mode8000128,000SPS Integral nonlinearity(INL)(5)Differential input0.000050.0004%FSR(6) Offset error50200m V Offset error after calibration(7)Shorted input1m V Offset drift0.02m V/°CHigh-resolution mode–1.5–1.0–0.5%Gain error(8)Low-power mode–1–0.50%Gain error after calibration(7)0.0002%(1)f CLK=system clock.(2)Input impedance is improved by disabling input chopping(CHOP bit=0).(3)V IN=20mV DC/PGA;see Table1.(4)V IN=31.25Hz,–0.5dBFS.(5)Best-fit method.(6)FSR:Full-scale range=±V REF/(2×PGA).(7)Calibration accuracy is on the level of noise reduced by4(calibration averages16readings).(8)The PGA output impedance and the modulator input impedance results in–1%systematic gain error(high-resolution mode)and–0.5%error(low-power mode).Copyright©2007–2010,Texas Instruments Incorporated Submit Documentation Feedback3Product Folder Link(s):ADS1282ADS1282SBAS418G–SEPTEMBER2007–REVISED ELECTRICAL CHARACTERISTICS(continued)Limit specifications at–40°C to+85°C.Typical specifications at+25°C,AVDD=+2.5V,AVSS=–2.5V,f CLK(1)=4.096MHz, VREFP=+2.5V,VREFN=–2.5V,DVDD=+3.3V,CAPN–CAPP=10nF,PGA=1,High-Resolution Mode,and f DATA= 1000SPS,unless otherwise noted.ADS1282PARAMETER CONDITIONS MIN TYP MAX UNITDC PERFORMANCE(continued)PGA=12ppm/°C Gain driftPGA=169ppm/°C Gain matching(9)0.30.8% Common-mode rejection f CM=60Hz(10)95110dBAVDD,AVSS8090Power-supply rejection f PS=60Hz(10)dBDVDD90115VOLTAGE REFERENCE INPUTS(AVDD–AVSS)Reference input voltage(V REF=VREFP–VREFN)0.55V+0.2Negative reference input VREFN AVSS–0.1VREFP–0.5V Positive reference input VREFP VREFN+0.5AVDD+0.1VHigh-resolution mode85kΩReference input impedanceLow-power mode170kΩDIGITAL FILTER RESPONSEPassband ripple±0.003dB Passband(–0.01dB)0.375×f DATA Hz Bandwidth(–3dB)0.413×f DATA HzHigh-pass filter corner0.110HzStop band attenuation(11)135dBStop band0.500×f DATA HzMinimum phase filter(12)5/f DATAGroup delay sLinear phase filter31/f DATAMinimum phase filter62/f DATASettling time(latency)sLinear phase filter62/f DATADIGITAL INPUT/OUTPUTV IH0.8×DVDD DVDD VV IL DGND0.2×DVDD VV OH I OH=1mA0.8×DVDD VV OL I OL=1mA0.2×DVDD VInput leakage0<V DIGITAL IN<DVDD±10m A Clock input f CLK1 4.096MHz Serial clock rate f SCLK f CLK/2MHz(9)Gain match relative to PGA=1.(10)f CM is the input common-mode frequency.f PS is the power-supply frequency.(11)Input frequencies in the range of Nf CLK/512±f DATA/2(N=1,2,3...)can mix with the modulator chopping clock.In these frequencyranges intermodulation=120dB,typ.(12)At dc;see Figure49.4Submit Documentation Feedback Copyright©2007–2010,Texas Instruments IncorporatedProduct Folder Link(s):ADS1282SCLKDIN DOUTADS1282 SBAS418G–SEPTEMBER2007–REVISED MAY2010ELECTRICAL CHARACTERISTICS(continued)Limit specifications at–40°C to+85°C.Typical specifications at+25°C,AVDD=+2.5V,AVSS=–2.5V,f CLK(1)=4.096MHz, VREFP=+2.5V,VREFN=–2.5V,DVDD=+3.3V,CAPN–CAPP=10nF,PGA=1,High-Resolution Mode,and f DATA= 1000SPS,unless otherwise noted.ADS1282PARAMETER CONDITIONS MIN TYP MAX UNIT POWER SUPPLYAVSS–2.60V AVDD AVSS+4.75AVSS+5.25V DVDD 1.65 3.6VHigh-resolution mode 4.5 6.5|mA|Low-power mode3 4.2|mA| AVDD,AVSS currentStandby mode115|m A|Power-down mode115|m A|All modes0.60.8mAModulator mode0.1mA DVDD currentStandby mode2550m APower-down mode(13)115m AHigh-resolution mode2535mWLow-power mode1725mW Power dissipationStandby mode90250m WPower-down mode10125m W (13)CLK input stopped.TIMING DIAGRAMTIMING REQUIREMENTSAt T A=–40°C to+85°C and DVDD=1.65V to3.6V,unless otherwise noted.PARAMETER DESCRIPTION MIN MAX UNITS t SCLK SCLK period2161/f CLK t SPWH,L SCLK pulse width,high and low(1)0.8101/f CLK t DIST DIN valid to SCLK rising edge:setup time50ns t DIHD Valid DIN to SCLK rising edge:hold time50ns t DOPD SCLK falling edge to valid new DOUT:propagation delay(2)100ns t DOHD SCLK falling edge to DOUT invalid:hold time0nsFinal SCLK rising edge of command to first SCLK rising edge for register read/writet SCDL241/f CLK data.(Also between consecutive commands.)(1)Holding SCLK low for64falling edges resets the serial interface.(2)Load on DOUT=20pF||100kΩ.Copyright©2007–2010,Texas Instruments Incorporated Submit Documentation Feedback5Product Folder Link(s):ADS1282CLK SCLK DRDY DOUTDIN DGND MCLKM1M0 SYNC MFLAG DGND CAPN CAPPBYPASDGNDDVDDDGNDRESETPWDNVREFPVREFNAVSSAVDDAINN1AINP1AINN2AINP2 12345678910111213142827262524232221201918171615ADS1282ADS1282SBAS418G–SEPTEMBER2007–REVISED DEVICE INFORMATIONTSSOP-28Top ViewTERMINAL FUNCTIONSNAME NO.FUNCTION DESCRIPTIONCLK1Digital input Master clock inputSCLK2Digital input Serial clock inputDRDY3Digital output Data ready output:read data on falling edgeDOUT4Digital output Serial data outputDIN5Digital input Serial data inputModulator clock output;if in modulator mode: MCLK7Digital I/O MCLK:Modulator clock outputOtherwise,the pin is an unused input(must be tied).Modulator data output1;if in modulator mode: M18Digital I/O M1:Modulator data output1Otherwise,the pin is an unused input(must be tied).Modulator data output0;if in modulator mode: M09Digital I/O M0:Modulator data output0Otherwise,the pin is an unused input(must be tied).SYNC10Digital input Synchronize inputMFLAG11Digital output Modulator Over-Range flag:0=normal,1=modulator over-rangeDGND6,12,25,27Digital ground Digital ground,pin12is the key ground pointCAPN13Analog PGA outputs:Connect10nF capacitor from CAPP to CAPNCAPP14Analog PGA outputs:Connect10nF capacitor from CAPP to CAPNAINP215Analog input Positive analog input2AINN216Analog input Negative analog input2AINP117Analog input Positive analog input1AINN118Analog input Negative analog input1AVDD19Analog supply Positive analog power supplyAVSS20Analog supply Negative analog power supplyVREFN21Analog input Negative reference inputVREFP22Analog input Positive reference inputPWDN23Digital input Power-down input,active lowRESET24Digital input Reset input,active lowDVDD26Digital supply Digital power supply:+1.8V to+3.3VBYPAS28Analog Sub-regulator output:Connect1m F capacitor to DGND6Submit Documentation Feedback Copyright©2007–2010,Texas Instruments IncorporatedProduct Folder Link(s):ADS1282Frequency (Hz)-----A m p l i t u d e (d B )----Frequency (Hz)-----A m p l i t u d e (d B )----Frequency (Hz)-----A m p l i t u d e (d B )----Frequency (Hz)-----A m p l i t u d e (d B )----Frequency (Hz)-----A m p l i t u d e (d B )----Frequency (Hz)-----A m p l i t u d e (d B )----ADS1282SBAS418G –SEPTEMBER 2007–REVISED MAY 2010TYPICAL CHARACTERISTICSAt +25°C,AVDD =+2.5V,AVSS =–2.5V,f CLK =4.096MHz,VREFP =+2.5V,VREFN =–2.5V,DVDD =+3.3V,CAPN –CAPP =10nF,PGA =1,High-Resolution Mode,and f DATA =1000SPS,unless otherwise noted.OUTPUT SPECTRUM OUTPUT SPECTRUMFigure 1.Figure 2.OUTPUT SPECTRUMOUTPUT SPECTRUMFigure 3.Figure 4.OUTPUT SPECTRUMOUTPUT SPECTRUMFigure 5.Figure 6.Copyright ©2007–2010,Texas Instruments Incorporated Submit Documentation Feedback7Product Folder Link(s):ADS1282Frequency (Hz)-----A m p l i t u d e (d B )----Frequency (Hz)-----A m p l i t u d e (d B )----Frequency (Hz)-----A m p l i t u d e (d B )----Frequency (Hz)-----A m p l i t u d e (d B )----1020Input Frequency (Hz)-------100105110115*********T o t a l H a r m o n i c D i s t o r t i o n (d B )30401006080507090-55-35T emperature (C)°126125124123122121120S i g n a l -t o -N o i s e R a t i o (d B )-15512545852565105ADS1282SBAS418G –SEPTEMBER 2007–REVISED MAY 2010TYPICAL CHARACTERISTICS (continued)At +25°C,AVDD =+2.5V,AVSS =–2.5V,f CLK =4.096MHz,VREFP =+2.5V,VREFN =–2.5V,DVDD =+3.3V,CAPN –CAPP =10nF,PGA =1,High-Resolution Mode,and f DATA =1000SPS,unless otherwise noted.OUTPUT SPECTRUMOUTPUT SPECTRUMFigure 7.Figure 8.OUTPUT SPECTRUMOUTPUT SPECTRUMFigure 9.Figure 10.THD vs INPUT FREQUENCYSNR vs TEMPERATUREFigure 11.Figure 12.8Submit Documentation FeedbackCopyright ©2007–2010,Texas Instruments IncorporatedProduct Folder Link(s):ADS1282-55-35T emperature (C)°-110115120125130----T o t a l H a r m o n i c D i s t o r t i o n (d B )-1551254585256510501V (V)REF 130125120115110105100S i g n a l -t o -N o i s e R a t i o (d B )23 5.5541V (V)REF -110115120125130----T o t a l H a r m o n i c D i s t o r t i o n (d B )236540.51.0f (MHz)CLK 125124123122121120119S i g n a l -t o -N o i s e R a t i o (d B )1.52.04.53.02.5 3.54.00.51.0f (MHz)CLK -110115120125130----T o t a l H a r m o n i c D i s t o r t i o n (d B )1.52.04.53.02.5 3.54.010100Input Frequency (Hz)130120110100908070C o m m o n -M o d e R e j e c t i o n (d B )1k 10k 1M100k ADS1282SBAS418G –SEPTEMBER 2007–REVISED MAY 2010TYPICAL CHARACTERISTICS (continued)At +25°C,AVDD =+2.5V,AVSS =–2.5V,f CLK =4.096MHz,VREFP =+2.5V,VREFN =–2.5V,DVDD =+3.3V,CAPN –CAPP =10nF,PGA =1,High-Resolution Mode,and f DATA =1000SPS,unless otherwise noted.THD vs TEMPERATURESNR vs REFERENCE VOLTAGEFigure 13.Figure 14.THD vs REFERENCE VOLTAGESNR vs CLOCK FREQUENCYFigure 15.Figure 16.THD vs CLOCK FREQUENCYCMR vs INPUT FREQUENCYFigure 17.Figure 18.Copyright ©2007–2010,Texas Instruments Incorporated Submit Documentation Feedback9Product Folder Link(s):ADS128210100Power-Supply Frequency (Hz)140120100806040200P o w e r -S u p p l y R e j e c t i o n (d B )1k 10k 1M100k-100-75Input Amplitude (% Full-Scale)432101234----I n t e g r a l N o n l i n e a r i t y (p p m )-50-251000255075-55-35T emperature (C)°43210I n t e g r a l N o n l i n e a r i t y (p p m )-15512525456585105Frequency (Hz)---------A m p l i t u d e (d B )-55-35T emperature (C)°3025201510P o w e r (m W )-155125254565851051.01.5f (MHz)CLK 30252015105P o w e r (m W )2.02.5 4.53.0 3.54.0ADS1282SBAS418G –SEPTEMBER 2007–REVISED MAY 2010TYPICAL CHARACTERISTICS (continued)At +25°C,AVDD =+2.5V,AVSS =–2.5V,f CLK =4.096MHz,VREFP =+2.5V,VREFN =–2.5V,DVDD =+3.3V,CAPN –CAPP =10nF,PGA =1,High-Resolution Mode,and f DATA =1000SPS,unless otherwise noted.POWER-SUPPLY REJECTIONvs FREQUENCYINL vs INPUT AMPLITUDEFigure 19.Figure 20.INL vs TEMPERATURECROSSTALK OUTPUT SPECTRUMFigure 21.Figure 22.POWER vs TEMPERATUREPOWER vs CLOCK FREQUENCYFigure 23.Figure 24.10Submit Documentation FeedbackCopyright ©2007–2010,Texas Instruments IncorporatedProduct Folder Link(s):ADS1282分销商库存信息:TIADS1282IPW ADS1282IPWR ADS1282IPWRG4 ADS1282IPWG4ADS1282EVM-PDK。