【例7-3】4x4键盘的VHDl扫描程序[2页]
- 1、下载文档前请自行甄别文档内容的完整性，平台不提供额外的编辑、内容补充、找答案等附加服务。
- 2、"仅部分预览"的文档,不可在线预览部分如存在完整性等问题,可反馈申请退款(可完整预览的文档不适用该条件!)。
- 3、如文档侵犯您的权益，请联系客服反馈,我们会尽快为您处理(人工客服工作时间：9:00-18:30)。
【例7-3】4X4键盘的VHDL扫描程序library ieee;
use ieee.std_logic_1164.all;
entity kbscan is
port
( clk :in std_logic;
Kin :in std_logic_vector(3 downto 0);
kout :out std_logic_vector(3 downto 0);
result :out integer range 0 to 16
);
end kbscan;
architecture bev of kbscan is
signal scans :std_logic_vector(7 downto 0);
signal scan: std_logic_vector(3 downto 0);
signal I : integer range 0 to3;
begin
scans<=kin & scan;
kout<=scan;
process(clk) --进程，产生扫描信号
begin
if (clk'event and clk='1') then
if(i=3) then
i<=0;
else i<=i+1;
end if;
case i is
when 0=> scan<=”1000”;
when 1=> scan<=” 0100”;
when 2=> scan<=” 0010”;
when 3=> scan<=” 0001”;
end case;
end if;
end process;
process(clk) --进程，根据信号译码
begin
if (clk'event and clk='1') then
if(kin=”0000”) then
result<=16;
else
case scans is
when “00011000”=>result<=0;
when “00101000”=>result<=1;
when “01001000”=>r esult<=2;
when “10001000”=>result<=3;
when “00010100”=>result<=4;
when “00100100”=>result<=5;
when “01000100”=>result<=6;
when “10000100”=>result<=7;
when “00010010”=>result<=8;
when “00100010”=>result<=9;
when “01000010”=>result<=10;
when “10000010”=>resu lt<=11;
when “00010001”=>result<=12;
when “00100001”=>result<=13;
when “01000001”=>result<=14;
when “10000001”=>result<=15;
when others =>result<=16;
end case;
end if;
end if ;
end process;
end bev;。