Spartan-3E Starter Kit Board User Guide
Spartan 3E用户指南
Spartan-3E Starter Kit Board User GuideChapter 1: Introduction and OverviewChapter 2: Switches, Buttons, and KnobChapter 3: Clock SourcesChapter 4: FPGA Configuration OptionsChapter 5: Character LCD ScreenChapter 6: VGA Display PortChapter 7: RS-232 Serial PortsChapter 8: PS/2 Mouse/Keyboard PortChapter 9: Digital to Analog Converter (DAC)Chapter 10: Analog Capture CircuitChapter 11: Intel StrataFlash Parallel NOR Flash PROM Chapter 12: SPI Serial FlashChapter 13: DDR SDRAMChapter 14: 10/100 Ethernet Physical Layer Interface Chapter 15: Expansion ConnectorsChapter 16: XC2C64A CoolRunner-II CPLDChapter 17: DS2432 1-Wire SHA-1 EEPROMChapter 1:Introduction and Overview Spartan-3E入门实验板使设计人员能够即时利用Spartan-3E系列的完整平台性能。
设备支持:Spartan-3E、CoolRunner-II关键特性:Xilinx 器件: Spartan-3E (50万门,XC3S500E-4FG320C), CoolRunner™-II (XC2C64A-5VQ44C)与Platform Flash(XCF04S-VO20C)时钟:50 MHz晶体时钟振荡器存储器: 128 Mbit 并行Flash, 16 Mbit SPI Flash, 64 MByte DDR SDRAM连接器与接口:以太网10/100 Phy, JTAG USB下载,两个9管脚RS-232串行端口, PS/2类型鼠标/键盘端口, 带按钮的旋转编码器, 四个滑动开关,八个单独的LED输出, 四个瞬时接触按钮, 100管脚hirose扩展连接端口与三个6管脚扩展连接器显示器: VGA显示端口,16 字符- 2 线式LCD电源:Linear Technologies 电源供电,TPS75003三路电源管理IC市场:消费类, 电信/数据通信, 服务器, 存储器应用:可支持32位的RISC处理器,可以采用Xilinx的MicroBlaze 以及PicoBlaze嵌入式开发系统;支持DDR接口的应用;支持基于Ethernet网络的应用;支持大容量I/O扩展的应用。
SPARTAN-3E说明书第9章
指定 DAC 的输出电压
图 9-2 所示,每个 DAC 的输出的模拟电平对应一个 12 位无符号数值,D[11:0]。此数 值由 FPGA 通过 SPI 接口写入 DAC。
Байду номын сангаас
一个特定数值对应的模拟输出电压由方程 9-1 统一描述。4 个 DAC 输出通道的参考电压
Vref 是不同的。通道 A 和 B 使用 3.3V 参考电压,而 C 和 D 使用 2.5V 参考电压。参考电压 自身存在±5%的公差,所以输出电压会出现相应的差异。
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大连理工大学微电子所 巢明 译
第九章:数模转换器(DAC)
UCF 位置约束 图 9-5 提供了 DAC 接口的 UCF 约束,包括指定的 IO 管脚连接和使用的 IO 标准。
NET "SPI_MISO" NET "SPI_MOSI" NET "SPI_SCK" NET "DAC_CS" NET "DAC_CLR"
图 9-3 SPI 通讯波形
UG230_c9_03_021806
在从设备选择信号 DAC_CS 置低后,FPGA 从 SPI_MOSI 发送数据,高位先发。LTC2624 在 SPI_SCK 的每个上升沿抓取输入信号(SPI_MOSI)。数据必须在时钟上升沿前至少 4ns 有效。
LTC2624 DAC 在 SPI_SCK 的每个下降沿发送数据。FPGA 在 SPI_SCK 的下一个上升沿抓取数 据。FPGA 必须在 DAC_CS 置低后 SPI_SCK 的第一个上升沿处读取 SPI_MOSI 的数据,否则 数据的第 31 位丢失。
6 针 DAC 接头(J5)
LTC2624 型 4 通道 DAC
SPARC Enterprise M3000服务器初次启动和启动最小步骤指南说明书
This guide describes the minimum steps you must perform to power on and boot your server for the first time.Before installing the SPARC Enterprise M3000server,check for late-breaking information about patches and known rmation found in the SPARC Enterprise M3000/M4000/M5000/M8000/M9000Servers Product Notes supersedes the information in this document.Detailed installation information can be found in the SPARC Enterprise M3000Server Installation Guide ,which is available at the documentation web site:/technetwork/documentation/sparc-mseries-servers-252709.htmlSafety and Compliance InformationBefore performing an installation,refer to the following documents for safety information regarding the SPARC Enterprise M3000Server :■Important Legal and Safety Information –Printed document included in the ship kit.■SPARC Enterprise M3000Server Safety and Compliance Manual –Available online at the documentation web site.Prepare the Site for Installation1.Verify power,air conditioning,and floor area requirements.See the SPARC Enterprise M3000Server Site Planning Guide.2.Check the delivered items against the “LIST OF ATTACHMENT”that came with the server.Register the System1.Locate the serial number for your system or the customer information sheet that came with the system.2.Go to the following web site to register your system:/service/warranty/index.xml#regSPARC Enterprise M3000 ServerGetting Started GuideInstall Optional ComponentsBefore installing the server into the rack,you must first install any optional components that you ordered with the server,such as DIMMs,PCIe cards,and so on.Refer to the SPARC Enterprise M3000Server Service Manual for the instructions on installing optional components.Mount the System In a RackFor rackmounting instructions,refer to the instructions in the SPARC Enterprise Rack Mounting Guide (online)and the Rail Kit Instructions which ships with the rails.Installation Steps for the SPARC Enterprise M3000ServerFor quick installation and configuration,follow these steps.For more detailed information,see the SPARC Enterprise M3000Server Installation Guide .Caution –Make sure that the AC power source circuit breaker is in the OFF position beforeconnecting the AC power cords.▼Connect the Cables1.Connect the power cords to the power supply units on the rear panel of the server.2.Connect the power cords to the AC power supply system.This server is shipped with grounding-type (three-wire)power cords.Always connect the power cords into grounded power outlets.FIGURE 1Rear Panel of the ServerFigure Legend Location NumberComponent1Power supply unit 2PCIe slot3Serial port (for XSCF)4LAN port (for XSCF)5Gigabit Ethernet (GbE)port (for OS)12345e the RS232C cable (serial cable,RJ-45to DB-9)supplied with the server in the Accessory Kit,andconnect the administration console to the serial port (see FIGURE 1,#3)on the rear panel of the server.You can use any of the following devices with a DB-9serial port as the administration console:ASCII terminal,workstation,terminal server (or a patch panel connected to a terminal server),or personal computer.A Serial-to-USB port adapter may be required for laptops.▼Initialize the XSCFThe following steps will log in to the XSCF Shell and initialize the XSCF settings.XSCF is a system control facility to set up and control the server.1.Set the mode switch on the operator panel to the Service mode ().The key for the operator panel is supplied with the server.FIGURE 2Operator Panel2.Turn the AC power source circuit breaker to "ON".After AC power is turned on,the server starts the XSCFinitialization that can take up to 5or more minutes.When the initialization completes,the XSCF STANDBY LED ()on the operator panel lights.3.After the XSCF initialization completes,enter default at the login prompt.Figure Legend Location No.Name1POWER LED 2XSCF STANDBY LED 3CHECK LED 4Power button5Mode switch (Key switch)login:default123454.Operate the mode switch within one minute according to the messages to change the mode switch.A login authentication timeout will occur after one minute.5.Confirm that the XSCF Shell prompt is displayed on the administration console.6.Initialize the XSCF settings.The following are the required settings for installation.For details on the setting procedure,see the SPARC Enterprise M3000/M4000/M5000/M8000/M9000Servers XSCF User’s Guide .7.Log in to the XSCF Shell with the user account and password that were set in Step 6.▼Power On the Server1.The following steps will power on the server.a.Confirm that the mode switch on the operator panel is set to the Service mode ().b.From the XSCF Shell,enter the following console command:This switches you from the XSCF Shell to the domain console.c.Confirm that the XSCF STANDBY LED()on the operator panel is on.Change the panel mode switch to Locked and press return...Leave it in that position for at least 5 seconds.Change the panel mode switch to Service, and press return...XSCF>SettingsCommandRegistration of an XSCF user account,password,and user privileges Registration of a user account of a field engineer (FE)(for maintenance)adduser ,password ,setprivileges Date and time settingssetdate ,settimezone Confirmation of the XSCF host public key showsshSSH/telnet settingssetssh ,settelnet Network interface,routing,and DNS-related settings **To apply the settings,the XSCF unit must be reset with the applynetwork and rebootxscf commands.setnetwork,setroute ,setnameserver etc.Domain-SP Communication Protocol (DSCP)settings ††To apply the settings,the XSCF unit must be reset with the rebootxscf commands.Altitude administration setting ‡‡To apply changes made with the setdualpowerfeed command,power to the server must be completely disconnected and thenreconnected (all power cords must be disconnected and then reconnected).Wait at least 30seconds before reconnecting the power cords to the server.setaltitude Dual power feed option settingsetdualpowerfeedXSCF>console -d 0Connect to DomainID 0?[y|n]:yd.Push the Power button ()on the operator panel to power on the server.The server starts and begins a self-diagnosis.Confirm that no error messages are displayed on theadministration console during the boot process.e.Confirm that the POWER LED()on the operator panel is turned on.f.Confirm that ok prompt is displayed on the domain console.The ok prompt is displayed after the self-diagnosis completes.g.Press the Enter key,and then press the"#"and“.”(period)keys.This switches you from the domain console to the XSCF Shell.h.From the XSCF Shell,execute the fmdump command or showlogs command,and confirm that noerrors are found.2.Connect the system control network to a LAN port(see FIGURE1,#4)on the rear panel of the server withan Ethernet cable.3.Verify the hardware configuration by using the following commands on the administration consoleconnected to the system control network.Command Prompt Descriptionshowhardconf XSCF Shell All the components installed in the server and their statuses are displayed.Confirm that no asterisk(*)is displayed in front of any FRUs.showhardconf-u XSCF Shell Check the number of FRUs mounted on the server against the“PRODUCTTEST RECORD“that came with the server.probe-scsi-all ok Prompt Confirm that the CD-RW/DVD-RW drive unit and hard disk driveinstalled in the server are recognized.show-devs ok Prompt Confirm that each installed PCIe card is recognized.To switch from the XSCF console to the ok prompt,enter the console-d0command.To switch from the ok prompt to the XSCF console,press the enter key,and then press the"#"and"."(period)keys.4.Install additional hardware or peripheral devices.If not needed,proceed to the Step5.For details on how to add optional devices,such as additional memory or an additional PCIe card,see the SPARC Enterprise M3000Server Service Manual.To add an additional storage device or other peripheral device,see the manual supplied with the device.5.The following steps will connect the domain to the user network.If you isolate the domain from thenetwork,proceed to the Step1.The user network is a network which enables users to access the domain.a.Connect one end of an Ethernet cable to a GbE port(for the OS)(see FIGURE1,#5)on the rear panel ofthe server.You can connect the Ethernet cable to a GbE port(for the OS)or to the LAN port on a LAN card mounted in a PCIe slot(see FIGURE1,#2).b.Connect the other end of the Ethernet cable to the customer’s network environment.▼Boot the Oracle Solaris Operating System1.The following steps will boot the Oracle Solaris Operating System.a.From the ok prompt of the domain console,execute the boot command.ok bootb.After the login prompt is displayed,log in with root account.2.Confirm the status of hardware operations and device connection by using the Oracle VTS software.For details,see the Oracle VTS user’s guide.3.Make the initial settings for the domain.For details,see the SPARC Enterprise M3000/M4000/M5000/M8000/M9000Servers Administration Guide. SPARC Enterprise M3000Server Related DocumentationSystem Planning and Site Preparation•SPARC Enterprise M3000Server Overview Guide•SPARC Enterprise M3000Server Site Planning GuideSystem Installation•SPARC Enterprise Equipment Rack Mounting Guide•SPARC Enterprise M3000Server Installation Guide Administration•SPARC Enterprise M3000/M4000/M5000/M8000/M9000Servers ProductNotes•SPARC Enterprise M3000/M4000/M5000/M8000/M9000ServersAdministration Guide•SPARC Enterprise M3000/M4000/M5000/M8000/M9000Servers XSCFUser’s Guide•SPARC Enterprise M3000/M4000/M5000/M8000/M9000Servers XSCFReference ManualRepair and Troubleshooting•SPARC Enterprise M3000Server Service ManualContact InformationTopic URLTechnical support Patch and firmware updates Copyright©2008,2011,Oracle and/or its affiliates.All rights reserved.FUJITSU LIMITED provided technical input and review on portions of this material.Copyright©2008,2011,Oracle et/ou ses affiliés.Tous droits réservés.Entrée et revue tecnical fournies par FUJITSU LIMITED sur des parties de ce matériel.Part No.: 821-3055-11Manual Code: C120-E549-04ENFebruary 2011。
SPARTAN-3E说明书第13章
Spartan -3E 开发板包括一个Micron Technology 公司的512Mbit (32Mx16)容量16位接口DDR SDRAM (MT46VM16),如图13-1所示。
DDR SDRAM 的所有管脚都连接到FPGA 的I/O Bank3。
I/O Bank3和DDR RAM 需要的2.5V 电源由LTC3412稳压芯片从板上5V 电源得到。
FPGA 和DDR SDRAM 共用的1.25V 的参考电压由2.5V 经电阻分压得到。
图13-1:Micron 512Mbit DDR SDRAM 的FPGA 接口DDR RAM 接口的所有信号都接有终端电阻。
第十三章DDR SDRAM UG230_c13_01_022406差分时钟脚SD_CK_P被反馈到FPGA的I/O Bank0的B9脚,以使FPGA的数字时钟管理器(DCM)获得最好效果。
MicroBlaze处理器的OPB DDR控制器需要连接这个时钟路径。
MicroBlaze处理器的OPB DDR控制器的IP核的相关文档可从EDK8.1i开发软件内获得(见107页“相关资源”)。
DDR SDRAM的连接表13-1显示FPGA与DDR SDRAM的连接。
表13-1 FPGA与DDR SDRAM的连接类型DDR SDRAM信号名FPGA管脚号功能SD_A12 P2SD_A11 N5SD_A10 T2SD_A9 N4SD_A8 H2SD_A7 H1SD_A6 H3SD_A5 H4SD_A4 F4SD_A3 P1SD_A2 R2SD_A1 R3地址SD_A0 T1地址输入表13-1 FPGA与DDR SDRAM的连接(续)种类DDR SDRAM信号名FPGA管脚号功能SD_DQ15 H5SD_DQ14 H6SD_DQ13 G5SD_DQ12 G6SD_DQ11 F2SD_DQ10 F1SD_DQ9 E1SD_DQ8 E2SD_DQ7 M6SD_DQ6 M5SD_DQ5 M4SD_DQ4 M3SD_DQ3 L4SD_DQ2 L3SD_DQ1 L1数据SD_DQ0 L2数据IOSD_BA1 K6SD_BA0 K5Bank地址输入SD_RAS C1SD_CAS C2SD_WE D1命令输入SD_CK_N J4SD_CK_P J5差分时钟输入SD_CKE K3 时钟使能输入,高电平有效SD_CS K4 片选输入,低电平有效SD_UDM J1 SD_LDM J2 数据屏蔽。
SPARTAN-3E说明书第5章
表 5-2 LCD/ StrataFlash 控制的相互影响
SF_CE0 SF_BYTE LCD_RW
操作
1
X
X
StrataFlas 禁用,完全的读写 LCD 能力
X
X
0
LCD 读操作禁用,完全的读写 StrataFlash
能力(译者:原文有误)
X
0
X
StrataFlash 处于字节(x8)位宽模式。高
NET "LCD_RW" LOC = "L17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
# LCD的4位数据接口与StrataFlash共享。
NET "SF_D<8>" LOC = "R15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
Function Set
0
Set CG RAM Address
0
Set DD RAM Address
第五章:字符型 LCD 显示屏
如果 StrataFlash 存储器处于字节(x8)位宽模式(SF_BYTE=Low),FPGA 应用程序具有完全 的同时读写 LCD 和 StrataFlash 存储器的能力。在字节位宽模式,StrataFlash 存储器不使用 SF_D<15:8>数据线。
UCF 位置约束
Spartan-3E Starter Kit Board User Guide UG230 (v1.0) March 9, 2006
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大连理工大学微电子所 巢明 译
EDK实验教程中文翻译lab4mb
实验4 创建基本应用程序Targeting MicroBlaze on the Spartan-3E Starter Kit创建基本的应用程序实验: PowerPC 处理器实验介绍本实验指导我们通过处理器创建一个基本的应用程序。
应用程序将 控制Spartan-3E starter kit 上的LEDs 。
你将添加一个 OPB BRAM 控制器,和修改OPB BRAM 中原有的连接部分插入文本。
最后你将会发现系统就像你当初设计的一样运行。
实验目的完成本次实验,你将具有以下会达到以下目的: ∙ 添加一个外部 RAM 控制器∙ 编写一个访问外围设备IP 的基本应用程序 ∙ 更新连接文本∙ 划分可执行的部分到 LMB 和OPB 存储空间 ∙ 生成一个位文件∙下载位文件并在 Spartan-3E 开发板上检验实验步骤前三个实验为处理器系统定义了硬件。
这个实验由几个步骤组成,包括添加一个存储控制器,编写一个访问Spartan-3E 开发板上的LED 的基本应用软件。
以下给出的每个总体步骤下面,你都可以发现有一步一步的详细操作说明和的图解说明。
如果你能完成某一步骤,你可以跳过那些详细的说明,直接进入下一步。
更新项目 步骤1创建在 d:\Lab\下创建 lab4mb 文件夹。
可以按照前三个实验的流程创建一个工程,也可以直接把lab3内的文件拷贝到此目录。
启动 Xilinx Platform Studio (XPS) ,打开C:\xup\embedded\labs\lab4工程 (如果你想继续你的设计)。
❶ 如果你想继续你的设计,那么C:\xup\embedded\ppc\labs 目录下新建一个lab4文件夹,在拷贝lab3的文件到此文件夹。
❷ 点击 Start →Programs → Xilinx Platform Studio 8.2i→Xilinx Platform Studio 打开XPSStep 2: Create a BSPStep 3: Update a Basic CProgramStep 4: Linker Script❸选择Open Recent Project,点击 OK,打开C:xup\embedded\ppc\labs\lab4❹选择system.xmp打开工程❺从IP目录中添加下列IP到嵌入式设计中∙opb_bram_if_cntlr 1.00.a∙bram_block 1.00.a❻更改实例的名称,对照下图建立连接。
Spartan-3E开发板用户说明
附录:Spartan-3E开发板用户说明图1Spartan-3E多用途EDA实验开发平台(以下简称S3E实验平台),如图1所示,核心器件为XILINX公司的Spartan TM-3E器件XC3S500E,逻辑容量为50万门。
Spartan TM-3E借助于低成本的CPL,90nm工艺,满足了对大批量、I/O为核心的可编程逻辑解决方案的行业需求,是业界成本最低、性能最好的FPGA之一。
S3E实验平台在FPGA周围提供了丰富的资源,包括串口、PS/2接口、VGA接口、以太网接口、LED、LCD液晶显示、拨码旋钮开关和按钮、EPROM、A/D、D/A转换、电源、时钟等。
S3E的用户可以在PC机上通过USB JTAG电缆对FPGA进行配置,也可以通过SPI FLASH和NOR FLASH来配置。
1、S3E实验平台性能与特点●XILINX XC3S500E Spartan-3E FPGA:提供了最多232个I/O引脚和10000个逻辑单元。
●XILINX 4Mbit Flash配置PROM。
●XILINX XC2C64A CoolRunner系列CPLD:提供用户使用或辅助FPGA配置。
●64MByte、16位数据宽度、100MHz的DDR SDRAM接口。
●16MByte 并行INTEL公司的NOR FLASH:可存储FPGA配置信息或MicroBlaze指令序列。
●16Mbits ST半导体的SPI 串行FLASH:可存储FPGA配置信息或MicroBlaze指令序列。
●2行,每行可显示16个字符的LCD:用来显示FPGA输出信息。
●PS/2接口:用来外联键盘或鼠标,扩展输入设备●VGA接口:可显示64种颜色。
●10/100M以太网接口:提供了以太网物理层接口,便于MAC层IP的验证。
●两个标准RS232接口:可方便连接PC和其他工业设备进行数据传输。
●USB的下载接口配置接口。
●板载50MHz晶体振荡器。
Spartan-14.7平台与ISE软件的入门
Spartan-3平台与ISE软件的入门一、快速浏览Spartan-3E Starter Kit的用户指南,便于以后进行内容查找。
中文用户指南:Spartan-3E Starter Kit Board User Guide.mht英文用户指南:Spartan-3E Starter Kit Board User Guide.pdf二、ISE软件安装。
根据资料自学完成安装(在个人电脑上),ISE推荐版本:14.7。
注意需要破解(即提供license)。
三、ISE软件的初次使用。
在Spartan-3E开发板上,使用ISE软件,完成一个最基本工程的建立、编程、仿真、下载实现。
3.11)运行ISE Design Suite软件,界面如下2)新建工程(可参考图书:Xilinx FPGA开发实用教程)File New Projecta)设置顶层文件类型Top-level source type为Schematic(原理图)b)选择工程的保存位置Location和工作目录Working Directory为fpgaxunlianc)为工程取名,如:xunlian1点击Next进行下述设置根据观察我们使用的Spartan 3E开发板上的FPGA芯片上的字,可知目标FPGA芯片的属性如下芯片系列(Family):Spartan3E芯片型号(Device):XC3S500E芯片封装(Package):FG320速度等级(Speed):-4(注:XILINX的FPGA,值越大,速度等级越高)综合工具(Systhesis Tool)选择ISE自带的XST仿真工具(Simulator)选择ISE自带的Isim编程语言(Preferred Language)选择Verilog然后,点击Next观察,然后,点击Finish 3)在工程中加入文件右键点击“xc3s500e-4fg320”,执行“New Source”如上图,先建立一个原理的源文件,取名为Topsch,注意“Add to project”复选框需选中,然后点击Next观察,然后点击Finish,到此建立一张空白原理图。
Spartan-14.7平台与ISE软件的入门资料
Spartan-3平台与ISE软件的入门一、快速浏览Spartan-3E Starter Kit的用户指南,便于以后进行内容查找。
中文用户指南:Spartan-3E Starter Kit Board User Guide.mht英文用户指南:Spartan-3E Starter Kit Board User Guide.pdf二、ISE软件安装。
根据资料自学完成安装(在个人电脑上),ISE推荐版本:14.7。
注意需要破解(即提供license)。
三、ISE软件的初次使用。
在Spartan-3E开发板上,使用ISE软件,完成一个最基本工程的建立、编程、仿真、下载实现。
3.11)运行ISE Design Suite软件,界面如下2)新建工程(可参考图书:Xilinx FPGA开发实用教程)File New Projecta)设置顶层文件类型Top-level source type为Schematic(原理图)b)选择工程的保存位置Location和工作目录Working Directory为fpgaxunlianc)为工程取名,如:xunlian1点击Next进行下述设置根据观察我们使用的Spartan 3E开发板上的FPGA芯片上的字,可知目标FPGA芯片的属性如下芯片系列(Family):Spartan3E芯片型号(Device):XC3S500E芯片封装(Package):FG320速度等级(Speed):-4(注:XILINX的FPGA,值越大,速度等级越高)综合工具(Systhesis Tool)选择ISE自带的XST仿真工具(Simulator)选择ISE自带的Isim编程语言(Preferred Language)选择Verilog然后,点击Next观察,然后,点击Finish 3)在工程中加入文件右键点击“xc3s500e-4fg320”,执行“New Source”如上图,先建立一个原理的源文件,取名为Topsch,注意“Add to project”复选框需选中,然后点击Next观察,然后点击Finish,到此建立一张空白原理图。
Spartan 3E用户指南的中文翻译part2
Chapter 4:FPGA Configuration Options入门实验板支持多种FPGA的配置方法:通过JTAG、USB接口直接将设计下载到FPGA。
板上的USB-JTAG逻辑也提供对Platform Flash PROM 和Xilinx XC2C64A CPLD的在线编程。
对板上的4 Mbit Xilinx XCF04S serial Platform Flash PROM进行编程,然后采用主串行模式对Platform Flash PROM上的存储信息配置到FPGA。
对板上的16 Mbit ST Microelectronics SPI serial Flash PROM进行编程,然后采用SPI模式对SPI serial Flash PROM上的存储信息配置到FPGA。
对板上的128 Mbit Intel Strata Flash parallel NOR Flash PROM进行编程,然后采用BPI Up 或BPI Down对Strata Flash parallel NOR Flash PROM上的存储信息配置到FPGA。
接着,可以采用Spartan-3E FPGA’s Mult iBoot 模式以两种不同的配置方式对一个FPGA进行轮流下载。
图4.1给出了USB下载/编程接口和永久存储器的位置。
图4.2是多种配置方式的一些细节内容。
当上电或PROG按钮被按下时,跳线的配置方式决定了FPGA采用哪种配置方式。
当FPGA成功配置时,DONE管脚的LED亮。
4 Mbit Xilinx Platform Flash PROM为FPGA的JTAG提供了一个简单的可编程配置存储单元。
来自Platform Flash PROM的FPGA配置采用主串行模式。
采用BPI Up、BPI Down或MultiBoot配置方式以及StrataFlash parallel Flash PROM对FPGA进行下载时,64-macrocell XC2C64A CoolRunner II CPLD为其提供了额外的存储空间。
SPARC Enterprise M3000 服务器入门指南说明书
SPARC Enterprise M3000 服务器入门指南本指南介绍首次打开服务器电源并引导服务器所必须执行的基本步骤。
安装 SPARC Enterprise M3000 服务器之前,请检查关于修补程序的最新信息以及已知问题。
《SPARC EnterpriseM3000/M4000/M5000/M8000/M9000 服务器产品说明》中的信息优先级高于本文档中的信息。
《SPARC Enterprise M3000 服务器安装指南》中介绍了详细的安装信息,您可以通过文档 Web 站点获取该指南:/technetwork/documentation/sparc-mseries-servers-252709.html安全与法规遵从性信息执行安装之前,请参阅以下文档了解有关 SPARC Enterprise M3000 服务器的安全信息:■重要的法律和安全信息-产品包装箱中随附了此文档的印刷版本。
■《SPARC Enterprise M3000 Server Safety and Compliance Guide》-可通过文档 Web 站点联机获取该文档。
准备场地进行安装1.检验电源、空调和占地面积要求。
请参见《SPARC Enterprise M3000 服务器场地规划指南》。
2.对照服务器附带的“附件列表”检查交付的物品。
注册系统1.找到系统的序列号或者系统随附的客户信息表。
2.请访问以下 Web 站点注册系统:/service/warranty/index.xml#reg安装可选组件将服务器安装到机架中之前,首先必须安装随服务器一起订购的任何可选组件,如 DIMM、PCIe 卡等。
有关安装可选组件的说明,请参阅《SPARC Enterprise M3000 Server Service Manual》。
将系统装配到机架中有关机架装配说明,请参阅《SPARC Enterprise 设备机架装配指南》(联机版本)和滑轨随附的滑轨工具包说明。
西博思执行机构说明书
概述
附图:功能原理 第6页
Y070.019/CN
使用说明书 SIPOS 5 Flash ECOTRON
2 概述
2
SIPOS 5 系列执行机构包含两个主要部份:齿轮 单元和电子单元。 详细情况见第 8 章“备件”。备件
齿轮单元主要由下列零部件组成:
1 连接电子单元的圆形插头 2 电机 3 齿轮箱 4 信号齿轮单元(不适用于 2SG5)及外罩 5 手动装臵(手柄或手轮) 6 取决于不同型号的可能的机械附件
使用说明书
电动执行机构
SIPOS 5 Flash
ECOTRON 经济型
2013 年 08 月版 如有变化,恕不另行通知!
Y070.019/CN
目录
使用说明书 SIPOS 5 Flash ECOTRON
目录
1 1.1 1.2 1.3 1.4 1.5 2 2.1 2.2 2.3 3 3.1 3.2 3.3 4 4.1 4.2 4.3 4.4 综合说明 ............................................... 3 安全操作说明 ........................................ 3 运输和存储 ........................................... 4 处理和回收 ........................................... 4 使用说明书注意事项 ............................. 4 增补的使用说明书................................. 5 概述 ...................................................... 6 功能原理 ............................................... 6 零部件 .................................................. 7 框图(电气连接)................................. 8 安装和连接 ........................................... 9 安装在阀门/传动装臵上 ........................ 9 电气连接 ............................................. 10 分体安装 ............................................. 14 操作使用说明...................................... 15 手柄,手轮 ......................................... 15 就地操作面板,显示 ........................... 16 远端控制 ............................................. 18 COM-SIPOS ....................................... 18 5.5 6 7 7.1 7.2 8 8.1 8.2 8.3 9 5 5.1 5.2 5.3 5.4 调试.................................................... 19 综合说明............................................. 19 设定转速,关断力矩 ........................... 20 设定关方向,关断模式 ....................... 23 通过 COM-SIPOS 设定其他同阀门有关 的参数 ................................................ 26 设定信号齿轮单元的比率和末端位臵 .. 27 状态和故障信号 .................................. 34 维护,检查,服务 .............................. 36 概述 .................................................... 36 润滑间隔和润滑剂 .............................. 37 备件.................................................... 38 概述 .................................................... 38 备件清单............................................. 38 分解图 ................................................ 39 关键词索引 ......................................... 47
SPARTAN-3E说明书第2章
滑动开关位置和符号Spartan -3E 开发板有4个滑动开关,如图2-1所示。
开关位于板的右下角,编号为SW3到SW0。
SW3在最左边,SW0在最右边。
SW3 SW2 SW1 SW0 (N17) (H18) (L14) (L13)图2-1 四个滑动开关操作当开关置于“上”,为“开”状态,FPGA 的管脚被连接到3.3V ,逻辑为“高”。
当开关置于“下”,为“关”状态,FPGA 的管脚被连接到地,逻辑为“低”。
开关的典型机械振颤时间为2ms ,板上没有去抖动电路,但这类电路可以很容易的由板上的FPGA 编程完成。
UCF 位置约束图2-2 提供了4个滑动开关的UCF 约束,包括了指定的I/O 管脚和使用的I/O 类型标准。
上拉(PULLUP )电阻不是必须的,但它定义了当开关滑动到中间位置时的输入值。
第二章开关,按钮与旋钮 上 下NET "SW<0>" LOC = "L13" | IOSTANDARD = LVTTL | PULLUP ; NET "SW<1>" LOC = "L14" | IOSTANDARD = LVTTL | PULLUP ; NET "SW<2>" LOC = "H18" | IOSTANDARD = LVTTL | PULLUP ; NET "SW<3>" LOC = "N17" | IOSTANDARD = LVTTL | PULLUP ;图2-2 滑动开关的UCF 约束按钮开关位置和符号Spartan -3E 开发板有4个按钮开关,如图2-3所示。
开关位于板的左下角,编号为BTN_NORTH ,BTN_EAST ,BTN_SOUTH ,BTN_WEST 。
连接开关的FPGA 管脚见图2-3的括号内,以及图2-5的UCF 文件中。
LabVIEW FPGA SPARTAN3E Starter Kit 实验指南说明书
Lab 1:Implementing a Boolean function in LabVIEW FPGA on the Xilinx SPARTAN-3E BoardKeywords: LabVIEW, LabVIEW FPGA, Xilinx SPARTAN3E Starter Kit, Implementing a Boolean Function.IntroductionWelcome to Lab1 in the serie of programming a SPARTAN3E Starter Kit by use of LabVIEW FPGA. These labs are created by Vincent Claes. If you encounter problems using this labs or want some advice/consultancy on LabVIEW and especially LabVIEW FPGA you can always contact the author.These labs are free to use however to show respect to the author please email him when you use them with your contact details (feedback is also welcome).Contact Information:Vincent Claes**********************/in/vincentclaesSoftware Requirements:•LabVIEW 8.5 or above•LabVIEW 8.5 FPGA module•XUP Spartan3E starter board: download for free from: https:///nicif/us/infolvfpgaxilsprtn/content.xhtmlHardware Requirements:•Xilinx Spartan3E Starter kit:/products/devkits/HW-SPAR3E-SK-US-G.htm•User manual:/support/documentation/boards_and_kits/ug230.pdfGetting StartedWhen you want to use this labs you have to setup your board. This labs are written for the Xilinx SPARTAN3E Starter Kit soit is quite interesting to read the user manual of the board. Be sure to plug in the USB cable, plug in the Power cord and Switch the board on before starting the lab.Step 1: Starting LabVIEWThe first step is to start the National Instruments LabVIEW 8.5 environment.Step 2: Create a LabVIEWprojectAfter we have started the LabVIEW environment we get the following screen:We have to create an Empty Project where we will add the Xilinx Spartan3E starter board on as a hardware target. In a future lab I will explain how we can create a HOST vi (this is a LabVIEW application that runs on a desktop PC) that communicates with a LabVIEW FPGA vi.Step 3: Add the Spartan3E board as a hardware targetThe next screen shows the Project Explorer view of the Empty Project that we just created.Now we have to add the Spartan3E starter board as a Hardware target. For this we do a “right click” on “My Computer” in the Project Explorer view. We select “New” and then “Targets and Devices”.In the screen that now appears we have to select the XUP starter board. Select “New target or device”.A list of “Targets and Devices” will be shown. You have to scroll down till the end and select “Spartan-3E Starter board” from the “Xilinx university Program” map.This will add the FPGA Target to the Project Explorer view. You see this target is placed under “My Computer”.Step 4: Adding FPGA I/OThe next step we make is adding “FPGA I/O’s” that we will use in this project to the Project Explorer view. For this you have to “right click” the FPGA Target you added in Step 3. Select “New” “FPGA I/O”.The next screen will appearOn the left side of this screen you see all the resources that are available on the Spartan-3E board. To add FPGA I/O to the project you have to select it in the left window and press the “Add” button. Now the FPGA I/O that you wanted to add has to show up in the window on the right side. For this project you have to add SW0, SW1 and LED0 to the project.If we go back to the “Project Explorer” view we see the FPGA I/O that we have added. With this I/O we will implement an Exclusive-OR function.Step 5: Creation of the FPGA VI The next step is the creation of a hardware program that runs on the Xilinx Spartan-3E hardware target.For this we do again a “right mouse click” on the FPGA target in the “Project Explorer” view. Select “New” VI. Be sure that you have right clicked the FPGA target and not “My Computer” because otherwise you will be creating a vi that runs not in Hardware (on the FPGA) but on your computer.This step will open the Front Panel and Block Diagram of the FPGA VI you just started creating. The code we will be implementing is an Exclusive-OR function. The view I always use in LabVIEW is the “tile left and right” view. You can select this by going to “Window” and then selecting “Tile Left and Right”. We you did all the steps right you have to see in the left corner of either the Front Panel or Block Diagram the name of the vi you created with /FPGA target behind it. This shows that the vi you are creating is aimed at the FPGA target.For now have a look at the “Functions Palette” which you can see when you click in the “Block Diagram” on “View” and then “Functions Palette”. You see that the available functions are different. You see “FPGA I/O”, “Memory & Fifo” and “FPGA Math & Analysis”. Those are specially for using on FPGA targets.Click in the Functions Palette on “FPGA I/O”.Place 2 I/O Nodes on the Block Diagram of the LabVIEW FPGA vi.Now do a “right mouse click” on one of the I/O Nodes. Select “Select FPGA I/O” then “Slide Switches” then “SW0”.You should see that the I/O node is filled with a green “SW0” label. The color green is standing for a Boolean variable. This is correct since a slider switch can only have the value of true or false.This project will be using 2 slider switches so we have to add another FPGA I/O. For this do a right click on the FPGA I/O you just filled with SW0. Select “Add Element”.The following is the screen you should have now:Try now to fill the I/O Item yourself with SW1. Try also to fill the I/O Node that is empty with LED0. This is done by right mouse clicking it then selecting “Select FPGA I/O”. In the option of “Select FPGA I/O” you see only the resources you added in the “Project Explorer” view to the project.The following screen will be created:Now we will as an example implement an exclusive-OR Boolean function into the FPGA. From the “Functions Palette” select “Programming” “Boolean” and look for the “Exclusive Or” function. Place this one on the Block diagram.Wire the “SW1” and “SW0” FPGA I/O to the Exclusive-OR inputs. Wire the output of the function to “LED0”.Your code has to look like this:When you implement the function like presented above the function will run only once. We would like to implement it that it runs continuously. For this we place a “While Loop” around it and we wire a Boolean “False constant” to the “stop condition” of this loop. This you normally don’t do on a PC because this will put your PC in a never ending loop. The “While Loop” you find on the “Functions Palette”.Now it is time to save your vi that you created for the FPGA. You do this by selecting “New” “Save As” in either the “Front Panel” or the “Block Diagram”.The name I usually use is FPGA_VI for the vi running on the FPGA.In “Project Explorer” you should see the followingIt is also a good idea to save the project file for this select in the “Project Explorer” “New” then “Save As”.I did use the name Lab1_BooleanLogicStep 5: Running the FPGA VIThis step is where we created the vi for. We designed it to run on an target. For starting the executing of this vi we have to press the “Run” arrow on either the “Block Diagram” or on the “Front Panel”.The first step LabVIEW does is “Generating Intermediate Files”. This files will be send to the Xilinx Synthesis Tools. But this is not important for us as application developers.In this step you see that LabVIEW is starting the “Compile Server”. This “Compile Server” can also be executed on another “more powerful” machine that is in your network (for this please see the information on the NI website.When the “Bitstream generation is complete” message appears and the server status is set to “Idle…” the Xilinx synthesis tools have done their job.You get a “Successful Compile Report” where you can see the implementation details of your code. You have to Press “Ok”.After you have pressed the “Ok” button your VI starts running on the FPGA target. It is indicated on your screen by the black “Run” arrow.Try to play with the switches SW0 and SW1 on the Spartan3E starter board you will see they have an XOR function; the led LD0 will be on when one of those switches is turned on.The problem with this implementation is that when you stop the VI the function is erased on the LabVIEW FPGA board. If you don’t want this effect you can download this VI to the FLASH of the Xilinx Spartan3E starter board (see next step).Step 6: Implementing the LabVIEW VI into FlashFor implementing your VI into the Flash on the Spartan3E Starter board you have to do some things. The first thing is setting the option of “Run when loaded to FPGA” on. For this you have to go to “Project Explorer”. Then “Right Mouse click” on your FPGA target. Select the “Properties” option.In this screen you see the option “Run when loaded to FPGA”. Make sure you select this option. Then press the “OK” button.We must recompile the VI because we made a change. Do this by going to the “Project Explorer” view. Click with the “Right Mouse button” on the FPGA VI you have created for thisproject. Select the “Compile” option.You will see that there are some previous explained steps executed. When the “Successful Compile Report” shows up youhave to press the “OK” button. Now we will download it to theFlash. For this you have to go to the “Project Explorer” view and do a “right mouse click” on the FPGA VI you created. Then choosing the “Download VI to Flash Memory” option will start downloading it to the Spartan-3E starter board flash.When this box appears the LabVIEW FPGA VI is downloaded to the Flash.Now you can pull out the USB cable out of the Xilinx Spartan3E board and press the PROG button on this board. You will see that the function is implemented in it.Enjoy.Vincent ClaesXIOS Hogeschool LimburgDepartment of Industrial Sciences and TechnologyUniversitaire Campus - Agoralaan – Gebouw HB-3590 DiepenbeekBelgium*********************tel.: +32 11 26 00 39fax: +32 11 26 00 54mobile: +32 478 35 38 49。
BIOSTAR A770E3 主板 设置手册
A770E3 设置手册FCC条款依照FCC条款第15部分的规定,本装置已经通过测试并且符合Class B级数字装置的限制。
此条款限制了在安装过程中可能造成的有害射频干扰并提供了合理的防范措施。
本装置在使用时会产生无线射频辐射,如果没有依照本手册的指示安装和使用,可能会与无线通讯装置产生干扰。
然而,并不保证在特定的安装下不会发生任何干扰。
如果关闭和重新开启本设备后,仍确定本装置造成接收广播或电视的干扰,用户可以使用以下列表中的一种或多种方法来减少干扰:●重新安装或调整接收天线。
●增加本设备与接收设备之间的距离。
●连接设备连接到不同的插座以便于两个设备使用不同的回路。
●咨询经销商或富有经验的无线电工程师,以获得更多资讯。
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A770E3 设置手册防静电操作规则静电可能严重损坏您的设备,在处理主板以及其它的系统设备的时候要特别注意,避免和主板上的系统组件的不必要接触,保证在抗静电的环境下工作,避免静电放电可能对主板造成损坏,当在您的机箱中插入或者移除设备时,请保证电源处于断开状态,厂商对于不遵照本操作规则或者不遵守安全规范而对主板造成的损坏不负责。
目录第一章: 主板介绍 (1)1.1前言 (1)1.2附件 (1)1.3主板特性 (2)1.4后置面板接口 (3)1.5主板布局图 (4)第二章:硬件安装 (5)2.1中央处理器(CPU) (5)2.2风扇接头 (7)2.3系统内存 (8)2.4接口和插槽 (10)第三章: 接头和跳线安装 (13)3.1跳线安装 (13)3.2安装细节 (13)第四章: RAID功能 (17)4.1操作系统 (17)4.2 RAID阵列 (17)4.3RAID运行 (17)第五章:帮助信息 (20)5.1驱动程序安装注意事项 (20)5.2软件 (21)5.3附加信息 (25)5.4AMI BIOS铃声代码 (27)5.5问题解答 (28)目录BIOS设置 (29)1 主菜单 (31)2 高级菜单 (34)3 PCI PNP菜单 (42)4 系统引导菜单 (45)5芯片组菜单 (47)6 性能菜单 (52)7 退出菜单 (58)附:产品中有毒有害物质或元素的名称及含量 (60)A770E3 第一章: 主板介绍1.1 前言感谢您选购我们的产品,在开始安装主板前,请仔细阅读以下安全指导说明:⏹请选择清洁稳定的工作环境。
BCM4343W IoT Starter Kit 软件用户指南说明书
Avnet BCM4343WIoT Starter KitQuick Start Instructions1. G o to Amazon Web Services website and register a new useraccount https://2. Go to AWS IoT Console webpage and generate AWS security certificates (for use in step 5)https:///iot/home?region=us-east-13. Connect the provided USB cable from the Starter Kit to a power source, the 3V3 LEDwill illuminate.4. Connect your computer’s Wi-Fi to WICED_AWS (the SSID of WICED module in SoftAP mode)5. Enter IP address 192.168.0.1 into your internet browser to select a Wireless Access Pointand upload your AWS certificates. After successful connection and transfer of certificates, the demo app will run. (Subsequent Resets will bypass SoftAP mode and auto-connect in STA mode to the selected Wireless A/P)6. Press SW2. This will turn on the USER1 green LED and update the Shadow USER1 LEDstate to “On”.7. Press SW2 a second time, this will turn off USER1 LED and update the Shadow USER1LED state to “Off”.8. The state of the Shadow is then verified using AWS Things Console (ie. “Things” tab inAWS IoT Console9. If needing to connect to a different Wireless A/P or re-upload AWS certificates, performa hard reset by holding SW2 during Reset (this clears the module’s DCT memory andlaunches SoftAP mode)10. For detail on AWS tools, cloud examples and Broadcom development tools, downloadthe following:-Avnet BCM4343W IoT Kit Getting Started Guide, at -AWS IoT Getting Started Guide, at /iot/getting-started-Broadcom WICED SDK, at /wiced-wifiLICENSE AGREEMENTTHE AVNET DESIGN KIT (“DESIGN KIT” OR “PRODUCT”) AND ANY SUPPORTING DOCUMENTATION (“DOCUMENTATION” OR “PRODUCT DOCUMENTATION”) IS SUBJECT TO THIS LICENSE AGREEMENT (“LICENSE”). USE OF THE PRODUCT OR DOCUMENTATION SIGNIFIES ACCEPTANCE OF THE TERMS AND CONDITIONS OF THIS LICENSE. THE TERMS OF THIS LICENSE AGREEMENT ARE IN ADDITION TO TH E AVNET CUSTOMER TERMS AND CONDITIONS, WH ICH CAN BE VIEWED AT . TH E TERMS OF TH IS LICENSE AGREEMENT WILL CONTROL IN THE EVENT OF A CONFLICT.1. Limited License. Avnet grants You, the Customer, (“You” “Your” or “Customer”) a limited, non-exclusive, non-transferable, licenseto: (a) use the Product for Your own internal testing, evaluation and design efforts at a single Customer site; (b) create a single derivative work based on the Product using the same semiconductor supplier product or product family as used in the Product;and (c) make, use and sell the Product in a single production unit. No other rights are granted and Avnet and any other Product licensor reserves all rights not specifically granted in this License Agreement. Except as expressly permitted in this License, neither the Design Kit, Documentation, nor any portion may be reverse engineered, disassembled, decompiled, sold, donated, shared, leased, assigned, sublicensed or otherwise transferred by Customer. The term of this License is in effect until terminated. Customer may terminate this license at any time by destroying the Product and all copies of the Product Documentation.2. Changes. Avnet may make changes to the Product or Product Documentation at any time without notice. Avnet makes nocommitment to update or upgrade the Product or Product Documentation and Avnet reserves the right to discontinue the Product or Product Documentation at any time without notice.3. Limited Warranty. ALL PRODUCTS AND DOCUMENTATION ARE PROVIDED “AS IS” WITHOUT WARRANTY OF ANY KIND. AVNETMAKES NO WARRANTIES, EITHER EXPRESS OR IMPLIED, WITH RESPECT TO THE PRODUCTS AND DOCUMENTATION PROVIDEDH EREUNDER. AVNET SPECIFICALLY DISCLAIMS TH E IMPLIED WARRANTIES OF MERCH ANTABILITY AND FITNESS FOR APARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT OF ANY INTELLECTUAL PROPERTY RIGHT OF ANY THIRD PARTY WITH REGARD TO THE PRODUCTS AND DOCUMENTATION.4. LIMITATIONS OF LIABILITY. CUSTOMER SH ALL NOT BE ENTITLED TO AND AVNET WILL NOT LIABLE FOR ANY INDIRECT,SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND OR NATURE, INCLUDING, WITHOUT LIMITATION, BUSINESS INTERRUPTION COSTS, LOSS OF PROFIT OR REVENUE, LOSS OF DATA, PROMOTIONAL OR MANUFACTURING EXPENSES, OVERHEAD, COSTS OR EXPENSES ASSOCIATED WITH WARRANTY OR INTELLECTUAL PROPERTY INFRINGEMENT CLAIMS, INJURY TO REPUTATION OR LOSS OF CUSTOMERS, EVEN IF AVNET HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. THE PRODUCTS AND DOCUMENTATION ARE NOT DESIGNED, AUTH ORIZED OR WARRANTED TO BE SUITABLE FOR USE IN MEDICAL, MILITARY, AIR CRAFT, SPACE OR LIFE SUPPORT EQUIPMENT NOR IN APPLICATIONS WHERE FAILURE OR MALFUNCTION OF THE PRODUCTS CAN REASONABLY BE EXPECTED TO RESULT IN A PERSONAL INJURY, DEATH OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE.INCLUSION OR USE OF PRODUCTS IN SUCH EQUIPMENT OR APPLICATIONS, WITH OUT PRIOR AUTH ORIZATION IN WRITING OF AVNET, IS NOT PERMITTED AND IS AT CUSTOMER’S OWN RISK. CUSTOMER AGREES TO FULLY INDEMNIFY AVNET FOR ANY DAMAGES RESULTING FROM SUCH INCLUSION OR USE.5. LIMITATION OF DAMAGES. CUSTOMER’S RECOVERY FROM AVNET FOR ANY CLAIM SHALL NOT EXCEED CUSTOMER’S PURCHASEPRICE FOR THE PRODUCT GIVING RISE TO SUCH CLAIM IRRESPECTIVE OF THE NATURE OF THE CLAIM, WHETHER IN CONTRACT, TORT, WARRANTY, OR OTHERWISE.6. INDEMNIFICATION. AVNET SH ALL NOT BE LIABLE FOR AND CUSTOMER SH ALL INDEMNIFY, DEFEND AND H OLD AVNETH ARMLESS FROM ANY CLAIMS BASED ON AVNET’S COMPLIANCE WITH CUSTOMER’S DESIGNS, SPECIFICATIONS ORINSTRUCTIONS, OR MODIFICATION OF ANY PRODUCT BY PARTIES OTHER THAN AVNET, OR USE IN COMBINATION WITH OTHER PRODUCTS.7. U.S. Government Restricted Rights. The Product and Product Documentation are provided with “RESTRICTED RIGH TS.” If theProduct and Product Documentation and related technology or documentation are provided to or made available to the United States Government, any use, duplication, or disclosure by the United States Government is subject to restrictions applicable to proprietary commercial computer software as set forth in FAR 52.227-14 and DFAR 252.227-7013, et seq., its successor and other applicable laws and regulations. Use of the Product by the United States Government constitutes acknowledgment of the proprietary rights of Avnet and any third parties. No other governments are authorized to use the Product without written agreement of Avnet and applicable third parties.8. Ownership. Licensee acknowledges and agrees that Avnet or Avnet’s licensors are the sole and exclusive owner of all IntellectualProperty Rights in the Licensed Materials, and Licensee shall acquire no right, title, or interest in the Licensed Materials, other than any rights expressly granted in this Agreement.9. Intellectual Property. All trademarks, service marks, logos, slogans, domain names and trade names (collectively “Marks”) arethe properties of their respective owners. Avnet disclaims any proprietary interest in Marks other than its own. Avnet and AV design logos are registered trademarks and service marks of Avnet, Inc. Avnet’s Marks may be used only with the prior written permission of Avnet, Inc.10. General. The terms and conditions set forth in the License Agreement or at will apply notwithstandingany conflicting, contrary or additional terms and conditions in any purchase order, sales acknowledgement confirmation or other document. If there is any conflict, the terms of this License Agreement will control. This License may not be assigned by Customer, by operation of law, merger or otherwise, without the prior written consent of Avnet and any attempted or purported assignment shall be void. Licensee understands that portions of the Licensed Materials may have been licensed to Avnet from third parties and that such third parties are intended beneficiaries of the provisions of this Agreement. In the event any of the provisions of this Agreement are for any reason determined to be void or unenforceable, the remaining provisions will remain in full effect.This constitutes the entire agreement between the parties with respect to the use of this Product, and supersedes all prior or contemporaneous understandings or agreements, written or oral, regarding such subject matter. No waiver or modification is effective unless agreed to in writing and signed by authorized representatives of both parties. The obligations, rights, terms and conditions shall be binding on the parties and their respective successors and assigns. The License Agreement is governed by and construed in accordance with the laws of the State of Arizona excluding any law or principle, which would apply the law of any other jurisdiction. The United Nations Convention for the International Sale of Goods shall not apply.Copyright © 2015, Avnet, Inc. All rights reserved. Published by Avnet Electronics Marketing, a group of Avnet, Inc. Avnet, Inc.disclaims any proprietary interest or right in any trademarks, service marks, logos, domain names, company names, brands, product names, or other form of intellectual property other than its own. AVNET and the AV logos are registered trademarks of Avnet, Inc. Lit # QSC-AES-EVB-BCM4343W-G-V1。
ProASIC3 E Proto Kit 快速入门卡文档说明书
© 2012 Microsemi Corporation. All rights reserved.ProASIC3/E Proto KitQuickstart CardKit Contents – A3PE-PROTO-KIT, A3PE-BRD1500-SKTQuantityDescription1ProASIC ®3 Starter kit board with an A3PE1500-PQ2081FlashPro3 programmer (not included with A3PE-BRD1500-SKT)19 V power supply with international adaptersWall Mount Power Interboard ISP ConnectorLCD Display ModuleCAT5E RJ45Connectors for LVDSCommunications SMA for Optional External OscillatorRemovable Shunts to Isolate All I/Os for Prototyping Removable Shunts to Isolate All I/Os for Prototyping Oscillator forSystem Clock Manual Clock OptionFlashPro3 ISP ConnectorProASIC3/E in PQ208 Package 4 SwitchesEvery PQ208 Pin Accessible for Prototyping8 LEDsRemovable Shunts to Isolate All I/Os for Prototyping50200381-0/10.12ProASIC3/E Proto Kit Quickstart CardRunning the Test DesignTo test the board, you can program the demo design. Download it from the ProASIC3 Starter Kit page: /products/hardware/devkits_boards/proasic3_starter.aspx .Software and LicensingVisit the Actel website ( ) for the latest Libero IDE Software. Request a free gold license to activate your software.Software releases: /download/software/libero Licensing: https:///Portal/DPortal.aspx?r=1Documentation ResourcesFor further kit information, including user's guide, tutorial, and full design examples, refer to the ProASIC3 Starter Kit page:/soc/products/hardware/devkits_boards/proasic3_starter.aspx .Technical Support and ContactsTechnical support is available online at /soc/support and by email at **********************.Microsemi SoC Sales offices, including Representatives and Distributors, are located worldwide. To find your local representative visit /soc/company/contact .ActionResultsPress SW1Asynchronous clear for the whole designPress SW2Up-down control for the 8-bit counter. Press and hold SW2 for down count. Press SW3Synchronous load for the 8-bit counter. Press SW3 for loading from the Hex switches.Press SW4Switching between manual clock(SW5) and 40 MHz oscillator clock.Press SW5Manual clock (very useful for simulation)Press SW6Select for DATA_BLOCK. It allows switching LED output between the counter and flashing data.Change Hex Switchsetting (U13 and U14)Changes the loaded data for the 8-bit counter.。
ESET Smart Security 快速入门指南说明书
Microsoft® Windows® Vista / XP / 2000 Quick Start Guidewe protect your digital worldsESET Smart SecurityTable of contents1. Installation (typical installation description)2. Trusted Zone setup3. Starting ESET Smart Security4. Entering Username and Password for update5. Computer scanning6. Protection status indication7. Resolving issuesIntegrated componentsESET Antivirusdetects and eliminates viruses, trojans, worms, rootkits and other threatsESET Personal Firewall monitors all traffic between the protected computer and other computers in the network. ESET Antispywarefights against spyware and adware, which are an increasing threat to computer securityESET Antispamfilters unsolicited commercial email increasing the security and comfort ofelectronic communication.User interfaceProtection status informs you about the current protection level and security of your computer.A computer scan is an important part of any antivirus solution.It is used to perform a scan of the files and folders on your computer’s disk(s).This section contains important information about the program updates.It is vitally important for the program to update regularly to provide the maximum level of protection against malware threats. The ESET Smart Security setup options allow you to adjust the protection levels of your computer.Comprehensive help and support for ESET Smart Security. You can also contact ESET Customer Care directly from here.1. InstallationBefore beginning installation, please close all running programs. Since ESET Smart Security contains antivirus and firewall components, we strongly recommend that you remove any other antivirus programs or firewallyou might have installed on your computer to prevent mutual conflicts. You do not need to disable or removethe Windows firewall in Windows XP or Vista, as thisis automatically handled by the ESET Smart Security installer. To take full advantage of the ESET Smart Security system, you will need an Internet connection during the installation process.You can install ESET Smart Security from an installation CD or from a file that you download from the ESET website:1.2. Launching the installationTo launch the installer wizard, either do one of the following:▪If you install from the installation CD, insert the CD into the CD-ROM drive and the installation shouldautomatically begin.▪If you install from a downloaded file, double-click the file you downloaded to launch the installer.After launching the installer and accepting the license agreement, the installer will offer two types of installation.▪Typical – the most important parameters will be configured during installation. These will be pre-set to their recommended settings. This mode provides comprehensive protection and is suitable for most users.▪Custom – enables configuration of all advancedparameters during installation.This guide describes a typical installation..sg1.3. Username and Password for updating the program It is critical that you enter your Username and the Password for ESET Smart Security automatic updates to function. If you decide to set the update parameters later, we strongly recommend doing so immediately after the installation is complete, to ensure that your protection remains current.1.4. plays an important role in reporting proactively captured malware to provide you with better protection. We recommend that you leave the Early Warning System enabled. Click Nextto proceed to the next step.Click Next to proceed to the next step.1.5. Detection of potentially unwanted applications Since some potentially unwanted applications are used legitimately, and might not necessarily pose a security risk, the user‘s consent is required to enable detection. Select this option if you want to block these types of applications. 1.6. Completing the installation Once ESET Smart Security has been configured, start the final installation by clicking the Install button. The installation progress will be indicated by a progress bar. After installation is complete, ESET Smart Security will be started automatically. A computer restart is not normally required , so you can continue working while ESET Smart Security runs in the background, protecting your computer from malware threats.Click Nextto proceed to the next step.2. Trusted Zone setupAfter the installation is complete and a network connection is detected, a window allowing you to configure a trusted zone will appear. The window shows your computer‘s local subnet (local network). Theseoptions only affect the visibility of your computer in the local network, not the Internet. There are two access modes available:▪Strict protection – select this option if you do not want to share files and folders on your computer and wantyour computer to be invisible to other users on thesame network. This setting is recommended for users who connect their computer directly to a cable or DSL modem or use a wireless connection.▪Allow sharing – select this option if you want to be able to share files and folders on your computer with others on the same network. This setting is recommended for trusted local home or office networks.3. Starting ESET Smart Security ESET Smart Security starts protecting your computer immediately after installation. You do not have to start the program to activate it. However, at any time you may open ESET Smart Security to check your protection status or to perform various scanning and maintenance tasks.To open the ESET Smart Security user interface, do one of following:▪Double-click on the ESET Smart Security icon located in the Windows notification area (System tray)▪On the Windows taskbar click Start > All Programs > ESET > ESET Smart Security > ESET Smart SecurityA color change in this icon indicates a possible problemwith ESET Smart Security.If your license has expired and you have received a new User name and Password after purchasing a renewal (or you did not enter them during installation), enter the new User name and Password in the update setup window. This step is critical in order to receive updates so that your computer is continually protected against newly emerging threats.In the left pane of the ESET Smart Security screen, select Setup and then click Enter User name and Password on the right.Enter the data you received in the License detailswindow and click OK to confirm. Your Username andPassword are both case sensitive. Enter them exactly as they appear . Copying and pasting from the license email is recommended.4.1. UpdateBy default, ESET Smart Security retrieves updatesautomatically. However, if you did not enter your Username and Password during installation, then no automatic update would have occcured. We recommend performing the update manually as follows:▪ Select Update in the left pane of the main ESET Smart Security screen▪ ClickUpdate virus signature database4. Entering Username and Password for updates5. Computer scanningAfter successful installation and update, we recommend that you perform a complete computer scan to check for threats. To do this, click Computer scan in the main ESET Smart Security screen and select Standard scan . Scanning of all local hard drives will begin. As long as the scancontinues, the status window shows the progress bar, as well as the current statistics about scanned and infected files found. If a threat is detected, ESET Smart Security quarantines the file and displays an alert in the systemtray area. You should be able to continue working normallyduring the scan.The update module will connect to the Internet, contact an available ESET update server and download digitally signed update files. These files contain the most recent malware signatures and new definitions for advanced heuristics and other program modules.As soon as a newer update has been installed, ESET Smart Security displays a notification in the system tray areashowing the version number of the installed virus signature database.Note : You only need to perform a manual update once. Afterwards, ESET Smart Security will download the update files automatically.ESET Smart Security informs you about the statusof antivirus protection by means of the following controls:1. The system tray icon indicates activation ordeactivation of the real-time file system protection or firewall by changing color according to the status.2. A detailed report in the Protection status window.If a particular module is disabled, its name will be displayed along with a link to enable it in the Protection statuspanel. Protection status is indicated by 3 colors:1. blue (recommended) – Antivirus protection is fully functional and your computer is protected against threats as well as network attacks. In this mode, all modules areenabled and the virus signature database is current. 2. yellow – Real-time file system protection is enabled, but at least one of the following events has occurred:▪ the firewall is blocking all network traffic▪ an update has failed (e.g., no Internet connection was detected, your license has expired, invalid User name orPassword is entered in the update setup, etc.) 3. red – Real-time file system protection or thefirewall is disabled. Since these modules are vital parts of your computer‘s protection, we recommend enabling the inactive module immediately!7. Resolving issuesESET Customer Care representatives are ready to assist you in resolving potential problems. However, before contacting Customer Care, we strongly recommend that you first search for a solution on the ESET website. This should help you resolve the problem within a matter of minutes.Answers to the most frequently asked questions and a comprehensive knowledgebase can be found at:.sgTo contact ESET Customer Care, please submit a support request at: .sg/about/contact php or use the support request form integrated into the program.6. Protection status indicationA window will appear where you can enter your contact information, case type, case issue, as well as yourspecific question or issue. Correctly filling in the contact information is crucial for receiving a prompt response to your question.In the Subject field, enter a concise description of the issue or question. Next, type in as detailed a description of the issue as possible in the Question or issue description field.Click Next to proceed to the next step.7.1 Submitting a Customer Care support request In the event of a problem, contact ESET Customer Care using the support request form integrated in the program. In the Help and support section, select Customer Care support request.In addition to the issue description, ESET Smart Security also supports submission of other important information that can help pinpoint the problem. We strongly recommend you leave all options selected. To view the information submitted before it is sent to ESET, select the Display submitted data with confirmation checkbox. Besides submitting system information, you can also attach any file if relevant to the issue or question.Click Next to proceed to the next step.After you have filled in all necessary information, submit the request to Customer Care by clicking the Finish button.A Customer Care representative will contact you as soon aspossible.Copyright ©2007 ESET, spol. s r. o.ESET, logo of ESET, NOD32, ThreatSense, and/or other mentioned products of ESET, spol. s r. o. are registered trademarks of ESET, spol. s r. o. Other companies mentioned here or products, may be registered trademarks of their proprietors. Produced according to quality standards of ISO 9001:2000.。
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Spartan-3E Starter Kit Board User GuideChapter 1: Introduction and OverviewChapter 2: Switches, Buttons, and KnobChapter 3: Clock SourcesChapter 4: FPGA Configuration OptionsChapter 5: Character LCD ScreenChapter 6: VGA Display PortChapter 7: RS-232 Serial PortsChapter 8: PS/2 Mouse/Keyboard PortChapter 9: Digital to Analog Converter (DAC)Chapter 10: Analog Capture CircuitChapter 11: Intel StrataFlash Parallel NOR Flash PROM Chapter 12: SPI Serial FlashChapter 13: DDR SDRAMChapter 14: 10/100 Ethernet Physical Layer Interface Chapter 15: Expansion ConnectorsChapter 16: XC2C64A CoolRunner-II CPLDChapter 17: DS2432 1-Wire SHA-1 EEPROMChapter 1:Introduction and Overview Spartan-3E入门实验板使设计人员能够即时利用Spartan-3E系列的完整平台性能。
设备支持:Spartan-3E、CoolRunner-II关键特性:Xilinx 器件: Spartan-3E (50万门,XC3S500E-4FG320C), CoolRunner™-II (XC2C64A-5VQ44C)与Platform Flash(XCF04S-VO20C)时钟:50 MHz晶体时钟振荡器存储器: 128 Mbit 并行Flash, 16 Mbit SPI Flash, 64 MByte DDR SDRAM连接器与接口:以太网10/100 Phy, JTAG USB下载,两个9管脚RS-232串行端口, PS/2类型鼠标/键盘端口, 带按钮的旋转编码器, 四个滑动开关,八个单独的LED输出, 四个瞬时接触按钮, 100管脚hirose扩展连接端口与三个6管脚扩展连接器显示器: VGA显示端口,16 字符- 2 线式LCD电源:Linear Technologies 电源供电,TPS75003三路电源管理IC市场:消费类, 电信/数据通信, 服务器, 存储器应用:可支持32位的RISC处理器,可以采用Xilinx的MicroBlaze 以及PicoBlaze嵌入式开发系统;支持DDR接口的应用;支持基于Ethernet网络的应用;支持大容量I/O扩展的应用。
Choose the Starter Kit Board for Your NeedsSpartan-3E FPGA Features and Embedded Processing Functions Spartan3-E FPGA 入门实验板具有Spartan3-E FPGA系列突出独特的特点和为嵌入式处理发展与应用提供了很大的方便。
该板的特点如下:Spartan3-E特有的特征:并行NOR Flash配置;通过并行NOR Flash PROM 实现FPGA的多种配置方式嵌入式系统:MicroBlaze™ 32-bit 嵌入RISC处理器;PicoBlaze™ 8-bit 嵌入控制器;DDR 存储器接口Learning Xilinx FPGA, CPLD, and ISE Development Software Basics Spartan3-E FPGA 入门实验板比其他的入门实验板先进、复杂。
它是学习FPGA或CPLD设计和怎样运用ISE软件的基础。
Advanced Spartan-3 Generation Development Boards入门实验板示范了MicroBlaze™ 32-bit 嵌入式处理器和EDK的基本运用。
其更先进的地方在于配了额外的外设和FPGA逻辑,包括SP-305入门实验板。
Key Components and Features主要特征:1)XC3S500E(Spartan-3e):多达232个用户I/O口;320个FPGA封装管脚;超过10000个逻辑单元。
2)4Mbit的Flash 配置PROM;3)64个宏单元的XC2C64A CoolRunner CPLD;4)64 MByte (512 Mbit) of DDR SDRAM, ×16 数据接口, 100+ MHz;5)16 MByte (128 Mbit) of 并行NOR Flash (Intel StrataFlash):FPGA配置存储;MicroBlaze代码存储/映射;6)16 Mbits of SPI serial Flash (STMicro):FPGA配置存储;MicroBlaze代码存储/映射;7)16字符-2线式LCD显示屏;8)PS/2鼠标或键盘接口;9)VGA显示接口;10)10/100以太PHY(要求FPGA内部具有以太MAC);11)2个9-管脚的RS-232端口(DTE和DCE两种类型);12)FPGA/CPLD下载/调试USB接口;13)50Hz时钟晶振;14)1线式的SHA-1位流复制保护串行EEPROM;15)Hirose FX2扩展连接口;16)3个管脚扩展连接器;17)4个SPI-DAC转换器输出管脚;18)2个SPI带可编程增益ADC输入管脚;19)ChipScope™软件调试接口;20)带按钮的旋转编码器;21)8个单独的LED输出;22)4个滑动开关;23)4个按钮开关;24)SMA时钟输入;25)8管脚插槽辅助晶振Design Trade-OffsConfiguration Methods Galore!FPGA的一个典型应用就是使用单永久性存储器来存储配置信息。
为了说明新的Spartan-3E 的性能,入门实验板有3个不同的配置存储源,这需要一起正确使用。
额外的配置功能使入门实验板比典型的Spartan-3E应用更复杂。
入门实验板包括JTAG可编程USB接口。
片上的线路简化了器件的编程过程。
在典型的应用中,JTAG编程硬件在片外或在一个单独的编程模块上,如XILINX USB电缆平台。
Voltages for all Applications入门实验板利用TI公司的TPS75003芯片(专门为Spartan-3E的FPGA提供电源)作为三态输出调整仪。
该调整仪适用多种FPGA的应用。
但是,入门实验板包括DDR SDRAM,这需要它自身快速的电流来供给。
简单地说,带USB接口的JTAG下载方式解决了需要单独配备1.8V电源的问题。
Chapter 2:Switches, Buttons, and KnobSlide SwitchesLocations and Labels入门实验板具有4个滑动开关,如图2.1所示。
Operation当开关关上或上拉时,FPGA的管脚连接3.3V电源,即逻辑高电平。
断开或下拉时,FPGA 管脚接地,逻辑低电平。
一般开关的机械闭合时间为2ms,这里没有使用活动的回弹线路,尽管这种线路可以很容易地加到FPGA上。
UCF Location Constraints图2.2为4个滑动开关提供了UCF约束、I/O口分配和I/O口标准。
这里没有用到上拉电阻。
但是,当开关处于中间转换位置时,它被定义为输入。
Push-Button SwitchesLocations and Labels入门实验板有4个瞬时按钮开关,如图2.3所示。
BTN_NORTH、BTN_EAST、BTN_SOUTH、and BTN_WEST。
注:a 所有的BTN_*按钮输入需要内部的下拉电阻;b 在一些FPGA应用中BTN_SOUTH作为软复位使用。
Operation按下按钮,FPGA接到3.3v电源,如图2.4。
没有按下时,鉴于内部下拉电阻的原因,FPGA 管脚产生一个逻辑低电平。
图2.5说明了怎样去定义下拉电阻的UCF。
这里按钮上没有活动的回弹线路。
在一些应用中,BTN_SOUTH按钮开关充FPGA选择复位功能的软复位。
UCF Location Constraints图2.5为4个按钮开关提供了UCF约束、I/O口分配和I/O口标准。
并为每个输入管脚定义下拉电阻。
Rotary Push-Button SwitchLocations and Labels如图2.3所示,旋转按钮处4个分开的按钮的中间。
该开发产生3个输出:2个轴状编码输出ROT_A和ROT_B。
中心的按钮是ROT_CENTER。
Operation旋转按钮有2个不同的功能。
只要轴柄一转,按钮就旋转并输出值。
该轴也可以按下,和按钮开关一样。
Push-Button Switch按下握柄或按钮,则FPGA接通3.3V,如图2.6所示。
使用内部的下拉电阻产生低电平。
图2.9说明了怎样去定义UCF的下拉电阻。
这里按钮上没有活动的回弹线路。
Rotary Shaft Encoder首先,旋转编码更像是个连接到中心的凸轮。
旋转轴柄可操作两个按钮开关,如图2.7所示。
选择一个开关连接地,产生低电平。
当开关开时,FGPA内部的上拉电阻将该信号拉为高电平。
图2.9是对其UCF约束的描述,怎样去定义上拉电阻。
FPGA电路很方便地译码A和B的输入信号,但考虑到开关的机械特性,转换时会产生输入噪音。
如图2.8所示,噪音错误地报告额外的旋转事件或甚至报告旋转相反的方向。
UCF Location ConstraintsDiscrete LEDsLocations and Labels入门实验板在滑动开关的上面有8个独立的贴片LED。
OperationLED一端接地,另一端通过390欧的限流电阻接到Spartan-3E上。
要点亮一个LED,向相应的控制位置高。
UCF Location ConstraintsChapter 3: Clock SourcesOverview图3.1所示,入门实验板支持3个主时钟输入源。
1)包括一个50MHz的时钟晶振2) 通过SMA连接器,时钟可以板外供应。
反之,FPGA也可以提供时钟信号或其它高速信号给SMA连接器3)分列式8-DIP时钟晶振插槽Clock Connections每个时钟的输入直接连到Bank0的输入全局缓冲I/O。