54AC16842中文资料

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82c54中文简介

8254可编程计数／定时芯片简介：本接口卡采用 8254 可编程计数／定时器芯片完成对外部脉冲信号的各种处理。

8254芯片内部具有三个独立的16位计数器，它可用程序设置成多种工作方式，按十进制计数或二进制计数，最高计数速率可达10MHz。

8254 能用于多种应用场合，例如外部事件计数器、可编程方波频率发生器、分频器、实时时钟以及程控单脉冲发生器等。

本接口卡的功能组成非常灵活，通过跨接插座的不同连接方式，可以使8254的时钟输入端 CLK 与被测现场信号相连，或者与卡上基准时钟相连，也可以将二至三级计数器串连使用。

对于8254 的启停控制端 GATE，同样可以通过跨接插座的选择，使其或者受程序的控制或者设置为外部控制。

8254的全部功能是由CPU编程设定的。

CPU通过输出指令给8254装入控制字，从而设定其功能。

8254控制字格式如下：D7 D6 D5 D4 D3 D2 D1 D0SC1SC0RL1RL0M2M1M0BCD各位的功能见表1～表4：表1 SC1、SC0 －计数器选择SC1 SC0选择计数器0 0 选择0#0 1 选择1#1 0 选择2#1 1 使用方法参见8254使用说明表2 RL1、RL0－CPU读／写操作RL1 RL0 操作类型0 0 计数器封锁操作0 1 读／写计数器低8位1 0 读／写计数器高8位1 1 先读／写低8位，后读／写高8位表3 M2、M1、M0 －工作方式选择M3 M2 M1计数工作方式0 0 0 方式 00 0 1 方式 10 1 0 方式 20 1 1 方式 31 0 0 方式 41 0 1 方式 5表4 BCD－计数方式选择BCD 数码形式0 十六位二进制计数1 四位十进制 ( BCD ) 码计数8254的三个计数器是独立的16 位减法计数器。

计数器的工作方式由工作方式寄存器确定。

计数器在编程写入初始值后，在某些方式下计数到0后自动预置，计数器连续工作。

V54C312816资料

V54C3128(16/80/40)4V(T/S) Rev. 1.2 August 2002
3
MOSEL VITELIC
V54C3128(16/80/40)4V(T/S)
Description Pkg.
TSOP-II
T
Pin Count 54
V 54 C 3 12880 4 V A L T
Mosel Vitelic Manufactured
Device Number
3.3V, LVTTL INTERFACE 128Mb(4K Refresh)
4 Banks
Special Feature
Speed 6 ns 7 ns 8 ns
Component Package
L=Low Power
Component Rev Level
V=LVTTL
60 Pin WBGA PIN CONFIGURATION Top View
MOSEL VITELIC
V54C3128(16/80/40)4V(T/S) 128Mbit SDRAM 3.3 VOLT, TSOP II / SOC PACKAGE 8M X 16, 16M X 8, 32M X 4
PRELIMINARY
System Frequency (fCK) Clock Cycle Time (tCK3) Clock Access Time (tAC3) CAS Latency = 3 Clock Access Time (tAC2) CAS Latency = 2
A10 22 A0 23 A1 24 A2 25 A3 26 VCC 27
54 VSS 53 I/O16 52 VSSQ 51 I/O15 50 I/O14 49 VCCQ 48 I/O13 47 I/O12 46 VSSQ 45 I/O11 44 I/O10 43 VCCQ 42 I/O9 41 VSS 40 NC

AD5422中文资料

Single Channel, 16-Bit, Serial Input,Current Source & Voltage Output DAC Preliminary Technical Data AD5422Rev. PrEInformation furnished by Analog Devices is believed to be accurate and reliable. However, noresponsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. T rademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, M A 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved.FEATURES16-Bit Resolution and MonotonicityCurrent Output Ranges: 4–20mA, 0–20mA or 0–24mA 0.1% typ Total Unadjusted Error (TUE)5ppm/°C Output DriftVoltage Output Ranges: 0-5V, 0-10V, ±5V, ±10V,10% over-range0.05% Total Unadjusted Error (TUE)3ppm/°C Output DriftFlexible Serial Digital InterfaceOn-Chip Output Fault DetectionOn-Chip Reference (10 ppm/°C Max)Asynchronous CLEAR FunctionPower Supply RangeAV DD : 10.8V to 40 VAV SS : -26.4V to -3V/0VOutput Loop Compliance to AV DD – 2.5 V Temperature Range: -40°C to +85°CTSSOP and LFCSP PackagesAPPLICATIONSProcess ControlActuator ControlPLC GENERAL DESCRIPTIONThe AD5422 is a low-cost, precision, fully integrated 16-bit converter offering a programmable current source and programmable voltage output designed to meet the requirements of industrial process control applications.The output current range is programmable to 4mA to 20 mA,0mA to 20mA or an overrange function of 0mA to 24mA. Voltage output is provided from a separate pin that can be configured to provide 0V to 5V, 0V to 10V, ±5V or ±10V output ranges, an over-range of 10% is available on all ranges. Analog outputs are short and open circuit protected and can drive capacitive loads of 1uF and inductive loads of 1H.The device is specified to operate with a power supply range from 10.8 V to 40 V. Output loop compliance is 0 V to AV DD – 2.5 V.The flexible serial interface is SPI and MICROWIRE compatible and can be operated in 3-wire mode to minimize the digital isolation required in isolated applications.The device also includes a power-on-reset function ensuring that the device powers up in a known state and an asynchronous CLEAR pin which sets the outputs to zero-scale / mid-scale voltage output or the low end of the selected current range.The total output error is typically ±0.1% in current mode and ±0.05% in voltage mode.Table 1. Related DevicesPart Number DescriptionAD5412 Single Channel, 12-Bit, SerialInput Current Source andVoltage Output DACAD5420 Single Channel, 16-Bit, SerialInput Current Source DACAD5410 Single Channel, 12-Bit, SerialInput Current Source DACAD5422Preliminary Technical DataRev. PrE | Page 2 of 37TABLE OF CONTENTSFeatures..............................................................................................1 Applications.......................................................................................1 General Description.........................................................................1 Revision History...............................................................................2 Functional Block Diagram..............................................................3 Specifications.....................................................................................4 AC Performance Characteristics................................................7 Timing Characteristics................................................................8 Absolute Maximum Ratings..........................................................10 ESD Caution................................................................................10 Pin Configuration and Function Descriptions...........................11 Typical Performance Characteristics Voltage output ...............13 Typical Performance Characteristics current output ...............17 Typical Performance Characteristics general ............................20 Terminology....................................................................................22 Theory of Operation......................................................................24 Architecture.................................................................................24 Serial Interface............................................................................24 Default configuration.................................................................28 Transfer Function.......................................................................28 Data Register...............................................................................29 Control Register..........................................................................29 RESET register............................................................................29 Status register..............................................................................30 Features............................................................................................31 fault alert......................................................................................31 voltage output short circuit protection....................................31 Asynchronous Clear (CLEAR).................................................31 Internal Reference......................................................................31 External current setting resistor...............................................31 Voltage ouTput over-range........................................................31 Digital Power Supply..................................................................31 External boost function.............................................................31 digital Slew rate control.............................................................32 I OUT Filtering Capacitors............................................................32 Applications Information..............................................................33 driving inductive loads..............................................................33 Transient voltage protection.....................................................33 Layout Guidelines.......................................................................33 Galvanically Isolated Interface.................................................33 Microprocessor Interfacing.......................................................33 Thermal and supply considerations.........................................34 Outline Dimensions.......................................................................35 Ordering Guide.. (35)REVISION HISTORYPrE – Preliminary Version, November 22, 2007Preliminary Technical DataAD5422Rev. PrE | Page 3 of 37FUNCTIONAL BLOCK DIAGRAMV OUT I OUT LATCH SCLK SDIN SDOCCAGND CLEAR FAULT BOOSTREFOUT REFIN SENSESENSECLEAR SELECT R SET DV CC C COMP2C COMP1DGND**LFCSP PackageFigure 1.AD5422Preliminary Technical DataRev. PrE | Page 4 of 37SPECIFICATIONSAV DD = 10.8V to 40V , AV SS = -26.4V to -3V/0V , AV DD + |AV SS | < 52.8V , AGND = DGND = 0 V , REFIN= +5 V external; DV CC = 2.7 V to 5.5 V , V OUT : R L = 2 kΩ, C L = 200 pF, I OUT : R L = 300Ω, H L = 50mH; all specifications T MIN to T MAX , ±10 V / 0 to 24 mA range unless otherwise noted. Table 2.Parameter Value 1 Unit Test Conditions/CommentsVOLTAGE OUTPUTOutput Voltage Ranges 0 to 5 V 0 to 10 V -5 to +5 V -10 to +10 V ACCURACY Output unloaded Bipolar Output Resolution 16 Bits Total Unadjusted Error (TUE) 0.1 % FSR max Over temperature, supplies, and time, typically 0.05%FSRTUE TC 2 ±3 ppm typ Relative Accuracy (INL) ±0.012 % FSR max Differential Nonlinearity (DNL) ±1 LSB max Guaranteed monotonic Bipolar Zero Error ±5 mV max @ 25°C, error at other temperatures obtained usingbipolar zero TCBipolar Zero TC 2±3 ppm FSR/°C max Zero-Scale Error ±1 mV max @ 25°C, error at other temperatures obtained using zeroscale TCZero-Scale TC 2±3 ppm FSR/°C max Gain Error ±0.05 % FSR max @ 25°C, error at other temperatures obtained using gainTCGain TC 2 ±8 ppm FSR/°C max Full-Scale Error 0.05 % FSR max @ 25°C, error at other temperatures obtained using gainTCFull-Scale TC 2 ±3 ppm FSR/°C max Unipolar Output AV SS = 0 V Resolution 16 Bits Total Unadjusted Error (TUE) 0.1 % FSR max Over temperature, supplies, and time, typically 0.05%FSRRelative Accuracy (INL) ±0.012 % FSR max Differential Nonlinearity (DNL) ±1 LSB max Guaranteed monotonic (at 16 bit-resolution) Zero Scale Error +10 mV max @ 25°C, error at other temperatures obtained using gainTCZero Scale TC 2±3 ppm FSR/°C max Offset Error ±10 mV max Gain Error ±0.05 % FSR max @ 25°C, error at other temperatures obtained using gainTCGain TC 2±3 ppm FSR/°C max Full-Scale Error 0.05 % FSR max @ 25°C, error at other temperatures obtained using gainTCFull-Scale TC 2±3 ppm FSR/°C maxOUTPUT CHARACTERISTICS 2eadroom 0.8 V max 0.5 V typ Output Voltage TC ±3 ppm FSR/°C max Output Voltage Drift vs. Time ±12 ppm FSR/500 hr typ Vout = ¾ of Full-Scale ±15 ppm FSR/1000 hr typ Short-Circuit Current 12 mA typPreliminary Technical DataAD5422Rev. PrE | Page 5 of 37Parameter Value 1 Unit Test Conditions/Comments Load 2 kΩ min For specified performance Capacitive Load Stability R L = ∞ 20 nF max R L = 2 kΩ TBD nF max R L = ∞ 1 µF max External compensation capacitor of 4nF connected. DC Output Impedance 0.3 Ω typ Power-On Time 10 µs typ DC PSRR TBD µV/VCURRENT OUTPUTOutput Current Ranges 0 to 24 mA 0 to 20 mA 4 to 20 mA ACCURACY Resolution 16 Bits Total Unadjusted Error (TUE) ±0.3 % FSR max Over temperature, supplies, and time, typically 0.1% FSR TUE TC 2 ±5 ppm/°C typ Relative Accuracy (INL) ±0.012 % FSR max Differential Nonlinearity (DNL) ±1 LSB max Guaranteed monotonic Offset Error ±0.05 % FSR max Offset Error Drift ±5 µv/°C typ Gain Error ±0.02 % FSR max @ 25°C, error at other temperatures obtained using gainTCGain TC 2 ±8 ppm FSR/°C max Full-Scale Error 0.05 % FSR max @ 25°C, error at other temperatures obtained using gainTCFull-Scale TC 2 ±8 ppm FSR/°COUTPUT CHARACTERISTICS 2Current Loop Compliance Voltage AVDD - 2.5 V max Output Current Drift vs. Time TBD ppm FSR/500 hr typ TBD ppm FSR/1000 hr typ Resistive Load TBD Ω max Inductive Load 1 H max DC PSRR 10 µA/V max Output Impedance 50 MΩ typREFERENCE INPUT/OUTPUTReference Input 2 Reference Input Voltage 5 V nom ±1% for specified performance DC Input Impedance 30 kΩ min Typically 40 kΩ Reference Range 4 to 5 V min to V max Reference Output Output Voltage 4.998 to 5.002 V min to V max @ 25°C Reference TC ±10 ppm/°C max Output Noise (0.1 Hz to 10 Hz)2 18 µV p-p typNoise Spectral Density 2120 nV/√Hz typ @ 10 kHz Output Voltage Drift vs. Time 2 ±40 ppm/500 hr typ ±50 ppm/1000 hr typ Capacitive Load TBD nF max Load Current 5 mA typ Short Circuit Current 7 mA typ Line Regulation 2 10 ppm/V typLoad Regulation 2TBD ppm/mA Thermal Hysteresis 2 TBD ppmAD5422 Preliminary Technical Data1 Temperature range: -40°C to +85°C; typical at +25°C.2 Guaranteed by characterization. Not production tested.Rev. PrE | Page 6 of 37Preliminary Technical DataAD5422Rev. PrE | Page 7 of 37AC PERFORMANCE CHARACTERISTICSAV DD = 10.8V to 40V , AV SS = -26.4V to -3V/0V , AV DD + |AV SS | < 52.8V , AGND = DGND = 0 V , REFIN= +5 V external; DV CC = 2.7 V to 5.5 V , V OUT : R L = 2 kΩ, C L = 200 pF, I OUT : R L = 300Ω, H L = 50mH; all specifications T MIN to T MAX , ±10 V / 0 to 24 mA range unless otherwise noted. Table 3.Parameter 1 Unit Test Conditions/Comments DYNAMIC PERFORMANCEVOLTAGE OUTPUTOutput Voltage Settling Time 8 µs typ Full-scale step (10 V) to ±0.03% FSR 10 µs max 5 µs max 512 LSB step settlingOutput Current Settling Time 10 µs max To 0.1% FSR Slew Rate 1 V/µs typ Power-On Glitch Energy 10 nV-sec typ Digital-to-Analog Glitch Energy 10 nV-sec typ Glitch Impulse Peak Amplitude 20 mV typ Digital Feedthrough 1 nV-sec typ Output Noise (0.1 Hz to 10 Hz Bandwidth) 0.1 LSB p-p typ Output Noise (100 kHz Bandwidth) 80 µV rms max 1/f Corner Frequency 1 kHz typ Output Noise Spectral Density 100 nV/√Hz typ Measured at 10 kHz AC PSRR TBD dB 200mV 50/60Hz Sinewavesuperimposed on power supply voltage.CURRENT OUTPUTOutput Current Settling Time TBD µs typ To 0.1% FSR , L = 1H TBD µs typ To 0.1% FSR , L < 1mH1Guaranteed by characterization, not production tested.AD5422Preliminary Technical DataRev. PrE | Page 8 of 37TIMING CHARACTERISTICSAV DD = 10.8V to 40V , AV SS = -26.4V to -3V/0V , AV DD + |AV SS | < 52.8V , AGND = DGND = 0 V , REFIN= +5 V external; DV CC = 2.7 V to 5.5 V , V OUT : R L = 2 kΩ, C L = 200 pF, I OUT : R L = 300Ω, H L = 50mH; all specifications T MIN to T MAX , ±10 V / 0 to 24 mA range unless otherwise noted. Table 4.Parameter 1, 2, 3 Limit at T MIN , T MAX Unit DescriptionWrite Modet 1 33 ns min SCLK cycle time t 2 13 ns min SCLK low time t 3 13 ns min SCLK high time t 4 13 ns min LATCH delay time t 5 40 ns min LATCH high time t 5 5 µs min LATCH high time (After a write to the CONTROL register) t 6 5 ns min Data setup time t 7 5 ns min Data hold time t 8 40 ns min LATCH low time t 9 20 ns min CLEAR pulsewidth t 10 5 µs max CLEAR activation timeReadback Modet 11 82 ns min SCLK cycle time t 12 33 ns min SCLK low time t 13 33 ns min SCLK high time t 14 13 ns min LATCH delay time t 15 40 ns min LATCH high time t 16 5 ns min Data setup time t 17 5 ns min Data hold time t 18 40 ns min LATCH low time t 19 40 ns max Serial output delay time (C L SDO 4 = 15pF) t 20 33 ns max LATCH rising edge to SDO tri-stateDaisychain Modet 21 82 ns min SCLK cycle time t 22 33 ns min SCLK low time t 23 33 ns min SCLK high time t 24 13 ns min LATCH delay time t 25 40 ns min LATCH high time t 26 5 ns min Data setup time t 27 5 ns min Data hold time t 28 40 ns min LATCH low time t 29 40 ns max Serial output delay time (C L SDO 4 = 15pF)1 Guaranteed by characterization. Not production tested.2All input signals are specified with t R = t F = 5 ns (10% to 90% of DV CC ) and timed from a voltage level of 1.2 V. 3See Figure 2, Figure 3, and Figure 4. 4C L SDO = Capacitive load on SDO output.Preliminary Technical DataAD5422Rev. PrE | Page 9 of 37SCLK LATCHSDINCLEAROUTPUTFigure 2. Write Mode Timing DiagramSCLKLATCHSDINSDOSELECTED REGISTER DATA CLOCKED OUTFIRST 8 BITS ARE DON’T CARE BITSFigure 3. Readback Mode Timing DiagramSCLKSDINSDOLATCHFigure 4. Daisychain Mode Timing DiagramAD5422Preliminary Technical DataRev. PrE | Page 10 of 37ABSOLUTE MAXIMUM RATINGST A = 25°C unless otherwise noted.Transient currents of up to 100 mA do not cause SCR latch-up. Table 5.Parameter Rating AV DD to AGND, DGND −0.3V to 48V AV SS to AGND, DGND +0.3 V to −48 V AV DD to AV SS -0.3V to 60V DV CC to AGND, DGND −0.3 V to +7 V Digital Inputs to AGND, DGND −0.3 V to DV CC + 0.3 V or 7 V(whichever is less)Digital Outputs to AGND, DGND −0.3 V to DV CC + 0.3 V or 7V(whichever is less)REFIN/REFOUT to AGND, DGND −0.3 V to +7 V V OUT to AGND, DGND AV SS to AV DD I OUT to AGND, DGND −0.3V to AV DD AGND to DGND -0.3V to +0.3V Operating Temperature Range Industrial −40°C to +851°C Storage Temperature Range −65°C to +150°C Junction Temperature (T J max) 125°C 24-Lead TSSOP Package θJA Thermal Impedance 42°C/W 40-Lead LFCSP Package θJA Thermal Impedance 28°C/W Power Dissipation (T J max – T A )/ θJA Lead Temperature JEDEC Industry StandardSoldering J-STD-020Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operationalsection of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.ESD CAUTION1Power dissipated on chip must be de-rated to keep junction temperature below 125°C. Assumption is max power dissipation condition is sourcing 24mA into Ground from AV DD with a 3mA on-chip current.PIN CONFIGURATION AND FUNCTION DESCRIPTIONSAGND SDOAV SSSENSE GNDLATCH CLEAR CLEAR SELECT REFIN SELECT SCLK SDIN GND R SETOUTBOOST C COMP1REFOUT DV CC C COMP2I OUTSENSEAV DDDV CCD G N G N A V S CA V S SA V D D N CN CV S E N S EV C CNCNC DV CC SELECT V S E N S EO U TBOOST C COMP1C COMP2I OUT N R S E NC A G N CN N R E F I R E F O U CAP2CAP1Figure 5. TSSOP Pin ConfigurationFigure 6. LFCSP Pin ConfigurationTSSOP Pin No. LFCSP Pin No. Mnemonic Descriptionoutputpin.19 26 I OUT Current20 27 BOOSTOptional external transistor connection. Connecting an external transistor will reducethe power dissipated in the AD5422. Refer to the features section.N/A 28 CAP1 Connection for optional output filtering capacitor. Refer to Features section.N/A 29 CAP2 Connection for optional output filtering capacitor. Refer to Features section.21 32 V OUT Buffered Analog Output Voltage. The output amplifier is capable of directly driving a 2kΩ, 2000 pF load.22 33 +V SENSE Sense connection for the positive voltage output load connection.23 34 -V SENSE Sense connection for the negative voltage output load connection.24 36 AV DD Positive Analog Supply Pin. Voltage ranges from 10.8V to 60V.Paddle Paddle AV SS Negative Analog Supply Pin. Voltage ranges from –3 V to –24 V. This pin can beconnected to 0V if output voltage range is unipolar.TYPICAL PERFORMANCE CHARACTERISTICSVOLTAGE OUTPUTFigure 7. Integral Non Linearity Error vs DAC Code (Four Traces)Figure 8. Differential Non Linearity Error vs. DAC Code (Four Traces)Figure 9. Total Unadjusted Error vs. DAC Code (Four Traces)Figure 10. Integral Non Linearity vs. Temperature (Four Traces)Figure 11. Differential Non Linearity vs. Temperature (Four Traces)Figure 12. Integral Non Linearity vs. Supply Voltage (Four Traces)Figure 13.Differential Non Linearity Error vs. Supply Voltage (Four Traces)Figure 14. Integral Non Linearity Error vs. Reference Voltage (Four traces)Figure 15. Differential Non Linearity Error vs. Reference Voltage (Four Traces)Figure 16. Total Unadjusted Error vs.Reference Voltage (Four Traces)Figure 17. Total Unadjusted Error vs. Supply Voltage (Four Traces)Figure 18. Offset Error vs.TemperatureFigure 19. Bipolar Zero Error vs. TemperatureFigure 20. Gain Error vs. TemperatureFigure 21. Source and Sink Capability of Output AmplifierFull-Scale Code LoadedFigure 22. Source and Sink Capability of Output AmplifierZero-Scale LoadedFigure 23.Full-Scale Positive StepFigure 24. Full-Scale Negative StepFigure 25. Digital-to-Analog Glitch EnergyFigure 26. Peak-to-Peak Noise (0.1Hz to 10Hz Bandwidth)Figure 27. Peak-to-Peak Noise (100kHz Bandwidth)Figure 28. V OUT vs. Time on Power-upFigure 29. V OUT vs, Time on Output EnabledTYPICAL PERFORMANCE CHARACTERISTICS CURRENT OUTPUTFigure 30. Integral Non Linearity vs. CodeFigure 31.Differential Non Linearity vs. CodeFigure 32. Total Unadjusted Error vs. CodeFigure 33. Integral Non Linearity vs. TemperatureFigure 34. Differential Non Linearity vs. TemperatureFigure 35. Integral Non Linearity vs. SupplyFigure 36. Differential Non Linearity vs. Supply VoltageFigure 37. Integral Non Linearity vs. Reference VoltageFigure 38. Differential Non Linearity vs. Reference VoltageFigure 39. Total Unadjusted Error vs. Reference VoltageFigure 40. Total Unadjusted Error vs. Supply VoltageFigure 41. Offset Error vs. TemperatureFigure 42. Gain Error vs. TemperatureFigure 43. Voltage Compliance vs. TemperatureFigure 44. I OUT vs. Time on Power-upFigure 45. I OUT vs. Time on Output EnabledTYPICAL PERFORMANCE CHARACTERISTICS GENERALFigure 46. DI CC vs.Logic Input VoltageFigure 47. AI DD /AI SS vs AV DD /AV SSFigure 48. AI DD vs AV DDFigure 49. DVCC Output Voltage vs. DI CC Load CurrentFigure 50. Refout Turn-on TransientFigure 51. Refout Output Noise (0.1Hz to 10Hz Bandwidth)Figure 52. Refout Output Noise (100kHz Bandwidth)Figure 53. Refout Line TransientFigure 54. Refout Load TransientFigure 55. Refout Histogram of Thermal HysteresisFigure 56. Refout Voltage vs. Load CurrentTERMINOLOGYRelative Accuracy or Integral Nonlinearity (INL)For the DAC, relative accuracy, or integral nonlinearity (INL), is a measure of the maximum deviation, in LSBs, from a straight line passing through the endpoints of the DAC transfer function. A typical INL vs. code plot can be seen in Figure 7. Differential Nonlinearity (DNL)Differential nonlinearity (DNL) is the difference between the measured change and the ideal 1 LSB change between any two adjacent codes. A specified differential nonlinearity of ±1 LSB maximum ensures monotonicity. This DAC is guaranteed monotonic by design. A typical DNL vs. code plot can be seen in Figure 10.MonotonicityA DAC is monotonic if the output either increases or remains constant for increasing digital input code. The AD5724R/AD5734R/AD5754R are monotonic over their full operating temperature range.Bipolar Zero ErrorBipolar zero error is the deviation of the analog output from the ideal half-scale output of 0 V when the DAC register is loaded with 0x8000 (straight binary coding) or 0x0000 (twos complement coding). A plot of bipolar zero error vs. temperature can be seen in Table TBD.Bipolar Zero TCBipolar zero TC is a measure of the change in the bipolar zero error with a change in temperature. It is expressed in ppm FSR/°C.Full-Scale ErrorFull-Scale error is a measure of the output error when full-scale code is loaded to the DAC register. Ideally, the output should be full-scale − 1 LSB. Full-scale error is expressed in percent offull-scale range (% FSR).Negative Full-Scale Error/Zero-Scale ErrorNegative full-scale error is the error in the DAC output voltage when 0x0000 (straight binary coding) or 0x8000 (twos complement coding) is loaded to the DAC register. Ideally, the output voltage should be negative full-scale− 1 LSB. A plot of zero-scale error vs. temperature can be seen in Table TBD Zero-Scale TCThis is a measure of the change in zero-scale error with a change in temperature. Zero-scale error TC is expressed in ppm FSR/°C. Output Voltage Settling TimeOutput voltage settling time is the amount of time it takes for the output to settle to a specified level for a full-scale input change. A plot of settling time can be seen in Table TBD Slew RateThe slew rate of a device is a limitation in the rate of change of the output voltage. The output slewing speed of a voltage-output D/A converter is usually limited by the slew rate of the amplifier used at its output. Slew rate is measured from 10% to 90% of the output signal and is given in V/µs.Gain ErrorThis is a measure of the span error of the DAC. It is the deviation in slope of the DAC transfer characteristic from ideal expressed in % FSR. A plot of gain error vs. temperature can be seen in Table TBDGain TCThis is a measure of the change in gain error with changes in temperature. Gain Error TC is expressed in ppm FSR/°C. Total Unadjusted ErrorTotal unadjusted error (TUE) is a measure of the output error taking all the various errors into account, namely INL error, offset error, gain error, and output drift over supplies, temperature, and time. TUE is expressed in % FSR.Current Loop Voltage ComplianceThe maximum voltage at the I OUT pin for which the output currnet will be equal to the programmed value.Power-On Glitch EnergyPower-on glitch energy is the impulse injected into the analog output when the AD5422 is powered-on. It is specified as the area of the glitch in nV-sec. See Table TBDDigital-to-Analog Glitch ImpulseDigital-to-analog glitch impulse is the impulse injected into the analog output when the input code in the DAC register changes state, but the output voltage remains constant. It is normally specified as the area of the glitch in nV-sec and is measured when the digital input code is changed by 1 LSB at the major carry transition (0x7FFF to 0x8000). See Table TBDGlitch Impulse Peak AmplitudeGlitch impulse peak amplitude is the peak amplitude of the impulse injected into the analog output when the input code in the DAC register changes state. It is specified as the amplitude of the glitch in mV and is measured when the digital input code is changed by 1 LSB at the major carry transition (0x7FFF to0x8000). See Table TBD.Digital FeedthroughDigital feedthrough is a measure of the impulse injected into the analog output of the DAC from the digital inputs of the DAC, but is measured when the DAC output is not updated. It is specified in nV-sec and measured with a full-scale code change on the data bus.Power Supply Rejection Ratio (PSRR)PSRR indicates how the output of the DAC is affected by changes in the power supply voltage.Reference TCReference TC is a measure of the change in the reference output voltage with a change in temperature. It is expressed in ppm/°C. Line RegulationLine regulation is the change in reference output voltage due to a specified change in supply voltage. It is expressed in ppm/V. Load RegulationLoad regulation is the change in reference output voltage due to a specified change in load current. It is expressed in ppm/mA. Thermal HysteresisThermal hysteresis is the change of reference output voltage after the device is cycled through temperatures from +25°C to −40°C to +85°C and back to +25°C. This is a typical value from a sample of parts put through such a cycle. See Table TBDfor a histogram of thermal hysteresis.TCOOHYSOVVV__C)25(−°=6__10C)25(C)25()(×°−°=OTCOOHYSO VVVppmVwhere:V O(25°C) = V O at 25°CV O_TC = V O at 25°C after temperature cycleTHEORY OF OPERATIONThe AD5422 is a precision digital to current loop and voltage output converter designed to meet the requirements of industrial process control applications. It provides a high precision, fully integrated, low cost single-chip solution for generating current loop and unipolar/bipolar voltage outputs. The current ranges available are; 0 to 20mA, 0 to 24mA and 4 to 20mA, the voltage ranges available are; 0 to 5V , ±5V , 0 to 10V and ±10V , the current and voltage outputs are available onseparate pins and only one is active at any one time. The desired output configuration is user selectable via the CONTROL register.ARCHITECTUREThe DAC core architecture of the AD5422 consists of two matched DAC sections. A simplified circuit diagram is shown in Figure 57. The 4 MSBs of the 16-bit data word are decoded to drive 15 switches, E1 to E15. Each of these switches connects 1 of 15 matched resistors to either ground or the reference buffer output. The remaining 12 bits of the data-word drive switches S0 to S11 of a 12-bit voltage mode R-2R ladder network.V REFV OUT12-BIT R-2R LADDE RFOUR MSBs DECODED INTO 15 EQUAL SEGMENTSFigure 57. DAC Ladder StructureThe voltage output from the DAC core is either converted to a current (see diagram, Figure 58) which is then mirrored to the supply rail so that the application simply sees a current source output with respect to ground or it is buffered and scaled to output a software selectable unipolar or bipolar voltage range (See diagram, Figure 59). The current and voltage are output onseparate pins and cannot be output simultaneously.I OUTFigure 58. Voltage to Current conversion circuitryREFINL1Figure 59. Voltage OutputVoltage Output AmplifierThe voltage output amplifier is capable of generating both unipolar and bipolar output voltages. It is capable of driving a load of 2 kΩ in parallel with 1 µF to AGND. The source and sink capabilities of the output amplifier can be seen in Figure TBD. The slew rate is 1 V/µs with a full-scale settling time of 10 µs, (10V step). Figure 59 shows the voltage output drving a load, R L on top of a common mode voltage of up to ±3V .In output module applications where a cable could possibly become disconnected from +V SENSE resulting in the amplifier loop being broken and most probably resulting in largedestructive voltages on V OUT , a resistor, R 1, of value 2k Ω to 5k Ω should be included as shown to ensure the amplifier loop is kept closed.Driving Large Capacitive LoadsThe voltage output amplifier is capable of driving capacitive loads of up to 1uF with the addition of a non-polarised 4nF compensation capacitor between the C COMP1 and C COMP2 pins. Without the compensation capacitor, up to 20nF capacitive loads can be driven.Reference BuffersThe AD5422 can operate with either an external or internal reference. The reference input has an input range of 4 V to 5 V , 5 V for specified performance. This input voltage is then buffered before it is applied to the DAC.SERIAL INTERFACEThe AD5422 is controlled over a versatile 3-wire serial interface that operates at clock rates up to 30 MHz. It is compatible with SPI®, QSPI™, MICROWIRE™, and DSP standards.Input Shift RegisterThe input shift register is 24 bits wide. Data is loaded into the device MSB first as a 24-bit word under the control of a serial clock input, SCLK. Data is clocked in on the rising edge of SCLK. The input register consists of 8 control bits and 16 data bits as shown in Table 7. The 24 bit word is unconditionally latched on the rising edge of LATCH. Data will continue to be clocked in irrespective of the state of LATCH, on the rising edge of LATCH the data that is present in the input register will be latched, in other words the last 24 bits to be clocked in before。

54AC373中文资料

Features
n ICC and IOZ reduced by 50% n Eight latches in a single package n TRI-STATE outputs for bus interfacing n Outputs source/sink 24 mA n ’ACT373 has TTL-compatible inputs n Standard Microcircuit Drawing (SMD)
Supply Voltage (VCC) DC Input Diode Current (IIK)
VI = −0.5V VI = VCC + 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = −0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source
— ’AC373: 5962-87555 — ’ACT373: 5962-87556
Logic Symbols
IEEE/IEC
DS100329-1
Pin Names D0– D7 LE OE O0– O7
Description Data Inputs Latch Enable Input Output Enable Input TRI-STATE Latch Outputs
DS100329-3
Functional Description
The ’AC/’ACT373 contains eight D-type latches with TRI-STATE standard outputs. When the Latch Enable (LE) input is HIGH, data on the Dn inputs enters the latches. In this condition the latches are transparent, i.e., a latch output will change state each time its D input changes. When LE is LOW, the latches store the information that was present on the D inputs a setup time preceding the HIGH-to-LOW transition of LE. The TRI-STATE standard outputs are controlled by the Output Enable (OE) input. When OE is LOW, the standard outputs are in the 2-state mode. When OE is HIGH, the standard outputs are in the high impedance mode but this does not interfere with entering new data into the latches.

SN54123中文资料

PRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.1POST OFFICE BOX 655303 • DALLAS, TEXAS 752652POST OFFICE BOX 655303 • DALLAS, TEXAS 752653 POST OFFICE BOX 655303 • DALLAS, TEXAS 752654POST OFFICE BOX 655303 • DALLAS, TEXAS 752655 POST OFFICE BOX 655303 • DALLAS, TEXAS 752656POST OFFICE BOX 655303 • DALLAS, TEXAS 752657 POST OFFICE BOX 655303 • DALLAS, TEXAS 752658POST OFFICE BOX 655303 • DALLAS, TEXAS 752659 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265PACKAGING INFORMATIONOrderable Device Status (1)Package Type Package DrawingPins Package Qty Eco Plan (2)Lead/Ball FinishMSL Peak Temp (3)5962-7603901VEA ACTIVE CDIP J 161None Call TI Level-NC-NC-NC 5962-7603901VFAACTIVE CFP W 161None Call TI Level-NC-NC-NC 7603901EA ACTIVE CDIP J 161None Call TI Level-NC-NC-NC 7603901FA ACTIVE CFP W 161None Call TI Level-NC-NC-NC JM38510/01203BEA ACTIVE CDIP J 161None Call TI Level-NC-NC-NC JM38510/31401B2A ACTIVE LCCC FK 201None Call TI Level-NC-NC-NC JM38510/31401BEA ACTIVE CDIP J 161None Call TI Level-NC-NC-NC JM38510/31401BFAACTIVE CFP W 161None Call TI Level-NC-NC-NC SN54122J OBSOLETE CDIP J 14None Call TI Call TISN54123J ACTIVE CDIP J 161None Call TI Level-NC-NC-NC SN54LS123J ACTIVE CDIP J 161None Call TI Level-NC-NC-NC SN74122N OBSOLETE PDIP N 14None Call TI Call TISN74123N ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU Level-NC-NC-NC SN74123N3OBSOLETE PDIP N 16None Call TI Call TISN74LS122D ACTIVE SOIC D 1450Pb-Free (RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM SN74LS122DR ACTIVE SOIC D 142500Pb-Free (RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM SN74LS122N ACTIVE PDIP N 1425Pb-Free (RoHS)CU NIPDAU Level-NC-NC-NC SN74LS122N3OBSOLETE PDIP N 14None Call TI Call TISN74LS122NSR ACTIVE SO NS 142000Pb-Free (RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM SN74LS123D ACTIVE SOIC D 1640Pb-Free (RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM SN74LS123DR ACTIVE SOIC D 162500Pb-Free (RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM SN74LS123J OBSOLETE CDIP J 16None Call TI Call TISN74LS123N ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU Level-NC-NC-NC SN74LS123N3OBSOLETE PDIP N 16None Call TI Call TISN74LS123NSR ACTIVE SO NS 162000Pb-Free (RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM SNJ54122J OBSOLETE CDIP J 14None Call TI Call TISNJ54123J ACTIVE CDIP J 161None Call TI Level-NC-NC-NC SNJ54123W ACTIVE CFP W 161None Call TI Level-NC-NC-NC SNJ54LS123FK ACTIVE LCCC FK 201None Call TI Level-NC-NC-NC SNJ54LS123J ACTIVE CDIP J 161None Call TI Level-NC-NC-NC SNJ54LS123WACTIVECFPW161NoneCall TILevel-NC-NC-NC(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.PACKAGE OPTION ADDENDUM28-Feb-2005Addendum-Page 1元器件交易网OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan -May not be currently available -please check /productcontent for the latest availability information and additional product content details.None:Not yet available Lead (Pb-Free).Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Green (RoHS &no Sb/Br):TI defines "Green"to mean "Pb-Free"and in addition,uses package materials that do not contain halogens,including bromine (Br)or antimony (Sb)above 0.1%of total product weight.(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annualbasis.PACKAGE OPTION ADDENDUM 28-Feb-2005Addendum-Page 2IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. T esting and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. T o minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI.Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation.Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAmplifiers Audio /audioData Converters Automotive /automotiveDSP Broadband /broadbandInterface Digital Control /digitalcontrolLogic Military /militaryPower Mgmt Optical Networking /opticalnetwork Microcontrollers Security /securityTelephony /telephonyVideo & Imaging /videoWireless /wirelessMailing Address:Texas InstrumentsPost Office Box 655303 Dallas, Texas 75265Copyright 2005, Texas Instruments Incorporated。

TC-1684F 光端机中文手册

TC-1684F中文手册1 产品简介TC-1684F是台康推出的16E1+ETH光端机，用以满足电信运营商和行业用户对小容量光传输设备的需求，本产品是在大规模集成电路的基础上开发的点对点光传输设备，它以简洁的单板形式实现了最多16路E1和100M线速以太网数据通道的混合复用光传输。

并具有公务电话和远程管理的功能，告警、回环功能完善。

本机功耗低，性能稳定，使用简单。

2 主要特点1）提供最多16路E1的透明传输，同时提供4路线速率为100M以太网通道2）E1接口码型为HDB3,抖动容限、转移特性、输出抖动完全符合ITU-T G.703、G.823和G.742建议3）E1口支持本地和远端回环功能，便于设备安装、调试4）以太网接口支持自协商方式，可用于全双工/半双工，10/100M5）以太网支持VLAN包透传，支持流量控制功能，最大包长为1552字节6）勤务电话使用普通电话听筒7）光接口双发优收，支持1+1备份8）VT100管理界面，可同时管理本地和远端设备9）整机单板设计，标准的1U机箱10) 220V交流电源或（和）-48V直流电源供电方式3 技术指标直流电源：电压：36VDC ~ 72VDC 交流电源：电压：165V-250V频率：50HZ功耗：小于6WE1接口：标准：ITU-T G.703 速率：2.048Mbps 阻抗：非平衡75Ω BNC编码：HDB3以太网接口：速率：10/100M, 全/半双工，自适应线速率：100M协议：支持IEEE.802.3,IEEEE.802.1Q接口形式：RJ45光接口：速率：155M波长：1310/1550nm（可选）模式：单模接收灵敏度：优于-37dBm发射光功率： -3dBm传输距离：20Km-100Km(可选)接口形式： FC/SC（可选）物理尺寸：标准机箱尺寸：485X140X44mm可以插入标准19英寸机柜4 产品外观4.1 指示灯说明前面板指示灯定义名称颜色含义状态说明Power 绿色电源指示灯亮：设备上电状态灭：设备断电状态LOS（主光口）黄色主光信号丢失指示灯亮：主光信号丢失灭：主光信号正常W/S（主光口）红色主光口工作状态指示灯亮：系统使用主光口闪：系统未使用主光口LOS（备光口）黄色备光信号丢失指示灯亮：备光信号丢失灭：备光信号正常W/S（备光口）红色备光口工作状态指示灯亮：系统使用备光口闪：系统未使用备光口灭：备光口未安装LOS(1-16) 红色 E1信号丢失指示灯NOR(1-16) 绿色 E1信号状态指示LOS亮，NOR灭：E1信号丢失LOS灭，NOR亮：E1信号正常LOS灭，NOR灭：E1信号未安装NOR: 0.5s off,0.5s on LLA回环测试NOR: 1s off ,1s on LLB回环测试后面板以太网指示灯定义名称颜色含义状态说明LNK 绿色（右）以太网连接状态指示亮：连接已经建立43ms亮43ms灭：系统工作在100M120ms亮120ms灭：系统工作在10M DUP 黄色（左）全/半双工状态指示亮：全双工灭：半双工且无冲突闪烁：检测到有冲突4.2 接口定义4.2.1 光接口定义，左侧为主光口，右侧为备光口4.2.2 E1接口定义（75ohm ）4.2.3勤务电话接口定义管脚号功能数据方向 1 MIC+ 输入 2 REC+ 输出 3 REC- 输出 4MIC-输入4.2.4 以太网接口定义管脚号功能数据方向 1 RX Receiving Data+ 输入 2 RX Receiving Data- 输入 3 TX transmit Data+ 输出 6TX transmit Data-输出4，5，7，8NC4.2.5 Consle 口接口定义：8 1接口形式DB9,电平标准RS232管脚号功能数据方向5GND3TXD 输入2RXD 输出4.2.6 告警端子接口定义为了方便用户能够在机房连接喇叭等告警设施，TC1684F后面板提供开关类型告警输出端子，当设备有告警，则COM端跳转至和NO连接。

1955264资料

Extract from the onlinecatalogCCA 2,5/12-G-5,08 RNP26THROrder No.: 1955264The figure shows a 10-position version of the producthttp://eshop.phoenixcontact.de/phoenix/treeViewClick.do?UID=1955264Headers, with engagement nose, pin length: 2.6 mm, 5.08 mm pitch, 12-pos.http://Please note that the data givenhere has been taken from theonline catalog. For comprehensiveinformation and data, please referto the user documentation. TheGeneral Terms and Conditions ofUse apply to Internet downloads. Technical dataDimensions / positionsPitch 5.08 mmDimension a55.88 mmNumber of positions12Pin dimensions 1 x 1 mmPin spacing 5.08 mmHole diameter 1.6 mmTechnical dataInsulating material group IIIaRated surge voltage (III/3) 4 kVRated surge voltage (III/2) 4 kVRated surge voltage (II/2) 4 kVRated voltage (III/2)320 VRated voltage (II/2)400 VConnection in acc. with standard EN-VDENominal current I N12 ANominal voltage U N250 VMaximum load current12 A (per position)Insulating material LCPInflammability class acc. to UL 94V0Certificates / ApprovalsApproval logoCULNominal voltage U N300 VNominal current I N10 AULNominal voltage U N300 VNominal current I N10 ACertification CUL, ULAccessoriesItem Designation DescriptionGeneral1954362CR-MSTB NAT HT HT coding section, is pushed into the recess on the header beforethe reflow process, made of highly temperature-resistant, beigeinsulating materialMarking1051993B-STIFT Marker pen, for manual labeling of unprinted Zack strips, smear-proof and waterproof, line thickness 0.5 mm0804293SK 5,08/3,8:FORTL.ZAHLEN Marker card, printed horizontally, self-adhesive, 12 identicaldecades marked 1-10, 11-20 etc. up to 91-(99)100, sufficient for120 terminal blocks0805085SK 5,08/3,8:SO Marker card, special printing, self-adhesive, labeled acc. tocustomer requirements, 12 identical marker strips per card, max.25-position labeling per strip, color: white0805412SK 5,08/3,8:UNBEDRUCKT Marker cards, unprinted, with pitch divisions, self-adhesive, 10-section marker strips, 12 strips per card, can be labeled with theM-PENPlug/Adapter1734401CR-MSTB Coding section, inserted into the recess in the header or theinverted plug, red insulating materialDrawingsApplication drawingDrilling diagramDimensioned drawingBottom view, free space for solder paste, 0.5mm deepAddressPHOENIX CONTACT GmbH & Co. KGFlachsmarktstr. 832825 Blomberg,GermanyPhone +49 5235 3 00Fax +49 5235 3 41200http://www.phoenixcontact.de© 2008 Phoenix ContactTechnical modifications reserved;。

54AC151_03中文资料

54AC151/54ACT1518-Input MultiplexerGeneral DescriptionThe ’AC/’ACT151is a high-speed 8-input digital multiplexer.It provides,in one package,the ability to select one line of data from up to eight sources.The ’AC/’ACT151can be used as a universal function generator to generate any logic func-tion of four variables.Both true and complementary outputs are provided.Featuresn I CC reduced by 50%n Outputs source/sink 24mAn ’ACT151has TTL-compatible inputs n Standard Microcircuit Drawing (SMD)—’AC151:5962-87691—’ACT151:5962-88756n 54AC151now qualified to 300Krad RHA designation,refer to the SMD for more informationLogic SymbolsIEEE/IEC1002700110027006Pin Names Description I 0–I 7Data Inputs S 0–S 2Select Inputs E Enable Input Z Data Output ZInverted Data OutputFACT ®is a registered trademark of Fairchild Semiconductor Corporation.July 200354AC151/54ACT1518-Input Multiplexer©2003National Semiconductor Corporation Connection DiagramsPin Assignment for DIP and FlatpakPin Assignmentfor LCC1002700210027003Truth TableInputsOutputs E S 2S 1S 0Z Z H X X X H L L L L L I 0I 0L L L H I 1I 1L L H L I 2I 2L L H H I 3I 3L H L L I 4I 4L H L H I 5I 5L H H L I 6I 6LHHHI 7I 7H =HIGH Voltage Level L =LOW Voltage Level X =ImmaterialFunctional DescriptionThe ’AC/’ACT151is a logic implementation of a single pole,8-position switch with the switch position controlled by the state of three Select inputs,S 0,S 1,S 2.Both true and complementary outputs are provided.The Enable input (E)is active LOW.When it is not activated,the complementary output is HIGH and the true output is LOW regardless of all other inputs.The logic function provided at the output is:Z =E •(I 0•S 0•S 1•S 2+I 1•S 0•S 1•S 2+I 2•S 0•S 1•S 2+I 3•S 0•S 1•S 2+I 4•S 0•S 1•S 2+I 5•S 0•S 1•S 2+I 6•S 0•S 1•S 2+I 7•S 0•S 1•S 2)The ’AC/’ACT151provides the ability,in one package to select from eight sources of data or control information.By proper manipulation of the inputs,the ’AC/’ACT151can provide any logic function of four variables and its comple-ment.54A C 151/54A C T 151 254AC151/54ACT151 Logic Diagram10027004Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.3Absolute Maximum Ratings(Note 1)If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications.Supply Voltage (V CC )−0.5V to +7.0VDC Input Diode Current (I IK )V I =−0.5V −20mA V I =V CC +0.5V +20mADC Input Voltage (V I )−0.5V to V CC +0.5V DC Output Diode Current (I OK )V O =−0.5V −20mA V O =V CC +0.5V +20mADC Output Voltage (V O )−0.5V to V CC +0.5VDC Output Source or Sink Current (I O )±50mA DC V CC or Ground Current per Output Pin (I CC or I GND )±50mAStorage Temperature (T STG )−65˚C to +150˚CJunction Temperature (T J )CDIP175˚C Recommended Operating ConditionsSupply Voltage (V CC )’AC 2.0V to 6.0V ’ACT4.5V to5.5V Input Voltage (V I )0V to V CC Output Voltage (V O )0V to V CCOperating Temperature (T A )54AC/ACT−55˚C to +125˚CMinimum Input Edge Rate (∆V/∆t)’AC DevicesV IN from 30%to 70%of V CC V CC @3.3V,4.5V,5.5V 125mV/ns Minimum Input Edge Rate (∆V/∆t)’ACT Devices V IN from 0.8V to 2.0V V CC @4.5V,5.5V125mV/ns Note 1:Absolute maximum ratings are those values beyond which damage to the device may occur.The databook specifications should be met,without exception,to ensure that the system design is reliable over its power supply,temperature,and output/input loading variables.National does not recom-mend operation of FACT ®circuits outside databook specifications.DC Characteristics for ’AC Family Devices54ACSymbol ParameterV CC T A =−55˚C to +125˚C UnitsConditions(V)Guaranteed LimitsV IHMinimum High Level 3.0 2.1V OUT =0.1V Input Voltage4.5 3.15Vor V CC −0.1V5.5 3.85V ILMaximum Low Level 3.00.9V OUT =0.1V Input Voltage4.5 1.35Vor V CC −0.1V5.5 1.65V OHMinimum High Level 3.0 2.9I OUT =−50µAOutput Voltage4.5 4.4V5.55.4(Note 2)V IN =V IL or V IH3.0 2.4I OH =−12mA4.5 3.7VI OH =−24mA 5.54.7I OH =−24mA V OLMaximum Low Level 3.00.1I OUT =50µAOutput Voltage4.50.1V5.50.1(Note 2)V IN =V IL or V IH3.00.50I OL =12mA4.50.50V I OL =24mA5.50.50I OL =24mA I INMaximum Input 5.5±1.0µAV I =V CC ,GNDLeakage Current54A C 151/54A C T 151 4DC Characteristics for’AC Family Devices(Continued)54ACSymbol Parameter V CC T A=−55˚C to+125˚C Units Conditions(V)Guaranteed LimitsI OLD Minimum DynamicOutput Current(Note3)5.550mA V OLD=1.65V MaxI OHD 5.5−50mA V OHD=3.85V MinI CC Maximum Quiescent 5.580.0µA V IN=V CCSupply Current or GNDNote2:All outputs loaded;thresholds on input associated with output under test.Note3:Maximum test duration2.0ms,one output loaded at a time.Note4:I IN and I CC@3.0V are guaranteed to be less than or equal to the respective limit@5.5V V CC.I CC for54AC@25˚C is identical to74AC@25˚CDC Characteristics for’ACT Family Devices54ACTSymbol Parameter V CC T A=−55˚C to+125˚C Units Conditions(V)Guaranteed LimitsV IH Minimum High Level 4.5 2.0V V OUT=0.1VInput Voltage 5.5 2.0or V CC−0.1VV IL Maximum Low Level 4.50.8V V OUT=0.1VInput Voltage 5.50.8or V CC−0.1VV OH Minimum High Level 4.5 4.4V I OUT=−50µA Output Voltage 5.5 5.4(Note5)V IN=V IL or V IH4.5 3.70V I OH=−24mA5.5 4.70I OH=−24mAV OL Maximum Low Level 4.50.1V I OUT=50µAOutput Voltage 5.50.1(Note5)V IN=V IL or V IH4.50.50V I OL=24mA5.50.50I OL=24mAI IN Maximum Input 5.5±1.0µA V I=V CC,GNDLeakage CurrentI CCT Maximum 5.5 1.6mA V I=V CC−2.1VI CC/InputI OLD Minimum Dynamic 5.550mA V OLD=1.65V MaxI OHD Output Current(Note6) 5.5−50mA V OHD=3.85V MinI CC Maximum Quiescent 5.580.0µA V IN=V CCSupply Current or GNDNote5:All outputs loaded;thresholds on input associated with output under test.Note6:Maximum test duration2.0ms,one output loaded at a time.Note7:I CC for54ACT@25˚C is identical to74ACT@25˚C.54AC151/54ACT1515AC Electrical CharacteristicsSymbolParameter54ACUnitsV CC T A =−55˚C to +125˚CFig.(V)C L =50pF No.(Note 8)Min Max t PLH Propagation Delay 3.3 1.022.0ns S n to Z or Z 5.0 1.015.5t PHL Propagation Delay 3.3 1.022.0ns S n to Z or Z 5.0 1.015.5t PLH Propagation Delay 3.3 1.015.5ns E to Z or Z 5.0 1.012.0t PHL Propagation Delay 3.3 1.015.5ns E to Z or Z 5.0 1.012.0t PLH Propagation Delay 3.3 1.016.0ns I n to Z or Z 5.0 1.012.0t PHLPropagation Delay 3.3 1.018.0nsI n to Z or Z5.01.013.0Note 8:Voltage Range 3.3is 3.3V ±0.3V Voltage Range 5.0is 5.0V ±0.5VAC Electrical CharacteristicsSymbolParameter54ACTUnitsV CC T A =−55˚C to +125˚CFig.(V)C L =50pF No.(Note 9)Min Max t PLH Propagation Delay 5.0 1.019.5ns S n to Zt PHL Propagation Delay 5.0 1.020.0ns S n to Zt PLH Propagation Delay 5.0 1.019.5ns S n to Zt PHL Propagation Delay 5.0 1.020.0ns S n to Zt PLH Propagation Delay 5.0 1.012.0ns E to Zt PHL Propagation Delay 5.0 1.012.5ns E to Zt PLH Propagation Delay 5.0 1.012.0ns E to Zt PHL Propagation Delay 5.0 1.012.5ns E to Zt PLH Propagation Delay 5.0 1.015.0ns I n to Zt PHL Propagation Delay 5.0 1.016.0ns I n to Zt PLH Propagation Delay 5.0 1.015.0ns I n to Zt PHLPropagation Delay 5.01.016.0nsI n to ZNote 9:Voltage Range 5.0is 5.0V ±0.5V54A C 151/54A C T 151 6CapacitanceSymbol Parameter Typ Units ConditionsC IN Input Capacitance 4.5pF V CC=OPENC PD Power Dissipation70.0pF V CC=5.0VCapacitance54AC151/54ACT1517Physical Dimensionsinches (millimeters)unless otherwise noted20Terminal Ceramic Leadless Chip Carrier (L)NS Package Number E20A16Lead Ceramic Dual-In-Line Package (D)NS Package Number J16A54A C 151/54A C T 151 8Physical Dimensionsinches (millimeters)unless otherwise noted (Continued)16Lead Ceramic Flatpak (F)NS Package Number W16ALIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices or systems which,(a)are intended for surgical implant into the body,or (b)support or sustain life,and whose failure to perform when properly used in accordance with instructions for use provided in the labeling,can be reasonably expected to result in a significant injury to the user.2.A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system,or to affect its safety or effectiveness.National Semiconductor Americas Customer Support CenterEmail:new.feedback@ Tel:1-800-272-9959National SemiconductorEurope Customer Support CenterFax:+49(0)180-5308586Email:europe.support@Deutsch Tel:+49(0)6995086208English Tel:+44(0)8702402171Français Tel:+33(0)141918790National Semiconductor Asia Pacific Customer Support CenterEmail:ap.support@National SemiconductorJapan Customer Support Center Fax:81-3-5639-7507Email:jpn.feedback@ Tel:81-3-5639-756054AC151/54ACT1518-Input MultiplexerNational does not assume any responsibility for use of any circuitry described,no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.。

SNJ54AC373J中文资料

PACKAGING INFORMATIONOrderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)5962-87555012A ACTIVE LCCC FK201TBD POST-PLATE N/A for Pkg Type 5962-8755501RA ACTIVE CDIP J201TBD A42SNPB N/A for Pkg Type 5962-8755501SA ACTIVE CFP W201TBD A42N/A for Pkg Type 5962-8755501VRA ACTIVE CDIP J201TBD A42SNPB N/A for Pkg Type5962-8755501VSA ACTIVE CFP W201TBD A42N/A for Pkg Type SN74AC373DBLE OBSOLETE SSOP DB20TBD Call TI Call TISN74AC373DBR ACTIVE SSOP DB202000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AC373DBRE4ACTIVE SSOP DB202000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AC373DW ACTIVE SOIC DW2025Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AC373DWE4ACTIVE SOIC DW2025Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AC373DWR ACTIVE SOIC DW202000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AC373DWRE4ACTIVE SOIC DW202000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AC373N ACTIVE PDIP N2020Pb-Free(RoHS)CU NIPDAU N/A for Pkg TypeSN74AC373NE4ACTIVE PDIP N2020Pb-Free(RoHS)CU NIPDAU N/A for Pkg TypeSN74AC373NSR ACTIVE SO NS202000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AC373NSRE4ACTIVE SO NS202000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AC373PW ACTIVE TSSOP PW2070Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AC373PWE4ACTIVE TSSOP PW2070Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74AC373PWLE OBSOLETE TSSOP PW20TBD Call TI Call TISN74AC373PWR ACTIVE TSSOP PW202000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74AC373PWRE4ACTIVE TSSOP PW202000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SNJ54AC373FK ACTIVE LCCC FK201TBD POST-PLATE N/A for Pkg Type SNJ54AC373J ACTIVE CDIP J201TBD A42SNPB N/A for Pkg Type SNJ54AC373W ACTIVE CFP W201TBD A42N/A for Pkg Type (1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-The planned eco-friendly classification:Pb-Free(RoHS),Pb-Free(RoHS Exempt),or Green(RoHS&no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.6-Dec-2006TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined above.Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annualbasis.6-Dec-2006TAPE AND REELINFORMATION24-Apr-2007DevicePackage Pins SiteReel Diameter (mm)Reel Width (mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant SN74AC373DBR DB 20MLA 330168.27.5 2.51216Q1SN74AC373DWR DW 20MLA 3302410.813.0 2.71224Q1SN74AC373NSRNS 20MLA 330248.213.0 2.51224Q1SN74AC373PWRPW20MLA330166.957.11.6816Q1TAPE AND REEL BOX INFORMATIONDevice Package Pins Site Length (mm)Width (mm)Height (mm)SN74AC373DBR DB 20MLA 333.2333.228.58SN74AC373DWR DW 20MLA 333.2333.231.75SN74AC373NSR NS 20MLA 333.2333.231.75SN74AC373PWRPW20MLA333.2333.228.5824-Apr-200724-Apr-2007IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,modifications,enhancements, improvements,and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by government requirements,testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design.Customers are responsible for their products and applications using TI components.To minimize the risks associated with customer products and applications,customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any TI patent right,copyright,mask work right,or other TI intellectual property right relating to any combination,machine,or process in which TI products or services are rmation published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.Reproduction of this information with alteration is an unfair and deceptive business practice.TI is not responsible or liable for such altered documentation.Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice.TI is not responsible or liable for any such statements.TI products are not authorized for use in safety-critical applications(such as life support)where a failure of the TI product would reasonably be expected to cause severe personal injury or death,unless officers of the parties have executed an agreement specifically governing such use.Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications,and acknowledge and agree that they are solely responsible for all legal,regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications,notwithstanding any applications-related information or support that may be provided by TI.Further,Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications.TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or"enhanced plastic."Only products designated by TI as military-grade meet military specifications.Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk,and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS16949requirements.Buyers acknowledge and agree that,if they use anynon-designated products in automotive applications,TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAmplifiers Audio /audioData Converters Automotive /automotiveDSP Broadband /broadbandInterface Digital Control /digitalcontrolLogic Military /militaryPower Mgmt Optical Networking /opticalnetworkMicrocontrollers Security /securityLow Power /lpw Telephony /telephonyWirelessVideo&Imaging /videoWireless /wirelessMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2007,Texas Instruments Incorporated。

SN54HC132中文资料

元器件交易网IMPORTANT NOTICETexas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinueany product or service without notice, and advise customers to obtain the latest version of relevant informationto verify, before placing orders, that information being relied on is current and complete. All products are soldsubject to the terms and conditions of sale supplied at the time of order acknowledgement, including thosepertaining to warranty, patent infringement, and limitation of liability.TI warrants performance of its semiconductor products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extentTI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarilyperformed, except those mandated by government requirements.CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OFDEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICALAPPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, ORWARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHERCRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TOBE FULLY AT THE CUSTOMER’S RISK.In order to minimize risks associated with the customer’s applications, adequate design and operatingsafeguards must be provided by the customer to minimize inherent or procedural hazards.TI assumes no liability for applications assistance or customer product design. TI does not warrant or representthat any license, either express or implied, is granted under any patent right, copyright, mask work right, or otherintellectual property right of TI covering or relating to any combination, machine, or process in which suchsemiconductor products or services might be or are used. TI’s publication of information regarding any thirdparty’s products or services does not constitute TI’s approval, warranty or endorsement thereof.Copyright © 1998, Texas Instruments Incorporated。

54AC14中文资料

54AC14Hex Inverter with Schmitt Trigger InputGeneral DescriptionThe ’AC14contains six inverter gates each with a Schmitt trigger input.The ’AC14contains six logic inverters which ac-cept standard CMOS input signals and provide standard CMOS output levels.They are capable of transforming slowly changing input signals into sharply defined,jitter-free output signals.In addition,they have a greater noise margin than conventional inverters.The ’AC14has hysteresis between the positive-going and negative-going input thresholds (typically 1.0V)which is de-termined internally by transistor ratios and is essentially in-sensitive to temperature and supply voltage variations.Featuresn I CC reduced by 50%n Outputs source/sink 24mAn Standard Military Drawing (SMD)—’AC14:5962-87624Logic SymbolFunction TableInput Output A O L H HLFACT ™is a trademark of Fairchild Semiconductor Corporation.IEEE/IECDS100263-1July 199854AC14Hex Inverter with Schmitt Trigger Input©1998National Semiconductor Corporation Connection DiagramsPin Names Description I n Inputs O nOutputsPin Assignment for DIP and FlatpackDS100263-2Pin Assignment for LCCDS100263-3 2Absolute Maximum Ratings(Note1)If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.Supply Voltage(V CC)−0.5V to+7.0V DC Input Diode Current(I IK)V I=−0.5V−20mA V I=V CC+0.5V+20mA DC Input Voltage(V I)−0.5V to V CC+0.5V DC Output Diode Current(I OK)V O=−0.5V−20mA V O=V CC+0.5V+20mA DC Output Voltage(V O)−0.5V to V CC+0.5V DC Output Sourceor Sink Current(I O)±50mA DC V CC or Ground Currentper Output Pin(I CC or I GND)±50mA Storage Temperature(T STG)−65˚C to+150˚C Junction Temperature(T J)CDIP175˚C Recommended Operating ConditionsSupply Voltage(V CC)’AC 2.0V to6.0V Input Voltage(V I)0V to V CC Output Voltage(V O)0V to V CC Operating Temperature(T A)54AC−55˚C to+125˚C Note1:Absolute maximum ratings are those values beyond which damage to the device may occur.The databook specifications should be met,without exception,to ensure that the system design is reliable over its power supply, temperature,and output/input loading variables.National does not recom-mend operation of FACT™circuits outside databook specifications.DC Characteristics for’AC Family Devices54ACSymbol Parameter V CC T A=−55˚C to+125˚C Units Conditions(V)Guaranteed LimitsV OH Minimum High Level OutputVoltage 3.0 2.9I OUT=−50µA4.5 4.4V5.5 5.4(Note2)V IN=V IL or V IH3.0 2.4−12mA4.5 3.7V I OH−24mA5.5 4.7−24mAV OL Maximum Low Level OutputVoltage 3.00.1I OUT=50µA4.50.1V5.50.1(Note2)V IN=V IL or V IH3.00.512mA4.50.5V I OL24mA5.50.524mAI IN Maximum Input 5.5±1.0µA V I=V CC,GNDLeakage CurrentV t+Maximum Positive 3.0 2.2T A=Worst Case Threshold 4.5 3.2V5.5 3.9V t−Minimum Negative 3.00.5T A=Worst Case Threshold 4.50.9V5.5 1.1V h(max)Maximum Hysteresis 3.0 1.2T A=Worst Case4.5 1.4V5.5 1.6V h(min)Minimum Hysteresis 3.00.3T A=Worst Case4.50.4V5.50.5DC Characteristics for’AC Family Devices(Continued)54ACSymbol Parameter V CC T A=−55˚C to+125˚C Units Conditions(V)Guaranteed LimitsI OLD(Note3)Minimum DynamicOutput Current 5.550mA V OLD=1.65V MaxI OHD 5.5−50mA V OHD=3.85V MinI CC Maximum Quiescent 5.540.0µA V IN=V CCSupply Current or GND Note2:All outputs loaded;thresholds on input associated with output under test.Note3:Maximum test duration2.0ms,one output loaded at a time.Note4:I IN and I CC@3.0V are guaranteed to be less than or equal to the respective limit@5.5V V CC.I CC for54AC@25˚C is identical to74AC@25˚C.AC Electrical Characteristics54ACV CC T A=−55˚C Fig.Symbol Parameter(V)to+125˚C Units No.(Note5)C L=50pFMin Maxt PLH Propagation Delay 3.3 1.016.0ns5.0 1.012.0t PHL Propagation Delay 3.3 1.014.0ns5.0 1.510.0Note5:Voltage Range3.3is3.3V±0.3VVoltage Range5.0is5.0V±0.5VCapacitanceSymbol Parameter Typ Units ConditionsC IN Input Capacitance 4.5pF V CC=OPENC PD Power Dissipation25.0pF V CC=5.0VCapacitance45Physical Dimensions inches(millimeters)unless otherwise noted20Terminal Ceramic Leadless Chip Carrier(L)NS Package Number E20A6Physical Dimensions inches(millimeters)unless otherwise noted(Continued)14-Lead Ceramic Dual-In-Line Package(D)NS Package Number J14A14-Lead Ceramic Flatpak(F)NS Package Number W14BLIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE-VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI-CONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices or sys-tems which,(a)are intended for surgical implant intothe body,or (b)support or sustain life,and whose fail-ure to perform when properly used in accordancewith instructions for use provided in the labeling,can be reasonably expected to result in a significant injury to the user.2.A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system,or to affect its safety or effectiveness.National Semiconductor Corporation AmericasTel:1-800-272-9959Fax:1-800-737-7018Email:support@National Semiconductor EuropeFax:+49(0)180-5308586Email:europe.support@Deutsch Tel:+49(0)180-5308585English Tel:+49(0)180-5327832Français Tel:+49(0)180-5329358Italiano Tel:+49(0)180-5341680National Semiconductor Asia Pacific Customer Response Group Tel:65-2544466Fax:65-2504466Email:sea.support@National Semiconductor Japan Ltd.Tel:81-3-5620-6175Fax:81-3-5620-617954A C 14H e x I n v e r t e r w i t h S c h m i t t T r i g g e r I n p u tNational does not assume any responsibility for use of any circuitry described,no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.。

ACH16843DGG资料

元器件交易网TSSOP56:plastic thin shrink small outline package; 56 leads; body width 6.1mm SOT364-1NOTESDefinitionsShort-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.DisclaimersLife support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.Philips Semiconductors811 East Arques AvenueP.O. Box 3409Sunnyvale, California 94088–3409Telephone 800-234-7381© Copyright Philips Electronics North America Corporation 1998All rights reserved. Printed in U.S.A.print code Date of release: 07-98。

SNJ54145J中文资料

PACKAGING INFORMATIONOrderableDevice Status (1)Package Type Package DrawingPins Package Qty Eco Plan (2)Lead/Ball FinishMSL Peak Temp (3)5962-8508401VEAACTIVE CDIP J 161TBD Call TICall TI85084012A ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type 85084012A ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type 8508401EA ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type 8508401EA ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type 8508401FA ACTIVE CFP W 161TBD A42N /A for Pkg Type 8508401FA ACTIVE CFP W 161TBD A42N /A for Pkg Type SN54LS145J ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type SN54LS145J ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type SN74145N ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74145N ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74145N3OBSOLETE PDIP N 16TBD Call TI Call TI SN74145N3OBSOLETE PDIP N 16TBD Call TI Call TISN74145NE4ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74145NE4ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74145NSR ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74145NSR ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74145NSRE4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74145NSRE4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74145NSRG4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74145NSRG4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145D ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145D ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145DE4ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145DE4ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145DG4ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145DG4ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145DR ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145DRACTIVESOICD162500Green (RoHS &no Sb/Br)CU NIPDAULevel-1-260C-UNLIM4-Jun-2007Orderable Device Status (1)Package Type Package DrawingPins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)SN74LS145DRE4ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145DRE4ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145DRG4ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145DRG4ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145N ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74LS145N ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74LS145N3OBSOLETE PDIP N 16TBD Call TI Call TI SN74LS145N3OBSOLETE PDIP N 16TBD Call TI Call TISN74LS145NE4ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74LS145NE4ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74LS145NSR ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145NSR ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145NSRE4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145NSRE4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145NSRG4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145NSRG4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SNJ54145J ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type SNJ54145J ACTIVE CDIP J 161TBD A42SNPBN /A for Pkg TypeSNJ54LS145FK ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type SNJ54LS145FK ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type SNJ54LS145J ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type SNJ54LS145J ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type SNJ54LS145W ACTIVE CFP W 161TBD A42N /A for Pkg Type SNJ54LS145WACTIVECFPW161TBDA42N /A for Pkg Type(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered4-Jun-2007at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined above.Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annualbasis.4-Jun-2007TAPE AND REELINFORMATION9-Jun-2007DevicePackage Pins SiteReel Diameter (mm)Reel Width (mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant SN74145NSR NS 16MLA 330168.210.5 2.51216Q1SN74LS145DR D 16FMX 330166.510.3 2.1816Q1SN74LS145NSRNS16MLA330168.210.52.51216Q1TAPE AND REEL BOX INFORMATIONDevice Package Pins Site Length (mm)Width (mm)Height (mm)SN74145NSR NS 16MLA 342.9336.628.58SN74LS145DR D 16FMX 342.9336.628.58SN74LS145NSRNS16MLA342.9336.628.589-Jun-20079-Jun-2007PACKAGING INFORMATIONOrderableDevice Status (1)Package Type Package DrawingPins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)5962-8508401VEAACTIVE CDIP J 161TBD A42SNPBN /A for Pkg Type85084012A ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type 85084012A ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type 8508401EA ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type 8508401EA ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type 8508401FA ACTIVE CFP W 161TBD A42N /A for Pkg Type 8508401FA ACTIVE CFP W 161TBD A42N /A for Pkg Type SN54LS145J ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type SN54LS145J ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type SN74145N ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74145N ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74145N3OBSOLETE PDIP N 16TBD Call TI Call TI SN74145N3OBSOLETE PDIP N 16TBD Call TI Call TISN74145NE4ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74145NE4ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74145NSR ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74145NSR ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74145NSRE4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74145NSRE4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74145NSRG4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74145NSRG4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145D ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145D ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145DE4ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145DE4ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145DG4ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145DG4ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145DR ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145DRACTIVESOICD162500Green (RoHS &no Sb/Br)CU NIPDAULevel-1-260C-UNLIM9-Oct-2007Orderable Device Status (1)Package Type Package DrawingPins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)SN74LS145DRE4ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145DRE4ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145DRG4ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145DRG4ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145N ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74LS145N ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74LS145N3OBSOLETE PDIP N 16TBD Call TI Call TI SN74LS145N3OBSOLETE PDIP N 16TBD Call TI Call TISN74LS145NE4ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74LS145NE4ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74LS145NSR ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145NSR ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145NSRE4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145NSRE4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145NSRG4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LS145NSRG4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SNJ54145J ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type SNJ54145J ACTIVE CDIP J 161TBD A42SNPBN /A for Pkg TypeSNJ54LS145FK ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type SNJ54LS145FK ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type SNJ54LS145J ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type SNJ54LS145J ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type SNJ54LS145W ACTIVE CFP W 161TBD A42N /A for Pkg Type SNJ54LS145WACTIVECFPW161TBDA42N /A for Pkg Type(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered9-Oct-2007at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined above.Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annualbasis.9-Oct-2007TAPE AND REEL BOXINFORMATIONDevicePackage Pins SiteReel Diameter (mm)Reel Width (mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant SN74145NSR NS 16SITE 41330168.210.5 2.51216Q1SN74LS145DR D 16SITE 2733016 6.510.3 2.1816Q1SN74LS145NSRNS16SITE 41330168.210.52.51216Q14-Oct-2007DevicePackage Pins Site Length (mm)Width (mm)Height (mm)SN74145NSR NS 16SITE 41346.0346.033.0SN74LS145DR D 16SITE 27342.9336.628.58SN74LS145NSRNS16SITE 41346.0346.033.04-Oct-2007IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,modifications,enhancements, improvements,and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by government requirements,testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design.Customers are responsible for their products and applications using TI components.To minimize the risks associated with customer products and applications,customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any TI patent right,copyright,mask work right,or other TI intellectual property right relating to any combination,machine,or process in which TI products or services are rmation published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI. Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.Reproduction of this information with alteration is an unfair and deceptive business practice.TI is not responsible or liable for such altered rmation of third parties may be subject to additional restrictions.Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice.TI is not responsible or liable for any such statements.TI products are not authorized for use in safety-critical applications(such as life support)where a failure of the TI product would reasonably be expected to cause severe personal injury or death,unless officers of the parties have executed an agreement specifically governing such use.Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications,and acknowledge and agree that they are solely responsible for all legal,regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications,notwithstanding any applications-related information or support that may be provided by TI.Further,Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications.TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or"enhanced plastic."Only products designated by TI as military-grade meet military specifications.Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk,and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS16949requirements.Buyers acknowledge and agree that,if they use anynon-designated products in automotive applications,TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAmplifiers Audio /audioData Converters Automotive /automotiveDSP Broadband /broadbandInterface Digital Control /digitalcontrolLogic Military /militaryPower Mgmt Optical Networking /opticalnetworkMicrocontrollers Security /securityRFID Telephony /telephonyLow Power /lpw Video&Imaging /videoWirelessWireless /wirelessMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2007,Texas Instruments Incorporated。

SN54ACT7881HV资料

UT54ACS132EUCC中文资料

1UT54ACS132ERadiation-HardenedQuadruple 2-Input NAND Schmitt TriggersJanuary 2004/radhardFEATURES•0.6µm CRH CMOS Process - Latchup immune •High speed•Low power consumption•Wide operating power supply from 3.0V to 5.5V •Available QML Q or V processes •14-lead flatpackDESCRIPTIONThe UT54ACS132 is a quadruple 2-input NAND gate with Schmitt Trigger input levels. A high applied on both the inputs forces the output to a low state.The devices are characterized over full military temperature range of -55°C to +125°C.LOGIC SYMBOLY1(3)(6)Y2Y3(8)(11)Y4(1)A1(2)B1(4)A2(5)B2(9)A3(10)B3(12)A4(13)B4Note:1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC Publication 617-12.&RADIATION HARDNESS SPECIFICATIONS 1PARAMETER LIMIT UNITSTotal Dose 1.0E6rads(Si)SEU Threshold 280MeV-cm2/mgSEL Threshold 120MeV-cm2/mgNeutron Fluence 1.0E14n/cm2Notes:1. Logic will not latchup during radiation exposure within the limits defined in the table.2. Device storage elements are immune to SEU affects.ABSOLUTE MAXIMUM RATINGSSYMBOL PARAMETER LIMIT UNITS V DD Supply voltage-0.3 to 7.0VV I/O V oltage any pin-.3 to V DD + .3VT STG Storage Temperature range-65 to +150°CT J Maximum junction temperature+175°CT LS Lead temperature (soldering 5 seconds)+300°CΘJC Thermal resistance junction to case20°C/WI I DC input current±10mAP D Maximum power dissipation1WNote:1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.RECOMMENDED OPERATING CONDITIONSSYMBOL PARAMETER LIMIT UNITS V DD Supply voltage 3.0 to 5.5VV IN Input voltage any pin0 to V DD VT C Temperature range-55 to +125°C23DC ELECTRICAL CHARACTERISTICS FOR THE UT54ACS132E 7 ( V DD = 3.0V to 5.5V; V SS = 0V 6; -55°C < T C < +125°C)Notes:1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: V IH = V IH (min) + 20%, - 0%; V IL = V IL (max) + 0%, - 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are guaranteed to V IH (min) and V IL (max).2. Supplied as a design limit but not guaranteed or tested.3. Per MIL-PRF-38535, for current density ≤5.0E5 amps/cm 2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765pF/MHz.4. Not more than one output may be shorted at a time for maximum duration of one second.5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and V SS at frequency of 1MHz and a signal amplitude of 50mV rms maximum.6. Maximum allowable relative shift equals 50mV .7. All specifications valid for radiation dose ≤ 1E6 rads(Si) per MIL-STD-883 Method 1019 Condition B.8. Power dissipation specified per switching output.9. This value is guaranteed based on characterization data, but not tested.SYMBOL DescriptionCONDITIONVDD MINMAX UNIT V T+Schmitt trigger positive-going threshold 13.0V 2.1V5.5V 3.85V T-Schmitt trigger negative-going threshold 1 3.0V 0.9V 5.5V 1.65V HHysteresis 2(V T+ - V T-)3.0V 0.3 1.2V4.5V .6 1.5I IN Input leakage current V IN = V DD or V SS5.5V -11µA V OL Low-level output voltage 3I OL = 100µA 3.0V 0.25V 4.5V 0.25V OH High-level output voltage 3I OH = -100µA 3.0V 2.75V 4.5V 4.25I OSShort-circuit output current 2 ,4V O = V DD and V SS3.0V -100100mA5.5V-200200I OLLow level output current 9V IN = V DD or V SS V OL = 0.4V3.0V 6mA 5.5V 8I OHHigh level output current 9V IN = V DD or V SS V OH = V DD -0.4V3.0V -6mA5.5V -8P total Power dissipation 2, 8C L = 50pF 5.5V 3.0V 1.90.76mW/MHz I DDQ Quiescent Supply Current V IN = V DD or V SS 5.5V 10µA C IN Input capacitance 5ƒ = 1MHz 0V 15pF C OUTOutput capacitance 5ƒ = 1MHz0V15pFAC ELECTRICAL CHARACTERISTICS FOR THE UT54ACS132E2(V DD = 3.0V to 5.5V; V SS = 0V 1, -55°C < T C < +125°C)SYMBOL PARAMETER V DD MINIMUM MAXIMUM UNIT t PHL Input to Yn C L = 30pF 3.0V & 3.6V212ns4.5V &5.5V28C L = 50pF 3.0V & 3.6V216ns4.5V &5.5V212t PLH Input to Yn C L = 30pF 3.0V & 3.6V215ns4.5V &5.5V211C L = 50pF 3.0V & 3.6V219ns4.5V &5.5V215Notes:1. Maximum allowable relative shift equals 50mV.2. All specifications valid for radiation dose ≤ 1E6 rads(Si) per MIL-STD-883 Method 1019 Condition B.4PackagingOrdering Information UT54ACS132EUT54*******-***Lead Finish: (Notes 1 & 2)A = SolderC = GoldX = OptionalScreening: (Note 3)C = Military Temperature Range (-55o C to +125o C)Package Type:U = 14-lead ceramic bottom-brazed dual-in-line FlatpackPart Number:132E = Quadruple 2-Input NAND GateI/O Type:ACS = CMOS compatible I/O levelNotes:1. Lead finish (A, C, or X) must be specified.2. If an "X" is specified when ordering, then the part marking will match the lead finish and will be either "A" (solder) or "C" (gold).3. Military Temperature Range flow per Aeroflex Manufacturing Flows Document. Devices have 48 hours of burn-in and are test at -55o C, room temperature, and 125o C. Radiation characterisitics are neither tested nor guaranteed and may not be specified.67UT54ACS132E: SMDDrawing Number:96542 = UT54ACS132E Device Type:02 = TID per MIL-STD-883 TM1019 Condition B Package Type:X = 14-lead ceramic bottom-brazed dual-in-line Flatpack Lead Finish: (Notes 1 & 2)A = Solder C = Gold X = Optional5962 *********Notes:1. Lead finish (A, C, or X) must be specified.2. If an "X" is specified when ordering, then the part marking will match the lead finish and will be either "A" (solder) or "C" (gold).3. Total dose radiation must be specified when ordering. QML V is not available without radiation testing.**Total Dose: (Note 3 & 4)R = 1E5 rads(Si)F = 3E5 rads(Si)G = 5E5 rads(Si)H = 1E6 rads(Si)03 = TID per MIL-STD-883 TM1019 Condition A Class Designator:Q = QML Class Q V = QML Class V4. Device type 02 is only offered with a TID tolerance guarantee of 3E5 rads(Si) or 1E6 rads(Si) and is tested in accordance with MIL-STD-883 Test Method 1019 Condition B. Device type 03 is only offered with a TID tolerance guarantee of 1E5 rads(Si), 3E5 rads(Si), and 5E5 rads(Si), and is tested in accordance with MIL-STD-883 Test Method 1019 Condition A.8。

6424;中文规格书,Datasheet资料

ebm-papst St.Georgen GmbH&Co.KGHermann-Papst-Straße1D-78112St.GeorgenPhone+49772481-0Fax+49772481-1309info2@Nominal dataType6424Nominal voltage VDC24Nominal voltage range VDC12..28Speed min-13400Power input W18.0Min.ambient temperature°C-20Max.ambient temperature°C72Air flow m3/h410Sound power level B 6.4Sound pressure level dB(A)57ml=max.load·me=max.efficiency·fa=running at free air·cs=customer specs·cu=customer unitSubject to alterationsTechnical featuresGeneral description Particular design features:Optional Vario-Pro:Highly flexible software configuration for the fan ensures an easily customisablesolution to meet the individual requirements of your application.General features:Housing made of aluminium,impeller made of fibreglass-reinforced PA;housing with grounding lugfor M4x8screw(Torx).48V version incl.screws.Electronic commutation completely integrated.Protected against reverse polarity and locking.Electrical connection to flat plugs,3x0.5mm.Air exhaust over bars.Direction of rotation counter-clockwise seen on rotor.Mass:760g.Mass0.760kgDimensions172x150x51mmMaterial of impeller Fiberglass-reinforced PA plasticHousing material Aluminum.Housing with grounding lug for screw M4x8(TORX).Direction of air flow Air exhaust over barsDirection of rotation Left,looking at rotorBearing Ball bearingsLifetime L10at40°C75000h35000hLifetime L10at maximumtemperatureConnection line Flat plugs3.0x0.5mm.Motor protection Protected against reverse polarity and locking.Locked-rotor protection Electronic blocking protection,with electronic motor current limit in the startup phase and when therotor is blocked.Approval VDE,CSA,UL,CEProduct drawing LuCharts:Air flow分销商库存信息: EBM-PAPST6424。

REF542(中文)

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54AC138中文资料

−0.5V to +7.0V
−20 mA +20 mA −0.5V to VCC + 0.5V
−20 mA +20 mA −0.5V to VCC + 0.5V
±50 mA
±50 mA −65˚C to +150˚C
175˚C
Conditions
Supply Voltage (VCC) ’AC
2.0V to 6.0V
125 mV/ns
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom-
— ’AC138: 5962-87622 — ’ACT138: 5962-87554
Logic Symbols
Connection Diagrams
Pin Assignment for DIP and Flatpak
IEEE/IEC
DS100268-1
Pin Names A0– A2 E1– E2 E3 O0– O7
L
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial

74154中文资料

线译码器74LS154引脚,参数,及功能介绍--------------------------------------------------------------------------------4 线－16 线译码器74LS154/54LS154引脚图,参数,及功能介绍74ls154功能简介:54/74154 为4 线－16 线译码器，当选通端（G1、G2）均为低电平时，可将地址端（ABCD）的二进制编码在一个对应的输出端，以低电平译出。

如果将G1和G2中的一个作为数据输入端，由ABCD对输出寻址，74LS154还可作1线-16线数据分配器。

74LS154管脚图：引脚功能介绍A、B、C、D 译码地址输入端(低电平有效)G1、G2 选通端(低电平有效)0－15 输出端(低电平有效)74ls154真值表:推荐工作条件74ls154电气参数极限值电源电压: 7V输入电压: 5.5V工作环境温度54154:－55～125℃74154:0～70℃贮存温度:－65～150℃本文来自: 原文网址：/info/commonIC/0075219.html本文来自: 原文网址：/info/commonIC/0075219.html74ls154芯片资料2007-08-20 20:4874ls138译码器74ls139 跟74ls138类似,区别在于139内部是2个独立的2-4译码器。

74ls154跟74LS138很类似,差别就在于,138是3-8译码器,154是4-16译码器。

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有梦无花wangjunxiahah艺新。

CD54AC280中文资料

Data sheet acquired from Harris SemiconductorSCHS250AFeatures•Buffered Inputs•Typical Propagation Delay-10ns at V CC = 5V, T A = 25o C, C L = 50pF •Exceeds 2kV ESD Protection per MIL-STD-883,Method 3015•SCR-Latchup-Resistant CMOS Process and Circuit Design •Speed of Bipolar FAST™/AS/S with Signiﬁcantly Reduced Power Consumption •Balanced Propagation Delays•AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply •±24mA Output Drive Current -Fanout to 15 FAST™ ICs-Drives 50Ω Transmission LinesDescriptionThe ’AC280and ’ACT280are 9-bit odd/even parity genera-tor/checkers that utilize Advanced CMOS Logic technology.Both even and odd parity outputs are available for checking or generating parity for words up to nine bits long.Even par-ity is indicated (∑E output is HIGH)when an even number ofdata inputs is HIGH.Odd parity is indicated (∑O output is HIGH)when an odd number of data inputs is HIGH.Parity checking for words larger than nine bits can be accom-plished by tying the ∑E output to any input of an additional ’AC280, ’ACT280 parity checker.PinoutCD54AC280, CD54ACT280(CERDIP)CD74AC280, CD74ACT280(PDIP , SOIC)TOP VIEWFunctional DiagramOrdering InformationPART NUMBER TEMP.RANGE (o C)PACKAGE CD54AC280F3A -55 to 12514 Ld CERDIP CD74AC280E 0 to 70o C, -40 to 85,-55 to 12514 Ld PDIP CD74AC280M 0 to 70o C, -40 to 85,-55 to 12514 Ld SOIC CD54ACT280F3A -55 to 12514 Ld CERDIP CD74ACT280E 0 to 70o C, -40 to 85,-55 to 12514 Ld PDIP CD74ACT280M 0 to 70o C, -40 to 85,-55 to 12514 Ld SOICNOTES:1.When ordering,use the entire part number.Add the suffix 96to obtain the variant in the tape and reel.2.Wafer and die for this part number is available which meets all elec-trical specifications.Please contact your local TI sales office or cus-tomer service for ordering information.I6I7NC I8∑E ∑O GND V CC I5I4I3I2I1I0123456714131211109889101113211256∑ ODD∑ EVENI0I1I2I3I5I6I7I44I8GND = 7V CC = 14NC = 3August 1998 - Revised May 2000CD54/74AC280,CD54/74ACT2809-Bit Odd/Even Parity Generator/Checker元器件交易网F Absolute Maximum Ratings Thermal InformationDC Supply Voltage, V CC. . . . . . . . . . . . . . . . . . . . . . . .-0.5V to 6V DC Input Diode Current, I IKFor V I < -0.5V or V I > V CC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA DC Output Diode Current, I OKFor V O < -0.5V or V O > V CC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA DC Output Source or Sink Current per Output Pin, I OFor V O > -0.5V or V O < V CC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA DC V CC or Ground Current, I CC or I GND (Note 3) . . . . . . . . .±100mA Operating ConditionsTemperature Range, T A . . . . . . . . . . . . . . . . . . . . . .-55o C to 125o C Supply Voltage Range, V CC (Note 4)AC T ypes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V ACT T ypes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V DC Input or Output Voltage, V I, V O . . . . . . . . . . . . . . . . .0V to V CC Input Rise and Fall Slew Rate, dt/dvAC T ypes, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . .50ns (Max) AC T ypes, 3.6V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . .20ns (Max) ACT T ypes, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . .10ns (Max)Thermal Resistance (T ypical, Note 5)θJA (o C/W) PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .___ SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .___ Maximum Junction T emperature (Plastic Package) . . . . . . . . . .150o C Maximum Storage Temperature Range . . . . . . . . . .-65o C to 150o C Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . .300o CCAUTION:Stresses above those listed in“Absolute Maximum Ratings”may cause permanent damage to the device.This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.NOTES:3.For up to 4 outputs per device, add±25mA for each additional output.4.Unless otherwise specified, all voltages are referenced to ground.5.θJA is measured with the component mounted on an evaluation PC board in free air.DC Electrical SpeciﬁcationsPARAMETER SYMBOLTESTCONDITIONS VCC(V)25o C-40o C TO85o C-55o C TO125o CUNITS V I(V)I O(mA)MIN MAX MIN MAX MIN MAXAC TYPESHigh Level Input Voltage V IH-- 1.5 1.2- 1.2- 1.2-V3 2.1- 2.1- 2.1-V5.5 3.85- 3.85- 3.85-V Low Level Input Voltage V IL-- 1.5-0.3-0.3-0.3V3-0.9-0.9-0.9V5.5- 1.65- 1.65- 1.65V High Level Output Voltage V OH V IH or V IL-0.05 1.5 1.4- 1.4- 1.4-V-0.053 2.9- 2.9- 2.9-V-0.05 4.5 4.4- 4.4- 4.4-V-43 2.58- 2.48- 2.4-V-24 4.5 3.94- 3.8- 3.7-V-75(Note 6, 7)5.5-- 3.85---V-50(Note 6, 7)5.5---- 3.85-VLow Level Output VoltageV OLV IH or V IL0.05 1.5-0.1-0.1-0.1V 0.053-0.1-0.1-0.1V 0.05 4.5-0.1-0.1-0.1V 123-0.36-0.44-0.5V 24 4.5-0.36-0.44-0.5V 75(Note 6, 7) 5.5--- 1.65--V 50(Note 6, 7)5.5----- 1.65V Input Leakage Current I I V CC or GND - 5.5-±0.1-±1-±1µA Quiescent Supply Current MSI I CCV CC or GND5.5-8-80-160µAACT TYPESHigh Level Input Voltage V IH -- 4.5 to 5.52-2-2-V Low Level Input Voltage V IL -- 4.5 to 5.5-0.8-0.8-0.8V High Level Output VoltageV OHV IH or V IL-0.05 4.5 4.4- 4.4- 4.4-V -24 4.5 3.94- 3.8- 3.7-V -75(Note 6, 7) 5.5-- 3.85---V -50(Note 6, 7)5.5---- 3.85-V Low Level Output VoltageV OLV IH or V IL0.05 4.5-0.1-0.1-0.1V 24 4.5-0.36-0.44-0.5V 75(Note 6, 7) 5.5--- 1.65--V 50(Note 6, 7)5.5----- 1.65V Input Leakage Current I I V CC or GND - 5.5-±0.1-±1-±1µA Quiescent Supply Current MSII CC V CC or GND 0 5.5-8-80-160µA Additional Supply Current per Input Pin TTL Inputs High 1 Unit Load ∆I CCV CC -2.1- 4.5 to 5.5- 2.4- 2.8-3mANOTES:6.Test one output at a time for a 1-second maximum duration.Measurement is made by forcing current and measuring voltage to minimize power dissipation.7.Test verifies a minimum 50Ω transmission-line-drive capability at 85o C, 75Ω at 125o C.ACT Input Load TableINPUT UNIT LOADAll1.43NOTE:Unit load is ∆I CC limit specified in DC Electrical Specifications T able, e.g., 2.4mA max at 25o C.DC Electrical Speciﬁcations(Continued)PARAMETERSYMBOL TEST CONDITIONSV CC (V)25o C -40o C TO 85o C -55o C TO 125o C UNITS V I (V)I O (mA)MIN MAX MIN MAX MIN MAXSwitching Speciﬁcations Input t r , t f = 3ns, C L = 50pF (Worst Case)PARAMETERSYMBOLV CC (V)-40o C TO 85o C-55o C TO 125o CUNITSMIN TYPMAXMINTYPMAXAC TYPES Propagation Delay,Any Input to ∑Ot PLH , t PHL1.5--239--263ns 3.3(Note 9)7.5-267.3-29ns 5(Note 10)5.4-19.1 5.3-21ns Propagation Delay,Any Input to ∑Et PLH , t PHL1.5--227--250ns 3.37.2-257-28ns 55.2-18.25-20ns Input CapacitanceC I ---10--10pF Power Dissipation Capacitance C PD (Note 11)--115--115-pFACT TYPES Propagation Delay,Any Input to ∑O t PLH , t PHL 5(Note 10)5.6-19.6 5.4-21.6ns Propagation Delay,Any Input to ∑E t PLH , t PHL5 5.6-19.6 5.4-21.6ns Input CapacitanceC I ---10--10pF Power Dissipation Capacitance C PD (Note 11)--115--115-pFNOTES:8.Limits tested 100%9.3.3V Min is at 3.6V, Max is at 3V.10.5V Min is at 5.5V, Max is at 4.5V.11.C PD is used to determine the dynamic power consumption per package.AC: P D = V CC 2 f i (C PD + C L )ACT: P D = V CC 2 f i (C PD + C L ) + V CC ∆I CC where f i = input frequency, C L = output load capacitance, V CC = supply voltage.FIGURE 1.10%V St r = 3ns V St PHL t PLH V SV SV SV St f = 3ns10%INPUT LEVEL I n0VΣOΣE0V0Vt PLHt PHL DUT OUTPUTR L (NOTE)OUTPUT LOAD500ΩC L 50pFNOTE:For AC Series Only: When V CC = 1.5V , R L = 1k Ω.FIGURE 2.PROPAGATION DELAY TIMESACACT Input LevelV CC 3V Input Switching Voltage, V S 0.5 V CC 1.5V Output Switching Voltage, V S0.5 V CC0.5 V CCPACKAGING INFORMATIONOrderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)CD54AC280F3A ACTIVE CDIP J141TBD Call TI Level-NC-NC-NC CD54ACT280F3A ACTIVE CDIP J141TBD Call TI Level-NC-NC-NC CD74AC280E ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCCD74AC280M ACTIVE SOIC D1450Pb-Free(RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIMCD74AC280M96ACTIVE SOIC D142500Pb-Free(RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIMCD74AC280M96E4ACTIVE SOIC D142500Pb-Free(RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIMCD74AC280ME4ACTIVE SOIC D1450Pb-Free(RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIMCD74ACT280E ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCCD74ACT280EE4ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCCD74ACT280M ACTIVE SOIC D1450Pb-Free(RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIMCD74ACT280M96ACTIVE SOIC D142500Pb-Free(RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIMCD74ACT280M96E4ACTIVE SOIC D142500Pb-Free(RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIMCD74ACT280ME4ACTIVE SOIC D1450Pb-Free(RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-The planned eco-friendly classification:Pb-Free(RoHS)or Green(RoHS&no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Green(RoHS&no Sb/Br):TI defines"Green"to mean Pb-Free(RoHS compatible),and free of Bromine(Br)and Antimony(Sb)based flame retardants(Br or Sb do not exceed0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TIto Customer on an annual basis.IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. T esting and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. 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