54F379DM资料

TL F 9527
54F 74F379Quad Parallel Register with Enable
August 1995
54F 74F379
Quad Parallel Register with Enable
General Description
The ’F379is a 4-bit register with buffered common Enable This device is similar to the ’F175but features the common Enable rather than common Master Reset
Features
Y Edge triggered D-type inputs
Y Buffered positive edge-triggered clock Y Buffered common enable input Y True and complement outputs
Y
Guaranteed 4000V minimum ESD protection
Commercial Military
Package Package Description
Number 74F379PC
N16E
16-Lead (0 300 Wide)Molded Dual-In-Line 54F379DM (QB)
J16A 16-Lead Ceramic Dual-In-Line
74F379SC (Note 1)M16A 16-Lead (0 300 Wide)Molded Small Outline JEDEC 74F379SJ (Note 1)
M16D 16-Lead (0 300 Wide)Molded Small Outline EIAJ 54F379FM (QB)W16A 16-Lead Cerpack
54F379LM (QB)
E20A
20-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX and SJX
Logic Symbols
IEEE IEC
TL F 9527–5
Connection Diagrams
Pin Assignment DIP SOIC and Flatpak
TL F 9527–1
Pin Assignment
for LCC
TL F 9527–2
TL F 9527–3
TRI-STATE is a registered trademark of National Semiconductor Corporation C 1995National Semiconductor Corporation
RRD-B30M115 Printed in U S A
Unit Loading Fan Out
54F 74F
Pin Names Description U L Input I
IH I IL
HIGH LOW Output I OH I OL E Enable Input(Active LOW)1 0 1 020m A b0 6mA D0–D3Data Inputs1 0 1 020m A b0 6mA CP Clock Pulse Input(Active Rising Edge)1 0 1 020m A b0 6mA Q0–Q3Flip-Flop Outputs50 33 3b1mA 20mA Q0–Q3Complement Outputs50 33 3b1mA 20mA
Functional Description
The’F379consists of four edge-triggered D-Type flip-flops with individual D inputs and Q and Q outputs The Clock (CP)and Enable(E)inputs are common to all flip-flops When the E is input HIGH the register will retain the present data independent of the CP input The D n and E inputs can change when the clock is in either state provided that the recommended setup and hold times are observed Truth Table
Inputs Outputs
E CP D n Q n Q n
H L X NC NC
L L H H L L L L L H
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
L e LOW-to-HIGH Transition
NC e No Change
Logic Diagram
TL F 9527–4 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
2
Absolute Maximum Ratings(Note1)
If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Storage Temperature b65 C to a150 C
Ambient Temperature under Bias b55 C to a125 C
Junction Temperature under Bias b55 C to a175 C Plastic b55 C to a150 C
V CC Pin Potential to
Ground Pin b0 5V to a7 0V Input Voltage(Note2)b0 5V to a7 0V Input Current(Note2)b30mA to a5 0mA Voltage Applied to Output
in HIGH State(with V CC e0V)
Standard Output b0 5V to V CC TRI-STATE Output b0 5V to a5 5V Current Applied to Output
in LOW State(Max)twice the rated I OL(mA) ESD Last Passing Voltge(Min)4000V Note1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired Functional operation under these conditions is not implied
Note2 Either voltage limit or current limit is sufficient to protect inputs Recommended Operating Conditions
Free Air Ambient Temperature
Military b55 C to a125 C Commercial0 C to a70 C Supply Voltage
Military a4 5V to a5 5V Commercial a4 5V to a5 5V
DC Electrical Characteristics
Symbol Parameter
54F 74F
Units V CC Conditions Min Typ Max
V IH Input HIGH Voltage2 0V Recognized as a HIGH Signal V IL Input LOW Voltage0 8V Recognized as a LOW Signal V CD Input Clamp Diode Voltage b1 2V Min I IN e b18mA
V OH Output HIGH54F10%V CC2 5I OH e b1mA Voltage74F10%V CC2 5V Min I OH e b1mA
74F5%V CC2 7I OH e b1mA
V OL Output LOW54F10%V CC0 5
V Min I OL e20mA
Voltage74F10%V CC0 5I OL e20mA
I IH Input HIGH54F20 0
m A Max V IN e2 7V
Current74F5 0
I BVI Input HIGH Current54F100
m A Max V IN e7 0V
Breakdown Test74F7 0
I CEX Output HIGH54F250
m A Max V OUT e V CC
Leakage Current74F50
V ID Input Leakage
74F4 75V0 0I ID e1 9m A
Test All Other Pins Grounded
I OD Output Leakage
74F3 75m A0 0V IOD e150mV
Circuit Current All Other Pins Grounded I IL Input LOW Current b0 6mA Max V IN e0 5V
I OS Output Short-Circuit Current b60b150mA Max V OUT e0V
I CCL Power Supply Current2840mA Max V O e LOW
3
AC Electrical Characteristics
74F54F74F
T A e a25 C
T A V CC e Mil T A V CC e Com Symbol Parameter V CC e a5 0V
C L e50pF C L e50pF Units
C L e50pF
Min Typ Max Min Max Min Max
f max Maximum Clock Frequency10014075100MHz t PLH Propagation Delay3 55 06 53 08 53 57 5
ns t PHL CP to Q n Q n5 06 58 54 010 05 09 5
AC Operating Requirements
74F54F74F
Symbol Parameter
T A e a25 C
T A V CC e Mil T A V CC e Com Units V CC e a5 0V
Min Max Min Max Min Max
t s(H)Setup Time HIGH or LOW3 04 03 0
t s(L)D n to CP3 04 03 0
ns t h(H)Hold Time HIGH or LOW1 02 01 0
t h(L)D n to CP1 02 01 0
t s(H)Setup Time HIGH or LOW6 08 06 0
t s(L)E to CP6 08 06 0
ns t h(H)Hold Time HIGH or LOW000
t h(L)E to CP000
t w(H)CP Pulse Width4 05 04 0
ns t w(L)HIGH or LOW5 07 05 0
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows
74F379S C X
Temperature Range Family Special Variations
74F e Commercial QB e Military grade device with
54F e Military environmental and burn-in
processing
Device Type X e Devices shipped in13 reel
Package Code Temperature Range
P e Plastic DIP C e Commercial(0 C to a70 C)
D e Ceramic DIP M e Military(b55 C to a125 C)
F e Flatpak
L e Leadless Chip Carrier(LCC)
S e Small Outline SOIC JEDEC
SJ e Small Outline SOIC EIAJ
4
Physical Dimensions inches(millimeters)
20-Lead Ceramic Leadless Chip Carrier(L)
NS Package Number E20A
16-Lead Ceramic Dual-In-Line Package(D)
NS Package Number J16A
5
Physical Dimensions inches(millimeters)(Continued)
16-Lead(0 150 Wide)Molded Small Outline Integrated Circuit(S)
NS Package Number M16A
16-Lead(0 300 Wide)Molded Small Outline Package EIAJ(SJ)
NS Package Number M16D
6
Physical Dimensions inches(millimeters)(Continued)
16-Lead(0 300 Wide)Molded Dual-In-Line Package(P)
NS Package Number N16E
7
54F 74F 379Q u a d P a r a l l e l R e g i s t e r w i t h E n a b l e
Physical Dimensions inches (millimeters)(Continued)
16-Lead Ceramic Flatpak (F)NS Package Number W16A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or 2 A critical component is any component of a life systems which (a)are intended for surgical implant support device or system whose failure to perform can into the body or (b)support or sustain life and whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system or to affect its safety or with instructions for use provided in the labeling can effectiveness
be reasonably expected to result in a significant injury to the user
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