BSP250中文资料

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1 Top view 2 3
MAM121
s
Fig.1 Simplified outline and symbol.
QUICK REFERENCE DATA SYMBOL VDS VSD VGSO VGSth ID RDSon Ptot PARAMETER drain-source voltage (DC) source-drain diode forward voltage gate-source voltage (DC) gate-source threshold voltage drain current (DC) drain-source on-state resistance total power dissipation ID = −1 A; VGS = −10 V Ts = 100 °C IS = −1.25 A open drain ID = −1 mA; VDS = VGS CONDITIONS − − − −1 − − − MIN. MAX. −30 −1.6 ±20 −2.8 −3 0.25 5 V V V V A Ω W UNIT
g
CAUTION The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling.
handbook, halfpage
−16
MBE150
handbook, halfpage
−10
MBE145
ID (A) −12
VGS (V) −8
−6
−8
−4
−4
−2
0
0
−2
−4
−6
VGS (V)
−8
0 0
−2
−4
−6
−8 −10 Qg (nC)
VDS = −10 V. Tj = 25 °C.
VDD = −15 V. ID = −3 A.
1997 Jun 20
2
元器件交易网
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDS VGSO ID IDM Ptot Tstg Tj IS ISM Notes 1. Pulse width and duty cycle limited by maximum junction temperature. PARAMETER drain-source voltage (DC) gate-source voltage (DC) drain current (DC) peak drain current total power dissipation storage temperature operating junction temperature Ts ≤ 100 °C note 1 open drain Ts ≤ 100 °C note 1 Ts = 100 °C Tamb = 25 °C; note 2 CONDITIONS − − − − − − −65 − − − MIN.
元器件交易网
DATA SHEET
BSP250 P-channel enhancement mode vertical D-MOS transistor
Product specification Supersedes data of November 1994 File under Discrete Semiconductors, SC13b 1997 Jun 20
BSP250
UNIT K/W K/W
1. Device mounted on an epoxy printed-circuit board, 40 × 40 × 1.5 mm; mounting pad for drain lead minimum 6 cm2. CHARACTERISTICS Tj = 25 °C unless otherwise specified. SYMBOL V(BR)DSS VGSth IDSS IGSS IDon RDSon yfs Ciss Coss Crss QG QGS QGD PARAMETER drain-source breakdown voltage gate-source threshold voltage drain-source leakage current gate leakage current on-state drain current drain-source on-state resistance forward transfer admittance input capacitance output capacitance reverse transfer capacitance total gate charge gate-source charge gate-drain charge CONDITIONS VGS = 0; ID = −10 µA VGS = VDS ; ID = −1 mA VGS = 0; VDS = −24 V VGS = ±20 V; VDS = 0 VGS = −10 V; VDS = −1 V VGS = −4.5 V; VDS = −5 V VGS = −4.5 V; ID = −0.5 A VGS = −10 V; ID = −1 A VDS = −20 V; ID = −1 A MIN. −30 −1 − − −3 −1 − − 1 TYP. − − − − − − 0.33 0.22 2 250 140 50 10 1 3 MAX. − −2.8 −100 ±100 − − 0.4 0.25 − − − − 25 − − UNIT V V nA nA A A Ω Ω S pF pF pF nC nC nC
handbook, halfpage
2.0
MLB885
Ptot (W)
−102 handbook, halfpage ID (A) −10 (1)
MLB835
1.6
tp = 10 µs
1.2
−1 1 ms P −10−1
0.8
δ= T
tp
DC
0.4
tp t T −1 −10 VDS (V) −102
0 0 50 100 150 200 Tamb (°C)
−10−2 −10−1
δ = 0.01. Soldering point temperature Ts = 100 °C. (1) RDSon limitation.
Fig.2 Power derating curve.
Fig.3 SOAR.
1997 Jun 20
元器件交易网
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
FEATURES • High-speed switching • No secondary breakdown • Very low on-resistance. APPLICATIONS • Low-loss motor and actuator drivers • Power switching. DESCRIPTION
Switching times ton toff turn-on time turn-off time − − 20 50 80 140 ns ns
Source-drain diode VSD trr source-drain diode forward voltage VGD = 0; IS = −1.25 A reverse recovery time IS = −1.25 A; di/dt = 100 A/µs − − − 150 −1.6 200 V ns
600
MBE144
handbook, halfpage V GS = ID
−12
MBE149
C (pF) 400
(A) −10 −8 −6
−10 V
−7.5 V −6 V
−5 V −4.5 V
Ciss 200 Coss Crss 0 0 −10 −20 −30
−4
−4 V −3.5 V −3 V −2.5 V
BSP250
MAX. −30 ±20 −3 −12 5 1.65 +150 150 −1.5 −6 V V A A
UNIT
W W °C °C
Source-drain diode source current (DC) peak pulsed source current A A
2. Device mounted on an epoxy printed-circuit board, 40 × 40 × 1.5 mm; mounting pad for drain lead minimum 6 cm2.
handbook, halfpage
BSP250
PINNING - SOT223 PIN 1 2 3 4 SYMBOL g d s d DESCRIPTION gate drain source drain
4
d
P-channel enhancement mode vertical D-MOS transistor in a SOT223 plastic SMD package.
1997 Jun 20
4
元器件交易网
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
BSP250
handbook, halfpage
−2
0 0
VDS (V)
−2
−4
−6
−8
−10 −12 V DS (V)
VGS = 0. Tj = 25 °C. Tj = 25 °C.
Fig.4
Capacitance as a function of drain source voltage; typical values.
Fig.5 Output characteristics; typical values.
VGS = 0; VDS = −20 V; f = 1 MHz − VGS = 0; VDS = −20 V; f = 1 MHz − VGS = 0; VDS = −20 V; f = 1 MHz − VGS = −10 V; VDS = −15 V; ID = −2.3 A VGS = −10 V; VDS = −15 V; ID = −2.3 A VGS = −10 V; VDS = −15 V; ID = −2.3 A VGS = 0 to −10 V; VDD = −20 V; ID = −1 A; RL = 20 Ω VGS = −10 to 0 V; VDD = −20 V; ID = −1 A; RL = 20 Ω − − −
3
元器件交易网
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
THERMAL CHARACTERISTICS SYMBOL Rth j-a Rth j-s Note PARAMETER thermal resistance from junction to ambient thermal resistance from junction to soldering point CONDITIONS note 1 VALUE 75 10
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