assignment2_fall2014

ECE 369, Assignment #2,
Due by September 17, 2014
Total Points: 100
∙One submission per group is sufficient.
∙On your assignment submission, mention the % effort from each person in the group.
∙You are free to consult with your classmates, however write your own solutions.
∙Return hardcopy of your answers
Problem 1 (20pts)
Below is a C function that returns the index of the smallest element in an integer array
V[], which contains n items. A translation of this function into MIPS assembly language is shown to the right. Registers $a0 and $a1 correspond to V[] and n. The index of the minimal element is placed in $v0 as the return value.
Say that we run this program on a 500MHz processor, with a clock cycle time of 2ns. The CPIs for different types of MIPS instructions are given below; you can assume mul and bge each count as one instruction.
a) Assume minimum is passed an array with the numbers from 101 to 1 in descending order (101, 100, 99, …, 3, 2, 1). What would be the exact CPU time for the fu nction call, in nanoseconds?
b) It is possible to replace “mul $t2,$t1,4” by the following two instructions.
What would be the exact CPU time in nanoseconds if we made this modification to the original code, and called the minimum function with the same input array 101, 100, 99, …, 3, 2, 1?
c) What is the performance increase or decrease of the modified code in (b) compared to the original? You may leave your answer as a fraction.
Problem 2) (5pts) Assume that variables f,g,h,i, and j are assigned to registers S0, S1, S2, S3 and S4 respectively. Assume that based address of the arrays A and B are in registers S6 and S7, respectively. What is the corresponding C statement for the given MIPS program below:
sll t0, s0, 2
add t0, s6, t0
sll t1, s1, 2
add t1, s7, t1
lw s0, 0(t0)
addi t2, t0, 4
lw t0, 0(t2)
add t0, t0, s0
sw t0, 0(t1)
Problem 3) (15pts) The table below shows 32-bit values of an array stored in the memory. Address Data
24 2
28 4
32 3
36 6
40 1
a)Write C code to sort the data from lowest to highest, placing lowest value in the smallest
memory location. Assume that the data shown represents the C variable called “Array”,
which is an array of type int, and that the first number in the array is the first element of
the array. Assume that this particular machine is a byte-addressable machine and a word consists of 4 bytes
b)Write the MIPS equivalent of part (a). Use minimum number of instructions Assume that
the based address of Array is stored in $s6.
Problem 4) (10pts) Show how the value 0xabcdef12 would be arranged in memory of a little-endian and a big-endian machine. Assume the data is stored starting at address 0.
Problem5 (10pts). Assume that registers $s0 and $s1 hold the values 0x80000000 and
0xD0000000, respectively. What is the value of $t0 for the following codes?
a)add $t0, $s0, $s1
b)sub $t0, $s0, $s1
Problem 6(20 pts). Assume that we would like to expand the MIPS register file to 128 registers and expad the instruction set to contain four times as many instructions.
a)How would this effect the size of each of the bit fields in R-type of instructions?
b)How would this effect the size of each of the bit fields in I-type of instructions?
c)Could increasing the number of registers increase the code size? Justify
d)Could increasing the number of instructions increase the code size? Justify
Problem 7(10pts) MIPs ISA includes pseudo instructions. They are not real instructions but are implemented by a combination of instructions defined in the MIPS. Not (bit-wise invert) is a pseudo instruction. How would you implement not $t1, $t2 with minimal set of instructions?
Problem 8(10pts) Consider the following code:
lbu $t0, 0($t1)
sw $t0, 0($t2)
Assume that the register $t1 contains address 0x1000 0000 and the register $t2 contains the address 0x1000 0010. Note the MIPS architecture utilizes big-endian addressing. Assume that the data (in hexadecimal) at address 0x1000 0000 is: 0x11223344. What value is stored at the address pointed to by register $t2?。