DDU18-24C4中文资料

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轧机用四列圆柱滚子轴承

中华人民共和国机械行业标准滚动轴承JB/T 5389.1-1995轧机用四列圆柱滚子轴承代替JB/T 5389-91Four-row cylindrical roller bearings for Rolling Mill1 范围本标准规定了轧机用四列圆柱滚子轴承（以下简称轴承）的结构、代号、外形尺寸及技术条件。

本标准适用于轴承的制造、检验和设计选型与验收。

2 引用标准下列标准所包含的条文，通过在本标准中引用而构成为本标准的条文。

在标准出版时，所示版本均为有效。

所有标准都会被修订，使用本标准的各方应探讨使用下列标准最新版本的可能性。

GB/T 272-93 滚动轴承代号方法GB 307.2-84 滚动轴承公差的测量方法（GB/T 307.2-1995 滚动轴承测量和检验的原则及方法）GB 307.3-84 滚动轴承一般技术要求（GB/T 307.3-1996 滚动轴承通用技术规则）GB 3203-82 渗碳轴承钢技术条件GB 7811-87 滚动轴承参数符号ZB J11 020-89 滚动轴承及其商品零件检测规则ZB J36 001-86 滚动轴承零件渗碳热处理质量标准ZB J36 002-86 滚动轴承零件深层渗碳热处理质量标准JB 1255-91 高碳铬轴承钢滚动轴承零件热处理技术条件JB/T 2974-93 滚动轴承代号方法的补充规定JB/T 3016-91 滚动轴承包装钉板箱技术条件JB/T 3017-91 滚动轴承包装纸箱技术条件JB/T 3034-93 滚动轴承轴承油封防锈包装JB/T 3573-93 滚动轴承径向游隙的测量及评定方法JB/T 3574-91 滚动轴承产品标志3 符号和缩略语除下列符号外，本标准所引用的符号符合GB 7811的规定。

R : 内圈公称倒角r 1 : 外圈公称倒角r min : 内圈最小单向倒角尺寸r 1 min : 外圈最小单向倒角尺寸d1mpmax-d2mpmin : 同一轴承两内圈间，最大平均内径与最小平均内径之差d i : 内圈滚道公称直径 Δd i : 内圈滚道直径偏差Vd ip : 单一径向平面内，内圈滚道直径变动量 E : 内圈滚道公称宽度 L i : 内圈滚道直线度d imp -d imp ′: 内圈滚道两端平均直径之差Sd i : 内圈滚道素线对基准端面倾斜度的变动量 F w: : 滚子组内径4 结构型式FC 型-四列圆柱辊子轴承（见图1）FCD 型-双内圈四列圆柱辊子轴承（见图2）FCDP 型-外面带平挡圈的双内圈四列圆柱辊子轴承（见图3）5 代号5.1 代号的构成轴承代号由类型代号、尺寸代号和后置代号构成，其排列顺序如下：类型代号尺寸代号后置代号5.2 类型代号类型代号由大写拉丁字母组成，表示轴承的结构特征，见表1。

24C64中文资料

EEPROM是"Electrically Erasable Programmable Read-only"（电可擦写可编程只读存储器）的缩写，EEPROM在正常情况下和EPROM一样，可以在掉电的情况下保存数据，所不同的是它可以在特定引脚上施加特定电压或使用特定的总线擦写命令就可以在在线的情况下方便完成数据的擦除和写入，这使EEPROM被用于广阔的的消费者范围，如：汽车、电信、医疗、工业和个人计算机相关的市场，主要用于存储个人数据和配置/调整数据。

EEPROM又分并行EEPROM和串行EEPROM，并行EEPROM器件虽然有很快的读写的速度，但要使用很多的电路引脚。

串行EEPROM器件功能上和并行EEPROM基本相同，提供更少的引脚数、更小的封装、更低的电压和更低的功耗，是现在使用的非易失性存储器中灵活性最高的类型。

串行EEPROM按总线分，常用的有I2C,SPI,Microwire总线。

本文将介绍这三种总线连接单片机的编程方法。

I2C总线I2C总线（Inter Integrated Circuit内部集成电路总线）是两线式串行总线，仅需要时钟和数据两根线就可以进行数据传输，仅需要占用微处理器的2个IO引脚，使用时十分方便。

I2C总线还可以在同一总线上挂多个器件，每个器件可以有自己的器件地址，读写操作时需要先发送器件地址，该地址的器件得到确认后便执行相应的操作，而在同一总线上的其它器件不做响应，称之为器件寻址，这个原理就像我们打电话的原理相当。

I2C总线产生80年代，由PHLIPS公司开发，早期多用于音频和视频设备，如今I2C总线的器件和设备已多不胜数。

最常见的采用I2C总线的EEPROM也已被广泛使用于各种家电、工业及通信设备中，主要用于保存设备所需要的配置数据、采集数据及程序等。

生产I2C总线EEPROM的厂商很多，如ATMEL、Microchip公司，它们都是以24来开头命名芯片型号，最常用就是24C系列。

达涅利中文标准

标准代号：
5.900.016 共 11 页第 3页
达涅利
Байду номын сангаас
铜和低合金铜（材料）
版次：取代：
00
EN 1982：铜和铜合金。锭铁和铸件。 EN 12167：铜和铜合金。用于一般性用途的型面、矩形件 EN 12420：铜和铜合金。锻件 UNI 5649-1+FA1-90：铜-锻造铜制品-质量、需求与测试 UNI 5649-2+FA1-90：铜-锻造铜制品-质量、需求与测试 6- 责任本款不适用 7–标准 7.1–特性此处所指特性系指那些与测试样品和样件一致的特性 7.1.1- 铸件机械特性此类产品目前尚未被列为达涅利机械标准。如果有特殊需求或要求，请参照以下标准： EN 1976、EN1982；可使用指定用于半成产品的同类材料。 7.1.2 – 铸件化学成份（%）本款不适用 7.1.3- 铸件电学特性本款不适用
硬度厚度mmcu模具表7172名称最小最大温度c抗张强度rmmpa02弹性强度rp02mpa延展度a5布氏测量值维氏测量值2026534519527525108095100195275含p压延模具en12167cudhph080en12167cw024ah080原为din1787sfcu原为uni56491cudhp所有所有2001451952026534326028025108095100260275255275200230245210230300180220180220压延模具din405002cuag01pf25encuag010ph080encw016ah080原为din17666cuag01p原为uni56492cuag01p所有所有400150151301452026534326028025108095100260275255275200230245210230300180220180220含ag辊压模具面板din405002cuag01pf25encuag010ph080encw016ah080原为din17666cuag01p原为uni56492cuag01p所有所有40015015130145718模具化学成份依照en1976en1976cudhp

280049c中文版技术手册

中文版技术手册一、引言技术手册是一种介绍和解释产品、服务或系统的文件，旨在帮助用户理解并正确使用所述产品、服务或系统。

中文版技术手册是一种以中文为载体的技术说明资料，通常由产品或服务的制造商、供应商或开发者提供给用户。

中文版技术手册通常包括产品或服务的功能特点、使用方法、维护保养等方面的内容，目的是为用户提供全面的技术支持和指导。

二、编写目的本技术手册的编写目的是为了向用户介绍产品（或服务）的具体情况和使用方法，以便用户能够正确、安全地使用产品（或服务），并充分发挥其功能和效益。

在编写本技术手册时，我们将以客观、准确、清晰的语言对产品（或服务）进行全面的介绍，以便广大用户更好地了解和使用产品（或服务）。

三、内容概述（一）产品概况1.产品名称2.产品型号3.产品特点4.产品规格5.产品外观6.产品配件（二）产品使用1.产品安装2.产品开机3.产品设置4.产品操作5.产品功能6.产品维护与保养（三）产品故障排除1.常见故障2.故障处理方法3.售后服务政策（四）其他注意事项1.产品使用安全须知2.产品保修说明3.版权与免责声明四、编写要求本技术手册的编写要求是要求编写人员在撰写时要做到准确、全面、易懂、条理清晰的原则，并严格按照产品（或服务）的实际情况进行描述。

编写人员应当充分了解产品（或服务）的相关知识，对于各个环节应当有明确的了解与理解，以便为用户提供准确可信的信息。

另外，编写人员还应当在文中使用简洁、通俗易懂的语言，避免使用专业术语，以便用户更好地了解内容。

五、结语中文版技术手册旨在为用户提供全面、准确的产品（或服务）信息，帮助用户更好地了解和使用所述产品（或服务）。

编写本技术手册时，我们将以客观、准确、清晰的语言对产品（或服务）进行全面的介绍，以便广大用户更好地了解和使用产品（或服务）。

希望本技术手册能为用户提供有益的帮助，促进产品（或服务）的良好使用和维护。

以上是对中文版技术手册的一些基本介绍与内容概述，同时也对编写本技术手册的要求做出了明确的说明。

海外规格仕样书第4版(中文)

4.在机铭板上标示出以下内容・制造者名・制造年月・形式以及model编号・定格电源电压（电压、位相、周波数、最大负荷电流、etc）在电源上不可以用「AC200V」表示，而要用「～200V」表示・气压（定格压力）・原产地表示（MADE IN JAPAN等）注）FA标准机铭板： 4—710—156—01（大—11）带孔、by三立产业 EN60204 UL1740
8.盖子、马达框架、trans core、电装品筐体、以及接续管等的金属部，如果和地线或金属接触，会导致和物品本身的导通。
ＥＮ６０２０４、ＵＬ１７４０
7/28
要求事项
1.电源切断装置要使用得到认可的漏电断路器、自动断路器、线路保护器ＥＮ６０２０４、ＵＬ１７４０ 2.主断路器的定格要遵循以下事项。ＥＮ６０２０４、ＵＬ１７４０ a）电流容量：最大负荷电流的115%以上，或者使用的导线的要求容许电流以下（14配线以及电路——参照17） b）切断容量：在机器上使用的马达中，最大马达的 rotor rock电流+其他装置的最大负荷电流以上 3.电力引入线（一次电源）要直接和断路器连接ＥＮ６０２０４、ＵＬ１７４０ 4.电源切断装置遵循一下事项。ＥＮ６０２０４、ＵＬ１７４０（a）安装把手，方便从外部操作（b）把手的中心高度在０.６～１.９以内（c）要有ＯＦＦ锁定机能．（可以上锁的构造）（d）门关上时要有ＯＮ/ＯＦＦ的明确指示（e）ＯＮ/ＯＦＦ可以用「O」也可以用「I」来表示（f）接地导线以外所有的相要同时切断（g）主断路器上如果没有OFF锁定机能，要在负荷侧设定带钥匙的主开关。
贵社 check
本社 check
备注
① 外观以及构造的规定
4/28

FR24中文资料

25 50 75 100 125 150 175 ° Ambient Temperature (°C)
100 10 Number of Cycles @ 60 Hz
Typical Instantaneous Forward Characteristics 100 Forward Current (A)
FR20 . . . 210 Series Maximum Ratings Peak Repetitive Reverse Voltage...VRRM RMS Reverse Voltage...VR(rms) DC Blocking Voltage...VDC Average Forward Rectified Current...IF(av) TA = 55°C Non-Repetitive Peak Forward Surge Current...IFSM @ Rated Current & Temp Operating & Storage Temperature Range...TJ, TSTRG Electrical Characteristics Maximum Forward Voltage @ 2.0A...VF Maximum DC Reverse Current...IR @ Rated DC Blocking Voltage @ @ 25°C 100°C ............................................. 1.3 ............................................... FR20 50 35 50 FR21 100 70 100 FR22 200 140 200 FR24 400 280 400 FR26 600 420 600 FR28 800 560 800 FR210 1000 700 1000

24C04中文资料

24C02串行E2PROM的读写I2C总线是一种用于IC器件之间连接的二线制总线。

它通过SDA（串行数据线）及SCL（串行时钟线)两根线在连到总线上的器件之间传送信息，并根据地址识别每个器件：不管是单片机、存储器、LCD驱动器还是键盘接口。

1．I2C总线的基本结构采用I2C总线标准的单片机或IC器件，其内部不仅有I2C接口电路，而且将内部各单元电路按功能划分为若干相对独立的模块，通过软件寻址实现片选，减少了器件片选线的连接。

CPU不仅能通过指令将某个功能单元电路挂靠或摘离总线，还可对该单元的工作状况进行检测，从而实现对硬件系统的既简单又灵活的扩展与控制。

I2C总线接口电路结构如图1所示。

2．双向传输的接口特性传统的单片机串行接口的发送和接收一般都各用一条线，如MCS51系列的TXD和RXD，而I2C 总线则根据器件的功能通过软件程序使其可工作于发送或接收方式。

当某个器件向总线上发送信息时，它就是发送器(也叫主器件)，而当其从总线上接收信息时，又成为接收器(也叫从器件)。

主器件用于启动总线上传送数据并产生时钟以开放传送的器件，此时任何被寻址的器件均被认为是从器件。

I2C总线的控制完全由挂接在总线上的主器件送出的地址和数据决定。

在总线上，既没有中心机，也没有优先机。

总线上主和从(即发送和接收)的关系不是一成不变的，而是取决于此时数据传送的方向。

SDA和SCL均为双向I/O线，通过上拉电阻接正电源。

当总线空闲时，两根线都是高电平。

连接总线的器件的输出级必须是集电极或漏极开路，以具有线“与”功能。

I2C总线的数据传送速率在标准工作方式下为100kbit/s，在快速方式下，最高传送速率可达400kbit/s。

3．I2C总线上的时钟信号在I2C总线上传送信息时的时钟同步信号是由挂接在SCL时钟线上的所有器件的逻辑“与”完成的。

SCL线上由高电平到低电平的跳变将影响到这些器件，一旦某个器件的时钟信号下跳为低电平，将使SCL线一直保持低电平，使SCL线上的所有器件开始低电平期。

航盛维修手册统一版

www. hangsheng- sh. com
3.3.2.3 车内部半球摄像头................................................................28 3.3.2.3.1 车内部半球摄像头参数.....................................................28 3.3.2.3.2 车内部半球摄像头尺寸图.................................................28 3.3.2.3.3 车内部半球摄像头接口定义.............................................29 3.3.3 连接线参数 .............................................................................. 29 3.3.4 控制盒尺寸 .............................................................................. 29 3.3.5 系统连接总成图....................................................................... 29 3.4 故障排除指导 ..................................................................................... 30 3.5 注意事项 ............................................................................................ 30 影音类 ............................................................................................................... 31 4 高清播放器（固态存储）.......................................................................... 31 4.1 功能描述 ............................................................................................. 31 4.2 系统组成 ............................................................................................. 31 4.2.1 产品图示 .................................................................................. 31 4.2.2 系统组成图 .............................................................................. 32 4.2.3 整机接线图 .............................................................................. 32 4.3 技术参数 ............................................................................................. 33 4.3.1 性能及技术参数....................................................................... 33 4.3.2 面板及定义 .............................................................................. 33 4.4 故障排除及维护指导.......................................................................... 34 4.4.1 故障排除 ................................................................................. 34 4.4.2 日常维护保养.......................................................................... 34 5 液晶显示器 ................................................................................................. 35 5.1 功能描述 ............................................................................................. 35 5.1.1 功能介绍：.............................................................................. 35 5.2 系统组成 ............................................................................................. 35

CU4中文资料

4-64Safety RelaysTiming Control UnitsCU4DescriptionThe CU4 is an off-delay timing unit which can be operatedstandalone or as an extension of a host relay. The timed outputs are used in applications where power must be maintained for a fixed duration after an input signal is received. For example, driving a power to lock TLS2-GD2 to maintain a guard door in the locked position for a fixed duration after a stop button is pressed. Another example would be maintaining the connection of a drive to a motor until the braking function is achieved, and then dropping out a contactor to remove power to the motor.The inputs can be connected in either a single channel or dual channel configuration. The inputs must remain closed during the complete timing cycle. Opening the contacts before the timing cycle completes causes the timer to be reset to zero.The CU4 has a redundant structure with two independent safe timer circuits. The outputs include two normally open safety delayed outputs as well as one normally closed safety output. The safety outputs have independent and redundant internal contacts to help ensure the safety function. When used an extension of a host relay, the normally closed contacts should be used in the feedback loop of the host relay. If used in standalone application, the normally closed contacts can be used to signal an auxiliary device or PLC. A typical operation starts with power applied to A1/A2 and the input circuits open.1.Close the B11/B12 and B21/B22 circuits.a. The safety outputs (17/18 and 27/28) close immediately.2.Open the B11/B12 or B21/B22 circuits.a. The timing process starts.b. The safety outputs (17/18 and 27/28) open after the time expires.3.Go to Step 1.Features•Category 3 per EN 954-1•Stop category 1•Timed off-delay 0.15s to 30s • 2 Safety contacts • 1 Auxiliary contact •1 Monitoring contactSpecifications➊ See Output Ratings on page 1-29 for details. Consult factory for ratings notshown.Standards EN 954-1, ISO 13849-1, IEC/EN 60204-1, IEC 60947-5-1, ANSI B11.19, AS4024.1Category Cat. 3 per EN 954-1 (ISO13849-1)Approvals C-Tick, CE marked for allapplicable directives, cULus and BG Power Supply 24V AC/DC, 50/60 Hz 0.85 to 1.1 x rated voltage Power Consumption 2.5WSafety Inputs 1 N.C. or 2 N.C.Input Simultaneity InfiniteOutputs2 N.O. Safety; 1 N.C. Auxiliary ➊ Output Utilization per IEC 60947-5-1 (Inductive)B300 AC-155A/250V AC, 5A/125V AC N300 DC-13 3A/24V DC Timed Off-Delay 0.15 to 30sFuses Output External 6A Slow Blow or 10A Quick Blow Min. Switched Current/Voltage 10mA/10V Contact Material Ag Sn O 2/0.5µ Au Response Time 30msecIndication LEDsGreen = PowerGreen =CH t1 Active Green = CH t2 active Impulse Withstand Voltage 2500V Pollution Degree 2Operating T emperature -5°C to +55°C (+23°F to 131°F)Humidity90% RH Enclosure Protection IP40 (NEMA 1)T erminal Protection IP20Maximum Conductor Size 0.2–4mm 2 (24-12AWG)T orque Settings—terminal screws 0.4Nm (3.54lb²in)Mounting 35mm DIN rail Weight165g (0.36lbs)Electrical Life220V AC/4A/880VA cos ϕ=0.35220V AC/1.7A/375VA cos ϕ=0.630V DC/2A/60W 10V DC/0.01A/0.1W 100,000 operations 500,000 operations 1,000,000 operations 2,000,000 operations Mechanical Life 2,000,000 operations Vibration 10-55 Hz, 0.35mm Shock10g, 16ms, 100 shocksSafety Relays4-65Timing Control UnitsCU4Product SelectionDimensions—mm (inches) Block DiagramTypical Wiring DiagramsInputs Safety OutputsAuxiliary OutputsTiming Range Catalogue Number1 N.C. or2 N.C.2 N.O.1 N.C.0.15 – 3s 440R-S231730.5 – 10s 440R-S231741.5 – 30s440R-S23175Dual Channel Wiring to CU4 InputsSingle Channel Wiring to CU4 Inputs。

DDU18-48C4中文资料

.020 TYP.
.040 TYP.
.010±.002
24 23 22 21 20 19 18 17 16 15 14 13
.710 .590 ±.005 MAX.
.882 ±.005 .007 ±.005
1
2
3
4
5
6
7
8
9
10 11 12
.090 1.100 1.280±.020
.100
.280 MAX.
Doc #97041
5/5/04
DATA DELAY DEVICES, INC.
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APPLICATION NOTES
HIGH FREQUENCY RESPONSE
The DDU18 tolerances are guaranteed for input pulse widths and periods greater than those specified in the test conditions. Although the device will function properly for pulse widths as small as 40% of the total delay and periods as small as 80% of the total delay (for a symmetric input), the delays may deviate from their values at low frequency. However, for a given input condition, the deviation will be repeatable from pulse to pulse. Contact technical support at Data Delay Devices if your application requires device testing at a specific input condition.

FM24C04A-G中文资料

This product conforms to specifications per the terms of the Ramtron Ramtron International Corporationstandard warranty. The product has completed Ramtron’s internal1850 Ramtron Drive, Colorado Springs, CO 80921FM24C04A4Kb FRAM Serial MemoryFeatures4K bit Ferroelectric Nonvolatile RAM • Organized as 512 x 8 bits• High Endurance 1012 Read/Writes • 45 Year Data Retention • NoDelay™ Writes• Advanced High-Reliability Ferroelectric ProcessFast Two-wire Serial Interface• Up to 1 MHz maximum bus frequency • Direct hardware replacement for EEPROMLow Power Operation • 5V operation• 150 µA Active Current (100 kHz) • 10 µA Standby CurrentIndustry Standard Configuration• Industrial Temperature -40° C to +85° C • 8-pin SOIC (-S)• “Green” 8-pin SOIC (-G)DescriptionThe FM24C04A is a 4-kilobit nonvolatile memory employing an advanced ferroelectric process. A ferroelectric random access memory or FRAM is nonvolatile and performs reads and writes like a RAM. It provides reliable data retention for 45 years while eliminating the complexities, overhead, and system level reliability problems caused by EEPROM and other nonvolatile memories.Unlike serial EEPROMs, the FM24C04A performs write operations at bus speed. No write delays are incurred. Data is written to the memory array in the cycle after it has been successfully transferred to the device. The next bus cycle may commence immediately.These capabilities make the FM24C04A ideal for nonvolatile memory applications requiring frequent or rapid writes. Examples range from data collection where the number of write cycles may be critical, to demanding industrial controls where the long write time of EEPROM can cause data loss. The combination of features allows more frequent data writing with reduced overhead for the system.The FM24C04A provides substantial benefits to users of serial EEPROM, yet these benefits are available in a hardware drop-in replacement. The FM24C04A is available in industry standard 8-pin packages using a two-wire protocol. The specifications are guaranteed over an industrial temperature range of -40°C to +85°C.Pin ConfigurationPin Names Function A1-A2 Device Select Address 1 and 2 SDA Serial Data/Address SCL Serial Clock WP Write Protect VSS Ground VDD Supply Voltage 5VOrdering InformationFM24C04A-S 8-pin SOIC FM24C04A-G “Green” 8-pin SOICNC A1A2VSSVDD WP SCL SDAFigure 3. Data Transfer ProtocolStop ConditionA Stop condition is indicated when the bus master drives SDA from low to high while the SCL signal is high. All operations must end with a Stop condition. If an operation is pending when a stop is asserted, the operation will be aborted. The master must have control of SDA (not a memory read) in order to assert a Stop condition.Start ConditionA Start condition is indicated when the bus master drives SDA from high to low while the SCL signal is high. All read and write transactions begin with a Start condition. An operation in progress can be aborted by asserting a Start condition at any time. Aborting an operation using the Start condition will ready the FM24C04A for a new operation.If during operation the power supply drops below the specified V DD minimum, the system should issue a Start condition prior to performing another operation. Data/Address TransferAll data transfers (including addresses) take place while the SCL signal is high. Except under the two conditions described above, the SDA signal should not change state while SCL is high.AcknowledgeThe Acknowledge takes place after the 8th data bit has been transferred in any transaction. During this state the transmitter should release the SDA bus to allow the receiver to drive it. The receiver drives the SDA signal low to acknowledge receipt of the byte. If the receiver does not drive SDA low, the condition is a No-Acknowledge and the operation is aborted.The receiver could fail to acknowledge for two distinct reasons. First, if a byte transfer fails, the No-Acknowledge ends the current operation so that the device can be addressed again. This allows the last byte to be recovered in the event of a communication error. Second and most common, the receiver does not acknowledge the data to deliberately end an operation. For example, during a read operation, the FM24C04A will continue to place data onto the bus as long as the receiver sends acknowledges (and clocks). When a read operation is complete and no more data is needed, the receiver must not acknowledge the last byte. If the receiver acknowledges the last byte, this will cause the FM24C04A to attempt to drive the bus on the next clock while the master is sending a new command such as a Stop command.Slave AddressThe first byte that the FM24C04A expects after a start condition is the slave address. As shown in Figure 4, the slave address contains the device type, the device select, the page of memory to be accessed, and a bit that specifies if the transaction is a read or a write.Bits 7-4 are the device type and should be set to 1010b for the FM24C04A. The device type allows other types of functions to reside on the 2-wire bus within an identical address range. Bits 3-2 are the device address. If bit 3 matches the A2 pin and bit 2 matches the A1 pin, the device will be selected. Bit 1 is the page select. It specifies the 256-byte block of memory that is targeted for the current operation. Bit 0 is the read/write bit. A 0 indicates a write operation.Word AddressAfter the FM24C04A (as receiver) acknowledges the slave ID, the master will place the word address on the bus for a write operation. The word address is the lower 8-bits of the address to be combined with the 1-bit page select to specify exactly the byte to be written. The complete 9-bit address is latched internally.Figure 4. Slave AddressNo word address occurs for a read operation. Reads always use the lower 8-bits that are held internally in the address latch and the 9th address bit is part of the slave address. Reads always begin at the address following the previous access. A random read address can be loaded by doing a write operation as explained below.After transmission of each data byte, just prior to the acknowledge, the FM24C04A increments the internal address latch. This allows the next sequential byte to be accessed with no additional addressing. After the last address (1FFh) is reached, the address latch will roll over to 000h. There is no limit to the number of bytes that can be accessed with a single read or write operation.Data TransferAfter all address information has been transmitted, data transfer between the bus master and the FM24C04A can begin. For a read operation the FM24C04A will place 8 data bits on the bus then wait for an acknowledge. If the acknowledge occurs, the next sequential byte will be transferred. If the acknowledge is not sent, the read operation is concluded. For a write operation, the FM24C04A will accept 8 data bits from the master then send an acknowledge. All data transfer occurs MSB (most significant bit) first. Memory OperationThe FM24C04A is designed to operate in a manner very similar to other 2-wire interface memory products. The major differences result from the higher performance write capability of FRAM technology. These improvements result in some differences between the FM24C04A and a similar configuration EEPROM during writes. The complete operation for both writes and reads is explained below.Write OperationAll writes begin with a slave address then a word address. The bus master indicates a write operation by setting the LSB of the Slave address to a 0. After addressing, the bus master sends each byte of data to the memory and the memory generates an acknowledge condition. Any number of sequential bytes may be written. If the end of the address range is reached internally, the address counter will wrap from 1FFh to 000h.Unlike other nonvolatile memory technologies, there is no write delay with FRAM. The entire memory cycle occurs in less time than a single bus clock. Therefore any operation including read or write can begin immediately following a write. Acknowledge polling, a technique used with EEPROMs to determine if a write is complete is unnecessary and will always return a done condition.An actual memory array write occurs after the 8th data bit is transferred. It will be complete before the acknowledge is sent. Therefore if the user desires to abort a write without altering the memory contents, this should be done using a start or stop condition prior to the 8th data bit. The FM24C04A needs no page buffering.Pulling write protect high will disable writes to the entire array. The FM24C04A will not acknowledge data bytes that are applied to the device when write protect is asserted. In addition, the address counter will not increment if writes are attempted. Pulling WP low (V SS) will deactivate this feature.Figures 5 and 6 illustrate single-byte and multiple-byte writes.。

WI1824 WINNER VIDEO老虎机技术手册说明书

E n e s te M anua l s e de sc ri ben l a s p ri n c i pa l e s c a r a c te rís t i c a s téc n i c a s y de fun c i ona m i ento de l m ode l o W I NN E R(V i deo-V i deo). E l d i s eño y l a fab ri c a c ión de e s ta máqu i na han s i do r ea li z ado s po r N o v o m at i c G a m i ng S pa i n S.A., ga r ant i z ando e l c u m p li m i ento de l a s D ir e c t i v a s E u r opea s de S egu ri dad E léc t ri c a y de C o m pat i b ili dad E l e c t r o-M agnét i c a, a sí c o m o de l a s r eg l a m enta c i one s autonóm i c a s v i gente s.1. T RAN SP O R T E, R E C EP C IÓN E I N S T A L AC IÓN 51.1. T r an s po r te y R e c ep c ión. 51.2. In s ta l a c ión 61.3. F ij a c ión de l a Máqu i na 61.4. R equ i s i to s de l a r ed de a li m enta c ión 71.5. L i m p i e z a de l a máqu i na 71.6. R e s i duo s de apa r ato s e léc t ri c o s y e l e c t rón i c o s(R AEE)72. CARAC T E RÍS T I CA S TÉCN I CA S83. P U ES T A E N M ARCHA93.1. P ue s ta en m a r c ha 93.2. A cc e s o ár ea m anten i m i ento 94. P U L S AD O R ES104.1. C on s o l a de pu l s ado r e s104.2. P u l s ado r e s de s e r v i c i o 115. P ARÁM E T R O S D E J U E GO125.1. Ident i f i c a c ión de l o s m i c r o-i nte rr upto r e s125.2. O t r o s a j u s te s136. M E NÚP R I NC I P A L146.1. C O N T AB ILI D A D146.1.1. C ontado r e s P a r c i a l e s156.1.2. C ontado r e s T ota l e s156.1.3. C ontado r e s M e cán i c o s176.1.4. D ato s de C i c l o s176.1.5. B o rr a r C ontado r e s P a r c i a l e s176.2. C O N F I G UR A C IÓN186.3. C A R G A / D ES C A R G A196.4. T ES T D E L H A RD W A R E196.4.1. E s tado de l o s D i s po s i t i v o s206.4.2. Lám pa r a s216.4.3. S w i t c he s216.4.4. R od ill o s226.4.5. A c eptado r de B ill ete s226.4.6. B ill ete r o R e c i c l ado r226.4.7. M onede r o y D e sv i ado r236.4.8. H oppe r s236.4.9. C ontado r e s M e cán i c o s236.4.10. V e l o de r od ill o s246.5. ÚL T I M AS PA R TÍD AS256.6. EVE N T O S D E L S I S T E M A256.7. V O L U M E N266.8. I D E N T I F I C A C IÓN267. F U E RA D E SE R V I C I O277.1. R A M C L EA R277.2. T I P O S D E F U E R A D E SE R V I C I O287.3. LI S T A D O D E F U E R A D E SE R V I C I O298. M AN T E N I M I E N T O338.1. R O D ILL O A19 I NDU S T R I AS L O R E N Z O338.2. L E C T O R D E B ILL E T ES N V9+/N V11+358.3. SE L E C T O R M O DU L A R X6-D S2 388.4. H O PPE R R O D E U-II 399. C O N EX I O NAD O40C O N EX I O N AD O GE N E R A L (I)41C O N EX I O N AD O GE N E R A L (II)42C O N EX I O N AD O GE N E R A L (III)43C P U F U J I T S U44M O DU L O D E C O N T R O L (M C B+)45 M O DU L O D E P U E R T A(M D B+)46 S I G N I F I C A D O D E L O S L E D S47F U E N T E D E A LI M E N T A C I O N48IL U M I N A C I O N P L A N D E G A N A NC I AS49 IL U M I N A C IÓN VE L O R O D ILL O S52 IL U M I N A C IÓN BA ND E J A52C O N T R O L VE L O R OD ILL O S5310. D E C L ARAC IÓN D E C O N F O R M I DAD54N O T A S“L a i n f o r m ación p r ese n t a d a e n es t e m a nu al p e r t e n ece a tít u l o excl u siv o y p r iva t iv o a N O V O M A T I CG A M I N G SP A I N S.A. si n qu e s u pub licación s upong a, e n m odo al guno, qu e l o s ele m e n t o s pub lica do s o e n la f o r m a e n la c u al se p r ese n t a n, sea d el do m i n i o púb lic o. E n c on sec u e n cia, qu e d a t e r m i n a n t e m e n t e p r oh i b i d a s u r e p r odu cción, así c o m o la f a b r icación, c o m e r ciali z ación y/o d is t r i bu ción o c u al qu ie r o t r a ac t ivi d a d qu e r ecai g a s ob r e l o s ele m e n t o s pub lica do s, si n el ex p r es o c on se n t i m ie n t o d e N O V O M A T I C G A M I N G SP A I N S.A.”.1.1.E l t r an s po r te de l a m áqu i na debe r á r ea li z a r s e en po s i c i ón v e r t i c a l y de fo r m a s egu r a pa r a e v i ta r que r e c i ba po s i b l e s go l pe s o v ue l c o s .S e r e c o m i enda no ap il a r n i ngún paquete s ob r e e l e m ba l a j e y que, du r ante e l t r an sc u r s o de l t r an s po r te, l a m áqu i na no s e v ea s o m et i da a c ond i c i one s c li m át i c a s e x t r e m a s de c a l o r , f r ío o ll u v i a.A l r e c i b ir l a m áqu i na, e s r e c o m endab l e r ea li z a r una i n s pe cc i ón v i s ua l pa r a c o m p r oba r que s u t r an s po r te s e ha r ea li z ado c o rr e c ta m ente.A l de s e m ba l a r l a m áqu i na, s e r á ne c e s a ri o a c tua r c on s u m o c u i dado pa r a no c au s a r n i ngún daño a l o s c o m ponente s f r ág il e s que l a fo r m an. La c ubeta r e c oge -m oneda s c ont i ene un j uego de ll a v e s pa r a a cc ede r a l a pue r ta s upe ri o r . E n e l c a j ón de r e c auda c i ón s e en c uent r an l o s s i gu i ente s e l e m ento s :M anua l de i n s ta l a c i ón de l a m áqu i na en CD . K i t de f ij a c i ón pa r ed C ab l e de r edE t i queta s de m oneda s pa r a l o s pagado r e sE t i queta b ill ete s.M I E NDA L A L E C T URA D E ES T E L AN T ES D E P R O C E D E R A L A A L AC I ÓN D E L A M ÁQ U I NA1.2.S e r e c o m i enda s egu ir e s ta s pauta s a l a ho r a de l a i n s ta l a c i ón de l a m áqu i na pa r a e v i ta r pe li g r o s i nne c e s a ri o s :La m áqu i na debe r á i n s ta l a r s e s ob r e una s upe r f i c i e li s a y p l ana.E n n i ngún c a s o, s e i n s ta l a r á a l a i nte m pe ri e, en l uga r e s húm edo s o en a m b i ente s po l v o ri ento s .E l equ i po no e s ade c uado pa r a l a i n s ta l a c i ón en un l uga r donde pueda ut ili z a r s e un c ho rr o de agua.E l equ i po no e s ade c uado pa r a u s o s en e x te ri o r e s .La m áqu i na debe r á e s ta r a l e j ada de fuente s de c a l o r y de r ad i a c i ón i nf r a rr o j a. E n e l c a s o de que l o s apa r ato s e l éc t ri c o s o e l e c t r ón i c o s de s u s a lr ededo r e s p r odu j e r an i nte r fe r en c i a s , s e r á ne c e s a ri o a l e j a r l a m áqu i na l o s uf i c i ente pa r a que és ta s de j en de a c tua r s ob r e e ll a.La to m a de c o rri ente a l a que s e c one c te l a m áqu i na debe r á en c ont r a r s e en buen e s tado y d i s pone r de t i e rr a deb i do a que e l equ i po e s de C l a s e I. La s c a r a c te r ís t i c a s de l a to m a de c o rri ente s e de sc ri ben en e l apa r tado “R equ i s i to s de l a r ed de a li m enta c i ón ”.La i n s ta l a c i ón e l éc t ri c a de l l o c a l debe r á e s ta r p r o v i s ta de c one x i ón a t i e rr a y de l o s s i s te m a s de p r ote cc i ón no r m a li z ado s que s ean ne c e s a ri o s pa r a dete c ta r c ua l qu i e r fuga de c o rri ente o s ob r e -i nten s i dad. E n todo c a s o, l a i n s ta l a c i ón debe r á s e r c apa z de s u m i n i s t r a r l a s c ond i c i one s no m i na l e s m a r c ada s en l a P l a c a de Ident i dad de l a m áqu i na.La pa r te po s te ri o r de l a m áqu i na e s tá p r o v i s ta de do s fu s i b l e s , de una et i queta que m a r c a l a s c a r a c te r ís t i c a s de és to s y de un i nte rr upto r gene r a l . A nte s de m an i pu l a r e l equ i po, e l ope r a ri o debe r á de sc one c ta r e l i nte rr upto r o de s en c hufa r l a c l a v ij a de l a r ed e l éc t ri c a. S i debe r ee m p l a z a r s e un fu s i b l e, ut ili c e uno de l a s m i s m a s c a r a c te r ís t i c a s .1.3.C o m o m ed i da de p r e c au c i ón y c on e l f i n de e v i ta r v ue l c o s a cc i denta l e s ante c ua l qu i e r pe r c an c e o u s o i nade c uado, l a m áqu i na debe r á e s ta r f ij ada a l a pa r ed c on l o s an c l a j e s que s e s u m i n i s t r an en e l i nte ri o r de l c a j ón de r e c auda c i ón.D eta ll e an c l a j e de l m ueb lePE R M I T E O PE RAR C O N L A M ÁQ U I NA S I N O SE CU M P L E C O N L O S R E Q U I S I T O S D E F IJ AC I ÓN M E CÁN I CA .1.4.E l pe r s ona l téc n i c o debe rá p r e s ta r e s pe c i a l aten c ión a todo s l o s a v i s o s de p r e c au c ión que apa r e c en en e s te M anua l Téc n i c o, a sí c o m o a l a s et i queta s que s e m ue s t r an a c ont i nua c ión y que i n c o r po r a l a máqu i na c on e l ob j et i v o de c on s egu ir una m a y o r s egu ri dad tanto de és ta c o m o de l u s ua ri o.La r ed de l ed i f i c i o, de s t i nada a s u m i n i s t r a r ene r gía e léc t ri c a, debe rá s e r c onfo r m e c on l a s d i s po s i c i one s de l R.D. 824/2002, d e 2 d e a go s t o, r e l at i v o a l R e g la m e n t o E lec t r o téc n ic o p a r a la B aja T e n sión.La máqu i na e s de C L ASE I, l o que r equ i e r e que l a i n s ta l a c ión e x te r na e s té de a c ue r do c on l o s v a l o r e s i nd i c ado s en l a p l a c a de i dent i dad y, ade más, i n c o r po r e un d i sy unto r m agneto tér m i c o de 10 a m pe ri o s, en e l s upue s to c a s o de e x i s t ir una s ob r e i nten s i dad que s upe r e e l v a l o r ante ri o r, y un d i sy unto r d i fe r en c i a l de c o rri ente a j u s tado a 30m A.P a r a e v i ta r po s i b l e s c o r te s a cc i denta l e s de r ed de a li m enta c ión po r pa r te de l u s ua ri o o c ua l qu i e r agente e x te ri o r, e l c one c to r de r ed, i nte rr upto r y fu s i b l e s e s tán en l a pa r te po s te ri o r de l equ i po.A nte s de de sc one c ta r l a máqu i na de l a to m a de r ed s e debe c o m p r oba r que e l i nte rr upto r p ri n c i pa l e s té en po s i c ión de apagado.1.5.P a r a r ea li z a r l a li m p i e z a e x te ri o r de l a máqu i na, ut ili z a r un paño húm edo, que no gotee, debe rá e v i ta r s e l a ut ili z a c ión de s ub s tan c i a s c o rr o s i v a s y d i s o l v ente s. E l paño o ga m u z a que s e ut ili c e no debe rá s e r de l t i po ab r a s i v o, pa r a e v i ta r e l r a y ado de l o s e l e m ento s e x te r no s de l a máqu i na c o m o e m be ll e c edo r e s y m eta c ril ato s.R e v i s a r du r ante l a li m p i e z a de l a máqu i na, que l a s abe r tu r a s de v ent il a c ión de l a máqu i na no e s tén ob s t r u i da s o d i f i c u l ten l a s a li da de a ir e de l i nte ri o r de l a máqu i na.La li m p i e z a y m anten i m i ento de l a máqu i na no deben r ea li z a rl o s l o s n iño s s i n s upe r v i s ión.1.6.E s te p r odu c to e s tá dent r o de l a l c an c e de l R.D. 208/2005, d e 25 d e f e b r e r o.A l f i na li z a r e l pe ri odo de s u ut ili dad y tene r l a ne c e s i dad de de s p r ende r s e de l m i s m o l amáqu i na s e rá c on s i de r ada un r e s i duo. N o e s tá pe r m i t i do depo s i ta r e s te t i po de r e s i duo enl o s c ontenedo r e s c on v en c i ona l e s de s t i nado s a l o s r e s i duo s de natu r a l e z a u r bana, c u y ac o m peten c i a e s de l a c o rr e s pond i ente A d m i n i s t r a c ión Lo c a l.La ge s t ión de e s to s r e s i duo s r equ i e r e de un t r ato e s pe c i a li z ado; e s ne c e s a ri o c on s u l ta r l a w eb de SPV (www.no v o m at i c-s pa i n.c o m) donde s e l e s u m i n i s t r a rá l o s dato s y l a s c ond i c i one s pa r a r ea li z a r l a ent r ega de l m i s m o, s i endo a pa r t ir de e s te m o m ento l o s ga s to s de l a ge s t ión a c a r go de l S i s te m a Integ r a l de G e s t ión (S I G)i nd i c ado po r SPV.M e d i d as ex t e r i o r esM u e b le W I NN E RV A L O R ES E LÉC T R I C O SV= 230 VF= 50 H zF U S I B L E= 2 x(T 3,15A/250V) 5x20 mmE N T RADA D E CRÉD I T O SS e l e c to r de M oneda sT i po: CC T a l k-A li m enta c ión: 12 V d cM ode l o s: X6–D2S A zk o y enA li m enta c ión: 12V d cA c epta c ión: 0,10 / 0,20 / 0,50 / 1 y 2€Le c to r de B ill ete sT i po: CC T a l k-A li m enta c ión: 12 V d cM ode l o: N V9 / N V9+ Inno v at i v eA c epta c ión: 5€ / 10€ / 20€ / 50€ (*)D epende de l r eg l a m ento autonóm i c o.S I S T E M A D E P A GOLa máqu i na i n c o r po r a t r e s pagado r e s, de l o s c ua l e s H P1 y H P3 pueden c onf i gu r a r s e l a m oneda a paga r m ed i ante S W, pa r a obtene r l a c o m b i na c ión de pagado r e s de s eada, m ed i ante l o s S W A1 y A3 de l a c a r ta M C B.E l m ode l o de pagado r: A zk o y en R ode U-II CC T a l kT a m b ién s e i m p l e m enta un r e c i c l ado r de b ill ete s N V11 I T CC T a l k.3.1.L a pu es t a e n m a r c h a d e la máqu i n a d e b e se r r eali z a d a po r p e r s on al téc n ic o c u ali f ica do.A nte s, debe rá to m a r l a p r e c au c ión de r et ir a r de l o s c a j one s de r e c auda c ión todo e l m ate ri a l de i nfo r m a c ión, m anua l e s y ll a v e s que a c o m pañan a l a máqu i na en e l m o m ento de s u adqu i s i c ión.P a r a de j a r l a máqu i na li s ta pa r a e l j uego, e l téc n i c o debe rá r ea li z a r l a s ope r a c i one s que s e de sc ri ben en c ada uno de l o s punto s s i gu i ente s.A nte s de p r o c ede r a s u a rr anque, e l téc n i c o debe rá r ea li z a r una i n s pe cc ión v i s ua l de l i nte ri o rde l a máqu i na pa r a a s egu r a r que du r ante e l t r an s po r te no s e ha de s p r end i do a l gún e l e m entoque pud i e r a i nte r fe rir en e l fun c i ona m i ento de l a m i s m a.A s i m i s m o, un r epa s o a l o s c one c to r e s de l a s m angue r a s pa r a a s egu r a r un buen c onta c to puedefa c ili ta r e l p r o c e s o de a rr anque.R ea li z ada l a i n s pe cc ión v i s ua l s e puede p r o c ede r a c one c ta r l a máqu i na a l a to m a de r edd i s pue s ta a ta l efe c to, l a c ua l debe r eun ir l a s c ond i c i one s de s egu ri dad y l a poten c i a ne c e s a ri a,de sc ri to s en l o s apa r tado s 1 y 2 de e s te m anua l.A c tuando s ob r e e l i nte rr upto r de r ed, l a máqu i na i n i c i a rá e l p r o c e s o auto mát i c o de a rr anque, p r o c ed i endo en p ri m e r l uga r a a li nea r l o s r od ill o s de j uego. U na v e z a li neado s, s e il u m i na rán l a s ent r ada s de m oneda s y de b ill ete s, i nd i c ando que e s tá en e s tado de j uego.A nte s de de j a r l a máqu i na i n s ta l ada, e l téc n i c o debe ría p r o c ede r a:V e ri f i c a r e l fun c i ona m i ento de todo s l o s d i s po s i t i v o s, ut ili z ando e l T e s t que fa c ili ta e l m ode l o.C onf i gu r a r l a s op c i one s de j uego y de l o s pe ri féri c o s de m oneda s.R e ll ena r l o s pagado r e s c on l a s m oneda s s uf i c i ente s pa r a ga r ant i z a r l o s pago s de l o s p r e m i o s.U na v e z r ea li z ada s e s ta s ope r a c i one s, l a máqu i na e s ta rá li s ta pa r a e l s e r v i c i o.3.2.E l a cc e s o a l ár ea de m anten i m i ento s e r ea li z a m ed i ante una ll a v e que pe r m i te l a ape r tu r a de l a pue r ta f r onta l. U na v e z ab i e r ta s e tend rá a cc e s o a l o s e l e m ento s s u j eto s a m anten i m i ento y a l ár ea de r e c auda c ión de l a máqu i na.La de sc ri p c ión de l o s e l e m ento s s u j eto s a m anten i m i ento y e l a cc e s o a l o s e l e m ento s de r e c auda c ión s e deta ll a rán más ade l ante en és te m anua l.E n l a c on s o l a s i tuada en e l f r onta l de l a máqu i na s e d i s pone de un c on j unto de nue v e pu l s ado r e s, c u y a s fun c i one s s e de sc ri ben a c ont i nua c ión:C O BRARP e r m i te c ob r a r y pa s a r c ua l qu i e r p r e m i o obten i do a l v i s o r de l BA NC O, y l a f i na li z a c ión v o l unta ri a de l j uego de ri e s go.C O BRAR/BANC O/R ESE R V AP e r m i te c ob r a r en efe c t i v o e l c onten i do de l c ontado r BA NC O D E P R E M I O S en c ua l qu i e r m o m ento.P e r m i te c ob r a r en efe c t i v o e l c onten i do de l c ontado r R ESE R VA en c ua l qu i e r m o m ento.AU T O A V ANC ESP e r m i te a c t i v a r o de s a c t i v a r l a r ea li z a c ión de a v an c e s auto mát i c o s po r pa r te de l a máqu i na.A V ANC E/R E T E NC IÓN Y A V ANC E/A Y UDA/R E T E NC I O NE x i s ten t r e s pu l s ado r e s c on e s te te x to. C ada pu l s ado r c o rr e s ponde a uno de l o s t r e s r od ill o s fís i c o s de lj uego i nfe ri o r y pueden s e r ut ili z ado s po r e l j ugado r pa r a efe c tua r l o s A v an c e s y l a s R eten c i one s.E n s i tua c ión de r epo s o, pu l s ando [A va n ce C e n t r al] s e a cc ede d ir e c ta m ente a l a P anta ll a de A y uda,de sc ri ta en e l m anua l de p r odu c to s egún j uego.A cc i onando l a ll a v e de SE R V I C I O y m anten i endo pu l s ado e l [A va n ce C e n t r al] s e a cc ede d ir e c ta m ente a l o s C O N T A D O R ES G E N E R A L ES de l a máqu i na.A cc i onando l a ll a v e de SE R V I C I O y m anten i endo pu l s ado e l [A va n ce D e r ec ho] s e a cc ede d ir e c ta m ente a l o s C O N T A D O R ES D E C I C L O S de l a máqu i na.A P U ES T AP e r m i te s e l e cc i ona r l a apue s ta de l j uego pa r a pa r t i da s i m p l e o múl t i p l e.CA M B I O D E J U E GOP e r m i te pa s a r de l J uego Infe ri o r a l J uego S upe ri o r y v i c e v e r s a. E l a cc e s o a l j uego s upe ri o r s o l o e s tápe r m i t i do s egún s e e x p li c a en e l m anua l de p r odu c to de l j uego.J U G AR/ACU M U L ARP e r m i te i n i c i a r l a pa r t i da s i n e s pe r a r a l a rr anque auto mát i c o, ut ili z a r l o s j uego s de ri e s go de p r e m i o s, yt r a s pa s a r a c réd i to s l a s m oneda s de l c ontado r de R e s e r v a.E n l a c a r ta (M C B) e x i s ten t r e s pu l s ado r e s y t r e s d i odo s L E D de c o l o r v e r de que s e il u m i na rán a l a c tua rs ob r e c ada uno de l o s pu l s ado r e s de SE R V I C I O, y c u y a s fun c i one s s e de sc ri ben a c ont i nua c ión:I N I TE s te pu l s ado r t i ene c o m o fun c ión r e c upe r a r e l fun c i ona m i ento de l a máqu i na en e l c a s o de p r odu c ir s euna ano m a lía de fue r a de s e r v i c i o, no r e c upe r ab l e c on un apagado y en c end i do de l a máqu i na.M anten i endo p r e s i onado e s te pu l s ado r du r ante e l a rr anque de l a máqu i na, s e p r odu c e un “A rr anque enF río de l a máqu i na”. E s to i m p li c a l a pue s ta a c e r o de l o s C ontado r e s P a r c i a l e s y l o s de M onét i c a (R A MC L EA R v e r apa r tado 7. F U E R ADE SE R V I C I O).T ES TE s te pu l s ado r pe r m i te r ea li z a r un te s t e x hau s t i v o de todo s l o s c o m ponente s de l a máqu i na.E n e l apa r tado 6.4 de e s te m anua l s e de sc ri ben c on deta ll e l a s d i s t i nta s fa s e s de l te s t.D ES CA cc i onando e l pu l s ado r“D ES C”, s e ent r a d ir e c ta m ente en e l m enú de C A R G A/D ES C A R G A, quepe r m i te a l ope r a ri o c a r ga r o de sc a r ga r l a s m oneda s/b ill ete s que de s ee.E n e l apa r tado 6.3 de e s te m anua l s e de sc ri ben c on deta ll e l a s fun c i ona li dade s de e s ta fa s e de te s t.E n e l i nte ri o r de l a máqu i na s e d i s ponen l o s c ontado r e s e l e c t r o m e cán i c o s de ent r ada s y de s a li da dem oneda s, a sí c o m o e l m i c r o de pue r ta ab i e r taP u l s ado r e s I N I T, T ES T y D ES Csól o s on fun c i ona l e s c on l a pue r taab i e r ta.E l pu l s ado r(S W7) deno m i nado FT s i m u l a un fa ll o deten s ión en l a c a r ta M C B, y c o m o c on s e c uen c i ap r o v o c a una de sc one x ión de todo s l o s d i s po s i t i v o sc ont r o l ado s po r e s ta c a r ta.N O SE R E C O M I E NDA U S AR E L P U L S AD O R“FT”5.15.2La c a r ta (M CB +) d i s pone de do s g r upo s de m i c r o -i nte rr upto r e s (A y B ) que pe r m i ten c onf i gu r a r d i v e r s o s pa r ám et r o s que afe c tan p ri n c i pa l m ente a l j uego y a l a ge s t i ón de c r éd i to s y de b ill ete s . A c ont i nua c i ón s e m ue s t r an l a s op c i one s de c onf i gu r a c i ón:G R U P O A (S W 1)11O FF 0,10€2O FF D E T E CC I ÓN P O R BÁS CU L A 33O N 2€45630 O FF M ÁX I M O 25 B ILL E T ES78G R U P O B (S W 2)12345678O FFO FFO N5.3 o s aj u s t esV O L U M E N D E L S O N I D OE l a j u s te de l v o l u m en de l a m áqu i na s e r ea li z a ent r ando en e l te s t: M E NÚ P R I NC I PA L > V O L U M E N E n e s ta fa s e de l m enú pode m o s a j u s ta r e l v o l u m en de l j uego a l n i v e l de s eado (v e r apa r tado 6.7). C on l o s pu l s ado r e s de r eten c i ón i z qu i e r do y c ent r a l , s e puede i n c r e m enta r o d i s m i nu ir e l n i v e l . E l a j u s te e s po r c entua l en e sc a l a s de 10, c on v a l o r e s c o m p r end i do s ent r e 0% y 100%.M O N ÉT I CALa d i s t ri bu c i ón de l a s m oneda s en l o s pagado r e s , puede c onf i gu r a r s e c o m o he m o s v i s to ante ri o r m ente m ed i ante l o s m i c r o -i nte rr upto r e s A 1 y A 3 de l a c a r ta M C B .Lo s c a j one s de r e c auda c i ón t i enen una c onf i gu r a c i ón f ij a: E l CA J ÓN 1 s e de s t i na pa r a l a s m oneda s de 1€.E l CA J ÓN 2 s e de s t i na pa r a e l r e s to de m oneda s , 0,1€ - 0,2€ - 0,5€ y 2€.G RU P O “A ”G RU P O “B ”P a r a a cc ede r a l M E NU P R I NC I PA L ab rir e m o s l a pue r ta de l a máqu i na y p r e s i ona r e m o s e l pu l s ado r deT ES T s i tuado en l a c a r ta M C B.La na v ega c ión po r l o s d i fe r ente s m enús de ope r a c ión s e r ea li z a m ed i ante l o s pu l s ado r e s de l a c on s o l a deJ uego que s e m ue s t r an il u m i nado s de m ane r a i nte r m i tente. La botone r a ut ili z ada y s u m odo de u s o e se s tánda r en toda l a na v ega c ión po r l o s d i s t i nto s m enús de l T e s t. P a r a e ll o, s e ut ili z a rá:P u l s ado r A pue s ta [S elecci on a r]: P a r a ent r a r en una op c ión de l m enú o e j e c uta r una fa s e.P u l s ado r A v an c e D e r e c ho [S i gu ie n t e]: P a r a a v an z a r a l a op c ión s i gu i ente en e l m enú.P u l s ado r A v an c e C ent r a l[B aja r]: P a r a de s p l a z a r s e ha c i a aba j o en e l m enú.P u l s ado r A v an c e I z qu i e r do [S ub i r]: P a r a de s p l a z a r s e ha c i a a rri ba en e l m enú.P u l s ado r A uto A v an c e s[S ali r]: P a r a s a lir de una dete r m i nada op c ión de l m enú de te s t.La panta ll a m ue s t r a l a s d i fe r ente s op c i one s de l M E NU P R I NC I PA L d i s pon i b l e s:C O N T AB I L I DAD:P e r m i te l a v i s ua li z a c ión de l o s c ontado r e s e l e c t rón i c o s.C O N F I G URAC IÓN:A cc e s o a l a s d i fe r ente s op c i one s de c onf i gu r a c ión.CAR G A/D ES CAR G A:P e r m i te l a c a r ga y de sc a r ga de l o s hoppe r s y b ill ete r oT ES T D E L HARD W AR E:P e r m i te l a v e ri f i c a c ión de l o s d i s po s i t i v o s pe ri féri c o s.ÚLT I M A S P AR T I DA S:V i s ua li z a c ión de l a s úl t i m a s pa r t i da s r ea li z ada s.EVE N T O S D E L S I S T E M A:V i s ua li z a c ión de l o s e v ento s de l s i s te m a.V O L U M E N:P e r m i te e l a j u s te de l v o l u m en de l j uego.I D E N T I F I CAC IÓN:Le c tu r a de l o s i dent i f i c ado r e s de l j uego de de l s i s te m a.6.1.E n e l M E NU de C O N T AB ILI D A D pode m o s v i s ua li z a r l o s c ontado r e s e l e c t rón i c o s de l a máqu i na y ta m b ién no s pe r m i te e l bo rr ado de l o s c ontado r e s pa r c i a l e s.E n l a pa r te s upe ri o r de e s te m enú de c ontab ili dadpode m o s v e r dato s i dent i f i c at i v o s de l a máqu i na c o m o:M O D E L O UB I CAC IÓNVE R S IÓN NÚM E R O D E MÁQ U I NA6.1.1.C O N T AD O R ES P ARC I A L ESLa f i na li dad de l o s c ontado r e s pa r c i a l e s en j uego r ea l,e s d i s pone r de uno s c ontado r e s que pe r m i tan r eg i s t r a rpe ri odo s de r e c auda c ión. P o r e ll o l o s dato s s e d i v i denen t r e s g r upo s:DA T O S AC T UA L ESS on l o s dato s tota l e s a c u m u l ado s.DA T O S AN T E R I O R ESS on l o s dato s a c u m u l ado s ha s ta e l úl t i m o bo rr ado.ÚLT I M O S DA T O S P ARC I A L ESS on l o s dato s pa r c i a l e s de s de e l úl t i m o bo rr ado.AC T UA L ES=AN T E R I O R ES+P ARC I A L ES6.1.2.C O N T AD O R ES T O T A L ESR eg i s t r an e l fun c i ona m i ento de l a máqu i na en j uegor ea l, c ontab ili z ando l o s r eg i s t r o s h i s tóri c o s de s de s ui n i c i a li z a c ión en fáb ri c a.P ode m o s v i s ua li z a r:C O N T AD O R ES GE N E RA L ESC O N T AD O R ES DE B I LL E T ES Y M O N E DA SC O N T AD O R ES DE AC T I V I DAD D E L A MÁQ U I NAC O N T AD O R ES GE N E RA L ESP ode m o s v i s ua li z a r l o s c ontado r e s h i s tóri c o s de l a máqu i na po r ub i c a c ión, año, tota li z ado r e s y po r t i po de pa r t i da s r ea li z ada s, d i s t ri bu i do s en c uat r o panta ll a s de i nfo r m a c ión.C O N T AD O R ES DE B I LL E T ES Y M O N E DA SP ode m o s v i s ua li z a r l o s c ontado r e s h i s tóri c o s de l o s r eg i s t r o s de m onét i c a de l a máqu i na c o m o ent r ada s, s a li da s, r e c a r ga s y te s t.C O N T AD O R ES DE AC T I V I DAD D E L A MÁQ U I NAN o s pe r m i te v e r l a a c t i v i dad de l a máqu i na, i nfo r mándono s en i nte r v a l o s ho r a ri o s, de l t i e m po que pe r m ane c e en c end i da, y e l t i e m po que ha j ugado l a máqu i na.6.1.3.C O N T AD O R ES M E CÁN I C O SM ue s t r a e l v a l o r, en ba s e 0,01€, de l o s pu l s o s en v i ado s a l o s c ontado r e s e l e c t r o m e cán i c o s.R eg i s t r an l o s pu l s o s en v i ado s a l o s c ontado r e s e l e c t r o m e cán i c o s en j uego y ta m b ién en e l te s t de c ontado r e s.La máqu i na d i s pone de 2 c ontado r e s e l e c t r o m e cán i c o s en e l i nte ri o r:C O N T AD O R D ES CR I P C IÓN BA SEE N T RADA S:C réd i to s j ugado s(0,20€)S A L I DA S:C réd i to s pagado s(0,20€)6.1.4.DA T O S D E C I C L O SR eg i s t r a todo s l o s c i c l o s de 40.000 pa r t i da s r ea li z ada s po r l a máqu i na, c on i nd i c a c ión de pa r t i da s, apue s ta, ganan c i a s y po r c enta j e de de v o l u c ión.6.1.5.B O RRAR C O N T AD O R ES P ARC I A L ESP e r m i te ha c e r un bo rr ado de l o s c ontado r e s pa r c i a l e s pa r a c ont r o l de pe ri odo s de r e c auda c ión.。

HT24LC04中文资料

HT24LC044K 2-Wire CMOS Serial EEPROMBlock DiagramPin Assignment16th May ¢99Features·Operating voltage:2.4V~5.5V ·Low power consumption -Operation:5mA max.-Standby:5m A max.·Internal organization -4K (HT24LC04):512´8·2-wire serial interface·Write cycle time:5ms max.·Automatic erase-before-write operation·Partial page write allowed ·8-byte page write modes·Write operation with built-in timer ·Hardware controlled write protection ·40-year data retention·106erase/write cycles per word ·8-pin DIP/SOP/TSSOP package ·Commerical temperature range (0°C to +70°C)General DescriptionThe HT24LC04is a 4K-bit serial read/write non-volatile memory device using the CMOS floating gate process.Its 4096bits of memory are organized into 512words and each word is 8bits.The device is optimized for use in many in-dustrial and commercial applications wherelow power and low voltage operation are essen-tial.Up to four HT24LC04devices may be con-nected to the same two-wire bus.The HT24LC04is guaranteed for 1M erase/write cy-cles and 40-year data retention.Pin DescriptionAbsolute Maximum RatingsOperating Temperature (Commercial) ................................................................................. 0°C to 70°C Storage Temperature ....................................................................................................... –50°C to 125°C Applied V CC Voltage with Respect to VSS ........................................................................ –0.3V to 6.0V Applied Voltage on any Pin with Respect to VSS ..................................................................–0.3V to V CC+0.3VNote: These are stress ratings only. Stresses exceeding the range specified under “Absolute Maxi-mum Ratings” may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.D.C. Characteristics Ta=0°C to 70°CNote: These parameters are periodically sampled but not 100% tested26th May ’99A.C. Characteristics Ta=0°C to 70°C* The standard mode means V CC=2.4V to 5.5VFor relative timing, refer to timing diagrams36th May ’99Functional Description•Serial clock (SCL)The SCL input is used for positive edge clock data into each EEPROM device and negative edge clock data out of each device.•Serial data (SDA)The SDA pin is bidirectional for serial data transfer. The pin is open-drain driven and may be wired-OR with any number of other open-drain or open collector devices.•A0, A1, A2The HT24LC04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K devices may be addressed on a single bus system. The A0 pin is not connected. (The device addressing is discussed in detail under the Device Addressing section).•Write protect (WP)The HT24LC04 has a write protect pin that provides hardware data protection. The write protect pin allows normal read/write opera-tions when connected to the V SS. When the write protect pin is connected to Vcc, the write protection feature is enabled and operates asMemory organization•HT24LC04, 4K Serial EEPROMInternally organized with 512 8-bit words, random word addressing requires a 9-bit data word address.Device operations•Clock and data transitionData transfer may be initiated only when the bus is not busy. During data transfer, the data line must remain stable whenever the clockline is high. Changes in data line while the clock line is high will be interpreted as a START or STOP condition.•Start conditionA high-to-low transition of SDA with SCL highis a start condition which must precede any other command (refer to Start and Stop Defi-nition Timing diagram).•Stop conditionA low-to-high transition of SDA with SCL highis a stop condition. After a read sequence, the stop command will place the EEPROM in a standby power mode (refer to Start and Stop Definition Timing Diagram).•AcknowledgeAll addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero to acknow-ledge that it has received each word. This happens during the ninth clock cycle.Device addressingThe 4K EEPROM devices require an 8-bit de-vice address word following a start condition to enable the chip for a read or write operation.The device address word consist of a mandatory one, zero sequence for the first four most signifi-cant bits (refer to diagram showing the Device Address). This is common to all the EEPROM device.The next three bits are the A2, A1 and A0 device address bits for the 1K/2K EEPROM. These three bits must compare to their correspondinghard-wired input pins.46th May ’99The 4K EEPROM only use the A2 and A1 device address bits with the third bit as a memory page address bit. The two device address bits must compare to their corresponding hardwired input pins. The A0 pin is not connected.The 8th bit of device address is the read/write operation select bit. A read operation is initi-ated if this bit is high and a write operation is initiated if this bit is low.If the comparison of the device address succeed the EEPROM will output a zero at ACK bit. If not, the chip will return to a standby state.Write operations•Byte writeA write operation requires an 8-bit data word address following the device address word and acknowledgment. Upon receipt of this ad-dress, the EEPROM will again respond with a zero and then clock in the first 8-bit data word. After receiving the 8-bit data word, the EEPROM will output a zero and the address-ing device, such as a microcontroller, must terminate the write sequence with a stop con-dition. At this time the EEPROM enters an internally-timed write cycle to the non-vola-tile memory . All inputs are disabled during this write cycle and EEPROM will not re-spond until the write is completed (refer to Byte write timing).•Page writeThe 4K device is capable of 16-byte page writes.A page write is initiated the same as byte write, but the microcontroller does not send a stop condition after the first data word is clocked in. Instead, after the EEPROM ac-knowledges the receipt of the first data word,the microcontroller can transmit up to fifteen more data words. The EEPROM will respond with a zero after each data word received. The microcontroller must terminate the page write sequence with a stop condition.The data word address lower four bits are internally incremented following the receipt of each data word. The higher data word ad-dress bits are not incremented, retaining the memory page row location (refer to Page write timing).•Acknowledge pollingSince the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). Once the stop condition for a write command has been issued from the master, the device initiates the internally timed write cycle. ACK polling can be initiated immediately . This involves the master sending a start condition followed by the control byte for a write command (R/W=0). If the device is still busy with the write cycle, then no ACK will be returned. If the cycle is completed, then the device will return the ACK and the master can then pro-ceed with the next read or write command.•Write protectThe HT24LC04 can be used as a serial ROM when the WP pin is connected to VCC. Pro-gramming will be inhibited and the entire memory will be write-protected.•Read operationsRead operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to one. There are three read opera-tions: current address read, random address read and sequential read.•Current address readThe internal data word address counter main-tains the last address accessed during the last read or write operation, incremented by one.This address stays valid between operations as long as the chip power is maintained. The address roll over during read from the last byte of the last memory page to the first byte of the first page. The address roll over during write from the last byte of the current page to the first byte of the same page. Once the de-vice address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out. The microcontroller does not respond with an input zero but generates a following stop condition (refer to Current read timing).•Random readA random read requires a dummy byte write sequence to load in the data word address which is then clocked in and acknowledged by the EEPROM. The microcontroller must then generate another start condition. The micro-controller now initiates a current address read by sending a device address with the read/write select bit high. The EEPROM ac-knowledges the device address and serially clocks out the data word. The microcontroller does not respond with a zero but does gener-ates a following stop condition (refer to Ran-dom read timing).Acknowledge polling flowHT24LC0466th May ’99Timing DiagramsNote: The write cycle time t WR is the time from a valid stop condition of a write sequence to the end of the valid start condition of sequential command.•Sequential readSequential reads are initiated by either a cur-rent address read or a random address read.After the microcontroller receives a data word,it responds with an acknowledgment. As long as the EEPROM receives an acknowledgment, it will continue to increment the data word ad-dress and serially clock out sequential datawords. When the memory address limit is reached, the data word address will roll over and the sequential read continues. The se-quential read operation is terminated when the microcontroller does not respond with a zero but generates a following stop condition(refer to Sequential read timing).Holtek Semiconductor Inc. (Headquarters)No.3 Creation Rd. II, Science-based Industrial Park, Hsinchu, Taiwan, R.O.C.Tel: 886-3-563-1999Fax: 886-3-563-1189Holtek Semiconductor Inc. (Taipei Office)5F, No.576, Sec.7 Chung Hsiao E. Rd., Taipei, Taiwan, R.O.C.Tel: 886-2-2782-9635Fax: 886-2-2782-9636Fax: 886-2-2782-7128 (International sales hotline)Holtek Microelectronics Enterprises Ltd.RM.711, Tower 2, Cheung Sha Wan Plaza, 833 Cheung Sha Wan Rd., Kowloon, Hong KongTel: 852-2-745-8288Fax: 852-2-742-865786th May ’99。

RC4 中文操作手册

手册引导内容提要1介绍1.1手册结构1.2补充文件1.3操作手册使用人群1.4手册中使用的信号和警示1.5使用的方式和缩写1.6版本附件2设备描述2.1目的2.2潜在的危险3总述3.1电源3.2外加24VDC3.3使用的电缆型号3.4安全须知3.4.1Congrav RC-4使用安全须知3.4.2安装安全须知3.4.3接线安全须知3.4.4使用和操作安全须知4硬件描述4.1Congrav RC-4：类型4.2Congrav RC-4A：显示和按键4.2.1集成按键及其功能4.2.2显示和功能组成4.3参数更改4.3.1数字输入4.3.2固定参数设置的选择4.3.3如果….，更改参数不被接受4.4Congrav RC-4B：4.5Congrav RC-4的插卡槽4.5.1现场的可能连线4.6Congrav RC-4的基本功能4.6.1插入卡RC4-MSIO4.6.1.1XS1.1：与主计算机的连接4.6.1.2XS1.2：与ISC现场总线的连接4.6.1.3XS1.3：与调试解调器和工控电脑的连接4.7Congrav RC-4的选项卡4.7.1CDIO插入卡4.7.2DIOP插入卡4.7.2.1输入输出模式－数字式RC-4的终端功能4.7.3ANOP插入卡4.7.3.1输入输出模式－模拟式RC-4的终端功能4.7.4Profibus模式5调试5.1安装5.2调试，Congrav RC-4的开机5.3Congrav RC-4：软件升级5.4ISC-CM：软件升级6菜单页F100安装结构6.1F110：安装模式6.2模拟结构6.3F120：主计算机操作6.4F130：显示内容改变6.5连锁停机6.6时间和日期6.7F150：配方处理6.7.1设定值斜线，设定值阈值6.7.2调试操作7F200：打印机结构，内存值重设7.1打印功能7.2F210：如何清除记忆内容8F300：设定值输入和选择8.1安装设定值8.2加料器设定值8.2.1`设定值的模拟控制8.2.2设定值斜线，设定值阈值（菜单页F150）8.3选项8.4F310：滞后时间8.5报警停机9F400：安装的实际值，总产量重设9.1F430：总产量重设10单台加料器操作10.1加料器页的抬头10.2Kxx0：加料器控制10.3操作功能10.3.1开机5410.3.2停机5410.3.3报警重设10.3.4补料5510.3.5删除5510.3.6开始试样10.3.7开始去皮10.3.8右侧行实际值的显示10.4Kxx1：产品参数10.4.1自动去皮10.4.2检查最大输出10.4.3堆积密度10.4.4体积最大输出10.4.5十进制转换10.4.5.1十进制转换的设置10.4.6模式5910.4.6.1失重式加料（GF）10.4.6.2体积式控制（VR）10.4.6.3体积式设置（VS）10.4.6.4排料（DI）10.4.6.5检查最大输出（CM）10.4.6.6重量式排料（GD）10.4.6.7体积式加料（VF）10.4.6.8测量（M）10.4.6.9运行过程中GF和VF模式转换10.5Kxx2：控制参数10.5.1PID控制的设置10.5.1.1控制成套配合10.5.1.2重量式计算最大输出10.5.1.2.1CM值的存储11F500：报警报告和开机条件11.1报警报告11.2缺省的开机条件11.3系列驱动控制操作的错误代码11.3.1系列变频器11.3.2振动放大器控制器ISC-VC 11.4Kxx5：报警结构12硬件结构12.1 Kxx8：ISC-CM(-A)的硬件结构12.1.1 速度输入12.1.2 传感器（重量读取）的结构12.1.3 驱动控制器12.1.4 ISC-CM-A模拟输入输出的结构12.1.4.1 ISC-CM-A上单台控制的选项12.1.4.2 Kxx8：模拟输入12.1.4.3 Kxx8：模拟输出12.2 ANOP模拟输入输出的结构12.2.1 安装控制和安装的实际值12.2.1.1 菜单页F190的参数12.2.2 ANOP的组分功能12.2.2.1 模拟输入：模拟单台控制12.2.2.2 模拟输出：总操纵量或实际值12.2.2.2.1 模拟输出信号范围的定义12.3 CDIO的数字输入输出12.4 DIOP的数字输入输出12.4.1 DIOP：功能描述12.5 ISC现场总线机构12.5.1 如果构建总线通讯12.5.2 总线通讯的关闭12.6 调试解调器的机构12.7 主计算机操作机构12.7.1 MISO卡上的主计算机接口12.7.2 Profibus DP操作结构12.7.3 以太网接口的结构13校正程序13.1加料器参数13.2加料器参数功能解释13.2.1CP02－加料范围13.2.2CP04－欠载13.2.3CP03－最大输出量13.2.4CP05－过载13.2.5CP06－粗去皮13.2.6CP07－平均重量取数13.2.7CP08－总产量累计分值13.2.8CP09－最小速度13.2.9CP010－最大速度13.2.10CP11－控制偏差13.2.11CP12－报警停机滞后时间13.2.12CP13－联锁类型13.2.13CP14－实际值指示13.2.14CP15－杠杆臂值13.2.15CP16－料斗内容13.2.16CP17－最小补料料位13.2.17CP18－最大补料料位13.2.18CP19－Window/K1/滤波IDL/F, AED 13.2.19CP20－数字速度13.2.19.1标准速度监控13.2.19.2FlexWall-Plus加料器的运动监控13.2.19.3数字式速度取数13.2.19.4推荐输入13.2.20CP21－最大补料时间13.2.21CP22－补料优化13.2.22CP23－稳定时间13.2.23CP24－测样时间13.2.24CP25－防振（A V）切断时间13.2.25CP26－PID控制器接近时间13.2.26CP27－控制器自动化13.2.26.1控制器自动化13.2.26.2开机自动化13.2.26.2.1重复的开机自动化13.2.26.2.2总体开机自动化13.2.27CP28－滤波限制13.2.28CP29－实际值的接纳13.2.29CP30－总操纵量的接纳13.2.30CP31－体积控制（VR）实际值的接纳13.2.31CP32－开机滞后时间13.2.32CP33－称重桥（LWB）的长度13.2.33CP34－重量测试值（WTV）13.2.34CP35－摄取（AP）13.2.35CP36－自动去皮范围13.2.36CP37－无负载时间自动去皮13.2.37CP38－有比例的皮带速度13.2.38CP39－皮带长度13.2.39CP40－dead time way13.3附加参数13.3.1AP01－05 校正13.3.2AP11－可用的称重范围13.3.3AP12－drop out13.3.4AP13－速度模式13.3.5AP14－滑动影响13.3.6AP15－滑动值13.3.7AP16－速度接纳性13.3.8AP17－无负载时间13.3.9AP18－AT时间13.3.10AP19－驱动控制2最小13.3.11AP20－驱动控制2最大14硬件测试功能14.1F140：输入输出测试－外围（安装）14.2Kxx3：输入输出状态显示－外围14.3Kxx4：测试功能和模拟14.3.1模拟模式14.3.2输入输出测试（加料器）15名词解释附件11915.1技术数据15.2电磁兼容性15.3零配件清单15.4可能显示的模式清单15.5菜单页清单插图表图4-1：Congrav RC-4后部视图图4-2：Congrav RC-4后部视图（带ProfiBus模式）1 总介绍1.1手册的结构现有的操作手册包括：RC－4的：●技术操作和●RC－4 HGC软件（其版本请参见封页）按照下列顺序，每章独立描述一个完整的主题：●设备的描述●使用特性●硬件执行●硬件功能定义●操作●软件描述●参数描述和●结构例举1.2附加文件●ISC系统的描述●ISC-CM,ISC-FC和ISC-VC的技术手册●相应主计算机程序手册1.3操作手册所适用的人群操作手册适用于以下两组人群：●经过授权和培训过的专业技术人员来进行安装和其它电气工作。

24C1024中文资料

1Features•Low-voltage Operation –2.7 (V CC = 2.7V to 5.5V)•Internally Organized 131,072 x 8•2-wire Serial Interface•Schmitt Triggers, Filtered Inputs for Noise Suppression •Bi-directional Data Transfer Protocol•400 kHz (2.7V) and 1 MHz (5V) Clock Rate•Write Protect Pin for Hardware and Software Data Protection •256-byte Page Write Mode (Partial Page Writes Allowed)•Random and Sequential Read Modes •Self-timed Write Cycle (5 ms Typical)•High Reliability–Endurance: 100,000 Write Cycles/Page –Data Retention: 40 Years•8-lead PDIP , 8-lead EIAJ SOIC, 8-lead LAP and 8-ball dBGA TM PackagesDescriptionThe AT24C1024 provides 1,048,576 bits of serial electrically erasable and program-mable read only memory (EEPROM) organized as 131,072 words of 8 bits each. The device’s cascadable feature allows up to 2 devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The devices are available in space-saving 8-lead PDIP, 8-lead EIAJ SOIC, 8-lead Leadless Array (LAP) and 8-ball dBGA packages. In addition, the entire family is available in 2.7V (2.7V to 5.5V) versions.Pin ConfigurationsPin Name Function A1Address Input SDA Serial Data SCL Serial Clock Input WPWrite Protect NCNo Connect8-lead PDIP8-lead Leadless ArrayBottom View8-lead SOIC8-ball dBGABottom View2AT24C10241471H–SEEPR–03/03Block DiagramAbsolute Maximum Ratings*Operating Temperature..................................-55°C to +125°C *NOTICE:Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam-age to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.Storage Temperature.....................................-65°C to +150°C Voltage on Any Pinwith Respect to Ground.....................................-1.0V to +7.0V Maximum Operating Voltage ..........................................6.25V DC Output Current........................................................5.0 mA3AT24C10241471H–SEEPR–03/03Pin DescriptionSERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device.SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open-collector devices.DEVICE/PAGE ADDRESSES (A1): The A1 pin is a device address input that can be hard-wired or left not connected for hardware compatibility with AT24C128/256/512. When the A1pin is hardwired, as many as two 1024K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section). When the pin is not hardwired, the default A1 is zero.WRITE PROTECT (WP): The hardware Write Protect pin is useful for protecting the entire contents of the memory from inadvertent write operations. The write-protect input, when tied to GND, allows normal write operations. When WP is tied high to V CC , all write operations to the memory are inhibited. If left unconnected, WP is internally pulled down to GND. Switching WP to V CC prior to a write operation creates a software write-protect function.Memory OrganizationAT24C1024, 1024K SERIAL EEPROM: The 1024K is internally organized as 512 pages of 256 bytes each. Random word addressing requires a 17-bit data word address.4AT24C10241471H–SEEPR–03/03Pin Capacitance (1)Note:1.This parameter is characterized and is not 100% tested.DC CharacteristicsNote:1.V IL min and V IH max are reference only and are not tested.Applicable over recommended operating range from T A = 25°C, f = 1.0 MHz, V CC = +2.7V.Symbol Test ConditionMax Units Conditions C I/O Input/Output Capacitance (SDA)8pF V I/O = 0V C IN Input Capacitance (A 1, SCL)6pFV IN = 0VApplicable over recommended operating range from: T AI = -40°C to +85°C, V CC = +2.7V to +5.5V, T AC = 0°C to +70°C,V CC = +2.7V to +5.5V (unless otherwise noted).Symbol Parameter Test ConditionMin TypMax Units V CC Supply Voltage 2.75.5V I CC Supply Current V CC = 5.0V READ at 400 kHz 2.0mA I CC Supply Current V CC = 5.0V WRITE at 400 kHz 5.0mA I SB Standby Current V CC = 2.7V V IN = V CC or V SS3.0µA V CC = 5.5V 6.0µA I LI Input Leakage Current V IN = V CC or V SS 0.10 3.0µA I LO Output Leakage CurrentV OUT = V CC or V SS0.053.0µA V IL Input Low Level (1)-0.6V CC x 0.3V V IH Input High Level (1)V CC x 0.7V CC + 0.5V V OL Output Low LevelV CC = 3.0VI OL = 2.1 mA0.4V5AT24C10241471H–SEEPR–03/03AC Characteristics2.AC measurement conditions:R L (connects to V CC ): 1.3 k Ω (2.7V , 5V)Input pulse voltages: 0.3 V CC to 0.7 V CC Input rise and fall times: ≤50 nsInput and output timing reference voltages: 0.5 V CCApplicable over recommended operating range from T A = -40°C to +85°C, V CC = +2.7V to +5.5V, C L = 100 pF (unless otherwise noted). Test conditions are listed in Note 2.Symbol ParameterTest Conditions MinMax Units f SCL Clock Frequency, SCL 4.5V ≤ V CC ≤ 5.5V 2.7V ≤ V CC ≤ 5.5V 1000400kHz t LOW Clock Pulse Width Low 4.5V ≤ V CC ≤ 5.5V 2.7V ≤ V CC ≤ 5.5V 0.41.3µs t HIGH Clock Pulse Width High 4.5V ≤ V CC ≤ 5.5V 2.7V ≤ V CC ≤ 5.5V 0.40.6µs t AA Clock Low to Data Out Valid4.5V ≤ V CC ≤5.5V 2.7V ≤ V CC ≤ 5.5V 0.050.050.550.9µs t BUF Time the bus must be free before a new transmission can start (1) 4.5V ≤ V CC ≤ 5.5V 2.7V ≤ V CC ≤ 5.5V 0.51.3µs t HD.STA Start Hold Time 4.5V ≤ V CC ≤ 5.5V 2.7V ≤ V CC ≤ 5.5V 0.250.6µs t SU.STA Start Setup Time 4.5V ≤ V CC ≤ 5.5V 2.7V ≤ V CC ≤ 5.5V0.250.6µs t HD.DAT Data In Hold Time 0µs t SU.DA T Data In Setup Time 100ns t R Inputs Rise Time (1)0.3µs t F Inputs Fall Time (1) 4.5V ≤ V CC ≤ 5.5V 2.7V ≤ V CC ≤ 5.5V 100300ns t SU.STO Stop Setup Time 4.5V ≤ V CC ≤ 5.5V 2.7V ≤ V CC ≤ 5.5V0.250.6µs t DH Data Out Hold Time 50ns t WRWrite Cycle Time10ms Endurance (1) 5.0V , 25°C, Page Mode100KWrite Cycles6AT24C10241471H–SEEPR–03/03Device OperationCLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods (refer to Data Validity timing diagram). Data changes during SCL high periods will indicate a start or stop condition as defined below.START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which must precede any other command (refer to Start and Stop Definition timing diagram).STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the Stop command will place the EEPROM in a standby power mode (refer to Start and Stop Definition timing diagram).ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to acknowl-edge that it has received each word.STANDBY MODE: The AT24C1024 features a low-power standby mode which is enabled: a)upon power-up and b)after the receipt of the STOP bit and the completion of any internal operations.MEMORY RESET: After an interruption in protocol, power loss or system reset, any 2-wire part can be reset by following these steps:1.Clock up to 9 cycles,2.Look for SDA high in each cycle while SCL is high.3.Create a start condition.7AT24C10241471H–SEEPR–03/03Bus Timing (SCL: Serial Clock, SDA: Serial Data I/O)Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O)Note:1.The write cycle time t WRis the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.8AT24C10241471H–SEEPR–03/03Data ValidityStart and Stop DefinitionOutput Acknowledge9AT24C10241471H–SEEPR–03/03DeviceAddressingThe 1024K EEPROM requires an 8-bit device address word following a start condition to enable the chip for a read or write operation (refer to Figure 1). The device address word con-sists of a mandatory one, zero sequence for the first five most significant bits as shown. This is common to all 2-wire EEPROM devices.The 1024K uses the one device address bit, A1, to allow up to two devices on the same bus.The A1 bit must compare to the corresponding hardwired input pin. The A1 pin uses an inter-nal proprietary circuit that biases it to a logic low condition if the pin is allowed to float.The seventh bit (P 0) of the device address is a memory page address bit. This memory page address bit is the most significant bit of the data word address that follows. The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if this bit is high and a write operation is initiated if this bit is low.Upon a compare of the device address, the EEPROM will output a zero. If a compare is not made, the device will return to a standby state.DATA SECURITY: The AT24C1024 has a hardware data protection scheme that allows the user to write-protect the entire memory when the WP pin is at V CC .WriteOperationsBYTE WRITE: To select a data word in the 1024K memory requires a 17-bit word address.The word address field consists of the P 0 bit of the device address, then the most significant word address followed by the least significant word address (refer to Figure 2)A write operation requires the P 0 bit and two 8-bit data word addresses following the device address word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero. The addressing device, such as a microcontroller,then must terminate the write sequence with a stop condition. At this time the EEPROM enters an internally timed write cycle, T WR , to the nonvolatile memory. All inputs are disabled during this write cycle and the EEPROM will not respond until the write is complete (refer to Figure 2).PAGE WRITE: The 1024K EEPROM is capable of 256-byte page writes.A page write is initiated the same way as a byte write, but the microcontroller does not send a stop condition after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller can transmit up to 255 more data words. The EEPROM will respond with a zero after each data word received. The microcontroller must ter-minate the page write sequence with a stop condition (refer to Figure 3).The data word address lower 8 bits are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. When the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. If more than 256 data words are transmitted to the EEPROM, the data word address will “roll over” and previous data will be overwritten. The address “rollover” during write is from the last byte of the current page to the first byte of the same page.ACKNOWLEDGE POLLING: Once the internally timed write cycle has started and the EEPROM inputs are disabled, acknowledge polling can be initiated. This involves sending a start condition followed by the device address word. The read/write bit is representative of the operation desired. Only if the internal write cycle has completed will the EEPROM respond with a zero, allowing the read or write sequence to continue.10AT24C10241471H–SEEPR–03/03ReadOperationsRead operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to one. There are three read operations:current address read, random address read and sequential read.CURRENT ADDRESS READ: The internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. This address stays valid between operations as long as the chip power is maintained. The address “rollover”during read is from the last byte of the last memory page, to the first byte of the first page.Once the device address with the read/write select bit set to one is clocked in and acknowl-edged by the EEPROM, the current address data word is serially clocked out. The microcontroller does not respond with an input zero but does generate a following stop condi-tion (refer to Figure 4).RANDOM READ: A random read requires a “dummy” byte write sequence to load in the data word address. Once the device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must generate another start condition.The microcontroller now initiates a current address read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word. The microcontroller does not respond with a zero but does generate a fol-lowing stop condition (refer to Figure 5).SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a ran-dom address read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will “roll over” and the sequential read will con-tinue. The sequential read operation is terminated when the microcontroller does not respond with a zero, but does generate a following stop condition (refer to Figure 6).11AT24C10241471H–SEEPR–03/03Figure 1. Device AddressFigure 2. Byte WriteFigure 3. Page WriteFigure 4.Current Address Read12AT24C10241471H–SEEPR–03/03Figure 5. Random ReadFigure 6.Sequential Read13AT24C10241471H–SEEPR–03/03Note:For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC Characteristics tables.Ordering InformationOrdering CodePackage Operation RangeA T24C1024-10CI-2.7A T24C1024C1-10CI-2.7A T24C1024-10PI-2.7A T24C1024W-10SI-2.7A T24C1024-10UI-2.78CN38CN18P38S28U8Industrial (-40°C to 85°C)Package Type8CN38-lead, 0.230" Wide, Leadless Array Package (LAP)8CN18-lead, 0.300" Wide, Leadless Array Package (LAP)8P38-lead, 0.300" Wide, Plastic Dual In-line Package (PDIP)8S28-lead, 0.200" Wide, Plastic Gull Wing Small Outline Package (EIAJ SOIC)8U88-ball, die Ball Grid Array Package (dBGA)Options-2.7Low Voltage (2.7V to 5.5V)14AT24C10241471H–SEEPR–03/03Packaging Information8CN3 – LAP15AT24C10241471H–SEEPR–03/038CN1 – LAP16AT24C10241471H–SEEPR–03/038P3 – PDIP17AT24C10241471H–SEEPR–03/038S2 – EIAJ SOIC18AT24C10241471H–SEEPR–03/038U8 – dBGA1471H–SEEPR–03/03xMDisclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems.Atmel CorporationAtmel Operations2325 Orchard Parkway San Jose, CA 95131Tel: 1(408) 441-0311Fax: 1(408) 487-2600Regional HeadquartersEuropeAtmel SarlRoute des Arsenaux 41Case Postale 80CH-1705 Fribourg SwitzerlandTel: (41) 26-426-5555Fax: (41) 26-426-5500AsiaRoom 1219Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong KongTel: (852) 2721-9778Fax: (852) 2722-1369Japan9F, Tonetsu Shinkawa Bldg.1-24-8 ShinkawaChuo-ku, Tokyo 104-0033JapanTel: (81) 3-3523-3551Fax: (81) 3-3523-7581Memory2325 Orchard Parkway San Jose, CA 95131Tel: 1(408) 441-0311Fax: 1(408) 436-4314Microcontrollers2325 Orchard Parkway San Jose, CA 95131Tel: 1(408) 441-0311Fax: 1(408) 436-4314La Chantrerie BP 7060244306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18Fax: (33) 2-40-18-19-60ASIC/ASSP/Smart CardsZone Industrielle13106 Rousset Cedex, France Tel: (33) 4-42-53-60-00Fax: (33) 4-42-53-60-011150 East Cheyenne Mtn. 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1812F104xxx中文资料

元器件交易网Multilayer Ceramic Chip Capacitors Products – NPO, X7R, Y5VHOW TO ORDER 0603 N 101 J 500 N T Packaging Code T = 7” reel/paper tape Termination N = Ag/Ni/SnPb B = Cu/Ni/SnPb B = Bulk L = Ag/Ni/Sn C = Cu/Ni/Sn 251 = 250V 501 = 500V 102 = 1000VVoltage (VDCW) 100 = 10V 500 = 50V 160 = 16V 101 = 100V 250 = 25V 201 = 200VAPPLICATIONS ∗ ∗ ∗ ∗ ∗ LC and RC tuned circuit Filtering, Timing, & Blocking Coupling & Bypassing Frequency discriminating DecouplingCapacitance Tolerance (EIA Code) B = ±0.1pF F = ±1% K = ±10% C = ±0.25pF G = ±2% M = ±20% Z = -20+80% D = ±0.50pF J = ±5% Capacitance Two significant digits followed by # of zeros (e.g. 101 = 100pF, 102 = 1000pF, 103 = 10nF) Dielectric N = COG (NPO) Size Code 0402 0805 0603 1206 B = X7R 1210 1804 F = Y5VSCHEMATICL WT1812EENPO ∗ ∗ ∗ ∗ ∗ Ultra-stable Low dissipation factor Tight tolerance available Good frequency performance No aging of capacitance ∗ ∗ ∗ ∗X7R Semi-stable High K High volumetric efficiency Highly reliable in high temp. applications High insulation resistanceY5V ∗ High volumetric efficiency ∗ Non-polar construction ∗ General purpose, High KDIMENSIONS Size Length (L) Width (W) Termination (E) 0402 .040±0.0002 1.00±0.05 0.020±0.002 0.50±0.05 .010+.002/-.004 0.25+0.05/-0.10 0603 0.063±0.004 1.60±0.10 0.03±0.004 0.80±0.07 0.015±0.006 0.40±0.15 0805 0.080±0.006 2.00±0.15 0.050±0.006 1.25±0.15 0.020±0.008 0.50±0.20 1206 0.125±0.006 3.20±0.15 0.063±0.006 1.60±0.15 0.025±0.008 0.60±0.20 1210 0.125±0.012 3.20±0.30 0.100±0.008 2.50±0.20 0.030±0.010 0.75±0.25 1808 0.180±0.015 4.50±0.40 0.081±0.010 2.03±0.25 0.030±0.010 0.75±0.25 1812 0.180±0.015 4.50±0.40 0.125±0.012 3.20±0.30 0.030±0.010 0.75±0.25ELECTRICAL RATING Dielectric Capacitance Range Capacitance Tolerance Dissipation Factor T.C.C. Test Parameters (@25°C) Operating Temperature Insulation Resistance ≤100pF >1000pF NPO (COG) 0.5pF ~ 10nF ±0.1pF, ±0.25pF, ±0.50pF ±1%, ±2%, ±5%, ±10% >30pF, 0.1% Max 0±30ppm/°C 1.0±0.2Vrms, 1MHz±10% 1.0±0.2Vrms, 1KHz±10% -55 ~ +125°C @ 25°C +25°C, 10GΩ min or 500Ω-F min, whichever is less X7R (BME) 100pF ~ 1µF ±5%, ±10%, ±20% 6.3V: 10V & 16V: 25V & 50V: 5.0% 3.5% 2.5% Y5V 10nF ~ 10µF ±20%, -20+80% 6.3V: 10V & 16V: 25V & 50V: 5.0% 3.5% 2.5%0±15ppm/°C 1.0±0.2Vrms, 1KHz±10% -55 ~ +125°C @ 25°C +25°C, 10GΩ min or 500Ω-F min, whichever is less+30%/-80%ppm/°C 1.0±0.2Vrms, 1KHz±10% -25 ~ +85°C @ 20°C +25°C, 10GΩ min or 500Ω-F min, whichever is less570 West Lambert Road, Suite M, Brea, CA 92821 TEL: 714-255-9186 FAX: 714-255-9291American Accurate Components, Inc.1元器件交易网10 Volts – 50 VoltsDIELECTRIC SIZE EIA Cap Code VDCW 0R5 0.5pF 1R0 1 1R2 1.2 1R5 1.5 1R8 1.8 2R2 2.2 2R7 2.7 3R3 3.3 3R9 3.9 4R7 4.7 5R6 5.6 6R8 6.8 8R2 8.2 100 10pF 120 12 150 15 180 18 220 22 270 27 330 33 390 39 470 47 560 56 680 68 820 82 101 100pF 121 120 151 150 181 180 221 220 271 270 331 330 391 390 471 470 561 560 681 680 821 820 102 1000pF 122 1200 152 1500 182 1800 222 2200 272 2700 332 3300 392 3900 472 4700 562 5600 682 6800 822 8200 103 .010µF 123 12000 153 15000 183 18000 223 22000 273 27000 333 33000 393 0.39µFMLCC Products – NPO TypeNPO 10 N N N N N N N N N N N N N N N N 0402 16 25 N N N N N N N N N N N N N N N N N N N N N N N N N N N N N N N N 50 N N N N N N N N N N N N N N 10 S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S 0603 16 25 S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S 50 S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S 10 A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A B B B B B B B B B B D D D D D D D D 0805 16 25 A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A B B B B B B B B B B B B B B B B B B B B D D D D D D D D D D D D 50 A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A B B B B B B B B B B D D D 10 1206 16 25 50 10 1210 16 25 50 10 1812 16 25 50B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B C C D D D D D D D GB B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B C C D D D D D D D GB B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B C CB B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B C CC C C C C C C C C C C C C C C C C C C C C C C C C C C C C CC C C C C C C C C C C C C C C C C C C C C C C C C C C C C CC C C C C C C C C C C C C C C C C C C C C C C C C C C C C CC C C C C C C C C C C C C C C C C C C C C C C C C C C C C CD D D D D D D D D D D D DD D D D D D D D D D D D DD D D D D D D D D D D D DD D D D D D D D D D D D D* Variations of size, capacitance, voltage, and 13” reel are available upon request.570 West Lambert Road, Suite M, Brea, CA 92821 TEL: 714-255-9186 FAX: 714-255-9291American Accurate Components, Inc.2元器件交易网100 Volts – 3000 VoltsMLCC Products – NPO TypeDIELECTRIC NPO EIA SIZE 0603 0805 1206 1210 CODE VDCW 100 100 200 250 500 100 200 250 500 1000 2000 100 200 250 500 1000 2000 100 200 0R5 0.5pF S A A A A B B B B B B 1R0 1 S A A A A B B B B B B 1R2 1.2 S A A A A B B B B B B 1R5 1.5 S A A A A B B B B B B 1R8 1.8 S A A A A B B B B B B 2R2 2.2 S A A A A B B B B B B 2R7 2.7 S A A A A B B B B B B 3R3 3.3 S A A A A B B B B B B 3R9 3.9 S A A A A B B B B B B 4R7 4.7 S A A A A B B B B B B 5R6 5.6 S A A A A B B B B B B 6R8 6.8 S A A A A B B B B B B 8R2 8.2 S A A A A B B B B B B 100 10pF S A A A A B B B B B B C C C C C C D D 120 12 S A A A A B B B B B B C C C C C C D D 150 15 S A A A A B B B B B B C C C C C C D D 180 18 S A A A A B B B B B B C C C C C C D D 220 22 S A A A A B B B B B B C C C C C C D D 270 27 S A A A A B B B B B B C C C C C C D D 330 33 S A A A A B B B B B B C C C C C C D D 390 39 S A A A A B B B B B B C C C C C C D D 470 47 S A A A A B B B B B B C C C C C C D D 560 56 S A A A A B B B B B C C C C C C D D D 680 68 S A A A B B B B B B C C C C C C D D D 820 82 S A A A B B B B B B C C C C C D D D 101 100pF S A A A C B B B B C C C C C C D D D 121 120 S A C C C B B B B C C C C C C D D D 151 150 S A C C D B B B B C C C C C D D D 181 180 S A D D B B B B C C C C C D D D 221 220 S A B B B B C C C C C D D D 271 270 S A B B B C C C C C C D D 331 330 S A B B B C C C C C D D D 391 390 B B B B C C C C C D D D 471 470 B B C C C C C C D D D 561 560 B B C C C C D D 681 680 B C C C C D D 821 820 B C C C C D D 102 1000pF B C C C C D D 122 1200 B C D D D D 152 1500 C C D D D D 182 1800 C C D D D D 222 2200 C D D D D 272 2700 C D D D D 332 3300 C D 392 3900 D 472 4700 D 562 5600 682 6800 822 8200 103 .010µF * Variations of size, capacitance, voltage, and 13” reel are available upon request. TAPE/REEL PACKAGE TYPE, QUANTITY, AND AVAILABILITY Thickness in mm A = 0.65 + 0.05/-0.15 B = 0.85 + 0.5/-0.15 C = 1.00 + 0.05/-0.15 D = 1.2 + 0.15 G = 1.60 + 0.05/-0.15 K = 2.00 + 0.2 M = 2.5 + 0.3 N = 0.5 + 0.05 S = 0.8 + 0.07 0402 Type Qty Paper 10K 0603 Type Qty Paper 4K 0805 Type Qty Paper 4K Paper 4K Plastic 3K Plastic 3K 1206 Type Qty Paper 4K Paper 4K Plastic 3K Plastic 3K Plastic 2K -1812 1808 250 500 1000 2000 3000 1000 2000 3000D D D D D D D D D D D D D D D D D D D D D D D D D D D D D DD D D D D D D D D D D D D D D D D D D D D D D D D D D DD D D D D D D D D D D D D D D D D D D D D D D DD D D D D D D D D D D D D D D D D D D DD D D D DC C C C C C C C C C C C C K K K K K KC C C C C C C C C C C K K K K KC C C C C C C C C C C C C C1210 Type QtyPlastic Plastic Plastic Plastic Plastic -3K 3K 2K 2K 1K -1808 Type Qty Plastic 2K Plastic 2K Plastic 1K Plastic 1K -1812 Type Qty Plastic 1K Plastic 1K Plastic 1K Plastic 1K -570 West Lambert Road, Suite M, Brea, CA 92821 TEL: 714-255-9186 FAX: 714-255-9291American Accurate Components, Inc.3元器件交易网10 Volts – 50 VoltsMLCC Products – X7R TypeDIELECTRIC X7R SIZE 0402 0603 0805 EIA Cap Code VDCW 10 16 25 50 10 16 25 50 10 16 25 50 10 101 100pF N N N N S S S S B B B B 121 120 N N N N S S S S B B B B 151 150 N N N N S S S S B B B B 181 180 N N N N S S S S B B B B 221 220 N N N N S S S S B B B B B 271 270 N N N N S S S S B B B B B 331 330 N N N N S S S S B B B B B 391 390 N N N N S S S S B B B B B 471 470 N N N N S S S S B B B B B 561 560 N N N N S S S S B B B B B 681 680 N N N N S S S S B B B B B 821 820 N N N N S S S S B B B B B 102 1000pF N N N N S S S S B B B B B 122 1200 N N N N S S S S B B B B B 152 1500 N N N N S S S S B B B B B 182 1800 N N N N S S S S B B B B B 222 2200 N N N N S S S S B B B B B 272 2700 N N N S S S S B B B B B 332 3300 N N N S S S S B B B B B 392 3900 N N N S S S S B B B B B 472 4700 N N S S S S B B B B B 562 5600 N N S S S S B B B B B 682 6800 N N S S S S B B B B B 822 8200 N N S S S S B B B B B 103 N N S S S S B B B B B .010µF 123 .012 N N S S S S B B B B B 153 .015 N N S S S S B B B B B 183 .018 S S S S B B B B B 223 .022 S S S S B B B B B 273 .027 S S S S B B B B B 333 .033 S S S B B B B B 393 .039 S S S B B B B B 473 .047 S S S B B B B B 563 .056 S S S B B B B B 683 .068 S S S B B B B B 823 .082 S S B B B D B 104 S S B B B D B .100µF 154 .150 D D D C 184 .180 D D D C 224 .220 D D D C 334 .330 C 474 .470 684 .680 824 .820 105 1.00µF * Variations of size, capacitance, voltage, and 13” reel are available upon request. TAPE/REEL PACKAGE TYPE, QUANTITY, AND AVAILABILITY Thickness in mm A = 0.65 + 0.05/-0.15 B = 0.85 + 0.5/-0.15 C = 1.00 + 0.05/-0.15 D = 1.2 + 0.15 F = 1.40 + 0.05/-0.15 G = 1.60 + 0.05/-0.15 S = 0.8 + 0.07 N = 0.5 + 0.05 0402 – 0603 Type Quantity 0805 – 1206 Type Quantity Paper 4K/Reel Paper 4K/Reel Plastic 3K/Reel Plastic 3K/Reel Plastic 2K/Reel Plastic 2K/Reel Type 1210 Quantity Type 1808 Quantity Type 1812 Quantity1206 16 2550101210 16 2550101812 16 2550B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B C C C CB B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B C C C CB B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B C C CC C C C C C C C C C C C C C C C C C C C C C C C C C C C C C CC C C C C C C C C C C C C C C C C C C C C C C C C C C C C C CC C C C C C C C C C C C C C C C C C C C C C C C C C C C C C CC C C C C C C C C C C C C C C C C C C C C C C C C C C C C CD D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D DD D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D DD D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D DD D D D D D D D D D D D D D D D D D D D D D D D D D D D D D DPlastic Plastic Plastic Plastic3K/Reel 3K/Reel 2K/Reel 2K/ReelPlastic Plastic Plastic Plastic3K/Reel 3K/Reel 1K/Reel 1K/ReelPlastic Plastic Plastic1K/Reel 1K/Reel 1K/ReelPaper Paper4K/Reel 10K/Reel570 West Lambert Road, Suite M, Brea, CA 92821 TEL: 714-255-9186 FAX: 714-255-9291American Accurate Components, Inc.4元器件交易网100 Volts – 3000 VoltsMLCC Products – X7R TypeDIELECTRIC X7R EIA SIZE 0603 0805 1206 1210 1812 1808 CODE VDCW 100 100 200 250 500 100 200 250 500 1000 1000 2000 100 200 250 500 1000 100 200 250 500 1000 2000 1000 1500 3000 101 100pF S B B B B 121 120 S B B B B 151 150 S B B B B 181 180 S B B B B B B B B B B B 221 220 S B B B B B B B B B B B 271 270 S B B B B B B B B B B B 331 330 S B B B B B B B B B B B 391 390 S B B B B B B B B B B B 471 470 S B B B B B B B B B B B D D C C C 561 560 S B B B B B B B B B B C D D C C C 681 680 S B B B B B B B B B B C D D C C C 821 820 S B B B B B B B B B G G D D C C C 102 1000pF S B B B B B B B B B G G C C C C C D D D D D D C C K 122 1200 S B B B B B B B B B G G C C C C C D D D D D D C C K 152 1500 S B B B B B B B B B G C C C C C D D D D D D C C 182 1800 S B B B B B B B B B G C C C C C D D D D D D C C 222 2200 S B B B B B B B B C G C C C C C D D D D D D C C 272 2700 S B B B B B B B D G C C C C C D D D D D D C D 332 3300 S B B B B B B B G G C C C C D D D D D D D C D 392 3900 S B B B B B B B G G C C C C D D D D D D C 472 4700 S B B B B B B B G G C C C C D D D D D D C 562 5600 S B B B B B G C C C C D D D D D D C 682 6800 S B B B B B G C C C C D D D D D D C 822 8200 S B B B B C C C C C D D D D D D 103 S B B B B C C C C C D D D D D D .010µF 123 .012 S B B B B C C C C D D D D 153 .015 S B B C C C C C C D D D D 183 .018 B B C C C C C C D D D D 223 .022 B C C C C C D D D D D 273 .027 B C C C C C D D D D 333 .033 B C C C D D D D 393 0.39 B C C C D D D D 473 .047 B C D D D D D D 563 .056 B C D D D 683 .068 C C D D D 823 .082 C C D D D 104 D C D D D .100µF 124 .120 D C D D D 154 .150 C D 184 .180 C D 224 .220 C D 334 .330 D 474 .470 D 684 .680 824 .820 105 1.00µF * Variations of size, capacitance, voltage, and 13” reel are available upon request. TAPE/REEL PACKAGE TYPE, QUANTITY, AND AVAILABILITY Thickness in mm A = 0.65 + 0.05/-0.15 B = 0.85 + 0.5/-0.15 C = 1.00 + 0.05/-0.15 D = 1.2 + 0.15 F = 1.40 + 0.05/-0.15 G = 1.60 + 0.05/-0.15 K = 2.00 + 0.2 S = 0.8 + 0.07 N = 0.5 + 0.05 0603-0805-1206 Type Quantity Paper 4K/Reel Paper 4K/Reel Plastic 3K/Reel Plastic 3K/Reel Plastic 2K/Reel Plastic 2K/Reel Type 1210 Quantity Type 1808 Quantity Type 1812 QuantityPlastic Plastic Plastic Plastic3K/Reel 3K/Reel 2K/Reel 2K/ReelPlastic Plastic Plastic Plastic Plastic3K/Reel 3K/Reel 1K/Reel 1K/Reel 1K/ReelPlastic Plastic Plastic Plastic1K/Reel 1K/Reel 1K/Reel 1K/Reel570 West Lambert Road, Suite M, Brea, CA 92821 TEL: 714-255-9186 FAX: 714-255-9291American Accurate Components, Inc.5元器件交易网10 Volts – 50 VoltsMLCC Products – Y5V TypeDIELECTRIC Y5V SIZE 0402 0603 0805 EIA Cap Code VDCW 10 16 25 50 10 16 25 50 10 16 25 50 10 103 N N N S S S S A A A A B .010µF 123 .012 N N N S S S S A A A A B 153 .015 N N N S S S S A A A A B 183 .018 N N N S S S S A A A A B 223 .022 N N N S S S S A A A A B 273 .027 N N N S S S S A A A A B 333 .033 N N N S S S S A A A A B 393 .039 N N N S S S S A A A A B 473 .047 N N N S S S S A A A A B 563 .056 N N S S S S A A A A B 683 .068 N N S S S S A A A A B 823 .082 N N S S S S A A A A B 104 N N S S S S A A A A B .100µF 154 .150 S S S S A A A A B 224 .220 S S S A A A A B 334 .330 S S B B B B 474 .470 S S B B B B 684 .680 S B B B 105 S B B C 1.00µF 155 1.50 C 225 2.20 C 335 3.30 D 475 4.75 D 106 10µF * Variations of size, capacitance, voltage, and 13” reel are available upon request.1206 16 25 B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B C C C C C C D D D D50 B B B B B B B B B B B B B B B B B101210 16 2550101812 16 2550C C C C C C CC C C C C C CC C C C C C CC C C CD D D D D D DD D D D D D DD D D D D D DD D D D D D D100 Volts – 500 VoltsDIELECTRIC Y5V SIZE 0805 1206 1812 EIA Cap Code VDCW 100 200 250 500 100 200 250 500 100 200 250 103 B B B B B .010µF 123 .012 B B B B B 153 .015 B B B B B 183 .018 B B B B B 223 .022 B B B B B 273 .027 B B B B B 333 .033 B B B B B 393 .039 B B B B B 473 .047 B B B B 563 .056 B B B B 683 .068 B B B B 823 .082 B C C C 104 B C C C D D D .100µF 154 .150 C D D D 224 .220 C D D D 334 .330 D D D 474 .470 D D D * Variations of size, capacitance, voltage, and 13” reel are available upon request. TAPE/REEL PACKAGE TYPE, QUANTITY, AND AVAILABILITY Thickness in mm A = 0.65 + 0.05/-0.15 B = 0.85 + 0.5/-0.15 C = 1.00 + 0.05/-0.15 D = 1.2 + 0.15 F = 1.40 + 0.05/-0.15 G = 1.60 + 0.05/-0.15 K = 2.00+0.2mm S = 0.8 + 0.07 N = 0.5 + 0.05 0402 – 0603 Type Quantity 0805 – 1206 Type Quantity Paper 4K/Reel Paper 4K/Reel Plastic 3K/Reel Plastic 3K/Reel Plastic 2K/Reel Plastic 2K/Reel Type 1210 Quantity Type 1808 Quantity Type 1812 Quantity 500Plastic Plastic Plastic Plastic3K/Reel 3K/Reel 2K/Reel 2K/ReelPlastic Plastic Plastic Plastic3K/Reel 3K/Reel 1K/Reel 1K/ReelPlastic Plastic Plastic Plastic1K/Reel 1K/Reel 1K/Reel 1K/ReelPaper Paper4K/Reel 10K/Reel570 West Lambert Road, Suite M, Brea, CA 92821 TEL: 714-255-9186 FAX: 714-255-9291American Accurate Components, Inc.6元器件交易网MLCC Products – PackagingPACKAGING ON TAPE AND REEL Size 0603 0805 T (mm) 0.90~0.70 0.70~0.50 0.90~0.70 1.05~0.85 1.35~1.05 0.90~0.70 1.05~0.85 1.35~1.05 1.05~0.85 1.35~1.05 1.05~0.85 2.15~1.85 1.35~1.05 Tape Paper Tape Paper Tape Paper Tape Plastic Tape Plastic Tape Paper Tape Plastic Tape Plastic Tape Plastic Tape Plastic Tape Plastic Tape Plastic Tape Plastic Tape Quantity 4,000/Reel 4,000/Reel 4,000/Reel 3,000/Reel 3,000/Reel 4,000/Reel 3,000/Reel 3,000/Reel 3,000/Reel 3,000/Reel 3,000/Reel 1,000/Reel 1,000/ReelAREEL FOR TAPINGTaping is in accordance with EIA RS-481 or IEC 286-3TB* C N D1206 1210 1808 1812GUnit: mm Symbol DimensionA 178 ± 2.0N 50 minC 130 ± 0.5D 20 min.B 2.0±0.5G 10.0± 1.5T 14.9max1. PAPER TAPE DIMENSIONSt Feeding hole D A B Chip Capacitors Unlt:mm P P P Direction of FeedE2. PLASTIC TAPE DIMENSIONSChip pocket t Feeding hole D A B Chip Capacitors P Po PChip pocketEF WFWk Unlt:mmDirection of FeedPAPER TAPE W F E P1 P2 P0 ∅P t1 Dimensions in mm 8.0 ± 0.3 3.5 ± 0.05 1.75 ± 0.1 4.0 ± 0.1 2.0 ± 0.05 4.0 ± 0.1 1.5 + 0.1 –0 1.2 maximumPLASTIC TAPE W F E P1 P2 P0 ∅P t1 K Dimension in mm 8.0 ± 0.3 3.5 ± 0.05 1.75 ± 0.1 4.0 ± 0.1 2.0 ± 0.05 4.0 ± 0.1 1.5 + 0.1 –0 0.3 maximum 2.0 maximum570 West Lambert Road, Suite M, Brea, CA 92821 TEL: 714-255-9186 FAX: 714-255-9291American Accurate Components, Inc.7。

不锈钢牌号对照表之欧阳文创编

不锈钢牌号对照表
欧阳文创编
欧阳文创编
欧阳文创编
欧阳文创编
世界金属牌号对照表
碳素结构钢
欧阳文创编
欧阳文创编
［返回］优质碳素结构钢
欧阳文创编
欧阳文创编
欧阳文创编
欧阳文创编
欧阳文创编
［返回］碳素工具钢
欧阳文创编
［返回］合金结构钢
欧阳文创编
欧阳文创编
欧阳文创编
欧阳文创编
欧阳文创编
欧阳文创编
［返回］淬透性合金结构钢
欧阳文创编
欧阳文创编
［返回］弹簧钢
欧阳文创编
［返回］滚动轴承钢
［返回］高速工具钢
欧阳文创编
欧阳文创编
［返回］不锈耐酸钢
欧阳文创编
欧阳文创编
欧阳文创编
［返回］耐热钢
欧阳文创编
欧阳文创编
［返回］易切结构钢
欧阳文创编
合金工具钢
欧阳文创编
欧阳文创编
欧阳文创编
欧阳文创编。

c_24中文说明书

AVID C|24Guide 中文说明书一、简介1、C|24功能控件功能• 24个声道条,每个声道条都有以下控件: • 触敏机动推子 • 多功能旋转编码器和开关• 自动化模式选择器• 专用EQ和Dynamics开关• 专用Insert和Send开关• 专用Input和RecEnable开关• 声道Solo和Mute开关• 声道选择开关• 双排多功能显示器• 全局自动化模式和启动开关• 走带和导航控件• 编辑和功能控件• ProTools窗口和全局控制开关模拟音频功能• 16麦克风/线路/DI前置放大器具有以下功能:• 无级变速输入增益控件• 有开关控制的高通滤波器• 削波指示器• 幻象电源(8个声道分2组,每组都有)• 8x2辅助混音器具有以下功能:• 8 个输入装置都配有独立的增益控件• 立体声混音输出配有主音量控件• C|24 监控器分区输出装置有开关控制• 6声道监控器分区具有以下功能:2 个 (主要的和辅助的)环绕声输出音源2 个外部立体声输入音源配有选择器开关和电平控件的主要监控器输出装置 (5.1、LCRS 或立体声)和辅助监控输出装置(立体声)提示输出的2个声道配有电平控件和提示监控功能的耳机输出装置配有内置或外部音源和电平控件的对讲电话配有外部输入和电平控件的对听机二、启动和关闭 Pro Tools 系统基于 D-Command 的系统必须按照特定顺序启动和关闭。

按照此顺序打开系统电源:1、首先打开外置硬盘。

等待 10 至 15 秒,让它们达到所需的转速。

2 、打开 C|243、如果计划使用 MIDI 设备工作,打开 MIDI 接口和其他MIDI 装置。

4 、打开全部 Pro Tools 音频接口。

5、打开计算机。

6 、打开监听音箱放大器或有源音箱。

按照此顺序关闭系统:1、关闭监听音箱放大器或有源音箱。

2 、关闭全部 Pro Tools 音频接口。

3 、关闭计算机。

cav424中文

= 电流源 IM 和 IR 是集成在 CAV424 里的
图 2：CAV424 的电容测量原理
利用二个可调的电流源和二个电容组成的电桥来测出电容的变化，其中一个测量电容 CM 可以有一个变化量为 ∆CM = CM,max– CM,min ，另一个电容 CR 作为参考电容，它的电容量是固定的（见图 2）。CM,min 是测量电容 CM 的本底电容。与参考电容比较测出测量电容的变化 ∆CM = CM,max– CM,min 并转换为与之相应的电压信号输出。
如果二个电容 CR 和 CM 值相同，那么经过整流和滤波得到的一个直流电压信号就是零（见图 5）。如果测量电容 CM 改变了 ∆CM，那么得到的输出电压与之是成正比的。
如果二个电容 CR 和 CM 值不相同，那么当 ∆CM = 0 时，在输出端得到的是一个偏置值，它始终是叠加在直流电压信号上的。
参考振荡器
电路方框图
VTEMP
7
CAV424
T 温度传感器
COSC
12
参考振荡器
CX1
16
CX2
14
积分器 1 积分器 2
RCX1 RCX2 RCOSC
2
3
1
VCC
11
参考电流源
信号处理
6
VM
5
LPOUT
10
15
GND CL1
13 4
CL2 RL
图 1：CAV424 电路方框图
上海芸生微电子有限公司
通讯地址：上海108－009信箱
值 2.1V（当 VCC ＝5V 时）（见图 3）。参考振荡器的频率是由 ROSC 和 COSC 确定，它们的取值范围见表 1。
VOSC
VOSC,HIGH VOSC

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Doc #97041
5/5/04
DATA DELAY DEVICES, INC.
Tel: 973-773-2299 Fax: 973-773-9672
2
元器件交易网
DDU18
PACKAGE DIMENSIONS
24
19 18
POWER SUPPLY BYPASSING
The DDU18 relies on a stable power supply to produce repeatable delays within the stated tolerances. A 0.1uf capacitor from VEE to GND, located as close as possible to the VEE pin, is recommended. A wide VEE trace and a clean ground plane should be used.
10 sec
TABLE 2: DC ELECTRICAL CHARACTERISTICS
(0C to 85C) PARAMETER High Level Output Voltage Low Level Output Voltage High Level Input Voltage Low Level Input Voltage High Level Input Current Low Level Input Current SYMBOL VOH VOL VIH VIL IIH IIL MIN -1.025 -1.810 -1.165 -1.810 0.5 TYP MAX -0.880 -1.620 -0.880 -1.475 340 UNITS V V V V µA µA NOTES VIH = MAX,50Ω to -2V VIL = MIN, 50Ω to -2V VIH = MAX VIL = MIN
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The DDU18-series device is a 8-tap digitally buffered delay line. The IN Signal Input signal input (IN) is reproduced at the outputs (T1-T8), shifted in time by an T1-T8 Tap Outputs amount determined by the device dash number (See Table). For dash VEE -5 Volts numbers less than 16, the total delay of the line is measured from T1 to GND Ground T8. The nominal tap-to-tap delay increment is given by one-seventh of the total delay, and the inherent delay from IN to T1 is nominally 2.0ns. For dash numbers greater than or equal to 16, the total delay of the line is measured from IN to T8. The nominal tap-to-tap delay increment is given by one-eighth of this number.
元器件交易网
DDU18
8-TAP, ECL-INTERFACED FIXED DELAY LINE (SERIES DDU18)
FEATURES
• • • Eight equally spaced outputs Fits in 400 mil 24-pin DIP socket Input & outputs fully 100K-ECL interfaced & buffered
DDU18
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT: Ambient Temperature: 25oC ± 3oC Supply Voltage (Vcc): -5.0V ± 0.1V Input Pulse: Standard 10KH ECL levels Source Impedance: 50Ω Max. Rise/Fall Time: 2.0 ns Max. (measured between 20% and 80%) Pulse Width: PWIN = 1.5 x Total Delay Period: PERIN = 10 x Total Delay OUTPUT: Load: Cload: Threshold: 50Ω to -2V 5pf ± 10% (VOH + VOL) / 2 (Rising & Falling)
24 23 22 21 20 19 18 17 16 15 14 13
IN N/C N/C N/C N/C GND VEE N/C N/C N/C N/C GND
DDU18-xx DDU18-xxM
DIP Military DIP
T7 T8
GND
DDU18-xxC4 DDU18-xxMC4
SMD Mil SMD
.020 TYP.
.040 TYP.
.010±.002
24 23 22 21 20 19 18 17 16 15 14 13
.710 .590 ±.005 MAX.
.882 ±.005 .007 ±.005
1
2
3
4
5
6
7
8
9
10 11 12
.090 1.100 1.280±.020
.100
.280 MAX.
2.0ns 1/7 1/7 1/7 1/7 1/7 1/7 1/7
DASH NUMBER SPECIFICATIONS
Part Number DDU18-4 DDU18-8 DDU18-12 DDU18-16 DDU18-20 DDU18-24 DDU18-32 DDU18-40 DDU18-48 DDU18-56 DDU18-64 DDU18-72 DDU18-80 DDU18-100 DDU18-120 DDU18-160 DDU18-200 Total Delay (ns) 3.5 ± 1.0 * 7.0 ± 1.0 * 10.5 ± 1.0 * 16 ± 1.0 20 ± 1.0 24 ± 1.2 32 ± 1.6 40 ± 2.0 48 ± 2.4 56 ± 2.8 64 ± 3.2 72 ± 3.6 80 ± 4.0 100 ± 5.0 120 ± 6.0 160 ± 8.0 200 ± 10.0 Delay Per Tap (ns) 0.5 ± 0.3 1.0 ± 0.4 1.5 ± 0.4 2.0 ± 0.5 2.5 ± 1.0 3.0 ± 1.5 4.0 ± 2.0 5.0 ± 2.0 6.0 ± 2.0 7.0 ± 2.0 8.0 ± 2.0 9.0 ± 2.0 10.0 ± 2.5 12.5 ± 2.5 15.0 ± 3.0 20.0 ± 4.0 25.0 ± 5.0
.050 ±.010
DDU18-xxC4 (Commercial SMD) DDU18-xxMC4 (Military SMD)
Doc #97041
5/5/04
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
3
元器件交易网
GND T1 T2 T3 GND GND T4 T5 T6 1 3 4 5 6 7 8 9 10 11 12 13 19 18 24
data 3 delay devices, inc.
PACKAGES
IN

GND VEE
GND N/C T1 T2 T3 GND GND T4 T5 T6 T7 T8
1 2 3 4 5 6 7 8 9 10 11 12
VCC IN
T1
T2
T3
T4
T5
T6
T7
T8 GND
Functional diagram for dash numbers < 16
1/8 1/8 1/8 1/8 1/8 1/8 1/8 1/8
* Total delay is referenced to first tap output Input to first tap = 2.0ns ± 1ns
SERIES SPECIFICATIONS
• • • • • • Minimum input pulse width: 40% of total delay Output rise time: 2ns typical Supply voltage: -5VDC ± 5% Power dissipation: 500mw typical (no load) Operating temperature: 0° to 85° C Temp. coefficient of total delay: 100 PPM/°C
13
.530 MAX.
1 3 4 5 6 7 8 9 10 11 1YP. MAX. .130 ±.030 .018 TYP. 1.100 TYP. .100 TYP.
.012 TYP. .400 TYP.
DDU18-xx (Commercial DIP) DDU18-xxM (Military DIP)
Doc #97041
5/5/04
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013