plc外文翻译
- 1、下载文档前请自行甄别文档内容的完整性,平台不提供额外的编辑、内容补充、找答案等附加服务。
- 2、"仅部分预览"的文档,不可在线预览部分如存在完整性等问题,可反馈申请退款(可完整预览的文档不适用该条件!)。
- 3、如文档侵犯您的权益,请联系客服反馈,我们会尽快为您处理(人工客服工作时间:9:00-18:30)。
1 Bit Logic In structi ons
1.1 Overview of Bit Logic In structi ons
1.1.1 Description
Bit logic in structi ons work with two digits, 1 and 0. These two digits form the base of a nu mber system called the binary system. The two digits 1 and 0 are called binary digits or bits. In the world of con tacts and coils, a 1 in dicates activated or en ergized, and a 0 in dicates not activated or not en ergized.
The bit logic in struct ions in terpret sig nal states of 1 and 0 and comb ine them accord ing to Boolea n logic. These comb in ati ons produce a result of 1 or 0 that is called the “result of logic operati on ” (RLO).
The logic operations that are triggered by the bit logic instructions perform a variety of fun cti ons.
There are bit logic in structio ns to perform the followi ng fun cti ons:
---| |--- Normally Ope n Co ntact (Address)
---| / |--- Normally Closed Con tact (Address)
---(SAVE) Save RLO into BR Memory
XOR Bit Exclusive OR
---()Output Coil
---(# )--- Midli ne Output
---|NOT|--- In vert Power Flow
The followi ng in structio ns react to an RLO of 1:
---(S ) Set Coil
---(R ) Reset Coil
SR Set-Reset Flip Flop
RS Reset-Set Flip Flop
Other in structi ons react to a positive or n egative edge tran siti on to perform the followi ng functions:
---(N)--- Negative RLO Edge Detectio n
---(P)--- Positive RLO Edge Detectio n
NEG Address Negative Edge Detectio n
POS Address Positive Edge Detectio n
Immediate Read
Immediate Write
1.2 ---| |--- Normally Ope n Con tact (Address)
1.2.1 Symbol
Parameter Data Type Memory Area Description
BOOL I, Q, M, L, D, T, C Checked bit1.2.2 Description
---| |--- (Normally Ope n Con tact) is closed whe n the bit value stored at the specified
is equal to "1". Whe n the con tact is closed, ladder rail power flows across the con tact and the result of logic operati on (RLO) = "1".Otherwise, if the sig nal state at the specified
"0", the con tact is ope n. Whe n the con tact is ope n, power does not flow across the con tact and the result of logic operation (RLO) = "0".When used in series,---1 |--- is linked to the RLO bit by AND logic. When used in parallel, it is linked to the RLO by OR logic.
1.2.3 Status word
1.2.4 Example
10.0 10.1
IM
Power flows if one of the following conditions exists:
The sig nal state is "1" at in puts 10.0 and I0.1 Or the sig nal state is "1" at in put