FIR低通数字滤波器的设计要点

FIR低通数字滤波器的设计要点《DSP技术与应用》课程设计报告课题名称：基于DSP Builder的FIR数字滤波器的设计与实现学院：电子信息工程学院班级： 11级电信本01班学号：姓名：题目基于DSP Builder的FIR数字滤波器的设计与实现摘要FIR数字滤波器是数字信号处理的一个重要组成部分，于FIR数字滤波器具有严格的线性相位，因此在信息的采集和处理过程中得到了广泛的应用。

介绍了FIR数字滤波器的概念和线性相位的条件，分析了窗函数法、频率采样法和等波纹逼近法设计FIR滤波器的思路和流程。

在分析三种设计方法原理的基础上，借助Matlab仿真软件工具箱中的fir1、fir2和remez子函数分别实现窗函数法、频率采样法和等波纹逼近法设计FIR滤波器。

然后检验滤波器的滤波效果，采用一段音频进行加噪声然后用滤波器滤，对比三段音频效果进而对滤波器的滤波效果进行检验。

仿真结果表明，在相频特性上，三种方法设计的FIR滤波器在通带内都具有线性相位；在幅频特性上，相比窗函数法和频率采样法，等波纹逼近法设计FIR滤波器的边界频率精确，通带和阻带衰减控制。

AbstractFIR digital filter is an important part of digital signal processing, the FIR digital filter with linear phase, so it has been widely applied in the collection and processing of information in the course of. This paper introduces the concept of FIR digital filter with linear phase conditions, analysis of the window function method and frequency sampling method and the ripple approximation method of FIR filter design ideas and processes. Based on analyzing the principle of three kinds of design methods, by means of fir1, fir2 and Remez function of Matlab simulation software in the Toolbox window function method and frequency sampling method and respectively realize equiripple approximation method to design FIR filter. Then test the filtering effect of the filter, using an audio add noise and then filter, test three audio effects andxxparison of filter filtering effect. Simulation results show that the phase frequency characteristic, three design methods of FIR filter with linear phase are in the pass band; the amplitude frequency characteristics, xxpared with the window function method and frequency sampling method, equiripple approximation methodDesign of FIR filter with accurate boundary frequency, the passband and stopband attenuation control.目录一、绪论 ................................................ ............................................ 1 二、FIR数字滤波器原理 ................................................ ................. 2 三、DSP Builder设计流程 ................................................ ............... 3 四、基于DSP Builder设计FIR数字滤波器 ................................. 8 五、课程设计心得 .......................................................................... 11 六、6. 修改FIR滤波器模型添加参数把计算机的系数逐个填入到FIR滤波器模型中，见图。

这样就完成了一个12阶FIR低通滤波器的设计。

图 12阶FIR低通滤波器7四、基于DSP Builder设计FIR数字滤波器1、利用DSP Builder库建立DDS模型如图所示。

图 DDS模型2、加入激励，完成系统仿真如图所示。

图仿真结果83、Simulink模型转成VHDL如图所示。

图Simulink模型转VHDL4.综合如图和图。

图 Quartus II综合9图 Quartus II综合5、利用Modelsim完成功能仿真如图。

图功能仿真10五、课程设计心得通过本次课程设计自己对滤波器的设计有了初步的了解和掌握。

也对MATLAB有了一定的了解。

设计过程中，学习了许多数字信号处理课程中关于数字滤波器的设计的内容，再通过利用六、LPM_WIDTHB => 12, PIPELINE => 2, one_input => 0, lpm=> 0, lpm_hint => \cst_val => \SequenceLength => 1, SequenceValue => 1, dspb_widthr => 24) port map ( DATAA => A6W, DATAB => A1W, clock => clock, ena => '1', sclr => sclr, result => A10W);-- Product Operator - Simulink Block \Product2i : AltiMult generic map ( LPM_WIDTHA => 12, LPM_WIDTHB => 12, PIPELINE => 2, one_input => 0, lpm => 0, lpm_hint => \cst_val => \SequenceLength => 1, SequenceValue => 1, dspb_widthr => 24) port map ( DATAA => A7W, DATAB => A2W, clock => clock, ena => '1', sclr => sclr, result => A11W);-- Product Operator - Simulink Block \Product3i : AltiMult generic map ( LPM_WIDTHA => 12, LPM_WIDTHB=> 12, PIPELINE => 2,17one_input => 0, lpm=> 0, lpm_hint => \cst_val => \SequenceLength => 1, SequenceValue => 1, dspb_widthr => 24) port map ( DATAA => A8W, DATAB => A3W, clock => clock, ena => '1', sclr => sclr, result => A12W);-- Sum Operator - Simulink Block %u15_L0_Inst0 : SAdderSub generic map ( LPM_WIDTH => 24, PIPELINE => 1, SequenceLength => 1, SequenceValue => 1, AddSubVal => AddAdd) port map ( dataa => p15A0L0Add, datab => p15B0L0Add, clock => clock, ena => '1', sclr => sclr, result => p15A0L1Add);u15_L0_Inst1 : SAdderSub generic map ( LPM_WIDTH => 24, PIPELINE => 1, SequenceLength => 1, SequenceValue => 1, AddSubVal => AddAdd) port map ( dataa => p15A1L0Add, datab => p15B1L0Add, clock => clock, ena => '1', sclr => sclr, result => p15B0L1Add);18u15_L1_Inst0 : SAdderSub generic map ( LPM_WIDTH => 25, PIPELINE => 1, SequenceLength => 1,SequenceValue => 1, AddSubVal => AddAdd) port map ( dataa => p15A0L1Add, datab => p15B0L1Add, clock => clock, ena => '1', sclr => sclr, result => A13W);end architecture aDspBuilder;19《DSP技术与应用》课程设计报告课题名称：基于DSP Builder的FIR数字滤波器的设计与实现学院：电子信息工程学院班级： 11级电信本01班学号：姓名：题目基于DSP Builder的FIR数字滤波器的设计与实现摘要FIR数字滤波器是数字信号处理的一个重要组成部分，于FIR数字滤波器具有严格的线性相位，因此在信息的采集和处理过程中得到了广泛的应用。