主板加电过程

合集下载
  1. 1、下载文档前请自行甄别文档内容的完整性,平台不提供额外的编辑、内容补充、找答案等附加服务。
  2. 2、"仅部分预览"的文档,不可在线预览部分如存在完整性等问题,可反馈申请退款(可完整预览的文档不适用该条件!)。
  3. 3、如文档侵犯您的权益,请联系客服反馈,我们会尽快为您处理(人工客服工作时间:9:00-18:30)。
詳細參考附件:
Main Power
Main power的產生由SLP_S3#去控制。
按Power Button PWRBTN#拉low 通知SIOSIO告知NB NB 送出SLP_S3#(此時SLP_S3#為高電平) PSON# 被拉low Power Supply產生Main Power.
Power-up (Main Power)
CH1:+12V Ch2:+5V Ch3:+3V
1. Main power (+12V,+5V,+3V) almost ramp up at the same time.
2. The main power ramp behavior depends on the power supply design.
RSMRST#
RSMRST#: Resume Well Reset, this signal is used for resetting the resume power plane logic.
1. After plugging power cord, +5VSB ramps up. 2. +3VSB is regulated from +5VSB. 3. 32ms after +3VSB ramps above VTRIP (2.2V), RSMRST asserts. 4. RSMRST will re-assert after AC power loss, which acts like a
POWER
+5v/-5v +3v
+12v/-12v
Pwr ok
CPU Pson#(-)
Cpu rst
NB
NB_ RESET
SUPER I/O +5v
+3v
OR AS016
SB
Reset
Slp-s3(+)
PWRBTN
Intel chipset power on sequence
MB Power Sequence
ACPI的Global States分四個狀態 G0—G1—G2—G3
Item 1
2
3 4
Global States
G0
G1
G2 G3
Sleeping States
Detail description
S0
電腦的正常工作狀態-作業系統和應用程式都在執行
S1
最耗電的睡眠模式,所有原件均有保持電源,除了一些沒有被 使用的device.
3. Some SIO, ex:SMSC5127, uses inverted SLP_S3# to generate nPS_ON#.
4. In SIS platform, PS_ON# is generated from SB itself (ex:SIS 968).
PSON#
• PSON# 是低有效信號,當此信號為Low時,Power Supply送 出+3.3V,+5V,-5V,+12V,-12V等電壓. 而當此信號被拉High 時,Power Supply停止送出上面的電壓.
Battery BATT
3.0V 2.6V
G3 State
2.9V
S5 State
1. BATT comes from BATTERY at G3 state. So BATT will be 2.6V at G3 state.
2. BATT comes from +3VSB at S5 state. So BATT will be 2.9V at S5 state.
者可以恢復到原本的工作狀態.
S5
Soft off,只有standby power 存在.
Battery Mechanical Off,Power cord被拔掉,只有Battery.
主板基本電壓
狀態電壓種類有3種
1.Main power: S0/S1 2.Dual power:S0/S1/S3 3.Standby power:S0/S1/S3/S4/S5
主板信號簡介
RTCRST# RSMRST# PWRBTN# SLP_S3# PS_ON# PWROK PLTRST#
RTCRST#
RTCRST#有效:在G3狀態時,拔掉battery,此時SB收到低電平,會清掉COMS 內 容;若要給主板維持時間或CMOS內容, RTCRST信號需要是高電平.
VC(18.63ms)=2V If VCC=5V, assuming 20ms is needed: 2. t=RC=20ms VC(20ms)=3.16V
VC(10.22ms)=2V RC is chosen by substituting VC(t), VCC, t
and solve for RC.
2. To precisely estimate the resulting delay from +3VSB to AUXOK, we need to implement the RC charge formula.
If VCC=3.3V, assuming 20ms is needed: 1. t=RC=20ms VC(20ms)=2.08V
2. When resuming from S3/S4, any wake up event will cause the de-assertion of SLP_S3#~SLP_S5#, and the rest of the power-up power sequence is the same with those resuming from S5.
PS. ASIC:Application Specific Integrated Circuit,是专用集成电路.目前,在集成
电路界ASIC被认为是一种为专门目的而设计的集成电路
5. CB918 must be installed: 1. Debounce, 2. Prevent ESD from directly going into SB and SIO. 1000PF is a commonly used value.
6. To achieve better ESD resist performance, CB918 should be placed near front panel header.
知Power Supply送電. • 當實驗時,可以直接把Power supply的PSON#用導線與GND瞬間導通,
則此時Power Supply開始工作.
PWROK
PWROK有的資料也叫PWRGD, 是電源準備OK的信號.Power Supply 中會有PWROK,更多的在主板上,且分很多種, 如CPU_PWRGD, NB_PWRGD, VRMPWRGD, VTT_PWRGD.
PWRBTN#
PWRBTN#: Power Button, #:代表低電平有效
PWRBTN#
1. Pin6 and pin8 is connected to the power button on the chassis.
2. Pressing power button generate a low pulse to SB and SIO.
主板基本電壓
主板基本電壓有5個,其他電壓都是由這5個基 本電壓轉換而得.
POWER +12V -12V
Specification 11.4 ~ 12.6V -10.8 ~ 13.2V
+5V +3.3V +5VSB
4.75 ~ 5.25V 3.14 ~ 3.47V 4.75 ~ 5.25V
主板基本電壓
主板上電過程
Willess zhang
前言
電腦的開機只需要對著Power鍵輕輕一按 即可.
可這一按具體是如何使電腦能開機工作 的呢?它的整個過程是怎樣的?
以下分幾個部分பைடு நூலகம்講解
Content
開機上電動作圖解 主板的電壓定義 主板的主要開機信號介紹 主板開機上電過程(波形和電路)
Power Sequence
SLP_S3#
SLP_S3#: Sleep Control,SLP_S3# is for power plane control. This signal shuts off power to all non-critical systems when in S3(Suspend to RAM),S4(Suspend to Disk), or S5 states.
當電源送出的+3.3V and +5V達到Normal值的95%時,由Power Supply送出此信號.當+3.3V or +5V 掉到Normal的95%以下時,Power Supply就會把此信號拉Low.當主板收到此信號時,表明電源已經準備 ok,可以開始動作.
但是大部分情況下,我們不會使用此信號來通知主板動作 (主板上此 PIN一般空接) .而是使用專門的ASIC來偵測+3.3V and +5V電壓,當電 源發出的電壓符合要求時,由ASIC發出PWROK信號通知主板動作.
Suspend to RAM,只有memory是唯一有電源供給的原
S3
件 ,XP系統下叫做“待機(Standby)”, Vista叫做“睡眠
(Sleep)”.
Suspend to HDD,在Windows中叫休眠(Hibernation ),所
S4
有主記憶體儲器的內容被儲存在硬碟中,從S4恢復後,使用
wake up event of SB and causes the de-assertion of SLP_S3# to turn on the system.
+5VSB
+3VSB
RSMRST
S5 State
Resume reset active表 示所有的standby power 都OK.
RSMRST# AUXOK Logic Example: VC
1. Let VPQ3.1 ramps up slower than +3VSB. It is to meet the spec that RSMRST(AUXOK) needs to ramp up after VTR is ready with a delay (20ms for SB600).
Standby Power
1, 在MB上,power supply只提供+5VSB一種standby 電壓, 其他standby power都由它轉出來的。
2,Standby power上電(插上power cord)主板就會有, 但其提供的電流有限。
Dual Power
Dual power由standby power和main power 提供,他存在於S0,S1,S3這幾種狀態下,由 Gate信號去控制哪一個power輸出。
• 利用此信號可以設計“ Soft Power down” 的關機功能. 當使用者對作業系統下關機命令時. 作業系統亦可關閉所 有的應用程式並利用此腳的功能達到自動關機的動作.
灰色: +5V Power OK signal 綠色: +5V (PS_ON#,電源工作電壓)
PSON#
• 在主板上,未開機時(S5時), 此信號PSON#一直被pull up到+5VSB. • 當User按下Power Button後,一般由Super I/O將此信號拉low,從而通
SLP_S3#
PWRBTN# SLP_S5# SLP_S4# SLP_S3# PS_ON#
Press Power Button
+12V,+5V,+3V
S0 State
ATX POWER
S0 S1 S3 S4 S5
SLP_S3# SLP_S4#
HHL L L HHHL L
SLP_S5#
HHHHL
1. In Intel platform, SLP_S3# is always used to turn on the power supply.
3. Power button can be programmed to generate suspend, hibernate or shutdown event.
4. Generally PWRBTN# of SB is internal pulled high, R1336 is reserved to avoid internal pull-high malfunction. This must be pulled to standby power.
相关文档
最新文档