Structure and function of the MCS

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【机械类文献翻译】51系列单片机的功能和结构

Structure and function of the MCS-51 seriesStructure and function of the MCS-51 series one-chip computer MCS-51 is a name of a piece of one-chip computer series which Intel Company produces. This company introduced 8 top-grade one-chip computers of MCS-51 series in 1980 after introducing 8 one-chip computers of MCS-48 series in 1976. It belong to a lot of kinds this line of one-chip computer the chips have,such as 8051, 8031, 8751, 80C51BH, 80C31BH,etc., their basic composition, basic performance and instruction system are all the same. 8051 daily representatives- 51 serial one-chip computers .An one-chip computer system is made up of several following parts: ( 1) One microprocessor of 8 (CPU). ( 2) At slice data memory RAM (128B/256B),it use not depositting not can reading /data that write, such as result not middle of operation, final result and data wanted to show, etc. ( 3) Procedure memory ROM/EPROM (4KB/8KB ), is used to preserve the procedure , some initial data and form in slice. But does not take ROM/EPROM within some one-chip computers, such as 8031 , 8032, 80C ,etc.. ( 4) Four 8 run side by side I/O interface P0 four P3, each mouth can use as introduction , may use as exporting too. ( 5) Two timer / counter, each timer / counter may set up and count in the way, used to count to the external incident, can set up into a timing way too, and can according to count or result of timing realize the control of the computer. ( 6) Five cut off cutting off the control system of the source . ( 7) One all duplexing serial I/O mouth of UART (universal asynchronous receiver/transmitter (UART) ), is it realize one-chip computer or one-chip computer and serial communication of computer to use for. ( 8) Stretch oscillator and clock produce circuit, quartz crystal finely tune electric capacity need outer. Allow oscillation frequency as 12 megahertas now at most. Every the above-mentioned part was joined through the inside data bus .Among them, CPU is a core of the one-chip computer, it is the control of the computer and command centre, made up of such parts as arithmetic unit and controller , etc.. The arithmetic unit can carry on 8 persons of arithmetic operation and unit ALU of logic operation while including one, the 1 storing device temporarilies of 8, storing device 2 temporarily, 8's accumulation device ACC, register B and procedure stateregister PSW, etc. Person who accumulate ACC count by 2 input ends entered of checking etc. temporarily as one operation often, come from person who store 1 operation is it is it make operation to go on to count temporarily , operation result and loopback ACC with another one. In addition, ACC is often regarded as the transfer station of data transmission on 8051 inside . The same as general microprocessor, it is the busiest register. Help remembering that agreeing with A expresses in the order. The controller includes the procedure counter , the order is depositted, the order decipher, the oscillator and timing circuit, etc. The procedure counter is made up of counter of 8 for two, amounts to 16. It is a byte address counter of the procedure in fact, the content is the next IA that will carried out in PC. The content which changes it can change the direction that the procedure carries out . Shake the circuit in 8051 one-chip computers, only need outer quartz crystal and frequency to finely tune the electric capacity, its frequency range is its 12MHZ of 1.2MHZ. This pulse signal, as 8051 basic beats of working, namely the minimum unit of time. 8051 is the same as other computers, the work in harmony under the control of the basic beat, just like an orchestra according to the beat play that is commanded.There are ROM (procedure memory , can only read ) and RAM in 8051 slices (data memory, can is it can write ) two to read, they have each independent memory address space, dispose way to be the same with general memory of computer. Procedure 8051 memory and 8751 slice procedure memory capacity 4KB, address begin from 0000H, used for preserving the procedure and form constant. Data 8051- 8751 8031 of memory data memory 128B, address false 00FH, use for middle result to deposit operation, the data are stored temporarily and the data are buffered etc.. In RAM of this 128B, there is unit of 32 byteses that can be appointed as the job register, this and general microprocessor is different, 8051 slice RAM and job register rank one formation the same to arrange the location. It is not very the same that the memory of MCS-51 series one-chip computer and general computer disposes the way in addition. General computer for first address space, ROM and RAM can arrange in different space within the range of this address at will, namely the addresses of ROM and RAM, with distributing differentaddress space in a formation. While visiting the memory, corresponding and only an address Memory unit, can ROM, it can be RAM too, and by visiting the order similarly. This kind of memory structure is called the structure of Princeton. 8051 memories are divided into procedure memory space and data memory space on the physics structure, there are four memory spaces in all: The procedure stores in one and data memory space outside data memory and one in procedure memory space and one outside one, the structure forms of this kind of procedure device and data memory separated form data memory, called Harvard structure. But use the angle from users, 8051 memory address space is divided into three kinds: (1) In the slice, arrange blocks of FFFFH , 0000H of location , in unison outside the slice (use 16 addresses). (2) The data memory address space outside one of 64KB, the address is arranged from 0000H 64KB FFFFH (with 16 addresses ) too to the location. (3) Data memory address space of 256B (use 8 addresses). Three above-mentioned memory space addresses overlap, for distinguishing and designing the order symbol of different data transmission in the instruction system of 8051: CPU visit slice, ROM order spend MOVC , visit block RAM order uses MOVX outside the slice, RAM order uses MOV to visit in slice.8051 one-chip computer have four 8 walk abreast I/O port, call P0, P1, P2 and P3. Each port is 8 accurate two-way mouths, accounts for 32 pins altogether. Every one I/O line can be used as introduction and exported independently. Each port includes a latch (namely special function register ), one exports the driver and a introduction buffer . Make data can latch when outputting, data can buffer when making introduction , but four function of passway these self-same. Expand among the system of memory outside having slice, four port these may serve as accurate two-way mouth of I/O in common use. Expand among the system of memory outside having slice, P2 mouth see high 8 address off; P0 mouth is a two-way bus, send the introduction of 8 low addresses and data / export in timesharing The circuit of 8051 one-chip computers and four I/O ports is very ingenious in design. Familiar with I/O port logical circuit, not only help to use ports correctly and rationally, and will inspire to designing the peripheral logical circuit of one-chip computer to some extent. Loadability and interface of port have certain requirement, because output grade, P0 of mouth and P1 end output, P3 of mouth grade different at structure, so, the load ability and interface of its door demand to have nothing in common with each other. P0 mouth is different from other mouths, its output grade draws the resistance supremly. When using it as the mouth in common use to use, output grade is it leak circuit to turn on, is it is it urge NMOS draw the resistance on taking to be outer with it while inputting to go out to fail. When being used as introduction, should write "1" to a latch first. Every one with P0 mouth can drive 8 Model LS TTL load to export. P1 mouth is an accurate two-way mouth too, used as I/O in common use. Different from P0 mouth output of circuit its, draw load resistance link with power on inside have. In fact, the resistance is that two effects are in charge of FET and together: One FET is in charge of load, its resistance is regular. Another one can is it lead to work with close at two state, make its President resistance value change approximate 0 or group value heavy two situation very. When it is 0 that the resistance is approximate , can draw the pin to the high level fast ; When resistance value is very large, P1 mouth, in order to hinder the introduction state high. Output as P1 mouth high electricity at ordinary times, can is it draw electric current load to offer outwards, draw the resistance on needn't answer and thenning. Here when the port is used as introduction, must write into 1 to the corresponding latch first too, make FET end. Relatively about 20,000 ohms because of the load resistance in scene and because 40,000 ohms, will not exert an influence on the data that are input. The structure of P2 some mouth is similar to P0 mouth, there are MUX switches. Is it similar to mouth partly to urge, but mouth large a conversion controls some than P1. P3 mouth one multi-functional port, mouth getting many than P1 it have "and " 3 door and 4 buffer". Two part these, make her besides accurate two-way function with P1 mouth just, can also use the second function of every pin, "and " door 3 function one switch in fact, it determines to be to output data of latch to output second signal of function. Act as W =At 1 o'clock, output Q end signal; Act as Q =At 1 o'clock, can output W line signal . At the time of programming, it is that the first function is still the second function but needn't havesoftware that set up P3 mouth in advance . It hardware not inside is the automatic to have two function outputted when CPU carries on SFR and seeks the location (the location or the byte ) to visit to P3 mouth /at not lasting lining, there are inside hardware latch Qs =1.The operation principle of P3 mouth is similar to P1 mouth.Output grade , P3 of mouth , P1 of P1 , connect with inside have load resistance of drawing , every one of they can drive 4 Model LS TTL load to output. As while inputting the mouth, any TTL or NMOS circuit can drive P1 of 8051 one-chip computers as P3 mouth in a normal way . Because draw resistance on output grade of them have, can open a way collector too or drain-source resistance is it urge to open a way, do not need to have the resistance of drawing outerly . Mouths are all accurate two-way mouths too. When the conduct is input, must write the corresponding port latch with 1 first . As to 80C51 one-chip computer, port can only offer milliampere of output electric currents, is it output mouth go when urging one ordinary basing of transistor to regard as, should contact a resistance among the port and transistor base , in order to the electricity while restraining the high level from exporting P1~P3 Being restored to the throne is the operation of initializing of an one-chip computer. Its main function is to turn PC into 0000H initially , make the one-chip computer begin to hold the conduct procedure from unit 0000H. Except that the ones that enter the system are initialized normally,as because procedure operate it make mistakes or operate there aren't mistake, in order to extricate oneself from a predicament , need to be pressed and restored to the throne the key restarting too. It is an input end which is restored to the throne the signal in 8051 China RST pin. Restore to the throne signal high level effective , should sustain 24 shake cycle (namely 2 machine cycles ) the above its effective times. If 6 of frequency of utilization brilliant to shake, restore to the throne signal duration should exceed 4 delicate to finish restoring to the throne and operating. Produce the logic picture of circuit which is restored to the throne the signal:Restore to the throne the circuit and include two parts outside in the chip entirely. Outside that circuit produce to restore to the thronesignal (RST ) hand over to Schmitt's trigger, restore to the throne circuit sample to output , Schmitt of trigger constantly in each S5P2 , machine of cycle in having one more , then just got and restored to the throne and operated the necessary signal insidly. Restore to the throne resistance of circuit generally, electric capacity parameter suitable for 6 brilliant to shake, can is it restore to the throne signal high level duration greater than 2 machine cycles to guarantee. Being restored to the throne in the circuit is simple, its function is very important. Pieces of one-chip computer system could normal running,should first check it can restore to the throne not succeeding. Checking and can pop one's head and monitor the pin with the oscillograph tentatively, push and is restored to the throne the key, the wave form that observes and has enough range is exported (instantaneous), can also through is it restore to the throne circuit group holding value carry on the experiment to change.51系列单片机的功能和结构结构和功能的监控监-51系列之一--计算机芯片监控监-51名是一幅一个电脑晶片,英特尔公司生产系列. 这家公司推出8级一个计算机芯片监控监-51系列之后,于1980年8引入一个计算机芯片监控监,于1976年48系列.。

NB-IoT物理层设计研究

NB-IoT物理层设计研究蒙文川【摘要】NB-IoT(窄带物联网)是3GPP R13中引入的蜂窝物联网技术,具有广覆盖、低成本、大容量、低功耗的系统特性.基于空中接口和物理层基本过程的角度,通过研究NB-IoT上下行物理信道主要的结构、配置和功能,阐述了已完成标准化的NB-IoT物理层基本设计方案,从而更好地了解NB-IoT物理层是如何匹配系统设计目标的,有助于进一步研究把握NB-IoT技术的发展方向.%NB-IoT (Narrow Band-Internet of Things) is a cellular-based IoT technology introduced in 3GPP Release 13, characterized by its wide signal coverage, low terminal cost, large capacity and low power consumption. Based on the air interface and basic process of physical layer,the standardized basic design of NB-IoT physical layer is discussed via the study of the structure, configuration and function of DL/UL physical channel in NB-IoT, thus to make a better understanding of how the NB-IoT physical layer to match design objectives of the system, and this would be of help for further study and grasp the development direction of NB-IoT technology.【期刊名称】《通信技术》【年(卷),期】2017(050)012【总页数】5页(P2745-2749)【关键词】物联网;NB-IoT;物理信道;LTE【作者】蒙文川【作者单位】中国移动通信集团广西有限公司贵港分公司,广西贵港 537100【正文语种】中文【中图分类】TN929近年来，互联需求高速增长，NB-IoT应运而生。

2014美赛ICM翻译

2014 ICM ProblemUsing Networks to Measure Influence and Impact One of the techniques to determine influence of academic research is to build and measure properties of citation or co-author networks. Co-authoring a manuscript usually connotes a strong influential connection between researchers. One of the most famous academic co-authors was the 20th-century mathematician Paul Erdös who had over 500co-authors and published over 1400 technical research papers. It is ironic, or perhapsnot, that Erdös is also one of the influencers in building the foundation for the emerging interdisciplinary science of networks, particularly, through his publication with AlfredRényi of the paper “On Random Graphs” in 1959. Erdös’s role as a collaborator was sosignificant in the field of mathematics that mathematicians often measure their closeness to Erdös through analysis of Erdös’s amazingly large and robust co-authornetwork (see the website /enp/ ). The unusual and fascinatingstory of Paul Erdös as a gifted mathematician, talented problem solver, and mastercollaborator is provided in many books and on-line websites(e.g.,/Biographies/Erd os.html). Perhaps his itinerantlifestyle, frequently staying with or residing with his collaborators, and giving much of hismoney to students as prizes for solving problems, enabled his co-authorships to flourishand helped build his astounding network of influence in several areas of mathematics.In order to measure such influence as Erdös produced, there are network-basedevaluation tools that use co-author and citation data to determine impact factor ofresearchers, publications, and journals. Some of these are Science Citation Index, Hfactor,Impact factor, Eigenfactor, etc. Google Scholar is also a good data tool to use fornetwork influence or impact data collection and analysis. Your team’s goal for ICM2014 is to analyze influence and impact in research networks and other areas of society. Your tasks to do this include:1) Build the co-author network of the Erdos1 authors (you can use the file from thewebsitehttps:///users/grossman/enp/Erdos1. html or the one weinclude at Erdos1.htm ). You should build a co-author network of theapproximately 510 researchers from the file Erdos1, who coauthored a paperwith Erdös, but do not include Erdös. This will take some skilled data extractionand modeling efforts to obtain the correct set of nodes (the Erdös coauthors) andtheir links (connections with one another as coauthors). There are over 18,000lines of raw data in Erdos1 file, but many of them will not be used since they arelinks to people outside the Erdos1 network. If necessary, you can limit the size ofyour network to analyze in order to calibrate your influence measurementalgorithm. Once built, analyze the properties of this network. (Again, do notinclude Erdös --- he is the most influential and would be connected to all nodes inthe network. In this case, it’s co-authorship with him that builds the network, buthe is not part of the network or the analysis.)2) Develop influence measure(s) to determine who in this Erdos1 network hassignificant influence within the network. Consider who has published importantworks or connects important researchers within Erdos1. Again, assume Erdös isnot there to play these roles.3) Another type of influence measure might be to compare the significance of aresearch paper by analyzing the important works that follow from its publication.Choose some set of foundational papers in the emerging field of network scienceeither from the attached list (NetSciFoundation.pdf) or papers you discover.Use these papers to analyze and develop a model to determine their relativeinfluence. Build the influence (coauthor or citation) networks and calculateappropriate measures for your analysis. Which of the papers in your set do youconsider is the most influential in network science and why? Is there a similarway to determine the role or influence measure of an individual networkresearcher? Consider how you would measure the role, influence, or impact of aspecific university, department, or a journal in network science? Discussmethodology to develop such measures and the data that would need to becollected.4) Implement your algorithm on a completely different set of network influence data--- for instance, influential songwriters, music bands, performers, movie actors,directors, movies, TV shows, columnists, journalists, newspapers, magazines,novelists, novels, bloggers, tweeters, or any data set you care to analyze. Youmay wish to restrict the network to a specific genre or geographic location orpredetermined size.5) Finally, discuss the science, understanding and utility of modeling influence andimpact within networks. Could individuals, organizations, nations, and society useinfluence methodology to improve relationships, conduct business, and makewise decisions? For instance, at the individual level, describe how you could useyour measures and algorithms to choose who to try to co-author with in order toboost your mathematical influence as rapidly as possible. Or how can you useyour models and results to help decide on a graduate school or thesis advisor toselect for your future academic work?6) Write a report explaining your modeling methodology, your network-basedinfluence and impact measures, and your progress and results for the previousfive tasks. The report must not exceed 20 pages (not including your summarysheet) and should present solid analysis of your network data; strengths,weaknesses, and sensitivity of your methodology; and the power of modelingthese phenomena using network science.*Your submission should consist of a 1 page Summary Sheet and your solution cannotexceed 20 pages for a maximum of 21 pages.This is a listing of possible papers that could be included in a foundational set ofinfluential publications in network science. Network science is a new, emerging, diverse, interdisciplinary field so there is no large, concentrated set of journals that are easy touse to find network papers even though several new journals were recently establishedand new academic programs in network science are beginning to be offered inuniversities throughout the world. You can use some of these papers or others of yourown choice for your team’s set to analyze and compare for influence or impact innetwork science for task #3.Erdös, P. and Rényi, A., On Random Graphs, Publicationes Mathematicae, 6: 290-297,1959.Albert, R. and Barabási, A-L. Statistical mechanics of complex networks. Reviews ofModern Physics, 74:47-97, 2002.Bonacich, P.F., Power and Centrality: A family of measures, Am J. Sociology. 92: 1170-1182, 1987.Barabási, A-L, and Albert, R. Emergence of scaling in random networks. Science, 286:509-512, 1999.Borgatti, S. Identifying sets of key players in a network. Computational andMathematical Organization Theory, 12: 21-34, 2006. Borgatti, S. and Everett, M. Models of core/periphery structures. Social Networks, 21:375-395, October 2000Graham, R. On properties of a well-known graph, or, What is your Ramseynumber? Annals of the New York Academy of Sciences, 328:166-172, June 1979.Kleinberg, J. Navigation in a small world. Nature, 406: 845, 2000.Newman, M. Scientific collaboration networks: II. Shortest paths, weightednetworks, and centrality. Physical Review E, 64:016132, 2001.Newman, M. The structure of scientific collaboration networks. Proc. Natl.Acad. Sci. USA, 98: 404-409, January 2001. Newman, M. The structure and function of complex networks. SIAM Review,45:167-256, 2003.Watts, D. and Dodds, P. Networks, influence, and public opinion formation. Journal ofConsumer Research, 34: 441-458, 2007.Watts, D., Dodds, P., and Newman, M. Identity and search in social networks. Science,296:1302-1305, May 2002.Watts, D. and Strogatz, S. Collective dynamics of `small-world' networks. Nature, 393:440-442, 1998.Snijders, T. Statistical models for social networks. Annual Review of Sociology, 37:131–153, 2011.Valente, T. Social network thresholds in the diffusion of innovations, Social Networks,18: 69-89, 1996.Erdos1, V ersion 2010, October 20, 2010This is a list of the 511 coauthors of Paul Erdos, together with their coauthors listed beneath them. The date of first joint paper with Erdos is given, followed by the number of joint publications (ifit is more than one). An asterisk following the name indicates that this Erdos coauthor is known to be deceased; additional information about the status of Erdos coauthors would be most welcomed. (This convention is not used for those with Erdos number 2, as to do so would involve too much work.) Numbers preceded by carets follow the convention used by Mathematical Reviews in MathSciNet to distinguish people with the same names.Please send corrections and comments to grossman@The Erdos Number Project Web site can be found at the following URL:/enpABBOTT, HARVEY LESLIE 1974Aull, Charles E.Brown, Ezra A.Dierker, Paul F.Exoo, GeoffreyGardner, BenHANSON, DENISHare, Donovan R. Katchalski, MeirLiu, Andy C. F.MEIR, AMRAMMOON, JOHN W.MOSER, LEO*Pareek, Chandra MohanRiddell, JamesSAUER, NORBERT W.SIMMONS, GUSTA VUS J.Smuga-Otto, M. J.SUBBARAO, MA TUKUMALLI VENKATA* Suryanarayana, D.Toft, BjarneWang, Edward Tzu HsiaWilliams, Emlyn R.Zhou, BingACZEL, JANOS D. 1965Abbas, Ali E.Aczel, S.Alsina Catala, ClaudiBaker, John A.Beckenbach, Edwin F.Beda, GyulaBelousov, Valentin DanilovichBenz, WalterBerg, LotharBoros, ZoltanChudziak, JacekDaroczy, ZoltanDhombres, Jean G.Djokovic, Dragomir Z.Egervary, Jeno2014 ICM问题使用网络来测量的影响和冲击其中一项技术来确定学术研究的影响力是建立和测量引文或合著者网络的性能。

单片机论文5000字

单片机论文5000字篇一：AT89S52单片机毕业论文中英文5000字翻译中英文资料翻译题目The Description of MCU系别中德机电学院专业机电一体化技术班级机电1002班学生姓名刘兆华学号 100101239 指导教师赵振荣20xx年12月英文原文资料：The Description of MCUMCU DescriptionSCM is also known as micro-controller (Microcontroller Unit), commonly used letters of the acronym MCU MCU that it was first used in industrial control. Only a single chip by the CPU chip developed from a dedicated processor. The first design is by a large number of peripherals and CPU on a chip in the computer system, smaller, more easily integrated into a complex and demanding on the volume control device which. INTEL’s Z80 is the first designed in accordance with this idea processor, then on the development of microcontroller and dedicated processors have parted ways.Are 8-bit microcontroller early or 4 bits. One of the most successful is the INTEL 8031, for a simple, reliable and good performance was a lot of praise. Then developed in 8031 out of MCS51 MCU Systems. SCM systems based on this system until now is still widely used. With the increased requirements of industrial control field, began a 16-bit microcontroller, because the cost is not satisfactory but have not been very widely used. After 90 years with the great development of consumer electronics, microcontroller technology has been a huge increase. With INTEL i960 series, especially the later series of widely used ARM, 32-bit microcontroller quickly replace high-end 16-bit MCU status and enter themainstream market. The traditional 8-bit microcontroller performance have been the rapid increase capacity increase compared to 80 the number of times. Currently, high-end 32-bit microcontroller clocked over 300MHz, the performance catching the mid-90’s dedica ted processor, while the average model prices fall to one U.S. dollars, the most high-end [1] model only 10 dollars. Modern SCM systems are no longer only in the development and use of bare metal environment, a large number of proprietary embedded operating system is widely used in the full range of SCM. The handheld computers and cell phones as the core processing of high-end microcontroller can even use a dedicated Windows and Linux operating systems.SCM is more suitable than the specific processor used in embedded systems, so it was up to the application. In fact the number of SCM is the world’s largest computer. Modern human life used in almost every piece of electronic and mechanical products will be integrated single chip. Phone, telephone, calculator, home appliances, electronictoys, handheld computers and computer accessories such as a mouse with a 1-2 in both the Department of SCM. Personal computer will have a large number of SCM in the work. General car with more than 40 SCM, complex industrial control systems may even have hundreds of SCM in the same time work! SCM is not only far exceeds the number of PC and other computing the sum, or even more than the number of human beingsSingle chip, also known as single-chip microcontroller, it is not complete a certain logic chips, but to a computer system integrated into a chip. Equivalent to a micro-computer, and computer than just the lack of a microcontroller I / O devices. General talk: a chip becomes a computer. Its small size, light weight, cheap, for the study, application and development of facilities provided. At the same time, learning to use the MCU is to understand the principle and structure of the computer the bestchoice.SCM and the computer functions internally with similar modules, such as CPU, memory, parallel bus, the same effect as well, and hard disk memory devices, and different is its performance of these components were relatively weak many of our home computer, but the price is low , usually not more than 10 yuan you can do with it ...... some control for a class is not very complicated electrical work is enough of. We are using automatic drum washing machine, smoke hood, VCD and so on appliances which could see its shadow! ...... It is primarily as a control section of the core componentsIt is an online real-time control computer, control-line is that the scene is needed is a stronger anti-jamming ability, low cost, and this is, and off-line computer (such as home PC), the main difference.Single chipMCU is through running, and can be modified. Through different procedures to achieve different functions, in particular special unique features, this is another device much effort needs to be done, some great efforts are very difficult to do. A not v ery complex functions if the 50’s with the United States developed 74 series, or the 60’s CD4000 series of these pure hardware buttoned, then the circuit must be a large PCB board! But if the United States if the 70’s with a series of successful SCM market, the result will be a drastic change! Just because you are prepared by microcomputer programs can achieve high intelligence, high efficiency and high reliability!As the microcontroller on the cost-sensitive, so now the dominant software or thelowest level assembly language, which is the lowest level in addition to more than binary machine code language, and as so low why is the use? Many high-level language has reached the level of visual programming Whyis not it? The reason is simply that there is no home computer as a single chip CPU, not as hard as a mass storage device. A visualization of small high-level language program which even if only one button, will reach tens of K of size! For the home PC’s hard drive in terms of nothing, but in terms of the MCU is not acceptable. SCM in the utilization of hardware resources to be very high for the job so although the original is still in the compilation of a lot of use. The same token, if the giant computer operating system and applications run up to get home PC, home PC, also can not afford to.Can be said that the twentieth century across the three “power” era, that is, the age of electricity, the electronic age and has entered into the computer age. However, this computer, usually refers to the personal computer, referred to as PC. It consists of the host, keyboard, monitor and other components. Another type of computer, most people do not know how. This computer is to give all kinds of intelligent machines single chip (also known as micro-controller). As the name suggests, this computer system took only a minimal integrated circuit, can be a simple operation and control. Because it is small, usually hidden in the charged mechanical “stomach” in. It is in the device, like the human brain plays a role, it goes wrong, the whole plant was paralyzed. Now, this microcontroller has a very broad field of use, such as smart meters, real-time industrial control, communications equipment, navigation systems, and household appliances. Once all kinds of products were using SCM, can serve to upgrade the effectiveness of products, often in the product name preceded by the adjective - “intelligent,” such as intelligent washing machines. Now some technical personnel of factories or other amateur electronics developers to engage in out of certain products, not the circuit is too complicated, that function is too simple and can easily be copied. The reason may be stuck in the product did notuse a microcontroller or other programmable logic device.SCM historySCM was born in the late 20th century, 70, experienced SCM, MCU, SoC three stages.First model1.SCM the single chip microcomputer (Single Chip Microcomputer) stage, mainly seeking the best of the best single form of embedded systems archi tecture. “Innovation model” success, laying the SCM and general computer completely different path ofdevelopment. In the open road of independent development of embedded systems, Intel Corporation contributed.2.MCU the micro-controller (Micro Controller Unit) stage, the main direction of technology development: expanding to meet the embedded applications, the target system requirements for the various peripheral circuits and interface circuits, highlight the object of intelligent control. It involves the areas associated with the object system, therefore, the development of MCU’s responsibility inevitably falls on electrical, electronics manufacturers. From this point of view, Intel faded MCU development has its objective factors. In the development of MCU, the most famous manufacturers as the number of Philips Corporation. Philips company in embedded applications, its great advantage, the MCS-51 single-chip micro-computer from the rapid development of the micro-controller. Therefore, when we look back at the path of development of embedded systems, do not forget Intel and Philips in History.Embedded SystemsEmbedded system microcontroller is an independent development path, the MCU important factor in the development stage, is seeking applications to maximize the solution on the chip; Therefore, the development of dedicated single chip SoC trend of the natural form. As themicroelectronics, IC design, EDA tools development, application system based on MCU SoC design have greater development. Therefore, the understanding of the microcontroller chip microcomputer can be, extended to the single-chip micro-controller applications.MCU applicationsSCM now permeate all areas of our lives, which is almost difficult to find traces of the field without SCM. Missile navigation equipment, aircraft, all types of instrument control, computer network communications and data transmission, industrial automation, real-time process control and data processing, extensive use of various smart IC card, civilian luxury car security system, video recorder, camera, fully automatic washing machine control, and program-controlled toys, electronic pet, etc., which are inseparable from the microcontroller. Not to mention the area of robot control, intelligent instruments, medical equipment was. Therefore, the MCU learning, development and application of the large number of computer applications and intelligent control of the scientists, engineers.篇二：单片机毕业论文专科毕业设计（论文）题目基于51单片机的可调数码日历钟的设计与制作院（系部）电子与信息工程系专业名称年级班级学生姓名指导教师摘要单片机以其体积小、编程灵活、控制功能强大、价格低廉等特点被广泛应用在各种电子电器产品中。

单片机英文参考文献

单片机英文参考文献篇一：5-单片机+外文文献+英文文献+外文翻译中英对照AT89C51的介绍（原文出处：http：///resource/）描述AT89C51是一个低电压，高性能CMOS8位单片机带有4K字节的可反复擦写的程序存储器（PENROM）。

和128字节的存取数据存储器（RAM），这种器件采用ATMEL公司的高密度、不容易丢失存储技术生产，并且能够与MCS-51系列的单片机兼容。

片内含有8位中央处理器和闪烁存储单元，有较强的功能的AT89C51单片机能够被应用到控制领域中。

功能特性AT89C51提供以下的功能标准：4K字节闪烁存储器，128字节随机存取数据存储器，32个I/O口，2个16位定时/计数器，1个5向量两级中断结构，1个串行通信口，片内震荡器和时钟电路。

另外，AT89C51还可以进行0HZ的静态逻辑操作，并支持两种软件的节电模式。

闲散方式停止中央处理器的工作，能够允许随机存取数据存储器、定时/计数器、串行通信口及中断系统继续工作。

掉电方式保存随机存取数据存储器中的内容，但震荡器停止工作并禁止其它所有部件的工作直到下一个复位。

引脚描述VCC：电源电压 GND：地 P0口：P0口是一组8位漏极开路双向I/O口，即地址/数据总线复用口。

作为输出口时，每一个管脚都能够驱动8个TTL电路。

当“1”被写入P0口时，每个管脚都能够作为高阻抗输入端。

P0口还能够在访问外部数据存储器或程序存储器时，转换地址和数据总线复用，并在这时激活内部的上拉电阻。

P0口在闪烁编程时，P0口接收指令，在程序校验时，输出指令，需要接电阻。

沈阳航空工业学院电子工程系毕业设计（外文翻译）P1口：P1口一个带内部上拉电阻的8位双向I/O口，P1的输出缓冲级可驱动4个TTL电路。

对端口写“1”，通过内部的电阻把端口拉到高电平，此时可作为输入口。

因为内部有电阻，某个引脚被外部信号拉低时输出一个电流。

闪烁编程时和程序校验时，P1口接收低8位地址。

Integrated-circuit

Integrated circuitIn electronics，an integrated circuit （also known as IC, microcircuit, microchip, silicon chip, or chip）is a miniaturized electronic circuit (consisting mainly of semiconductor devices, as well as passive components) that has been manufactured in the surface of a thin substrate of semiconductor material。

Integrated circuits are used in almost all electronic equipment in use today and have revolutionized the world of electronics.Integrated circuits were made possible by experimental discoveries which showed that semiconductor devices could perform the functions of vacuum tubes，and by mid—20th—century technology advancements in semiconductor device fabrication。

The integration of large numbers of tiny transistors into a small chip was an enormous improvement over the manual assembly of circuits using electronic components. The integrated circuit's mass production capability，reliability, and building—block approach to circuit design ensured the rapid adoption of standardized ICs in place of designs using discrete transistors。

基于AT89C51单片机《医院输液监控系统》医院基于监控基于单片机输液系统

引言静脉输液是临床医疗工作中常用的辅助治疗手段，在我国临床应用非常广泛，是一种利用液体静压原理使液体下滴，经静脉输入大量无菌溶液或药物的治疗方法。

在进行静脉输液的过程中，需要根据输注的药物和患者的病情对输液进度进行实时监控。

目前，普遍采用人工方式进行监控，对病人来说，存在很多潜在的危险。

当输液瓶中的药液输完或药液发生堵塞时，医护人员若未能及时处理，就会发生回血或其他危险，给病人造成痛苦甚至发生医疗事故。

目前，国家在医疗体制改革和医学模式转变过程中，静脉输液在医疗中占有重要的地位。

针对现有静脉输液中存在的问题，采用光电检测、单片机和通信技术，设计了输液自动监控装置，它能够轻松地实现对液体滴速的检测显示与控制，当输液液体低于设定位置时的声光报警，并通过串行口与主机相连，实现远程集中控制功能。

该装置的使用在增加输液安全性的同时也减少了医护人员的劳动。

摘要针对目前我国大部分医院在对病人进行静脉输液治疗是医护人员监护任务繁重的问题，设计了一套面向所有大中小医院和诊所的医院输液监控系统。

本系统以PC为上位机作为整个系统的控制监控中心，用单片机AT89C51为核心作为下位机通过光电传感器对吊瓶的液位进行检测及报警，并对滴速进行精确地检测与控制。

上位机与下位机用RS485总线进行串行通信，能够使医护人员实时了解输液状态。

论述了该系统的检测原理、总体结构、主要功能部件设计和软硬件系统的组成。

该系统低功耗、成本低、性能稳定、便于携带、实用性强。

关键词：输液监控、AT89C51、串行通信、RS485AbstractAiming at the heavy problem of nurses in most of our hospitals when carry o n transfusion to the patients currently and then designed a set of system which is called fluid infusion supervision system .It is faced to all the hospitals and clinic. This system take the PC as it’s master machine. The PC is the controler of the whole s ystem. Take the single chip AT89C51 as a core of the next machine which will test and display the level of the liquid bottle. It can examine and control the speed of lose a liquid accurately. PC communicate with single chip by the total line of RS485.It can make the nurses know the status of loses liquid while patients take the personnel solid. Discussed the constituting of examination principle, total structure and main function parts design and the constitution of software and hardware system. The system is low achievement consumes, low cost and stable function and easy to take, the function is strong.Keywords: Supervision of transfusion;AT89C51; signal communication;RS485第1章绪论1.1 选题背景及依据静脉输液治疗是临床医疗工作中常用的治疗手段，但目前大多数医院及医疗机构都没有实现输液的自动监控管理，从而在输液过程中，当输液完成需要换药时，需要医务人员发现及时，否则就会出现空气进入血管内形成空气栓赛，凝血堵塞针头等情况，轻则延误治疗，重则会危及病人生命安全，发生医疗事故。

流水灯毕业设计论文

流水灯毕业设计论文【篇一：毕业论文(设计)流水灯】毕业论文(设计)课题名称：基于mcs-51流水灯设计作者：周治雄学号： 1105050105 系别：信息工程系专业：制冷与空调技术班级：应用电子一班指导教师：汤泽容专业技术职务：2014 年 6 月重庆.涪陵摘要：当今时代是一个新技术层出不穷的时代，在电子领域尤其是自动化智能控制领域，传统的分立元件或数字逻辑电路构成的控制系统，正以前所未见的速度被单片机智能控制系统所取代。

单片机具有体积小、功能强、成本低、应用面广等优点，可以说，智能控制与自动控制的核心就是单片机。

关键词：led 单片机控制系统流水灯目录1 设计概述 (4)1.1 设计任务 (4)1.2 设备器材 (4)2 硬件设计方案 (4)2.1 设计思想 (4)2.2 硬件选择………………………………………………………………5 2.3at89c51单片机介绍..................................................................5 2.4 硬件逻辑图.....................................................................8 2.5 设计连线 (9)2.6 仿真电路图 (9)3 软件设计方案 (9)3.1 软件设计思想…………………………………………………………………9 3.2 软件设计思想………………………………………………………………10 3.3 程序流程图 (12)4 调试及运行结果……………………………………………135 设计心得与体会...................................................13 参考资料 (14)1 设计概述1.1 设计任务设计内容：利用汇编语言（或c语言），实现8个单色led灯的左、右循环显示，并实现循环的速度可调。

程控放大器

陕西电子科技学院
本科毕业论文（设计）题Fra bibliotek目程控增益放大器的设计
（中、英文)
The Design of programmable gain amplifier
作者姓名专业名称学科门类指导老师提交论文日期成绩等级评定
高亚丽电子信息科学与技术理学余建权二〇一六年五月
Key words:
control ;
gain programmable; Operational amplifier; feedback network; auto
II
目录
摘要.......................................................................................................................................................... I ABSTRACT.............................................................................................................................................II 目录.......................................................................................................................................................III 1 引言.......................................

毕业设计-基于AT89C51单片机的电子密码锁的设计

毕业设计（论文）题目：电子密码锁的设计学院：电气与信息工程学院专业：电子信息工程姓名：学号： ********* 指导老师：**完成时间： 2013年5月28日摘要随着经济社会发展，人们生活水平的提高，如何实现家庭防盗这一问题也变的尤其的突出。

传统的机械锁，由于其构造简单，安全性能低，无法满足人们的需要。

随着电子产品向智能化和微型化的不断发展，数字密码锁作为防盗卫士的作用显得尤为重要。

而单片机以其实用，功能强大，价格低廉等功能，已成为电子产品研制和开发中首选的控制器。

本文从经济实用的角度出发,阐述一个基于单片机的液晶显示电子密码锁的设计与实现。

系统采用ATMEL公司的AT89C51单片机作为系统核心，液晶显示器LCD1602作为输出设备显示系统提示信息，4*4矩阵键盘作为输入设备，CMOS串行E2PROM存储器AT24C02作为数据存储器，配合蜂鸣器、继电器等电路构成整个系统硬件；系统软件采用C语言编写。

设计的系统液晶显示，密码修改方便，具有报警、锁定等功能，使用便捷简单，符合住宅、办公用锁需求，具有一定的实用价值。

关键词：单片机，密码锁，AT89C51，LCD1602，AT24C02AbstractWith the development of our society and the i mprovement of people’s living standard, how to ensure the family security is becoming more and more important in particular. Traditional mechanical lock is unable to meet the need of us because of its simple structure and low security. Nowadays, electronic products become smarter and smaller, electronic password anti-theft lock plays a more important role as the security guards. The MCU with its practical, strong function, low price and other functions , has become the preferred controller in electronic product research and development.This article is written from the economic perspective, elaborates the design and implementation of a LCD electronic password anti-theft lock which is based on MCU. This system is composed of AT89C51 which is designed as the core of this system, LCD1602 as the output device to display the message of this system, 4 * 4 matrix keyboard as the input device, a CMOS serial E2PROM AT24C02 as the data storage, and a buzzer, relay circuit.The software of the system is written in C language. The system displays in a LCD, it can change password easily, and has the function of alarming, locking, and so on. This system has some practical value, and it is simple and easy to use, meets the demand of residential and the need of office lock.Key Words: MCU, Password-Lock, AT89C51, LCD1602, AT24C02目录摘要 (I)Abstract ............................................................................................................................. I I 目录 ................................................................................................................................. I II 1引言 . (1)1.1课题的背景和意义 (1)1.2课题的研究现状 (1)1.3课题研究内容 (2)2 数字密码锁总体设计 (3)2.1 系统方案论证 (3)2.1.1 采用数字电路的设计方案 (3)2.1.2 采用以单片机为核心设计方案 (4)2.2 基于单片机的数字密码锁的设计原理 (5)3 系统硬件设计 (6)3.1 主要元器件介绍 (6)3.1.1 主控芯片AT89C51的的介绍 (6)3.1.2 继电器的介绍 (9)3.1.3 存储芯片AT24C02的介绍 (10)3.1.4 LCD1602显示器的介绍 (10)3.1.5 矩阵键盘模块的介绍 (11)3.2 系统硬件部分 (12)3.2.1 系统电源部分 (12)3.2.2 键盘输入部分 (13)3.2.3 密码存储部分 (14)3.2.4 显示部分 (14)3.2.5 报警部分 (15)3.2.6开锁部分 (16)4 系统软件设计 (17)4.1 系统程序流程图 (17)4.1.1主程序流程图 (17)4.1.2 键功能程序流程图 (18)4.1.3 修改密码程序流程图 (19)4.1.4 开锁程序流程图 (20)4.2 子程序举例 (21)4.2.1 按键扫描子程序 (21)4.2.2 显示子程序 (22)4.2.3 开锁子程序 (22)4.3 系统软件调试及结果 (24)4.3.1 Proteus软件介绍 (24)4.3.2 系统软件调试 (25)4.3.3 仿真结果 (25)5 硬件系统制作及调试 (29)5.1焊接注意事项 (29)5.2硬件调试问题及解决办法 (30)5.3硬件调试效果 (31)总结 (34)致谢 (35)参考文献 (36)附录 (37)附录A 电路原理图 (37)附录B 系统总体程序 (38)1引言1.1课题的背景和意义随着人们生活水平的提高，如何实现家庭防盗这一问题也变的尤为突出，传统的机械锁由于其构造简单，被撬的事件屡见不鲜。

Structure and Function

a rXiv:q uant-ph/96914v118Se p1996”Structure and function”1Giuseppe Vitiello Dipartimento di Fisica Universit`a di Salerno,84100Salerno,Italy vitiello@vaxsa.csied.unisa.it Abstract I discuss the role of quantum dynamics in brain and living matter physics.The paper is presented in the form of a letter to Patricia S.Churchland.Dear Patricia,after your talk in Tucson I said to myself:”I must meet Patricia Churchland and discuss with her on the role of Quantum Mechanics (QM)and quantum formalisms in Consciousness studies”.However,the Conference was very dense,you very busy and I was ”not so sure...”from where to start discussing with you.So,at the end I decided to write you a letter.In your talk,which I enjoyed a lot,you were keeping saying ”I am not so sure...”,”I am not so sure...”.You explained very well why one should have real doubts about ”hard”(and easy!)problems (on which I will not say anything in this letter)and especially about using QM in the study of Consciousness.From what you were saying I realized that you were completely right:”if”QM is what you were referring to,and ”if”its use and purpose are the ones you were saying,”then”your doubts are really sound and,even more,I conﬁrm to you that QM is completely useless in Consciousness studies;the popular expression:”a mystery cannot solve another mystery”would be the ﬁtting one.However,as a physicist I want to tell you that one should not talk much ”about”QM.Physicists,and other scientists as chemists,engineers,etc.,”use”QM in a large number of practical applications in solid state physics, electronics,chemistry,etc.with extraordinary success:it is an undeniable fact that our every day(real!)life strongly depends on those successful applications of QM;everything is around us(including ourselves!)is made of atoms and the Periodic Table of the Elements is clearly understood in terms of QM(recall,e.g.,the Pauli Principle in building up electronic shells in the atoms).QM is not a mystery,from this perspective.The photoelectric cell of our elevator or our CD or computer have nothing counter-intuitive. Of course,I am not saying that the success of QM by itself justiﬁes the use of QM in Consciousness studies.I will come back to this point later on.What I want to stress here is that QM is NOT the OBJECT of our discussion!There are certainly many open problems in the interpretation of certain aspects of QM which are of great epistemological and philosophical interest.However,these problems absolutely do not interfere or diminish the great successes of QM in practical applications.It is certainly interesting to study these interpretative problems,BUT they are NOT the object of our present discussion.And,please notice that here I am not defending QM,since as I have clearly stated many times in my papers,QM does not provide the proper mathematical formalism for the study of living matter physics.The proper mathematical formalism in such a study turns out to be indeed the one of Quantum Field Theory(QFT).But this is a too strong statement at this moment of our discussion.Let me go by small steps,instead.I must confess to you that I am not prepared to take as the object of our discussion how to approach to the study of Consciousness.As a physicist,I would better start by considering some more”material”object,as the brain itself or more generally living matter,for example the cell.Here I need to explain better myself since the word”material”may be misleading.In Physics it is not enough to search what things are”made of”.Listing elementary”components”is a crucial step,but it is only one step.We want to know not only what things are made of but ALSO”how all of it works”:we are interested in the Dynamics.In short,fancy words:we are interested”in structures AND in functions”;and we physicists are attached to ourﬁxations in a so narcissistic way that we even mix up structure and function up to the point that we do not anymore make a sharp distinction between them. So,to us,having a detailed list of components does not mean to know much about the system under study.Moreover,it is not even possible to make a2”complete”list of components without knowing how they work all together in the system.The same concept of component is meaningless outside a ”dynamical”knowledge of the system.Thus when I say”material”I refer also to dynamical laws,not only to the mere collection of components.After all,what I am saying is quite simple:everybody agrees indeed that studying the Tucson phone book does not mean to know the city of Tucson. Let me give one more speciﬁc physical example:the crystal.As well known,when some kind of atoms(or molecules)sit in some lattice sites we have a crystal.The lattice is a speciﬁc geometric arrangement with a characteristic length(I am thinking of a very simple situation which is enough for what I want to say).A crystal may be broken in many ways,say by melting it at high temperature.Once the crystal is broken,one is left with the constituent atoms.So the atoms may be in the crystal phase or, e.g.after melting,in the gaseous phase.We can think of these phases as the functions of our structure(the atoms):the crystal function,the gaseous function.In the crystal phase one may experimentally study the scattering of,say,neutrons on phonons.Phonons are the quanta of the elastic waves propagating in the crystal.They are true particles living in the crystal.We observe them indeed in the scattering with neutrons.As matter of fact,for the complementarity principle,they are the same thing as the elastic waves: they propagate over the whole system as the elastic waves do(for this reason they are also called collective modes).The phonons(or the elastic waves)are in fact the messengers exchanged by the atoms and are responsible for holding the atoms in their lattice sites.Therefore the list of the crystal components includes not only the atoms but also the phonons.Including only the atoms our list is not complete!However,when you destroy the crystal you do notﬁnd the phonons!They disappear!On the other hand,if you want to reconstruct your crystal after you have broken it,the atoms you were left with are not enough:you must supplement the information which tells them to sit in the special lattice you want(cubic or else,etc.).You need,in short, to supplement the ordering information which was lost when the crystal was destroyed.Exactly such an ordering information is”dynamically”realized in the phonon particles.Thus,the phonon particle only exists(but really exists!)as long as the crystal exists,and vice versa.The function of being crystal is identiﬁed with the particle structure!As you see there is a lot in the quantum theory of matter and please notice:the description of crystal in terms of phonons has nothing to do with”interpretative problems”.It is3a well understood,experimentally well tested physical description.Such a situation happens many times in physics;other familiar examples are ferromagnets,superconductors,etc..It is a general feature occurring when the symmetry of the dynamics is not the symmetry of the states of the system(symmetry is spontaneously broken,technically speaking).Let me explain what this means.Consider the crystal as an example:the symmetry of the dynamics is the continuous space translational symmetry(the atoms may move around occupying any position in the available space).In the crystal state however such a symmetry is lost(broken)since the atoms must get ordered in the lattice sites;they cannot sit,e.g.,in between two lattice corners:order is lack of symmetry!A general theorem states that when a continuous symmetry is spontaneously broken,or equivalently,as we have just seen,an ordered pattern is generated,a massless particle is dynamically created;this particle(called the Nambu-Goldstone boson)is the phonon in the crystal case.Please,notice that this particle is massless,which means that it can span the whole system volume without inertia,which in turn guaranties that the ordering information is carried around without losses and that the ordered pattern is a stable one since the presence(or,as we say,the condensation)of the Goldstone particles of lowest momentum does not add energy to the state(it is enough to consider the lowest energy state,namely the ground state);in conclusion,the ordered ground state has the same energy of the symmetric(unordered)one(we call it normal ground state): they are degenerate states.This is why the crystal does exist as a stable phase of the matter.Actually,ground states,and therefore the phases the system may assume,are classiﬁed by their ordering degree(the order parameter) which depends on the condensate density of Goldstone quanta.We thus see that by tuning the condensate density(e.g.by changing the temperature) the system may be driven through the phases it can assume.Since the system phases are macroscopically characterized(the order parameter is in fact a macroscopic observable),we see that a bridge between the microscopic quantum scale and the macroscopic scale is established.All the above is of course possible only if the mathematical formalism provides us with many degenerate but physically inequivalent ground states which we need to represent the system phases,which in fact have diﬀerent physical properties:this is why we have to use QFT and not QM,as I said above.In QM all the possible ground states are physically equivalent(the Von Neuman Theorem);QFT is on the contrary much richer,it is equipped4with inﬁnitely many,physically inequivalent ground states and therefore we must use QFT to study systems with many phases.Above I have been mentioning”theorems”:however,I want to stress that these mathematical theorems perfectlyﬁt and areﬁtted by real experiments and they represent the only available quantum theory(QFT indeed)on which the reliable working of any sort of technological gadget around us is based; in spite of the many epistemological and philosophical unsolved questions quantum theories may arise.Now you see why I said that I need to start by considering actual material: this is not simply a list of constituents,it is not simply speciﬁc information from punctual observations,it is not simply a lot of real data and statistics, but it is also the dynamics.Otherwise,I would only be like one of those extremely patient and skillful swiss watch-makers who in the past centuries by mechanically assembling together a lot of wheels and levers and hooks were building beautiful puppets able to simulate many human movements. But...the phone book is not enough and we know that it CANNOT even be complete without the dynamics.There is no hope to build up a crystal without the long range correlations mediated by the phonons:if you try toﬁx up atom by atom in their lattice sites holding them by hooks you will never get the coherent orchestra of vibrating atoms playing the crystal function. This is what experiments tell us.For every new or more reﬁned movement more and more specialized units and wheels were needed in building the eighteenth century puppets.And certainly the brain,and living matter in general,do present a lot of very specialized units,which we absolutely need to search for.But our list of components will still possibly be incomplete if we do not make the eﬀort of thinking of a dynamical scheme,too.There are properties of living matter, such as self-ordering,far from the equilibrium behaviour,non-dissipative energy transfer on protein molecular chains and at the same time dissipativity of biological systems,extremely high chemical eﬃciency and at the same time extremely high number of chemical species,and so on,that do point to the existence of a non-trivial dynamical background out of which the rich phenomenology of molecular biology emerges.Like with chemistry before the birth of QM,we are challenged to search for a unifying dynamical scheme, which may help us in understanding those(collective)properties not in the reach of the assembly by”hooks”of the units listed in our phone book.The problem is not why to expect a quantum dynamical level in living5matter(and in the brain).In its”inert(or dead!)phase”the matter counts among its components atoms,molecules and,as we have seen,other units dynamically generated(e.g.the phonon),all of them ruled by quantum laws. It would be a really crazy world the one where the same atoms,molecules and dynamically generated units would not be ruled by the same quantum laws in the”living phase”of matter.Sometime people gets confused between”classical level”and”quantum level”.We do speak about”classical limit”of quantum physics,but we NEVER mean that,e.g.,the Planck constant”becomes”(or”goes”to)zero in the classical limit(even when,for sloppiness,we do say that;sorry!). The Planck constant has a well deﬁnite value which NEVER is zero!By ”classical”we only mean that certain properties of the system are acceptably well described,from the observational point of view,”in the approximation”in which certain ratios between the Planck constant and some other quantity (of the same physical dimensions)are neglected.This does not mean that in such a case one”puts”the Planck constant equal to zero,because there are other behaviours,which the same system shows simultaneously to the ”classical”ones,which only can be described by keeping the non-zero value of the Planck constant in its full glory.An example:our friend the crystal does certainly behaves as a classical object in many respects,out of any possible doubt.However,the phonon IS a quantum particle and therefore the macroscopic function of being a crystal IS a quantum feature of our system; not only,but it is indeed such a quantum behaviour,the one of being a crystal,that allows the”classical”behaviour of the components atoms as a ”whole”.Therefore,a diamond is a macroscopic quantum system classically behaving when one gives it as a gift to his/herﬁance’(and let’s hope they will not argue about the phonon,the Schroedinger cat,their love being classical or quantum and all that;it would be not at all romantic!).In the same way,systemic features of living matter,such as ordered patterns,sequentially interlocked chemical reactions,non-dissipative energy transfer,nonlocal simultaneous response to external stimuli,etc.,may re-sult as macroscopic quantum features supporting the rich phenomenology of molecular biology:the idea,in the QFT approach to living matter,is to supplement with a basic dynamics the phenomenological random kinematics of biochemistry.So the problem is not”if”there exist a quantum dynamics in living matter (how it could not exist!),but which are its observable manifestations,if any,6and in any case how the biochemistry as it is emerges from it.Of course, it is more and more urgent the need to know all what we can know about the components,their kinematics,their engineering;we need working models to solve immediate problems(ﬂoating boats were used well before knowing Archimede’s law);we even need patient assembly of cells by hooks to form a tissue,but we cannot cry at sky if a cancer develops:from the hook strategy point of view only random kinematics and no dynamics is involved in tissue formation and as a consequence there is no reason why the same list of component cells should behave as a tissue instead of as a cancer.Sometime also the eighteenth century puppets were falling down in pieces.Therefore,it might be worthwhile to apply what we have learned about collective modes holding up atoms in the lattice sites(the crystal is a”tissue”!),spontaneous symmetry breakdown,coherence,boson condensation,etc.,to study,together with biochemists and biologists,e.g.,the”normal”(or symmetric)state of cancer and the ordered state of tissue,as we would say in QFT language.The task is not at all simple.Living matter is not an inert crystal.And we should expect many surprises.For example in the quantum model of the brain by Umezawa and Ricciardi the problem of memory capacity seems to be solved by seriously considering the dissipative character of the brain system. That dissipation enters into play can be naively understood by observing that information recording breaks the symmetry under time reversal,i.e.it introduces the arrow of time:”NOW you know it...!”is the warning to mean that”after”having received some information,one cannot anymore behave as”before”receiving it.Thus memorizing breaks time reversal symmetry. The brain dynamics is therefore intrinsically irreversible.In more familiar words,the brain,as other biological systems,has a history.In this respect the brain is a clock.Well,to treat dissipative brain dynamics in QFT one has to introduce the time-reversed image of the system degrees of freedom. Oneﬁnds thus himself dealing with a system made by the brain and by its”mirror in time”image,as a result of the internal consistency of the mathematical scheme(if you want to know more about that look at my paper in Int.Journal of Mod.Phys.B9(1995)973).Problem:are consciousness mechanisms macroscopic manifestations of the mirror brain dynamics?Does the conscious experience of theﬂow of time emerges from the brain dissipative dynamics?The mirror modes are related to brain-environment coupling and at the same time to brain self-interaction.Does this lead to the conscious sense of”self”?7I realize this is a long letter and I will not talk any longer about brain and living matter,consciousness and QFT.I stop here,otherwise the Editors of the book on Tucson II will complain for the exceeding number of words and I risk to be left out as it was for Tucson I book.I hope we can resume our discussion in a future occasion in order to be able to join our eﬀorts in the study of the brain.Arrivederci a presto,GiuseppeP.S.I thank you for allowing me to publish this letter.G.8。

单片机毕业设计(论文)外文资料翻译---51系列单片机的结构和功能

毕业设计(论文)外文资料翻译系：电光系专业：电子科学与技术姓名：学号： 080403136外文出处：Structure and function of(用外文写)the MCS-51 series 附件： 1.外文资料翻译译文；2.外文原文。

指导教师评语：签名：年月日注：请将该封面与附件装订成册。

附件1：外文资料翻译译文51系列单片机的结构和功能51系列单片机是英特尔公司生产的具有一定结构和功能的单片机产品。

这家公司在1976年引入8位MCS - 48系列单片机后，于1980年又推出了8位高档的MCS - 51系列单片机。

它包含很多种这类型的单片机，如8051，8031，8751，80C51BH，80C31BH等，它们的基本组成，基本性能和指令系统都是一样的。

一般情况习惯用8051来代表51系列单片机。

早期的单片机都是8位或4位的。

其中最成功的是INTEL的8031，因为简单可靠而性能不错获得了很大的好评。

此后在8031上发展出了MCS51系列单片机系统。

基于这一系统的单片机系统直到现在还在广泛使用。

随着工业控制领域要求的提高，开始出现了16位单片机，但因为性价比不理想并未得到很广泛的应用。

90年代后随着消费电子产品大发展，单片机技术得到了巨大提高。

随着INTEL i960系列特别是后来的ARM系列的广泛应用，32位单片机迅速取代16位单片机的高端地位，并且进入主流市场。

而传统的8位单片机的性能也得到了飞速提高，处理能力比起80年代提高了数百倍。

目前，高端的32位单片机主频已经超过300MHz，性能直追90年代中期的专用处理器，而普通的型号出厂价格跌落至1美元，最高端的型号也只有10美元。

当代单片机系统已经不再只在裸机环境下开发和使用，大量专用的嵌入式操作系统被广泛应用在全系列的单片机上。

而在作为掌上电脑和手机核心处理的高端单片机甚至可以直接使用专用的Windows和Linux操作系统。

单片机比专用处理器更适合应用于嵌入式系统，因此它得到了最多的应用。

单片机红外遥控外文翻译

Infrared Remote And Chips Are IntroducedPeople's eyes can see the visible wavelength from long to short according to the arrangement, in order to red, orange, yellow, green, green, blue, violet. One of the red wavelengths for 0.62 ~ 0.76 mount, Purple is 0.38 wavelength range ~ mount. Purple is shorter than the wavelength of light called ultraviolet ray, red wavelengths of light is longer than that of infrared light. Infrared remote control is to use wavelength for 0.76 ~ 1.5 mount between the near infrared to transfer control signal.Commonly used infrared remote control system of general points transmit and receive two parts. The main component part for the launch of infrared light emitting diode. It is actually a special light emitting diode, due to its internal material differs from ordinary light emitting diode, resulting in its ends on certain voltage, it is a rather infrared light. Use of infrared light emitting diode the infrared wavelengths, for 940nm appearance and ordinary, just the same light emitting diode five different colors. Infrared light emitting diode generally have black and blue, transparent three colors. Judgment of infrared light emitting diode and judgment method, using a millimeter to ordinary diode electric block measure of infrared light emitting diode, reverse resistance. The infrared light emitting diode luminescence efficiency to use special instrument to measure precise, and use only spare conditions to pull away from roughly judgment. Receiving partof infrared receiving tube is a photosensitive diode.In actual application of it receiving diode to reverse bias, it can work normally, i.e., the infrared receiving circuit application in diode is used to reverse, higher sensitivity. Infrared receiving diode usually have two round and rectangular. Due to the power of infrared light emitting diode (or less commonly 100mW), so ir receiving diode received signals is weak, so will increase high-gain ones.the amplifier circuit.In common CX20106A, etc. PC1373H moon infrared receiving special amplifier circuit. In recent years both amateur or formal products, mostly using infrared receiving head finished. The head of infrared receiving product packages generally has two kinds: one kind USES sheet shielding, A kind of plastic packaging. There are three pin, namely the power is (VDD), power negative (GND) and data output (VO or OUT). Infrared receiving head foot arrangement for types varied, manufacturer's instructions. Finished the advantages of infrared receiving head is not in need of sophisticated debugging and shell screen, use rise as a transistor, very convenient. But when used in the infrared receiving attention finished first carrier frequency.Infrared remote common carrier frequency for 38kHz, this is transmitted by using 455kHz Tao Zhen to decide. At the launch of crystals were integer frequency, frequency coefficients, so commonly 12, so 455kHz ÷ 12 hundredth kHz 38kHz hundredth 379,000. Some remote control system adopts 36kHz, 56kHz, etc. general 40kHz launched by the crystals of oscillation frequency to decide.Infrared remote characteristic is not influence the surrounding environment and does not interfere with other electric equipment. Due to its cannot penetrate walls, so the room can use common household appliance of remote control without mutual interference, Circuit testing is simple, as long as given circuit connection, generally does not need any commissioning can work, Decoding easily, can undertake multiple remote control. Because each manufacturer produces a great deal of infrared remote application-specific integrated circuit, when need press diagram so jip. Therefore, the infrared remote now in household appliances, indoor close (less than 10 meters) in the remote control is widely used.Multiple infrared remote control system of infrared emission control buttons, there are many parts general representative of different control function. When pressed a button, correspondingly in the receiver with different output.Receiving the output state can be roughly divided into pulse, level, self-locking and interlock, data five forms. "The pulse output is according to launch" when the button, the receiver output terminals output corresponding "effective", a pulse width 100ms in general. "Level" refers to the output launch press button, the receiver output corresponding output level ", "effective transmit to loosen the receiver" level "disappears. This "effective pulse" and "effective", may be of high level is low, and may also depend on the output corresponding static state, such as feet for low, static "high" for effective, As for the static, "low" high effective. In most cases, "high" for effective. "Since the lock" refersto launch the output of each time you press the button, a receiver output corresponding change, namely originally a state for high level into a low level, originally for low level into high level. The output power switch and mute as control etc. Sometimes also called the output form for "invert". "The interlock" refers to multiple outputs each output, at the same time only one output. The TV sets of this case is selected, the other is like the light and sound input speed, etc."Data" refers to launch the output some key, use a few output form a binary number, to represent different keystroke.Normally, the receiver except a few data output, but also a "valid" output data, so the timely to collect data. This output form with single-chip microcomputer or are commonly used interface. In addition to the above output form outside, still have a "latch" and "temporary" two forms. The so-called "latch" refers to launch the output signal of each hair, the receiver output corresponding ", "new store until you receive signals. "Temporary" output and the introduction of "level" output is similar.Remote distance (Remote Control effect of RF Remote Control distance) are the major factors as follows:unched in power transmission power: while distance, but great power consumption, easy to generate interference.2.and receiving the receiver sensitivity, receiving, remote distance increased sensitivity to improve, but easy to cause disturbance maloperation or abuse.3.antenna, using linear antenna, and parallel, remote distance, but occupies a large space, in use the antenna spin, pull can increase the remote distance.4.and the higher height: antenna, remote farther, but by objective conditions.5.and stop: current use of wireless remote use of UHF band stipulated by the state, the propagation characteristics of approximate linear transmission, light, small, transmitters and receivers diffraction between such as walls are blocking will greatly discounted remote distance, if is reinforced concrete walls, due to the absorption effect conductor, radio waves.Considering the design of hardware volume small to be embedded in the remote control, so we chose 20 foot single-chip chip AT89C2051. Below is the introduction of the function.（1）AT89C2051 internal structure and performanceAT89C2051 is a byte flash 2K with programmable read-only memory can be erased EEPROM (low voltage, high performance of eight CMOS microcomputer. It adopts ATMEL of high-density non-volatile storage technology manufacturing and industrial standard MCS - 51 instruction set and lead. Through the combination of single chip in general CPL1 and flash memory, is a strong ATMEL AT89C2051 microcomputer, its application in many embedded control provides a highly flexible and low cost solutions. The compatible with 8051 AT89C2051 is CHMOS micro controller, the Flash memory capacity for 2KB. And CHMOS 80C51 process, have two kinds of leisure and power saving operation mode. The performance is as follows.5.CUP, 2KB Flash memory,Working voltage range 2.7-6V, 128KB data storage.The static working way: 0-24MHz, 15 root input/output line.A programmable serial, 2 a 16-bit timing/counters.Thereis a slice of inside precision simulation comparator, 5 the interrupt sources, 2 priority.Programmable serial UART channel, Directly LED driver output,The internal structure of AT89C2051 is shown in figure 1.Figure 1 AT89C2051 interior structure（2）AT89C2051 chip pin and functionIn order to adapt to the requirement of intelligent instrument, embedded in the chip foot AT89C2051 simplified configuration, as shown in figure b. The major changes to: (1) the lead foot from 20 to 40 wires, (2) increased a simulated comparator.=Diagram b AT89C2051 foot figure.AT89C2051 pin function:1.the VCC: voltage.2. to GND.3.P1 mouth: P1 mouth is an 8-bit two-way I/O port. P1.2 ~ P1.7 mouth pin the internal resistance provides. P1.0 and P1.1 requirements on the external pull-up resistors. P1.0 and P1.1 also separately as piece inside precision simulation comparator with input (AIN0) and reversed-phase input (AIN1). Output buffer can absorb the P1 mouth 20mA current and can directly LED display driver. When P1 mouth pin into a "1", can make its input. When the pin P1.2 ~ P1.7 as input and external down, they will be for the internal resistance and flow current (IIL). In flash P1 mouth during the procedure and program code data receiving calibration.4.P3: the P3.0 ~ P3.5 P3, P3.7 is the internal resistance with seven two-way I / 0 lead. P3.6 for fixed inputs piece inside the comparator output signal and it as a general I/Ofoot and inaccessible. P3 mouth buffer can absorb 20mA current. When P3 mouth pin into "1", they are the internal resistance can push and input. As input, and the low external P3 mouth pin pull-up resistors and will use current (IIL) outflow. P3 mouth still used to implement the various functions, such as AT89C2051 shown in table P3 mouth still receive some for flash memory programming and calibration of program control signals.5.RST: reset input. RST once, all into high level I/O foot will reset to "1". When the oscillator is running, continuous gives RST pin two machine cycle of high level can finish reset. Each machine cycle to 12 oscillator or clock cycle.6.XTAL1: as the oscillator amplifier input and inverse internal clock generator input.7.XTAL2: as the oscillator reversed-phase the amplifier's output.P3 mouth function as is shown in table 1.（3）the software and hardware constraints. AT89C2051Due to the foot of the chip AT89C2051, no set limits of external storage interface, so, for external memory read/write instructions as MOVX etc.Due to 2KB ROM, so, the space to jump instruction should pay attention to the destination address range (transfer 000H - 7FFH), beyond the range of addresses, will not meet wrong results. The scope of data storage is 00H (7FH -- when stack manipulation), also should be noticed.The input signal is simulated by the original P3.6 foot into the microcontroller, so the original P3.6 foot.Unable to external use. Simulation comparator can compare two simulation, if the size of the voltage external A D/A converter and its output as A comparator analog input, and by simulating the comparator another input voltage to be measured, through the introduction of the software method can realize the A/D conversion.8.the Flash memory AT89C2051)Provide a 2KB of single-chip AT89C2051 in Flash memory chips, which allows the online program to modify or use special programming programming.(1)Flash memory encryptionAT89C2051 SCM has 2 encryption, can programming (P) or programming (U) to obtain different encryption functionality. Encryption functionality table as shown in table 1-1.Encrypt a content erased only through chips to erase operation.(2)Flash memory programming and procedures，the piece inside chip AT89C2051 Flash memory programming.Note:1.the counters RESET at an EPROM inside the rising edge, and 000H RESET to XTAL1 by foot is executed, pulse count.2.pieces of 10ms to erase PROG pulse.3.during the programming P3.1 pulled low RDY/BSY instructions.(3).A T89C2051 SCM in Flash memory chips programming steps are as follows:1.in the sequence is the VCC GND pin, add working voltage, XTAL1 pin RESET, receiving GND pin, other than the above time, waiting for 10ms.2.In P3.2 pin RESET, heightening level.3.In P3.3, P3.4, P3.5, P3.7 pin; add model multilevel.4.P1.0 P1.7 -- for the 000H unit add data bytes.5.RESET to increase the 12V activation programming.6.P3.2 jump to a one byte programming or encryption.7.calibration has been programming, data from 12V to RESET logic level "H" and set P3.3 P3.7 -- for the correct level, and can output data in P1 mouth.8.For the next addresses) in the unit XTAL1 byte programming, a pulse, make address counter add 1, in mouth add programming data.9.programming and calibration circuit figure c, d.Figurec programming circuit Figured calibration circuit Explanation:(1) P3.1 during programming instructions to be low RDY/BSY,(2) single erasing the PROG 10ms need,(3) internal EEPROM address counter on the rising edge RESET, and 000H RESET to XTAL1 by foot pulses are executed.Along with the rapid development of science and technology, human society has undergone earth-shaking changes. Make our life more colorful. In these changes, the remote control technology has been widely permeates TV, aerospace, military, sports and other production, all aspects of life. From the broad sense, all equipped with electric locomotive facility or electrical switches, if feel some necessary, can consider to improve existing with remote control device, the operation fixed switch to realize the remote operation of the original equipment, stop, the variable, etc. Function.switch, for example, can be used to control the electric control switch the light switch, We design the infrared remote control system to realize the opponent switch quantity control. Infrared remote characteristic is not influence the surrounding environment and does not interfere with other electric equipment. Due to its cannot penetrate walls, so the room can use common household appliance of remote control without mutual interference, Circuit testing is simple, aslong as given circuit connection, generally does not need any commissioning can work, Decoding easily, can undertake multiple remote control.红外遥控人的眼睛能看到的可见光按波长从长到短排列，依次为红、橙、黄、绿、青、蓝、紫。

第八课结构功能主义structural-functionalism.

一、结构功能主义：结构主义与功能主义的综合

1、研究主题：一个社会系统为了维护其存在，有哪些基本条件必须得到满足？而这些条件又是如何得到满足的？ 2、研究层次：强调“系统”而将社会结构和社会整体作为基本分析单位。即把研究重点放在社会上，坚持社会优先于个体的立场，认为个体的社会人格是由社会赋予和塑造的，个体参与社会活动的动机也是社会价值系统的反映，并将个体动机与其行动的有意义的后果加以区分。 3、研究方向：因为强调结果而往往在分析现存结构时带有目的论的假设。即在分析某种现实制度的功能时，首先就依据该制度的存在而认定该制度是有功能的。以此为基础的分析结果不可避免地会具有维护现存制度的保守倾向。 4、把结构功能主义统一在一起的，与其说是一些共有的概念范畴和理论模式，不如说是一种共有的功能分析方法。
第八课结构功能主义 structural-functionalism
Talcott Parsons (1902-1979)
Robert King Merton (1910-2003 )
introduction

塔尔科特· 帕森斯(Talcott Parsons , 1902-1979), 出生于美国的科罗拉多州。毕业于麻省的安姆郝斯特学院社会学系,德国海德堡大学硕士。在海德堡期间，帕森斯初次接触到了德国社会学理论大师马克斯．韦伯的著作，并于1930年将韦伯的名著《新教伦理与资本主义精神》译成英文。在1937年出版的《社会行动的结构》一书中最先分析了韦伯的理论观点。 1931年任教于哈佛大学社会学系，后任社会学系主任。1946年，他将社会学系改名为社会关系学系。帕森斯是功能理论的代表人物。帕森斯终生致力于能够解释所有人类行为的巨型理论的建构。

血管平滑肌细胞增殖和凋亡失衡在血管衰老中的应用

血管平滑肌细胞增殖和凋亡失衡在血管衰老中的应用Vascular smooth muscle cell (VSMC) proliferation and apoptosis dysregulation in vascular aging.血管平滑肌细胞（VSMC）增殖和凋亡失衡在血管衰老中的应用。

The aging process affects various tissues and organs in the body, including the cardiovascular system. Vascular aging is characterized by structural and functional changes in blood vessels, which ultimately lead to an increased risk of cardiovascular diseases such as hypertension, atherosclerosis, and stroke. The balance between VSMC proliferation (the growth and multiplication of VSMCs) and apoptosis (programmed cell death) plays a crucial role in maintaining vascular homeostasis. However, during the process of vascular aging, this delicate equilibrium becomes disrupted.衰老进程会影响身体各个组织和器官，包括心血管系统。

血管衰老的特点是血管的结构和功能发生改变，最终导致高血压、动脉粥样硬化和中风等心血管疾病风险增加。

VSMC增殖（VSMCs的生长和繁殖）与凋亡（程序性细胞死亡）之间的平衡在维持血管稳态中起着至关重要的作用。

单片机外文文献

Principle of MCUSingle-chip is an integrated on a single chip a complete computer system. Even though most of his features in a small chip, but it has a need to complete the majority of computer components: CPU, memory, internal and external bus system, most will have the Core. At the same time, such as integrated communication interfaces, timers, real-time clock and other peripheral equipment. And now the most powerful single-chip microcomputer system can even voice, image, networking, input and output complex system integration on a single chip.Also known as single-chip MCU (Microcontroller), because it was first used in the field of industrial control. Only by the single-chip CPU chip developed from the dedicated processor. The design concept is the first by a large number of peripherals and CPU in a single chip, the computer system so that smaller, more easily integrated into the complex and demanding on the volume control devices. INTEL the Z80 is one of the first design in accordance with the idea of the processor, From then on, the MCU and the development of a dedicated processor parted ways.Early single-chip 8-bit or all of the four. One of the most successful is INTEL's 8031, because the performance of a simple and reliable access to a lot of good praise. Since then in 8031 to develop a single-chip microcomputer system MCS51 series. Based on single-chip microcomputer system of the system is still widely used until now. As the field of industrial control requirements increase in the beginning of a 16-bit single-chip, but not ideal because the price has not been very widely used. After the 90's with the big consumer electronics product development, single-chip technology is a huge improvement. INTEL i960 Series with subsequent ARM in particular, a broad range of applications, quickly replaced by 32-bit single-chip 16-bit single-chip high-end status, and enter the mainstream market. Traditional 8-bit single-chip performance has been the rapid increase in processing power compared to the 80's to raise a few hundred times. At present, the high-end 32-bit single-chip frequency over 300MHz, the performance of the mid-90's close on the heels of a special processor, while the ordinary price of the model dropped to one U.S. dollars, the most high-end models, only 10 U.S. dollars. Contemporary single-chip microcomputer system is no longer only the bare-metal environment in the development and use of a large number of dedicated embedded operating system is widely used in the full range of single-chip microcomputer. In PDAs and cell phones as the core processing of high-end single-chip or even a dedicated direct access to Windows and Linux operating systems.More than a dedicated single-chip processor suitable for embedded systems, so it was up to the application. In fact the number of single-chip is the world's largest computer. Modern human life used in almost every piece of electronic and mechanical products will have a single-chip integration. Phone, telephone, calculator, home appliances, electronic toys, handheld computers and computer accessories such as a mouse in the Department are equipped with 1-2 single chip. And personal computersalso have a large number of single-chip microcomputer in the workplace. Vehicles equipped with more than 40 Department of the general single-chip, complex industrial control systems and even single-chip may have hundreds of work at the same time! SCM is not only far exceeds the number of PC and other integrated computing, even more than the number of human beings.Hardwave introductionThe 8051 family of micro controllers is based on an architecture which is highly optimized for embedded control systems. It is used in a wide variety of applications from military equipment to automobiles to the keyboard on your PC. Second only to the Motorola 68HC11 in eight bit processors sales, the 8051 family of microcontrollers is available in a wide array of variations from manufacturers such as Intel, Philips, and Siemens. These manufacturers have added numerous features and peripherals to the 8051 such as I2C interfaces, analog to digital converters, watchdog timers, and pulse width modulated outputs. Variations of the 8051 with clock speeds up to 40MHz and voltage requirements down to 1.5 volts are available. This wide range of parts based on one core makes the 8051 family an excellent choice as the base architecture for a company's entire line of products since it can perform many functions and developers will only have to learn this one platform.The basic architecture consists of the following features:an eight bit ALU,32 descrete I/O pins (4 groups of 8) which can be individually accessed, two 16 bit timer/counters,full duplex UART,6 interrupt sources with 2 priority levels,128 bytes of on board RAM,separate 64K byte address spaces for DATA and CODE memory.One 8051 processor cycle consists of twelve oscillator periods. Each of the twelve oscillator periods is used for a special function by the 8051 core such as op code fetches and samples of the interrupt daisy chain for pending interrupts. The time required for any 8051 instruction can be computed by dividing the clock frequency by 12, inverting that result and multiplying it by the number of processor cycles required by the instruction in question. Therefore, if you have a system which is using an 11.059MHz clock, you can compute the number of instructions per second by dividing this value by 12. This gives an instruction frequency of 921583 instructions per second. Inverting this will provide the amount of time taken by each instruction cycle (1.085 microseconds).Structure and function of the MCS-51 seriesStructure and function of the MCS-51 series one-chip computer MCS-51 is a name of a piece of one-chip computer series which Intel Company produces. This company introduced 8 top-grade one-chip computers of MCS-51 series in 1980 after introducing 8 one-chip computers of MCS-48 series in 1976. It belong to a lot of kinds this line of one-chip computer the chips have, such as 8051, 8031, 8751, 80C51BH, 80C31BH,etc., their basic composition, basic performance and instructionsystem are all the same. 8051 daily representatives 51 serial one-chip computers.A one-chip computer system is made up of several following parts: (1) One microprocessor of 8 (CPU). ( 2) At slice data memory RAM (128B/256B),it use not depositing not can reading /data that write, such as result not middle of operation, final result and data wanted to show, etc. ( 3) Procedure memory ROM/EPROM (4KB/8KB ), is used to preserve the procedure , some initial data and form in slice. But does not take ROM/EPROM within some one-chip computers, such as 8031 ,8032, 80C ,etc. ( 4) Four 8 run side by side I/O interface P0 four P3, each mouth can use as introduction , may use as exporting too. ( 5) Two timer / counter, each timer / counter may set up and count in the way, used to count to the external incident, can set up into a timing way too, and can according to count or result of timing realize the control of the computer. ( 7) One all depleting serial I/O mouth of UART (universal asynchronous receiver/transmitter (UART) ), is it realize one-chip computer or one-chip computer and serial communication of computer to use for.(8) Stretch oscillator and clock produce circuit, quartz crystal finely tune electric capacity need outer. Allow oscillation frequency as 12 megahits now at most. Every the above-mentioned part was joined through the inside data bus .Among them, CPU is a core of the one-chip computer, it is the control of the computer and command centre, made up of such parts as arithmetic unit and controller , etc.. The arithmetic unit can carry on 8 persons of arithmetic operation and unit ALU of logic operation while including one, the 1 storing device temporalities of 8, storing device 2 temporarily, 8's accumulation device ACC, register B and procedure state register PSW, etc. Person who accumulate ACC count by 2 input ends entered of checking etc. temporarily as one operation often, come from person who store 1 operation is it is it make operation to go on to count temporarily , operation result and loopback ACC with another one. In addition, ACC is often regarded as the transfer station of data transmission on 8051 inside. The same as general microprocessor, it is the busiest register. Help remembering that agreeing with A expresses in the order. The controller includes the procedure counter, the order is deposited, the order deciphers the oscillator and timing circuit, etc. The procedure counter is made up of counter of 8 for two, amounts to 16. It is a byte address counter of the procedure in fact, the content is the next IA that will carried out in PC. The content which changes it can change the direction that the procedure carries out . Shake the circuit in 8051 one-chip computers, only need outer quartz crystal and frequency to finely tune the electric capacity, its frequency range is its 12MHZ of 1.2MHZ. This pulse signal, as 8051 basic beats of working, namely the minimum unit of time. 8051 is the same as other computers, the work in harmony under the control of the basic beat, just like an orchestra according to the beat play that is commanded. there are ROM (procedure memory , can only read ) and RAM in 8051 slices (data memory, can is it can write ) two to read, they have each independent memory address space, dispose way to be the same with general memory of computer.Procedure 8051 memory and 8751 slice procedure memory capacity 4KB, address begin from 0000H, used for preserving the procedure and form constant. Data 8051- 8751 8031 of memory data memory 128B, address false 00FH, use for middleresult to deposit operation, the data are stored temporarily and the data are buffered etc.. In RAM of this 128B, there is unit of 32 bytes that can be appointed as the job register, this and general microprocessor is different, 8051 slice RAM and job register rank one formation the same to arrange the location. It is not very the same that the memory of MCS-51 series one-chip computer and general computer disposes the way in addition. General computer for first address space, ROM and RAM can arrange in different space within the range of this address at will, namely the addresses of ROM and RAM, with distributing different address space in a formation. While visiting the memory, corresponding and only an address Memory unit, can ROM, it can be RAM too, and by visiting the order similarly. This kind of memory structure is called the structure of Princeton. 8051 memories are divided into procedure memory space and data memory space on the physics structure, there are four memory spaces in all: The procedure stores in one and data memory space outside data memory and one in procedure memory space and one outside one, the structure forms of this kind of procedure device and data memory separated form data memory, called Harvard structure. But use the angle from users, 8051 memory address space is divided into three kinds: (1) In the slice, arrange blocks of FFFFH, 0000H of location, in unison outside the slice (use 16 addresses). (2) The data memory address space outside one of 64KB, the address is arranged from 0000H 64KB FFFFH (with 16 addresses) too to the location. (3) Data memory address space of 256B (use 8 addresses). Three above-mentioned memory space addresses overlap, for distinguishing and designing the order symbol of different data transmission in the instruction system of 8051: CPU visit slice, ROM order spend MOVC , visit block RAM order uses MOVX outside the slice, RAM order uses MOV to visit in slice.8051 one-chip computer have four 8 walk abreast I/O port, call P0, P1, P2 and P3. Each port is 8 accurate two-way mouths, accounts for 32 pins altogether. Every one I/O line can be used as introduction and exported independently. Each port includes a latch (namely special function register), one exports the driver and a introduction buffer. Make data can latch when outputting, data can buffer when making introduction , but four function of pass way these self-same. Expand among the system of memory outside having slice, four ports these may serve as accurate two-way mouth of I/O in common use. Expand among the system of memory outside having slice, P2 mouth see high 8 address off; P0 mouth is a two-way bus, send the introduction of 8 low addresses and data / export in timesharing output grade, P3 of mouth, P1 of P1, connect with inside have load resistance of drawing, every one of they can drive 4 Model LS TTL load to output. As while inputting the mouth, any TTL or NMOS circuit can drive P1 of 8051 one-chip computers as P3 mouth in a normal way. Because draw resistance on output grade of them have, can open a way collector too or drain-source resistance is it urge to open a way, do not need to have the resistance of drawing outer. Mouths are all accurate two-way mouths too. When the conduct is input, must write the corresponding port latch with 1 first. As to 80C51 one-chip computer, port can only offer milliamp ere of output electric currents, is it output mouth go when urging one ordinary basing of transistor to regard as, shouldcontact a resistance among the port and transistor base, in order to the electricity while restraining the high level from exporting P1~P3 Being restored to the throne is the operation of initializing of an one-chip computer. Its main function is to turn PC into 0000H initially, make the one-chip computer begin to hold the conduct procedure from unit 0000H. Except that the ones that enter the system are initialized normally, as because procedure operate it make mistakes or operate there aren't mistake, in order to extricate oneself from a predicament , need to be pressed and restored to the throne the key restarting too. It is an input end which is restored to the throne the signal in 8051 China RST pin. Restore to the throne signal high level effective, should sustain 24 shake cycle (namely 2 machine cycles) the above its effective times. If 6 of frequency of utilization brilliant to shake, restore to the throne signal duration should exceed 4 delicate to finish restoring to the throne and operating. Produce the logic picture of circuit which is restored to the throne the signal:restore to the throne the circuit and include two parts outside in the chip entirely. Outside that circuit produces to restore to the throne signal (RST) hand over to Schmitt's trigger, restore to the throne circuit sample to output, Schmitt of trigger constantly in each S5P2, machine of cycle in having one more, then just got and restored to the throne and operated the necessary signal inside. Restore to the throne resistance of circuit generally, electric capacity parameter suitable for 6 brilliant to shake, can is it restore to the throne signal high level duration greater than 2 machine cycles to guarantee. Being restored to the throne in the circuit is simple, its function is very important. Pieces of one-chip computer system could normal running, should first check it can restore to the throne not succeeding. Checking and can pop one's head and monitor the pin with the oscillograph tentatively, push and is restored to the throne the key, the wave form that observes and has enough range is exported (instantaneous), can also through is it restore to the throne circuit group holding value carry on the experiment to change.翻译：单片机原理单片机是指一个集成在一块芯片上的完整计算机系统。

Structure and function of the MCS-51 series

Structure and function of the MCS-51 seriesDescriptionThe AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications. Function characteristicThe AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.Pin DescriptionVCC：Supply voltage.GND：Ground.Port 0：Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs.Port 0 may also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups.Port 0 also receives the code bytes during Flash programming,and outputs the code bytes during programverification. External pullups are required duringprogramverification.Port 1Port 1 is an 8-bit bi-directional I/O port with internal pullups.The Port 1 output buffers can sink/source four TTL inputs.When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2Port 2 is an 8-bit bi-directional I/O port with internal pullups.The Port 2 output buffers can sink/source four TTL inputs.When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 2 pins that are externally being pulled low will source current, because of the internal pullups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses. In this application, it uses strong internal pullupswhen emitting 1s. During accesses to external data memory that use 8-bit addresses, Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8-bit bi-directional I/O port with internal pullups.The Port 3 output buffers can sink/source four TTL inputs.When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.Port 3 also serves the functions of various special features of the AT89C51 as listed below:Port 3 also receives some control signals for Flash programming and verification.RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROGAddress Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable is the read strobe to external program memory.When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device tofetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.EA should be strapped to VCC for internal program executions.This pin also receives the 12-volt programming enable voltage(VPP) during Flash programming, for parts that require12-volt VPP.XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2Output from the inverting oscillator amplifier.Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively,of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1.Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.Figure 1. Oscillator Connections Figure 2. External Clock Drive ConfigurationIdle ModeIn idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset.It should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution,from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.Power-down ModeIn the power-down mode, the oscillator is stopped, and the instruction that invokes power-down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power-down mode is terminated. The only exit from power-down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operatinglevel and must be held active long enough to allow the oscillator to restart and stabilize.Program Memory Lock BitsOn the chip are three lock bits which can be left unprogrammed (U) or can be programmed (P) to obtain the additional features listed in the table below.When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is necessary that the latched value of EA be in agreement with the current logic level at that pin in order for the device tofunction properly.。