SAA5496H中文资料
运算放大器(AD549)应用中文技术资料
极低偏置电流运算放大器AD5491 概述AD549是具有极低输入偏置电流的单片电路静电计型运算放大器。
为达到高精度的目的，输入偏置电压和输入偏置电压漂移均通过激光调节。
这种极低输入电流性能由ADI公司专有的topgate工艺技术完成。
该技术可以制造与具有极低输入电流的JFET并与双极性电路隔离的集成运放。
输入级具有1015Ω的共模阻抗，其输入电流与共模电压无关。
AD549适用于低输入电流和低输入偏置电压的场合。
它特别适合用作各种电流输出的传感器，如光电二极管、光电倍增管以及氧气传感器等的前置放大器。
该产品也可用作精密积分器或低衰减采样保持器。
AD549的封装与标准FET和静电计运算放大器兼容，因此用户花少量成本即可对系统升级，提高已有系统的性能。
AD549有TO-99密封封装。
金属外壳与8管脚相连，使得金属外壳与同样电压的输入终端独立连接，达到降低外壳泄漏的目的。
AD549具有四种性能等级。
其中J、K和L型号的温度范围是0℃到70℃。
S型号专用于军事，其温度范围：-55℃到125℃。
AD549的输入电流在整个共模输入电压范围内都得到保证，其输入失调电压和漂移由激光分别调节到0.25mV和5μV/℃(AD549K)；1mV和20μV/℃(AD549J)。
700μA的最大静态电流使输入电流和偏置电压的热效应降到最低。
模拟性能包括1MHz的均匀增益带宽和3V/μs的压摆率。
当输入为10V时，建立时间是5μs 到0.01%。
2 AD549的引脚及特性参数图一所示是AD549的引脚图，表一所示是其特性参数。
图一AD549引脚图表一AD549的主要特性nV/ nV/ nV/ nV/3 AD549的工作原理3.1 最小化输入电流AD549具有很小的输入电流和失调电压。
在实际应用中应谨慎考虑如何使用放大器可以减小输入电流。
为减小输入电流，该放大器的工作温度应尽可能低。
像其他JFET输入放大器一样，AD549的输入电流对芯片温度很敏感，上升斜率因子为每10℃的2.3。
SF10A600H中文资料
SF10A600HS e m i c o n d u c t o rUltra Fast Recovery DiodeApplications• High speed switching and rectification• Switching mode power supply• Free wheeling diode and snubber circuitFeatures• Ultra-fast reverse recovery time: trr=50ns Max.• Low forward voltage & low reverse current• Low switching lossOrdering InformationType No. Marking Package CodeSF10A600H SF10A600H TO-220F-2LOutline Dimensions unit : mmSF10A600HAbsolute Maximum Ratings[Ta=25°C]UnitRatingCharacteristic SymbolRepetitive peak reverse voltage V RRM 600 VAverage rectified output current I O 10 APeak forward surge current(Non-repetitive 60Hz sine wave) I FSM 120 AJunction temperature T J 150 °CStorage temperature range T stg-45 ~ 150 °CElectrical Characteristics [Ta=25°C]Typ.Min.Max.UnitConditionCharacteristic SymbolTestV-1.9Peak forward voltage V FM 1)I F=10A -㎂20-Repetitive peak reverse current I RRM V R=600V -Reverse recovery time t rr I F=1A, di/dt=-100A/㎲- - 50 nsTotal capacitance C T V R=10V, f=1MHz - 30 - pFJunction to ambient - - 62.5Thermal resistance R th°C/WJunction to case - - 3.51) Pulse test : t P≤380㎲, Duty cycle≤2%Electrical Characteristic CurvesFig. 5 I FSM – Number of cycle Fig. 6 I O derating - T CFig. 4 C - VThe AUK Corp. products are intended for the use as components in general electronic equipment (Office and communication equipment, measuring equipment, home appliance, etc.).Please make sure that you consult with us before you use these AUK Corp. products in equipments which require high quality and / or reliability, and in equipments which could have major impact to the welfare of human life(atomic energy control, airplane, spaceship, transportation, combustion control, all types of safety device, etc.). AUK Corp. cannot accept liability to any damage which may occur in case these AUK Corp. products were used in the mentioned equipments without prior consultation with AUK Corp..Specifications mentioned in this publication are subject to change without notice.。
HI-546资料
28 OUT 27 -VSUPPLY 26 IN 8 25 IN 7 24 IN 6 23 IN 5 22 IN 4 21 IN 3 20 IN 2 19 IN 1 18 ENABLE 17 ADDRESS A0 16 ADDRESS A1 15 ADDRESS A2
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TRUTH TABLE HI-547
A2
A1
A0
EN
“ON” CHANNEL PAIR
X
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L
None
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Analog inputs can withstand constant 70VP-P levels with ±15V supplies. Digital inputs will also sustain continuous faults up to 4V greater than either supply. In addition, signal sources are protected from short circuiting should multiplexer supply loss occur. Each input presents 1kΩ of resistance under this condition. These features make the HI-546, HI-547, HI-548 and HI-549 ideal for use in systems where the analog inputs originate from external equipment or separately powered circuitry. All devices are fabricated with 44V Dielectrically Isolated CMOS technology. The HI-546 is a single 16-Channel, the HI-547 is an 8-Channel differential, the HI-548 is a single 8-Channel and the HI-549 is a 4-Channel differential device. If input overvoltage protection is not needed the HI-506/507/508/509 multiplexers are recommended. For further information see Application Notes AN520 and AN521.
MB90F546GSPF中文资料
2
MB90540/540G/545/545G Series
(Continued) • UART 1 With full-duplex double buffer (8-bit length) Clock asynchronized or clock synchronized serial (extended I/O serial) can be used. • External interrupt circuit (8 channels) A module for starting an extended intelligent I/O service (EI2OS) and generating an external interrupt which is triggered by an external input. • Delayed interrupt generation module Generates an interrupt request for switching tasks. • 8/10-bit A/D converter (8 channels) 8/10-bit resolution can be selectively used. Starting by an external trigger input. Conversion time : 26.3 µs • FULL-CAN interfaces MB90540 series : 2 channel MB90545 series : 1 channel Conforming to Version 2.0 Part A and Part B Flexible message buffering (mailbox and FIFO buffering can be mixed) • External bus interface : Maximum address space 16 Mbytes • Package: QFP-100, LQFP-100
艾为产品介绍PDF
TDD-Noise-输入干扰
湘海电子有限公司Http:\\
远端地与近端地的不一致导致了输入干扰
Tankertanker Design
音乐功放系列全线升级
型号 AW8145CSR AW8155FCR AW8120FCR AW8010AFCR AW8090ACOR AW8110CSR AW8188TQR 特性 防破音，超低EMI AB/D自由切换的第二代音乐功放 AB/D自由切换的第二代音乐功放 超低EMI AB类功放 防破音，超低EMI D类双声道立体声，防破音，超低EMI 封装 FC9 FC9 FC9 FC9 COL9 CSP9 16-Pin TQFN
AW3210典型应用图1
Tankertanker Design
AW3210典型应用图2
Tankertanker Design
AW3210典型应用图3
Tankertanker Design
射频系列
型号 AW5007STR 特性 低噪声放大器 封装 SOT363-6L
TLC549IP;TLC549CP;TLC549CD;TLC548CP;TLC549ID;中文规格书,Datasheet资料
TLC548C, TLC548I, TLC549C, TLC549I 8-BIT ANALOG-TO-DIGITAL CONVERTERSWITH SERIAL CONTROLSLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 19961POST OFFICE BOX 655303 •DALLAS, TEXAS 75265D Microprocessor Peripheral or Standalone OperationD 8-Bit Resolution A/D ConverterD Differential Reference Input Voltages D Conversion Time ...17 µs MaxDTotal Access and Conversion Cycles Per Second– TLC548...up to 45500– TLC549...up to 40000D On-Chip Software-Controllable Sample-and-Hold FunctionD Total Unadjusted Error ...±0.5 LSB Max D 4-MHz Typical Internal System Clock D Wide Supply Range ...3V to 6VD Low Power Consumption ...15mW Max D Ideal for Cost-Effective, High-Performance Applications including Battery-Operated Portable InstrumentationDPinout and Control Signals Compatible With the TLC540 and TLC545 8-Bit A/D Converters and with the TLC1540 10-Bit A/D ConverterDCMOS TechnologydescriptionThe TLC548 and TLC549 are CMOS analog-to-digital converter (ADC) integrated circuits built around an 8-bit switched-capacitor successive-approximation ADC. These devices are designed for serial interface with a microprocessor or peripheral through a 3-state data output and an analog input. The TLC548 and TLC549 use only the input/output clock (I/O CLOCK) input along with the chip select (CS) input for data control. The maximum I/O CLOCK input frequency of the TLC548 is 2.048 MHz, and the I/O CLOCK input frequency of the TLC549 is specified up to 1.1 MHz.AVAILABLE OPTIONSPACKAGET A SMALL OUTLINE(D)PLASTIC DIP(P)0°C to 70°C TLC548CD TLC549CD TLC548CP TLC549CP –40°C to 85°CTLC548ID TLC549IDTLC548IP TLC549IPCopyright © 1996, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.12348765REF+ANALOG INREF–GNDV CCI/O CLOCK DATA OUT CSD OR P PACKAGE(TOP VIEW)TLC548C, TLC548I, TLC549C, TLC549I 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROLSLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 19962POST OFFICE BOX 655303 •DALLAS, TEXAS 75265description (continued)Operation of the TLC548 and the TLC549 is very similar to that of the more complex TLC540 and TLC541devices; however, the TLC548 and TLC549 provide an on-chip system clock that operates typically at 4 MHz and requires no external components. The on-chip system clock allows internal device operation to proceed independently of serial input/output data timing and permits manipulation of the TLC548 and TLC549 as desired for a wide range of software and hardware requirements. The I/O CLOCK together with the internal system clock allow high-speed data transfer and conversion rates of 45500 conversions per second for the TLC548, and 40000 conversions per second for the TLC549.Additional TLC548 and TLC549 features include versatile control logic, an on-chip sample-and-hold circuit that can operate automatically or under microprocessor control, and a high-speed converter with differential high-impedance reference voltage inputs that ease ratiometric conversion, scaling, and circuit isolation from logic and supply noises. Design of the totally switched-capacitor successive-approximation converter circuit allows conversion with a maximum total error of ±0.5 least significant bit (LSB) in less than 17 µs.The TLC548C and TLC549C are characterized for operation from 0°C to 70°C. The TLC548I and TLC549I are characterized for operation from –40°C to 85°C.functional block diagramREF –6488DATAOUT8-Bit Analog-to Digital Converter (Switched-Capacitors)8-to-1 Data Selector and DriverOutput Data RegiserInternal System ClockSample and Hold75231ANALOG INREF +CSI/O CLOCKControl Logic and Output Countertypical equivalent inputsINPUT CIRCUIT IMPEDANCE DURING SAMPLING MODEINPUT CIRCUIT IMPEDANCE DURING HOLD MODE1 k Ω TYPC i = 60 pF TYP (equivalent input capacitance)5 M Ω TYPANALOG INANALOG INTLC548C, TLC548I, TLC549C, TLC549I 8-BIT ANALOG-TO-DIGITAL CONVERTERSWITH SERIAL CONTROLSLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 19963POST OFFICE BOX 655303 •DALLAS, TEXAS 75265operating sequencet ent ent su(CS)B7B0B1B2B3B4B5B6B7Conversion Data BMSB MSB LSBHi-Z StateMSBLSB (see Note B)MSB Previous Conversion Data AA7A7A6A5A4A3A2A1A0Hi-Z StateDon’t11(see Note A)t conv t su(CS)Access Cycle B88765432765432CLOCK I/O CSOUTDATA CareSample Cycle BAccess Cycle CSample Cycle Ct wH(CS)NOTES: A.The conversion cycle, which requires 36 internal system clock periods (17 µs maximum), is initiated with the eighth I/O clock pulsetrailing edge after CS goes low for the channel whose address exists in memory at the time.B.The most significant bit (A7) is automatically placed on the DATA OUT bus after CS is brought low. The remaining seven bits (A6–A0)are clocked out on the first seven I/O clock falling edges. B7–B0 follows in the same manner.absolute maximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V CC (see Note 1) 6.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range at any input –0.3 V to V CC + 0.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output voltage range –0.3 V to V CC + 0.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Peak input current range (any input) ±10 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Peak total input current range (all inputs) ±30 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating free-air temperature range, T A (see Note 2): TLC548C, TLC549C 0°C to 70°C. . . . . . . . . . . . . TLC548I, TLC549I –40°C to 85°C. . . . . . . . . . . . Storage temperature range, T stg –65°C to 150°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NOTES: 1.All voltage values are with respect to the network ground terminal with the REF– and GND terminals connected together, unlessotherwise noted.2.The D package is not recommended below –40°C.TLC548C, TLC548I, TLC549C, TLC549I 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROLSLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 19964POST OFFICE BOX 655303 •DALLAS, TEXAS 75265recommended operating conditionsTLC548TLC549MINNOMMAXMIN NOMMAXUNIT Supply voltage, V CC356356V Positive reference voltage, V ref+ (see Note 3) 2.5V CC V CC +0.12.5V CC V CC +0.1V Negative reference voltage, V ref – (see Note 3)–0.10 2.5–0.10 2.5V Differential reference voltage, V ref+, V ref – (see Note 3)1V CC V CC +0.21V CC V CC +0.2V Analog input voltage (see Note 3)0V CC0V CCV High-level control input voltage, V IH (for V CC = 4.75 V to 5.5 V)22V Low-level control input voltage, V IL (for V CC = 4.75 V to 5.5 V)0.80.8V Input/output clock frequency, f clock(I/O) (for V CC = 4.75 V to 5.5 V)0 2.0480 1.1MHz Input/output clock high, t wH(I/O) (for V CC = 4.75 V to 5.5 V)200404ns Input/output clock low, t wL(I/O) (for V CC = 4.75 V to 5.5 V)200404ns Input/output clock transition time, t t(I/O)(for V CC = 4.75 V to 5.5 V) (see Note 4 and Operating Sequence)100100ns Duration of CS input high state during conversion, t wH(CS)(for V CC = 4.75 V to 5.5 V) (see Operating Sequence)1717µs Setup time, CS low before first I/O CLOCK, t su(CS) (for V CC = 4.75 V to 5.5 V) (see Note 5) 1.4 1.4µs TLC548C, TLC549C 070070CTLC548I, TLC549I–4085–4085°NOTES: 3.Analog input voltages greater than that applied to REF+ convert to all ones (11111111), while input voltages less than that appliedto REF– convert to all zeros (00000000). For proper operation, the positive reference voltage V ref+, must be at least 1 V greater than the negative reference voltage, V ref–. In addition, unadjusted errors may increase as the differential reference voltage, V ref+ – V ref–,falls below 4.75 V.4.This is the time required for the I/O CLOCK input signal to fall from V IH min to V IL max or to rise from V IL max to V IH min. In the vicinityof normal room temperature, the devices function with input clock transition time as slow as 2 µs for remote data acquisition applications in which the sensor and the ADC are placed several feet away from the controlling microprocessor.5.To minimize errors caused by noise at the CS input, the internal circuitry waits for two rising edges and one falling edge of internalsystem clock after CS ↓ before responding to control input signals. This CS setup time is given by the t en and t su(CS) specifications.TLC548C, TLC548I, TLC549C, TLC549I 8-BIT ANALOG-TO-DIGITAL CONVERTERSWITH SERIAL CONTROLSLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 19965POST OFFICE BOX 655303 •DALLAS, TEXAS 75265electrical characteristics over recommended operating free-air temperature range,V CC = V ref+ = 4.75 V to 5.5 V, f clock(I/O) = 2.048 MHz for TLC548 or 1.1 MHz for TLC549 (unless otherwise noted)PARAMETERTEST CONDITIONS MIN TYP †MAXUNIT V OH High-level output voltage V CC = 4.75 V,I OH = –360 µA 2.4V V OL Low-level output voltageV CC = 4.75 V,I OL = 3.2 mA 0.4V I OZ High impedance off state output current V O = V CC ,CS at V CC 10High-impedance off-state output current V O = 0,CS at V CC–10µA I IH High-level input current, control inputs V I = V CC 0.005 2.5µA I IL Low-level input current, control inputsV I = 0–0.005–2.5µA I I()Analog channel on-state input current during sample Analog input at V CC 0.41I(on)g g cycleAnalog input at 0 V –0.4–1µA I CCOperating supply current CS at 0 V 1.8 2.5mA I CC + I ref Supply and reference current V ref+ = V CC1.93mA Input capacitance Analog inputs 755C iInput capacitanceControl inputs515pFoperating characteristics over recommended operating free-air temperature range, V CC = V ref+ = 4.75 V to 5.5 V, f clock(I/O) = 2.048 MHz for TLC548 or 1.1 MHz for TLC549 (unless otherwise noted)TEST CONDITIONS TLC548TLC549PARAMETERTEST CONDITIONS MINTYP †MAX MIN TYP †MAX UNIT E L Linearity error See Note 6±0.5±0.5LSB E ZS Zero-scale error See Note 7±0.5±0.5LSB E FS Full-scale error See Note 7±0.5±0.5LSB Total unadjusted error See Note 8±0.5±0.5LSB t convConversion timeSee Operating Sequence 8171217µs Total access and conversion timeSee Operating Sequence 12221925µs t a Channel acquisition time (sample cycle)See Operating Sequence44I/O clock cycles t v Time output data remains valid after I/O CLOCK ↓1010nst d Delay time to data output valid I/O CLOCK ↓200400ns t en Output enable time 1.4 1.4µs t dis Output disable time 150150ns t r(bus)Data bus rise timeSee Figure 1300300nst f(bus)Data bus fall time 300300ns †All typicals are at V CC = 5 V, T A = 25°C.NOTES: 6.Linearity error is the deviation from the best straight line through the A/D transfer characteristics.7.Zero-scale error is the difference between 00000000 and the converted output for zero input voltage; full-scale error is the differencebetween 11111111 and the converted output for full-scale input voltage.8.Total unadjusted error is the sum of linearity, zero-scale, and full-scale errors.TLC548C, TLC548I, TLC549C, TLC549I 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROLSLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 19966POST OFFICE BOX 655303 •DALLAS, TEXAS 75265PARAMETER MEASUREMENT INFORMATIONSee Note B0.4 V2.4 V t f(bus)Outputt r(bus)0.8 V2.4 V 0.8 Vt dDATA OUTVOLTAGE WAVEFORMS FOR RISE AND FALL TIMESVOLTAGE WAVEFORMS FOR DELAY TIMEV CC3 k Ω3 k ΩV CCSee Note B 50%50%0 V0 Vt PLZI/O CLOCKVOLTAGE WAVEFORMS FOR ENABLE AND DISABLE TIMESOutput Waveform 1(see Note C)t PHZV OH 90%10%t PZL0 VV CC 50%CSLOAD CIRCUIT FOR t PZL AND t PLZLOAD CIRCUIT FOR t PZH AND t PHZLOAD CIRCUIT FORt d , t r , AND t fSee Note BOutput Under Test Test Point3 k Ω1.4 VOutput Waveform 2(see Note C)C L(see Note A)Output Under Test Test Point C L(see Note A)Output Under Test Test PointC L(see Note A)t PZH50%NOTES: A.C L = 50 pF for TLC548 and 100 pF for TLC549; C L includes jig capacitance.B.t en = t PZH or t PZL , t dis = t PHZ or t PLZ .C.Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.Figure 1. Load Circuits and Voltage WaveformsTLC548C, TLC548I, TLC549C, TLC549I 8-BIT ANALOG-TO-DIGITAL CONVERTERSWITH SERIAL CONTROLSLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 19967POST OFFICE BOX 655303 •DALLAS, TEXAS 75265APPLICATIONS INFORMATIONsimplified analog input analysisUsing the equivalent circuit in Figure 2, the time required to charge the analog input capacitance from 0 to V S within 1/2 LSB can be derived as follows:The capacitance charging voltage is given byV C = V S 1–e–t c /R t C i ( )(1)whereR t = R s + r iThe final voltage to 1/2 LSB is given by(2)V C (1/2 LSB) = V S – (V S /512)Equating equation 1 to equation 2 and solving for time t c givesV S –(V S /512) = V S 1–e(3)–t c /R t C i( )andt c (1/2 LSB) = R t × C i × ln(512)(4)Therefore, with the values given the time for the analog input signal to settle ist c (1/2 LSB) = (R s + 1 k Ω) × 60 pF × ln(512)(5)This time must be less than the converter sample time shown in the timing diagrams.R sr i V SV C 1 k Ω MAXDriving Source †TLC548/9V IV I = Input Voltage at ANALOG IN V S = External Driving Source Voltage R s = Source Resistance r i = Input Resistance C i = Input Capacitance†Driving source requirements:•Noise and distortion for the source must be equivalent to the resolution of the converter.•R s must be real at the input frequency.C i55 pF MAX Figure 2. Equivalent Input Circuit Including the Driving SourceTLC548C, TLC548I, TLC549C, TLC549I 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROLSLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 19968POST OFFICE BOX 655303 •DALLAS, TEXAS 75265PRINCIPLES OF OPERATIONThe TLC548 and TLC549 are each complete data acquisition systems on a single chip. Each contains an internal system clock, sample-and-hold function, 8-bit A/D converter, data register, and control logic circuitry. For flexibility and access speed, there are two control inputs: I/O CLOCK and chip select (CS). These control inputs and a TTL-compatible 3-state output facilitate serial communications with a microprocessor or minicomputer. A conversion can be completed in 17 µs or less, while complete input-conversion-output cycles can be repeated in 22 µs for the TLC548 and in 25 µs for the TLC549.The internal system clock and I/O CLOCK are used independently and do not require any special speed or phase relationships between them. This independence simplifies the hardware and software control tasks for the device.Due to this independence and the internal generation of the system clock, the control hardware and software need only be concerned with reading the previous conversion result and starting the conversion by using the I/O clock. In this manner, the internal system clock drives the “conversion crunching” circuitry so that the control hardware and software need not be concerned with this task.When CS is high, DATA OUT is in a high-impedance condition and I/O CLOCK is disabled. This CS control function allows I/O CLOCK to share the same control logic point with its counterpart terminal when additional TLC548 and TLC549 devices are used. This also serves to minimize the required control logic terminals when using multiple TLC548 and TLC549 devices.The control sequence has been designed to minimize the time and effort required to initiate conversion and obtain the conversion result. A normal control sequence is:1.CS is brought low. To minimize errors caused by noise at CS, the internal circuitry waits for two rising edgesand then a falling edge of the internal system clock after a CS ↓ before the transition is recognized. However,upon a CS rising edge, DATA OUT goes to a high-impedance state within the specified t dis even though the rest of the integrated circuitry does not recognize the transition until the specified t su(CS) has elapsed. This technique protects the device against noise when used in a noisy environment. The most significant bit (MSB)of the previous conversion result initially appears on DATA OUT when CS goes low.2.The falling edges of the first four I/O CLOCK cycles shift out the second, third, fourth, and fifth most significantbits of the previous conversion result. The on-chip sample-and-hold function begins sampling the analog input after the fourth high-to-low transition of I/O CLOCK. The sampling operation basically involves the charging of internal capacitors to the level of the analog input voltage.3.Three more I/O CLOCK cycles are then applied to the I/O CLOCK terminal and the sixth, seventh, and eighthconversion bits are shifted out on the falling edges of these clock cycles.4.The final (the eighth) clock cycle is applied to I/O CLOCK. The on-chip sample-and-hold function begins thehold operation upon the high-to-low transition of this clock cycle. The hold function continues for the next four internal system clock cycles, after which the holding function terminates and the conversion is performed during the next 32 system clock cycles, giving a total of 36 cycles. After the eighth I/O CLOCK cycle, CS must go high or the I/O clock must remain low for at least 36 internal system clock cycles to allow for the completion of the hold and conversion functions. CS can be kept low during periods of multiple conversion. When keeping CS low during periods of multiple conversion, special care must be exercised to prevent noise glitches on the I/O CLOCK line. If glitches occur on I/O CLOCK, the I/O sequence between the microprocessor/controller and the device loses synchronization. When CS is taken high, it must remain high until the end of conversion. Otherwise, a valid high-to-low transition of CS causes a reset condition, which aborts the conversion in progress.A new conversion may be started and the ongoing conversion simultaneously aborted by performing steps 1 through 4 before the 36 internal system clock cycles occur. Such action yields the conversion result of the previous conversion and not the ongoing conversion.TLC548C, TLC548I, TLC549C, TLC549I 8-BIT ANALOG-TO-DIGITAL CONVERTERSWITH SERIAL CONTROLSLAS067C – NOVEMBER 1983 – REVISED SEPTEMBER 19969POST OFFICE BOX 655303 •DALLAS, TEXAS 75265PRINCIPLES OF OPERATIONFor certain applications, such as strobing applications, it is necessary to start conversion at a specific point in time.This device accommodates these applications. Although the on-chip sample-and-hold function begins sampling upon the high-to-low transition of the fourth I/O CLOCK cycle, the hold function does not begin until the high-to-low transition of the eighth I/O CLOCK cycle, which should occur at the moment when the analog signal must be converted. The TLC548 and TLC549 continue sampling the analog input until the high-to-low transition of the eighth I/O CLOCK pulse. The control circuitry or software then immediately lowers I/O CLOCK and starts the holding function to hold the analog signal at the desired point in time and starts the conversion.PACKAGING INFORMATIONOrderableDeviceStatus (1)Package Type Package DrawingPins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)TLC548CD ACTIVE SOIC D 875Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC548CDG4ACTIVE SOIC D 875Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC548CDR ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC548CDRG4ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC548CP ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TLC548CPE4ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TLC548ID ACTIVE SOIC D 875Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC548IDG4ACTIVE SOIC D 875Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC548IDR ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC548IDRG4ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC548IP ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TLC548IPE4ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TLC549CD ACTIVE SOIC D 875Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC549CDG4ACTIVE SOIC D 875Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC549CDR ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC549CDRG4ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC549CP ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TLC549CPE4ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TLC549ID ACTIVE SOIC D 875Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC549IDG4ACTIVE SOIC D 875Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC549IDR ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC549IDRG4ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TLC549IP ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TLC549IPE4ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TLC549IPSACTIVESOPS880Green (RoHS &no Sb/Br)CU NIPDAULevel-1-260C-UNLIMPACKAGE OPTION ADDENDUM6-Nov-2006Addendum-Page 1分销商库存信息:TITLC549IP TLC549CP TLC549CD TLC548CP TLC549ID TLC548IP TLC548ID TLC548CD TLC549CDR TLC549CDRG4TLC549IDR TLC549IDRG4 TLC548CDR TLC548CDRG4TLC549IPSR TLC549IPSRG4TLC548IDR TLC548IDRG4 TLC549CPE4TLC549IPE4TLC549CDG4 TLC548CPE4TLC549IDG4TLC548IPE4 TLC549IPS TLC549IPSG4TLC548CDG4 TLC548IDG4。
爱瑟菲产品介绍
工作电源：220V，50/60Hz
尺寸：198W)x96(H)x67.5(D)
4/6路自锁负载反馈型继电器
每路最大负载20A
具备过零断开技术 故障复位功能 内置电源
具备手动开关按钮
具备消防干接点功能 具备机械自锁继电器装置，停电切换的状态下可保持继电器开 关状态不变 可测量每回路电流值，并传送到中央监控电脑，故障复位功能 型号： ASF.RL.4.20AZSF.S ASF.RL.6.20AZSF.S 每个区域可存储128个场景，每个场景下任何一个 回路延迟执行 时间为655.35秒 触点寿命≥10万次 收到总线场景命令后，可立即返回执行完成后各回路的实际电 流值 每一场景具备网络开启（Enable）或关闭Disable）功能 工作环境：-10～55℃，0～95%RH 工作电源：220V，50/60Hz
输入电源：12Vdc/24Vdc±10% 整机无负载功耗：4 W 环境条件：工作温度：－10℃~＋55℃
型号：ASF.IM.26
工作湿度：20%~80%
储存温度：－40℃~＋55℃ 储存湿度：10%~95% 外形尺寸：120mm(W)*86mm(H)*50mm(D) 存储量：200个场景 每个模块具有26个无源输入点 输入点可接翘板开关、复位开关、紧急按钮或红外开关 每个模块都具有网络开启及关闭功能 每个输入点都具有网络开启及关闭功能 每个输入点可以设置20个相关场景 每个输入点可以设置三种输入方式：按下发送场景 奇偶次按下发不同场景 按下、松开发不同场景
每个按键都有对应的LED输出，LED灯颜色可选
每个按键可以设置三种输入方式（按下发送场景、 奇偶次按下发不同场景、按下/松开发不同场景） 环境条件：环境温度：-10℃～55℃ 型号 ： P26016 P26012 ASF.IP.7 六键控制面板 二键控制面板 7键面板
1056Na-钠表中文手册
SN5496资料
SDLS946 –IMPORTANT NOTICETexas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability.TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK.In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards.TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.Copyright © 1999, Texas Instruments Incorporated。
SAA5296资料
• 80C51 microcontroller core • 16/32/64 kbyte mask programmed ROM • 256/768/1280 bytes of microcontroller RAM • Eight 6-bit Pulse Width Modulator (PWM) outputs for control of TV analog signals • One 14-bit PWM for Voltage Synthesis Tuner control • Four 8-bit Analog-to-Digital converters • 2 high current open-drain outputs for directly driving LED’s etc. • I2C-bus interface • External ROM and RAM capability on QFP80 package version. 1.3 Teletext acquisition
The SAA529x, SAA529xA and SAA549x family of microcontrollers are a derivative of the Philips’ industry-standard 80C51 microcontroller and are intended for use as the central control mechanism in a television receiver. They provide control functions for the television system and include an integrated teletext function. The teletext hardware has the capability of decoding and displaying both 525-line and 625-line World System Teletext. The same display hardware is used both for Teletext and On-Screen Display, which means that the display features give greater flexibility to differentiate the TV set. The family offers both 1 page and 10 page Teletext capability, in a range of ROM sizes. Increasing display capability is offered from the SAA5290 to the SAA5497.
FOXBORO I A Series HARDWARE产品规格说明书
FOXBORO ®The FBM214 HART ® Communication Input Interface Module provides eight input channels, each accepting a 4 to 20mA analog signal or a digital HART signal superimposed on a 4 to 20 mA analog input signal.FEATURESKey features of the FBM214 module are:Eight analog input channels, each accepting oneof the following inputs:•Standard 4 to 20 mA analog sensor signal •Digital HART Frequency Shift Keying (FSK) signal superimposed on a 4 to 20 mA analog input signal.FSK modem dedicated to each input channel forbi-directional digital communications with a HART field deviceAnalog to digital conversion of each of the 4to20mA input signals from the HART devicesSupport for the HART universal commandsnecessary to interface the field device with the I/A Series ® system databaseGalvanic isolation of the group of 8 inputchannels from ground and module logicCompact, rugged design suitable for enclosure inClass G3 (harsh) environmentsHigh accuracy achieved by sigma-delta dataconversions for each channelTermination Assemblies (TAs) for locally orremotely connecting field wiring to the FBM214Termination Assemblies for per channel internallyand/or externally loop powered transmitters.PSS 21H-2Z14 B4 Page 2OVERVIEWThe FBM214 HART Communication Input Interface Module contains eight 4to20mA group isolated analog input channels. The FBM214 supports any mix of standard 4to20mA devices and HART devices.The FBM214 serves as a HART communications field device host, enabling the I/A Series system to request and receive two digital messages per second from the field device. The message pass-through capability can be used to support HART universal, common practice, and device-specific commands, but not the burst communication mode. These commands are implemented using the Intelligent Field Device Configurator (IFDC — refer toPSS 21S-8A3 B3 for details).The FBM214 provides a common isolated power supply to power all eight channels. Optionally, the channels can be powered by an external power supply. However, when a common external power supply is used with two or more channels, a Cable Balun module is required to prevent channel cross talk.COMPACT DESIGNThe FBM214 has a compact design, with a rugged extruded aluminum exterior for physical protection of the circuits. Enclosures specially designed for mounting the FBMs provide various levels of environmental protection, up to harsh environments per ISA Standard S71.04.HIGH ACCURACYFor high accuracy, the module incorporates a Sigma-Delta converter which can provide new analog input values for each channel every 100 milliseconds.VISUAL INDICATORSLight-emitting diodes (LEDs) incorporated into the front of the module provide visual indication of the module’s operational status, and communication activity on the channels.EASY REMOVAL/REPLACEMENTThe module can be removed/replaced without removing field device termination cabling, power, or communications cabling.FIELDBUS COMMUNICATIONA Fieldbus Communication Module or a Control Processor interfaces the redundant 2 Mbps module Fieldbus used by the FBMs. The FBM214 module accepts communication from either path (A or B) of the redundant 2 Mbps fieldbus – should one path fail or be switched at the system level, the module continues communication over the active path.The use of an external power supply common to two or more loops requires a Cable Balun Module to maintain communication signal line balance.MODULAR BASEPLATE MOUNTINGThe module mounts on a modular baseplate which accommodates up to four or eight FBMs. The modular baseplate is either DIN rail mounted or rack mounted, and includes signal connectors for redundant fieldbus, redundant independent dc power, and termination cables.TERMINATION ASSEMBLIESField input signals connect to the FBM subsystem via DIN rail mounted TAs. The TAs used with theFBM214 are described in “TERMINATION ASSEMBLIES AND CABLES” on page8.PSS 21H-2Z14 B4Page 3CABLE BALUN MODULEThe Cable Balun module is used to maintain digital communication line balance for HART Transmitter to FBM loops that are powered from a common external power supply. This powering effectively connects one line of each loop together. Without the Baluns, in each loop so powered, the common connection at the external power supply, would cause near end crosstalk at the system end of the loop wiring cable. Loops using FBM internal power source do not require Baluns.The Cable Balun module contains multiple Baluns. One Balun segment is interconnected in each loop powered from an external power supply per the diagram above. There is one Cable Balun module.Figure 1. Cable Balun Module Cable Balun ModuleModule Model ModulePart No.No. of Balunsin the ModuleCBM-4P0903SV4PSS 21H-2Z14 B4Page 4FUNCTIONAL SPECIFICATIONSField Device ChannelsVERSION SUPPORTEDHART Protocol v6INTERFACE8 group-isolated channelsCOMMUNICATION TO THE DEVICEPoint-to-point, master/slave, asynchronous, half-duplex, at 1200 baud.ERROR CHECKINGParity on each byte, and one CRC check byte.SPEED2 messages per secondFASTEST ALLOWED ECB BLOCK PERIOD500 msecMAXIMUM DISTANCE (FBM214 TO FIELDDEVICE)Meets HART FSK physical layer specificationHCF_SPEC-54, Revision 8.1 [up to 3030 m(10000ft)](1).COMPLIANCE VOLTAGE18 V dc minimum at 20.5 mACURRENT INPUTSSense Resistor61.9 Ω nominalTotal Input Resistance280 Ω minimumAccuracy (Includes Nonlinearity)±0.03% of full scaleTemperature Coefficient50 ppm/ºCResolution15 bitsUpdate Rate100 msIntegration Time500 msCommon Mode Rejection>100 db at 50 or 60 HzNormal Mode Rejection>35 db at 50 or 60 HzMAXIMUM LOOP RESISTANCE280 Ω (not including the field device)(2)LOOP POWER SUPPLY PROTECTIONEach channel is galvanically group isolated,current limited and voltage regulated. All inputsare limited by their design to less than 30 mA. Ifthe current limit circuit shorts out, the current islimited to about 85 mA.FBM INPUT IMPEDANCE280 Ω minimumFBM INTERNAL POWER FOR FIELD DEVICE24 V dc ±10% common power supply for allchannels. Loop load limited to one device perchannel.ISOLATIONThe channels are not galvanically isolated fromeach other, but are galvanically isolated (bothoptical and transformer isolation) as a group from ground and module logic. Inputs use an internal FBM isolated power supply for field power. Themodule withstands, without damage, a potential of 600 V ac applied for one minute between the group-isolated channels and earth (ground).CAUTIONThis does not imply that these channels areintended for permanent connection tovoltages of these levels. Exceeding the limitsfor input voltages, as stated elsewhere in thisspecification, violates electrical safety codesand may expose users to electric shock. Fieldbus CommunicationCommunicates with its associated FCM or FCP via the redundant 2 Mbps module FieldbusHEAT DISSIPATION4 W (maximum)(1)The maximum allowable distance decreases when the loop is operated through an intrinsic safety barrier. The maximum distance ofthe field device from the FBM is a function of compliance voltage, wire gauge and voltage drop at the device.(2)In an intrinsic safety application, if a zener barrier is used between the FBM and the field device, the power supply must be set at24V dc +5%, -1%. There are no specific constraints with the use of galvanic barriers.PSS 21H-2Z14 B4Page 5 FUNCTIONAL SPECIFICATIONS (CONTINUED)Power RequirementsINPUT VOLTAGE RANGE (REDUNDANT)24V dc ±5%CONSUMPTION7 W (maximum)Regulatory ComplianceELECTROMAGNETIC COMPATIBILITY (EMC) European EMC Directive 89/336/EECMeets:EN 50081-2 Emission standardEN 50082-2 Immunity standardEN 61326 Annex A (Industrial Levels) CISPR 11, Industrial Scientific and Medical(ISM) Radio-frequency Equipment -Electromagnetic Disturbance Characteristics- Limits and Methods of MeasurementMeets Class A LimitsIEC 61000-4-2 ESD ImmunityContact 4 kV, air 8 kVIEC 61000-4-3 Radiated Field Immunity10 V/m at 80 to 1000 MHzIEC 61000-4-4 Electrical FastTransient/Burst Immunity2 kV on I/O, dc power and communicationlinesIEC 61000-4-5 Surge Immunity2kV on ac and dc power lines; 1kV on I/Oand communications linesIEC 61000-4-6 Immunity to ConductedDisturbances Induced by Radio frequencyFields10 V (rms) at 150 kHz to 80 MHz on I/O,dc power and communication linesIEC 61000-4-8 Power Frequency MagneticField Immunity30 A/m at 50 and 60 HzPRODUCT SAFETY (FBM AND CABLE BALUN) Underwriters Laboratories (UL) for U.S. andCanadaUL/UL-C listed as suitable for use inUL/UL-C listed Class I, Groups A-D;Division 2; temperature code T4 enclosurebased systems. These modules are also ULand UL-C listed as associated apparatus forsupplying non-incendive communicationcircuits for Class I, Groups A-D hazardouslocations when connected to specifiedI/A Series® processor modules as describedin the I/A Series DIN Rail MountedSubsystem User’s Guide (B0400FA). Wherepower is supplied by the FBM,communications circuits also meet therequirements for Class2 as defined inArticle725 of the National Electrical Code(NFPA No.70) and Section 16 of theCanadian Electrical Code (CSA C22.1).Conditions for use are as specified in theI/A Series DIN Rail Mounted SubsystemUser’s Guide (B0400FA).European Low Voltage Directive 73/23/EECand Explosive Atmospheres (ATEX) directive94/9/ECCENELEC (DEMKO) certified as EEx nA IICT4 for use in CENELEC certified Zone 2enclosure certified as associated apparatusfor supplying non-incendive field circuits forZone 2, Group IIC, potentially explosiveatmospheres when connected to specifiedI/A Series processor modules as describedin the I/A Series DIN Rail MountedSubsystem User’s Guide (B0400FA). Also,see Table1 on page9.Calibration RequirementsCalibration of the module or termination assembly is not required.PSS 21H-2Z14 B4Page 6ENVIRONMENTAL SPECIFICATIONS(3)OperatingTEMPERATUREModule-20 to +70°C (-4 to +158°F)Termination AssemblyPVC-20 to +50°C (-4 to +122°F)PA-20 to +70°C (-4 to +158°F) RELATIVE HUMIDITY5 to 95% (noncondensing)ALTITUDE-300 to +3,000m (-1,000 to +10,000ft)StorageTEMPERATURE-40 to +70°C (-40 to +158°F)RELATIVE HUMIDITY5 to 95% (noncondensing)ALTITUDE-300 to +12,000m (-1,000 to +40,000ft) ContaminationSuitable for use in Class G3 (Harsh) environments as defined in ISA Standard S71.04, based on exposure testing according to EIA Standard 364-65, Class III. Vibration7.5 m/S2 (0.75 g) from 5 to 500 Hz(3)The environmental limits of this module may be enhanced by the type of enclosure containing the module. Refer to the applicableProduct Specification Sheet (PSS) which describes the specific type of enclosure that is to be used.PSS 21H-2Z14 B4Page 7 PHYSICAL SPECIFICATIONSMountingMODULEFBM214 mounts on a modular baseplate. Thebaseplate can be mounted on a DIN rail(horizontally or vertically), or horizontally on a19-inch rack using a mounting kit. Refer toPSS21H-2W6B4 for details.TERMINATION ASSEMBLYThe TA mounts on a DIN rail and accommodates multiple DIN rail styles including 32mm (1.26in) and 35mm 1.38in).MassMODULE284 g (10 oz) approximateTERMINATION ASSEMBLYCompression181 g (0.40 lb) approximateRing Lug249 g (0.55 lb) approximateDimensions – ModuleHEIGHT102 mm (4 in)114 mm (4.5 in) including mounting lugsWIDTH45 mm (1.75 in)DEPTH104 mm (4.11 in)Dimensions – Termination AssemblySee page10.Part NumbersFBM214 MODULEP0922VTTERMINATION ASSEMBLIESSee “FUNCTIONAL SPECIFICATIONS –TERMINATION ASSEMBLIES” on page8. Termination CablesCABLE LENGTHSUp to 30 m (98 ft)CABLE MATERIALSPolyurethane or Hypalon®/XLPTERMINATION CABLE TYPEType 1 – See Table2 on page9.CABLE CONNECTION – TA25-pin male D-subminiatureConstruction – Termination AssemblyMATERIALPolyvinyl Chloride (PVC), compressionPolyamide (PA), compressionPVC, ring lugFAMILY GROUP COLORGreen – communicationTERMINAL BLOCKS3 tiers, 8 positionsField Termination ConnectionsCOMPRESSION-TYPE ACCEPTED WIRINGSIZESSolid/Stranded/AWG0.2 to 4 mm2/0.2 to 2.5 mm2/24 to 12 AWGStranded with Ferrules0.2 to 2.5 mm2 with or without plastic collarRING-LUG TYPE ACCEPTED WIRING SIZES#6 size connectors (0.375 in (9.5 mm))0.5 to 4 mm2/22 AWG to 12 AWGPSS 21H-2Z14 B4Page 8TERMINATION ASSEMBLIES AND CABLESField input signals connect to the FBM subsystem via DIN rail mounted Termination Assemblies, which are electrically passive.TAs for the FBM214 are available in the following forms: Compression screw type using Polyvinyl Chloride(PVC) materialCompression screw type using Polyamide (PA) material Ring lug type using PVC material.See the following “FUNCTIONAL SPECIFICATIONS –TERMINATION ASSEMBLIES” for a list of TAs used with the FBM214.The FBM214 provides sufficient loop resistance to allow use of the HART Hand-Held Terminal, or PC20 Intelligent Field Device Configurator (PSS 2A-1Z3 E).A removable termination cable connects the DIN railmounted TA to the FBM via a field connector on the baseplate in which the FBM is installed. Termination cables are available in the following materials: PolyurethaneHypalon XLP .Termination cables are available in a variety of lengths, up to 30 meters (98feet), allowing the Termination Assembly to be mounted in either theenclosure or in an adjacent enclosure. See Table 2 for a list of termination cables used with the TAs forthe FBM214.FUNCTIONAL SPECIFICATIONS – TERMINATION ASSEMBLIESFBM Type Input SignalTA Part NumberTermination TA Cable TACertification PVC (a)(a)PVC is polyvinyl chloride rated from -20 to +50°C (-4 to +122°F).PA is Polyamide rated from -20 to +70°C (-4 to +158°F).PA (a)Type (b)(b) C = TA with compression terminals; RL = TA with ring lug terminals.Type (c)(c)See Table 2 for cable part numbers and specifications.Type (d)(d)See Table 1 for Termination Assembly certification definitions.FBM2148 input channels, 4 to 20mA analog signal, alone or with HART signal superimposedP0916BX P0926EA P0926TD CRL11, 2PSS 21H-2Z14 B4Page 9Table 1. Certification for Termination AssembliesType Certification (a)(a)All TAs are UL/UL-C listed to comply with applicable ordinary location safety standards for fire and shock hazards. Hazardous locationtypes comply with ATEX directive for II 3 G use. They also comply with the requirements of the European Low Voltage Directive. All listings/certifications require installation and use within the constraints specified in DIN Rail Mounted Subsystem User’s Guide (B0400FA) and the conditions stated in UL and DEMKO reports.Type 1TAs are UL/UL-C listed as suitable for use in Class I; Groups A-D; Division 2 temperature code T4 hazardous locations. They are CENELEC (DEMKO) certified EEx nA IIC T4 for use in Zone 2 potentially explosive atmospheres.Type 2TAs are UL/UL-C listed as associated apparatus for supplying non-incendive field circuits Class I; Groups A-D; Division 2 hazardous locations when connected to specified DIN rail mounted FBMs and field circuits meeting entity parameter constraints specified in DIN Rail Mounted Subsystem User’s Guide (B0400FA). They are also CENELEC (DEMKO) certified as associated apparatus for supplying field circuits for Group IIC, Zone 2 potentially explosive atmospheres. Field circuits are also Class 2 limited energy (60 V dc, 30 V ac, 100 VA or less) if customer-supplied equipment meets Class 2 limits.Table 2. Cables Types and Part NumbersCable Lengthm (ft) Type 1P/PVC (a)Type 1H/XLPE (b)Cable Lengthm (ft) Type 1P/PVC (a)Type 1H/XLPE (b)0.5 (1.6)P0916DA P0916VA 10.0 (32.8) P0916DE P0916VE 1.0 (3.2) P0916DB P0916VB 15.0 (49.2) P0916DF P0916VF 2.0 (6.6)P0931RM P0931RR 20.0 (65.6) P0916DG P0916VG 3.0 (9.8) P0916DC P0916VC 25.0 (82.0) P0916DH P0916VH 5.0 (16.4)P0916DDP0916VD30.0 (98.4)P0916DJP0916VJ(a)P/PVC is polyurethane outer jacket and semi-rigid PVC primary conductor insulation.(b)H/XLPE is Hypalon outer jacket and XLPE (cross-linked polyethylene) primary conductor insulation.PSS 21H-2Z14 B4Page 10DIMENSIONS – NOMINALRELATED PRODUCT SPECIFICATION SHEETSCompression Termination AssemblyRing Lug Termination Assembly(a) Overall width – for determining DIN rail loading.(b) Height above DIN rail (add to DIN rail height for total).PSS NumberDescriptionPSS 21H-2W1 B3DIN Rail Mounted FBM Subsystem OverviewPSS 21H-2W2 B3DIN Rail Mounted FBM Equipment, Agency CertificationsPSS 21H-2Z14 B4Page 11PSS 21H-2Z14 B4 Page 12IPS Corporate Headquarters 5601 Granite Parkway Suite 1000 Plano, TX 75024United States of AmericaFoxboro Global Client Support Inside U.S.: 1-866-746-6477 Outside U.S.: 1-508-549-2424 or contact your local Foxboro representative.Facsimile: 1-508-549-4999Invensys, Foxboro, I/A Series and the IPS Logo are trademarks of Invensys plc, its subsidiaries, and affiliates. All other brand names may be trademarks of their respective owners.Copyright 2002-2010 Invensys Systems, Inc.All rights reservedMB 21A Printed in U.S.A. 0210。
ICS4_6x系列防爆称重方案快速使用指南.pdf_1701914538.2239728说明书
5 Maintenance
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5.1 Cleaning .............................................................................................................................................................................................................................. 14
4.6 Taring ........................................................................................................................ 10
4.7 Printing or transferring data........................................................................................... 10
ICS4_6x-series
English Quick Guide ICS4_6x-series Explosion-protected weighing solutions 中文 快速使用指南 ICS4_6x 系列 防爆称重方案
ICS466x ICS466x
ICS426x
en
Congratulations on choosing the quality and precision of METTLER TOLEDO. Proper use of your new equipment according to this Manual and regular calibration and maintenance by our factory-trained service team ensures dependable and accurate operation, protecting your investment. Contact us about a service agreement tailored to your needs and budget. Further information is available at /service There are several important ways to ensure you maximize the performance of your investment: 1 Register your product: We invite you to register your product at
FMMT549ATA;FMMT549TA;FMMT549ATC;FMMT549TC;中文规格书,Datasheet资料
A Product Line ofDiodes Incorporated30V PNP SILICON PLANAR HIGH VOLTAGE TRANSISTOR IN SOT23Features and Benefits • BV CEO > -30V• Maximum Continuous Collector Current I C = -1A• 500mW power dissipation • Complementary type: o FMMT549 – FMMT449 o FMMT549A – N/A • Lead Free, RoHS Compliant (Note 1)• Halogen and Antimony Free "Green" Device (Note 2)• Qualified to AEC-Q101 Standards for High ReliabilityMechanical Data• Case: SOT23 • UL Flammability Rating 94V-0 • Case material: molded Plastic. • Moisture Sensitivity: Level 1 per J-STD-020• Terminals: Matte Tin Finish; Solderable per MIL-STD-202, Method 208• Weight: 0.008 grams (Approximate)Ordering Information (Note 3)Product Marking Reel size (inches) Tape width (mm) Quantity per reel FMMT549TA 549 7 83,000 FMMT549ATA 59A 7 8 3,000Notes:1. No purposefully added lead.2. Diodes Inc.`s “Green” Policy can be found on our website at 3. For Packaging Details, go to our website at .Marking Informationxxx = Product Type Marking Code FMMT549: xxx = 549 FMMT549A: xxx = 59ATop View SOT23 Device Symbol Top View Pin-Out xxxMaximum Ratings @T A = 25°C unless otherwise specifiedCharacteristic Symbol Value UnitCollector-Base Voltage V CBO -35 V Collector-Emitter Voltage V CEO -30 V Emitter-Base Voltage V EBO -5 V Continuous Collector Current I C -1 A Peak Pulse Current I CM -2 A Base Current I B -200 mAThermal Characteristics @T A = 25°C unless otherwise specifiedCharacteristic Symbol Value UnitPower Dissipation (Note 4) P D500 mW Thermal Resistance, Junction to Ambient (Note 4) R θJA250 °C/W Thermal Resistance, Junction to Lead (Note 5) R θJL 197 °C/W Operating and Storage Temperature Range T J, T STG-55 to +150 °CElectrical Characteristics @T A = 25°C unless otherwise specifiedCharacteristic Symbol Min Typ Max Unit Test Condition Collector-Base Breakdown Voltage BV CBO -35 - - V I C = -100µA Collector-Emitter Breakdown Voltage (Note 6) BV CEO -30 - - V I C = -10mA Emitter-Base Breakdown Voltage BV EBO -5 - - V I E = -100µACollector Cutoff Current I CBO- - -0.1 µA V CB = -30V- - -10 V CB = -30V, T A = 100°CEmitter Cutoff Current I EBO - - -0.1 µA V EB = -4VStatic Forward Current Transfer Ratio (Note 6) h FE 70 200 - - I C = -50mA, V CE = -2V80 130 - I C = -1A, V CE = -2V40 80 - I C = -2A, V CE = -2VFMMT549 100 160 300 - I C = -500mA, V CE = -2V FMMT549A 150 200 500 - I C = -500mA, V CE = -2VCollector-Emitter Saturation VoltageV CE(sat) - -250 -500 mV I C = - 1A, I B = -100mA- -500 -750 I C = - 2A, I B = -200mAFMMT549A - - -300mV I C = -100mA, I B = -1mA Base-Emitter Saturation Voltage (Note 6) V BE(sat)- -900 -1250 mV I C = -1A, I B = -100mA Base-Emitter Turn-On Voltage (Note 6) V BE(on)- -850 -1000 mV I C = -1A, V CE = -2V Output Capacitance C obo- - 25 pF V CB = -10V, f = 1MHz Transition Frequency f T100 - - MHz V CE = -5V, I C = -100mA,f = 100MHzSwitching Timest on - 50 - ns I C = -500mA, V CC = -10VI B1 = I B2 = -50mA t off- 300 - ns Notes:4. For a device surface mounted FR4 PCB with minimum recommended pad layout; high coverage of single sided 1 oz copper, in still air conditions; thedevice is measured when operating in a steady-state condition.5. Thermal resistance from junction to solder-point (at the end of the collector lead).6.Measured under pulsed conditions. Pulse width ≤ 300 µs. Duty cycle ≤ 2%Typical Electrical CharacteristicsPackage Outline DimensionsSuggested Pad LayoutSOT23Dim Min Max Typ A 0.37 0.51 0.40 B 1.20 1.40 1.30 C 2.30 2.50 2.40 D 0.89 1.03 0.915 F 0.45 0.60 0.535 G 1.78 2.05 1.83 H 2.80 3.00 2.90 J 0.0130.10 0.05 K 0.903 1.10 1.00 K1 - - 0.400 L 0.45 0.61 0.55 M 0.0850.18 0.11α0° 8° - All Dimensions in mmDimensions Value (in mm)Z 2.9 X 0.8 Y 0.9C2.0 E1.35 X EYCZ分销商库存信息:DIODESFMMT549ATA FMMT549TA FMMT549ATC FMMT549TC。
新编俄罗斯电子器件对照手册精品
俄型号：К１３３ИЕ２十进制计数器说明相应国内外产品К１３３ИЕ２型单片TTL中规模半□中国型号导体集成电路，由四个主从触发器和附加推荐替换 SG5490A门电路组成，功能为具有清零和置9输入生产厂家 4435厂端的负沿触发异步十进制计数器。
其计数□国外型号 SN5490A (美国)长度可以是2、5、10分频。
К１３３ИЕ２主要参数 5490A主要参数 (T A=25℃)К１３３ИЕ２逻辑图和外引线排列 5490A功能表和外引线排列俄型号：К１３３ИЕ５４位二进制计数器说明相应国内外产品К１３３ИЕ５型单片TTL中规模半□中国型号导体集成电路，由四个主从触发器和附加推荐替换 SG5493A门电路组成。
可组成二分频计数器和三级生产厂家 4435厂二进制计数器，具有清零输入端。
□国外型号 SN5493A (美国)AК１３３ИЕ５逻辑图和外引线排列 5493A功能表和外引线排列俄型号：К１３３ЛА２８输入与非门说明相应国内外产品К１３３ЛА２型单片TTL小规模半□中国型号导体集成电路，功能为8输入端与非门。
推荐替换 JT5430生产厂家 4435厂□国外型号 SN5430 (美国)К１３３ЛА２逻辑图和外引线排列 5430逻辑图和外引线排列俄型号：К１３３ЛА３四２输入与非门说明相应国内外产品К１３３ЛА３型单片TTL小规模半□中国型号导体集成电路，由四个独立的而又完全相推荐替换 JT5400同的2输入端与非门组成。
生产厂家 4435厂□国外型号 SN5400 (美国)AК１３３ЛА３逻辑图和外引线排列 5400逻辑图和外引线排列说明相应国内外产品К１３３ЛА４型单片TTL小规模半□中国型号导体集成电路，由三个独立的而又完全相推荐替代 JT5410同的3输入端与非门组成。
生产厂家 4435厂□国外型号 SN5410 (美国)AК１３３ЛА４逻辑图和外引线排列* 5410逻辑图和外引线排列*注：俄产品输出脚顺序与5410不同，选用时应注意。
迈瑞欧恒温恒湿电子防潮箱（低温加热型）选型手册与技术参数说明书
恒温恒湿电子防潮箱（低温加热型）选型手册与技术参数（控湿范围:20%-60%，10%-20%，1%-10%RH三选一；控温范围：10~40℃）100L165L246L325L435L546L720L878L1440L（四门）1440L（六门）非防静电型号防静电型号外形尺寸(W*D*H)内部尺寸(W*D*H)平均功率(W)最大功率(W)层板数量容积(L)MC108T MC108TF448*400*688mm446*372*598mm13911100 MC168T MC168TF448*450*1010mm446*422*848mm181263165 MC268T MC268TF598*400*1310mm596*372*1148mm181263246 MC328T MC328TF900*450*1010mm898*422*848mm201403325 MC468T MC468TF900*600*1010mm898*572*848mm201403435 MC568T MC568TF598*710*1465mm596*682*1298mm201403546 MC718T MC718TF598*710*1910mm596*682*1723mm201405720 MC878T MC878TF900*600*1890mm898*572*1698mm201405878 MC1368T MC1368TF1200*710*1910mm1198*682*1723mm4028051440 MC1369T MC1369TF1200*710*1910mm1198*682*1723mm4028051440 *白色为非防静电系列；黑色为防静电系列，型号后带有F。
产品特性：1.加热器采用德国进口的DBK加热器，该加热器通过德国TUV，欧洲CE，美国UL 认证，符合ROHS环保。
质量好，温升效率高，使用寿命长。
70度时平均无故障时间（MTTF）为65000小时。
AD549JHZ资料
1. The AD549 input currents are specified, 100% tested, and guaranteed after the device is warmed up. They are guaranteed over the entire common-mode input voltage range.
Ultralow Input Bias Current Operational Amplifier AD549
CONNECTION DIAGRAM
GUARD PIN, CONNECTED
TO CASE
SET NULL
8
V+
1 AD549 7
INVERTING INPUT
2
6 OUTPUT
3 NONINVERTING
2. The AD549 input offset voltage and drift are laser trimmed to 0.25 mV and 5 μV/°C (AD549K), and to 1 mV and 20 μV/°C (AD549J).
3. A maximum quiescent supply current of 700 μA minimizes heating effects on input current and offset voltage.
ESD Caution.................................................................................. 5 Typical Performance Characteristics ............................................. 6 Functional Description .................................................................. 10
【精品】9806H产品介绍
Confidential
© 2006, ZTE Corporation. All rights reserved.
非法包的抑制机制
冲击波影响－无抑制
宽带超级管理
冲击波影响－有抑制
宽带超级管理
安全保障篇
城域网 9806H
非法广播包 非法组播包 未知单播包
城域网 9806H
Confidential
© 2006, ZTE Corporation. All rights reserved.
电源和状态 电源
控制总线 业务总线
电源 控制总线 业务总线
系统篇
9806H硬件架构
背
板
风扇
VOIP子卡（可选） 控制交换板
上联子卡
用户板
Confidential
© 2006, ZTE Corporation. All rights reserved.
系统篇
主要板卡-控制交换板（SCCB）及子卡
上联子卡：
ZXDSL 9806H V2.0
2008年1月
系统结构 功能特色 应用场景
Confidential
© 2006, ZTE Corporation. All rights reserved.
系统示意图
系统篇
电源板 风 扇
主控板
用户板1 用户板2 用户板3 用户板4
Confidential
© 2006, ZTE Corporation. All rights reserved.
Soft Switch
H.248
IP CORE
ZXDSL 9806H
DSL
H.248 ZXDSL 9806H
DSL
opa549_高电压,高电流运放
CONNECTION DIAGRAM
Tab connected to V–. Do not use to conduct current.
2 1 3 –In VO
4 +In 5
6 Ref 7
8 ILIM 9 E/S
10 11
V–
V+
Connect both pins 1 and 2 to output. Connect both pins 5 and 7 to V–. Connect both pins 10 and 11 to V+.
DESCRIPTION
The OPA549 is a low-cost, high-voltage/high-current operational amplifier ideal for driving a wide variety of loads. This laser-trimmed monolithic integrated circuit provides excellent low-level signal accuracy and high output voltage and current. The OPA549 operates from either single or dual supplies for design flexibility. The input common-mode range extends below the negative supply. The OPA549 is internally protected against over-temperature conditions and current overloads. In addition, the OPA549 provides an accurate, user-selected current limit. Unlike other designs which use a “power” resistor in series with the output current path, the OPA549 senses the load indirectly. This allows the current limit to be adjusted from 0A to 10A with a resistor/potentiometer, or controlled digitally with a voltage-out or current-out Digital-to-Analog Converter (DAC). The Enable/Status (E/S) pin provides two functions. It can be monitored to determine if the device is in thermal shutdown, and it can be forced low to disable the output stage and effectively disconnect the load. The OPA549 is available in an 11-lead power package. Its copper tab allows easy mounting to a heat sink for excellent thermal performance. Operation is specified over the extended industrial temperature range, –40°C to +85°C.
testo 549 - testo 550 . Digital manifold Instructi
testo 549 - testo 550 . Digital manifold Instruction manual21 Contents1Contents1Contents (3)2Safety and the environment (4)2.1.About this document (4)2.2.Ensure safety (4)2.3.Protecting the environment (5)3Product description (5)e (5)3.2.Overview (6)4First steps (7)5Using the manifold (9)5.1.Preparing for measurement (9)5.1.1.Switching the instrument On (9)5.1.2.Connecting temperature probe(s) (11)5.1.3.Switching Bluetooth® on and off (only testo 550) (11)5.1.4.Measuring mode (12)5.2.Performing the measurement (13)6Technical data (16)6.1.1.Bluetooth module (only testo 550) (16)6.1.2.General technical data (17)7Maintaining the product (19)8Tips and assistance (20)8.1.Questions and answers (20)8.2.Measurement parameters (20)8.3.Error reports (21)8.4.Accessories and spare parts (21)9EC declaration of conformity (22)32 Safety and the environment42Safety and the environment 2.1. About this documentUse> Please read this documentation carefully and familiarizeyourself with the product before putting it to use. Pay particular attention to the safety instructions and warning advice in order to prevent injuries and damage to the product.Symbols and writing standardsRepresentation Explanation Warning advice, risk level according to thesignal word:Warning!Caution!the equipment may occur.> Menu Elements of the instrument, the instrument2.2. Ensure safety> Do not operate the instrument if there are signs of damage atthe housing, mains unit or hoses.> Do not store the product together with solvents. Do not use anydesiccants.> Carry out only the maintenance and repair work on thisinstrument that is described in the documentation.> Dangers may also arise from the refrigeration systems beingmeasured or the measuring environment: Note the safety regulations valid in your area when performing themeasurements.3 Product description> If the manifold falls or another comparable mechanical loadoccurs, the pipe sections of the refrigerant hoses may break.The valve stem shutoff may also be damaged, whereby furtherdamage to the interior of the manifold may occur that cannot beidentified from the outside. The refrigerant hoses must thereforebe replaced with new, undamaged refrigerant hoses every timethe manifold falls or following any other comparable mechanicalload. Send the manifold to Testo Customer Service for atechnical check for your own safety.> To prevent damage from ESD (electro-static discharge) ortransient voltage spikes make sure that your refrigerationsystem is properly grounded, as otherwise the manifold mightget damaged.2.3.Protecting the environment> Dispose of spent batteries in accordance with the valid legalspecifications.> At the end of its useful life, send the product to the separatecollection for electric and electronic devices (observe localregulations) or return the product to Testo for disposal.> Refrigerant gases can harm the environment. Please note the applicable environmental regulations.3Product descriptioneTesto 549 and testo 550 are digital manifolds for maintenance andservice work on refrigeration systems and heat pumps. They areintended for use by qualified personnel only.The functions of the testo 549 and testo 550 are designed toreplace analog manifolds, thermometers and pressure/temperaturecharts. Pressures and temperatures can be applied, adapted,tested and monitored.Testo 549 and testo 550 are compatible with most non-corrosiverefrigerants, water and glycol. Testo 549 and testo 550 are notcompatible with refrigerants containing ammonia.The instruments must not be used in explosive environments!53 Product description63.2. OverviewDisplay and control elements1 Mini-DIN probe socket for NTC temperature probe, with socketcover2 F oldable hanging hook (on rear)IconSignificance Battery statusBluetooth®// Measuring mode4 B attery compartment. NOTE: Rechargeable batteries cannot be charged inside the battery compartment.4 First steps5 C ontrol keys:[▼]Down key: Scroll through menu[/] Switching the instrument on/offSwitch the display illumination on/off.7 2 x valve stem shutoff8 3 x hose holders for refrigerant hoses9 3 x connections 1/4" SAE, brassLeft/right: Low pressure/high pressure, for refrigerant hoseswith quick connect fittingCenter: for charge / discharge of refrigerant10 Mini-USB connection for firmware update, inside the batterycompartment.4First stepsInserting batteries / rechargeable batteries1. F old out the hanging hook and open the battery compartmentby squeezing the clip lock.2. Insert batteries (included in delivery) or rechargeable batteries(4x 1.5 V, type AA/Mignon/LR6) in the battery compartment.Observe the polarity!3. Close the battery compartment.- After inserting the batteries, the instrument switches onautomatically and goes into the settings menu.When not in use for long period: Remove batteries/rechargeablebatteries.74 First steps8Units / Parameter selection1. P ress [Set] to confirm or change unit parameter settings2. Press [▲] or [▼] to change the units / parameters.-The settings will be accepted once the last selection has been made.or bar/ / Select measuring mode: heat pump / cooling/ or AutoAUTO OFF Activate or deactivate Automatic power-off.- Settings will be applied following the final selection.Operating valve stem shutoffsThe digital manifold acts like a conventional two-way manifold with regard to the refrigerant path: The passages are opened by opening the valves. The adjacent pressure is measured with valves closed as well as with them open.> O pen valve: Turn valve positioner counterclockwise.> C lose valve: Turn valve positioner clockwise.5 Using the manifoldWARNINGOver tightening the valve stem shutoffs may cause:5Using the manifold5.1.Preparing for measurement5.1.1.Switching the instrument On> Press [/].Zero the pressure sensors before every measurement.✓All connections must be at ambient pressure.> Press [P=0] key for 3 seconds to execute zeroing.Connecting the refrigerant hosesBefore each measurement check whether the refrigerant hoses arein flawless condition.✓Make sure the valve stem shutoffs are closed.1. Connect the refrigerant hoses to the low-pressure side (blue)and high-pressure side (red).2. Connect the refrigerant hoses to the AC/R system.95 Using the manifold10WARNINGDropping this instrument or any other comparable mechanicalChoosing the refrigerant1. Press [R, ►, ■].- It activates the refrigerant menu and the currently selected refrigerant flashes.2. Setting the refrigerant:Available refrigerantsExample: Selecting refrigerant R401B1. Press [R, ►, ■]to activate refrigerant menu.2. Press [▲] or [▼]several times, until R401B flashes.3. Press [R, ►, ■]to confirm the selection.Exiting the refrigerant selection> Press [R, ►, ■]or automatically after 30 s, if no other key has been pressed.5 Using the manifold 5.1.2.Connecting temperature probe(s)Note: The testo 549 does not include temperature probes in theinitial scope of delivery.Surface temperature probeAt least one NTC temperature probe must be connected tomeasure the pipe temperature, for automatic calculation ofsuperheating and subcooling.Deactivating the surface compensation factor for insertion andair temperature probesA surface compensation factor has been set in the measuringinstrument to improve the measuring accuracy of surfacetemperature readings.If the manifold is used in combination with insertion or airtemperature probe (optional), this factor must be deactivated:1. P ress [Set] repeatedly until T fac is displayed.2. Press [▲] or [▼] to set T fac to Off.3. Press [Set] to continue through the settings menu until themeasurement/home view is displayed.- T fac is shown on the display if T fac is disabled.5.1.3.Switching Bluetooth® on and off (only testo 550)In order to to establish a connection via Bluetooth, on an Androidor iOS device, the Testo App Refrigeration must be alreadyinstalled.You can download the App for iOS in the Apple App Store or forAndroid in Google Play.The App is compatible with devices using iOS 7 or higher /Android 4.3 or 4.4.1. To turn on the Bluetooth press [▲] and [▼] simultaneously andhold down for 3 seconds.- Once the Bluetooth icon is shown on the display, Bluetooth isDisplay Descriptionflashes There is no Bluetooth connection, or apotential connection is being searched for.There is a Bluetooth connection.is permanentlydisplayed5 Using the manifoldDisplay Description is not displayedBluetooth is disabled.hold down for 3 seconds.- Once the Bluetooth icon is no longer shown on the display,Bluetooth is switched off.5.1.4. DisplayModeRefrigeration systemHeat pumpAutomatic mode5 Using the manifold 5.2.Performing the measurementWARNINGRisk of injury caused by refrigerant that is at high pressure,Measuring1. Connect and apply pressure to the manifold.2. See readings.Note: With refrigerants that have a temperature glide, “Zeotropes”the evaporation temperature Ev/to and condensation temperatureCo/tc are displayed after evaporation and condensation arecomplete.Zeotropes (refrigerants blends mix together) can separate fromeach other, unlike azeotropes which mix together to become one.Zeoptropes often blend refrigerants with different boiling points(saturation temps), where one will change from liquid to vaporbefore the other as they go through the evaporator.The glide is the difference between the lowest boiling point and thehighest boiling point. If they are 3 degrees apart, for example, theblend has a 3 degree glide.5 Using the manifold- The display illumination will flash if:• The critical pressure of the refrigerant is within 15 psi (1 bar) of the highest pressure (and temperature) where the refrigerant can still condense• The maximum. permissible pressure of 870 psi (60 bar) is exceeded.Key functions for 550 or 549 when used with optional probes > Press [▲] or [▼] to change the reading in the display. (The temperature probes must be connected.)Possible display combinations:With both NTC temperature probes connected, Δt is also shown. > P ress [Mean/Min/Max] to display min./max. readings andmean values.Changeable - Evaporation Temperature (Ev) - MeasuredTemperature (T1) - Superheating (SH)Changeable - Condensation Temperature (Co) - MeasuredTemperature (T2) - Subcooling (SC) Condensation pressureEvaporation pressure5 Using the manifoldLeak test / pressure drop testSystems can be tested for tightness with the temperature-compensated leak test. The system pressure and the ambient temperature are measured over a defined period of time, typically with an inert gas such as Nitrogen. A temperature probe can be connected that measures the ambient temperature. : Optional air temperature probe, part. no. 0613 1712) is recommended. Measurement data of the temperature-compensated differential pressure and temperature, from start to the end of the test, isdisplayed. It is possible to perform a leak test without connecting a temperature probe.1. Press [Mode] ΔP is displayed.2. Start the leakage test: Press [R, ►, ■].ΔP is now flashing and hh:mm timer is on.3. End the leakage test: Press [R, ►, ■]. ΔP stops flashing and hh:mm timer stops.- Result is displayed. Note: Leak test time duration and ΔP value 4. Confirm message: Press [Mode] to exit leak mode.Differential pressure start compared to actual Measured pressure beginning of testDuration of test Actual measured pressure6 Technical data6Technical data6.1.1.Bluetooth module (only testo 550)The Bluetooth® option may only be operated in countriesin which it is approved.European UnionGermany (DE), Belgium (BE), Netherlands (NL), Spain (ES),Sweden (SE), Italy (IT), Denmark (DK), United Kingdom (GB),France (FR), Austria (AT), Poland (PL), Hungary (HU),Romania (RO), Czech Republic (CZ), Finland (FI),EFTA countriesSwitzerland (CH), Norway (NOR)Other countriesTurkey (TR), India (IN), Australia (AUS), New Zealand (NZL),USA (US), Argentina (AR), Hong Kong (HK)Information from the FCC (Federal Communications Commission)This device complies with part 15 of the FCC Rules. Itscommissioning is subject to the following two conditions: (1) Thisdevice may not cause harmful interference and (2) this device mustbe able to accept interference, even if this could have undesiredeffects on the operation.ChangesThe FCC demands that the user be informed that any changes ormodifications to the instrument that are not explicitly approved bytesto AG may void the user's right to use this instrument.6 Technical data 6.1.2.General technical data6 Technical data7 Maintaining the product7Maintaining the productCleaning the instrumentDo not use harsh cleaning agents or solvents! Mild soap andwater may be used.> C lean instrument using a damp cloth.Keeping connections clean> Keep screw connections clean and free of grease and otherdeposits, clean with a moist cloth as required.Removing oil residues> Carefully blow out oil residues in valve block using compressed air.To ensure measuring accuracy> Check instrument regularly for leaks (recommended: annually).Do not exceed the pressure range!> Calibrate instrument regularly (recommended: annually).Changing batteries/rechargeable batteries✓Instrument is switched off.1. Fold out the hook, loosen the clip and remove the cover of thebattery compartment.2. Remove discharged batteries/rechargeable batteries and insertnew batteries/rechargeable batteries (4x 1.5 V, type AA,Mignon, LR6) in the battery compartment. Observe the polarity!3. Set on and close cover of the battery compartment (clip mustengage).4. Switch the instrument on.8 Tips and assistanceChanging the valve or valve stem shutoffDO NOT ATTEMPT to change the valve stems. Changing the valve stem shutoff or valves themselves will void the warranty. Send the measuring instrument to Testo Customer Service.8Tips and assistance8.1.Question Possible causes/solution flashesBatteries are nearly discharged. > The instrument switches Batteries are discharged.8.2. Measurement parameters8 Tips and assistance 8.3.8.4.Accessories and spare partsFor a complete list of all accessories and spare parts, please referto the product catalogues and brochures or look up our website at:If you have any questions, please contact your dealer or TestoCustomer Service. The contact details can be found on the back ofthis document or on the Internet at /service-contact.Click onto your country’s flag for local support.219 EC declaration of conformity9EC declaration of conformity229 EC declaration of conformity23Testo Inc.40 White Lake RoadSparta, N. J. 07871Phone: 862 354 5001Fax: 862 354 5020Email:**************0970 5502 en-US 01 V02.00。
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The SAA529x, SAA529xA and SAA549x family of microcontrollers are a derivative of the Philips’ industry-standard 80C51 microcontroller and are intended for use as the central control mechanism in a television receiver. They provide control functions for the television system and include an integrated teletext function. The teletext hardware has the capability of decoding and displaying both 525-line and 625-line World System Teletext. The same display hardware is used both for Teletext and On-Screen Display, which means that the display features give greater flexibility to differentiate the TV set. The family offers both 1 page and 10 page Teletext capability, in a range of ROM sizes. Increasing display capability is offered from the SAA5290 to the SAA5497.
元器件交易网
INTEGRATED CIRCUITS
DATA SHEET
SAA5x9x family Economy teletext and TV microcontrollers
Preliminary specification File under Integrated Circuits, IC02 1997 Jul 07
1997 Jul 07
元器件交易网
Philips Semiconductors
Preliminary specification
Economy teletext and TV microcontrollers
1 1.1 Display
• 1 page and 10 page Teletext version • Acquisition of 525-line and 625-line World System Teletext, with automatic selection • Acquisition and decoding of VPS data (PDC system A) • Page clearing in under 64 µs (1 TV line) • Separate storage of extension packets (SAA5296/7, SAA5296/7A and SAA5496/7) • Inventory of transmitted Teletext pages stored in the Transmitted Page Table (TPT) and Subtitle Page Table (SPT) (SAA5296/7, SAA5296/7A and SAA5496/7) • Automatic detection of FASTEXT transmission • Real-time packet 26 engine for processing accented (and other) characters • Comprehensive Teletext language coverage • Video signal quality detector.
• 80C51 microcontroller core • 16/32/64 kbyte mask programmed ROM • 256/768/1280 bytes of microcontroller RAM • Eight 6-bit Pulse Width Modulator (PWM) outputs for control of TV analog signals • One 14-bit PWM for Voltage Synthesis Tuner control • Four 8-bit Analog-to-Digital converters • 2 high current open-drain outputs for directly driving LED’s etc. • I2C-bus interface • External ROM and RAM capability on QFP80 package version. 1.3 Teletext acquisition
SAA5x9x family
Language group identification 525-line operation On Screen Display characters Control characters Quadruple width display (SAA549x) Page attributes Display modes On Screen Display boxes Screen colour Redefinable Colours (SAA549x) Cursor Other display features Display timing Horizontal timing Vertical timing Display position Clock generator CHARACTER SETS Pan-European Russian Greek/Turkish Arabic/English/French Thai Arabic/Hebrew LIMITING VALUES CHARACTERISTICS CHARACTERISTICS FOR THE I2C-BUS INTERFACE QUALITY SPECIFICATIONS APPLICATION INFORMATION EMC GUIDELINES PACKAGE OUTLINES SOLDERING Introduction SDIP QFP DEFINITIONS LIFE SUPPORT APPLICATIONS PURCHASE OF PHILIPS I2C COMPONENTS
元器件交易网
Philips Semiconductors
Preliminary specification
Economy teletext and TV microcontrollers
CONTENTS 1 1.1 1.2 1.3 1.4 1.5 1.6 2 3 4 5 6 6.1 6.2 7 7.1 7.2 7.3 7.4 8 8.1 8.2 8.3 8.4 8.5 8.6 8.7 8.8 8.9 8.10 8.11 8.12 8.13 8.14 8.15 8.16 9 9.1 9.2 9.3 9.4 9.5 9.6 FEATURES General Microcontroller Teletext acquisition Teletext Display Additional features of SAA529xA devices Additional features of SAA549x devices GENERAL DESCRIPTION ORDERING INFORMATION QUICK REFERENCE DATA BLOCK DIAGRAM PINNING INFORMATION Pinning Pin description FUNCTIONAL DESCRIPTION Microcontroller 80C51 Features not supported Additional features Microcontroller interfacing TELETEXT DECODER Data slicer Acquisition timing Teletext acquisition Rolling headers and time Error checking Memory organisation of SAA5296/7, SAA5296/7A and SAA5496/7 Inventory page Memory Organisation of SAA5291, SAA5291A and SAA5491 Packet 26 processing VPS Wide Screen Signalling (SAA529xA and SAA549x only) 525-line world system teletext Fastext detection Page clearing Full channel operation Independent data services (SAA5291, SAA5291A, SAA5491 only) THE DISPLAY Introduction Character matrix East/West selection National option characters The twist attribute On Screen Display symbols 2 9.7 9.8 9.9 9.10 9.11 9.12 9.13 9.14 9.15 9.16 9.17 9.18 9.19 9.20 9.21 9.22 9.23 10 10.1 10.2 10.3 10.4 10.5 10.6 11 12 13 14 15 16 17 18 18.1 18.2 18.3 19 20 21
• Wide Screen Signalling (WSS) bit decoding (line 23). 1.6 Additional features of SAA549x devices