Empiricalreliabilitymodelingfor0.18-μmMOSdevices

Empirical reliability modeling for 0.18-l m MOS devices
Zhi Cui a ,Juin J.Liou
a,*
,Yun Yue b ,Jim Vinson
b
a
School of EE and CS,University of Central Florida,Orlando,FL 32816-2450,USA
b
Intersil Corporation,Palm Bay,FL,USA
Received 2November 2002;received in revised form 14December 2002;accepted 3January 2003
Abstract
This paper presents a simple yet effective approach to modeling empirically the 0.18-l m MOS reliability.Short-term stress data are first measured,and the well-known power law is used to project the MOS long-term degradation and lifetime.These results are then used as the basis for the development of an empirical model to predict the MOS lifetime as a function of drain voltage and channel length.Our study focuses on the worst-case stress condition,and both the linear and saturation operations are considered in the modeling.Very good agreement between the measurements and model calculations has been demonstrated.
Ó2003Elsevier Science Ltd.All rights reserved.
Keywords:MOSFET;Time-dependent degradation law;Reliability;Lifetime prediction
1.Introduction
Long-term hot-carrier induced degradation of MOS devices has become more severe as the device size con-tinues to scale down below 0.1l m.As a consequence,the degree of reliability concern is increased when ad-vanced MOSFETs are used in modern electronics sys-tems.From the designers Õperspective,it is imperative to have a simple and accurate MOS reliability model which can predict the lifetime of MOSFET subject to different bias conditions.
Many physics-based MOS reliability models have been reported in the literature [1,2].These models have the advantages of providing the physical insights into the degradation mechanism in MOS devices,but they tend to have non-straightforward expressions and may not be accurate due to the complicated short-channel and hot-carrier effects in the devices.Empirical models developed based on experimental data,on the other hand,possess simple expressions and provide accurate
predictions,but they need to be re-developed for dif-ferent MOS technologies.
This paper seeks to develop an accurate empirical reliability model for MOS devices fabricated from the 0.18-l m technology.The model will be sufficiently ver-satile to account for the effect of different channel lengths and different bias conditions.To this end,MOS devices having three different channel lengths will be considered,and stress measurements on these devices under different bias conditions will be conducted.The experimental data will then be used as the basis of pa-rameter extraction and empirical model development.2.Measurement procedure
The devices under study are n-channel MOSFETs fabricated from the 0.18-l m CMOS technology,and the following channel lengths are considered:0.5,0.25,and 0.18l m.The channel width is 10l m,and device make-ups include P-well,N-well,threshold-adjust implant,and retrograde doping profiles.These devices are stres-sed over a relatively short period of time at different bias conditions,and the degradation of transconductance G m is measured in both the linear and saturation regions.Based on these short-term stress data,the long-term
*
Corresponding author.Tel.:+1-407-823-5339/2786;fax:+1-407-823-5835.
E-mail address:*************** (J.J.Liou).
0038-1101/03/$-see front matter Ó2003Elsevier Science Ltd.All rights reserved.
doi:10.1016/S0038-1101(03)00006-6
Solid-State Electronics 47(2003)
1515–1522
/locate/sse
degradation and lifetime are then projected based on a time-dependent degradation law.The lifetime is defined as the time when G m degrades10%from its initial value.
To predict the long-term G m degradation and thus the MOS lifetime,we use the well-known power law, which has the form of[3]:
D G m G m ¼C s nð1Þ
An extraction method is needed to determine the values
of the two parameters(C and n)associated with the
power law.The conventional way to do this is to arrange
the short-term stress data on the log–log scale,as shown
in Fig.1(a),and use the least-squarefitting to extract
these parameters.Recently,we have developed an im-
proved extraction method which arranges the short-term
stress data on the exponential–exponential scale[4],as
shown in Fig.1(b).The least-squarefitting is then used
1516Z.Cui et al./Solid-State Electronics47(2003)1515–1522
to extract C and n.n thefigures,the short-term stress data are measured up to50,000s.The different extrac-tion methods will give rise to different parameter values and thus to different long-term degradation results pre-dicted by the power law in(1).Fig.2compares the MOS long-term degradation characteristics(up to200,000s) obtained from measurements(symbols)and predicted from the power law using the conventional and improved extraction methods.Clearly,the improved method gives a much better accuracy than the conventional method. Using the improved extraction method,together with the power law,the lifetime of a MOSFET subject to a particular bias condition can be determined.
3.Empirical model development
Our task here is to develop an empirical reliability model for the0.18-l m NMOS devices having different channel lengths L and different drain voltages V D under the worst-case stress condition.This means that,for a MOS device having a particular L and V D,the stress is done in such a way that the gate voltage V G is adjusted until the substrate current I B is maximum.As such,V G is a hidden variable and will not appear in the empirical model.
Let usfirst focus on the MOS degradation in the linear region(MOS devices stressed under the worst-case and then measured at a drain voltage of0.1V).To de-velop the empirical model,we willfirst look into the relationship between MOS lifetime s and substrate cur-rent I B.It has been observed experimentally that s versus I B characteristics are not a function of L.This is because I B is related to the maximum electricfield E m near the drain junction,which gives a direct measure of the stress level[5].Once I B isfixed,E m is almost insensitive to the channel length L.To illustrate this,we have carried out device simulation and shown the electricfield contours in MOS devices having the same I B of4:4Â10À6A,but three different channel lengths of0.18,0.25,and0.5l m in Fig.3(a)–(c),respectively.Note that different drain voltages are needed to arrive at the same substrate current for the MOS devices with three different L.Very similar maximumfields of6:1Â105,6:3Â105,and 6:4Â105V/cm are found in these devices,thus clearly indicating that E m can be considered independent of L when I B is constant.I n other words,once I B isfixed,the stress level,and thus the MOS degradation,is almost the same for MOS devices having different L.An expression has been suggested to related the lifetime s and I B[1]: s¼KIÀB
B
ð2Þwhere K and B are constant parameters.We have mea-sured s versus I B characteristics in the linear region and used the data to extract the parameters K and B asso-ciated with the expression in(2).This yields
s¼4:312Â10À5IÀ1:91898
B
ð3ÞFig.4shows the measured and simulated s versus I B characteristics.Note that the trend is not a function of L.
Our next step is to relate I B and V D.To this end,we have measured I B versus V D characteristics and have
Z.Cui et al./Solid-State Electronics47(2003)1515–15221517
obtained empirical expressions for the three different L considered.The general expression is
I B ¼exp ÀA À
B
V D
ð4Þwhere A and B are )0.4481and 30.77448,)1.1709and 25.64196,and )1.5739and 22.88929for L ¼0:5,0.25,and 0.18l m,respectively.Fig.5shows the measured and simulated I B versus 1=V D characteristics.
Note that the values for the two parameters,A and B ,associated with I B versus 1=V D characteristics are for particular L .We will now develop empirical relation-ships between these parameters and L .Fitting to the measured data,the expressions for A and B are obtained
as
Fig.3.Electric field contours obtained from device simulation for MOS devices having the same substrate current of 4:4Â10À6A,but three different channel length of (a)0.18,(b)0.25,and (c)0.5l m.The maximum fields in the three devices are also indicated.
1518Z.Cui et al./Solid-State Electronics 47(2003)1515–1522
A¼À0:25501À0:8427lnðLÀ0:06585Þð5ÞB¼36:54878ðLÀ0:09393Þ0:19081ð6ÞFig.6(a)and(b)compare the measured andfitting data of A and B,respectively.
We can now combine the above expressions and obtain an empirical model for MOS lifetime as a func-tion of V D and L.Specifically,we put(5)and(6)into(4), and then put the resulting equation into(3).This leads to the following expression for s as a function of V D and L:
Z.Cui et al./Solid-State Electronics47(2003)1515–15221519
s ¼4:31205Â10À5
exp 0:25501"
(
þ0:8421ln ðL À0:06585Þ
À
36:54878ÂðL À0:09393Þ
0:190813
V D
#)À1:91898
ð7Þ
The above equation is for MOS devices operated in the linear ing the same approach,we can also develop an empirical model for MOS devices in the
saturation region (MOS devices stressed under the worst
case and then measured at a drain voltage of 0.9V):
s ¼22:36215exp 0:25501"
(
þ0:8421ln ðL À0:06585Þ
À
36:54878ðL À0:09393Þ0:190813V D
#)À0:94396
ð8Þ
1520Z.Cui et al./Solid-State Electronics 47(2003)1515–1522
Figs.7and8show the measured and simulated s versus 1=V D as a function of L for MOSFETs operated in the linear and saturation regions,respectively.Note that while the majority of lifetimes(open symbols)were ob-tained from the projection of the power law based on short-term stress data,a few lifetimes(closed symbols)were actually long-term stress data measured all the way to the10%G m degradation.Very good agreement be-tween the model and measurements is obtained.
The model developed is highly useful to provide MOS design guide concerning reliability issues.For ex-ample,for a given MOS device and a specific lifetime
Z.Cui et al./Solid-State Electronics47(2003)1515–15221521
time,one can determine the maximum V D allowed to apply to the device,or one can determine the minimum channel length for a known V D and lifetime.Tables1 and2give the specifics of such information.
4.Conclusion
Reliability is a major concern for modern deep-sub-micron MOS devices.I n this study,n-channel MOS-FETs fabricated from the0.18-l m CMOS technology and subjected to different bias conditions were consid-ered.Short-term stress data werefirst measured,and the MOSÕs long-term transconductance degradation and lifetimes were projected from the power law.Fitting to these data,an empirical model for predicting the MOS lifetime as a function of the channel length and drain voltage has been developed.This study provides useful design guides concerning MOS reliability issues,and the approach developed can be readily extended to the empirical modeling of other semiconductor devices. Acknowledgement
This work was supported in part by Intersil Corpo-ration,Palm Bay,Florida.
References
[1]Hu C,Tam SC,Hsu FC,Ko PK,Chan TY,Terrill KW.
Hot-electron induced MOSFET degradation-model,moni-tor and improvement.IEEE Trans Electron Dev1985;32: 375–85.
[2]Bellens R,Heremans P,Groeseneken G,Maes H.On the
channel-length dependence of the hot-carrier degradation of n-channel MOSFETÕs.IEEE Electron Dev Lett1989;10(12): 553–5.
[3]Takeda E,Suzuki N.An empirical model for device
degradation due to hot-carrier injection.IEEE Electron Dev Lett1983;EDL-4:111–3.
[4]Chi Z,Liou JJ,Yue Y.A new extrapolation method for
long-term degradation prediction of deep-submicron MOS-FETs.I EEE Trans.Electron Dev.,accepted subject to revisions,December2002.
[5]Liou JJ,Ortiz-Conde A,Garcia-Sanchez F.Analysis and
design of MOSFETs:modeling,simulation,and parameter extraction.Kluwer Academic Publishers;1998.
Table1
Maximum drain voltage(in V)allowed for the specific lifetime and channel length
V D Lifetime
(years)Length
0.18
l m
0.25
l m
0.35
l m
0.5
l m
Linear region
3 1.729 1.880 2.013 2.143 5 1.695 1.84
4 1.97
5 2.104 10 1.651 1.797 1.92
6 2.053
Saturation region 3 1.569 1.710 1.835 1.958 5 1.513 1.651 1.772 1.893
Table2
Minimum channel length(in l m)allowed for the specific life-time and drain voltage
Channel length Lifetime
(years)
V D
0.9V 1.2V 1.5V 1.8V
Linear region
30.0960.1020.1270.208 50.0960.1040.1320.225 100.0960.1050.1390.252
Saturation region
30.0970.1100.1580.318 50.0980.1140.1750.379 100.0990.1210.2060.483
1522Z.Cui et al./Solid-State Electronics47(2003)1515–1522。