Performing scenario reduction
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专利名称：Performing scenario reduction
发明人：Amir H. Mottaez,Rajinish K. Prasad
申请号：US12795592
申请日：20100607
公开号：US08413099B2
公开日：
20130402
专利内容由知识产权出版社提供
专利附图：
摘要：Some embodiments of the present invention provide techniques and systems for reducing the number of scenarios over which a circuit design is optimized. Each scenario in the set of scenarios can be associated with a process corner, an operating condition, and/or an operating mode. During operation, the system can receive a set of
scenarios over which the circuit design is to be optimized. Next, the system can compute values of constrained objects in the circuit design over the set of scenarios. The system can then determine a subset of scenarios based at least on the values of the constrained objects, so that if the circuit design meets design constraints in each scenario in the subset of scenarios, the circuit design is expected to meet the design constraints in each scenario in the set of scenarios.
申请人：Amir H. Mottaez,Rajinish K. Prasad
地址：Los Altos CA US,Millpitas CA US
国籍：US,US
代理机构：Park, Vaughan, Fleming & Dowler LLP
代理人：Laxman Sahasrabuddhe
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