LM2663中文资料

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和利时LM可编程控制器硬件手册

内容《LM小型可编程控制器硬件手册》是和利时公司对LM系列PLC产品从特性、技术规格等方面进行详细介绍的技术手册，包含了LM小型PLC所有的硬件信息。
第1章从硬件体系结构、编程软件、快速应用等各个方面对LM小型PLC作了概述性介绍。
第2、3章主要针对CPU模块、扩展模块的技术规格、端子定义与接线示意图及等效电路进行了详细阐述。
目录
第 1 章概述 .......................................................................................................... 1
1.1 概述................................................................................................................................................... 1 1.2 硬件体系结构................................................................................................................................... 1
本手册仅供商业用户阅读、查询，在未得到北京和利时系统工程股份有限公司特别授权的情况下，无论出于何种原因和目的，均不得用任何电子或机械方法，以任何形式复制和传递本手册的内容。否则本公司将依法追究法律责任。
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LM883AH中文资料

Parameter
Conditions
LM741A/LM741E
LM741
LM741C
Units
Min Typ Max Min Typ Max Min Typ Max
Large Signal Voltage Gain TA = 25˚C, RL ≥ 2 kΩ
VS = ±20V, VO = ±15V
50
LM741A/LM741E
LM741
LM741C
Units
Min Typ Max Min Typ Max Min Typ Max
0.8 3.0
1.0 5.0
2.0 6.0 mV mV
4.0
mV
6.0
7.5 mV
15
µV/˚C
±10
±15
±15
mV
3.0 30 70 0.5
20 200 85 500
20 200 nA 300 nA nA/˚C
Input Voltage (Note 3)
±15V
±15V
±15V
±15V
Output Short Circuit Duration
Continuous
Continuous
Continuous
Continuous
Operating Temperature Range
−55˚C to +125˚C
0˚C to +70˚C
(Note 6)
LM741A
LM741E
LM741
LM741C
Supply Voltage
±22V
±22V
±22V
±18V
Power Dissipation (Note 2)

LM2662 data sheet芯片数据表单

June 9, 2008 LM2662/LM2663Switched Capacitor Voltage ConverterGeneral DescriptionThe LM2662/LM2663 CMOS charge-pump voltage converterinverts a positive voltage in the range of 1.5V to 5.5V to thecorresponding negative voltage. The LM2662/LM2663 usestwo low cost capacitors to provide 200 mA of output currentwithout the cost, size, and EMI related to inductor based con-verters. With an operating current of only 300 μA and oper-ating efficiency greater than 90% at most loads, the LM2662/LM2663 provides ideal performance for battery powered sys-tems. The LM2662/LM2663 may also be used as a positivevoltage doubler.The oscillator frequency can be lowered by adding an externalcapacitor to the OSC pin. Also, the OSC pin may be used todrive the LM2662/LM2663 with an external clock. ForLM2662, a frequency control (FC) pin selects the oscillatorfrequency of 20 kHz or 150 kHz. For LM2663, an externalshutdown (SD) pin replaces the FC pin. The SD pin can beused to disable the device and reduce the quiescent currentto 10 μA. The oscillator frequency for LM2663 is 150 kHz.Features■Inverts or doubles input supply voltage■Narrow SO-8 Package■ 3.5Ω typical output resistance■86% typical conversion efficiency at 200 mA■(LM2662) selectable oscillatorfrequency: 20 kHz/150 kHz■(LM2663) low current shutdown modeApplications■Laptop computers■Cellular phones■Medical instruments■Operational amplifier power supplies■Interface power supplies■Handheld instrumentsBasic Application CircuitsVoltage Inverter10000301Positive Voltage Doubler10000302Splitting VINin Half10000303© 2008 National Semiconductor LM2662/LM2663 Switched Capacitor Voltage ConverterAbsolute Maximum Ratings (Note 1)If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications.Supply Voltage (V+ to GND, or GND to OUT)6V LV (OUT − 0.3V) to (GND + 3V)FC, OSC, SD The least negative of (OUT − 0.3V)or (V+ − 6V) to (V+ + 0.3V)V+ and OUT Continuous Output Current 250 mA Output Short-Circuit Duration to GND (Note 2) 1 sec.Power Dissipation (T A = 25°C) (Note 3)735 mWT J Max (Note 3)150°CθJA (Note 3)170°C/WOperating Ambient Temperature Range −40°C to +85°C Operating Junction Temperature Range −40°C to +105°C Storage Temperature Range −65°C to +150°C Lead Temperature (Soldering, 10 seconds)300°C ESD Rating 2 kVElectrical CharacteristicsLimits in standard typeface are for T J = 25°C, and limits in boldface type apply over the full Operating Junction TemperatureRange. Unless otherwise specified: V+ = 5V, FC = Open, C 1 = C 2 = 47 μF.(Note 4)Symbol ParameterConditionMin Typ Max Units V+Supply VoltageR L = 1kInverter, LV = Open 3.5 5.5 Inverter, LV = GND 1.5 5.5VDoubler, LV = OUT 2.5 5.5 I Q Supply Current No Load FC = V+ (LM2662)1.34mALV = Open SD = Ground (LM2663)FC = Open0.30.8I SD Shutdown Supply Current10μA (LM2663)V SD Shutdown Pin Input Voltage Shutdown Mode 2.0(Note 5)V (LM2663)Normal Operation0.3I L Output Current200mA R OUT Output Resistance (Note 6)I L = 200 mA 3.57Ωf OSC Oscillator Frequency (Note 7)OSC = Open FC = Open 720kHzFC = V+55150 f SW Switching Frequency (Note 8)OSC = Open FC = Open 3.510 kHzFC = V+27.575 I OSC OSC Input Current FC = Open ±2 μAFC = V+±10 P EFF Power Efficiency R L (500) between V + and OUT 9096 %I L = 200 mA to GND 86 V OEFFVoltage Conversion EfficiencyNo Load9999.96%Note 1:Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device beyond its rated operating conditions.Note 2:OUT may be shorted to GND for one second without damage. However, shorting OUT to V+ may damage the device and should be avoided. Also, for temperatures above 85°C, OUT must not be shorted to GND or V+, or device may be damaged.Note 3:The maximum allowable power dissipation is calculated by using P DMax = (T JMax − T A )/θJA , where T JMax is the maximum junction temperature, T A is the ambient temperature, and θJA is the junction-to-ambient thermal resistance of the specified package.Note 4:In the test circuit, capacitors C 1 and C 2 are 47 μF, 0.2Ω maximum ESR capacitors. Capacitors with higher ESR will increase output resistance, reduce output voltage and efficiency.Note 5:In doubling mode, when V out > 5V, minimum input high for shutdown equals V out − 3V.Note 6:Specified output resistance includes internal switch resistance and capacitor ESR.Note 7:For LM2663, the oscillator frequency is 150 kHz.Note 8:The output switches operate at one half of the oscillator frequency, f OSC = 2f SW . 2L M 2662/L M 2663Test Circuits1000030410000305FIGURE 1. LM2662 and LM2663 Test CircuitsTypical Performance Characteristics(Circuit of Figure 1)Supply Current vsSupply Voltage10000337Supply Current vsOscillator Frequency10000338Output SourceResistance vs SupplyVoltage10000339Output SourceResistance vsTemperature10000340LM2662/LM2663Output Source Resistance vs Temperature10000341Efficiency vs LoadCurrent10000342Output Voltage Drop vs Load Current 10000343Efficiency vs Oscillator Frequency10000344Output Voltage vs Oscillator Frequency10000345Oscillator Frequencyvs External Capacitance10000346 4L M 2662/L M 2663Oscillator Frequencyvs Supply Voltage10000347Oscillator Frequencyvs Supply Voltage10000348Oscillator Frequencyvs Temperature10000349Oscillator Frequencyvs Temperature10000350Shutdown SupplyCurrent vsTemperature(LM2663 Only)10000351 LM2662/LM2663Connection Diagrams8-Lead SO (M)1000032010000321Top ViewOrder Number LM2662M, LM2663M See NS Package Number M08APin DescriptionsPin NameFunctionVoltage InverterVoltage Doubler1FC Frequency control for internal oscillator:Same as inverter.(LM2662)FC = open, f OSC = 20 kHz (typ);FC = V+, f OSC = 150 kHz (typ);FC has no effect when OSC pin is driven externally.1SD (LM2663)Shutdown control pin, tie this pin to the ground in normal operation.Same as inverter.2CAP+Connect this pin to the positive terminal of charge-pump capacitor.Same as inverter.3GND Power supply ground input.Power supply positive voltage input.4CAP−Connect this pin to the negative terminal of charge-pump capacitor.Same as inverter.5OUT Negative voltage output.Power supply ground input.6LVLow-voltage operation input. Tie LV to GND when input voltage is less than 3.5V. Above 3.5V, LV can beconnected to GND or left open. When driving OSC with an external clock, LV must be connected to GND.LV must be tied to OUT.7OSCOscillator control input. OSC is connected to an internal 15 pF capacitor. An external capacitor can be connected to slow the oscillator. Also, an external clock can be used to drive OSC.Same as inverter except that OSC cannot be driven by an external clock.8V+Power supply positive voltage input.Positive voltage output.Circuit DescriptionThe LM2662/LM2663 contains four large CMOS switches which are switched in a sequence to invert the input supply voltage. Energy transfer and storage are provided by external capacitors. Figure 2 illustrates the voltage conversion scheme. When S 1 and S 3 are closed, C 1 charges to the supply voltage V+. During this time interval switches S 2 and S 4 are open. In the second time interval, S 1 and S 3 are open and S 2 and S 4 are closed, C 1 is charging C 2. After a number of cycles, the voltage across C 2 will be pumped to V+. Since the anode of C 2 is connected to ground, the output at the cathode of C 2 equals −(V+) assuming no load on C 2, no loss in the switches, and no ESR in the capacitors. In reality, the chargetransfer efficiency depends on the switching frequency, the on-resistance of the switches, and the ESR of the capacitors. 6L M 2662/L M 266310000322FIGURE 2. Voltage Inverting PrincipleApplication InformationSIMPLE NEGATIVE VOLTAGE CONVERTERThe main application of LM2662/LM2663 is to generate a negative supply voltage. The voltage inverter circuit uses only two external capacitors as shown in the Basic Application Circuits. The range of the input supply voltage is 1.5V to 5.5V.For a supply voltage less than 3.5V, the LV pin must be con-nected to ground to bypass the internal regulator circuitry.This gives the best performance in low voltage applications.If the supply voltage is greater than 3.5V, LV may be con-nected to ground or left open. The choice of leaving LV open simplifies the direct substitution of the LM2662/LM2663 for the LMC7660 Switched Capacitor Voltage Converter.The output characteristics of this circuit can be approximated by an ideal voltage source in series with a resistor. The volt-age source equals −(V+). The output resistance R out is a function of the ON resistance of the internal MOS switches,the oscillator frequency, and the capacitance and ESR of C 1and C 2. Since the switching current charging and discharging C 1 is approximately twice as the output current, the effect of the ESR of the pumping capacitor C 1 is multiplied by four in the output resistance. The output capacitor C 2 is charging and discharging at a current approximately equal to the output current, therefore, its ESR only counts once in the output re-sistance. A good approximation is:where R SW is the sum of the ON resistance of the internal MOS switches shown in Figure 2.High value, low ESR capacitors will reduce the output resis-tance. Instead of increasing the capacitance, the oscillator frequency can be increased to reduce the 2/(f osc × C 1) term.Once this term is trivial compared with R SW and ESRs, further increasing in oscillator frequency and capacitance will be-come ineffective.The peak-to-peak output voltage ripple is determined by the oscillator frequency, and the capacitance and ESR of the out-put capacitor C 2:Again, using a low ESR capacitor will result in lower ripple.POSITIVE VOLTAGE DOUBLERThe LM2662/LM2663 can operate as a positive voltage dou-bler (as shown in the Basic Application Circuits). The doubling function is achieved by reversing some of the connections tothe device. The input voltage is applied to the GND pin with an allowable voltage from 2.5V to 5.5V. The V+ pin is used as the output. The LV pin and OUT pin must be connected to ground. The OSC pin can not be driven by an external clock in this operation mode. The unloaded output voltage is twice of the input voltage and is not reduced by the diode D 1's for-ward drop.The Schottky diode D 1 is only needed for start-up. The internal oscillator circuit uses the V+ pin and the LV pin (connected to ground in the voltage doubler circuit) as its power rails. Volt-age across V+ and LV must be larger than 1.5V to insure the operation of the oscillator. During start-up, D 1 is used to charge up the voltage at V+ pin to start the oscillator; also, it protects the device from turning-on its own parasitic diode and potentially latching-up. Therefore, the Schottky diode D 1should have enough current carrying capability to charge the output capacitor at start-up, as well as a low forward voltage to prevent the internal parasitic diode from turning-on. A Schottky diode like 1N5817 can be used for most applica-tions. If the input voltage ramp is less than 10V/ms, a smaller Schottky diode like MBR0520LT1 can be used to reduce the circuit size.SPLIT V+ IN HALFAnother interesting application shown in the Basic Application Circuits is using the LM2662/LM2663 as a precision voltage divider. Since the off-voltage across each switch equals V IN /2, the input voltage can be raised to +11V.CHANGING OSCILLATOR FREQUENCYFor the LM2662, the internal oscillator frequency can be se-lected using the Frequency Control (FC) pin. When FC is open, the oscillator frequency is 20 kHz; when FC is connect-ed to V+, the frequency increases to 150 kH z. A higher oscillator frequency allows smaller capacitors to be used for equivalent output resistance and ripple, but increases the typ-ical supply current from 0.3 mA to 1.3 mA.The oscillator frequency can be lowered by adding an external capacitor between OSC and GND (See typical performance characteristics). Also, in the inverter mode, an external clock that swings within 100 mV of V+ and GND can be used to drive OSC. Any CMOS logic gate is suitable for driving OSC.LV must be grounded when driving OSC. The maximum ex-ternal clock frequency is limited to 150 kHz.The switching frequency of the converter (also called the charge pump frequency) is half of the oscillator frequency.Note:OSC cannot be driven by an external clock in the voltage-doublingmode.TABLE 1. LM2662 Oscillator Frequency SelectionFC OSCOscillator Open Open 20 kHz V+Open150 kHz Open or V+External CapacitorSee Typical Performance Characteristics N/AExternal ClockExternal Clock(inverter mode only)Frequency7LM2662/LM2663TABLE 2. LM2663 Oscillator Frequency SelectionOSCOscillatorOpen 150 kHzExternal Capacitor See Typical PerformanceCharacteristicsExternal Clock External Clock Frequency (inverter mode only)SHUTDOWN MODEFor the LM2663, a shutdown (SD) pin is available to disable the device and reduce the quiescent current to 10 μA. Apply-ing a voltage greater than 2V to the SD pin will bring the device into shutdown mode. While in normal operating mode, the SD pin is connected to ground.CAPACITOR SELECTIONAs discussed in the Simple Negative Voltage Converter sec-tion, the output resistance and ripple voltage are dependent on the capacitance and ESR values of the external capaci-tors. The output voltage drop is the load current times the output resistance, and the power efficiency isWhere I Q (V+) is the quiescent power loss of the IC device,and I L 2R OUT is the conversion loss associated with the switch on-resistance, the two external capacitors and their ESRs.Low ESR capacitors (Table 3) are recommended for both ca-pacitors to maximize efficiency, reduce the output voltage drop and voltage ripple. For convenience, C 1 and C 2 are usu-ally chosen to be the same.The output resistance varies with the oscillator frequency and the capacitors. In Figure 3, the output resistance vs. oscillator frequency curves are drawn for four difference capacitor val-ues. At very low frequency range, capacitance plays the most important role in determining the output resistance. Once the frequency is increased to some point (such as 100 kHz for the 47 μF capacitors), the output resistance is dominated by the ON resistance of the internal switches and the ESRs of the external capacitors. A low value, smaller size capacitor usu-ally has a higher ESR compared with a bigger size capacitor of the same type. Ceramic capacitors can be chosen for their lower ESR. As shown in Figure 3, in higher frequency range,the output resistance using the 10 μF ceramic capacitors is close to these using higher value tantalum capacitors.10000336FIGURE 3. Output Source Resistance vs Oscillator FrequencyTABLE 3. Low ESR Capacitor ManufacturersManufacturer PhoneCapacitor TypeNichicon Corp.(708)-843-7500PL, PF series, through-hole aluminum electrolytic AVX Corp.(803)-448-9411TPS series, surface-mount tantalumSprague (207)-324-4140593D, 594D, 595D series, surface-mount tantalum Sanyo (619)-661-6835OS-CON series, through-hole aluminum electrolytic Murata (800)-831-9172Ceramic chip capacitors Taiyo Yuden (800)-348-2496Ceramic chip capacitors Tokin(408)-432-8020Ceramic chip capacitors 8L M 2662/L M 2663Other ApplicationsPARALLELING DEVICESAny number of LM2662s (or LM2663s) can be paralleled to reduce the output resistance. Each device must have its own pumping capacitor C 1, while only one output capacitor C out is needed as shown in Figure 4. The composite output resis-tance is:10000324FIGURE 4. Lowering Output Resistance by Paralleling DevicesCASCADING DEVICESCascading the LM2662s (or LM2663s) is an easy way to pro-duce a greater negative voltage (as shown in Figure 5). If n is the integer representing the number of devices cascaded, the unloaded output voltage V out is (−nV in ). The effective output resistance is equal to the weighted sum of each individual device:A three-stage cascade circuit shown in Figure 6 generates −3V in , from V in .Cascading is also possible when devices are operating in doubling mode. In Figure 7, two devices are cascaded to generate 3V in .An example of using the circuit in Figure 6 or Figure 7 is gen-erating +15V or −15V from a +5V input.Note that, the number of n is practically limited since the in-creasing of n significantly reduces the efficiency and increas-es the output resistance and output voltage ripple.10000325FIGURE 5. Increasing Output Voltage by Cascading DevicesLM2662/LM266310000326FIGURE 6. Generating −3Vinfrom +Vin10000327FIGURE 7. Generating +3Vinfrom +VinREGULATING VoutIt is possible to regulate the output of the LM2662/LM2663 byuse of a low dropout regulator (such as LP2986). The wholeconverter is depicted in Figure 8. This converter can give aregulated output from −1.5V to −5.5V by choosing the properresistor ratio:where, Vref= 1.23VThe error flag on pin 7 of the LP2986 goes low when the reg-ulated output at pin 5 drops by about 5% below nominal. TheLP2986 can be shutdown by taking pin 8 low. The less than1 μA quiescent current in the shutdown mode is favorable forbattery powered applications.10LM2662/LM266310000328 FIGURE 8. Combining LM2662/LM2663 with LP2986 to Make a Negative Adjustable RegulatorAlso, as shown in Figure 9 by operating the LM2662/LM2663 in voltage doubling mode and adding a low dropout regulator (such as LP2986) at the output, we can get +5V output from an input as low as +3.3V.10000329FIGURE 9. Generating +5V from +3.3V Input Voltage LM2662/LM2663Physical Dimensions inches (millimeters) unless otherwise noted8-Lead SO (M)Order Number LM2662M or LM2663MNS Package Number M08A 12L M 2662/L M 2663LM2662/LM2663 NotesNotesL M 2662/L M 2663 S w i t c h e d C a p a c i t o r V o l t a g e C o n v e r t e rFor more National Semiconductor product information and proven design tools, visit the following Web sites at:ProductsDesign SupportAmplifiers /amplifiers WEBENCH /webench Audio/audio Analog University /AU Clock Conditioners /timing App Notes /appnotes Data Converters /adc Distributors /contacts Displays /displays Green Compliance /quality/green Ethernet /ethernet Packaging/packaging Interface /interface Quality and Reliability /quality LVDS/lvds Reference Designs /refdesigns Power Management /power Feedback /feedback Switching Regulators /switchers LDOs /ldo LED Lighting /led PowerWise/powerwise Serial Digital Interface (SDI)/sdiTemperature Sensors /tempsensors Wireless (PLL/VCO)/wirelessTHE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY OR COMPLETENESS OF TH E CONTENTS OF TH IS PUBLICATION AND RESERVES TH E RIGH T TO MAKE CH ANGES TO SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITH OUT NOTICE. NO LICENSE, WH ETH ER EXPRESS,IMPLIED, ARISING BY ESTOPPEL OR OTH ERWISE, TO ANY INTELLECTUAL PROPERTY RIGH TS IS GRANTED BY TH IS DOCUMENT.TESTING AND OTH ER QUALITY CONTROLS ARE USED TO TH E EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT NATIONAL’S PRODUCT WARRANTY. EXCEPT WH ERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL PARAMETERS OF EACH PRODUCT IS NOT NECESSARILY PERFORMED. NATIONAL ASSUMES NO LIABILITY FOR APPLICATIONS ASSISTANCE OR BUYER PRODUCT DESIGN. BUYERS ARE RESPONSIBLE FOR TH EIR PRODUCTS AND APPLICATIONS USING NATIONAL COMPONENTS. PRIOR TO USING OR DISTRIBUTING ANY PRODUCTS TH AT INCLUDE NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING AND OPERATING SAFEGUARDS.EXCEPT AS PROVIDED IN NATIONAL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NATIONAL ASSUMES NO LIABILITY WH ATSOEVER, AND NATIONAL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO TH E SALE AND/OR USE OF NATIONAL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCH ANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGH T OR OTH ER INTELLECTUAL PROPERTY RIGHT.LIFE SUPPORT POLICYN ATION AL’S PRODUCTS ARE N OT AUTHORIZED FOR USE AS CRITICAL COMPON EN TS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AN D GEN ERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness.National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders.Copyright© 2008 National Semiconductor CorporationFor the most current product information visit us at National Semiconductor Americas Technical Support CenterEmail: support@ Tel: 1-800-272-9959National Semiconductor Europe Technical Support CenterEmail: europe.support@ German Tel: +49 (0) 180 5010 771English Tel: +44 (0) 870 850 4288National Semiconductor Asia Pacific Technical Support Center Email: ap.support@National Semiconductor Japan Technical Support Center Email: jpn.feedback@。

lm2596-3.3 LM2596-ADJ LM2596-12 LV2596-3.3 中文资料

2.0
V(min)
5
μA
15
μA(max)
0.02
μA
5
μA(max)
注 2：典型值是指在 25℃下的数值，代表最常见的情况。注 3：所有的极限参数都必须适合于室温（用正常字体表示）和极限温度（用带下划线的粗斜体字表示），所有室
温下的极限参数都是经过测试得出的，所有的极限温度下的极限参数都可以通过使用相关的标准静态质量控制方法来加以保证。注 4：二极管、电感、输入和输出端的电容以及调节输出电压的电阻等外接元件可能会影响开关调节器的系统性能。当 LM2596 用在如图 1 所示测试电路中时，其系统性能如电气特性中系统参量所示。注 5：当第二级电流极限功能启动时，开关频率会有所下降，下降的程度取决于过电流的严重程度。注 6：输出管脚不连接电感、电容或二极管。注 7：把反馈管脚和输出管脚断开，把反馈管脚连到 0V，以强制输出开关晶体管导通。注 8：把反馈管脚和输出管脚断开，把反馈管脚连到 12V（当 VOUT=3.3V、5V 或 ADJ 时）或 15V（当 VOUT=12V 时），以强制输出开关晶体管截止。注 9：VIN=40V 注 10：环境热阻（不外加散热片）是指 TO-220 封装的 LM2596 垂直焊接在覆盖有面积约为 1 平方英寸铜箔的 PCB 上所对应的值。注 11：TO-263 封装的 LM2596 垂直焊接在覆盖有面积约为 0.5 平方英寸铜箔的单面 PCB 上所对应的环境热阻。注 12：TO-263 封装的 LM2596 垂直焊接在覆盖有面积约为 2.5 平方英寸铜箔的单面 PCB 上所对应的环境热阻。注 13：TO-263 封装的 LM2596 垂直焊接在覆盖有面积约为 3 平方英寸铜箔的双面 PCB 上所对应的环境热阻，而 PCB 的另一面覆盖有面积约为 16 平方英寸铜箔。注14： LM2596T-3.3, LM2596T-5.0, LM2596T-12， LM2596T-ADJ为TO-220封装（DIP）； LM2596S-3.3, LM2596S-5.0,LM2596S-12， LM2596S-ADJ为TO-263封装（SMT）。

高速光耦6N137HCPL2601，HCPL2611，HCPL2630，HCPL2631中文资料

高速光耦6N137HCPL2601，HCPL2611，HCPL2630，HCPL2631中文资料高速光耦6N137/HCPL2601，HCPL2611，HCPL2630，HCPL2631中文资料常用高速光电耦合器型号：单通道： 6N137 ， HCPL2601 ， HCPL2611双通道： HCPL2630 ， HCPL2631高速10MBit / s的逻辑门光电作用：6N137/HCPL2601，HCPL2611，HCPL2630，HCPL2631是高速光电耦合器内部结构框图6N137/HCPL2601，HCPL2611，HCPL2630，HCPL2631的内部结构原理如下图所示，信号从脚2和脚3输入，发光二极管发光，经片内光通道传到光敏二极管，反向偏置的光敏管光照后导通，经电流-电压转换后送到与门的一个输入端，与门的另一个输入为使能端，当使能端为高时与门输出高电平，经输出三极管反向后光电隔离器输出低电平。

当输入信号电流小于触发阈值或使能端为低时，输出高电平，但这个逻辑高是集电极开路的，可针对接收电路加上拉电阻或电压调整电路。

引脚图原理如上图所示，若以脚2为输入，脚3接地，则真值表如附表所列，这相当于非门的传输，若希望在传输过程中不改变逻辑状态，则从脚3输入，脚2接高电平。

6N137/HCPL2601，HCPL2611，HCPL2630，HCPL2631真值表真值表功能（正逻辑）高速光耦6N137/HCPL2601，HCPL2611，HCPL2630，HCPL2631参数绝对最大额定值（Ta= 25 ℃除非另有说明）：建议操作条件：电学特性（Ta=0至70 ，除非另有规定）单独的组件特征：开关特性 (TA= -40℃ to 85℃, VCC= 5V, IF= 7.5mA 除非另有说明)：电气特性（续）转移特性(TA = -40 to 85℃ 除非另有说明)隔离特性（Ta= -40 ℃至85 ℃ ，除非另有说明. ）：波形图测试电路和波形 tPLH, tPHL, tr and tf测试电路tEHL和tELHTAG标签：HCPL26HCPL2631HCPL2630资料中文顶一下(1)100.00%踩一下(0)0.00%------分隔线----------------------------。

LM5033中文资料

LM5033100V Push-Pull Voltage Mode PWM ControllerGeneral DescriptionThe LM5033High Voltage PWM controller contains all the features needed to implement Push-Pull,Half-Bridge,and Full-Bridge topologies.Applications include closed loop volt-age mode converters with a highly regulated output voltage,or an open loop "DC transformer"such as an Intermediate Bus Converter (IBC)with an efficiency >95%.The small 10pin LLP-10package with exposed pad provides for efficient thermal management.Two alternating gate driver outputs with a guaranteed deadtime are provided.The LM5033in-cludes a start-up regulator that operates over a wide input range of 15V to 100V.Additional features include:precision voltage reference output,current limit detection,remote shutdown,softstart,sync capability and thermal shutdown.This high speed IC has total propagation delays less than 100ns and a 1MHz capable oscillator.Featuresn Internal high voltage (100V)start-up regulator n Single resistor oscillator setting n Synchronizablen Precision reference output n Adjustable soft-start n Over-current protectionn Direct optocoupler interface n 1.5A peak gate drivers nThermal ShutdownApplicationsn Intermediate DC/DC Bus Converter n Telecommunication Power Converters n Industrial Power Converters n+42V Automotive SystemsPackagen LLP-10Connection Diagram2003540110-Lead Plastic,Dual,LLPOrdering InformationOrder Number Package Type NSC Package Drawing Supplied AsLM5033SD LLP-10(4x 4mm)SDC10A 1000Units on Tape and Reel LM5033SDXLLP-10(4x 4mm)SDC10A4500Units on Tape and ReelApril 2004LM5033100V Push-Pull Voltage Mode PWM Controller©2004National Semiconductor Corporation Pin DescriptionPIN NAME DESCRIPTIONAPPLICATION INFORMATION1Vin Input VoltageInput to the start-up regulator.Input range is 15V to 90V,with transient capability to 100V .2REF 2.5V precision reference output Sink only,requires an external pull-up resistor.This can be used as a reference for external circuitry.3COMPPWM InputFeedback to the PWM comparator’s inverting input,through a 3:1divider.The output duty cycle increases as this pin’s voltage increases.Internally there is a 5k Ωpullup to +5.2V.4VCC9.6V output from the internal high voltage series pass regulatorAn external voltage (10V -15V)can be applied to this pin to shutdown the internal regulator,thereby reducing internal dissipation.An internal diode connects Vcc to Vin.5OUT1Gate Driver Output #1Alternating output gate driver,which can source and sink 1.5A.6OUT2Gate Driver Output #2Alternating output gate driver,which can source and sink 1.5A.7GNDGround pin for all internal circuitryConnections to external ground must be done with care for optimum performance.See the Functional Description and Applications Section for more information.8CS Current sense inputCurrent sense input for the current limit detection.If CS exceeds 0.5V the outputs are disabled and the softstart pin is discharged to ground.9R T /SYNCOscillator timing resistor pin and synchronization input An external resistor to ground sets the oscillator frequency.This pin will also accept ac-coupled synchronization pulses from an external source.10SSSoftstart pinAn internal 10µA current source and an external capacitor set the soft-start timing.This pin can be externally pulled to below 0.5V to disable the output drivers.L M 5033 2LM5033 Block DiagramFunctional Block Diagram Array20035402FIGURE1.3Absolute Maximum Ratings (Note 1)If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications.V IN to GND -0.3V to 100V V CC to GND -0.3V to 16V Rt/Sync to GND -0.3V to 5.5V Pins 3,8,10to GND -0.3V to 7.0VESD Rating (Note 3)Human Body Model 2kVStorage Temperature Range -65˚C to 150˚C Junction Temperature 150˚CPower Dissipation (Note 2)Internally LimitedOperating Ratings (Note 1)V IN Voltage (Pin1)15to 90V Operating Junction Temperature-40˚C to 125˚CElectrical CharacteristicsSpecifications with standard typeface are for T J =25˚C,and those with boldface type apply over full Operating Junction Temperature range .V IN =48V,V CC =10V applied externally,R T =26.7k Ω,unless otherwise stated.See (Note 4)and (Note 5).Symbol Parameter ConditionsMin Typ Max Units V CC Startup Regulator (Pins 1,4)V CC Reg V CC Voltage Pin 4open9.29.610.0V Icc-outV CC Current LimitOut1,Out2disabled.Ext.supply to Vcc disconnected.2034mAIinStartup Regulator Current into V INNormal Operation V IN =90V150500µA Ext.V CC Supply Disconnected andOutput Load =1800pF 7mASS Pin =0V3mA UVTV CC Undervoltage Threshold (increasing V CC )VccReg -300mV VccReg -100mVVUVT Hysteresis (decreasing V CC )2.3 2.83.3Icc-inSupply Current from external source to V CCSS Pin =0V23mASS Pin =open and Output Load =1800pF 72.5V Reference (Pin 2)VrefOutput voltage Pin 2sink current =5mA2.44 2.50 2.56V Current sink capability5.013mACurrent Sense (Pin 8)CSThreshold voltage 0.450.500.55V CS delay to outputPin 8taken from zero to 0.6V.Time for Out1or Out2to fall to 90%of Vcc.CLoad =0@Out1,Out230nsCurrent sink capability (clocked)Pin 8≤0.3V36mASoftstart (Pin 10)Softstart current source71013µA Softstart to Comp offset0.250.500.75V Open Circuit Voltage5.0VL M 5033 4Electrical Characteristics(Continued)Specifications with standard typeface are for T J=25˚C,and those with boldface type apply over full Operating Junction Temperature range.V IN=48V,V CC=10V applied externally,R T=26.7kΩ,unless otherwise stated.See(Note4)and(Note 5).Symbol Parameter Conditions Min Typ Max Units Oscillator(Pin9)Fs1Internal frequency Rt=26.7kΩ175200225kHz Fs2Internal frequency Rt=8.2kΩ600kHz Vsync Sync threshold 3.2 3.8V R t/Sync DC voltage 2.0V PWM Comparator Input(Pin3)t PWM Gain from pin3toPWM comparator0.34V/VMaximum duty cycle at Out1,Out2See PWM Comparatortext100x(0.5T S-T D)/T S%Minimum duty cycle atOut1,Out2Pin3=0V.0% Open Circuit Voltage 4.2 5.2 6.2VShort circuit current Pin3=0V0.6 1.1 1.5mAOutput Drivers(Pin5,6)Deadtime(T D)CLoad=0@OUT1,OUT2.Time measuredfrom10%of fallingoutput to10%of risingoutput.85135185nsRise Time C Load=1nF16nsFall Time C Load=1nF16nsOutput High Voltage Iout=50mA(source)Vcc-0.75Vcc-0.25VOutput Low Voltage Iout=100mA(sink)0.250.75VMax.source current 1.5AMax.sink current 1.5AThermal ShutdownT SD Shutdown temperature165˚C Shutdown temperaturehysteresis15˚CThermal ResistanceθJA Junction to Ambient SDC10A Package38˚C/WNote1:Absolute Maximum Ratings are limits beyond which damage to the device may occur.Operating Ratings are conditions under which operation of the deviceis intended to be functional.For guaranteed specifications and test conditions,see the Electrical Characteristics.Note2:The maximum allowable power dissipation is a function of the maximum allowed junction temperature(T J(max)),the ambient temperature(T A),and thejunction-to-ambient thermal resistance(θJA).The maximum allowable power dissipation can be calculated from PD=(T J(max)-T A)/θJA.Excessive power dissipationwill cause the thermal shutdown to activate.Note3:The human body model is a100pF capacitor discharged through a1.5kΩresistor into each pin.Note4:Min and Max limits are100%production tested at25˚C.Limits over the operating temperature range are guaranteed through correlation using StatisticalQuality Control(SQC)methods.Limits are used to calculate National’s Average Outgoing Quality Level(AOQL).Note5:Typical specifications represent the most likely parametric norm at25˚C operation.LM50335Typical Performance CharacteristicsV CC vs V INV CC vs I CC (V IN =48V)2003540320035404Oscillator Frequency vs R TOscillator Frequency vs TemperatureR T =26.7k Ω2003540520035406Soft Start Current vs Temperature Dead Time vs Temperature2003540720035408L M 5033 6Typical Performance Characteristics(Continued)Output Duty Cycle vs Comp VoltageR T=16.5kΩV REF vs I REF2003540920035410I CC vs V CC(V CC Powered Externally)I IN vs V IN(V CC Not Powered Externally)2003541120035412LM5033 7Functional DescriptionThe LM5033High Voltage PWM controller contains all of the features needed to implement Push-Pull and Bridge topolo-gies,using voltage-mode control in a small 10pin package.Features included are:startup regulator,precision 2.5V ref-erence output,current limit detection,alternating gate driv-ers,sync capability,thermal shutdown,softstart,and remote shutdown.This high speed IC has total propagation delays <100ns.These features simplify the design of an open loop DC-DC converter,or a voltage controlled closed loop con-verter.The Functional Block Diagram is shown in Figure 1.High Voltage Start-Up Regulator (Pins 1,4)The LM5033contains an internal high voltage startup regu-lator.The input pin (V IN )can be connected directly to line voltages as high as 90V for normal operation,and can withstand transients to 100V.The regulator output at V CC (9.6V)is internally current limited and sources a minimum of 20mA.Upon power up,the capacitor at V CC will charge up,providing a time delay while internal circuits stabilize.When V CC reaches the upper threshold of the under-voltage sen-sor (typically 9.5V),the under-voltage sensor resets,en-abling the output drivers,although the PWM duty cycle will initially be at zero.As the Softstart capacitor then charges up (described below)the output duty cycle will increase until regulated by the PWM control loop.The value of the V CC capacitor which affects the above mentioned delay depends on the total system design and its start-up characteristics.The recommended range of values for the V CC capacitor is 0.1to 50µF.The lower threshold of the under-voltage sensor is typically at 6.8V.If V CC falls below this value the outputs are disabled and the softstart capacitor is discharged.When V CC is again increased above the upper threshold the outputs are en-abled,and the softstart sequence repeats.The LM5033’s internal power dissipation can be reduced by powering V CC from an external supply.Typically this is done by means of an auxiliary transformer winding which is diode connected to the V CC pin to provide 10-15V to V CC as the controller completes the start-up sequence.The externally applied V CC voltage will cause the internal regulator to shut off.The under-voltage sensor circuit will still function in this mode,requiring that the external V CC capacitor be sized so that V CC never falls below 6.8V.The required current into the V CC pin from the external source is shown in Typical Perfor-mance Characteristics (I CC vs.V CC ).If a fault condition occurs such that the external supply to V CC fails,external current draw from the V CC pin must be limited as to not exceed the regulator’s current limit,or the maximum power dissipation of the IC.An external start-up or other bias rail can be used instead of the internal start-up regulator by connecting the V CC and the V IN pins together and feeding the external bias voltage (10-15V)into that node.A thermal shutdown protection will activate if the die tem-perature exceeds 165o C,disabling the outputs (OUT1and OUT2),and shutting down the V CC regulator.When the die temperature has reduced below 150˚C (typical hysteresis =15˚C)the V CC regulator is enabled and a softstart sequence will initiate.Reference (Pin 2)The Ref pin provides a reference voltage of 2.5V,±2.4%.The pin is internally connected to an NMOS FET drain at the buffer amplifier’s output,allowing it to sink,but not source current.An external pullup resistor is required.Current into the pin must be limited to less than 20mA to maintain regulation.See the graph in the Typical Performance Char-acteristics.During start-up if the pullup voltage is present before the reference amplifier establishes regulation,the voltage on pin 2must not exceed 5.5V.If this reference is not used the Ref pin can float or be connected to ground.PWM Comparator (Pin 3),Duty Cycle and DeadtimeThe PWM comparator compares an internal ramp signal (0-0.65V)with the loop error voltage derived from the Comp pin (pin 3).The Comp voltage is typically set by an external error amplifier through an optocoupler for closed loop applica-tions.Internally,the voltage at the Comp pin passes through two level shifting diodes,and a gain reducing 3:1resistor divider.The output of the PWM comparator provides the pulse width information to the output drivers (Out1and Out2).This comparator is optimized for speed in order to achieve minimum discernable duty cycles.The output duty cycle is 0%for V COMP <1.5V,and maximum for V COMP >3.5V.See the Typical Performance Characteristics.The maximum duty cycle for each output is limited to less than 50%due to the forced deadtime.The typical deadtime be-tween the falling edge of one gate driver output and the rising edge of the other gate driver output is 135ns,and does not vary with frequency.The maximum duty cycle for each output can be calculated from:where T S is the period of each output,and T D is the dead-time.For example,if the oscillator frequency is 200kHz,each output will cycle at 100kHz,and T S =10µing the nominal deadtime of 135ns,the maximum duty cycle at this frequency is 48.65%.Using the minimum deadtime of 85ns,the maximum duty cycle increases to 49.15%.When the Softstart pin (pin 10)is pulled down (internally or externally)the Comp pin voltage is pulled down with it,with a difference of 0.5V.When the Softstart pin voltage in-creases the Comp voltage is allowed to increase,pulled up by an internal 5.2V supply through a 5k Ωresistor.In an open loop application,such as an intermediate bus converter,pin 3can be left open resulting in maximum duty cycle at the output drivers .Current Sense (Pin 8)The current sense circuit is intended to protect the power converter when an abnormal primary current is sensed by initiating a low duty cycle hiccup mode.When the threshold (0.5V)at Pin 8is exceeded the outputs are disabled,and the softstart capacitor (at pin 10)is internally discharged.When the softstart capacitor is fully discharged and the voltage at the CS pin is below 0.5V,the outputs are re-enabled allowing the softstart capacitor voltage and the output duty cycle to increase.L M 5033 8Current Sense (Pin 8)(Continued)The external current sensing circuit should include an RC filter located near the IC to prevent false triggering of the Current Sense comparator due to transients or noise.An internal MOSFET discharges the external filter capacitor at the conclusion of each PWM cycle to improve dynamic performance.The discharge time is equal to the deadtime between Out1and Out2at maximum duty cycle.Additionally,pin 8is pulled low when V CC is below the under-voltage threshold or when an over temperature condition occurs.Oscillator,Sync Capability (Pin 9)The LM5033oscillator frequency is set by a single external resistor connected between Rt/Sync and ground.The re-quired Rt resistor is calculated from:The outputs (Out1and Out2)alternate at half the oscillator frequency.The voltage at the Rt/Sync pin is internally regu-lated to a nominal 2.0V.The Rt resistor should be located as close as possible to the IC,and connected directly to the pins (Rt and GND).The LM5033can be synchronized to an external clock by applying a narrow pulse to pin 9.The external clock must be a higher frequency than the free running frequency set by the Rt resistor,and the pulse width must be between 15and 150ns.The clock signal must be coupled into the Rt/Sync pin through a 100pF capacitor.When the synchronizing pulse transitions low-to-high,the voltage at pin 9must ex-ceed 3.8V from its nominal 2.0V dc level.During the clock signal’s low time the voltage at pin 9will be clamped at 2.0V by an internal regulator.The Rt resistor is always required,whether the oscillator is free running or externally synchro-nized.Soft Start (Pin 10)The softstart feature allows the converter to gradually reach a steady state operating point,thereby reducing start-up stresses and current surges.Upon turn-on,after the under-voltage sensor resets at V CC ,an internal 10µA current source charges an external capacitor at pin 10to generate a ramping voltage (0to +5V)which allows the voltage on the Comp pin (pin 3)to increase gradually.As the COMP voltage increases the output duty cycle will increase from zero to the value required for regulation.Internally,the softstart pin is pulled low when a current fault is detected at pin 8,the V CC voltage is below the lower threshold of the under-voltage sensor,or when a thermal shutdown occurs.Additionally,the softstart pin can be pulled low by an external device.In the event of a current fault,(see Current Sense section)the softstart capacitor will be discharged by an internal pull-down device.The falling voltage at pin 10will pull down the COMP pin,thereby ensuring a minimum output duty cycle when the outputs are re-enabled.The softstart capacitor will then begin to ramp up,allowing the COMP voltage to in-crease.As the COMP voltage increases,the output duty cycle increases from zero to the value required for regula-tion.However,if the fault condition is still present the above sequence repeats until the fault is removed.If the V CC voltage falls below the lower under-voltage sensor threshold (typically 6.8V)the outputs are disabled,and thesoftstart capacitor is discharged.The falling voltage at pin 10will pull down the COMP pin,thereby ensuring minimum output duty cycle when the outputs are re-enabled.After the V CC voltage increases above the upper threshold (typically 9.5V),the outputs are enabled,and the softstart capacitor will begin to ramp up,allowing the COMP pin voltage to increase.The output duty cycle will then increase from zero to the value required for regulation.In the event of a fault which results in an excessively high die temperature,an internal Thermal Shutdown circuit is pro-vided to protect the IC.When activated (at 165˚C)the IC is forced into a low power reset state,disabling the output drivers and the V CC regulator.When the die temperature has reduced (typical hysteresis =15˚C),the V CC regulator is enabled and a softstart sequence will initiate.Using an externally controlled switch,the outputs (Pins 5&6)can be disabled at any time by pulling pin 10below 0.5V.This will pull down the COMP pin to near ground,causing the output duty cycle to go to zero.Upon releasing pin 10,the softstart capacitor will ramp up,allowing the COMP pin voltage to increase.The output duty cycle then increases from zero to the value required for regulation.OUT1,OUT2(Pins 5,6)The LM5033provides two alternating outputs,OUT1and OUT2,each capable of sourcing and sinking 1.5A peak.Each will toggle at one-half the internal oscillator frequency.The voltage output levels are nominally ground and V CC ,minus a saturation voltage at each level which depends on the current flow.The outputs can drive power MOSFETs directly in a push-pull application,or they can drive a high voltage gate driver (e.g.,LM5100)in a bridge application.The outputs are disabled when any of the following condi-tions occur:1.An overcurrent condition is detected at pin 8,2.The V CC under-voltage sensor is active,3.An over-temperature condition is detected,or4.The voltage at Pin 10is below 0.5VThermal ProtectionThe system design should limit the LM5033junction tem-perature to not exceed 125˚C during normal operation.How-ever,in the event of a fault which results in a higher die temperature,an internal Thermal Shutdown circuit is pro-vided to protect the IC.When thermal shutdown is activated,typically at 165˚C,the IC is forced into a low power reset state disabling the output drivers and the V CC regulator.This feature helps prevent catastrophic failures from accidental device overheating.When the die temperature has reduced (typical hysteresis =15˚C)the V CC regulator is enabled and a softstart sequence initiates.Application InformationThe following information is intended to provide guidelines for implementing the LM5033.However,final selection of all external components is dependent on the configuration and operating characteristics of the complete power conversion system.LM50339Application Information(Continued)V IN (PIN 1)The voltage applied at pin 1,normally the same as that applied to the main transformer’s primary,can be in the range of 15to 90V,with transient capability to 100V.The current into pin 1depends not only on V IN ,but also on the load on the output driver pins,any load on V CC ,and whether or not an external voltage is applied to V CC .If Vin is close to the absolute maximum rating of the LM5033,it is recom-mended the circuit of Figure 2be used to filter transients which may occur at the input supply.If V CC is not powered externally,requiring all internal bias currents for the LM5033,and output driver currents,to be supplied at Vin and through the internal regulator,the re-quired input current (Iin)is shown in the Typical Performance Characteristics (I IN vs.V IN ).If V CC is powered externally,Iin will increase with V IN as shown in the above mentioned graph until the external volt-age is applied to V CC .In most applications,this occurs once the outputs are enabled and load current begins to flow.The current into Vin will then drop to a nominal 150µA (Pin 10=open or grounded).V CC (PIN 4)The capacitor at the V CC pin provides not only noise filtering and stability,but also a necessary time delay during start-up.The time delay allows the internal circuitry of the LM5033,and associated external circuitry,to stabilize before V CC reaches its final value,at which time the outputs are enabled and the softstart sequence begins.Any external circuitry connected to the REF output (Pin 2)and Softstart (Pin 10)should be designed to stabilize during the time delay.The current limit of the V CC regulator,and the external capacitor,determine the V CC turn-on time delay.Typically,a 1µF capacitor will provide approximately 300µs of delay,with larger capacitors providing proportionately longer de-lays.Experimentation with the final design may be neces-sary to determine the minimum value for the V CC capacitor.SOFTSTART (PIN 10)The capacitor at pin 10determines the time required for the output duty cycle to increase from zero to the final value for regulation.The minimum acceptable time is dependent on the response of the feedback loops to the COMP pin,as well as the characteristics of the magnetic components.If the Softstart time is too quick,the system output could signifi-cantly overshoot its intended voltage before the loop has a chance to establish regulation,possibly adversely affecting the load.Experimentation with the final design is usually necessary to determine the minimum value for the SS ca-pacitor.CURRENT SENSE (PIN 8)This pin typically receives an input representative of the primary current from the current sense elements of the ex-ternal circuitry.The peak amplitude at this pin must be less than 0.5V for normal operation.Filtering at this pin should be sufficient to prevent false triggering of the Current Sense comparator,but not significantly delay detection of an over-current condition.The filter’s capacitor at pin 8should not be larger than 2200pF.OSCILLATOR,SYNC INPUT (PIN 9)The internal oscillator frequency is generally selected in conjunction with the system magnetic components,and any other aspects of the system which may be affected by the frequency.The R t resistor at pin 9sets the frequency accord-ing to the formula in the Functional Description.Each output (OUT1and OUT2)switches at half the oscillator frequency.If the required frequency value is critical in a particular appli-cation,the tolerance of the external resistor,and the fre-quency tolerance indicated in the Electrical Characteristics,must be taken into account when selecting the resistor.If the LM5033is to be synchronized to an external clock,that signal must be coupled into pin 9through a 100pF capacitor.The R t resistor is still required in this case,and it must be selected to set the internal oscillator to a frequency lower than the external synchronizing frequency.The amplitude of the external pulses must take pin 9above 3.8V on the low-to-high transition but no higher than 5.5V.The clock pulse width should be between 15and 150ns.DEADTIME ADJUSTMENTIf the application requires a change in the minimum dead-time between the outputs,the circuits in Figure 3are recom-mended.Suggested values for the resistor and capacitor at each output are 500Ω,and 100pF,respectively for a nomi-nal 50ns change.The diodes can be 1N4148,or similar.20035415FIGURE 2.Input Transient ProtectionL M 5033 10Application Information(Continued)PC BOARD LAYOUTThe LM5033current sense and PWM comparators are very fast,and as such will respond to short duration noise pulses. Layout considerations are critical for the current sense filter. The components at pins3,8,9,and10should be as physically close as possible to the IC,thereby minimizing noise pickup in the PC tracks.If a current sense transformer is used both leads of the transformer secondary should be routed to the sense filter components,and to the IC pins.The ground side of the transformer should be connected via a dedicated PC board track to pin7of the IC rather than through the ground plane. If the current sense circuit employs a sense resistor in the drive transistor sources,a low inductance resistor should be used.In this case all the noise sensitive low power grounds should be connected in common near the IC,and then a single connection made to the power ground(sense resistor ground point).The outputs of the LM5033,or of the high voltage gate driver (if used),should have short direct paths to the power MOS-FETs in order to minimize the effects of inductance in the PC board traces.If the internal dissipation of the LM5033and any of the power devices produces high junction temperatures during normal operation,good use of the PC board’s ground plane can help considerably to dissipate heat.The exposed pad on the bottom of the LLP-10package can be soldered to ground plane on the PC board,and the ground plane should extend out from beneath the IC to help dissipate the heat.The exposed pad is internally connected to the IC substrate.Additionally,the use of wide PC board traces where possible can help conduct heat away from the IC.Judicious position-ing of the PC board within the end product,along with use of any available air flow(forced or natural convection)can help reduce the junction temperatures.APPLICATION CIRCUIT EXAMPLEFigure6shows an example circuit for a half-bridge200W DC/DC converter built in a quarter brick format.The circuit is that of an intermediate bus converter(IBC)which operates open-loop(unregulated output),converting a nominal48V input to a nominal9.0V output with a30mΩoutput imped-ance.The current sense transformer(T2),and the associ-ated filter at the CS pin,provide overcurrent detection at approximately23A.The auxiliary winding on T1powers V CC and the LM5100’s V+pin(once the outputs are enabled)to reduce power dissipation within the LM5033.The LM5100 provides appropriate level shifting for Q1.Synchronous rec-tifiers Q3and Q4minimize conduction losses in the output stage.Dual comparators U2and U3provide under-voltage and over-voltage sensing at Vin.The under-voltage sense levels are37V increasing,and33V decreasing.The over-voltage sense levels are63V increasing,and61.5V decreas-ing.The circuit can be shut down by taking the ON/OFF input below0.8V.An external synchronizing frequency can be applied to the SYNC input.Measured efficiency and output characteristics for this circuit are shown in Figure4and Figure5.20035416FIGURE3.Deadtime AdjustmentLM5033 11。

LM323K中文资料

LM123/LM323A/LM3233-Amp,5-Volt Positive RegulatorGeneral DescriptionThe LM123is a three-terminal positive regulator with a pre-set 5V output and a load driving capability of 3amps.New circuit design and processing techniques are used to provide the high output current without sacrificing the regulation characteristics of lower current devices.The LM323A offers improved precision over the standard LM323.Parameters with tightened specifications include output voltage tolerance,line regulation,and load regulation.The 3amp regulator is virtually blowout proof.Current limit-ing,power limiting,and thermal shutdown provide the same high level of reliability obtained with these techniques in the LM1091amp regulator.No external components are required for operation of the LM123.If the device is more than 4inches from the filter ca-pacitor,however,a 1µF solid tantalum capacitor should be used on the input.A 0.1µF or larger capacitor may be used on the output to reduce load transient spikes created by fast switching digital logic,or to swamp out stray load capaci-tance.An overall worst case specification for the combined effects of input voltage,load currents,ambient temperature,and power dissipation ensure that the LM123will perform satis-factorily as a system element.For applications requiring other voltages,see LM150series adjustable regulator data sheet.Operation is guaranteed over the junction temperature range −55˚C to +150˚C for LM123,−40˚C to +125˚C for LM323A,and 0˚C to +125˚C for LM323.A hermetic TO-3package is used for high reliability and low thermal resistance.Featuresn Guaranteed 1%initial accuracy (A version)n 3amp output currentn Internal current and thermal limiting n 0.01Ωtypical output impedance n 7.5V minimum input voltage n 30W power dissipationnP +Product Enhancement testedConnection DiagramTypical ApplicationsMetal Can PackageDS007771-2Order Number LM123K STEEL,LM323AK STEEL or LM323K STEELSee NS Package Number K02A Order Number LM123K/883See NS Package Number K02CBasic 3Amp RegulatorDS007771-3*Required if LM123is more than 4"from filter capacitor.†Regulator is stable with no load capacitor into resistive loads.April 1998LM123/LM323A/LM3233-Amp,5-Volt Positive Regulator©1999National Semiconductor Corporation Absolute Maximum Ratings(Note1)If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.(Note5)Input Voltage20V Power Dissipation Internally Limited Operating Junction Temperature RangeLM123−55˚C to+150˚C LM323A−40˚C to+125˚C LM3230˚C to+125˚C Storage Temperature Range−65˚C to+150˚C Lead Temperature(Soldering,10sec.)300˚C ESD Tolerance(Note5)2000VLM123Electrical Characteristics(Note2)Parameter Conditions LM123UnitsMin Typ Max Output Voltage T j=25˚C 4.75 5.3VV IN=7.5V,I OUT=0A7.5V≤V IN≤15V 4.6 5.4V0A≤I OUT≤3A,P≤30WLine Regulation(Note4)T j=25˚C525mV7.5V≤V IN≤15VLoad Regulation(Note4)T j=25˚C,V IN=7.5V,25100mV0A≤I OUT≤3AQuiescent Current7.5V≤V IN≤15V,1220mA0A≤I OUT≤3AOutput Noise Voltage T j=25˚C40µVrms10Hz≤f≤100kHzShort Circuit Current Limit T j=25˚CV IN=15V3 4.5AV IN=7.5V45A Long Term Stability35mV Thermal Resistance Junctionto Case(Note3)2˚C/W LM323A/LM323Electrical Characteristics(Note2)Parameter Conditions LM323A LM323UnitsMin Typ Max Min Typ MaxOutput Voltage T j=25˚C 4.955 5.05 4.85 5.2VV IN=7.5V,I OUT=0A7.5V≤V IN≤15V 4.85 5.15 4.75 5.25V0A≤I OUT≤3A,P≤30WLine Regulation(Note4)T j=25˚C510525mV7.5V≤V IN≤15VLoad Regulation(Note4)T j=25˚C,V IN=7.5V,255025100mV0A≤I OUT≤3AQuiescent Current7.5V≤V IN≤15V,12201220mA0A≤I OUT≤3AOutput Noise Voltage T j=25˚C4040µVrms10Hz≤f≤100kHzShort Circuit Current Limit T j=25˚CV IN=15V3 4.53 4.5AV IN=7.5V4645A Long Term Stability3535mV Thermal Resistance Junctionto Case(Note3)22˚C/W 2LM323A/LM323Electrical Characteristics(Note2)(Continued)Note1:“Absolute Maximum Ratings”indicate limits beyond which damage to the device may occur.Operating Ratings indicate conditions for which the device is functional,but do not guarantee specific performance limits.Note2:Unless otherwise noted,specifications apply for−55˚C≤T j≤+150˚C for the LM123,−40˚C≤T j≤+125˚C for the LM323A,and0˚C≤T j≤+125˚C for the LM323.Although power dissipation is internally limited,specifications apply only for P≤30W.Note3:Without a heat sink,the thermal resistance of the TO-3package is about35˚C/W.With a heat sink,the effective thermal resistance can only approach the specified values of2˚C/W,depending on the efficiency of the heat sink.Note4:Load and line regulation are specified at constant junction temperature.Pulse testing is required with a pulse width≤1ms and a duty cycle≤5%.Note5:Refer to RETS123K drawing for LM123K military specifications.Note6:Human body model,1.5kΩin series with100pF.Typical Performance CharacteristicsMaximum Average Power Dissipation for LM123DS007771-9Maximum Average PowerDissipation for LM323A,LM323DS007771-10Output ImpedanceDS007771-11Peak Available Output CurrentDS007771-12Short Circuit CurrentDS007771-13Ripple RejectionDS007771-14Dropout VoltageDS007771-15Line Transient ResponseDS007771-16Output VoltageDS007771-17 3Typical Performance Characteristics(Continued)Typical ApplicationsQuiescent CurrentDS007771-18Load Transient ResponseDS007771-19Output Noise VoltageDS007771-2010Amp Regulator with Complete Overload ProtectionDS007771-6 *Select for20mA Current from Unregulated Negative Supply4Typical Applications(Continued)Adjustable Regulator0V−10V@3ADS007771-7A1—LM101AC1—2µF Optional—Improves Ripple Rejection,Noise,and Transient ResponseTrimming Output to5VDS007771-8Adjustable Output5V−10V0.1%RegulationDS007771-4*Select to Set Output Voltage**Select to Draw25mA from V−5Schematic DiagramDS007771-1 6Physical Dimensions inches(millimeters)unless otherwise notedMetal Can Package(K)Order Number LM123K STEEL,LM323AK STEEL or LM323K STEELNS Package Number K02A7Physical Dimensionsinches (millimeters)unless otherwise noted (Continued)LIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices or systems which,(a)are intended for surgical implant into the body,or (b)support or sustain life,and whose failure to perform when properly used in accordance with instructions for use provided in the labeling,can be reasonably expected to result in a significant injury to the user.2.A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system,or to affect its safety or effectiveness.National Semiconductor Corporation AmericasTel:1-800-272-9959Fax:1-800-737-7018Email:support@National Semiconductor EuropeFax:+49(0)180-5308586Email:europe.support@Deutsch Tel:+49(0)180-5308585English Tel:+49(0)180-5327832Français Tel:+49(0)180-5329358Italiano Tel:+49(0)180-5341680National Semiconductor Asia Pacific Customer Response Group Tel:65-2544466Fax:65-2504466Email:sea.support@National Semiconductor Japan Ltd.Tel:81-3-5639-7560Fax:81-3-5639-7507Metal Can Package (K)Mil-Aero ProductOrder Number LM123K/883NS Package Number K02CL M 123/L M 323A /L M 3233-A m p ,5-V o l t P o s i t i v e R e g u l a t o rNational does not assume any responsibility for use of any circuitry described,no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.。

LM2661资料

LM2660/LM2661Switched Capacitor Voltage ConverterGeneral DescriptionThe LM2660/LM2661CMOS charge-pump voltage con-verter inverts a positive voltage in the range of 1.5V to 5.5V to the corresponding negative voltage.The LM2660/LM2661uses two low cost capacitors to provide 100mA of output current without the cost,size,and EMI related to inductor based converters.With an operating current of only 120µA and operating efficiency greater than 90%at most loads,the LM2660/LM2661provides ideal performance for battery powered systems.The LM2660/LM2661may also be used as a positive voltage doubler.The oscillator frequency can be lowered by adding an exter-nal capacitor to the OSC pin.Also,the OSC pin may be used to drive the LM2660/LM2661with an external clock.For LM2660,a frequency control (FC)pin selects the oscillator frequency of 10kHz or 80kHz.For LM2661,an external shutdown (SD)pin replaces the FC pin.The SD pin can be used to disable the device and reduce the quiescent current to 0.5µA.The oscillator frequency for the LM2661is 80kHz.Featuresn Inverts or doubles input supply voltage n Narrow SO-8and Mini SO-8Package n 6.5Ωtypical output resistancen 88%typical conversion efficiency at 100mAn (LM2660)selectable oscillator frequency:10kHz/80kHz n(LM2661)low current shutdown modeApplicationsn Laptop computers n Cellular phones n Medical instrumentsn Operational amplifier power supplies n Interface power supplies nHandheld instrumentsBasic Application CircuitsVoltage InverterDS012911-3Positive Voltage DoublerDS012911-4Splitting V IN in HalfDS012911-26September 1999LM2660/LM2661Switched Capacitor Voltage Converter©1999National Semiconductor Corporation Absolute Maximum Ratings (Note 1)If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications.Supply Voltage (V+to GND,or GND to OUT)6V LV (OUT −0.3V)to (GND +3V)FC,OSC The least negative of (OUT −0.3V)or (V+−6V)to (V++0.3V)V+and OUT Continuous Output Current 120mA Output Short-Circuit Duration to GND (Note 2)1sec.PackageMMM Power Dissipation(T A =25˚C)(Note 3)735mW 500mW T J Max (Note 3)150˚C 150˚C θJA (Note 3)170˚C/W250˚C/WOperating Junction Temperature Range−40˚C to +85˚C Storage Temperature Range −65˚C to +150˚CLead Temperature300˚C(Soldering,10seconds)ESD Rating2kVElectrical CharacteristicsLimits in standard typeface are for T J =25˚C,and limits in boldface type apply over the full operating temperature range.Un-less otherwise specified:V+=5V,FC =Open,C 1=C 2=150µF.(Note 4)Symbol ParameterConditionMin TypMax UnitsV+Supply VoltageR L =1kInverter,LV =Open 3.5 5.5Inverter,LV =GND 1.5 5.5V Doubler,LV =OUT 2.55.5I Q Supply CurrentNo Load FC =Open (LM2660)0.120.5mA LV =OpenFC =V+(LM2660)or 13SD =Ground (LM2661)I SD Shutdown Supply Current 0.52µA (LM2661)V SD Shutdown Pin Input Voltage Shutdown Mode 2.0(Note 5)V (LM2661)Normal Operation 0.3I L Output CurrentT A ≤+85˚C,OUT ≤−4V 100mA T A >+85˚C,OUT ≤−3.8V 100R OUT Output Resistance (Note 6)I L =100mA T A ≤+85˚C 6.510ΩT A >+85˚C 12f OSC Oscillator Frequency (Note 7)OSC =Open FC =Open 510kHz FC =V+4080f SW Switching Frequency (Note 8)OSC =Open FC =Open 2.55kHz FC =V+2040I OSC OSC Input Current FC =Open ±2µAFC =V+±16P EFFPower EfficiencyR L (1k)between V +and OUT 9698R L (500)between GND and OUT 9296%I L =100mA to GND88V OEFFVoltage Conversion EfficiencyNo Load9999.96%Note 1:Absolute maximum ratings indicate limits beyond which damage to the device may occur.Electrical specifications do not apply when operating the device beyond its rated operating conditions.Note 2:OUT may be shorted to GND for one second without damage.However,shorting OUT to V+may damage the device and should be avoided.Also,for tem-peratures above 85˚C,OUT must not be shorted to GND or V+,or device may be damaged.Note 3:The maximum allowable power dissipation is calculated by using P DMax =(T JMax −T A )/θJA ,where T JMax is the maximum junction temperature,T A is the ambient temperature,and θJA is the junction-to-ambient thermal resistance of the specified package.Note 4:In the test circuit,capacitors C 1and C 2are 0.2Ωmaximum ESR capacitors.Capacitors with higher ESR will increase output resistance,reduce output volt-age and efficiency.Note 5:In doubling mode,when V out >5V,minimum input high for shutdown equals V out −3V.Note 6:Specified output resistance includes internal switch resistance and capacitor ESR.Note 7:For LM2661,the oscillator frequency is 80kHz.Note 8:The output switches operate at one half of the oscillator frequency,f OSC =2f SW .L M 2660/L M 2661 2Test CircuitsTypical Performance Characteristics(Circuit of Figure 1)DS012911-5DS012911-6FIGURE 1.LM2660and LM2661Test CircuitsSupply Current vs Supply VoltageDS012911-7Supply Current vs Oscillator FrequencyDS012911-8Output SourceResistance vs Supply VoltageDS012911-9Output Source Resistance vs TemperatureDS012911-10Efficiency vs Load Current DS012911-11Output Voltage Drop vs Load CurrentDS012911-12LM2660/LM26613Typical Performance Characteristics(Circuit of Figure 1)(Continued)Efficiency vsOscillator FrequencyDS012911-13Output Voltage vs Oscillator FrequencyDS012911-14Oscillator Frequency vs External CapacitanceDS012911-15Oscillator Frequency vs Supply Voltage (FC =V+)DS012911-16Oscillator Frequency vs Supply Voltage (FC =Open)DS012911-17Oscillator Frequency vs Temperature (FC =V+)DS012911-18Oscillator Frequency vs Temperature (FC =Open)DS012911-19Shutdown Supply Current vs Temperature (LM2661Only)DS012911-20L M 2660/L M 2661 4Connection DiagramsOrdering InformationOrder Number Package Number Package Marking Supplied AsLM2660MM08ADatecode Rail (95units/rail)LM2660MLM2660MXM08ADatecode Tape and Reel (2500units/rail)LM2660MLM2660MM MUA08A S01A (Note 9)Tape and Reel (250units/rail)LM2660MMX MUA08A S01A (Note 9)Tape and Reel (3500units/rail)LM2661MM08ADatecode Rail (95units/rail)LM2661MLM2661MXM08ADatecode Tape and Reel (2500units/rail)LM2661MLM2661MM MUA08A S02A (Note 9)Tape and Reel (250units/rail)LM2661MMXMUA08AS02A (Note 9)Tape and Reel (3500units/rail)Note 9:The first letter “S”identifies the part as a switched capacitor converter.The next two numbers are the device number:“01”for a LM2660device,and “02”for a LM2661device.The fourth letter “A”indicates the grade.Only one grade is rger quantity reels are available upon request.8-Lead SO (M)or Mini SO (MM)DS012911-1DS012911-2Top ViewOrder Number LM2660M,LM2661M,LM2660MM or LM2661MMSee NS Package Number M08A and MUA08ALM2660/LM26615Pin DescriptionPin NameFunctionVoltage InverterVoltage Doubler1FC Frequency control for internal oscillator:Same as inverter.(LM2660)FC =open,f OSC =10kHz (typ);FC =V+,f OSC =80kHz (typ);FC has no effect when OSC pin is driven externally.1SD (LM2661)Shutdown control pin,tie this pin to the ground in normal operation,and to V+for shutdown.Same as inverter.2CAP+Connect this pin to the positive terminal of charge-pump capacitor.Same as inverter.3GND Power supply ground input.Power supply positive voltage input.4CAP−Connect this pin to the negative terminal of charge-pump capacitor.Same as inverter.5OUT Negative voltage output.Power supply ground input.6LVLow-voltage operation input.Tie LV to GND when input voltage is less than 3.5V.Above 3.5V,LV can be connected to GND or left open.When driving OSC with an external clock,LV must be connected to GND.LV must be tied to OUT.7OSCOscillator control input.OSC is connected to an internal 15pF capacitor.An external capacitor can be connected to slow the oscillator.Also,an external clock can be used to drive OSC.Same as inverter except that OSC cannot be driven by an external clock.8V+Power supply positive voltage input.Positive voltage output.Circuit DescriptionThe LM2660/LM2661contains four large CMOS switches which are switched in a sequence to invert the input supply voltage.Energy transfer and storage are provided by exter-nal capacitors.Figure 2illustrates the voltage conversion scheme.When S 1and S 3are closed,C 1charges to the sup-ply voltage V+.During this time interval switches S 2and S 4are open.In the second time interval,S 1and S 3are open and S 2and S 4are closed,C 1is charging C 2.After a number of cycles,the voltage across C 2will be pumped to V+.Since the anode of C 2is connected to ground,the output at the cathode of C 2equals −(V+)assuming no load on C 2,no loss in the switches,and no ESR in the capacitors.In reality,the charge transfer efficiency depends on the switching fre-quency,the on-resistance of the switches,and the ESR of the capacitors.Application InformationSIMPLE NEGATIVE VOLTAGE CONVERTERThe main application of LM2660/LM2661is to generate a negative supply voltage.The voltage inverter circuit uses only two external capacitors as shown in the Basic Applica-tion Circuits.The range of the input supply voltage is 1.5V to 5.5V.For a supply voltage less than 3.5V,the LV pin must be connected to ground to bypass the internal regulator cir-cuitry.This gives the best performance in low voltage appli-cations.If the supply voltage is greater than 3.5V,LV may be connected to ground or left open.The choice of leaving LV open simplifies the direct substitution of the LM2660/LM2661for the LMC7660Switched Capacitor Voltage Con-verter.The output characteristics of this circuit can be approximated by an ideal voltage source in series with a resistor.The volt-age source equals −(V+).The output resistance R out is a function of the ON resistance of the internal MOS switches,the oscillator frequency,and the capacitance and ESR of C 1and C 2.A good approximation is:where R SW is the sum of the ON resistance of the internal MOS switches shown in Figure 2.High value,low ESR capacitors will reduce the output resis-tance.Instead of increasing the capacitance,the oscillator frequency can be increased to reduce the 2/(f osc x C 1)term.Once this term is trivial compared with R SW and ESRs,fur-ther increasing in oscillator frequency and capacitance will become ineffective.DS012911-21FIGURE 2.Voltage Inverting PrincipleL M 2660/L M 2661 6Application Information(Continued)The peak-to-peak output voltage ripple is determined by the oscillator frequency,and the capacitance and ESR of the output capacitor C 2:Again,using a low ESR capacitor will result in lower ripple.POSITIVE VOLTAGE DOUBLERThe LM2660/LM2661can operate as a positive voltage dou-bler (as shown in the Basic Application Circuits).The dou-bling function is achieved by reversing some of the connec-tions to the device.The input voltage is applied to the GND pin with an allowable voltage from 2.5V to 5.5V.The V+pin is used as the output.The LV pin and OUT pin must be con-nected to ground.The OSC pin can not be driven by an ex-ternal clock in this operation mode.The unloaded output voltage is twice of the input voltage and is not reduced by the diode D 1’s forward drop.The Schottky diode D 1is only needed for start-up.The inter-nal oscillator circuit uses the V+pin and the LV pin (con-nected to ground in the voltage doubler circuit)as its power rails.Voltage across V+and LV must be larger than 1.5V to insure the operation of the oscillator.During start-up,D 1is used to charge up the voltage at V+pin to start the oscillator;also,it protects the device from turning-on its own parasitic diode and potentially latching-up.Therefore,the Schottky di-ode D 1should have enough current carrying capability to charge the output capacitor at start-up,as well as a low for-ward voltage to prevent the internal parasitic diode from turning-on.A Schottky diode like 1N5817can be used for most applications.If the input voltage ramp is less than 10V/ms,a smaller Schottky diode like MBR0520LT1can be used to reduce the circuit size.SPLIT V+IN HALFAnother interesting application shown in the Basic Applica-tion Circuits is using the LM2660/LM2661as a precision volt-age divider.Since the off-voltage across each switch equals V IN /2,the input voltage can be raised to +11V.CHANGING OSCILLATOR FREQUENCYFor the LM2660,the internal oscillator frequency can be se-lected using the Frequency Control (FC)pin.When FC is open,the oscillator frequency is 10kHz;when FC is con-nected to V+,the frequency increases to 80kHz.A higher oscillator frequency allows smaller capacitors to be used for equivalent output resistance and ripple,but increases the typical supply current from 0.12mA to 1mA.The oscillator frequency can be lowered by adding an exter-nal capacitor between OSC and GND.(See Typical Perfor-mance Characteristics.)Also,in the inverter mode,an exter-nal clock that swings within 100mV of V+and GND can be used to drive OSC.Any CMOS logic gate is suitable for driv-ing OSC.LV must be grounded when driving OSC.The maximum external clock frequency is limited to 150kHz.The switching frequency of the converter (also called the charge pump frequency)is half of the oscillator frequency.Note:OSC cannot be driven by an external clock in the voltage-doublingmode.TABLE 1.LM2660Oscillator Frequency Selection FC OSCOscillator Open Open 10kHz V+Open80kHz Open or V+External CapacitorSee Typical Performance Characteristics N/A External Clock External Clock (inverter mode only)FrequencyTABLE 2.LM2661Oscillator Frequency SelectionOSCOscillatorOpen80kHzExternal Capacitor See Typical Performance CharacteristicsExternal Clock External Clock Frequency(inverter mode only)SHUTDOWN MODEFor the LM2661,a shutdown (SD)pin is available to disable the device and reduce the quiescent current to 0.5µA.Ap-plying a voltage greater than 2V to the SD pin will bring the device into shutdown mode.While in normal operating mode,the SD pin is connected to ground.CAPACITOR SELECTIONAs discussed in the Simple Negative Voltage Converter sec-tion,the output resistance and ripple voltage are dependent on the capacitance and ESR values of the external capaci-tors.The output voltage drop is the load current times the output resistance,and the power efficiency isWhere I Q (V+)is the quiescent power loss of the IC device,and I L 2R OUT is the conversion loss associated with the switch on-resistance,the two external capacitors and their ESRs.Since the switching current charging and discharging C 1is approximately twice as the output current,the effect of the ESR of the pumping capacitor C 1is multiplied by four in the output resistance.The output capacitor C 2is charging and discharging at a current approximately equal to the output current,therefore,its ESR only counts once in the output re-sistance.However,the ESR of C 2directly affects the output voltage ripple.Therefore,low ESR capacitors (Table 3)are recommended for both capacitors to maximize efficiency,re-duce the output voltage drop and voltage ripple.For conve-nience,C 1and C 2are usually chosen to be the same.The output resistance varies with the oscillator frequency and the capacitors.In Figure 3,the output resistance vs.os-cillator frequency curves are drawn for three different tanta-lum capacitors.At very low frequency range,capacitance plays the most important role in determining the output resis-tance.Once the frequency is increased to some point (such as 20kHz for the 150µF capacitors),the output resistance is dominated by the ON resistance of the internal switches and the ESRs of the external capacitors.A low value,smallerLM2660/LM26617Application Information(Continued)size capacitor usually has a higher ESR compared with a bigger size capacitor of the same type.For lower ESR,use ceramic capacitors.TABLE 3.Low ESR Capacitor ManufacturersManufacturer Phone FAX Capacitor TypeNichicon Corp.(708)-843-7500(708)-843-2798PL,PF series,through-hole aluminum electrolytic AVX Corp.(803)-448-9411(803)-448-1943TPS series,surface-mount tantalumSprague (207)-324-4140(207)-324-7223593D,594D,595D series,surface-mount tantalum Sanyo(619)-661-6835(619)-661-1055OS-CON series,through-hole aluminum electrolyticOther ApplicationsPARALLELING DEVICESAny number of LM2660s (or LM2661s)can be paralleled to reduce the output resistance.Each device must have its own pumping capacitor C 1,while only one output capacitor C out is needed as shown in Figure 4.The composite output resistance is:DS012911-32FIGURE 3.Output Source Resistance vs Oscillator FrequencyDS012911-22FIGURE 4.Lowering Output Resistance by Paralleling DevicesL M 2660/L M 2661 8Other Applications(Continued)CASCADING DEVICESCascading the LM2660s (or LM2661s)is an easy way to produce a greater negative voltage (as shown in Figure 5).If n is the integer representing the number of devices cascaded,the unloaded output voltage V out is (−nV in ).The effective output resistance is equal to the weighted sum of each individual device:A three-stage cascade circuit shown in Figure 6generates −3V in ,from V in .Cascading is also possible when devices are operating in doubling mode.In Figure 7,two devices are cascaded to generate 3V in .An example of using the circuit in Figure 6or Figure 7is generating +15V or −15V from a +5V input.Note that,the number of n is practically limited since the increasing of n significantly reduces the efficiency and increases the out-put resistance and output voltage ripple.DS012911-23FIGURE 5.Increasing Output Voltage by Cascading DevicesDS012911-24FIGURE 6.Generating −3V in from +V inDS012911-25FIGURE 7.Generating +3V in from +V inLM2660/LM26619Other Applications(Continued)REGULATING V outIt is possible to regulate the output of the LM2660/LM2661by use of a low dropout regulator (such as LP2951).The whole con-verter is depicted in Figure 8.This converter can give a regulated output from −1.5V to −5.5V by choosing the proper resistor ratio:where,V ref =1.235VThe error flag on pin 5of the LP2951goes low when the regulated output at pin 4drops by about 5%.The LP2951can be shut-down by taking pin 3high.Also,as shown in Figure 9by operating LM2660/LM2661in voltage doubling mode and adding a linear regulator (such as LP2981)at the output,we can get +5V output from an input as low as +3V.DS012911-27FIGURE bining LM2660/LM2661with LP2951to Make a Negative Adjustable RegulatorDS012911-28FIGURE 9.Generating +5V from +3V Input VoltageL M 2660/L M 2661 10LM2660/LM2661 Physical Dimensions inches(millimeters)unless otherwise noted8-Lead SO(M)Order Number LM2660M or LM2661MNS Package Number M08A11Physical Dimensionsinches (millimeters)unless otherwise noted (Continued)LIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices or systems which,(a)are intended for surgical implant into the body,or (b)support or sustain life,and whose failure to perform when properly used in accordance with instructions for use provided in the labeling,can be reasonably expected to result in a significant injury to the user.2.A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system,or to affect its safety or effectiveness.National Semiconductor Corporation AmericasTel:1-800-272-9959Fax:1-800-737-7018Email:support@National Semiconductor EuropeFax:+49(0)180-5308586Email:europe.support@Deutsch Tel:+49(0)180-5308585English Tel:+49(0)180-5327832Français Tel:+49(0)180-5329358Italiano Tel:+49(0)180-5341680National Semiconductor Asia Pacific Customer Response Group Tel:65-2544466Fax:65-2504466Email:sea.support@National Semiconductor Japan Ltd.Tel:81-3-5639-7560Fax:81-3-5639-75078-Lead Mini SO (MM)Order Number LM2660MM or LM2661MMNS Package Number MUA08AL M 2660/L M 2661S w i t c h e d C a p a c i t o r V o l t a g e C o n v e r t e rNational does not assume any responsibility for use of any circuitry described,no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.。

LM2703中文资料

LM2703Micropower Step-up DC/DC Converter with 350mA Peak Current LimitGeneral DescriptionThe LM2703is a micropower step-up DC/DC in a small 5-lead SOT-23package.A current limited,fixed off-time control scheme conserves operating current resulting in high efficiency over a wide range of load conditions.The 21V switch allows for output voltages as high as 20V.The low 400ns off-time permits the use of tiny,low profile inductors and capacitors to minimize footprint and cost in space-conscious portable applications.The LM2703is ideal for LCD panels requiring low current and high efficiency as well as white LED applications for cellular phone back-lighting.The LM2703can drive up to 4white LEDs from a single Li-Ion battery.Featuresn 350mA,0.7Ω,internal switchn Uses small surface mount components n Adjustable output voltage up to 20V n 2.2V to 7V input range n Input undervoltage lockout n 0.01µA shutdown currentnSmall 5-Lead SOT-23packageApplicationsn LCD Bias Suppliesn White LED Back-Lighting n Handheld Devices n Digital CamerasnPortable ApplicationsTypical Application Circuit20030601FIGURE 1.Typical 20V ApplicationApril 2003LM2703Micropower Step-up DC/DC Converter with 350mA Peak Current Limit©2003National Semiconductor Corporation Connection DiagramTop View20030602SOT23-5T Jmax=125˚C,θJA =220˚C/W (Note 2)Ordering InformationOrder Number Package Type NSC Package DrawingTop Mark Supplied AsLM2703MF-ADJ SOT23-5MA05B S48B 1000Units,Tape and Reel LM2703MFX-ADJSOT23-5MA05BS48B3000Units,Tape and ReelPin Description/FunctionsPin Name Function1SW Power Switch input.2GND Ground.3FB Output voltage feedback input.4SHDN Shutdown control input,active low.5V INAnalog and Power input.SW(Pin 1):Switch Pin.This is the drain of the internal NMOS power switch.Minimize the metal trace area con-nected to this pin to minimize EMI.GND(Pin 2):Ground Pin.Tie directly to ground plane.FB(Pin 3):Feedback Pin.Set the output voltage by selecting values for R1and R2using:Connect the ground of the feedback network to an AGND plane which should be tied directly to the GND pin.SHDN(Pin 4):Shutdown Pin.The shutdown pin is an active low control.Tie this pin above 1.1V to enable the device.Tie this pin below 0.3V to turn off the device.V IN (Pin 5):Input Supply Pin.Bypass this pin with a capacitor as close to the device as possible.L M 2703 2Absolute Maximum Ratings(Note1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.V IN7.5V SW Voltage21V FB Voltage2V SHDN Voltage7.5V Maximum Junction Temp.T J(Note2)150˚CLead Temperature(Soldering10sec.)300˚C Vapor Phase(60sec.)215˚CInfrared(15sec.)220˚C ESD Ratings(Note3)Human Body ModelMachine Model(Note4)2kV200V Operating ConditionsJunction Temperature(Note5)−40˚C to+125˚C Supply Voltage 2.2V to7V SW Voltage Max.20.5VElectrical CharacteristicsSpecifications in standard type face are for T J=25˚C and those in boldface type apply over the full Operating Temperature Range(T J=−40˚C to+125˚C).Unless otherwise specified.V IN=2.2V.Symbol Parameter ConditionsMin(Note5)Typ(Note6)Max(Note5)UnitsI Q Device Disabled FB=1.3V4070µA Device Enabled FB=1.2V235300Shutdown SHDN=0V0.01 2.5V FB FeedbackTrip Point 1.189 1.237 1.269VI CL Switch Current Limit275260350400400mAI B FB Pin Bias Current FB=1.23V(Note7)30120nA V IN Input Voltage Range 2.27.0V R DSON Switch R DSON0.7 1.6ΩT OFF Switch Off Time400ns I SD SHDN Pin Current SHDN=V IN,T J=25˚C080nASHDN=V IN,T J=125˚C15SHDN=GND0I L Switch Leakage Current V SW=20V0.055µA UVP Input Undervoltage Lockout ON/OFF Threshold 1.8V V FBHysteresisFeedback Hysteresis8mVSHDN Threshold SHDN low0.70.3V SHDN High 1.10.7θJA Thermal Resistance220˚C/W Note1:Absolute maximum ratings are limits beyond which damage to the device may occur.Operating Ratings are conditions for which the device is intended to be functional,but device parameter specifications may not be guaranteed.For guaranteed specifications and test conditions,see the Electrical Characteristics.Note2:The maximum allowable power dissipation is a function of the maximum junction temperature,T J(MAX),the junction-to-ambient thermal resistance,θJA, and the ambient temperature,T A.See the Electrical Characteristics table for the thermal resistance.The maximum allowable power dissipation at any ambient temperature is calculated using:P D(MAX)=(T J(MAX)−T A)/θJA.Exceeding the maximum allowable power dissipation will cause excessive die temperature.Note3:The human body model is a100pF capacitor discharged through a1.5kΩresistor into each pin.The machine model is a200pF capacitor discharged directly into each pin.Note4:ESD susceptibility using the machine model is150V for SW pin.Note5:All limits guaranteed at room temperature(standard typeface)and at temperature extremes(bold typeface).All room temperature limits are100% production tested or guaranteed through statistical analysis.All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control(SQC)methods.All limits are used to calculate Average Outgoing Quality Level(AOQL).Note6:Typical numbers are at25˚C and represent the most likely norm.Note7:Feedback current flows into the pin.LM27033Typical Performance CharacteristicsEnable Current vs V IN(Part Switching)Disable Current vs V IN (Part Not Switching)2003060520030606Efficiency vs Load Current Efficiency vs Load Current2003061020030611L M 2703 4Typical Performance Characteristics(Continued)Efficiency vs Load CurrentSHDN Threshold vs V IN2003061220030613Switch Current Limit vs V IN Switch R DSON vs V IN2003061420030615LM27035Typical Performance Characteristics(Continued)FB Trip Point and FB Pin Current vs TemperatureOutput Voltage vs Load Current2003062320030622Step Response Start-Up/Shutdown20030616V OUT =20V,V IN =2.5V1)Load,1mA to 10mA to 1mA,DC 2)V OUT ,200mV/div,AC 3)I L ,200mA/div,DC T =50µs/div20030617V OUT =20V,V IN =2.5V 1)SHDN,1V/div,DC 2)I L ,200mA/div,DC 3)V OUT ,20V/div,DC T =400µs/div R L =1.8k ΩL M 2703 6Operation20030604FIGURE 2.LM2703Block Diagram20030618V OUT =20V,V IN =2.5V 1)V SW ,20V/div,DC2)Inductor Current,200mA/div,DC 3)V OUT ,200mV/div,AC T =4µs/divFIGURE 3.Typical Switching WaveformLM27037Operation(Continued)The LM2703features a constant off-time control scheme.Operation can be best understood by referring to Figure 2and Figure 3.Transistors Q1and Q2and resistors R3and R4of Figure 2form a bandgap reference used to control the output voltage.When the voltage at the FB pin is less than 1.237V,the Enable Comp in Figure 2enables the device and the NMOS switch is turned on pulling the SW pin to ground.When the NMOS switch is on,current begins to flow through inductor L while the load current is supplied by the output capacitor C OUT .Once the current in the inductor reaches the current limit,the CL Comp trips and the 400ns One Shot turns off the NMOS switch.The SW voltage will then rise to the output voltage plus a diode drop and the inductor current will begin to decrease as shown in Figure 3.During this time the energy stored in the inductor is transferred to C OUT and the load.After the 400ns off-time the NMOS switch is turned on and energy is stored in the inductor again.This energy transfer from the inductor to the output causes a stepping effect in the output ripple as shown in Figure 3.This cycle is continued until the voltage at FB reaches 1.237V.When FB reaches this voltage,the enable compara-tor then disables the device turning off the NMOS switch and reducing the Iq of the device to 40uA.The load current is then supplied solely by C OUT indicated by the gradually decreasing slope at the output as shown in Figure 3.When the FB pin drops slightly below 1.237V,the enable compara-tor enables the device and begins the cycle described pre-viously.The SHDN pin can be used to turn off the LM2703and reduce the I q to 0.01µA.In shutdown mode the output voltage will be a diode drop lower than the input voltage.Application InformationINDUCTOR SELECTIONThe appropriate inductor for a given application is calculated using the following equation:where V D is the schottky diode voltage,I CL is the switch current limit found in the Typical Performance Characteris-tics section,and T OFF is the switch off time.When using this equation be sure to use the minimum input voltage for the application,such as for battery powered applications.For the LM2703constant-off time control scheme,the NMOS power switch is turned off when the current limit is reached.There is approximately a 200ns delay from the time the current limit is reached in the NMOS power switch and when the internal logic actually turns off the switch.During this 200ns delay,the peak inductor current will increase.This increase in inductor current demands a larger saturation current rating for the inductor.This saturation current can be approximated by the following equation:Choosing inductors with low ESR decrease power losses and increase efficiency.Care should be taken when choosing an inductor.For appli-cations that require an input voltage that approaches the output voltage,such as when converting a Li-Ion battery voltage to 5V,the 400ns off time may not be enough time to discharge the energy in the inductor and transfer the energy to the output capacitor and load.This can cause a ramping effect in the inductor current waveform and an increased ripple on the output ing a smaller inductor will cause the I PK to increase and will increase the output voltage ripple further.This can be solved by adding a 4.7pF capaci-tor across the R F1feedback resistor (Figure 2)and slightly increasing the output capacitor.A smaller inductor can then be used to ensure proper discharge in the 400ns off time.DIODE SELECTIONTo maintain high efficiency,the average current rating of the schottky diode should be larger than the peak inductor cur-rent,I PK .Schottky diodes with a low forward drop and fast switching speeds are ideal for increasing efficiency in por-table applications.Choose a reverse breakdown of the schottky diode larger than the output voltage.CAPACITOR SELECTIONChoose low ESR capacitors for the output to minimize output voltage ripple.Multilayer ceramic capacitors are the best choice.For most applications,a 1µF ceramic capacitor is sufficient.For some applications a reduction in output volt-age ripple can be achieved by increasing the output capaci-tor.Local bypassing for the input is needed on the LM2703.Multilayer ceramic capacitors are a good choice for this as well.A 4.7µF capacitor is sufficient for most applications.For additional bypassing,a 100nF ceramic capacitor can be used to shunt high frequency ripple on the input.LAYOUT CONSIDERATIONSThe input bypass capacitor C IN ,as shown in Figure 1,must be placed close to the IC.This will reduce copper trace resistance which effects input voltage ripple of the IC.For additional input voltage filtering,a 100nF bypass capacitor can be placed in parallel with C IN to shunt any high fre-quency noise to ground.The output capacitor,C OUT ,should also be placed close to the IC.Any copper trace connections for the Cout capacitor can increase the series resistance,which directly effects output voltage ripple.The feedback network,resistors R1and R2,should be kept close to the FB pin to minimize copper trace connections that can inject noise into the system.The ground connection for the feed-back resistor network should connect directly to an analog ground plane.The analog ground plane should tie directly to the GND pin.If no analog ground plane is available,the ground connection for the feedback network should tie di-rectly to the GND pin.Trace connections made to the induc-tor and schottky diode should be minimized to reduce power dissipation and increase overall efficiency.L M 2703 8Application Information(Continued)20030609FIGURE 4.White LED Application20030619FIGURE 5.Li-Ion 5V Application20030620FIGURE 6.Li-Ion 12V ApplicationLM27039Application Information(Continued)20030621FIGURE 7.5V to 12V ApplicationL M 2703 10Physical Dimensionsinches (millimeters)unless otherwise noted5-Lead Small Outline Package (M5)For Ordering,Refer to Ordering Information TableNS Package Number MA05BLIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices or systems which,(a)are intended for surgical implant into the body,or (b)support or sustain life,and whose failure to perform when properly used in accordance with instructions for use provided in the labeling,can be reasonably expected to result in a significant injury to the user.2.A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system,or to affect its safety or effectiveness.National Semiconductor Americas Customer Support CenterEmail:new.feedback@ Tel:1-800-272-9959National SemiconductorEurope Customer Support CenterFax:+49(0)180-5308586Email:europe.support@Deutsch Tel:+49(0)6995086208English Tel:+44(0)8702402171Français Tel:+33(0)141918790National Semiconductor Asia Pacific Customer Support Center Fax:+65-62504466Email:ap.support@ Tel:+65-62544466National SemiconductorJapan Customer Support Center Fax:81-3-5639-7507Email:jpn.feedback@ Tel:81-3-5639-7560LM2703Micropower Step-up DC/DC Converter with 350mA Peak Current LimitNational does not assume any responsibility for use of any circuitry described,no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.元器件交易网。

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LM63±1˚C/±3˚C Accurate Remote Diode Digital Temperature Sensor with Integrated Fan ControlGeneral DescriptionThe LM63is a remote diode temperature sensor with inte-grated fan control.The LM63accurately measures:(1)its own temperature and (2)the temperature of a diode-connected transistor,such as a 2N3904,or a thermal diode commonly found on Computer Processors,Graphics Pro-cessor Units (GPU)and other ASIC’s.The LM63remote temperature sensor’s accuracy is factory trimmed for the series resistance and 1.0021non-ideality of the Intel ®0.13µm Pentium ®4and Mobile Pentium 4Processor-M thermal diode.The LM63has an offset register to correct for errors caused by different non-ideality factors of other thermal di-odes.For the latest information contact hardware.monitor.team @ .The LM63also features an integrated,pulse-width-modulated (PWM),open-drain fan control output.Fan speed is a combination of the remote temperature reading,the lookup table and the register settings.The 8-step Lookup Table enables the user to program a non-linear fan speed vs.temperature transfer function often used to quiet acoustic fan noise.Featuresn Accurately senses diode-connected 2N3904transistors or thermal diodes on-board large processors or ASIC’s n Accurately senses its own temperaturen Factory trimmed for Intel Pentium 4and Mobile Pentium 4Processor-M thermal diodesn Integrated PWM fan speed control outputn Acoustic fan noise reduction with User-programmable 8-step Lookup Tablen Multi-function,user-selectable pin for either ALERT output,or Tachometer input,functions n Tachometer input for measuring fan RPMn Offset register can adjust for a variety of thermal diodesn 10bit plus sign remote diode temperature data format,with 0.125˚C resolutionn SMBus 2.0compatible interface,supports TIMEOUT n LM86-compatible pinoutn LM86-compatible register set n 8-pin SOIC packageKey Specificationsj Remote Diode Temp Accuracy(with quantizationerror)Ambient Temp Diode Temp I PWML Max Version Max Error30to 50˚C 60to 100˚C 5mA LM63C ±1.0˚C 30to 50˚C 60to 100˚C 5mA LM63D ±3.0˚C 0to 85˚C25to 125˚C8mAAll ±3.0˚Cj Local Temp Accuracy (includes quantization error)Ambient Temp Max Error25˚C to 125˚C±3.0˚Cj Supply Voltage 3.0V to 3.6V j Supply Current1.3mA (typ)Applicationsn Computer Processor Thermal Management (Laptop,Desktop,Workstations,Servers)n Graphics Processor Thermal Management n Electronic Test Equipment n Projectorsn Office Equipment n Industrial ControlsConnection Diagram20057001Intel ®and Pentium ®are registered trademarks of Intel Corporation.May 2003LM63±1˚C/±3˚C Accurate Remote Diode Digital Temperature Sensor with Integrated Fan Control©2003National Semiconductor Corporation Pin DescriptionsPinNameInput/OutputFunction and Connection1V DDPower Supply InputConnect to a low-noise +3.3±0.3VDC power supply,and bypass to GND with a 0.1µF ceramic capacitor in parallel with a 100pF ceramic capacitor.A bulk capacitance of 10µF needs to be in the vicinity of the LM63’s V DD pin.2D+Analog Input Connect to the anode (positive side)of the remote diode.A 2.2nF ceramic capacitor must be connected between pins 2and 3.3D−Analog Input Connect to the cathode (negative side)of the remote diode.A 2.2nF ceramic capacitor must be connected between pins 2and 3.4PWM Open-Drain Digital Output Open-Drain Digital Output.Connect to fan drive circuitry.The power-on default for this pin is low (pin 4pulled to ground).5GND Ground This is the analog and digital ground return.6ALERT/TACHDigital I/O Depending on how the LM63is programmed,this pin is either anopen-drain ALERT output or a tachometer input for measuring fan speed.The power-on default for this pin is the ALERT function.7SMBDAT Digital Input/Open-Drain OutputThis is the bi-directional SMBus data line.8SMBCLKDigital InputDigital Input.This is the SMBus clock input.Simplified Block Diagram20057002L M 63 2Typical Application20057003 Ordering InformationPart Description Top Mark Order Number Transport Media LM63C(±1˚C)8-pin SOIC LM63CIMA LM63CIMAX2500Units in Tape and Reel LM63C(±1˚C)8-pin SOIC LM63CIMA LM63CIMA95Units in RailLM63D(±3˚C)8-pin SOIC LM63DIMA LM63DIMAX2500Units in Tape and Reel LM63D(±3˚C)8-pin SOIC LM63DIMA LM63DIMA95Units in RailLM63Evaluation Board With Software and User’s Guide N/A LM63EVAL PackagedLM63 3Absolute Maximum Ratings(Notes 1,2)Supply Voltage,V DD−0.3V to 6.0V Voltage on SMBDAT,SMBCLK,ALERT/Tach,PWM Pins −0.5V to 6.0VVoltage on Other Pins −0.3V to (V DD +0.3V)Input Current,D−Pin±1mAInput Current at All Other Pins (Note 3)5mA Package Input Current (Note 3)30mA Package Power Dissipation (Note 5)SMBDAT,ALERT,PWM pins Output Sink Current 10mAStorage Temperature−65˚C to +150˚CESD Susceptibility (Note 4)Human Body Model2000V Machine Model200VSoldering Information,Lead Temperature SOIC-8Package (Note 6)Vapor Phase (60seconds)215˚C Infrared (15seconds)220˚COperating Ratings (Notes 1,2)Specified Temperature RangeT MIN ≤T A ≤T MAX LM63CIM,LM63DIM0˚C ≤T A ≤+85˚C Remote Diode Temperature Range 0˚C ≤T A ≤+125˚C Supply Voltage Range (V DD )+3.0V to +3.6VDC Electrical CharacteristicsTEMPERATURE-TO-DIGITAL CONVERTER CHARACTERISTICS The following specifications apply for V DD =3.0VDC to 3.6VDC,and all analog source impedance R S =50Ωunless otherwise specified in the conditions.Boldface limits apply for T A =T MIN to T MAX ;all other limits T A =+25˚C.ParameterConditionsVersion Typical (Note 7)Limits (Note 8)Units (Limits)Temperature Error Using the Remote Thermal Diode of an Intel Pentium 4or Mobile Pentium 4Processor-M with typical non-ideality of 1.0021.For other processors e-mailhardware.monitor.team @ to obtain the latest data.T A =+30to +50˚C I PWML ≤5mA T D =+60to +100˚C T D =Remote Diode Junction TemperatureLM63C ±1˚C (max)LM63D ±3˚C (max)T A =+0to +85˚C I PWML ≤8mAT D =+25to +125˚CAll ±3˚C (max)Temperature Error Using the Local DiodeT A =+25to +125˚C (Note 10)All ±1±3˚C (max)Remote Diode Resolution All 11Bits 0.125˚C Local Diode ResolutionAll 8Bits 1˚CConversion Time,All Temperatures Fastest SettingAll 31.2534.4ms (max)D−Source VoltageAll 0.7V Diode Source Current(V D+−V D−)=+0.65V;High CurrentAll160315µA (max)110µA (min)Low CurrentAll1320µA (max)7µA (min)Operating Electrical CharacteristicsParameterConditions Typ (Note 7)Limits (Note 8)UnitsALERT and PWM Output Saturation VoltageALERTPWM I OUT 4mA 5mA0.4V (max)I OUT6mA0.55Power-On-Reset Threshold Voltage 2.4V (max)1.8V (min)Supply Current (Note 9)SMBus Inactive,16Hz Conversion Rate 1.1 2.0mA (max)STANDBY Mode300µAL M 63 4AC Electrical CharacteristicsThe following specifications apply for V DD=3.0VDC to3.6VDC,and all analog source impedance R S=50Ωunless other-wise specified in the conditions.Boldface limits apply for T A=T MIN to T MAX;all other limits T A=+25˚C.Symbol Parameter Conditions Typical(Note7)Limits(Note8)Units(Limit)TACHOMETER ACCURACYFan Control Accuracy±10%(max)Fan Full-Scale Count65535(max)Fan Counter Clock Frequency90kHzFan Count Update Frequency 1.0Hz FAN PWM OUTPUTFrequency Accuracy±10%(max) Digital Electrical CharacteristicsSymbol Parameter Conditions Typical(Note7)Limits(Note8)Units(Limit)V IH Logical High Input Voltage 2.1V(min) V IL Logical Low Input Voltage0.8V(max) I IH Logical High Input Current V IN=V DD0.005+10µA(max) I IL Logical Low Input Current V IN=GND−0.005−10µA(max) C IN Digital Input Capacitance20pFSMBus Logical Electrical CharacteristicsThe following specifications apply for V DD=3.0VDC to3.6VDC,and all analog source impedance R S=50Ωunless other-wise specified in the conditions.Boldface limits apply for T A=T MIN to T MAX;all other limits T A=+25˚C.Symbol Parameter Conditions Typical(Note7)Limits(Note8)Units(Limit)SMBDAT OPEN-DRAIN OUTPUTV OL Logic Low Level Output Voltage I OL=4mA0.4V(max)I OH High Level Output Current V OUT=V DD0.0310µA(max) SMBDAT,SMBCLK INPUTSV IH Logical High Input Voltage 2.1V(min) V IL Logical Low Input Voltage0.8V(max)V HYST Logic Input Hysteresis Voltage320mVLM635SMBus Digital Switching CharacteristicsUnless otherwise noted,these specifications apply for V DD =+3.0VDC to +3.6VDC,C L (load capacitance)on output lines =80pF.Boldface limits apply for T A =T J ;T MIN ≤T A ≤T MAX ;all other limits T A =T J =+25˚C,unless otherwise noted.The switching characteristics of the LM63fully meet or exceed the published specifications of the SMBus version 2.0.The following parameters are the timing relationships between SMBCLK and SMBDAT signals related to the LM63.They adhere to but are not necessarily the same as the SMBus bus specifications.Symbol ParameterConditionsLimits (Note 8)Units (Limit)f SMB SMBus Clock Frequency 10100kHz (min)kHz (max)t LOW SMBus Clock Low Time From V IN(0)max to V IN(0)max 4.7µs (min)t HIGH SMBus Clock High Time From V IN(1)minto V IN(1)min4.050µs (min)µs (max)t R SMBus Rise Time (Note 11)1µs (max)t F SMBus Fall Time (Note 12)0.3µs (max)t OF Output Fall TimeC L =400pF,I O =3mA250ns (max)t TIMEOUT SMBData and SMBCLK Time Low for Reset of Serial Interface See (Note 13)2535ms (min)ms (max)t SU:DAT Data In Setup Time to SMBCLK High 250ns (min)t HD:DAT Data Out Hold Time after SMBCLK Low 300930ns (min)ns (max)t HD:STA Hold Time after (Repeated)Start Condition.After this period the first clock is generated. 4.0µs (min)t SU:STO Stop Condition SMBCLK High to SMBDAT Low (Stop Condition Setup)100ns (min)t SU:STA SMBus Repeated Start-Condition Setup Time,SMBCLK High to SMBDAT Low4.7µs (min)t BUFSMBus Free Time between Stop and Start Conditions4.7µs (min)20057004SMBus Timing Diagram for SMBCLK and SMBDAT SignalsL M 63 6Note1:Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.Operating Ratings indicate conditions for which the device is functional,but do not guarantee performance limits.For guaranteed specifications and test conditions,see the Electrical Characteristics.The guaranteed specifications apply only for the test conditions listed.Some performance characteristics may degrade when the device is not operated under the listed test conditions.Note2:All voltages are measured with respect to GND,unless otherwise noted.Note3:When the input voltage(V IN)at any pin exceeds the power supplies(V IN<GND or V IN>V+),the current at that pin should be limited to5mA.Parasitic components and/or ESD protection circuitry are shown below for the LM63’s pins.The nominal breakdown voltage of D3is6.5V.Care should be taken not to forward bias the parasitic diode,D1,present on pins D+and D−.Doing so by more than50mV may corrupt temperature measurements.An"X"means it exists in the circuit.Pin Name PIN#D1D2D3D4D5D6R1SNP ESD CLAMP V DD1X XD+2X X X X X XD−3X X X X X X PWM4X X X XALERT/Tach6X X X XSMBDAT7X X X XSMBCLK8X XNote4:Human body model,100pF discharged through a1.5kΩresistor.Machine model,200pF discharged directly into each pin.See Figure1above for the ESD Protection Input Structure.Note5:Thermal resistance junction-to-ambient when attached to a printed circuit board with2oz.foil is168˚C/W.Note6:See the URL“/packaging/”for other recommendations and methods of soldering surface mount devices.Note7:“Typicals”are at T A=25˚C and represent most likely parametric norm.They are to be used as general reference values not for critical design calculations. Note8:Limits are guaranteed to National’s AOQL(Average Outgoing Quality Level).Note9:The supply current will not increase substantially with an SMBus transaction.Note10:Local temperature accuracy does not include the effects of self-heating.The rise in temperature due to self-heating is the product of the internal power dissipation of the LM63and the thermal resistance.See(Note5)for the thermal resistance to be used in the self-heating calculation.Note11:The output rise time is measured from(V IL max-0.15V)to(V IH min+0.15V).Note12:The output fall time is measured from(V IH min+0.15V)to(V IL min-0.15V).Note13:Holding the SMBData and/or SMBCLK lines Low for a time interval greater than t TIMEOUT will reset the LM63’s SMBus state machine,therefore setting SMBDAT and SMBCLK pins to a high impedance state.1.0Functional DescriptionThe LM63Remote Diode Temperature Sensor with Inte-grated Fan Control incorporates a∆V BE-based temperature sensor using a Local or Remote diode and a10-bit plus sign ∆ΣADC(Delta-Sigma Analog-to-Digital Converter).The pulse-width modulated(PWM)open-drain output,with a pull-up resistor,can drive a switching transistor to modulate the fan.When the ALERT/Tach is programmed to the Tach mode the LM63can measure the fan speed on the pulses from the fan’s tachometer output.When the ALERT/Tach pin is programmed to the ALERT mode the ALERT open-drain output will be pulled low when the measured temperature exceeds certain programmed limits when enabled.Details are contained in the sections below.The LM63’s two-wire interface is compatible with the SMBus Specification2.0.For more information the reader is di-rected to .In the LM63digital comparators are used to compare the measured Local Temperature(LT)to the Local High Setpoint user-programmable temperature limit register.The mea-sured Remote Temperature(RT)is digitally compared to the Remote High Setpoint(RHS),the Remote Low Setpoint (RLS),and the Remote T_CRIT Setpoint(RCS)user-programmable temperature limits.An ALERT output will oc-cur when the measured temperature is:(1)higher than either the High Setpoint or the T_CRIT Setpoint,or(2)lower than the Low Setpoint.The ALERT Mask register allows the user to prevent the generation of these ALERT outputs.The temperature hysteresis is set by the value placed in the Hysteresis Register(TH).The LM63may be placed in a low power Standby mode by setting the Standby bit found in the Configuration Register.In the Standby mode continuous conversions are stopped.In20057005FIGURE1.ESD Protection Input StructureLM6371.0Functional Description(Continued)Standby mode the user may choose to allow the PWM output signal to continue,or not,by programming the PWM Disable in Standby bit in the Configuration Register.The Local Temperature reading and setpoint data registers are 8-bits wide.The format of the 11-bit remote temperature data is a 16-bit left justified word.Two 8-bit registers,high and low bytes,are provided for each setpoint as well as the temperature reading.Two Remote Temperature Offset (RTO)Registers:High Byte and Low Byte (RTOHB and RTOLB)may be used to correct the temperature readings by adding or subtracting a fixed value based on a different non-ideality factor of the thermal diode if different from the 0.13micron Intel Pentium 4or Mobile Pentium 4Processor-M processor’s thermal diode.See Section 4.1Thermal Diode Non-Ideality.1.1CONVERSION SEQUENCEThe LM63takes approximately 31.25ms to convert the Local Temperature (LT),Remote Temperature (RT),and to update all of its registers.The Conversion Rate may be modified using the Conversion Rate Register.When the conversion rate is modified a delay is inserted between conversions,the actual conversion time remains at 31.25ms.Different Conversion Rates will cause the LM63to draw different amounts of supply current as shown in Figure 2.1.2THE ALERT/TACH PIN AS ALERT OUTPUTThe ALERT/Tach pin is a multi-use pin.In this section we will address the ALERT active-low open-drain output function.When the ALERT/Tach Select bit is written as a zero in the Configuration Register the ALERT output is selected.Also,when the ALERT Mask bit in the Configuration register is written as zero the ALERT interrupts are enabled.The LM63’s ALERT pin is versatile and can produce three different methods of use to best serve the system designer:(1)as a temperature comparator (2)as a temperature-based interrupt flag,and (3)as part of an SMBus ALERT System.The three methods of use are further described below.The ALERT and interrupt methods are different only in how the user interacts with the LM63.The remote temperature (RT)reading is associated with a T_CRIT Setpoint Register,and both local and remote tem-perature (LT and RT)readings are associated with a HIGH setpoint register (LHS and RHS).The RT is also associated with a LOW setpoint register (RLS).At the end of every temperature reading a digital comparison determines whether that reading is above its HIGH or T_CRIT setpoint or below its LOW setpoint.If so,the corresponding bit in the ALERT Status Register is set.If the ALERT mask bit is low,any bit set in the ALERT Status Register,with the exception of Busy or Open,will cause the ALERT output to be pulled low.Any temperature conversion that is out of the limits defined in the temperature setpoint registers will trigger an ALERT.Additionally,the ALERT Mask Bit must be cleared to trigger an ALERT in all modes.The three different ALERT modes will be discussed in the following sections.1.2.1ALERT Output as a Temperature ComparatorWhen the LM63is used in a system in which does not require temperature-based interrupts,the ALERT output could be used as a temperature comparator.In this mode,once the condition that triggered the ALERT to go low is no longer present,the ALERT is negated (Figure 3).For ex-ample,if the ALERT output was activated by the comparison of LT >LHS,when this condition is no longer true,the ALERT will return HIGH.This mode allows operation without software intervention,once all registers are configured dur-ing set-up.In order for the ALERT to be used as a tempera-ture comparator,the Comparator Mode bit in the Remote Diode Temperature Filter and Comparator Mode Register must be asserted.This is not the power-on default state.1.2.2ALERT Output as an InterruptThe LM63’s ALERT output can be implemented as a simple interrupt signal when it is used to trigger an interrupt service routine.In such systems it is desirable for the interrupt flag to repeatedly trigger during or before the interrupt service rou-tine has been completed.Under this method of operation,during the read of the ALERT Status Register the LM63will set the ALERT Mask bit in the Configuration Register if any bit in the ALERT Status Register is set,with the exception of Busy and Open.This prevents further ALERT triggering until the master has reset the ALERT Mask bit,at the end of the interrupt service routine.The ALERT Status Register bits are20057006FIGURE 2.Supply Current vs Conversion Rate 20057007FIGURE 3.ALERT Output as Temperature ComparatorResponse Diagram L M 6381.0Functional Description(Continued) cleared only upon a read command from the master(see Figure4)and will be re-asserted at the end of the next conversion if the triggering condition(s)persist(s).In order for the ALERT to be used as a dedicated interrupt signal,the Comparator Mode bit in the Remote Diode Temperature Filter and Comparator Mode Register must be set low.This is the power-on default state.The following sequence de-scribes the response of a system that uses the ALERT output pin as an interrupt flag:1.Master senses ALERT low.2.Master reads the LM63ALERT Status Register to deter-mine what caused the ALERT.3.LM63clears ALERT Status Register,resets the ALERTHIGH and sets the ALERT Mask bit in the Configuration Register.4.Master attends to conditions that caused the ALERT tobe triggered.The fan is started,setpoint limits are ad-justed,etc.5.Master resets the ALERT Mask bit in the ConfigurationRegister.1.2.3ALERT Output as an SMBus ALERTAn SMBus alert line is created when the ALERT output is connected to:(1)one or more ALERT outputs of other SMBus compatible devices,and(2)to a master.Under this implementation,the LM63’s ALERT should be operated us-ing the ARA(Alert Response Address)protocol.The SMBus2.0ARA protocol,defined in the SMBus specification2.0,isa procedure designed to assist the master in determining which part generated an interrupt and to service that inter-rupt.The SMBus alert line is connected to the open-drain ports of all devices on the bus,thereby AND’ing them together.The ARA method allows the SMBus master,with one command, to identify which part is pulling the SMBus alert line LOW.It also prevents the part from pulling the line LOW again for the same triggering condition.When an ARA command is re-ceived by all devices on the bus,the devices pulling the SMBus alert line LOW:(1)send their address to the master and(2)release the SMBus alert line after acknowledgement of their address.The SMBus Specifications1.1and2.0state that in response to and ARA(Alert Response Address)“after acknowledging the slave address the device must disengage its ALERT pulldown”.Furthermore,“if the host still sees ALERT low when the message transfer is complete,it knows to read the ARA again.”This SMBus“disengaging ALERT requirement prevents locking up the SMBus alert petitive parts may address the“disengaging of ALERT”differently than the LM63or not at all.SMBus systems that implement the ARA protocol as suggested for the LM63will be fully compatible with all competitive parts.The LM63fulfills“disengaging of ALERT”by setting the ALERT Mask Bit in the Configuration Register after sending out its address in response to an ARA and releasing the ALERT output pin.Once the ALERT Mask bit is activated, the ALERT output pin will be disabled until enabled by software.In order to enable the ALERT the master must read the ALERT Status Register,during the interrupt service rou-tine and then reset the ALERT Mask bit in the Configuration Register to0at the end of the interrupt service routine. The following sequence describes the ARA response proto-col.1.Master senses SMBus alert line low2.Master sends a START followed by the Alert ResponseAddress(ARA)with a Read Command.3.Alerting Device(s)send ACK.4.Alerting Device(s)send their address.While transmittingtheir address,alerting devices sense whether their ad-dress has been transmitted correctly.(The LM63will reset its ALERT output and set the ALERT Mask bit once its complete address has been transmitted successfully.)5.Master/slave NoACK6.Master sends STOP7.Master attends to conditions that caused the ALERT tobe triggered.The ALERT Status Register is read and fan started,setpoints adjusted,etc.8.Master resets the ALERT Mask bit in the ConfigurationRegister.The ARA,0001100,is a general call address.No device should ever be assigned to this address.The ALERT Configuration bit in the Remote Diode Tempera-ture Filter and Comparator Mode Register must be set low in order for the LM63to respond to the ARA command.The ALERT output can be disabled by setting the ALERT Mask bit in the Configuration Register.The power-on default is to have the ALERT Mask bit and the ALERT Configuration bit low.20057008FIGURE4.ALERT Output as an Interrupt TemperatureResponse DiagramLM6391.0Functional Description(Continued)1.3SMBus INTERFACESince the LM63operates as a slave on the SMBus the SMBCLK line is an input and the SMBDAT line is bi-directional.The LM63never drives the SMBCLK line and it does not support clock stretching.According to SMBus specifications,the LM63has a 7-bit slave address.All bits,A6through A0,are internally programmed and cannot be changed by software or hardware.The complete slave address is:A6A5A4A3A2A1A01111.4POWER-ON RESET (POR)DEFAULT STATESFor information on the POR default states see Section 2.2LM63Register Map in Functional Order.1.5TEMPERATURE DATA FORMATTemperature data can only be read from the Local and Remote Temperature registers.The High,Low and T_CRIT setpoint registers are Read/Write.Remote temperature data is represented by an 11-bit,two’s complement word with a Least Significant Bit (LSB)equal to 0.125˚C.The data format is a left justified 16-bit word avail-able in two 8-bit registers:Temperature Digital Output BinaryHex +125˚C 01111101000000007D00+25˚C 00011001000000001900+1˚C 00000001000000000100+0.125˚C 000000000010000000200˚C 00000000000000000000−0.125˚C 1111111111100000FFE0−1˚C 1111111100000000FF00−25˚C 1110011100000000E700−55˚C1100100100000000C900Local Temperature data is represented by an 8-bit,two’s complement byte with an LSB equal to 1˚C:Temperature Digital Output Binary Hex +125˚C 011111017D +25˚C 0001100119+1˚C 00000001010˚C 0000000000−1˚C 11111111FF −25˚C 11100111E7−55˚C11001001C91.6OPEN-DRAIN OUTPUTSThe SMBDAT,ALERT,and PWM outputs are open-drain outputs and do not have internal pull-ups.A “High”level will not be observed on these pins until pull-up current is pro-vided by an internal source,typically through a pull-up resis-tor.Choice of resistor value depends on several factors but,in general,the value should be as high as possible consis-tent with reliable operation.This will lower the power dissi-pation of the LM63and avoid temperature errors caused by self-heating of the device.The maximum value of the pull-up resistor to provide the 2.1V high level is 88.7k Ω.1.7DIODE FAULT DETECTIONThe LM63can detect fault conditions caused by the remote diode.If the D+pin is detected to be shorted to V DD ,or open:(1)the Remote Temperature High Byte (RTHB)register is loaded with 127˚C,(2)the Remote Temperature Low Byte (RTLB)register is loaded with 0,and (3)the OPEN bit (D2)in the status register is set.Therefore,if the Remote T_CRIT setpoint register (RCS):(1)is set to a value less than +127˚C and (2)the ALERT Mask is disabled,then the ALERT output pin will be pulled low.If the Remote High Setpoint High Byte (RHSHB)is set to a value less than +127˚C and (2)the ALERT Mask is disabled,then the ALERT will be pulled low.The OPEN bit by itself will not trigger an ALERT.If the D+pin is shorted to either ground or D−,then the Remote Temperature High Byte (RTHB)register is loaded with −128˚C (10000000)and the OPEN bit in the ALERT Status Register will not be set.A temperature reading of −128˚C indicates that D+is shorted to either ground or D-.If the value in the Remote Low Setpoint High Byte (RLSHB)Register is more than −128˚C and the ALERT Mask is Dis-abled,ALERT will be pulled low.1.8COMMUNICATING WITH THE LM63Each data register in the LM63falls into one of four types of user accessibility:1.Read Only 2.Write Only3.Read/Write same address4.Read/Write different addressA Write to the LM63is comprised of an address byte and a command byte.A write to any register requires one data byte.Reading the LM63Registers can take place after the requi-site register setup sequence takes place.See Section 2.1.1LM63Required Initial Fan Control Register Sequence.The data byte has the Most Significant Bit (MSB)first.At the end of a read,the LM63can accept either Acknowledge or20057009FIGURE 5.ALERT Output as an SMBus ALERTTemperature Response Diagram L M 63101.0Functional Description(Continued) No-Acknowledge from the Master.Note that the No-Acknowledge is typically used as a signal for the slave indicating that the Master has read its last byte.1.9DIGITAL FILTERThe LM63incorporates a user-configured digital filter to suppress erroneous Remote Temperature readings due to noise.The filter is accessed in the Remote Diode Tempera-ture Filter and Comparator Mode Register.The filter can be set according to the following table.Level2is maximum filtering.Digital Filter Selection TableD2D1Filter00No Filter01Level110Level111Level220057010 FIGURE6.Step Response of the Digital Filter20057011FIGURE7.Impulse Response of the Digital Filter20057012FIGURE8.Digital Filter Response in an Intel Pentium4 processor System.The Filter on and off curves were purposely offset to better show noise performance.LM63。

LM2663资料

LM2662/LM2663Switched Capacitor Voltage Converter General Description The LM2662/LM2663CMOS charge-pump voltage con-verter inverts a positive voltage in the range of 1.5V to 5.5V to the corresponding negative voltage.The LM2662/LM2663uses two low cost capacitors to provide 200mA of output current without the cost,size,and EMI related to inductor based converters.With an operating current of only 300µA and operating efficiency greater than 90%at most loads,the LM2662/LM2663provides ideal performance for battery powered systems.The LM2662/LM2663may also be used as a positive voltage doubler.The oscillator frequency can be lowered by adding an exter-nal capacitor to the OSC pin.Also,the OSC pin may be used to drive the LM2662/LM2663with an external clock.For LM2662,a frequency control (FC)pin selects the oscillatorfrequency of 20kHz or 150kHz.For LM2663,an externalshutdown (SD)pin replaces the FC pin.The SD pin can beused to disable the device and reduce the quiescent currentto 10µA.The oscillator frequency for LM2663is 150kHz.Features n Inverts or doubles input supply voltage n Narrow SO-8Package n 3.5Ωtypical output resistance n 86%typical conversion efficiency at 200mA n (LM2662)selectable oscillator frequency:20kHz/150kHz n (LM2663)low current shutdown mode Applications n Laptop computers n Cellular phones n Medical instruments n Operational amplifier power supplies n Interface power supplies n Handheld instrumentsBasic Application CircuitsVoltage Inverter DS100003-1Positive Voltage DoublerDS100003-2Splitting V IN in HalfDS100003-3January 1999LM2662/LM2663SwitchedCapacitorVoltageConverter ©1999National Semiconductor Corporation Absolute Maximum Ratings(Note1)If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.Supply Voltage(V+to GND,or GND to OUT)6V LV(OUT−0.3V)to(GND+3V) FC,OSC,SD The least negative of(OUT−0.3V)or(V+−6V)to(V++0.3V) V+and OUT Continuous Output Current250mA Output Short-Circuit Duration to GND(Note2)1sec. Power Dissipation(T A=25˚C)(Note3)735mW T J Max(Note3)150˚C θJA(Note3)170˚C/W Operating Junction TemperatureRange−40˚C to+85˚C Storage Temperature Range−65˚C to+150˚C Lead Temperature(Soldering,10seconds)300˚C ESD Rating2kVElectrical CharacteristicsLimits in standard typeface are for T J=25˚C,and limits in boldface type apply over the full operating temperature range.Unless otherwise specified:V+=5V,FC=Open,C1=C2=47µF.(Note4)Symbol Parameter Condition Min Typ Max Units V+Supply Voltage R L=1k Inverter,LV=Open 3.5 5.5Inverter,LV=GND 1.5 5.5VDoubler,LV=OUT 2.5 5.5I Q Supply Current No Load FC=V+(LM2662)1.34mALV=Open SD=Ground(LM2663)FC=Open0.30.8I SD Shutdown Supply Current10µA (LM2663)V SD Shutdown Pin Input Voltage Shutdown Mode 2.0(Note5)V (LM2663)Normal Operation0.3I L Output Current200mAR OUT Output Resistance(Note6)I L=200mA 3.57Ωf OSC Oscillator Frequency(Note7)OSC=Open FC=Open720kHzFC=V+55150f SW Switching Frequency(Note8)OSC=Open FC=Open 3.510kHzFC=V+27.575I OSC OSC Input Current FC=Open±2µAFC=V+±10 P EFF Power Efficiency R L(500)between V+and OUT9096%I L=200mA to GND86V OEFF Voltage Conversion Efficiency No Load9999.96% Note1:Absolute maximum ratings indicate limits beyond which damage to the device may occur.Electrical specifications do not apply when operating the device beyond its rated operating conditions.Note2:OUT may be shorted to GND for one second without damage.However,shorting OUT to V+may damage the device and should be avoided.Also,for tem-peratures above85˚C,OUT must not be shorted to GND or V+,or device may be damaged.Note3:The maximum allowable power dissipation is calculated by using P DMax=(T JMax−T A)/θJA,where T JMax is the maximum junction temperature,T A is the ambient temperature,andθJA is the junction-to-ambient thermal resistance of the specified package.Note4:In the test circuit,capacitors C1and C2are47µF,0.2Ωmaximum ESR capacitors.Capacitors with higher ESR will increase output resistance,reduce output voltage and efficiency.Note5:In doubling mode,when V out>5V,minimum input high for shutdown equals V out−3V.Note6:Specified output resistance includes internal switch resistance and capacitor ESR.Note7:For LM2663,the oscillator frequency is150kHz.Note8:The output switches operate at one half of the oscillator frequency,f OSC=2f SW.2Test CircuitsTypical PerformanceCharacteristics (Circuit of Figure 1)DS100003-4DS100003-5FIGURE 1.LM2662and LM2663Test CircuitsSupply Current vsSupply Voltage DS100003-37Supply Current vs Oscillator FrequencyDS100003-38Output SourceResistance vs SupplyVoltageDS100003-393Typical Performance Characteristics (Circuitof Figure 1)(Continued)Output SourceResistance vsTemperature DS100003-40Output Source Resistance vsTemperatureDS100003-41Efficiency vs LoadCurrentDS100003-42Output Voltage Dropvs Load Current DS100003-43Efficiency vs Oscillator FrequencyDS100003-44Output Voltage vsOscillator FrequencyDS100003-45 4Typical Performance Characteristics(Circuitof Figure1)(Continued)Oscillator Frequencyvs ExternalCapacitanceDS100003-46Oscillator Frequencyvs Supply VoltageDS100003-47Oscillator Frequencyvs Supply VoltageDS100003-48Oscillator Frequencyvs TemperatureDS100003-49Oscillator Frequencyvs TemperatureDS100003-50Shutdown SupplyCurrent vsTemperature(LM2663Only)DS100003-51 5Connection DiagramsPinDescriptionPin Name FunctionVoltage Inverter Voltage Doubler 1FC Frequency control for internal oscillator:Same as inverter.(LM2662)FC=open,f OSC=20kHz(typ);FC=V+,f OSC=150kHz(typ);FC has no effect when OSC pin is drivenexternally.1SD(LM2663)Shutdown control pin,tie this pin to the groundin normal operation.Same as inverter.2CAP+Connect this pin to the positive terminal ofcharge-pump capacitor.Same as inverter.3GND Power supply ground input.Power supply positive voltage input.4CAP−Connect this pin to the negative terminal ofcharge-pump capacitor.Same as inverter.5OUT Negative voltage output.Power supply ground input.6LV Low-voltage operation input.Tie LV to GNDwhen input voltage is less than3.5V.Above3.5V,LV can be connected to GND or leftopen.When driving OSC with an external clock,LV must be connected to GND.LV must be tied to OUT.7OSC Oscillator control input.OSC is connected to aninternal15pF capacitor.An external capacitorcan be connected to slow the oscillator.Also,an external clock can be used to drive OSC.Same as inverter except that OSC cannot bedriven by an external clock.8V+Power supply positive voltage input.Positive voltage output.Circuit DescriptionThe LM2662/LM2663contains four large CMOS switcheswhich are switched in a sequence to invert the input supplyvoltage.Energy transfer and storage are provided by exter-nal capacitors.Figure2illustrates the voltage conversionscheme.When S1and S3are closed,C1charges to the sup-ply voltage V+.During this time interval switches S2and S4are open.In the second time interval,S1and S3are openand S2and S4are closed,C1is charging C2.After a numberof cycles,the voltage across C2will be pumped to V+.Sincethe anode of C2is connected to ground,the output at thecathode of C2equals−(V+)assuming no load on C2,no lossin the switches,and no ESR in the capacitors.In reality,thecharge transfer efficiency depends on the switching fre-quency,the on-resistance of the switches,and the ESR ofthe capacitors.8-Lead SO(M)DS100003-20DS100003-21Top ViewOrder Number LM2662M,LM2663MSee NS Package Number M08ADS100003-22FIGURE2.Voltage Inverting Principle6Application InformationSIMPLENEGATIVE VOLTAGE CONVERTERThe main application of LM2662/LM2663is to generate anegative supply voltage.The voltage inverter circuit usesonly two external capacitors as shown in the Basic Applica-tion Circuits.The range of the input supply voltage is 1.5V to5.5V.For a supply voltage less than 3.5V,the LV pin must beconnected to ground to bypass the internal regulator cir-cuitry.This gives the best performance in low voltage appli-cations.If the supply voltage is greater than 3.5V,LV may beconnected to ground or left open.The choice of leaving LVopen simplifies the direct substitution of the LM2662/LM2663for the LMC7660Switched Capacitor Voltage Con-verter.The output characteristics of this circuit can be approximatedby an ideal voltage source in series with a resistor.The volt-age source equals −(V+).The output resistance R out is afunction of the ON resistance of the internal MOS switches,the oscillator frequency,and the capacitance and ESR of C 1and C 2.Since the switching current charging and discharg-ing C 1is approximately twice as the output current,the effectof the ESR of the pumping capacitor C 1is multiplied by fourin the output resistance.The output capacitor C 2is chargingand discharging at a current approximately equal to the out-put current,therefore,its ESR only counts once in the outputresistance.A good approximation is:where R SW is the sum of the ON resistance of the internal MOS switches shown in Figure 2.High value,low ESR capacitors will reduce the output resis-tance.Instead of increasing the capacitance,the oscillatorfrequency can be increased to reduce the 2/(f osc x C 1)term.Once this term is trivial compared with R SW and ESRs,fur-ther increasing in oscillator frequency and capacitance willbecome ineffective.The peak-to-peak output voltage ripple is determined by theoscillator frequency,and the capacitance and ESR of theoutput capacitor C 2:Again,using a low ESR capacitor will result in lower ripple.POSITIVE VOLTAGE DOUBLERThe LM2662/LM2663can operate as a positive voltage dou-bler (as shown in the Basic Application Circuits).The dou-bling function is achieved by reversing some of the connec-tions to the device.The input voltage is applied to the GNDpin with an allowable voltage from 2.5V to 5.5V.The V+pinis used as the output.The LV pin and OUT pin must be con-nected to ground.The OSC pin can not be driven by an ex-ternal clock in this operation mode.The unloaded outputvoltage is twice of the input voltage and is not reduced by thediode D 1’s forward drop.The Schottky diode D 1is only needed for start-up.The inter-nal oscillator circuit uses the V+pin and the LV pin (con-nected to ground in the voltage doubler circuit)as its powerrails.Voltage across V+and LV must be larger than 1.5V toinsure the operation of the oscillator.During start-up,D 1isused to charge up the voltage at V+pin to start the oscillator;also,it protects the device from turning-on its own parasiticdiode and potentially latching-up.Therefore,the Schottky di-ode D 1should have enough current carrying capability to charge the output capacitor at start-up,as well as a low for-ward voltage to prevent the internal parasitic diode from turning-on.A Schottky diode like 1N5817can be used for most applications.If the input voltage ramp is less than 10V/ms,a smaller Schottky diode like MBR0520LT1can be used to reduce the circuit size.SPLIT V+IN HALF Another interesting application shown in the Basic Applica-tion Circuits is using the LM2662/LM2663as a precision volt-age divider.Since the off-voltage across each switch equals V IN /2,the input voltage can be raised to +11V.CHANGING OSCILLATOR FREQUENCY For the LM2662,the internal oscillator frequency can be se-lected using the Frequency Control (FC)pin.When FC is open,the oscillator frequency is 20kHz;when FC is con-nected to V+,the frequency increases to 150kHz.A higher oscillator frequency allows smaller capacitors to be used for equivalent output resistance and ripple,but increases the typical supply current from 0.3mA to 1.3mA.The oscillator frequency can be lowered by adding an exter-nal capacitor between OSC and GND (See typical perfor-mance characteristics).Also,in the inverter mode,an exter-nal clock that swings within 100mV of V+and GND can beused to drive OSC.Any CMOS logic gate is suitable for driv-ing OSC.LV must be grounded when driving OSC.Themaximum external clock frequency is limited to 150kHz.The switching frequency of the converter (also called thecharge pump frequency)is half of the oscillator frequency.Note:OSC cannot be driven by an external clock in the voltage-doublingmode.TABLE 1.LM2662Oscillator Frequency Selection FC OSC Oscillator Open Open 20kHz V+Open 150kHz Open or V+External Capacitor See TypicalPerformanceCharacteristicsN/A External Clock External Clock(inverter mode only)Frequency TABLE 2.LM2663Oscillator Frequency Selection OSC Oscillator Open 150kHz External Capacitor See Typical Performance Characteristics External Clock External Clock Frequency (inverter mode only)SHUTDOWN MODE For the LM2663,a shutdown (SD)pin is available to disable the device and reduce the quiescent current to 10µA.Apply-ing a voltage greater than 2V to the SD pin will bring the de-vice into shutdown mode.While in normal operating mode,the SD pin is connected to 7Application Information(Continued)CAPACITORSELECTION As discussed in the Simple Negative Voltage Converter section,the output resistance and ripple voltage are dependent on the capacitance and ESR values of the external capacitors.The output voltage drop is the load current times the output resistance,and the power efficiency isWhere I Q (V+)is the quiescent power loss of the IC device,and I L 2R OUT is the conversion loss associated with the switch on-resistance,the two external capacitors and their ESRs.Low ESR capacitors (Table 3)are recommended for both capacitors to maximize efficiency,reduce the output voltage drop and voltage ripple.For convenience,C 1and C 2are usually chosen to be the same.The output resistance varies with the oscillator frequency and the capacitors.In Figure 3,the output resistance vs.oscillator fre-quency curves are drawn for four difference capacitor values.At very low frequency range,capacitance plays the most important role in determining the output resistance.Once the frequency is increased to some point (such as 100kHz for the 47µF capaci-tors),the output resistance is dominated by the ON resistance of the internal switches and the ESRs of the external capacitors.A low value,smaller size capacitor usually has a higher ESR compared with a bigger size capacitor of the same type.Ceramic capacitors can be chosen for their lower ESR.As shown in Figure 3,in higher frequency range,the output resistance using the 10µF ceramic capacitors is close to these using higher value tantalum capacitors.TABLE 3.Low ESR Capacitor ManufacturersManufacturerPhone Capacitor Type Nichicon Corp.(708)-843-7500PL,PF series,through-hole aluminum electrolytic AVX Corp.(803)-448-9411TPS series,surface-mount tantalum Sprague(207)-324-4140593D,594D,595D series,surface-mount tantalum Sanyo(619)-661-6835OS-CON series,through-hole aluminum electrolytic Murata(800)-831-9172Ceramic chip capacitors Taiyo Yuden(800)-348-2496Ceramic chip capacitors Tokin (408)-432-8020Ceramic chip capacitorsDS100003-36FIGURE 3.Output Source Resistance vs Oscillator Frequency 8Other ApplicationsPARALLELINGDEVICES Any number of LM2662s (or LM2663s)can be paralleled to reduce the output resistance.Each device must have its own pumping capacitor C 1,while only one output capacitor C out is needed as shown in Figure 4.The composite output resistance is:CASCADING DEVICESCascading the LM2662s (or LM2663s)is an easy way to produce a greater negative voltage (as shown in Figure 5).If n is the integer representing the number of devices cascaded,the unloaded output voltage V out is (−nV in ).The effective output resistance is equal to the weighted sum of each individual device:A three-stage cascade circuit shown in Figure 6generates −3V in ,from V in .Cascading is also possible when devices are operating in doubling mode.In Figure 7,two devices are cascaded to generate 3V in .An example of using the circuit in Figure 6or Figure 7is generating +15V or −15V from a +5V input.Note that,the number of n is practically limited since the increasing of n significantly reduces the efficiency and increases the out-put resistance and output voltage ripple.DS100003-24FIGURE 4.Lowering Output Resistance by Paralleling DevicesDS100003-25FIGURE 5.Increasing Output Voltage by Cascading Devices9Other Applications (Continued)REGULATING V outIt is possible to regulate the output of the LM2662/LM2663by use of a low dropout regulator (such as LP2986).The whole con-verter is depicted in Figure 8.This converter can give a regulated output from −1.5V to −5.5V by choosing the proper resistor ratio:where,V ref =1.23VThe error flag on pin 7of the LP2986goes low when the regulated output at pin 5drops by about 5%below nominal.The LP2986can be shutdown by taking pin 8low.The less than 1µA quiescent current in the shutdown mode is favorable for battery powered applications.DS100003-26FIGURE 6.Generating −3V in from +V inDS100003-27FIGURE 7.Generating +3V in from +V inDS100003-28FIGURE bining LM2662/LM2663with LP2986to Make a Negative Adjustable Regulator 10Other Applications(Continued)Also,as shown in Figure9by operating the LM2662/LM2663in voltage doubling mode and adding a low dropout regulator(suchas LP2986)at the output,we can get+5V output from an input as low as+3.3V.DS100003-29FIGURE9.Generating+5V from+3.3V Input Voltage11Physical Dimensions inches (millimeters)unless otherwise noted LIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE-VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENTOF NATIONAL SEMI-CONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices or sys-tems which,(a)are intended for surgical implant intothe body,or (b)support or sustain life,and whose fail-ure to perform when properly used in accordancewith instructions for use provided in the labeling,canbe reasonably expected to result in a significant injuryto the user.2.A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system,or to affect its safety or effectiveness.National SemiconductorCorporationAmericasTel:1-800-272-9959Fax:1-800-737-7018Email:support@ National Semiconductor Europe Fax:+49(0)180-5308586Email:europe.support@ Deutsch Tel:+49(0)180-5308585English Tel:+49(0)180-5327832Français Tel:+49(0)180-5329358Italiano Tel:+49(0)180-5341680National Semiconductor Asia Pacific Customer Response Group Tel:65-2544466Fax:65-2504466Email:sea.support@ National Semiconductor Japan Ltd.Tel:81-3-5639-7560Fax:81-3-5639-75078-Lead SO (M)Order Number LM2662M or LM2663M NS Package Number M08AL M 2662/L M 2663S w i t c h e d C a p a c i t o r V o l t a g e C o n v e r t e r National does not assume any responsibility for use of any circuitry described,no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.。

TI德州DCDC管理IC

Capacitor StepDown
Regulator
LM2757 LM2772 TL7660
具有输出（停机时）的开
TI
2.7
关电容器升压稳压器
低纹波开关电容器降压稳
TI
2.7
压器
TI
CMOS 电压转换器
1.5
5.5 4.87 5.13 0.18
5.5 1.2 1.2 10 -1.5 -10
0.15 0.1
LM2663
TI 开关电容器电压转换器 1.5 5.5 -5.5 11
0.2
LM2662
TI 开关电容器电压转换器 1.5 5.5 -5.5 11
0.2
LM2660
TI 开关电容器电压转换器 1.5 5.5 -5.5 11
0.1
LT1054
具有稳压器的带开关电容
TI
3.5 15 -1.25 -15 0.1
单节至 3.0V/3.3V、20mA
TPS60302 TI
0.9 1.8 3.3 3.3 0.04
双路输出、高效充电泵
单节至 3.0V/3.3V、20mA
TPS60303 TI
0.9 1.8 3
双路输出、高效充电泵
3 0.04
单节至 3.3V 20mA 超低
TPS60310 TI
0.9 1.8 3.3 3.3 0.02
深圳市华永泰科技有限公司 Huayongtai.Electronic Co.,Ltd.
TI 德州仪器 DCDC 开关稳压 IC
Part number
LM2775 LM27762 LM27761
Vin Vin Vout Vout Iout
品牌
产品功能

OrCAD16.2部分元件封装对照表

SO8
8选1视频开关
MAX4315ESE
SO16-3.9-1.27
SO16
数字式光敏传感器
TSL2550D
SO8-3.9-1.27
SO8
驱动
ULN2803A
SO18-7.5-1.27
SO18
温度传感器
DS18B20
TO92
TO-92
电源
DC/DC及线性电源
F0505S-1W
F0505S-1W
MORNSUN
元件封装对照表
类型
型号、规格
PCB库名称
厂家封装名称
厂家
分立元件
贴片电阻
3.3/0.0625W
0603R
0603
5.1/0.0625W
0603R
0603
75/0.0625W
0603R
0603
100/0.0625W
0603R
0603
1.8k/0.0625W
0603R
0603
4.7k/0.0625W
0603RTDK共Βιβλιοθήκη 电感SMD-L4.5X3.2
TDK
直插电感
6.8uH/5A
L-7.62X11
33uH/0.5A
L-3X8
贴片变压器
SMD-T-EE5
直插共模变压器
1mH/3A
EMT16X18mm
贴片二极管
1SMBJ5.0
SMB
DO-214AA
MCC
1N4007
SMA
SMA
1N4148
1206D
1206
ON
0603
5.1k/0.0625W
0603R
0603

LM2903中文资料_数据手册_参数

LM2903单电源或双电源，宽范围的电源电压-最大额定值…2v到36v -测试到30v…非V器件-测试到32 V…v -后缀设计，不依赖于电源电压，具有低的电源电流损耗。输入偏置电流低…25 nA型低输入偏置电流…3 nA Typ(LM193)D低输入偏置电压…2 mV TypD共模输入电压RangeIncludes GroundD差分输入电压范围等于toMaximum-Rated电源电压。36±VD低输出饱和电压输出与TTL兼容,金属氧化物半导体,andCMOSdescription /订购informationThese设备包括两个独立的voltagecomparators设计的操作从一个电源广泛的电压。只要两个电源之间的电压差在2v到36v之间，且VCC至少比输入共模电压正1.5 V，也可以从双电源运行。电流漏与电源电压无关。输出可以连接到其他开放收集器输出，以实现连线和关系。LM193的特点是工作温度在- 55℃到125℃之间。LM293和LM293A的特点是在- 25°C到85°C 之间工作。LM393和LM393A的特点是在0°C到70°C之间运行。TheLM2903的特点是在- 40°C到125°C之间运行。无铅(RoHS): TI的术语“无铅”或“无铅”是指与所有6种物质的现行RoHS要求兼容的半导体产品，LM2903包括在均质材料中铅的重量不超过0.1%的要求。设计用于高温焊接的无钛pb产品适用于特定的无铅工艺。环保(RoHS &没有某人/ Br): TI定义“绿色”意味着Pb-Free (RoHS兼容), 和自由的溴(Br)和基于(某人)锑的阻燃(Br或某人不超过0.1%按重量均质材料)(3)实验室,峰值温度。湿度敏感性级别评级根据电平行业标准分类,和soldertemperature峰值。重要信息和免责声明:本页所提供的信息代表德州仪器自提供之日起的知识和信念。TI的知识和信念基于第三方提供的信息，对于这些信息的准确性不作任何陈述或保证。LM2903目前正在努力更好地整合来自第三方的信息。TI已采取并将继续采取合理措施，提供具有代表性和准确的信息，LM2903但可能未对来料和化学品进行破坏性测试或化学分析。TI和TI供应商认为某些信息是专有的，因此CAS号码和其他有限的信息可能无法发布。在任何情况下，TI因该等信息而产生的责任都不应超过TIto客户在本文件中每年销售的TI部件的采购总价

一种高性能USB声卡的设计与制作

一种高性能USB声卡的设计与制作李征【摘要】设计并制作了一款USB声卡.该声卡采用PCM2706C芯片将数字音频信号转换为12S信号,传入音频DAC芯片CS4398进行数模转换,再将输出的差分音频信号送入音频运放OPA1612进行放大驱动耳机发出声音.通过实物调试,该声卡具有高保真、音量可调、外观美丽、功耗低等特点,具有较高的实用价值.【期刊名称】《新余学院学报》【年(卷),期】2018(023)005【总页数】4页(P30-33)【关键词】声卡;USB;PCM2706C;CS4398【作者】李征【作者单位】安徽电子信息职业技术学院,安徽蚌埠233030【正文语种】中文【中图分类】TN912声卡是实现数字/音频信号相互转换的一种硬件，其质量好坏决定了声音的表现力。

受限于集成化和成本的控制，目前普及的箱内板载声卡已不能满足人们对声音质量的需求，主要是因为机箱内的电磁噪声对于声卡这种带有模拟电路的设备很容易产生干扰，致使声音信噪比降低，加上笔记本电脑逐渐普及，又不能通过加装板卡式独立声卡来改善音质，使用USB外置声卡成了提高音频质量最合适的方案。

1 系统总体方案设计本USB声卡的硬件电路主要由数字信号接收、数字/模拟信号转换及模拟信号放大三部分组成，具体框图如图1所示。

图1 USB声卡系统框图音频信号一般以数字形式存储于介质中，通过音频信号接收电路将数字音频信号转换成I2S信号，数模信号转换电路的作用是将I2S信号转换成模拟音频信号，转化后的模拟音频信号通过模拟信号放大电路的放大，从而驱动负载发出声音。

2 硬件电路设计2.1 电源电路该系统的电源电路主要由三部分组成，分别是给整个系统供电的USB5V电路、音频信号接收和数模信号转换所需的3.3V电源电路、模拟信号放大所需的-5V电路。

2.1.1 5V电源电路电脑的USB接口可输出电压为+5V、电流为500 mA的直流电，可以作为VCC为本设计的电路供电。

lm22670

1.285 1.304/ 1.311
V
VFB = 5V EN引脚 = 0V
VIN = 42V，EN引脚 = 0V，VSW = 0V VSW = -1V TO-263薄型封装 PSOP-8 Package
3.4/ 3.35
400 100
VFB = 1.3V(仅对于ADJ版本)
下降
1.3
3.4
6
mA
25
40
µA
4.2
5.3/ 5.5
A
0.2
2
µA
0.1
3
µA
0.12
0.16/ 0.22
Ω
0.10
0.16/ 0.20
500
600
kHz
200
300
ns
100
ns
230
nA
1.6
1.9
V
0.6
V
EN输入 = 0V VSYNC = 3.5V，50%占空比
6
µA
1
MHz
1.75
V
150
°C
TJ封装，结到环境的温度阻抗 ( 注释 6 )
封装
■ PSOP-8(裸露焊盘) ■ TO-263薄型(裸露焊盘)
应用领域
■ 工业控制 ■ 电信和数据通信系统 ■ 嵌入式系统 ■ 汽车行动通讯系统和车身电子装置 ■ 标准24V、12V和5V输入转换
应用原理简图
30076001
本文是National Semiconductor英文版的译文，本公司不对翻译中存在的差异或由此产生的错误负责。如需确认任何内容的准确性，请参考本公司提供的英文版。
标准化反馈电压与温度
标准化VFB
待机静态电流(μA)

LM6313资料

Differential AV e a 1 f e 10 MHz
325 22
a 14 2 b 13 2 a 13 8 b 12 8 a 13 7 b 12 7
V (Min) V V (Min) dB (Min) dB (Min)
6000 5000 90 90 13 1 12 0 11 0 18 300
ISC
Peak Short-Circuit Output
TL H 10521 – 3
FIGURE 1
2
元器件交易网
Electrical Characteristics (Continued) Operational Amplifier AC Electrical Characteristics Unless otherwise specified all limits guaranteed for TA e 25 C and Supply Voltage VS e g 15V Boldface limits apply at temperature extremes VCM e 0V RS e 50X the circuit configured as in Figure 1
260 C
g 600V g 1500V
(V a b0 7) to (Vb b7V) g 7V g VS GND to a VS (Note 3) b 65 C s T s a 150 C
0 C to 70 C 40 C W 125 C
Operational Amplifier DC Electrical Characteristics Unless otherwise specified all limits guaranteed for TA e 25 C and Supply Voltage VS e g 15V Boldface limits apply at temperature extremes VCM e 0V RS e 50X the circuit configured as in Figure 1

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LM2662/LM2663Switched Capacitor Voltage ConverterGeneral DescriptionThe LM2662/LM2663CMOS charge-pump voltage con-verter inverts a positive voltage in the range of 1.5V to 5.5V to the corresponding negative voltage.The LM2662/LM2663uses two low cost capacitors to provide 200mA of output current without the cost,size,and EMI related to inductor based converters.With an operating current of only 300µA and operating efficiency greater than 90%at most loads,the LM2662/LM2663provides ideal performance for battery powered systems.The LM2662/LM2663may also be used as a positive voltage doubler.The oscillator frequency can be lowered by adding an exter-nal capacitor to the OSC pin.Also,the OSC pin may be used to drive the LM2662/LM2663with an external clock.For LM2662,a frequency control (FC)pin selects the oscillator frequency of 20kHz or 150kHz.For LM2663,an external shutdown (SD)pin replaces the FC pin.The SD pin can be used to disable the device and reduce the quiescent current to 10µA.The oscillator frequency for LM2663is 150kHz.Featuresn Inverts or doubles input supply voltage n Narrow SO-8Packagen 3.5Ωtypical output resistancen 86%typical conversion efficiency at 200mA n(LM2662)selectable oscillator frequency:20kHz/150kHzn (LM2663)low current shutdown modeApplicationsn Laptop computers n Cellular phones n Medical instrumentsn Operational amplifier power supplies n Interface power supplies nHandheld instrumentsBasic Application CircuitsVoltage InverterDS100003-1Positive Voltage DoublerDS100003-2Splitting V IN in HalfDS100003-3January 1999LM2662/LM2663Switched Capacitor Voltage Converter©1999National Semiconductor Corporation Absolute Maximum Ratings(Note1)If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.Supply Voltage(V+to GND,or GND to OUT)6V LV(OUT−0.3V)to(GND+3V) FC,OSC,SD The least negative of(OUT−0.3V)or(V+−6V)to(V++0.3V) V+and OUT Continuous Output Current250mA Output Short-Circuit Duration to GND(Note2)1sec. Power Dissipation(T A=25˚C)(Note3)735mW T J Max(Note3)150˚C θJA(Note3)170˚C/W Operating Junction TemperatureRange−40˚C to+85˚C Storage Temperature Range−65˚C to+150˚C Lead Temperature(Soldering,10seconds)300˚C ESD Rating2kVElectrical CharacteristicsLimits in standard typeface are for T J=25˚C,and limits in boldface type apply over the full operating temperature range.Unless otherwise specified:V+=5V,FC=Open,C1=C2=47µF.(Note4)Symbol Parameter Condition Min Typ Max Units V+Supply Voltage R L=1k Inverter,LV=Open 3.5 5.5Inverter,LV=GND 1.5 5.5VDoubler,LV=OUT 2.5 5.5I Q Supply Current No Load FC=V+(LM2662)1.34mALV=Open SD=Ground(LM2663)FC=Open0.30.8I SD Shutdown Supply Current10µA (LM2663)V SD Shutdown Pin Input Voltage Shutdown Mode 2.0(Note5)V (LM2663)Normal Operation0.3I L Output Current200mAR OUT Output Resistance(Note6)I L=200mA 3.57Ωf OSC Oscillator Frequency(Note7)OSC=Open FC=Open720kHzFC=V+55150f SW Switching Frequency(Note8)OSC=Open FC=Open 3.510kHzFC=V+27.575I OSC OSC Input Current FC=Open±2µAFC=V+±10 P EFF Power Efficiency R L(500)between V+and OUT9096%I L=200mA to GND86V OEFF Voltage Conversion Efficiency No Load9999.96% Note1:Absolute maximum ratings indicate limits beyond which damage to the device may occur.Electrical specifications do not apply when operating the device beyond its rated operating conditions.Note2:OUT may be shorted to GND for one second without damage.However,shorting OUT to V+may damage the device and should be avoided.Also,for tem-peratures above85˚C,OUT must not be shorted to GND or V+,or device may be damaged.Note3:The maximum allowable power dissipation is calculated by using P DMax=(T JMax−T A)/θJA,where T JMax is the maximum junction temperature,T A is the ambient temperature,andθJA is the junction-to-ambient thermal resistance of the specified package.Note4:In the test circuit,capacitors C1and C2are47µF,0.2Ωmaximum ESR capacitors.Capacitors with higher ESR will increase output resistance,reduce output voltage and efficiency.Note5:In doubling mode,when V out>5V,minimum input high for shutdown equals V out−3V.Note6:Specified output resistance includes internal switch resistance and capacitor ESR.Note7:For LM2663,the oscillator frequency is150kHz.Note8:The output switches operate at one half of the oscillator frequency,f OSC=2f SW.2Test CircuitsTypical Performance Characteristics(Circuit of Figure 1)DS100003-4DS100003-5FIGURE 1.LM2662and LM2663Test CircuitsSupply Current vs Supply VoltageDS100003-37Supply Current vs Oscillator FrequencyDS100003-38Output SourceResistance vs Supply VoltageDS100003-393Typical Performance Characteristics(Circuit of Figure 1)(Continued)Output Source Resistance vs TemperatureDS100003-40Output Source Resistance vs TemperatureDS100003-41Efficiency vs Load CurrentDS100003-42Output Voltage Drop vs Load Current DS100003-43Efficiency vsOscillator FrequencyDS100003-44Output Voltage vs Oscillator FrequencyDS100003-45 4Typical Performance Characteristics(Circuit of Figure1)(Continued)Oscillator Frequencyvs ExternalCapacitanceDS100003-46Oscillator Frequencyvs Supply VoltageDS100003-47Oscillator Frequencyvs Supply VoltageDS100003-48Oscillator Frequencyvs TemperatureDS100003-49Oscillator Frequencyvs TemperatureDS100003-50Shutdown SupplyCurrent vsTemperature(LM2663Only)DS100003-51 5Connection DiagramsPin DescriptionPin Name FunctionVoltage Inverter Voltage Doubler 1FC Frequency control for internal oscillator:Same as inverter.(LM2662)FC=open,f OSC=20kHz(typ);FC=V+,f OSC=150kHz(typ);FC has no effect when OSC pin is drivenexternally.1SD(LM2663)Shutdown control pin,tie this pin to the groundin normal operation.Same as inverter.2CAP+Connect this pin to the positive terminal ofcharge-pump capacitor.Same as inverter.3GND Power supply ground input.Power supply positive voltage input.4CAP−Connect this pin to the negative terminal ofcharge-pump capacitor.Same as inverter.5OUT Negative voltage output.Power supply ground input.6LV Low-voltage operation input.Tie LV to GNDwhen input voltage is less than3.5V.Above3.5V,LV can be connected to GND or leftopen.When driving OSC with an external clock,LV must be connected to GND.LV must be tied to OUT.7OSC Oscillator control input.OSC is connected to aninternal15pF capacitor.An external capacitorcan be connected to slow the oscillator.Also,an external clock can be used to drive OSC.Same as inverter except that OSC cannot bedriven by an external clock.8V+Power supply positive voltage input.Positive voltage output.Circuit DescriptionThe LM2662/LM2663contains four large CMOS switcheswhich are switched in a sequence to invert the input supplyvoltage.Energy transfer and storage are provided by exter-nal capacitors.Figure2illustrates the voltage conversionscheme.When S1and S3are closed,C1charges to the sup-ply voltage V+.During this time interval switches S2and S4are open.In the second time interval,S1and S3are openand S2and S4are closed,C1is charging C2.After a numberof cycles,the voltage across C2will be pumped to V+.Sincethe anode of C2is connected to ground,the output at thecathode of C2equals−(V+)assuming no load on C2,no lossin the switches,and no ESR in the capacitors.In reality,thecharge transfer efficiency depends on the switching fre-quency,the on-resistance of the switches,and the ESR ofthe capacitors.8-Lead SO(M)DS100003-20DS100003-21Top ViewOrder Number LM2662M,LM2663MSee NS Package Number M08ADS100003-22FIGURE2.Voltage Inverting Principle6Application InformationSIMPLE NEGATIVE VOLTAGE CONVERTERThe main application of LM2662/LM2663is to generate a negative supply voltage.The voltage inverter circuit uses only two external capacitors as shown in the Basic Applica-tion Circuits.The range of the input supply voltage is 1.5V to 5.5V.For a supply voltage less than 3.5V,the LV pin must be connected to ground to bypass the internal regulator cir-cuitry.This gives the best performance in low voltage appli-cations.If the supply voltage is greater than 3.5V,LV may be connected to ground or left open.The choice of leaving LV open simplifies the direct substitution of the LM2662/LM2663for the LMC7660Switched Capacitor Voltage Con-verter.The output characteristics of this circuit can be approximated by an ideal voltage source in series with a resistor.The volt-age source equals −(V+).The output resistance R out is a function of the ON resistance of the internal MOS switches,the oscillator frequency,and the capacitance and ESR of C 1and C 2.Since the switching current charging and discharg-ing C 1is approximately twice as the output current,the effect of the ESR of the pumping capacitor C 1is multiplied by four in the output resistance.The output capacitor C 2is charging and discharging at a current approximately equal to the out-put current,therefore,its ESR only counts once in the output resistance.A good approximation is:where R SW is the sum of the ON resistance of the internal MOS switches shown in Figure 2.High value,low ESR capacitors will reduce the output resis-tance.Instead of increasing the capacitance,the oscillator frequency can be increased to reduce the 2/(f osc x C 1)term.Once this term is trivial compared with R SW and ESRs,fur-ther increasing in oscillator frequency and capacitance will become ineffective.The peak-to-peak output voltage ripple is determined by the oscillator frequency,and the capacitance and ESR of the output capacitor C 2:Again,using a low ESR capacitor will result in lower ripple.POSITIVE VOLTAGE DOUBLERThe LM2662/LM2663can operate as a positive voltage dou-bler (as shown in the Basic Application Circuits).The dou-bling function is achieved by reversing some of the connec-tions to the device.The input voltage is applied to the GND pin with an allowable voltage from 2.5V to 5.5V.The V+pin is used as the output.The LV pin and OUT pin must be con-nected to ground.The OSC pin can not be driven by an ex-ternal clock in this operation mode.The unloaded output voltage is twice of the input voltage and is not reduced by the diode D 1’s forward drop.The Schottky diode D 1is only needed for start-up.The inter-nal oscillator circuit uses the V+pin and the LV pin (con-nected to ground in the voltage doubler circuit)as its power rails.Voltage across V+and LV must be larger than 1.5V to insure the operation of the oscillator.During start-up,D 1is used to charge up the voltage at V+pin to start the oscillator;also,it protects the device from turning-on its own parasiticdiode and potentially latching-up.Therefore,the Schottky di-ode D 1should have enough current carrying capability to charge the output capacitor at start-up,as well as a low for-ward voltage to prevent the internal parasitic diode from turning-on.A Schottky diode like 1N5817can be used for most applications.If the input voltage ramp is less than 10V/ms,a smaller Schottky diode like MBR0520LT1can be used to reduce the circuit size.SPLIT V+IN HALFAnother interesting application shown in the Basic Applica-tion Circuits is using the LM2662/LM2663as a precision volt-age divider.Since the off-voltage across each switch equals V IN /2,the input voltage can be raised to +11V.CHANGING OSCILLATOR FREQUENCYFor the LM2662,the internal oscillator frequency can be se-lected using the Frequency Control (FC)pin.When FC is open,the oscillator frequency is 20kHz;when FC is con-nected to V+,the frequency increases to 150kHz.A higher oscillator frequency allows smaller capacitors to be used for equivalent output resistance and ripple,but increases the typical supply current from 0.3mA to 1.3mA.The oscillator frequency can be lowered by adding an exter-nal capacitor between OSC and GND (See typical perfor-mance characteristics).Also,in the inverter mode,an exter-nal clock that swings within 100mV of V+and GND can be used to drive OSC.Any CMOS logic gate is suitable for driv-ing OSC.LV must be grounded when driving OSC.The maximum external clock frequency is limited to 150kHz.The switching frequency of the converter (also called the charge pump frequency)is half of the oscillator frequency.Note:OSC cannot be driven by an external clock in the voltage-doublingmode.TABLE 1.LM2662Oscillator Frequency Selection FC OSCOscillator Open Open 20kHz V+Open150kHz Open or V+External CapacitorSee Typical Performance Characteristics N/AExternal Clock External Clock (inverter mode only)FrequencyTABLE 2.LM2663Oscillator Frequency SelectionOSC OscillatorOpen 150kHzExternal Capacitor See Typical Performance CharacteristicsExternal ClockExternal Clock Frequency(inverter mode only)SHUTDOWN MODEFor the LM2663,a shutdown (SD)pin is available to disable the device and reduce the quiescent current to 10µA.Apply-ing a voltage greater than 2V to the SD pin will bring the de-vice into shutdown mode.While in normal operating mode,the SD pin is connected to ground.7Application Information(Continued)CAPACITOR SELECTIONAs discussed in the Simple Negative Voltage Converter section,the output resistance and ripple voltage are dependent on the capacitance and ESR values of the external capacitors.The output voltage drop is the load current times the output resistance,and the power efficiency isWhere I Q (V+)is the quiescent power loss of the IC device,and I L 2R OUT is the conversion loss associated with the switch on-resistance,the two external capacitors and their ESRs.Low ESR capacitors (Table 3)are recommended for both capacitors to maximize efficiency,reduce the output voltage drop and voltage ripple.For convenience,C 1and C 2are usually chosen to be the same.The output resistance varies with the oscillator frequency and the capacitors.In Figure 3,the output resistance vs.oscillator fre-quency curves are drawn for four difference capacitor values.At very low frequency range,capacitance plays the most important role in determining the output resistance.Once the frequency is increased to some point (such as 100kHz for the 47µF capaci-tors),the output resistance is dominated by the ON resistance of the internal switches and the ESRs of the external capacitors.A low value,smaller size capacitor usually has a higher ESR compared with a bigger size capacitor of the same type.Ceramic capacitors can be chosen for their lower ESR.As shown in Figure 3,in higher frequency range,the output resistance using the 10µF ceramic capacitors is close to these using higher value tantalum capacitors.TABLE 3.Low ESR Capacitor ManufacturersManufacturer Phone Capacitor TypeNichicon Corp.(708)-843-7500PL,PF series,through-hole aluminum electrolytic AVX Corp.(803)-448-9411TPS series,surface-mount tantalumSprague (207)-324-4140593D,594D,595D series,surface-mount tantalum Sanyo (619)-661-6835OS-CON series,through-hole aluminum electrolytic Murata (800)-831-9172Ceramic chip capacitors Taiyo Yuden (800)-348-2496Ceramic chip capacitors Tokin(408)-432-8020Ceramic chip capacitorsDS100003-36FIGURE 3.Output Source Resistance vs Oscillator Frequency 8Other ApplicationsPARALLELING DEVICESAny number of LM2662s (or LM2663s)can be paralleled to reduce the output resistance.Each device must have its own pumping capacitor C 1,while only one output capacitor C out is needed as shown in Figure 4.The composite output resistance is:CASCADING DEVICESCascading the LM2662s (or LM2663s)is an easy way to produce a greater negative voltage (as shown in Figure 5).If n is the integer representing the number of devices cascaded,the unloaded output voltage V out is (−nV in ).The effective output resistance is equal to the weighted sum of each individual device:A three-stage cascade circuit shown in Figure 6generates −3V in ,from V in .Cascading is also possible when devices are operating in doubling mode.In Figure 7,two devices are cascaded to generate 3V in .An example of using the circuit in Figure 6or Figure 7is generating +15V or −15V from a +5V input.Note that,the number of n is practically limited since the increasing of n significantly reduces the efficiency and increases the out-put resistance and output voltage ripple.DS100003-24FIGURE 4.Lowering Output Resistance by Paralleling DevicesDS100003-25FIGURE 5.Increasing Output Voltage by Cascading Devices9Other Applications(Continued)REGULATING V outIt is possible to regulate the output of the LM2662/LM2663by use of a low dropout regulator (such as LP2986).The whole con-verter is depicted in Figure 8.This converter can give a regulated output from −1.5V to −5.5V by choosing the proper resistor ratio:where,V ref =1.23VThe error flag on pin 7of the LP2986goes low when the regulated output at pin 5drops by about 5%below nominal.The LP2986can be shutdown by taking pin 8low.The less than 1µA quiescent current in the shutdown mode is favorable for battery powered applications.DS100003-26FIGURE 6.Generating −3V in from +V inDS100003-27FIGURE 7.Generating +3V in from +V inDS100003-28FIGURE bining LM2662/LM2663with LP2986to Make a Negative Adjustable Regulator 10Other Applications(Continued)Also,as shown in Figure9by operating the LM2662/LM2663in voltage doubling mode and adding a low dropout regulator(suchas LP2986)at the output,we can get+5V output from an input as low as+3.3V.DS100003-29FIGURE9.Generating+5V from+3.3V Input Voltage11Physical Dimensionsinches (millimeters)unless otherwise notedLIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE-VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI-CONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices or sys-tems which,(a)are intended for surgical implant intothe body,or (b)support or sustain life,and whose fail-ure to perform when properly used in accordancewith instructions for use provided in the labeling,can be reasonably expected to result in a significant injury to the user.2.A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system,or to affect its safety or effectiveness.National Semiconductor Corporation AmericasTel:1-800-272-9959Fax:1-800-737-7018Email:support@National Semiconductor EuropeFax:+49(0)180-5308586Email:europe.support@Deutsch Tel:+49(0)180-5308585English Tel:+49(0)180-5327832Français Tel:+49(0)180-5329358Italiano Tel:+49(0)180-5341680National Semiconductor Asia Pacific Customer Response Group Tel:65-2544466Fax:65-2504466Email:sea.support@National Semiconductor Japan Ltd.Tel:81-3-5639-7560Fax:81-3-5639-75078-Lead SO (M)Order Number LM2662M or LM2663MNS Package Number M08AL M 2662/L M 2663S w i t c h e d C a p a c i t o r V o l t a g e C o n v e r t e rNational does not assume any responsibility for use of any circuitry described,no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.。