TMS320F28x系列DSP上RTOS移植关键技术研究

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TMS320F281xDSP原理及应用技术

《绪论》F2812和F2810的特点和区别特点：1）CPU 32位定点CPU 主频高达150MHz 增强型哈佛总线结构支持JTAG仿真接口2）存储器4MB的程序/数据寻址空间（片外1MB）片上高达128KX16位FLASH存储器 18KX16位单周期访问片内RAM3）两个事件管理器EVM 每个EVM模块包括：8通道16位PWM 死区产生和配置单元外部可屏蔽功率或驱动保护中断正交脉冲编码接口（QEP）三个捕捉单元,捕捉外部时间，特别适合于电机控制4）串行通信外设一个高速同步串行外设接口（SPI）两个UART接口模块（SCI）增强的CAN2。

0B接口模块多通道缓冲串口（McBSP）5）ADC模块12位，2X8通道(两个S/H），A/D转换周期200ns,输入电压0～3V。

6）其它外设: 锁相环（PLL）控制的时钟倍频系数看门狗定时模块三个外部中断 3个32位CPU定时器 128位保护密码高达56个通用I/O引脚支持IDLE,STANDBY，HALT等省电模式区别：F2812有外部存储器接口，TMS320F2810没有；TMS320F2812有128K的Flash TMS320F2810仅64K；F2812具有外部扩展接口XINTF，高达1MW的寻址空间,支持可编程的等待状态和读写选通时序,提供三个独立的片选信号，而F2810没有F281x外部接口：一个高速同步串行外设接口（SPI），两个UART接口模块(SCI），增强的CAN2。

0B接口模块，多通道缓冲串口(McBSP）。

TMS320F28x系列中的F2810、F2811、F2812间有何区别?TMS320F2812有外部存储器接口，而TMS320F2811和TMS320F2810没有。

TMS320F2812和TMS320F2811有128K的Flash,而TMS320F2810仅64K.与单片机相比,DSP有何特点？接口方便；编程方便；具有高速性；稳定性好；精度高；可重复性好；集成方便DSP器件比16位单片机单指令执行时间快8～10倍完成一次乘加运算快16～30倍。

TMS320F281xDSP原理及应用技术

《绪论》F2812和F2810的特点和区别特点：1）CPU 32位定点CPU 主频高达150MHz 增强型哈佛总线结构支持JTAG仿真接口2）存储器4MB的程序/数据寻址空间（片外1MB）片上高达128KX16位FLASH存储器18KX16位单周期访问片内RAM3）两个事件管理器EVM 每个EVM模块包括：8通道16位PWM 死区产生和配置单元外部可屏蔽功率或驱动保护中断正交脉冲编码接口（QEP）三个捕捉单元，捕捉外部时间，特别适合于电机控制4）串行通信外设一个高速同步串行外设接口（SPI）两个UART接口模块（SCI）增强的CAN2.0B接口模块多通道缓冲串口（McBSP）5）ADC模块12位，2X8通道(两个S/H)，A/D转换周期200ns，输入电压0～3V。

6）其它外设：锁相环（PLL）控制的时钟倍频系数看门狗定时模块三个外部中断3个32位CPU定时器128位保护密码高达56个通用I/O引脚支持IDLE,STANDBY,HALT 等省电模式区别：F2812有外部存储器接口，TMS320F2810没有；TMS320F2812有128K的Flash TMS320F2810仅64K；F2812具有外部扩展接口XINTF，高达1MW的寻址空间，支持可编程的等待状态和读写选通时序，提供三个独立的片选信号，而F2810没有F281x外部接口：一个高速同步串行外设接口（SPI），两个UART接口模块（SCI），增强的CAN2.0B 接口模块，多通道缓冲串口（McBSP）。

TMS320F28x系列中的F2810、F2811、F2812间有何区别？TMS320F2812有外部存储器接口，而TMS320F2811和TMS320F2810没有。

TMS320F2812和TMS320F2811有128K的Flash,而TMS320F2810仅64K。

与单片机相比，DSP有何特点？接口方便；编程方便；具有高速性；稳定性好；精度高；可重复性好；集成方便DSP器件比16位单片机单指令执行时间快8～10倍完成一次乘加运算快16～30倍。

TMS320F281xDSP原理及应用技术课程设计

TMS320F281x DSP原理及应用技术课程设计一、课程设计的目的TMS320F281x系列数字信号处理器是德州仪器公司（Texas Instruments, TI）推出的一款高性能DSP芯片，广泛应用于工控、通讯、音视频等领域。

本课程设计旨在通过对TMS320F281x DSP原理的讲解和基于TMS320F281x开发板的应用实验，培养学生对DSP技术的理解和掌握，提高学生的实际动手能力和综合素质。

二、课程设计的内容与要求2.1 DSP原理与编程课程设计将首先进行TMS320F281x DSP的基本原理讲解，包括：•DSP基本概念和应用领域介绍；•固定点算法和浮点算法的优缺点分析；•TMS320F281x DSP体系结构和特点；•DSP的编程语言及其优劣分析；•DSP的编程方式和编译工具选择等。

2.2 DSP应用系统设计基于TMS320F281x开发板进行DSP应用实验，设计实现以下几个方面的应用系统：2.2.1 带通滤波器•设计一个模拟滤波器，用TMS320F281x实现数字滤波器；•给出数字滤波器的结构和差分方程；•给出数字滤波器的频率特性曲线图和幅频特性函数；•给出数字滤波器的相频特性函数和相频特性曲线图；•用TMS320F281x实现滤波器算法的编写和仿真测试。

2.2.2 数字信号的FFT分析•用TMS320F281x实现8分、16分、32分FFT算法；•仿真测试并得到频域特性曲线图。

2.2.3 软件实现数字信号的AD与DA转换•用TMS320F281x实现AD采样；•用TMS320F281x实现DA输出；•给出AD和DA基本原理框图。

2.2.4 控制程序设计•用TMS320F281x实现PWM输出功能；•用TMS320F281x实现基本电机控制程序。

2.3 实验环境•硬件平台：TMS320F281x开发板、PC机；•开发工具：CCS等DSP编程软件。

三、课程设计的评分标准评分标准包括：•实验报告（设计方案、电路图、结果分析等）60分；•实验成果（代码实现、仿真测试和实际应用）40分。

第1章 TMS320F28x系列DSP概述(新)

那DSP是不是在数字信号处理器的舞台上是一枝独秀的呢？答案是否定的，其实在微处理器领域，
DSP存在着许多的竞争者，例如MCU、ARM、
FPGA等，它们每个都有自己的优点，都有自己擅长的一面，从而在微处理器领域占有一席之地。
3、DSP与MCU、ARM、FPGA的区别
先来看看DSP与MCU之间的区别。DSP采用的是哈佛结构，
吃香。当然，不管是做软件，还是做硬件，还是两者都做，只
要尽自己全力用心去做，将来一定都会是美好的。
1.2 如何选择DSP
在学习DSP或者准备用DSP做项目之前，要做的第一件事情就是要从种类繁多的DSP中选择一款合适的芯片，那如何迸行选择呢？下面详细进行介绍。
1、DSP厂商介绍
当提到DSP时，可能大多数人的第一反应就是TI(Texas
通常流过器件的电压、电流信号都是时间上连
续的模拟信号，可以通过A/D器件对连续的模拟信
号进行采样，转换成时间上离散的脉冲信号，然后
对这些脉冲信号量化、编码，转换成由0和1构成的
二进制编码，也就是常说的数字信号。当然，采样、
量化、编码这些操作都是由A/D转换器件来完成的。
DSP能够轻松地对这些数字信号进行变换、滤波等处理，还可以进行各种各样复杂的运算，来实现预期的目标。
由于软件技术更新比较快，软件工程师必须不断地学习，
补充新鲜的知识，才能保持自己的战斗力，但是随着年龄的增长，学习能力的下降，如果不做转型，与朝气蓬勃的年轻人一起参与竞争，压力就会比较大。而硬件工程师是要靠经验来进行设计的，因此随着时间的推移，阅历的增多，经验会越来越丰富，这样就等于不断地在巩固自己的技术壁垒，年轻人没有经验的话是很难与之竞争的，所以硬件工程师基本上是越老越

TMS320F28xx和TMS320F28xxx DSCs的硬件设计指南

3 3 3.1 3.1
Handling of Different Hardware Building Blocks 不同硬件模块的设计
The following sections discuss each building block of the entire design. 下面的部分是关于整体设计中各个模块的设计 The F28x devices offer two options for clock generation: using an onboard crystal oscillator or feeding the external clock to the XCLKIN pin. The frequency of this basic input clock, using an internal oscillator, is in F28x 系列的芯片提供了两种不同的产生时钟方案：利用电路板上的内部晶体振荡器或者利用外部时钟。 the range of 20 MHz – 35 MHz. The on-chip phase-locked loop (PLL) can be set to multiply the input clock 基本外部输入的时钟频率是在范围内。芯片上的时钟锁环既 20MHz-35MHz (PLL) 可以来倍频输入的时钟 to provide a wide variety of system clock frequencies. The frequency of the external clock fed to the CLKIN pin can be as high as the maximum frequency at which the CPU can operate (SYSCLKOUT). The 频率，连接到 CLKIN 引脚上的外部时钟可以和 CPU 工作的最大频率是一样的。 CPU 工作频率的范围很大， CPU can operate within the wider range of that frequency. Further clock signals for all the peripherals are 将来的所有外设的时钟信号都是从 CPU 时钟信号得来。一般来说，对于时钟信号而言，发生概率最大的频 derived from the CPU clock. 率被选择为获取最大的运行速度，然而，电源的消耗是和 CPU 的时钟频率成线性关系，对于相关电源耗 In general, the highest possible frequency for the clock signal is selected to achieve maximum execution 能的进一步信息，可以参考以下芯片中的电气规格手册部分： TMS320F2810, TMS320F2811, TMS320F2812, speed. However, the other aspect is power consumption because it increases linearly with the CPU clock frequency. For more information regarding the current/power consumption graphs, see the Electrical 数字信号处理数据手册 TMS320C2810,TMS320C2811, TMS320C2812, MS320F2809,TMS320F2808, (SPRS174), Specifications sections in the TMS320F2810, TMS320F2811, TMS320F2812, TMS320C2810, TMS320F2806, TMS320F2802, TMS320F2801, TMS320C2802, TMS320C2801, 和 TMS320F2801x DSPs 数据手册 TMS320C2811, TMS320C2812, Digital Signal Processors Data Manual (SPRS174), TMS320F2809, 数字信号处理器，和 TMS320F28335, (SPRS230), TMS320F28044 TMS320F28334, TMS320F28332 (SPRS357) TMS320F2808, TMS320F2806, TMS320F2802, TMS320F2801, TMS320C2802, TMS320C2801, and 数字 TMS320F2801x DSPs Data Manual 。 (SPRS230), TMS320F28044 Digital Signal Processor (SPRS357), 信号控制器 (DSCs)数据手册 (SPRS439) and the TMS320F28335, TMS320F28334, TMS320F28332 Digital Signal Controllers (DSCs) Data Manual (SPRS439).

基于TMS320F28x系列MCU的

目录介绍 ................................................................................................................................................ 1 TPIC7312 与 TMS320F28x 的硬件电路设计硬件电路设计 ................................................................................... 2 2.1 TPIC7312 与 TMS320F28x 的接口电路设计 ........................................................................... 2 2.2 TPIC7312 外围电路设计 ......................................................................................................... 3 3 TMS320F28x 控制 TPIC7312 的配置 ............................................................................................. 4 3.1 TPIC7312 的配置 .................................................................................................................... 4 3.2 TMS320F28x 与 TPIC7312 的 SPI 通讯 .................................................................................. 5 4 软件设计和代码例程软件设计和代码例程 ....................................................................................................................... 8 参考文档 ................................................................................................................................................ 9 1 2 图表图 1. 图 2. 图 3. 图 4. 表 1. 表 2. TPIC7312 与 TMS320F28x 的连接示意图.......................................................................... 3 TPIC7312 的外围电流检测等电路图................................................................................... 6 TPIC7312 的升压转换和三相桥电路图 ............................................................................... 7 F28x MCU 控制 TPIC7312 流程图流程图 ..................................................................................... 8 常用 TPIC7312 配置和状态寄存器 ..................................................................................... 5 F28x MCU 的 SPI 寄存器配置寄存器配置............................................................................................ 5

TMS320x28xx系列DSP综述0310

Sectored
Flash
A(18-0) 22 32 32 32
32-bit Auxiliary
128K×16b
2个事件管理器其中的PWM单元，用于电机控制 Boot RAM 16通道，分辨率为12 ROM 位的模数转换模块 18K×16b 4K×16b 作用是防止程序跑飞或进入死循环，多通道缓冲串行接口
④ TMS320X2812芯片内的存储空间。
其内部存放用户程序代码或数据表，Flash的内容可以通过JTAG仿真器烧写或擦除
TMS320F2812片内含有128K ×16位的Flash，分为4个8K ×16位和6个16K ×16位的存储段；对应的TMS320C2812 取决于CPU的片内含有128K ×16位的ROM。
曲阜师范大学电气信息与自动化学院
DSP应用技术

13
2.1 TMS320X2812的性能
⑩ 3个32位CPU定时器。定时器是DSP为了精确的控制时间，以满足某些特定事件的要求。 TIMER0 1 2，其中TIMER1和2是TI公司保留的，只能用 TIMER0。
14
曲阜师范大学电气信息与自动化学院

20
曲阜师范大学电气信息与自动化学院
DSP应用技术
2.2 TMS320X2812的片内外设
（2）ADC采样模块
输入信号不能大于3V！
F2812内部集成了一个12为分辨率的ADC模块，该模数转换器内部有2个独立的模拟多路转换器和2个独立的采样保持器，每个模拟多路转换器接收8个通道的模拟输入信号。虽然，2个采样保持器可以实现对两路模拟信号的同时采样，但 A/D转换必须分时进行，因为内部核心A/D转换器只有一个。理论上采样精度为12位，在实际使用中采样精度为9位或10位，经过硬件、软件校正措施，精度可有效提高。

TMS320F281xDSP原理及应用技术

{
xp_sin=2*3.1415926/200.;
பைடு நூலகம்InitSysCtrl();/*初始化系统*/
DINT;//禁止CPU级中断
IER = 0x0000;//禁止CPU级中断
IFR = 0x0000; //清零CPU级中断标志
InitPieCtrl();/*初始化PIE控制寄存器*/
InitPieVectTable();
• 外设寄存器设置
EALLOW;取消写保护 GpioMuxRegs.GPAMUX.all=0x00ff; EDIS;使能写保护
• 开发板连接 • 程序编译 • 程序加载 • 程序运行 • 程序停止 • 断点设置 • 变量观察
CCS常用操作
IO端口设置
• 端口名称： • 端口设置
– GPxMUX.bit=0为IO；1为外设 – GPxDIR.bit=0为输入，1为输出 – GPxDAT=0,1低高电平 – GPxSET.bit=0,1.1为置位 – GPxCLEAR=0,1.1为复位 – GPxTOGGLE=0,1.1为电平切换
/*初始化PIE矢量表*/
InitEv();/*初始化EV*/
PieCtrl.PIEIER2.bit.INTx4=1;//开
IER |= M_INT2; //开CPU中断中断
EINT;//使能全局中断
ERTM; //使能全局实时中断DBGM
for(;;) 死循环 {
KickDog();//这里不用
}
}
程序之间关系
• 宏定义DSP28_Device.h
#define EINT asm(" clrc INTM") #define DINT asm(" setc INTM") #define ERTM asm(" clrc DBGM") #define DRTM asm(" setc DBGM") #define EALLOW asm(" EALLOW") #define EDIS asm(" EDIS") #define ESTOP0 asm(" ESTOP0")

TMS320x28x, 28xxx Serial Peripheral Interface (SPI) Reference Guide (Rev. D)

Mailing Address:
Texas Instruments Post Office Box 655303 Dallas, Texas 75265
Copyright 2006, Texas Instruments Incorporated
Preface
Read This First
About This Manual
This guide describes how the serial peripheral interface works on the TMS320x28xx and TMS320x28xxx DSPs.
Related Documentation From Texas Instruments
The following books describe the TMS320x281x and related support tools that are available on the TI website. TMS320F2809, F2808, F2806, F2802, F2801, F2801x UCD9501, C2802, C2801 DSPs (literature number SPRS230) data sheet contains the pinout, signal descriptions, as well as electrical and timing specifications for the F280x devices. TMS320F2810, TMS320F2811, TMS320F2812, TMS320C2810, TMS320C2811, and TMS320C2812 Digital Signal Processors (literature number SPRS174) data sheet contains the electrical and timing specifications for these devices, as well as signal descriptions and pinouts for all of the available packages. TMS320R2811 and TMS320R2812 Digital Signal Processors (literature number SPRS257) data sheet contains the electrical and timing specifications for these devices, as well as signal descriptions and pinouts for all of the available packages. TMS320C28x DSP CPU and Instruction Set Reference Guide (literature number SPRU430) describes the central processing unit (CPU) and the assembly language instructions of the TMS320C28x fixed-point digital signal processors (DSPs). It also describes emulation features available on these DSPs. TMS320x280x 2801x, 2804x Analog-to-Digital Converter (ADC) Reference Guide (literature number SPRU716) describes the ADC module. The module is a 12−bit pipelined ADC. The analog circuits of this converter, referred to as the core in this document, include the front-end analog multiplexers (MUXs), sample−and−hold (S/H) circuits, the conversion

TMS320x28xx, 28xxx DSP Peripherals Reference Guide

TMS320x28xx,28xxx DSP Peripheral Reference GuideLiterature Number:SPRU566IJune2003–Revised May20092SPRU566I–June2003–Revised May2009Submit Documentation Feedback1Abbreviations (5)2Peripherals Available Per Device (7)3Peripheral Descriptions (10)3.1System Control and Interrupts (10)3.2External Interface(XINTF) (11)3.3Enhanced Controller Area Network(eCAN) (11)3.4Event Manager(EV) (12)3.5Analog Modules (12)3.6Multichannel Buffered Serial Port(McBSP) (13)3.7Serial Communications Interface(SCI) (13)3.8Serial Peripheral Interface(SPI) (14)3.9Boot ROM (14)3.10Inter-Integrated Circuit(I2C)Module (14)3.11Enhanced Quadrature Encoder Pulse(eQEP)Module (15)3.12Enhanced Capture(eCAP)Module (15)3.13Enhanced Pulse Width Modulator(ePWM)Module (16)3.14High-Resolution Pulse Width Modulator(HRPWM)Module (17)3.15Direct Memory Access(DMA) (18)3.16Local Interconnect Network(LIN) (18)3.17Control Law Accelerator(CLA) (18)Appendix A Revision History (19)A.1Changes Made in This Revision (19)SPRU566I–June2003–Revised May2009Table of Contents3 Submit Documentation FeedbackList of Tables1Abbreviation Matrix (5)2TMS320x281x Peripheral Selection Guide (7)3TMS320x280x,TMS320x2801x Peripheral Selection Guide (7)4TMS320x2804x Peripheral Selection Guide (8)5TMS320F2833x,TMS320F2823x Peripheral Selection Guide (8)6TMS320x2834x Peripheral Selection Guide (9)7TMS320F2802x Peripheral Selection Guide (9)8TMS320F2803x Peripheral Selection Guide (9)9External Interface(XINTF)Module Types (11)10Enhanced Controller Area Network(eCAN)Module Types (11)11Event Manager(EV)Module Types (12)12Analog Digital Controller(ADC)Module Types (12)13Comparator Module Types (13)14Multichannel Buffered Serial Port(McBSP)Module Types (13)15Serial Communications Interface(SCI)Module Type (13)16Serial Peripheral Interface(SPI)Module Type Description (14)17Inter-Integrated Circuit(I2C)Module Type Description (15)18Enhanced Quadrature Encoder Pulse(eQEP)Module Type Description (15)19Enhanced Capture(eCAP)Module Types (16)20Enhanced Pulse Width Modulator(ePWM)Module Types (17)21High-Resolution Pulse Width Modulator(HRPWM)Module Types (17)22Direct Memory Access(DMA)Module Types (18)23Local Interconnect Network(LIN)Module Types (18)24Control Law Accelerator(CLA)Module Types (18)List of Tables4SPRU566I–June2003–Revised May2009Submit Documentation Feedback1AbbreviationsReference GuideSPRU566I–June 2003–Revised May 2009This overview guide describes all the peripherals available for TMS320x28xx and TMS320x28xxx devices.Section 2shows the peripherals used by each device.Section 3provides descriptions of the peripherals.the peripheral guide by clicking on number,which is linked to the portable document format (pdf)file.Throughout this document and other peripheral guides,the following abbreviations are used for a series of 28x microcontrollers:•TMS320x28xx refers to TMS320x281x and TMS320x280x devices•TMS320x28xxx refers to TMS320x2801x,TMS320x2804x,TMS320x2833x,TMS320x2834x,TMS320x2802x,and TMS320x2803x devices.Specific device abbreviations are listed in Table 1.Table 1.Abbreviation MatrixDevice AbbreviationGroup Family Device (1)UsedAbbreviationTMS320x281xTMS320F2810,TMS320C2810,SM320F2810-EP (2)2810281xTMS320F2811,TMS320C2811,TMS320R2811,SM320F2811-EP (2)2811TMS320F2812,TMS320C2812,TMS320R2812,SM320F2812-EP (2)2812TMS320x280xTMS320F2801,TMS320C28012801280xTMS320F2802,TMS320C28022802TMS320F28062806TMS320F2808,SM320F2808-EP (2)2808TMS320F28092809TMS320x2801x TMS320F28015280152801x TMS320F2801628016TMS320x2804x TMS320F28044280442804x TMS320F2833xTMS320F28335283352833xTMS320F2833428334TMS320F2833228332TMS320F2823xTMS320F28235282352823xTMS320F2823428234TMS320F2823228232(1)Where F precedes the device abbreviation,it stands for Flash memory;C stands for RAM.(2)Military device that may be abbreviated differently elsewhere;the abbreviations shown are relevant to this document and peripheral selection itary devices in this document all begin with a prefix of SM.SPRU566I–June 2003–Revised May 200928x DSP Peripherals 5Submit Documentation FeedbackAbbreviations Table1.Abbreviation Matrix(continued)Device Abbreviation Group Family Device(1)Used Abbreviation TMS320x2834x TMS320C28346283462834xTMS320C2834528345TMS320C2834428344TMS320C2834328343TMS320C2834228342TMS320C2834128342TMS320x2802x TMS320F28020280202802xTMS320F2802128021TMS320F2802228022TMS320F2802328023TMS320F2802628026TMS320F2802728027TMS320x2803x TMS320F28035280352803xTMS320F2803428034TMS320F2803328033TMS320F2803228032 28x DSP Peripherals6SPRU566I–June2003–Revised May2009Submit Documentation Feedback Peripherals Available Per Device 2Peripherals Available Per DeviceTable2through Table7show the peripherals that are available for each of the28xx,28xxx devices.Theto the document that can be downloaded.Table2.TMS320x281x Peripheral Selection Guide(1)TMS320x281x External Interface(XINTF)0XTMS320x281x Enhanced Controller Area Network(eCAN)0X XTMS320x281x Event Manager(EV)0X XTMS320x281x Analog-to-Digital Converter(ADC)0X XTMS320x281x Multichannel Buffered Serial Port(McBSP)0X XTMS320x281x Serial Communications Interface(SCI)0X XTMS320x281x Serial Peripheral Interface(SPI)0X X(1)A type change represents a major functional feature difference in a peripheral module.Within a peripheral type,there may beminor differences between devices which do not affect the basic functionality of the module.These device-specific differencesare listed in Section3and in the peripheral reference guides.Table3.TMS320x280x,TMS320x2801x Peripheral Selection Guide Peripheral Lit.No.Type(1)280128016280152802,2806,2808,2809 TMS320x280x,2801x,2804x System Control and Interrupts-X X XTMS320x280x,2801x DSP Enhanced Controller Area Network(eCAN)0X XUser's GuideTMS320x280x,2801x,2804x Analog-to-Digital Converter(ADC)1X X XTMS320x280x,2801x,2804x Serial Communications Interface(SCI)0X X XTMS320x280x,2801x,2804x Serial Peripheral Interface(SPI)0X X XTMS320x280x,2801x,2804x Boot ROM-X X XTMS320x280x,2801x,2804x Enhanced Quadrature Encoder Pulse0X(eQEP)TMS320x280x,2801x,2804x Enhanced Pulse Width Modulator0X X XModule(ePWM)TMS320x280x,2801x,2804x Enhanced Capture(eCAP)Module0X X XTMS320x280x,2801x,2804x Inter-Integrated Circuit(I2C)0X X XTMS320x280x,2801x,2804x High-Resolution Pulse-Width Modulator0X X X(HRPWM)(1)A type change represents a major functional feature difference in a peripheral module.Within a peripheral type,there may beminor differences between devices which do not affect the basic functionality of the module.These device-specific differencesare listed in Section3and in the peripheral reference guides.SPRU566I–June2003–Revised May200928x DSP Peripherals7 Submit Documentation FeedbackPeripherals Available Per Device Table4.TMS320x2804x Peripheral Selection Guide(1)TMS320x280x,2801x,2804x Analog-to-Digital Converter(ADC)1XTMS320x280x,2801x,2804x Serial Communications Interface(SCI)0XTMS320x280x,2801x,2804x Serial Peripheral Interface(SPI)0XTMS320x280x,2801x,2804x Boot ROM-XTMS320x280x,2801x,2804x Enhanced Pulse Width Modulator Module(ePWM)0XTMS320x280x,2801x,2804x Inter-Integrated Circuit(I2C)0Xminor differences between devices which do not affect the basic functionality of the module.These device-specific differencesare listed in Section3and in the peripheral reference guides.Table5.TMS320F2833x,TMS320F2823x Peripheral Selection Guide Peripheral Lit.No.Type(1)28335,28334,28332,28235,28234,28232 TMS320F2833x,2823x System Control and Interrupts-XTMS320F2833x,2823x External Interface(XINTF)1XTMS320F2833x,2823x Enhanced Controller Area Network(eCAN)0XTMS320F2833x,2823x Analog-to-Digital Converter(ADC)2XTMS320F2833x,2823x Multichannel Buffered Serial Port(McBSP)1XTMS320F2833x,2823x Serial Communications Interface(SCI)0XTMS320F2833x,2823x Serial Peripheral Interface(SPI)0XTMS320F2833x,2823x Boot ROM-XTMS320F2833x,2823x Enhanced Quadrature Encoder Pulse(eQEP)0XTMS320F2833x,2823x Enhanced Pulse Width Modulator Module(ePWM)0XTMS320F2833x,2823x Enhanced Capture(eCAP)Module0XTMS320F2833x,2823x Inter-Integrated Circuit(I2C)0XTMS320F2833x,2823x High-Resolution Pulse-Width Modulator(HRPWM)0Xminor differences between devices which do not affect the basic functionality of the module.These device-specific differencesare listed in Section3and in the peripheral reference guides.28x DSP Peripherals8SPRU566I–June2003–Revised May2009Submit Documentation Feedback Peripherals Available Per DeviceTable6.TMS320x2834x Peripheral Selection GuidePERIPHERAL GUIDE Lit.No.TYPE(1)28346,28345,28344,28343,TMS320x2834x Delfino External Interface(XINTF)1XTMS320x2834x Delfino Enhanced Controller Area Network(eCAN)0XTMS320x2834x Delfino Multichannel Buffered Serial Port(McBSP)1XTMS320x2834x Delfino Serial Communications Interface(SCI)0XTMS320x2834x Delfino Serial Peripheral Interface(SPI)0XTMS320x2834x Delfino Boot ROM-XTMS320x2834x Delfino Enhanced Quadrature Encoder Pulse(eQEP)0XTMS320x2834x Delfino Enhanced Pulse Width Modulator Module(ePWM)0XTMS320x2834x Delfino Enhanced Capture(eCAP)Module0XTMS320x2834x Delfino Inter-Integrated Circuit(I2C)0XTMS320x2834x Delfino High-Resolution Pulse-Width Modulator(HRPWM)0Xminor differences between devices that do not affect the basic functionality of the module.These device-specific differences are listed in Section3and in the peripheral reference guides.Table7.TMS320F2802x Peripheral Selection GuidePeripheral Lit.No.Type(1)28027,28021,28026,2802028023,28022 TMS320x2802x Piccolo System Control and Interrupts-X XTMS320x2802x,2803x Piccolo Analog-to-Digital Converter(ADC)and Comparator3/0(2)X XTMS320x2802x,2803x Piccolo Serial Communications Interface(SCI)0X XTMS320x2802x,2803x Piccolo Serial Peripheral Interface(SPI)1X XTMS320x2802x Piccolo Boot ROM-X XTMS320x2802x,2803x Piccolo Enhanced Pulse Width Modulator Module(ePWM)1X XTMS320x2802x,2803x Piccolo Enhanced Capture Module(eCAP)0X XTMS320x2802x,2803x Piccolo Inter-Integrated Circuit(I2C)0X Xminor differences between devices that do not affect the basic functionality of the module.These device-specific differences are listed in Section3and in the peripheral reference guides.(2)The is Type3and the comparator module is Type0.See Section3.5for more details.Table8.TMS320F2803x Peripheral Selection GuidePeripheral Lit.No.Type(1)28035,28034,2803328032 TMS320x2803x Piccolo System Control and Interrupts-x xTMS320x2803x Piccolo Enhanced Controller Area Network(eCAN)0x xTMS320x2802x,2803x Piccolo Analog-to-Digital Converter(ADC)and Comparator3/0(2)x xTMS320x2802x,2803x Piccolo Serial Communications Interface(SCI)0x xTMS320x2802x,2803x Serial Peripheral Interface(SPI)1x xTMS320x2803x Piccolo Boot ROM-x x(1)A type change represents a major functional feature difference in a peripheral module.Within a peripheral type,there may beminor differences between devices that do not affect the basic functionality of the module.These device-specific differences are listed in the peripheral reference guides.(2)The ADC module is Type3and the comparator module is Type0.SPRU566I–June2003–Revised May200928x DSP Peripherals9 Submit Documentation Feedback3Peripheral Descriptions3.1System Control and InterruptsPeripheral Descriptions Table 8.TMS320F2803x Peripheral Selection Guide (continued)PeripheralLit.No.Type (1)28035,28034,TMS320x2802x,2803x Piccolo Enhanced Capture Module (eCAP)0x x TMS320x2802x,2803x Piccolo Inter-Integrated Circuit (I2C)0x x TMS320x2802x,2803x High-Resolution Pulse-Width Modulator (HRPWM)1x xTMS320x2803x Piccolo Control Law Accelerator (CLA)0x Brief descriptions of the peripherals are included in the following sections.The device-specific guides are:•TMS320x281x System Control and Interrupts Reference Guide •TMS320x280x,2801x,and 2804x System Control and Interrupts Reference Guide •TMS320x2833x System Control and Interrupts Reference Guide •TMS320x2834x Delfino System Control and Interrupts Reference Guide •TMS320x2802x Piccolo System Control and Interrupts Reference Guide •TMS320x2803x Piccolo System Control and Interrupts Reference Guide These guides include information on the following modules:•Memory,including Flash and OTP configuration •Code security module (CSM)Security is defined with respect to the access of the on-chip program memory and prevents unauthorized copying of proprietary code.The code security module (CSM)blocks access to several on-chip program memory blocks.•Clocking and Low-Power ModesThe clocks to each individual peripheral can be enabled/disabled so as to reduce power consumption when a peripheral is not in use.Additionally,the system clock to the serial ports and the event managers,CAP and QEP blocks can be scaled relative to the CPU clock.This enables the timing of peripherals to be decoupled from increasing CPU clock speeds.•32-bit CPU-TimersCPU-Timers 0,1,and 2are identical 32-bit timers with presettable periods and with 16-bit clock prescaling.The timers have a 32-bit count down register,which generates an interrupt when the counter reaches zero.The counter is decremented at the CPU clock speed divided by the prescale value setting.When the counter reaches zero,it is automatically reloaded with a 32-bit period value.CPU-Timers 1and 2are reserved for Real-Time OS (RTOS)applications.CPU-Timer 2is connected to INT14of the CPU.CPU-Timer 1can be connected to INT13of the CPU.CPU-Timer 0is for general use and is connected to the PIE block.•Watchdog TimerThe 28x devices support a watchdog timer.The user software must regularly reset the watchdog counter within a certain time frame;otherwise,the watchdog generates a reset to the processor.The watchdog can be disabled if necessary.•General-purpose inputs/outputs (GPIO)Most of the peripheral signals are multiplexed with general-purpose I/O (GPIO)signals.This enables you to use a pin as GPIO if the peripheral signal or function is not used.On reset,all GPIO pins are configured as inputs.You can then individually program each pin for GPIO mode or peripheral signal mode.For specific inputs,you can also select the number of input qualification cycles to filter unwanted noise glitches.1028x DSP PeripheralsSPRU566I–June 2003–Revised May 2009Submit Documentation Feedback3.2External Interface (XINTF)3.3Enhanced Controller Area Network (eCAN) Peripheral Descriptions•Peripheral framesThe 28x devices contain three peripheral register spaces.Some registers within these frames can be protected from CPU writes by the EALLOW protection mechanism.•Peripheral interrupt expansion (PIE)The PIE block multiplexes numerous interrupt sources into a smaller set of interrupt inputs.The interrupts are grouped into blocks of eight and each group is fed into one of 12CPU interrupt lines (INT1to INT12).Each of the 96interrupts is supported by its own vector stored in a dedicated RAM block that can be overwritten by the user.The vector is automatically fetched by the CPU on servicing the interrupt.It takes nine CPU clock cycles to fetch the vector and save critical CPU registers.Therefore,the CPU can respond quickly to interrupt events.Prioritization of interrupts is controlled in hardware and software.Each individual interrupt can be enabled/disabled within the PIE block.•External InterruptsThe XINTF guides are:•TMS320x281x External Interface (XINTF)Reference Guide•TMS320F2833x,2823xExternal Interface (XINTF)Reference Guide •TMS320x2834x Delfino External Interface (XINTF)Reference Guide The external interface (XINTF)is an asynchronous bus that is used to interface to external devices and memory.Table 9lists the differences between XINTF types,including device-specific differences within each type.Table 9.External Interface (XINTF)Module TypesType DescriptionDevices Covered Device-Specific Options0External Interface with x16Data Bus2810,2811,2812-1External Interface with x16or x32Data Bus 28335,28334,28332,28235,28234,-28232,28346,28345,28344,28343,28342,28341This is the enhanced version of the CAN peripheral.It supports 32mailboxes,time stamping of messages,and is CAN 2.0B-compliant.The eCAN guides are:•TMS320x281x DSP Enhanced Controller Area Network (eCAN)Reference Guide •TMS320x280x,2801x DSP Enhanced Controller Area Network (eCAN)Reference Guide •TMS320x2833x/2823x DSP Enhanced Controller Area Network (eCAN)Reference Guide •TMS320x2834x Delfino Enhanced Controller Area Network (eCAN)Reference Guide •TMS320x2803x Piccolo Enhanced Controller Area Network (eCAN)Reference Guide Table 10lists the differences between eCAN types,including device-specific differences within each type.Table 10.Enhanced Controller Area Network (eCAN)Module TypesModule DescriptionDevices CoveredDevice-Specific OptionsType 0Original eCAN Module Type2810,2811,2812,2801,2802,2806,2808,2809,CAN module clock =SYSCLK 2801628335,28334,28332,28235,28234,28232,CAN module clock =SYSCLK/228035,28034,28033,2803228346,28345,28344,28343,28342,28341CAN module clock =SYSCLK/4SPRU566I–June 2003–Revised May 200928x DSP Peripherals 11Submit Documentation Feedback3.4Event Manager (EV)3.5Analog Modules3.5.1Analog-to-Digital Converter (ADC)3.5.2Comparator Module (COMP)Peripheral Descriptions The event manager module includes general-purpose timers,full-compare/pulse-width modulation (PWM)units,capture inputs (CAP)and quadrature-encoder pulse (QEP)circuits.Two such event managers are provided,which enable two three-phase motors to be driven or four two-phase motors.The event managers on the F281x are compatible to the event managers on the 240x devices (with some minor enhancements).The EV guide is:•TMS320x281x Event Manager Reference GuideTable11lists the differences between EV types,including device-specific differences within each type.Table 11.Event Manager (EV)Module TypesType DescriptionDevices Covered Device-Specific Options 0Original EV Module Type2810,2811,2812-The analog-to-digital converter (ADC)module and comparator module descriptions are in this section.The device-specific ADC guides are:•TMS320x281x Analog-to-Digital Converter (ADC)Reference Guide •TMS320x280x 2801x,2804x Analog-to-Digital Converter (ADC)Module Reference Guide •TMS320x2833x,2823x Analog-to-Digital Controller (ADC)Module Reference Guide •2803x Piccolo Analog-to-Digital Converter (ADC)and Comparator Reference Guide The ADC block is a 12-bit converter,single ended,16-channels.It contains two sample-and-hold units for simultaneous sampling.Table 12lists the differences between ADC types,including device-specific differences within each type.Table 12.Analog Digital Controller (ADC)Module TypesType DescriptionDevices Covered Device-SpecificOptions0Original ADC Module Type2810,2811,2812–1Added Offset Trim and Reference Select registers 2801,2802,2806,2808,2809,28015,–28016,280442Added Internal/External Trim registers(OTP trim)28335,28334,28332,28235,28234,–282323Different control register interface,converts from 028027,28026,28023,28022,28021,–to 3.3V fixed scale range,supports ratiometric 28020,28035,28034,28033,28032VREFHI/VREFLO referencesThe device-specific comparator guides are:•2803x Piccolo Analog-to-Digital Converter (ADC)and Comparator Reference Guide The comparator module includes a 10-bit reference and can be routed to directly control ePWM outputs.Table 13lists the differences between comparator types,including device-specific differences within each 28x DSP Peripherals12SPRU566I–June 2003–Revised May 2009Submit Documentation Feedback3.6Multichannel Buffered Serial Port (McBSP)3.7Serial Communications Interface (SCI) Peripheral DescriptionsTable parator Module TypesType DescriptionDevices CoveredDevice-Specific OptionsOriginal Comparator Module Type28027,28026,28023,28022,28021,28020,–28035,28034,28033,28032The device-specific McBSP guides are:•TMS320x281x Multichannel Buffered Serial Port (McBSP)Reference Guide•TMS320x2833xMultichannel Buffered Serial Port (McBSP)Reference Guide •TMS320x2834x Delfino Multichannel Buffered Serial Port (McBSP)Reference Guide The McBSP is used to connect to E1/T1lines,phone-quality codecs for modem applications orhigh-quality stereo-quality Audio DAC devices.The McBSP receive and transmit registers are supported by a 16-level FIFO.This significantly reduces the overhead for servicing this peripheral.Table 14lists the differences between ADC types,including device-specific differences within each type.Table 14.Multichannel Buffered Serial Port (McBSP)Module TypesType DescriptionDevices Covered Device-SpecificOptions0Original McBSP Module Type2810,2811,2812-1Removed FIFO to allow interconnect with DMA module.28335,28334,28332,28235,-Removed FIFO-related registers (MFFTX,MFFRX,MFFCT,28234,28232,28346,28345,MFFST)28344,28343,28342,28341The SCI is a two-wire asynchronous serial port,commonly known as UART.The SCI supports a receive and transmit FIFO for reducing servicing overhead.The SCI guides are:•TMS320x281x Serial Communications Interface (SCI)Reference Guide •TMS320x280x,2801x,28044Serial Communications Interface (SCI)Reference Guide •TMS320x2833x,2823x Serial Communications Interface (SCI)Reference Guide •TMS320x2834x Delfino Serial Communications Interface (SCI)Reference Guide •TMS320x2802x,2803x Piccolo Serial Communications Interface (SCI)Reference Guide Table 15lists the differences between SCI types,including device-specific differences within each type.Table 15.Serial Communications Interface (SCI)Module TypeType DescriptionDevices CoveredDevice-Specific OptionsOriginal SCI Module Type2810,2811,2812,2801,2802,2806,2808,2809,16-level FIFO28015,28016,28044,28335,28334,28332,28235,28234,28232,28346,28345,28344,28343,28342,28341128027,28026,28023,28022,28021,28020,4-level FIFO28035,28034,28033,28032SPRU566I–June 2003–Revised May 200928x DSP Peripherals 13Submit Documentation Feedback3.8Serial Peripheral Interface (SPI)3.9Boot ROM3.10Inter-Integrated Circuit (I2C)ModulePeripheral Descriptions The SPI is a high-speed,synchronous serial I/O port that allows a serial bit stream of programmed length (one to sixteen bits)to be shifted into and out of the device at a programmable bit-transfer rate.Normally,the SPI is used for communications between the DSP controller and external peripherals or anotherprocessor.Typical applications include external I/O or peripheral expansion through devices such as shift registers,display drivers,and ADCs.Multi-device communications are supported by the master/slave operation of the SPI.The port supports a receive and transmit FIFO for reducing servicing overhead.The SPI guide is:•TMS320x281x Serial Peripheral Interface (SPI)Reference Guide•TMS320x280,2801x,2804xSerial PeripheralInterface(SPI)ReferenceGuide •TMS320x2833x,2823x Serial Peripheral Interface (SPI)Reference Guide •TMS320x2834x Delfino Serial Peripheral Interface (SPI)Reference Guide •TMS320x2802x,2803x Piccolo Serial Peripheral Interface (SPI)Reference Guide Table 16lists the differences between SPI types,including device-specific differences within each type.Table 16.Serial Peripheral Interface (SPI)Module Type DescriptionType DescriptionDevices CoveredDevice-Specific OptionsOriginal SPI Module Type2810,2811,2812,2801,2802,2806,2808,–2809,28015,28016,28044,28335,28334,28332,28235,28234,28232,28346,28345,28344,28343,28342,283411Added support for 3-wire28027,28026,28025,28024,28023,28022No STEINV bitbidirectional mode and reduced to 28035,28034,28033,28032Added STEINV bit (inverts 4-level FIFOSPISTE signal to support digital audio receive mode with 2SPIs)The device-specific Boot ROM guides are:•TMS320x281x Boot ROM Reference Guide •TMS320x280x,2801x,2804x DSP Boot ROM Reference Guide •TMS320x2833x,2823x Boot ROM Reference Guide •TMS320x2834x Delfino Boot ROM Reference Guide •TMS320x2802x Piccolo Boot ROM Reference Guide •TMS320x2803x Piccolo Boot ROM Reference Guide The boot ROM is factory-programmable with boot-loading software.Boot-mode signals (general-purpose I/Os)are used to tell the bootloader software which mode to use.The Boot ROM also contains standard math tables such as SIN/COS for use in IQ math related algorithms.The I2C guides include:•TMS320x280x,2801x,2804x Inter-Integrated Circuit (I2C)Module Reference Guide •TMS320x2833x,x2823x Inter-Integrated Circuit (I2C)Module Reference Guide •TMS320x2834x Delfino Inter-Integrated Circuit (I2C)Module Reference Guide •TMS320x2802x,2803x Piccolo Inter-Integrated Circuit (I2C)Module Reference Guide This guide describes the features and operation of the inter-integrated circuit (I2C)module.The I2C module provides an interface between one of these DSPs and devices compliant with PhilipsSemiconductors Inter-IC bus (I2C-bus)specification version 2.1and connected by way of an I2C-bus.External components attached to this 2-wire serial bus can transmit/receive 1-to 8-bit data to/from the DSP through the I2C module.This guide assumes the reader is familiar with the I2C-bus specification.1428x DSP PeripheralsSPRU566I–June 2003–Revised May 2009Submit Documentation Feedback3.11Enhanced Quadrature Encoder Pulse (eQEP)Module3.12Enhanced Capture (eCAP)Module Peripheral DescriptionsTable17liststhe differencesbetween I2Ctypes,includingdevice-specific differences within each type.Table 17.Inter-Integrated Circuit (I2C)Module Type DescriptionType DescriptionDevices CoveredDevice-Specific OptionsOriginal I2C Module Type2801,2802,2806,2808,2809,28015,28016,28044,16-level FIFO28335,28334,28332,28235,28234,28232,28346,28345,28344,28343,28342,2834128027,28026,28023,28022,28021,28020,28035,4-level FIFO28034,28033,28032The eQEP module guides include:•2801x,2804x Enhanced Quadrature Encoder Pule (eQEP)Module Reference Guide •2823x Enhanced Quadrature Encoder Pulse (eQEP)Module Reference Guide •Delfino Enhanced Quadrature Encoder Pulse (eQEP)Module Reference Guide •Piccolo Enhanced Quadrature Encoder Pulse (eQEP)Module Reference GuideThe enhanced quadrature encoder pulse (eQEP)module is used for direct interface with a linear or rotary incremental encoder to get position,direction,and speed information from a rotating machine for use in a high-performance motion and position-control system.Table 18lists the differences between eQEP types,including device-specific differences within each type.Table 18.Enhanced Quadrature Encoder Pulse (eQEP)Module Type DescriptionType DescriptionDevices CoveredDevice-Specific OptionsOriginal eQEP Module Type2801,2802,2806,2808,2809,28044,28335,-28334,28332,28235,28234,28232,28346,28345,28344,28343,28342,28341,28035,28034,28033,28032The eCAP guides are:•TMS320x280x,2801x,2804x Enhanced Capture (eCAP)Module Reference Guide •TMS320x2833x,2823x Enhanced Capture (eCAP)Module Reference Guide •TMS320x2834x Delfino Enhanced Capture (eCAP)Module Reference Guide •TMS320x2802x,2803x Piccolo Enhanced Capture (eCAP)Module Reference Guide The enhanced Capture (eCAP)Module is essential in systems where accurate timing of external events is important.Uses for eCAP include:•Speed measurements of rotating machinery (e.g.,toothed sprockets sensed via Hall sensors)•Elapsed time measurements between position sensor triggers •Period and duty cycle measurements of pulse train signals•Decoding current or voltage amplitude derived from duty cycle encoded current/voltage sensors Table 19lists the differences between eCAP types,including device-specific differences within each type.SPRU566I–June 2003–Revised May 200928x DSP Peripherals 15Submit Documentation Feedback。

基于TMS320F2803x的能量回馈系统的设计与实现

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上接第１３３页
此时，关于残差序列ｌ的迭代曲线如图１所示。
图１表明残差范数是单调下降的，由此可见例１的计算结果与本文的理论结果是一致的。
＝
（Ｒ，Ａ，ＥｋＢ１＋Ｂ２＋４ＭＢ阵方程（１）的约束０－１－５ —５最小二乘解的迭代算法。对于任意选取的初始约束０一卜５－５矩阵，该算法都可在有限步内得到一组约束０－１－５－５最小二乘解。另外，对于其他类型的约束问题，只需根据不同约束条件，构造不同的极小值问题，在算法中修改初始矩阵为相应的约束类型，即可获得求多变量矩阵方程的其它异类约束最小二乘解。参考文献
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ＩＰＭＥＪ］．ＥＬＥＣＴＲＯＮＩＣＴＥＳＴ。２０１２（２）：４８－４９．
设计开发
２．１硬件设计
主要分为三个部分：模拟信号采集电路、ＤＳＰ逻辑控制保护电路和ＰＷＭ驱动电路。如图２所示，以ＤＳＰ为核心，采集电压、电流信号，通过矢量控制算法，实时跟踪电网相位频率，产生ＰＷＭ控制脉冲，进而通过驱动电路控制ＩＧＢＴ的通断，将直流电转变为幅值可调且满足并网要求的交流电。２．２软件设计ＤＳＰ芯片采用ＴＭＳ３２０Ｆ２８ｏ３ｘ芯片，采样电网三相电压，将电网等效为一个电机，利用ＣＬＡＲＫＥ变换和ＰＡＲＫ变换得到一个旋转的磁场，ＤＳＰ控制ＩＧＢＴ发出一个产生相同磁场的电压，通过调节两个电压的相角差得到一个电流值，采用电压环内套电流环闭环控制电流的大小来调节母线电压。其矢量控制系统，如图３所示。如图３所示。控制系统由直流电压外环和有功、无功电流内环组成。通过检测输出电流的三相电流值，经过ＣＬＡＲＫＥ变换和ＰＡＲＫ变换得到旋转坐标系下的直流分量和。同时，通过检测得到的直流电压值和设定电压值进行比较，通过ＰＩ调节器可实现直流电压的无静差控制。由于直流电压的控制可通过的控制来实现，因此直流电压外环ＰＩ调节器的输出量即为有功电流内环的电流参考值，从而对ＶＳＲ输出的有功功率进行调节。无功电流内环的电流参考值则是根据需向电网输送的无功功率参考值（由运算）而得，当令时，ＶＳＲ运行于单位功率因数状态，即仅向电网输送有功功率。通过电流内环ＰＩ调节器的输出信号经过反ＰＡＲＫ变换后，即可通过空间矢量脉冲调制得到ＶＳＲ相应的开关驱动信号，从而实现ＶＳＲ的并网控制。

基于F281xDSP的嵌入式系统远程升级技术研究

摘要随着嵌入式技术的发展和网络的普及，嵌入式的网络化与智能化将成为不可避免的趋势，嵌入式产品在使用过程中，随着用户需求的变化，或自身设计发现漏洞时，往往需要对产品的软件进行升级，传统的产品收回或现场升级的方式成本太高，而目前市场上的嵌入式产品大部分不具备网络远程升级的功能。

为了解决这些问题，本论文提出了一种嵌入式系统通过网络来进行远程升级的方案，其设计思想适用于多种嵌入式平台，具有重要的实用意义和广阔的市场前景。

本系统分为嵌入式终端和运行在PC上的主控软件两部分。

嵌入式终端方面，硬件平台上的处理器为TI公司的F2812DSP，在其外部接口上扩展了网卡芯片AX88796作为网络控制器。

终端软件包括网卡驱动，网络协议，和在应用编程三个主要部分。

网卡驱动实现了网络数据的发送和接收；网络协议部分对TCP/IP协议栈进行了裁剪和移植，并实现了自定义的应用层协议；在应用编程通过调用FLASH算法对终端中的代码进行升级。

主控软件是基于C++ Builder开发的，具有网络连接测试，解读和分析COFF文件，提取升级数据，发送升级数据和远程重启终端等功能，界面人性化，便于使用。

在升级的流程中，主控软件根据需要提取升级数据，通过网络发送给嵌入式终端；终端接收并拼接升级数据后，对F2812DSP内部FLASH中的代码进行更新，实现了终端软件的远程升级。

经过测试，主控软件与嵌入式终端相配合，能完整实现整个升级流程的步骤，并且保证升级的可靠性和稳定性。

关键词：远程升级嵌入式 TCP/IP协议数字信号处理器AbstractWith the development of embedded technology and the popularity of the network, it will become an inevitable trend that embedded products will be more intelligent and network accessable. In the use of embedded products, designers often need to upgrade the software of the product because of changes in user needs, or find loopholes in their design. the traditional way of recycling products or program in scene will be too expensive, but most embedded products do not have Auto-Updates functionality. In order to solve these problems, this thesis presents a solution of embedded system’s long-range automatic upgrade, the concept is applicable to many embedded platf orms, and has important practical significance and broad market prospects.This system includes the embedded terminal and the software running on PC as well. The processor of embedded hardware platform is TI's F2812DSP. AX88796, the network controller, is expanded on DSP’s external interface. Embedded terminal software includes three main sections: NIC driver, network protocols and IAP as well. NIC driver enables the send and receive of network data; network protocol transplants TCP / IP protocol stack into the embedded terminal, and achieved a custom application layer protocol; IAP upgrade the code in F2812’FLASH by calling FLASH programming algorithms.The control software is developed on the base of C++ Builder, with network connectivity tests, interpretation and analysis of COFF file, upgrade data extraction, send the upgrade data and restart the terminal as well.It also has user-friendly interface. In the upgrade process, the control software extracted the upgrade data, and sent it to the embedded terminal through network; embedded terminal receive and splicing the upgrade data, then update the code in internal FLASH of F2812DSP, to to realize the remote terminal software upgrade. Test results show that control software and embedded terminal can cooperate well and complete the entire upgrade process reliably and stablely.Key words: Long-distance update Embedded System TCP/IP protocalDigital Signal Porcessor (DSP)独创性声明本人声明所呈交的学位论文是我个人在导师指导下进行的研究工作及取得的研究成果。

TMS320F28XXX_DSP上实现从flash拷贝到ram运行的方法

在TMS320F28XXX DSP上实现从flash拷贝整个程序到ram运行的方法1. 前言TMS320F28XXX DSP 里，代码从内部flash里运行，比从内部RAM里运行要慢30%左右，所以对运行时间苛刻的程序直接在flash里运行，往往不能满足要求。

故而，需要将代码拷贝到RAM以提高运行速度。

TI文档只提供了部分代码从flash拷贝到RAM中的方法。

然而，在一些应用中，需要将整个代码段都拷贝到RAM中执行，以提高整体运行速度。

本文通过对TMS320F28XXX 的启动代码研究，来探讨如何在从FLASH启动后将整个代码段拷贝到RAM 中，然后在RAM中运行的方法。

2. F28XXX 启动过程F28XXX启动代码固化在内部ROM中。

当F28XXX上电或者热复位后，首先由芯片本身将一些寄存器初始化：PIE disabled(ENPIE=0,VMAP=1,OBJMDE=0,AMODE=0,MOM1MAP=1),然后dsp会对XMPNMC管脚采样，根据采样值的高低，来决定启动模式是“微处理器模式”还是“微计算机模式”。

当XMPNMC=0时，为“微计算机模式”，此时，启动ROM存储器被使能而XINTF Zone 7被禁止。

复位向量从内部启动ROM获取，启动ROM在复位期间一直被使能。

启动ROM里的复位向量（位于0x3FFFC0）指向InitBoot函数(位于0x3FFC00)。

在完成器件初始化(InitBoot)之后，Boot loader将检查GPIO管脚的状态，然后再决定选用的启动模式。

启动模式有4种：跳转到flash，跳转到H0 SARAM,跳转到OTP或者调用片上启动程序。

InitBoot Function 所做工作有：1.初始化状态寄存器；2.将堆栈指针设为0x400；3.读CSM密码保护部分；4.调用SelectBootMode；5.调用ExitBoot在完成选择启动模式过程之后，根据选择的启动模式，dsp会跳到相应的启动入口。

TMS320F28x上RTOS移植关键技术分析

TMS320F28x上RTOS移植关键技术分析2009年03月29日 15:16 东南大学作者：阳旭东马旭东用户评论（0）关键字：TMS320F28x上RTOS移植关键技术分析详细分析TI公司TMS320F28x系列DSP的启动过程；说明BootROM中程序的运行过程，介绍C编译器和DSP/BIOS的工作细节；探讨DSP的中断处理及从RAM中执行代码等问题。

最后分析如何在TMS320F28x系列DSP 上移植实时操作系统。

关键词数字信号处理器 TMS320F28x BootROM 实时操作系统TMS320F28x（简称“F28x”）数字信号处理器是TI公司推出的32位定点DSP控制器，其频率高达150 MHz，大大提高了控制系统的精度和芯片的处理能力。

在F28x系列DSP上移植实时操作系统，需要对编译器、系统启动过程、中断处理过程以及整体代码执行流程有一个全面的深入理解。

对系统的整个运行过程有清晰的概念是移植实时操作系统的前提条件。

本文将对从DSP上电复位到其系统功能实现的整个运行过程进行深入介绍，并在此基础上进一步分析在F28x系列DSP上移植实时操作系统一般原理，详细说明μC/OSⅡ的移植。

1 BootROM及其运行在F281x、C281x、R281x器件中都有一块4K×16位的BootROM。

当引脚MP/nMC的状态反映到XINTCNF2中为0时，BootROM被映射到地址空间0x3FF000～0x3FFFC0上。

片上ROM在出厂前就已经烧写好了一个启动程序以及一些其他数据和表格(版本信息、复位向量、中断向量表、IQmath表等)。

其空间分配如图1所示。

图1 片上BootROM分配其中，中断向量表在VMAP=1、ENPIE=0（PIE未使能向量表）、MPNMC=0时有效。

另外，当VMAP=1、ENPIE=0时，系统将从BootROM的0x3FFFC0复位。

虽然复位后ENPIE为零，但大部分系统都是需要使能外部中断扩展模块的，即用户程序中需要将ENPIE置1。

第4章 TMS320X28x系列DSP综述

定时器2内部与INT14相连，被系统保留以用于实时操作系统(OS)；定时器1内部与INT13相连，被系统保留用于系统内部功能；定时器0作为普通的定时器与PIE模块相连，用户可以根据需要进行开发。
2013年2月1日
串行端口
eCAN：增强型CAN总线，支持32个邮箱 McBSP：多通道缓冲串行口，可用于多功能数字信号编解码器、高质量音频设备输出等。 SPI：串行外设接口，是一个高速的同步I/O 口，允许数据程序流(0~16位)按照发送速率移入移出器件。 SCI：串行通信接口，采用两线异步收发模式的串行接口，即UART口。
工作频率不同，要求的内核电压也有所区别
150MHz时，内核电压为1.9V 135MHz以下时，要求内核电压为1.8V
2013年2月1日
（3）外设
被280x裁减的外设多通道缓冲串口（McBSP）外不存储器扩展接口（XINTF）事件管理器（EV） 280x新增加的外设 ePWM、eCAP和eQEP取代了原有的事件管理器增加了I2C总线改进了ADC模块、代码加密模块和GPIO模块的部分功能
TMS320X281x 系列DSP综述
2013年2月1日
本章主要内容
4.1 TMS320X28xx系列DSP内核特点 4.2 C281x的内部结构及其CPU结构 4.3 TMS320X28xx系列DSP比较 4.4 TMS320X28xx处理器外设功能的介绍 4.5 TMS320X28xx的应用领域
L0、L1、H0 SARAM
(4K+4K+8K) ×16bit 可作用户数据和程序空间
2013年2月1日
Boot ROM
Boot ROM是通过boot-loading 软件引导装载在出厂时编好的程序。复位时，就会运行 Boot ROM程序，它通过几个GPIO引脚的状态来决定进入哪一种引导模式。 Boot ROM还存放经常用到的函数公式等，如SIN/COS函数。

TMS320F28XX系列DSP存储器映射图剖析

第四章存储器4.1 TMS320F28XX 系列DSP 存储器映射图存储器的低64k 地址映射为240x 的数据空间；高64k 映射为24x/240x 的程序空间。

与24x/240x 兼容的代码只能从高64K 的地址空间开始执行。

因此，Flash 的高32k 和SARAM 的H0区可以运行24x/240x 兼容的代码（MC=0），而且对于F2812，如果MC=1，程序可以从外部扩展存储器的ZONE7块开始执行。

外部扩展存储器由5个独立的ZONE(区段)组成。

其中的一块ZONE 有自己的片选信号，其余的4个ZONE 区段使用2条信号线进行片选。

每个ZONE 区段可以使用自己的时序（等待状态）进行编程，也可以查询或忽略外部READY 信号。

这样使DSP 与外部存储器更容易、更快速的连接。

注意：XINTF Zone0 Zone1使用同一根片选信号10AND ZXCS ; Zone6 Zone7使用76A ND ZX CS 。

Peripheral Frame 1(外设帧1)、Peripheral Frame 2外设帧2和XINTF ZONE1构成一组“被保护的读写外设块”。

“保护”模式确保这些块在写操作时也可以访问。

因为28x 的流水线写操作之后紧跟着一个读操作，对于不同的存储空间，CPU 的存储总线将会出现相反的顺序。

当用户想要写优先时，这就会引起问题。

C28x 的CPU 支持块保护模式，这样当写操作之后的其他操作时，存储器的那段区域可以被保护起来，这时需要增加额外的时钟来调整操作。

模式的选择可以编程获得，也可以选择默认方式，这样可以保护被选择的区域。

对于F2812，重启时如果XMP/MC＝1 则访问XINTF Zone7。

XMP/MC用来选择微处理器和微控制器方式。

微处理器方式下，Zone7被映射到存储空间高地址，这样中断向量表指向外部。

这种模式下BOOT ROM 无效。

微控制器方式Zone7无效，这样中断向量表映射到BOOTROM。