C8051F开发板用户手册

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品诺电子C8051F仿真器产品说明书

品诺电子C8051F仿真器产品说明书目录目录 (2)一、产品概述 (3)1.1 C8051F调试工具简介 (3)1.2 产品性能 (4)1.3 仿真器接口定义 (4)二、在KEIL下使用USB Debug Adapter (5)三、使用批量下载工具 (7)3.1 U-EC5中文下载程序 (7)3.2 Silicon Laboratories Flash Utility (8)3.3 Silicon Labs MCU Production Programmer (9)四、EC6固件更新 (10)一、产品概述1.1 C8051F调试工具简介C8051F系列单片机是Silabs公司推出的一系列增强型51单片机，其指令集兼容传统MCS-51。

内核采用增强型CIP-51，其最大指令速率达到100MIPS，丰富的外设以及灵活的交叉开关，形成一个SOC，为目前绝大多数8位单片机所不能比拟。

C8051F单片机目前正在高速增长，由于具有兼容传统51的先天优势，已经被越来越多的爱好者和设计者所青睐，C8051F单片机已经进入大学课堂，成为大学单片机教材。

C8051F单片机开发工具经过多个版本发展，经历了并口、串口、USB-串、USB。

目前，以及发展到真正的USB通信，不再使用串并口或者虚拟串口。

C8051F开发工具还包括U-PDC等，但是使用最方便、最普遍的仍然是U-EC6。

品诺电子U-EC6仿真器采用国外原装电路改进而来，可实现支持单步、连续单步、断点、观察点、堆栈监视器, 可以观察/修改存储器和寄存器, 下载程序到Flash存储器等功能，兼容国内任何一家的C8051F调试工具。

多次得到高校的批量订单，使用效果反馈良好。

请定期去官方网站件，以达到更好的使用效果。

也可以在国内代理商下载。

1.2 产品性能 - 可与Keil 、silabs 官方推出的各种软件，如Silicon Laboratories IDE ，FLASH UtilityProgrammer ，Product Programmer ，新华龙U-EC5中文下载程序软件等软件实现无缝连接调试。

C8051F040开发系统板使用说明书

第一章 C8051F040开发系统板简介1.1 开发系统的组成Cygnal C8051F040单片机开发系统主要由Cygnal 片上系统单片机开发工具、C8051F040片上系统单片机和系统实验板三部分组成，应用该系统可进行片上系统单片机较典型应用的实验，请参见以下介绍。

1.2 Cygnal C8051F单片机开发工具简介1.2.1 开发工具概述Cygnal 的开发工具实质上就是计算机IDE 调试环境软件及计算机RS－232到C8051F单片机JTAG口的协议转换器(EC2－N1)的组合。

Cygnal C8051F系列所有的单片机片内均设计有调试电路该调试电路通过边界扫描方式获取单片机片内信息，通过10线的JTAG接口与开发工具连接以便于进行对单片机在片编程调试。

该开发系统板中的核心部分是Cygnal C8051F040单片机。

适配器(EC2－N1)一端与计算机相连，另一端与C8051F单片机的JTAG口相连，应用Cygnal 提供的IDE调试环境就可以进行非侵入式、全速的在系统编程(ISP)和调试。

Cygnal 开发工具支持观察和修改存储器和寄存器支持断点、观察点、堆栈指示器、单步、运行和停止命令。

调试时不需要额外的目标RAM、程序存储器、定时器或通信通道，并且所有的模拟和数字外设都正常工作。

1.2.2 开发工具主要技术指标●支持的目标系统：所有C8051Fxxx 系列单片机；●系统时钟：最大可达25MHz；●通过RS232接口与PC机连接；●支持汇编语言和C51源代码级调试；●第三方工具支持Keil C。

1.2.3 IDE 软件运行环境要求PC机能够运行开发工具软件并能与串行适配器通信。

对PC机有如下系统要求：●Windows 95/98/Me/NT/2000/XP 操作系统；●32MB RAM；●40MB 自由硬盘空间；●空闲的COM 口。

1.2.4 开发工具与PC 机硬件连接硬件连接及软件安装：●将JTAG 扁平电缆与串行示配器EC2 连接●将JTAG 扁平电缆的另一端与目标系统连接●将RS232 串行电缆的一端与EC2 连接●连接RS232 串行电缆的另一端到PC●给目标系统上电●插入CD 并运行SETUP.EXE 将IDE 软件安装到您的PC 机●在PC 机的开始菜单的程序项中选择Cygnal IDE 点击Cygnal 图标运行IDE软件。

C8051F121-GQR 数据手册

Precision Mixed Signal Copyright © 2004 by Silicon Laboratories6.15.2004Analog Peripherals12-Bit ADC-±1 LSB INL; no missing codes-Programmable throughput up to 100 ksps-8 external inputs; programmable as single-ended or differential -Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5-Data-dependent windowed interrupt generator -Built-in temperature sensor (±3 °C)8-Bit ADC-±1 LSB INL; no missing codes-Programmable throughput up to 500 ksps -8 external inputs-Programmable amplifier gain: 4, 2, 1, 0.5Two 12-Bit DACs-Can synchronize outputs to timers for jitter-free waveform generationTwo ComparatorsInternal Voltage ReferenceV DD Monitor/Brown-out DetectorOn-Chip JTAG Debug & Boundary Scan-On-chip debug circuitry facilitates full speed, non-intrusive in-system debug (no emulator required)-Provides breakpoints, single stepping, watchpoints, stack monitor -Inspect/modify memory and registers-Superior performance to emulation systems using ICE-chips, target pods, and sockets-IEEE1149.1 compliant boundary scanHigh-Speed 8051 µC Core-Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks-Up to 100 MIPS throughput with 100 MHz system clock -16 x 16 multiply/accumulate engine (2-cycle)Memory-8448 bytes data RAM-128 kB Flash; in-system programmable in 1024-byte sectors (1024 bytes are reserved)-External parallel data memory interfaceDigital Peripherals-32 port I/O; all are 5 V tolerant-Hardware SMBus™ (I2C™ Compatible), SPI™, and two UART serial ports available concurrently-Programmable 16-bit counter/timer array with six capture/compare modules- 5 general-purpose 16-bit counter/timers-Dedicated watchdog timer; bidirectional reset -Real-time clock mode using Timer 3 or PCAClock Sources-Internal oscillator: 24.5 MHz, 2% accuracy supports UART operation -On-chip programmable PLL: up to 100 MHz -External oscillator: Crystal, RC, C, or Clock Supply Voltage: 3.0 to 3.6 V-Typical operating current: 50 mA at 100 MHz -Typical stop mode current: 0.4 uA64-Pin TQFPTemperature Range: –40 to +85 °CPrecision Mixed Signal Copyright © 2004 by Silicon Laboratories 6.15.2004Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holdersSelected Electrical Specifications(T A = –40 to +85 C°, V DD = 3.0 V unless otherwise specified)Package InformationC8051F120DK Development Kit。

新华龙单片机C8051F410学习板使用手册

目录一、学习板概括 (1)二、准备工作 (1)三、学习板硬件介绍 (3)四、实验程序 (5)实验一、跑马灯 (5)实验二、独立按键 (6)实验三、继电器控制 (7)实验四、P2口驱动数码管 (8)实验五、定时器 (10)实验六、99S倒计时 (10)实验七、TM1668 (11)实验八、AD采样模数转换+TM1668 (17)实验九、串口通信 (18)实验十、ADC+UART (19)实验十一、1602液晶显示 (19)实验十二、8Bit PWM输出 (21)实验十三、单线温度传感器18B20 (21)一、学习板概括：本手册适用于江南晶创科技推出的C8051F410单片机学习板、开发板第二版（V2.0）。

C8051F410单片机学习板由江南科技创办人朱发旺、陈家乐及其团队设计，版权归其所有！淘宝旗舰店（直销店），QQ交流群：112481187。

该学习板主控制芯片使用了新华龙（Silicon）单片机c8051f410。

配套JTAG 仿真器编程器U-EC5，该仿真器可以对C8051F大部分系列单片机进行仿真、调试、单步、烧录、下载、加密等操作。

学习板采用模块化设计，尽量做到各功能模块完全独立，互不干扰，减小初学者编程误区。

使是初学者可快速了解主板硬件电路的结构，尽快熟悉硬件电路，快速入门。

此外由于各模块可独立工作，所有引脚均已使用标准接口外扩，所以可以将模块用于其他场合，大大增加开发板的用途！二、准备工作：1、软件安装（1）本学习板配套的所有演示程序均使用C语言编辑，编写软件为Keil 51（Uvision4），推荐大家也是用此软件编程;（2）程序下载（烧写）软件使用的是U-EC5中文下载程序;（3）JTAG U-EC5 驱动程序，部分电脑系统可自动安装；注：以上软件均支持windows Xp/win7 32/64，JTAG仿真器支持USB2.0。

2、硬件连接使用C8051F410单片机学习板，需要USB MiNi接口数据线一根、IDC10芯下载线一根、JTAG（EC-3/5）仿真器一个、C8051F410单片机学习板主板一块。

C8051F411 芯片评估板用户指南说明书

Rev. 0.1 2/06Copyright © 2006 by Silicon Laboratories C8051F411-EK1. Kit ContentsThe C8051F411 Evaluation Kit contains the following items:⏹C8051F411 Evaluation Board⏹Silicon Laboratories Evaluation Kit IDE and Product Information CD-ROM. CD contents include:● Silicon Laboratories Integrated Development Environment (IDE)● Source code examples and register definition files ● Documentation● C8051F411 demo object code ⏹6’ USB Cable ⏹ 2 AAA Batteries⏹C8051F411 Evaluation Kit Quick Start Guide2. Kit OverviewThe C8051F411 Evaluation Kit demonstrates some of the unique features of the C8051F41x family:⏹High-performance 8051 Core – Up to 50MIPS with a 50MHz system clock derived from the internal oscillator and clock multiplier.⏹Low-voltage Operation – Can operate on a core supply voltage as low as 2.0V.⏹Versatile Interfacing – Includes an internal voltage regulator that can supply up to 50mA at 2.5V or 2.1V output.⏹Real Time Clock – Can accurately maintain time for up to 137 years as long as the RTC peripheral is powered by at least 1.0V, even if the MCU core supply voltage is lost.The C8051F411 Evaluation Board includes a USB interface that allows debugging with the Silicon Laboratories IDE. Power for the C8051F411 board can be supplied from the batteries or the USB connection. Refer to “3.Evaluation Board Interface” for more details.3. Evaluation Board InterfaceThe user interface of the C8051F411 Evaluation Board includes an LCD and four push-buttons. There is also a USB port for debugging and downloading to the C8051F411 target device.3.1. LCD User InterfaceThe C8051F411 Evaluation Board user interface consists of an LCD screen, four buttons, and a switch. The LCD screen displays menu choices and information to the user. The four push buttons, MENU, SELECT, UP , and DOWN, are used to navigate the menus and make selections. The switch determines the power source for the C8051F411 and can be used to switch between the batteries (the left position) and the USB bus (the right position).The C8051F411 Block Diagram shown in Figure 1 shows all elements of the user interface.When the board is powered but idle, the LCD screen will display the time in the upper left corner and cycle through different sets of information, depending upon the operating mode of the board. Refer to “4. Evaluation Modes” for more details on the operating modes.The MENU button brings up the menu on the LCD display. When navigating through the menu options, pressing this button will revert back to the beginning of the menu, and none of the changes will be saved. The menuinterface is described in “4. Evaluation Modes”.C8051F411-EKD2Figure1.C8051F411 Evaluation Board Block DiagramThe SELECT, UP, and DOWN buttons are used to navigate through the menus and choose the desired options. These buttons also have special functionality depending upon the current mode.3.2. Reset Button and LEDsThe remaining push button is connected to the RESET pin of the C8051F411. Pressing this button puts the device into its hardware-reset state.Two LEDs are also provided on the evaluation board:⏹D2–The bi-color LED indicates communications between the PC and the DEBUG USB port.⏹D3–The red LED labeled “DEMO PWR” indicates a power connection to the evaluation board.3.3. DEMO/DEBUG Interface (J1)The evaluation board DEMO/DEBUG USB port (J1) provides the interface between a PC USB port and the C8051F411’s in-system debug/programming circuitry.4. Evaluation ModesThe C8051F411 Evaluation Board has two modes: Keepsake mode and Demo mode. In Keepsake mode, the ‘F411 uses the 32.768kHz RTC crystal as the system clock. Demo mode allows the user to vary the internal oscillator and internal voltage regulator configuration. The board is in Keepsake mode upon powerup.4.1. Keepsake ModeUpon powerup, the evaluation board is in Keepsake mode (see Figure2). Keepsake mode can be used when the board is powered from the batteries or the USB bus. In Keepsake mode, the device displays the following information:⏹Time (in the upper-right hand corner of the LCD)⏹Date (in the lower section of the LCD)⏹Temperature (in the lower section of the LCD)The time is persistent in the upper right-hand corner. The date (month and day) and temperature will be alternately displayed in the lower section of the LCD. By default, the temperature is displayed in Celsius.Notes:1.Pressing the UP button while in Keepsake mode will force the LCD to display only the temperature and notthe date. Pressing UP again will cause the LCD to switch between the date and temperature as normal.2. Pressing the DOWN button while in Keepsake mode will switch the display between a 12-hour clock and 24-hour clock.C8051F411-EKFigure2.Keepsake Mode Display OptionsThe time, date, and temperature can be set and calibrated while in Keepsake mode. To do so, press the MENU button, and use the UP and DOWN buttons to cycle through the options. Pressing the MENU button at any time will bring the display back to the default Keepsake display. The menu options in Keepsake mode are as follows:⏹DEMO⏹TIME⏹DATE⏹TEMP⏹FAH-CEL⏹12/24 HRPress the SELECT button to choose one of the menu options. The menu options are summarized in Figure3.C8051F411-EKFigure3.Keepsake Mode Menu Options4.1.1. DEMOSelecting DEMO will put the device in Demo mode, which is described in “4.2. Demo Mode”.4.1.2. TIMESelecting this option allows the user to configure the time. The lower section of the display will appear as:H 00Press the UP and DOWN buttons to set the hour. The hour is a 24-hour value; so, an hour of 20 is equivalent to 10:00 PM. After setting the hour, press SELECT to set the minutes. This will appear as:M 00As before, press the UP and DOWN buttons to change the minutes. Pressing SELECT will set the time in the upper right-hand corner to the time that was entered. Pressing MENU will cancel the operation and go back to Keepsake mode.4.1.3. DATESelecting this option allows the user to configure the date. The lower section of the display will appear as:Y 2000C8051F411-EK Press the UP and DOWN buttons to set the year. The valid range is 2000 to 2136. After setting the year, pressSELECT to set the month. This will appear as:M 00Press the UP and DOWN buttons to change the month. After setting the year, press SELECT to set the day. This will appear as:D 00Pressing SELECT will set the date, and the device will go back to Keepsake mode. Pressing MENU will cancel the operation and go back to Keepsake mode.4.1.4. TEMPIn this menu option, the temperature offset can be calibrated. The temperature calibration is done in Celsius. In this option, the lower part of the LCD screen will appear as:25 deg CUse the UP and DOWN buttons to change this value to the current room temperature for calibration. Press SELECT to calibrate the device, or press MENU to cancel temperature calibration.4.1.5. FAH-CELIn this menu option, the LCD can be changed to display the temperature in Celsius or Fahrenheit. Use the UP and DOWN keys to move between CELSIUS and FAHREN. Press SELECT to change the display, or press MENU to go back to Keepsake mode.4.1.6. 12/24 HRIn this menu option, the LCD can be changed to display the time in 12 or 24 hour format. Use the UP and DOWN keys to move between 12 HOUR and 24 HOUR. Press SELECT to change the display, or press MENU to go back to Keepsake mode.4.2. Demo ModeTo put the device in Demo mode, use the Keepsake menu options as described in “4.1.1. DEMO”. Demo mode should only be used when the board is powered from the USB bus (the red switch is in the right position). In Demo mode, the user can configure the system clock speed and the core voltage. The default settings for demo mode are 3MHz and a core voltage of 2.5V.In Demo mode, the LCD displays:⏹Time (in the upper right hand corner of the LCD)⏹Core Voltage (in the lower section of the LCD)⏹System Clock Speed (in the lower section of the LCD)⏹Temperature (in the lower section of the LCD)The time is persistent in the upper right-hand corner. The core voltage, system clock speed, and temperature will be alternately displayed in the lower section of the LCD.The system clock speed and core voltage can be configured from the Demo mode menu. Press the MENU button to bring up the menu. Use the UP and DOWN buttons to cycle through the options. Pressing the MENU button at any time will bring the display back to the default Demo mode from Menu mode. The menu options in Demo mode are as follows:⏹SET MHZ⏹SETVREG⏹KEEPPress the SELECT button to choose one of the menu options. The options are summarized in Figure4.C8051F411-EKFigure4.Demo Mode Menu Options4.2.1. SET MHZIn this menu option, the system clock speed can be set to one of a few different settings. When selected, the following will appear in the lower section of the LCD:3MHZUse the UP and DOWN keys to cycle through the various system clock options. The available system clock settings are 3, 6, 12, 24, and 50MHz.Press SELECT to change the SYSCLK and go back to the Demo mode display. Press MENU to go back to the Demo mode display without changing the system clock.4.2.2. SET VREGIn this menu option, the output voltage of the regulator can be set. When selected, the following will appear in the lower section of the LCD:2.5 VREGUse the UP and DOWN keys to cycle between 2.1 and 2.5V. Press SELECT to change the core voltage and go back to the Demo mode display. Press MENU to go back to the Demo mode display without changing the core voltage.4.2.3. KEEPSelect KEEP to go back to Keepsake mode.C8051F411-EK 5. Software SetupThe included CD-ROM contains the Silicon Laboratories Integrated Development Environment (IDE), Keil software 8051 tools, and additional documentation. Insert the CD-ROM into your PC’s CD-ROM drive. An installer will automatically launch, allowing you to install the IDE software or read documentation by clicking buttons on the installation panel. If the installer does not automatically start when you insert the CD-ROM, run autorun.exe found in the root directory of the CD-ROM. Refer to the readme.txt file on the CD-ROM for the latest information regarding known IDE problems and restrictions.6. Silicon Laboratories Integrated Development Environment (IDE)The Silicon Laboratories IDE integrates a source code editor, source-level debugger, and in-system Flash programmer. The IDE uses the Keil 8051 Tools by default. An evaluation version of the Keil tools with a 2k code size limit is included with this kit. The use of third-party compilers and assemblers is also supported.6.1. System RequirementsThe Silicon Laboratories IDE requirements are as follows:⏹Pentium-class host PC running Microsoft Windows 2000 or later⏹One available USB port.6.2. Using the Keil Software 8051 Tools with the Silicon Laboratories IDETo perform source-level debugging with the IDE, you must configure the Keil 8051 tools to generate an absolute object file in the OMF-51 format with object extensions and debug records enabled. You may build the OMF-51 absolute object file by calling the Keil 8051 tools at the command line (e.g., batch file or make file) or by using the project manager built into the IDE. The default configuration when using the Silicon Laboratories IDE project manager enables object extension and debug record generation. Refer to “AN104: Integrating Keil 8051 Tools into the Silicon Labs IDE” in the “SiLabs\MCU\Documentation\Appnotes” directory for additional information on using the Keil 8051 tools with the Silicon Laboratories IDE.To build an absolute object file using the Silicon Laboratories IDE project manager, you must first create a project.A project consists of a set of files, IDE configuration, debug views, and a target build configuration (a list of files and tool configurations used as input to the assembler, compiler, and linker when building an output object file).The following sections illustrate the steps necessary to manually create a project with one or more source files, build a program, and download the program to the target in preparation for debugging. (The IDE will automatically create a single-file project using the currently open and active source file if you select Build/Make Project before a project is defined.)6.2.1. Creating a New ProjectPerform the following steps:1.Select Project->New Project to open a new project and reset all configuration settings to default.2.Select File->New File to open an editor window. Create your source file(s), and save the file(s) with arecognized extension, such as .c, .h, or .asm, to enable color syntax highlighting.3.Right-click on “New Project” in the Project Window. Select Add files to project. Select files in the file browser,and click Open. Continue adding files until all project files have been added.4.For each of the files in the Project Window that you want assembled, compiled, and linked into the target build,right-click on the file name, and select Add file to build. Each file will be assembled or compiled as appropriate (based on its file extension) and linked into the build of the absolute object file.Note:If a project contains a large number of files, the “Group” feature of the IDE can be used to organize them.Right-click on “New Project” in the Project Window. Select Add Groups to project. Add predefined groups, or add customized groups. Right-click on the group name, and choose Add file to group. Select the files to be added. Continue adding files until all project files have been added.C8051F411-EK6.2.2. Building and Downloading the Program for Debugging1.Once all source files have been added to the target build, build the project by clicking on the Build/MakeProjectbutton in the toolbar or selecting Project->Build/Make Project from the menu.Note: After the project has been built the first time, the Build/Make Project command will only build the files that have been changed since the previous build. To rebuild all files and project dependencies, click on the Rebuild All button in the toolbar or select Project->Rebuild All from the menu.2.Before connecting to the target device, several connection options may need to be set. Open theConnectionOptions window by selecting Options->Connection Options... in the IDE menu. First, selectthe adapter that was included with the kit in the “Serial Adapter” section. Next, the correct “Debug Interface”must be selected.C8051F41x family devices use the Silicon Labs 2-wire (C2) debug interface. Once all theselections are made, click the OK button to close the window.3.Click the Connect button in the toolbar or select Debug->Connect from the menu to connect to the device.4.Download the project to the target by clicking the Download Code button in the toolbar.Note: To enableautomatic downloading if the program build is successful select Enable automatic con-nect/download after build in the Project->Target Build Configuration dialog. If errors occur during the build process, the IDE will not attempt the download.5.Save the project when finished with the debug session to preserve the current target build configuration,editorsettings and the location of all open debug views. To save the project, select Project->Save ProjectAs... from the menu. Create a new name for the project and click on Save.6.2.3. Downloading the C8051F411 Evaluation Board Demonstration FirmwareTo download the demonstration code to the C8051F411 evaluation board, follow steps 2 and 3 in “6.2.2. Building and Downloading the Program for Debugging”. The demonstration code can be found in C:Silabs\MCU\Demos\C8051F411EK\F411EK_DEMO.hex by default.C8051F411-EK7. SchematicsF i g u r e 5.C 8051F 411 E v a l u a t i o n B o a r d S c h e m a t i c (1 o f 3)C8051F411-EKF i g u r e 6.C 8051F 411 E v a l u a t i o n B o a r d S c h e m a t i c (2 o f 3)C8051F411-EKF i g u r e 7.C 8051F 411 E v a l u a t i o n B o a r d S c h e m a t i c (3 o f 3)DisclaimerSilicon Laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Laboratories reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Silicon Laboratories shall have no liability for the consequences of use of the information supplied herein. This document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. The products must not be used within any Life Support System without the specific written consent of Silicon Laboratories. A "Life Support System" is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant personal injury or death. Silicon Laboratories products are generally not intended for military applications. Silicon Laboratories products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons.Trademark InformationSilicon Laboratories Inc., Silicon Laboratories, Silicon Labs, SiLabs and the Silicon Labs logo, CMEMS®, EFM, EFM32, EFR, Energy Micro, Energy Micro logo and combinations thereof, "the world’s most energy friendly microcontrollers", Ember®, EZLink®, EZMac®, EZRadio®, EZRadioPRO®, DSPLL®, ISOmodem ®, Precision32®, ProSLIC®, SiPHY®, USBXpress® and others are trademarks or registered trademarks of Silicon Laboratories Inc. ARM, CORTEX, Cortex-M3 and THUMB are trademarks or registered trademarks of ARM Holdings. Keil is a registered trademark of ARM Limited. All other products or brand names mentioned herein are trademarks of their respective holders.Silicon Laboratories Inc.400 West Cesar Chavez Austin, TX 78701USAIoT Portfolio /IoTSW/HW/simplicityQuality/qualitySupport and Community。

C8051F脱机编程器操作指南

C8051F脱机编程器操作指南一. 适用芯片型号:所有C8051F单片机.二. 使用基本步骤1.将用户程序通过USB线下载到脱机编程器中.具体操作步骤如下:A: 将脱机编程器通过USB线连到PC机上.B: 双击应用程序”脱机编程器下载工具”,出现图1下载界面图1.C: 单击下载界面”刷新”按钮,可看到脱机编程器器件序列号: XHL---TJBCQ0001。

界面如下图：D: 单击”连接”,如果PC”连接”按钮变成”关闭”,且脱机编程器显示”已连接PC”,表示编程器与PC通信正常，跳到步骤E.如果点”连接”时,PC界面长时间无反应,请拔掉USB线,重新插入,将下载界面关掉重新打开.再从步骤A开始操作.E: 单击”浏览”, 选择要下载的hex文件.(如果是F12X_13X系列需要分块的芯片. 在KEIL下生成HEX文件，如果生成的不是4个HEX文件，在”C8051F 脱机编程器”装载时显示H0X这时下载后程序不能正常运行。

可以用U-EC5中文下载软件转化一下，在U-EC5中文下载软件里先选择芯片型号然后先装载在KEIL下生成的HEX文件的第一个文件，然后再以HEX文件类型保存，就可以生成4个HEX类型的文件。

在”C8051F脱机编程器”下载时只选择第一个文件H00,加载后显示H03)。

可看到该文件的”文件长度”及”校验和”数据.这两组数据要记录下来，以便与脱机编程器中烧录文件信息对比是否一致。

F: 在”器件型号”下拉菜单中选择使用的芯片型号,单击”下载”. 脱机编程器显示”程序下载中….”.等待PC下载界面显示”文件下载完成”,单击”确定”.G: 单击PC下载界面”关闭”, 脱机编程器回到编程界面.2.用脱机编程器给目标板下载程序.A: 通过USB线或电池给脱机编程器接上电源。

B．用10PIN扁平电缆连接脱机编程器和目标板。

. C. 按面板的▲▼键，选择不同的功能：“芯片编程”，“烧录文件信息”及“编程器设置”。

C8051F020使用说明书

Precision Mixed Signal Copyright © 2007 by Silicon Laboratories11.02.2007Analog Peripherals12-Bit ADC-±1 LSB INL; no missing codes-Programmable throughput up to 100 ksps-8 external inputs; programmable as single-ended or differential -Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5-Data-dependent windowed interrupt generator -Built-in temperature sensor (±3 °C)8-Bit ADC-±1 LSB INL; no missing codes-Programmable throughput up to 500 ksps -8 external inputs-Programmable amplifier gain: 4, 2, 1, 0.5Two 12-Bit DACs-Can synchronize outputs to timers for jitter-free waveform generationTwo ComparatorsInternal Voltage ReferenceV DD Monitor/Brown-out DetectorOn-Chip JTAG Debug & Boundary Scan-On-chip debug circuitry facilitates full speed, non-intrusive in-system debug (no emulator required)-Provides breakpoints, single stepping, watchpoints, stack monitor -Inspect/modify memory and registers-Superior performance to emulation systems using ICE-chips, target pods, and sockets-IEEE1149.1 compliant boundary scanHigh-Speed 8051 µC Core-Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks-Up to 25 MIPS throughput with 25 MHz system clock -22 vectored interrupt sourcesMemory-4352 bytes data RAM-64 kB Flash; in-system programmable in 512-byte sectors (512 bytes are reserved)-External parallel data memory interfaceDigital Peripherals-64 port I/O; all are 5 V tolerant-Hardware SMBus™ (I2C™ compatible), SPI™, and two UART serial ports available concurrently-Programmable 16-bit counter/timer array with 5 capture/compare mod-ules- 5 general-purpose 16-bit counter/timers-Dedicated watchdog timer; bidirectional reset -Real-time clock mode using Timer 3 or PCA Clock Sources-Internal programmable oscillator: 2–16 MHz -External oscillator: Crystal, RC, C, or Clock -Can switch between clock sources on-the-fly Supply Voltage: 2.7 to 3.6 V-Typical operating current: 10 mA at 25 MHz-Multiple power saving sleep and shutdown modes100-Pin TQFPTemperature Range: –40 to +85 °CPrecision Mixed Signal Copyright © 2007 by Silicon Laboratories 11.02.2007Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holdersSelected Electrical Specifications(T A = –40 to +85 C°, V DD = 2.7 V unless otherwise specified)Package InformationC8051F020DK Development Kit。

C8051F 全线产品选型手册

56
CAN; EMIF; I2C;
SPI; UART; 2 x
25 64 kB 4.25 64 UART
56
CAN; EMIF; I2C;
SPI; UART; 2 x
25 64 kB 4.25 32 UART
56
CAN; EMIF; I2C;
SPI; UART; 2 x
25 64 kB 4.25 64 UART
新华龙电子有选型请启用筛选
Part Number C8051F000 C8051F001 C8051F002 C8051F005 C8051F006 C8051F007 C8051F010 C8051F011 C8051F012 C8051F015 C8051F016 C8051F017 C8051F018 C8051F019
45
EMIF; I2C; SPI;
UART; 2 x UART;
C8051F341-GQ 50* 32 kB 2.25 40 USB
45
I2C; SPI; UART;
C8051F342-GM 50* 64 kB 4.25 25 USB
45
I2C; SPI; UART;
C8051F342-GQ 50* 64 kB 4.25 25 USB
33
C8051F302-GS 25 8 kB 0.25 8 I2C; UART
33
C8051F303-GM 25 8 kB 0.25 8 I2C; UART
33
C8051F303-GS 25 8 kB 0.25 8 I2C; UART
33
C8051F304-GM 25 4 kB 0.25 8 I2C; UART
45

C8051F020单片机说明

C8051F020开发板说明书V1.0.02012年3月22日目录第一章概述 (1)第二章开发板简介 (2)2.1 开发板原理框图 (2)2.2 开发板实物图 (2)2.2.1 本开发板的外扩展资源和扩展接口 (2)2.2.2 本开发板的平面图 (3)第三章开发板硬件电路说明 (4)3.1 硬件电路简介 (4)3.2 电源电路 (4)3.3单片机复位电路 (4)3.4 ZLG7289电路原理图 (5)3.5 LED电路原理图 (6)3.6 LCD接口电路 (7)第四章开发板注意事项 (8)4.1注意事项 (8)4.2开发板跳线使用方法 (8)第一章概述本说明书是C8051F020开发板的硬件使用说明书，详细描述了020开发板的硬件构成、原理，以及它的使用方法。

开发板用USB JTAG对C8051F020芯片进行编程，C8051F020有64个I/O而我们开发板通过排针引出了其中的44个I/O口，板上有标识（也可查看原理图或PCB图）。

引出来的I/O口可以供用户配置。

第二章开发板简介2.1 开发板原理框图本开发板主要用到了C8051F020芯片（内置A/D D/A和比较器等）和周立功的ZLG7289芯片，020芯片通过SPI方式和ZLG7289完成数据传递，ZLG7289控制按键和数码管显示。

原理框图如下：图2-1 开发板原理框图2.2 开发板实物图2.2.1 本开发板的外扩展资源和扩展接口部分接口说明：JTAG接口：本板卡和USB Debug Adaptor仿真器连接，通过本接口用户可实现在线仿真。

LCD接口：本板液晶用MzL05-12864AD/DA接口：本板的AD/DA接口都来自020内置的AD/DA另外的外扩资源和接口如下图所示：数码管AD 接口比较器接口P7口P3.0~ P3.6P0口P2口P1口3.2 JTAG3.3V/GNDDAC 接口LCD 接口LED ZLG72895vGNDP6口C8051F0203.3V/GND 按键电源开关复位键开发板实物图2.2.2 本开发板的平面图平面图上的位置和板卡的位置一一对应，详细的说明请看后面章节的图2-2 说明。

C8051F340DK使用手册v0.9

C8051F340DK单片机开发板使用手册版本：V0.9C8051F网络完成日期:2009-3-23目录第一章．C8051F340DK开发板功能简介・・・・・・・・・・・・3第二章．C8051F340DK硬件接口详细说明・・・・・・・・・・・5第三章．C8051F340DK软件例程详细说明・・・・・・・・・・・8第四章．开发工具及开发软件KeilC安装配置・・・・・・・・・10 第五章．C8051F340DK常见问题・・・・・・・・・・・・・・・15 附录A：特别声明・・・・・・・・・・・・・・・・・・・・・15附录B：版本修定・・・・・・・・・・・・・・・・・・・・・15第一章．C8051F340DK开发板功能简介1．概述C8051F340DK是为技术研发人员和单片机爱好者开发的一款单片机开发板。

本开发板采用美国Silabs公司的C8051F340作为核心控制器,在搭配该公司的CP2200以太网控制芯片可完成工业以太网产品开发。

我们针对C8051F340单片机片上的全部资源，编写了所有功能的测试程序，对该单片机的性能做了全面的测试评估，使用方便。

使用该开发板能使开发者迅速掌握CP2200以太网控制器和C8051F340单片机的软硬件设计，大大缩短了产品开发周期。

2. C8051F340单片机主要特性（1）高速流水线结构的8051兼容的CIP-51内核，最高48MIPS执行速度；（2）全速非侵入式的系统调试接口（片内，C2接口）；（3）真正10位200ksps的多通道单端/差分ADC，带模拟多路器；（4）高精度可编程的12MHz内部震荡器；（5）64KB字节可在系统编程的FLASH存储器；（6）4352（4096+256）字节的片内RAM；（7）USB 2.0通信接口，支持全速12Mbps通信和低速1.5Mbps通信（8）硬件实现的SPI，SMBus/IIC和2个UART串行接口；（9）4个通用的16位定时器；（10）具有5个捕捉/比较模块的可编程计数器/定时器阵列；（11）片内上电复位，看门狗定时器，2个电压比较器，VDD监视器和温度传感器；（12）40个I/O端口；（13）-40~85度工业级温度范围；（14）2.7V~3.6V工作电压，TQFP48封装；3.板上资源（1）MCU为美国Silabs公司C8051F340，64KB FLASH、(4096+256)B RAM、最高48MIPS执行速度；（2）外扩32KB SRAM(选用IS62LV256,速度70ns)，外扩64KB串行FLASH (选用AT25F512,，也可以选用更大的FLASH）；（3）2路10位AD输入，AIN1到AIN2输入信号量程0～+24.4V；（4）2路标准RS232通讯接口；（5）IIC接口的EEPROM AT24C02(可选更大容量的EEPROM)；（6）IIC接口的RTC时钟，选用PCF8563, 带停电保护功能；（7）4*1 轻触键盘，蜂鸣器，LED指示；（8）JTAG（C2）调试接口；（9）两个LCD接口，支持多种厂家LCD，最高支持320×240；（10）USB从机通信；（11）10M以太网通讯接口,选用CP2200以太网通讯专用控制芯片；（12）外接P0/P1/P2/P3/P4 5个8位IO接口；（13）外扩总线接口；（14）C8051F340上的所有资源对用户开放；（15）USB供电；4．开发板软件例程（1）Delay: 软件延时程序，利用软件进行延时操作；（2）Key IO: 键盘读取及 IO信号输出控制程序；（3）EEPROM: IIC接口EEPROM(AT24C02A, 容量256字节)读写程序；（4）RTC: IIC接口实时时钟(PCF8563)读写程序；（5）RS232: 2路RS232串行数据通信程序；（6）ADC: 2路10 位AD采集示例程序；（7）LCD:1602字符型LCD显示驱动软件；（8）Timer: Timer0、Timer2、Timer3计时程序；（9）FLASH:外扩SPI串行Flash(AT25F512)擦除读写软件；（10）USB: USB通信示例程序；（11）WEB: TCP/IP协议栈及其应用通信程序；5．开发板配置：(1) C8051F340DK开发板1块；(2) 交叉串口线1条；(3) 交叉网线1条；(4) USB(电源)线1条；(5) 资料光盘1张；光盘内容：1) C8051F340DK使用手册；2）C8051F340DK原理图(PDF文件)；3）实验程序源码（C语言）；4）C8051F340DK主要元器件资料；5）KEIL C51 V8.02开发软件（2K代码限制）；6）其它相关资料；6．开发板图片：第二章．C8051F340DK硬件接口说明1. ML-F020DK+硬件地址分配表接口或器件标识分配的地址说明IS62LV256 U6 0x0000-0x7FFF 外部扩展RAM地址CP2200 U9 0x8000-0x80FF 以太网芯片地址LCD1接口 JP10 0x9000-0x900F LCD1操作地址，接1602字符型液晶LCD2接口 JP11 0x8800-0x8803 LCD2操作地址, 支持T6963和SED1335控制芯片外扩总线 JP1 0xB800-0xBFFF 外部设备地址2．开发板接口列表标号功能说明连接对象JP1 外部总线扩展接口用户自定义JP2/3/4/5 C8051F340外接引脚用户自定义JP6 模拟信号输入接口（输入量程0～24.4V）外部设备（电压信号）JP7 RS232-2通信接口 RS232通信设备JP8 RS232-1通信接口 RS232通信设备JP10 液晶显示（LCD1）的接口接1602字符型液晶JP11 液晶显示（LCD2）的接口接以T6963和SED1335为控制芯片的各种型号液晶JP12 USB从机接口（也是电源接口）接PC机等USB主机设备外部USB供电，＋5V JP13 JTAG接口,调试下载程序 C8051网络EC3仿真器JP14 10M以太网接口以太网设备3．JP1 总线扩展接口1 3 5 7 9 11 13 15 17 19 21 23 25A0 A2 A4 A6 A8 A10 nWR D0 D2 D4 D6 +3.3V+5V2 4 6 8 10 12 14 16 18 20 22 24 26A1 A3 A5 A7 A9 nRD nEX_CS D1 D3 D5 D7 GND GND说明：(1)地址总线(A0-A10)、数据总线(D0-D7)和控制总线(nRD 、nWR、nEX_CS)电平为3.3V；(2)地址范围：0xB800-0xBFFF；4． JP2、JP3、JP4、JP5为C8051F340单片机所有管脚引出接口，可由客户自由使用，但要注意在板子的原有电路的影响。

C8051F040中文数据手册

1. 系统概论C8051 F04X 系列单片机是集成在一块芯片上的混合信号系统级单片机，分64个I/O端口管脚（如C8051F040/2）或者32个I/O端口管脚（如C8051F041/3）两类，同时有一个CAN2.0B 集成控制器。

其最突出的特征见下表，涉及的主要设备特征在1.1中详解。

. 25MIPS高速流水线式CIP-51控制器内核. CAN2.0B 控制对应的有32个信息对象，且每一个都有它自己的屏蔽位. 在系统，全速，非插入式调试接口. 有12位的ADC（C8051F040/1）或10位的ADC（C8051F042/3），带有PGA和模拟复用开关. 对于12位的ADC（峰峰值为60伏）的高压差分放大输入可通过编程得到. 有8位的多通道DAC，带有PGA和模拟复用开关. 有两个12位DAC，通过编程更新时序. 64KB的可编程FLASH存储器. RAM可存储4352（4096+256）字节. 外部内存接口可寻址64K字节. SPI，SMBus/I2C和（2）UART串行接口通过硬件实现. 5个16位通用定时器. 可编程计数/定时阵列有6个捕捉/比较模块. 片内有看门狗定时器，VDD监视器，温度传感器由于有片内VDD监视器，看门狗定时器和时钟震荡器，C8051F04X系列单片机称得上是真正独立的片上系统。

通过使用软件可以用程序很好的管理模拟和数字外设FLASH存储器甚至还有在系统重新编程能力，可提供非易失数据存储，并允许现场更新8051程序。

片内JTAG调试支持功能允许对安装在最终应用系统上的单片机进行非侵入失式（不占用片内资源），全速在系统调试。

该调试系统支持和修改存储器和寄存器，支持断点，观察点，单步及运行和停机命令。

在使用JTAG调试时所有的模拟和数字外设都可全功能运行。

每个单片机都可在工业温度范围-45-+85℃内采用2.7伏到3.6V 的工作电压，端口I/O，/RST和JTAM引脚允许5V的输入信号电压。

EXP-C8051F021使用说明书

CE0
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EXP-C8051F021 适配器板使用说明书
北京达盛科技有限公司
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55（J7 跳线）
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A14 +5V +5V
达 P2 接口管脚与 FPGA 管脚的对应关系：
P2 端口管脚号 1
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功能定义 DGND
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SPISTE1
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53（J5 跳线）
NC
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C8051F970 开发套件快速启动指南说明书

Rev. 0.2 6/14Copyright © 2014 by Silicon LaboratoriesC8051F970DK-QSG1. Getting StartedStep 1. Install Simplicity Studio If it’s not already installed, download and install Simplicity Studio from the Silicon Labs website. Simplicity Studio is a free software suite needed to start developing your application./simplicity-studio The CP210x VCP drivers must be installed to view the capacitive sensing data. Accept if Simplicity Studio opens a prompt to install the drivers.Step 2. Set Up Your KitConnect the USB Debug Adapter to the computer using one of the standard USB cables. Connect the 10-pin ribbon cable from the USB Debug Adapter to the DEBUG header (H8) on the development board and move the VDD Select switch (SW1) to the VREG position. Then,connect the power adapter to the 5–12V DC (P1) connector on the development board.No tR e co mme nd edf or N e wDe si g n sC8051F970DK-QSGStep 3. Use the Capacitive Sensing Slider Slide a finger along the capacitive sensing slider (picture). LED12, LED13, LED14, and LED16will light up indicating the detected finger position on the slider.Step 4. Use the Capacitive Sensing Buttons Place a finger on one of the buttons in the capacitive sensing array (picture). LED05 will indicate a single finger detected, and LED15lights up when a second button is pressed concurrently.Step 5. Detect Your DeviceOnce the kit is connected, open Simplicity Studio and click the “Detect Connected Device” button. This will verify that the installation was successful, identify the MCU on the kit hardware, and automatically configure the software tools for use with your device.No tR e co mme nd edf or N e wDe si g n sC8051F970DK-QSGStep 6. View the Capacitive Sensing Data The CP210x VCP drivers must be installed to view the capacitive sensing data. If not installed during the Simplicity Studio installation process,drivers may be installed manually by going to:Help → Install Drivers → CP210x VCP Or download and install from:/vcpdriversConnect a USB cable between the computer and the USB port on the development board (J9), and click the “Capacitive Sense Profiler” tile under Software in Simplicity Studio.The application notes, “AN0828: Capacitive Sensing Library Overview and “AN0829:Capacitive Sensing Library Configuration Guide”, contain more information on how to use the capacitive sensing library and profiler tool.These documents can be accessed using the “Application Notes” tile.Step 7. Touch and VisualizeThe Capacitive Sense Profiler indicates touches, raw and processed data, and noise information in asimple-to-use GUI.Touch and release any of the capacitive sensing buttons on the board. The profiler will display the measured raw data delta, touch detection points, and baseline.Step 8. Load New Demos in a Few Easy StepsLoad a new demo onto the board by clicking the Demos tile and selecting the desired demo from the list.No tR e co mme nd edf or N e wDe si g n sC8051F970DK-QSG2. Resources⏹ Software ExamplesOther software examples can be imported,compiled, and downloaded using the “Software Examples” tile.⏹ Kit Documentation and User’s GuideKit documentation like the schematic and detailed board description can be found usingthe “Kit Documentation” tile.⏹ Capacitive Sense Profiler“AN0828: Capacitive Sensing Library Overview” and “AN0829: Capacitive Sensing Library Configuration Guide” contain more information on how to use the capacitive sensing library and visualization tool. These documents can be accessed using the “Application Notes” tile.⏹ Community and SupportHave a question? Visit the Silicon Labs community by clicking the “Community” tile.No tR e co mme nd edf or N e wDe si g n sSilicon Laboratories Inc.400 West Cesar Chavez Austin, TX 78701USASimplicity StudioOne-click access to MCU and wireless tools, documentation, software, source code libraries & more. Available for Windows, Mac and Linux!IoT Portfolio /IoTSW/HW/simplicityQuality/qualitySupport and CommunityDisclaimerSilicon Labs intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Labs products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Labs reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Silicon Labs shall have no liability for the consequences of use of the information supplied herein. This document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. The products are not designed or authorized to be used within any Life Support System without the specific written consent of Silicon Labs. A "Life Support System" is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant personal injury or death. Silicon Labs products are not designed or authorized for military applications. Silicon Labs products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons.Trademark InformationSilicon Laboratories Inc.® , Silicon Laboratories®, Silicon Labs®, SiLabs® and the Silicon Labs logo®, Bluegiga®, Bluegiga Logo®, Clockbuilder®, CMEMS®, DSPLL®, EFM®, EFM32®, EFR, Ember®, Energy Micro, Energy Micro logo and combinations thereof, "the world’s most energy friendly microcontrollers", Ember®, EZLink®, EZRadio®, EZRadioPRO®, Gecko®, ISOmodem®, Precision32®, ProSLIC®, Simplicity Studio®, SiPHY®, Telegesis, the Telegesis Logo®, USBXpress® and others are trademarks or registered trademarks of Silicon Labs. ARM, CORTEX, Cortex-M3 and THUMB are trademarks or registered trademarks of ARM Holdings. Keil is a registered trademark of ARM Limited. All other products or brand names mentioned herein are trademarks of their respective holders.No tR e co md edf or N e wDe si g n s。

C8051F040中文数据手册范本

其最突出的特征见下表，涉及的主要设备特征在1.1中详解。

通过使用软件可以用程序很好的管理模拟和数字外设FLASH存储器甚至还有在系统重新编程能力，可提供非易失数据存储，并允许现场更新8051程序。

片内JTAG调试支持功能允许对安装在最终应用系统上的单片机进行非侵入失式（不占用片内资源），全速在系统调试。

该调试系统支持和修改存储器和寄存器，支持断点，观察点，单步及运行和停机命令。

在使用JTAG调试时所有的模拟和数字外设都可全功能运行。

每个单片机都可在工业温度范围-45-+85℃内采用 2.7伏到3.6V 的工作电压，端口I/O，/RST和JTAM引脚允许5V的输入信号电压。

C8051F326 7开发板用户指南说明书

Rev. 0.3 5/14Copyright © 2014 by Silicon LaboratoriesC8051F326/7EVELOPMENT IT SER S UIDE1. Kit ContentsThe C8051F326/7 Development Kit contains the following items:•C8051F326 Target Board•C8051Fxxx Development Kit Quick-Start Guide •USB Cable•AC to DC Power Adapter•USB Debug Adapter (USB to Debug Interface)•USB Cable2. Hardware Setup using a USB Debug AdapterThe target board is connected to a PC running the Silicon Laboratories IDE via the USB Debug Adapter as shown in Figure 1.1.Connect the USB Debug Adapter to the DEBUG connector on the target board with the 10-pin ribbon cable.2.Connect one end of the USB cable to the USB connector on the USB Debug Adapter.3.Connect the other end of the USB cable to a USB Port on the PC.4.Connect the ac/dc power adapter to power jack P1 on the target board.Notes:•Use the Reset button in the IDE to reset the target when connected using a USB Debug Adapter.•Remove power from the target board and the USB Debug Adapter before connecting or disconnecting the ribbon cable from the target board. Connecting or disconnecting the cable when the devices have power can damage the device and/or the USB Debug Adapter.Figure 1.Hardware Setup using a USB Debug AdapterPWRP1.6C8051F326/73. Software SetupSimplicity Studio greatly reduces development time and complexity with Silicon Labs EFM32 and 8051 MCU products by providing a high-powered IDE, tools for hardware configuration, and links to helpful resources, all in one place.Once Simplicity Studio is installed, the application itself can be used to install additional software and documentation components to aid in the development and evaluation process.Figure 2.Simplicity StudioThe following Simplicity Studio components are required for the C8051F326 Development Kit:⏹ 8051 Products Part Support ⏹ Simplicity Developer PlatformDownload and install Simplicity Studio from /8bit-software or /simplicity-studio .Once installed, run Simplicity Studio by selecting Start →Silicon Labs →Simplicity Studio →Simplicity Studio from the start menu or clicking the Simplicity Studio shortcut on the desktop. Follow the instructions to install the software and click Simplicity IDE to launch the IDE.The first time the project creation wizard runs, the Setup Environment wizard will guide the user through the process of configuring the build tools and SDK selection.In the Part Selection step of the wizard, select from the list of installed parts only the parts to use during development. Choosing parts and families in this step affects the displayed or filtered parts in the later device selection menus. Choose the C8051F326/7 family by checking the C8051F32x check box. Modify the part selection at any time by accessing thePart Management dialog from the Window →Preferences →Simplicity Studio →Part Management menu item.Simplicity Studio can detect if certain toolchains are not activated. If the Licensing Helper is displayed after completing the Setup Environment wizard, follow the instructions to activate the toolchain.C8051F326/73.1. Running BlinkyEach project has its own source files, target configuration, SDK configuration, and build configurations such as the Debug and Release build configurations. The IDE can be used to manage multiple projects in a collection called a workspace. Workspace settings are applied globally to all projects within the workspace. This can include settings such as key bindings, window preferences, and code style and formatting options. Project actions, such as build and debug are context sensitive. For example, the user must select a project in the Project Explorer view in order to build that project.To create a project based on the Blinky example:1. Click the Software Examples tile from the Simplicity Studio home screen.2. In the Kit drop-down, select C8051F326 Development Kit , in the Part drop-down, select C8051F326, and in the SDK drop-down, select the desired SDK. Click Next .3. Select Example and click Next .4. Under C8051F326 Development Kit in the Blinky folder, select F326-7 BlinkyC and click Next , then Finish .5. Click on the project in the Project Explorer and click Build , the hammer icon in the top bar. Alternatively, go to Project →Build Project .6. Click Debug to download the project to the hardware and start a debug session.7. Press the Resume button to start the code running. The LED should blink.8. Press the Suspend button to stop the code.9. Press the Reset the devicebutton to reset the target MCU.10. Press the Disconnect button to return to the development perspective.3.2. Simplicity Studio HelpSimplicity Studio includes detailed help information and device documentation within the tool. The help containsdescriptions for each dialog window. To view the documentation for a dialog, click the question mark icon in the window:This will open a pane specific to the dialog with additional details.The documentation within the tool can also be viewed by going to Help →Help Contents or Help →Search .C8051F326/74. Target BoardThe C8051F326/7 Development Kit includes a target board with a C8051F326 device pre-installed for evaluation and preliminary software development. Numerous input/output (I/O) connections are provided to facilitate prototyp-ing using the target board. Refer to Figure3 for the locations of the various I/O connectors.P1Power connector (accepts input from 7 to 15 VDC unregulated power adapter)J122-pin Expansion I/O connectorJ2Power Target Board from power adapter at P1J3Port I/O Configuration connectorJ4DEBUG connector for Debug Adapter interfaceJ5DB-9 connector for UART0 RS232 interfaceJ7VIO to VDD connectorJ8USB Debug Adapter target board power connectorJ9USB connector for USB interfaceJ10External CMOS oscillator connectorJ11Power Target Board from USB at J9Figure3.C8051F326 Target BoardC8051F326/74.1. System Clock SourcesThe C8051F326 device installed on the target board features a calibrated programmable internal oscillator which is enabled as the system clock source on reset. After reset, the internal oscillator operates at a frequency of 1.5MHz (±1.5%) by default but may be configured by software to operate at other frequencies. Therefore, in many applica-tions an external oscillator is not required. However, if you wish to operate the C8051F326 device at a frequency not available with the internal oscillator, an external CMOS oscillator may be used. Refer to the C8051F326/7 datasheet for more information on configuring the system clock source.The target board is designed to facilitate the installation of an external CMOS oscillator. Remove shorting block at header J10 and connect the oscillator output to the header. Refer to the C8051F326/7 datasheet for more informa-tion on the use of external oscillators.4.2. Switches and LEDsThree switches are provided on the target board. Switch S1 is connected to the /RST pin of the C8051F326. Press-ing S1 puts the device into its hardware-reset state. Switches S2 and S3 are connected to the C8051F326’s gen-eral purpose I/O (GPIO) pins through headers. Pressing S2 or S3 generates a logic low signal on the port pin. Remove the shorting blocks from the header to disconnect S2 and S3 from the port pins. The port pin signals are also routed to pins on the J1 I/O connector. See Table1 for the port pins and headers corresponding to each switch.Three LEDs are also provided on the target board. The red LED labeled PWR LED is used to indicate a power con-nection to the target board. The green surface mount LEDs labeled with port pin names are connected to the C8051F326’s GPIO pins through headers. Remove the shorting blocks from the header to disconnect the LEDs from the port pin. The port pin signals are also routed to pins on the J1 I/O connector. See Table1 for the port pins and headers corresponding to each LED.Table 1. Target Board I/O DescriptionsDescription I/O HeaderS1Reset noneS2P2.0J3[1–2]S3P2.1J3[3–4]Green LED (D4)P2.2J3[5–6]Green LED (D2)P2.3J3[7–8]Red LED PWR none4.3. Universal Serial Bus (USB) Interface (J9)A Universal Serial Bus (USB) connector (J9) is provided to facilitate connections to the USB interface on the C8051F326. Table2 shows the J9 pin definitions.Table 2. J9 USB Connector Pin DescriptionsPin #Description1VBUS2D–3D+4GND (Ground)C8051F326/74.4. Expansion I/O Connector (J1)The 22-pin Expansion I/O connector J1 provides access to all signal pins of the C8051F326 device. Pins for +3V, and digital ground are also available. A through-hole prototyping area is also provided. Each connection point is labeled indicating the signal available at the connection point. See Table3 for a list of pin descriptions for J1.Table 3. J1 Pin DescriptionsPin #Description Pin #Description1P0.012P2.32P0.113P2.43P0.214P2.54P0.315P3.05P0.416C2CK/RST6P0.517VREGIN7P0.618VIO8P0.719VBUS9P2.020VDD10P2.121+3VD11P2.222GND4.5. USB Self-powered ConfigurationThe C8051F326 target board can be powered from three different sources. The sources are the ac/dc adapter (P1), USB connection (J9), and the USB Debug adapter (J4). Only one power source should be enabled at any time. See Section 4.8. for infomation on using the USB Debug Adapter as a power source for the board.The C8051F326 target board can be configured as a self-powered USB device to take power from the USB cable at J9 instead of the ac/dc adapter connected at P1. To configure the target boards as a self-powered USB device, remove the shorting block from J2 and install on J11. (A shorting block should only be installed on J2 or J11, never both at the same time.) Install shorting blocks in the following manner:J2(ON) & J11(OFF) →Target Board is powered from the ac/dc Adapter (P1).J2(OFF) & J11(ON) →Target Board is powered from the USB connection (J9)Notes:•When the C8051F326 target board is self-powered from the USB connection (J9), the EC2 Serial Adapter is not powered from the target board. The EC2 Serial Adapter must be powered directly by connecting the ac/ dc adapter to the Serial Adapter’s dc power jack.•The RS232 Serial Interface (J5) cannot be used when powering the target board from the USB connection (J9).C8051F326/74.6. Target Board DEBUG Interface (J4)The DEBUG connector (J4) provides access to the DEBUG (C2) pins of the C8051F326. It is used to connect the Serial Adapter or the USB Debug Adapter to the target board for in-circuit debugging and Flash programming. Table4 shows the DEBUG pin definitions.Table 4. DEBUG Connector Pin DescriptionsPin #Description1+3VD(+3.3VDC)2, 3, 9GND (Ground)4C2D5/RST(Reset)6P3.07C2CK8Not Connected10USB Power4.7. Serial Interface (J5)A RS232 transceiver circuit and DB-9 (J5) connector are provided on the target board to facilitate serial connec-tions to UART0 of the C8051F326. The TX, RX, RTS and CTS signals of UART0 may be connected to the DB-9 connector and transceiver by installing shorting blocks on header J3.J3[9–10]- Install shorting block to connect UART0 TX (P0.4) to the transceiver.J3[11–12]- Install shorting block to connect UART0 RX (P0.5) to the transceiver.J3[13–14]- Install shorting block to connect UART0 RTS (P2.4) to the transceiver.J3[15–16]- Install shorting block to connect UART0 CTS (P2.5) to the transceiver.4.8. USB Debug Adapter Target Board Power Connector (J8)The USB Debug Adapter includes a connection to provide power to the target board. This connection is routed from J4[10] to J8[1]. Place a shorting block at header J8[2-3] to power the board directly from an ac/dc power adapter. Place a shorting block at header J8[1–2] to power the board from the USB Debug Adapter. Please note that the second option is not supported with either the EC1 or EC2 Serial Adapters.C8051F326/7C8051F326/7C8051F326/7D OCUMENT C HANGE L ISTRevision 0.1 to Revision 0.2⏹ Removed EC2 Serial Adapter from Kit Contents.⏹ Removed Section 2. Hardware Setup using an EC2 Serial Adapter. See RS232 Serial Adapter (EC2)User's Guide.⏹ Removed Section 8. EC2 Serial Adapter. See RS232 Serial Adapter (EC2) User's Guide.⏹ Removed Section 9. USB Debug Adapter. See USB Debug Adapter User's Guide.Revision 0.2 to Revision 0.3⏹ Updated "Software Setup‚" on page 2.DisclaimerSilicon Laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Laboratories reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Silicon Laboratories shall have no liability for the consequences of use of the information supplied herein. This document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. The products must not be used within any Life Support System without the specific written consent of Silicon Laboratories. A "Life Support System" is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant personal injury or death. Silicon Laboratories products are generally not intended for military applications. Silicon Laboratories products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons.Trademark InformationSilicon Laboratories Inc., Silicon Laboratories, Silicon Labs, SiLabs and the Silicon Labs logo, CMEMS®, EFM, EFM32, EFR, Energy Micro, Energy Micro logo and combinations thereof, "the world’s most energy friendly microcontrollers", Ember®, EZLink®, EZMac®, EZRadio®, EZRadioPRO®, DSPLL®, ISOmodem ®, Precision32®, ProSLIC®, SiPHY®, USBXpress® and others are trademarks or registered trademarks of Silicon Laboratories Inc. ARM, CORTEX, Cortex-M3 and THUMB are trademarks or registered trademarks of ARM Holdings. Keil is a registered trademark of ARM Limited. All other products or brand names mentioned herein are trademarks of their respective holders. Silicon Laboratories Inc.400 West Cesar ChavezAustin, TX 78701USAIoT Portfolio/IoT SW/HW /simplicity Quality /quality Support and Community 。

c8051F单片机开发工具使用及常见故障排除 V1.0

C8051F单片机开发工具使用及常见故障排除V1.0新华龙电子有限公司 1 目录1. 相关基本知识介绍及相关基本知识介绍及正确正确正确操作操作操作流程流程1.1. 调试器的作用与种类 1.2. 调试器接口1.3. 软件的种类与特色 1.4. 不同软件的不同设方法 1.4.1. IDE 1.4.2. KEIL1.5. 目标板接口 1.6. 连接流程2. 常见问题问答2.1. 软件问题2.1.1. 软件版本问题 2.1.2. 软件设置 2.2. 调试器问题 2.3. 目标板问题 2.4. USB 连接线问题 2.5. 10芯扁平线问题 2.6. 操作流程问题3. 使用特例4. 附件4.1. 调试器图片4.2. 软件下载及查找路径 4.2.1. IDE4.2.2. KEIL 环境下驱动 4.2.3. Flash Programming 4.2.4. Production Programmer 4.2.5. USB Reset4.3. 调试器接口描述 4.3.1. USB 接口 4.3.2. C2接口 4.3.3. JTAG 接口5. 其他其他：：版本更新说明新华龙电子有限公司2 调试器的正常使用，会涉及诸多因素，比如，上位机软件的设置恰当与否，调试器本身的状态良好与否，目标板接口电路正确与否，甚至包括USB 连线、10芯扁平线是否良好连接等，都会直接影响调试或下载工作是否能够正常进行。

图 1-1 调试器连接示意图本文以调试器为中心，详细介绍其使用及在使用过程中、与其相关的软件、目标板等，并以问答形式,重点列举了在使用过程中可能出现的故障以及故障的排除方法。

1 相关基本知识介绍及正确操作流程1.1. 调试器的作用与种类应用于C8051Fxxx MCU 的调试器，区别传统的仿真器，其可执行在线调试、在线编程、在线擦除代码等动作，除用于开发调试，也可用于生产下载。

作为资深代理商，新华龙电子有限公司前后共推出多种型号：U-PDC ，U-EC3，U-EC5,以及最近新推出的U-EC6等。

C8051F52x-53x开发指南

Rev. 0.2 12/07Copyright © 2007 by Silicon LaboratoriesC8051F52x-53x-DKC8051F52x-53x-DKC8051F52X -53X D EVELOPMENT K IT U SER ’S G UIDE1. Relevant DevicesThe C8051F52x-53x Development Kit is intended as a development platform for the microcontrollers in the C8051F52x-53x MCU family. The members of this MCU family are C8051F520, C8051F521, C8051F523,C8051F524, C8051F526, C8051F527, C8051F530, C8051F531, C8051F533, C8051F534, C8051F536 and C8051F537.Notes:The target board included in this kit is provided with two pre-soldered C8051F530-IT MCUs (TSSOP-20 package).Code developed on the C8051F530 can be easily ported to the other members of this MCU family. Refer to the C8051F52x-53x data sheet for the differences between the members of this MCU family.2. Kit ContentsThe C8051F52x-53x Development Kit contains the following items:•C8051F530 Target Board•C8051Fxxx Development Kit Quick-Start Guide•Silicon Laboratories IDE and Product Information CD-ROM. CD content includes:•Silicon Laboratories Integrated Development Environment (IDE)•Keil 8051 Development Tools (macro assembler, linker, evaluation ‘C’ compiler)•Source code examples and register definition files •Documentation•C8051F52x-53x Development Kit User’s Guide (this document)•AC to DC Power Adapter•USB Debug Adapter (USB to Debug Interface)•USB CableThe development kit target board contains two C8051530 microcontrollers that can communicate through a LIN network. One of the C8051F530 (U1) can also be connected to a CP2102 USB to UART bridge while the other one (U2) can be directly connected to two analog signals and a Voltage Reference Signal Input.The kit is provided with one USB Debug Adapter but the designer can add a second USB debug adapter so that both microcontrollers can have their firmware debugged at the same time using only one PC and two instances of the Silicon Labs IDE.C8051F52x-53x-DK2Rev. 0.23. Getting StartedAll software required to develop firmware and communicate with the target microcontroller is included in the CD-ROM. The CD-ROM also includes other useful software.Below is the software necessary for firmware development and communication with the target microcontroller:Silicon Laboratories Integrated Development Environment (IDE)Keil 8051 Development Tools (macro assembler, linker, evaluation C compiler)Other useful software that is provided in the CD-ROM includes the following:Configuration Wizard 2Keil uVision DriversCP210x USB to UART Virtual COM Port (VCP) Drivers3.1. Software InstallationThe included CD-ROM contains the Silicon Laboratories Integrated Development Environment (IDE), Keil software 8051 tools and additional documentation. Insert the CD-ROM into your PC’s CD-ROM drive. An installer will automatically launch, allowing you to install the IDE software or read documentation by clicking buttons on the Installation Panel. If the installer does not automatically start when you insert the CD-ROM, run autorun.exe found in the root directory of the CD-ROM. Refer to the ReleaseNotes.txt file on the CD-ROM for the latest information regarding known problems and restrictions. After installing the software, see the following sections for information regarding the software and running one of the demo applications.3.2. CP210x USB to UART VCP Driver InstallationThe C8051F530 target board includes a Silicon Laboratories CP2102 USB-to-UART Bridge Controller. Device drivers for the CP2102 need to be installed before PC software such as HyperTerminal can communicate with the target board over the USB connection. If the "Install CP210x Drivers" option was selected during installation, this will launch a driver “unpacker” utility.1.Follow the steps to copy the driver files to the desired location. The default directory is C:\SiLabs\MCU\CP210x.2.The final window will give an option to install the driver on the target system. Select the “Launch the CP210xVCP Driver Installer” option if you are ready to install the driver.3.If selected, the driver installer will now launch, providing an option to specify the driver installation location. Afterpressing the “Install” button, the installer will search your system for copies of previously installed CP210x Virtual COM Port drivers. It will let you know when your system is up to date. The driver files included in this installation have been certified by Microsoft.4.If the “Launch the CP210x VCP Driver Installer” option was not selected in step 3, the installer can be found inthe location specified in step 2, by default C:\SiLabs\MCU\CP210x\Windows_2K_XP_S2K3_Vista. At this location, run CP210xVCPInstaller.exe.5.To complete the installation process, connect the included USB cable between the host computer and the USBconnector (P1) on the C8051F530 target board. Windows will automatically finish the driver installation.Information windows will pop up from the taskbar to show the installation progress.6.If needed, the driver files can be uninstalled by selecting “Silicon Laboratories CP210x USB to UART Bridge(Driver Removal)” option in the “Add or Remove Programs” window.C8051F52x-53x-DKRev. 0.234. Software Overview4.1. Silicon Laboratories IDEThe Silicon Laboratories IDE integrates a source-code editor, a source-level debugger, and an in-system Flash programmer. See Section 6., "Using the Keil Software 8051 Tools with the Silicon Laboratories IDE‚" on page 6 for detailed information on how to use the IDE. The Keil Evaluation Toolset includes a compiler, linker, and assembler and easily integrates into the IDE. The use of third-party compilers and assemblers is also supported.4.1.1. IDE System RequirementsThe Silicon Laboratories IDE requirements:Pentium-class host PC running Microsoft Windows 2000 or newer. One available USB port.64 MB RAM and 40MB free HD space recommended.4.1.2. Third Party ToolsetsThe Silicon Laboratories IDE has native support for many 8051 compilers. The full list of natively supported tools is as follows: Keil IARRaisonance Tasking Hi-Tech SDCCThe demo applications for the C8051F530 target board are written to work with the Keil and SDCC toolsets.4.2. Keil Evaluation Toolset4.2.1. Keil Assembler and LinkerThe assembler and linker that are part of the Keil Demonstration Toolset are the same versions that are found in the full Keil Toolset. The complete assembler and linker reference manual can be found on-line under the Help menu in the IDE or in the “SiLabs\MCU\hlp ” directory (A51.chm).4.2.2. Keil Evaluation C51 C CompilerThe evaluation version of the C51 compiler is the same as the full version with the following limitation: (1) Maximum 4kB code generation. When installed from the CD-ROM, the C51 compiler is initially limited to a code size of 2kB,and programs start at code address 0x0800. Refer to the Application Note “AN104: Integrating Keil Tools into the Silicon Labs IDE" for instructions to change the limitation to 4kB, and have the programs start at code address 0x0000.C8051F52x-53x-DK4Rev. 0.24.3. Configuration Wizard 2The Configuration Wizard 2 is a code generation tool for all of the Silicon Laboratories devices. Code is generated through the use of dialog boxes for each of the device's peripherals.Figure1.Configuration Wizard 2 UtilityThe Configuration Wizard 2 utility helps accelerate development by automatically generating initialization source code to configure and enable the on-chip resources needed by most design projects. In just a few steps, the wizard creates complete startup code for a specific Silicon Laboratories MCU. The program is configurable to provide the output in C or assembly. For more information, refer to the Configuration Wizard 2 help available under the Help menu in Config Wizard 2.4.4. Keil uVision2 and uVision3 Silicon Laboratories DriversAs an alternative to the Silicon Laboratories IDE, the uVision debug driver allows the Keil uVision IDE to communicate with Silicon Laboratories on-chip debug logic. In-system Flash memory programming integrated into the driver allows for rapidly updating target code. The uVision IDE can be used to start and stop program execution, set breakpoints, check variables, inspect and modify memory contents, and single-step through programs running on the actual target hardware.C8051F52x-53x-DKRev. 0.255. Hardware Setup Using a USB Debug AdapterThe target board is connected to a PC running the Silicon Laboratories IDE via the USB Debug Adapter as shown in Figure 2.1.Connect the USB Debug Adapter to one of the DEBUG connectors on the target board (HDR1 or HDR2)with the 10-pin ribbon cable. The recommended connection is to the HDR1 (connected to U1) as this micro-controller can be connected to the CP2102 USB to UART bridge.2.Connect one end of the USB cable to the USB connector on the USB Debug Adapter.3.Connect the other end of the USB cable to a USB Port on the PC.4.Connect the ac/dc power adapter to power jack P5 on the target board.Notes:•Use theReset button in the IDE to reset the target when connected using a USB Debug Adapter.•Remove power from the target board and the USB Debug Adapter before connecting or disconnecting the ribbon cable from the target board. Connecting or disconnecting the cable when the devices have power can damage the device and/or the USB Debug Adapter.Figure 2.Hardware Setup using a USB Debug AdapterD2P1.4_B HDR4C8051F52x-53x-DK6Rev. 0.26. Using the Keil Software 8051 Tools with the Silicon Laboratories IDETo perform source-level debugging with the IDE, you must configure the Keil 8051 tools to generate an absolute object file in the OMF-51 format with object extensions and debug records enabled. You may build the OMF-51 absolute object file by calling the Keil 8051 tools at the command line (e.g. batch file or make file) or by using the project manager built into the IDE. The default configuration when using the Silicon Laboratories IDE project manager enables object extension and debug record generation. Refer to Application Note "AN104: Integrating Keil 8051 Tools into the Silicon Labs IDE" in the “SiLabs\MCU\Documentation\ApplicationNotes” directory for additional information on using the Keil 8051 tools with the Silicon Laboratories IDE.To build an absolute object file using the Silicon Laboratories IDE project manager, you must first create a project.A project consists of a set of files, IDE configuration, debug views, and a target build configuration (list of files and tool configurations used as input to the assembler, compiler, and linker when building an output object file).The following sections illustrate the steps necessary to manually create a project with one or more source files, build a program and download the program to the target in preparation for debugging. (The IDE will automatically create a single-file project using the currently open and active source file if you select Build/Make Project before a project is defined.)6.1. Creating a New Project1.Select Project→New Project to open a new project and reset all configuration settings to default.2.Select File→New File to open an editor window. Create your source file(s) and save the file(s) with arecognized extension, such as .c, .h, or .asm, to enable color syntax highlighting.3.Right-click on “New Project” in the Project Window. Select Add files to project. Select files in the file browserand click Open. Continue adding files until all project files have been added.4.For each of the files in the Project Window that you want assembled, compiled, and linked into the target build,right-click on the file name and select Add file to build. Each file will be assembled or compiled as appropriate (based on file extension) and linked into the build of the absolute object file.Note:If a project contains a large number of files, the “Group” feature of the IDE can be used to organize. Right-click on “New Project” in the Project Window. Select Add Groups to project. Add pre-defined groups or add customized groups.Right-click on the group name and choose Add file to group. Select files to be added. Continue adding files until all project files have been added.6.2. Building and Downloading the Program for Debugging1.Once all source files have been added to the target build, build the project by clicking on the Build/MakeProject button in the toolbar or selecting Project→Build/Make Project from the menu.Note: After the project has been built the first time, the Build/Make Project command will only build the files that have been changed since the previous build. To rebuild all files and project dependencies, click on the Rebuild All button in the toolbar or select Project→Rebuild All from the menu.2.Before connecting to the target device, several connection options may need to be set. Open the ConnectionOptions window by selecting Options→Connection Options . . . in the IDE menu. First, select theappropriate adapter in the “Serial Adapter” section. Next, the correct “Debug Interface” must be selected.C8051F52x-53x family devices use the Silicon Labs 2-wire (C2) debug interface. Once all the selections are made, click the OK button to close the window.3.Click the Connect button in the toolbar or select Debug→Connect from the menu to connect to the device.4.Download the project to the target by clicking the Download Code button in the toolbar.Note: To enable automatic downloading if the program build is successful, select Enable automatic connect/ download after build in the Project→Target Build Configuration dialog. If errors occur during the build process, the IDE will not attempt the download.5.Save the project when finished with the debug session to preserve the current target build configuration, editorsettings, and the location of all open debug views. To save the project, select Project→Save Project As . . .from the menu. Create a new name for the project and click on Save.C8051F52x-53x-DKRev. 0.277. Example Source CodeExample source code and register definition files are provided in the “SiLabs\MCU\Examples\C8051F52x_53x ”directory during IDE installation. These files may be used as a template for code development. Example applications include a blinking LED example which configures the green LED on the target board to blink at a fixed rate.7.1. Register Definition FilesRegister definition files, C8051F530.inc and C8051F530.h , define all SFR registers and bit-addressable control/status bits. They are installed into the “SiLabs\MCU\Examples\C8051F52x_53x ” directory during IDE installation.The register and bit names are identical to those used in the C8051F52x-53x data sheet. Both register definition files are also installed in the default search path used by the Keil Software 8051 tools. Therefore, when using the Keil 8051 tools included with the development kit (A51, C51), it is not necessary to copy a register definition file to each project’s file directory.7.2. Blinking LED ExampleThe example source files, blink.asm and blinky.c , show examples of several basic C8051F52x-53x functions.These include: disabling the watchdog timer (WDT), configuring the Port I/O crossbar, configuring a timer for an interrupt routine, initializing the system clock, and configuring a GPIO port. When compiled/assembled and linked,this program flashes the green LED on the C8051F530 target board associated with the microcontroller about five times a second using the interrupt handler with a C8051F530 timer.C8051F52x-53x-DK8Rev. 0.28. Target BoardThe C8051F52x-53x Development Kit includes a target board with two C8051F530 devices pre-installed for evaluation and preliminary software development. Numerous input/output (I/O) connections are provided to facilitate prototyping using the target board. Refer to Figure3 for the locations of the various I/O connectors.P5Power connector (Accepts input from 7 to 15 VDC unregulated power adapter.)D3RED Power-on LEDTB1LIN connectorJ124-pin Expansion I/O connector for U2 (side A)HDR1Debug connector for Debug Adapter Interface (side A - U2)P1USB connector to serial interface (CP2102)D1Green LED (side A, U2), P1.3-AReset_A Reset button (side A, U2)P1.4_A Push button (side A, U2)HDR3Connector block for serial port connection, Green LED, and push-button Side AJ7Power connection block selection for the CP2102T1LIN transceiver (side A - U2)U2C8051F530 side AJ224-pin Expansion I/O connector for U1 (side B)HDR2Debug connector for Debug Adapter Interface (side B - U1)P1.4-B Push button (Side B, U1)J5VREFIN connector blockT2LIN transceiver (side B - U1)Reset_B Reset button (side B, U1)U1C8051F530 side BTB2Analog input connectorHDR4Green LED and push-button connector block, Side BD2Green LED (side B, U1), P1.3_BJ3Channel 1, P1.6_B connector blockJ4Channel 2, P1.7_B connector blockD2C8051F52x-53x-DKRev. 0.298.1. System Clock SourcesThe C8051F530 device installed on the target board features a calibrated programmable internal oscillator which is enabled as the system clock source on reset. After reset, the internal oscillator operates at a frequency of 3.0625MHz (±0.5%) by default but may be configured by software to operate at other frequencies. Therefore, in many applications an external oscillator is not required. However, if you wish to operate the C8051F530 device at a frequency not available with the internal oscillator, an external crystal may be used. Refer to the C8051F52x-53x data sheet for more information on configuring the system clock source.The target board is designed to facilitate the installation of external crystals. Install the crystals at the pads marked Y1 or Y2. Install a 10M Ω resistor at R17 or R22 and install capacitors at (C29 and C30) or (C34 and C35) using values appropriate for the crystals you select. Refer to the C8051F52x-53x data sheet for more information on the use of external oscillators.8.2. Switches and LEDsFour switches are provided on the target board.Switch RESET_A is connected to the RESET pin of the C8051F530 A-Side (U2).Switch RESET_B is connected to the RESET pin of the C8051F530 B-Side (U1).Pressing RESET_A or RESET_B puts the attached device into its hardware-reset state.Switches P1.4_A and P1.4_B are connected to the C8051F530 parts (U1 and U2) general purpose I/O (GPIO) pins through headers. Pressing P1.4_A or P1.4_B generates a logic low signal on the port pin of the respective microcontroller.Remove the shorting block from the header to disconnect P1.4_A or P1.4_B from the port pins. The port pin signals are also routed to pins on the J1 and J2 I/O connectors. See Table 1 for the port pins and headers corresponding to each switch.Three LEDs are also provided on the target board. The red LED labeled WR is used to indicate a power connection to the target board. The green LEDs labeled D1 and D2 are connected to the C8051F530's GPIO pins through headers. Remove the shorting blocks from the headers to disconnect the LEDs from the port pins. The port pin signals are also routed to pins on the J1 and J2 I/O connectors. See Table 1 for the port pins and headers corresponding to each LED.Table 1. Target Board I/O Descriptions DescriptionI/OHeaderReset_A U2-Reset none Reset_B U1-Reset none P1.4_A U2-P1.4HDR3[3–4]P1.4_B U1-P1.4HDR4[3–4]Green LED D1U2-P1.3HDR3[1–2]Green LED D2U1-P1.3HDR4[1–2]Red LEDPWRnoneC8051F52x-53x-DK10Rev. 0.28.3. Expansion I/O Connectors (J1, J2)The two 24-pin Expansion I/O connectors J1 and J2 provide access to all signal pins of the C8051F530 devices.Pins for V DD , GND, 5V, Reset, Vbat, LIN, 3.3V and Vrefin are also available. A small through-hole prototypingarea is also provided.All I/O signals routed to connectors J1 and J2 are also routed to through-hole connection points between J1 and J2and the prototyping area (see Figure 3 on page 8). Each connection point is labeled indicating the signal availableat the connection point. See Table 2 for a list of pin descriptions for J1 and J2.8.4. Target Board DEBUG Interface (HDR1, HDR2)The DEBUG connectors (HDR1 and HDR2) provide access to the DEBUG (C2) pins of the C8051F530 parts. Theyare used to connect the USB Debug Adapter to the target board for in-circuit debugging and Flash programming.Table 3 shows the DEBUG pin definitions.Table 2. Pin Descriptions for J1 and J2J1J2Pin #Description Pin #Description Pin #Description Pin #Description 1P0.0_A 13P1.4_A 1P0.0_B 13P1.4_B 2P0.1_A 14P1.5_A 2P0.1_B 14P1.5_B 3P0.2_A 15P1.6_A 3P0.2_B 15P1.6_B 4P0.3_A 16P1.7_A 4P0.3_B 16P1.7_B 5P0.4_A 17+5V 5P0.4_B 17+5V 6P0.5_A 18RST/C2CLK_A6P0.5_B 18RST/C2CLK_B7P0.6_A 19VBAT 7P0.6_B 19VBAT 8P0.7_A 20LIN 8P0.7_B 20LIN 9P1.0_A 21+3.3V 9P1.0_B 21VREFIN 10P1.1_A 22V DD of U110P1.1_B 22V DD of U211P1.2_A 23GND 11P1.2_B 23GND 12P1.3_A24GND12P1.3_B24GNDTable 3. DEBUG Connector Pin DescriptionsPin #Description 1+3VD (+3.3VDC)2, 3, 9GND (Ground)4C2D 5/RST (Reset)6P3.07C2CK 8Not Connected 10USB Power8.5. USB to Serial Connector (P1)A USB-to-Serial bridge interface is provided. AB type connector (P1), a CP2102, and related circuits are provided to facilitate the serial connection between a PC and one of the C8051F530 (U2) microcontrollers on the target board. The RX, TX, CTS, and RTS signals of the UART side of the Bridge (CP2102) may be connected to the microcontroller by installing shorting blocks on HDR3 as follows:The selection of a power source for the CP2102 is made through the J7 header. The option between BUS-Powered and SELF-Powered is selected as follows:The BUS-Powered option allows the CP2102 to use the 5V provided by the USB interface while the SELF-Powered option allows the CP2102 to use the 5V supply from the target board.8.6. Analog I/O (TB2)The Analog connector block (TB2) provides Analog inputs to the C8051F530 (U1) as follows:8.7. Power Supply OptionsThe target board provides two options of power supply. The first option is to use the provided 9V power supply attached to the P5 connector. The second option is to use an external 12V (7.5V minimum) connected to the TB1(pins 1 and 3).Table 4. UART ConnectionsHDR3ConnectionSignals 5–6P0.4_A_TX to TX_A 7–8P0.4_A_RX to RX_A 9–10P1.1_A to RTS_A 11–12P1.2_A to CTS_ATable 5. CP210x Power ConnectionsJ7ConnectionSignals 1–2BUS-Powered 2–3SELF_PoweredTable 6. Analog I/O ConnectionsTB2Signal ConnectionI/O Shorting BlockVrefin External Reference Input or InternalReference OutputP0.0_B J5CH1Analog Input 1P1.6_B_MC J3CH2Analog Input 1P1.7_B_MCJ4GNDGroundGND-9. SchematicsF i g u r e 4.C 8051F 52x -53x S c h e m a t i c (1 o f 3)D OCUMENT C HANGE L ISTRevision 0.1 to Revision 0.2Added Relevant Devices section.Section 2 moved to Section 5.Changed section 3 to "Getting Started."Updated section 3 to include latest VCP driver installation instructions.Changed section 4 to "Software Overview."Updated Evaluation Compiler restrictions in section4.2.2.Added overview of Configuration Wizard 2 and Keil uVision Drivers to section 4.Created new section 6.C ONTACT I NFORMATIONSilicon Laboratories Inc.400 West Cesar ChavezAustin, TX 78701Tel: 1+(512) 416-8500Fax: 1+(512) 416-9669Toll Free: 1+(877) 444-3032Email: MCUinfo@Internet: The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, rep-resentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per-sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap-plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders.。

C8051F040中文数据手册

1. 系统概论C8051 F04X 系列单片机是集成在一块芯片上的混合信号系统级单片机，分64个I/O端口管脚（如C8051F040/2)或者32个I/O端口管脚（如C8051F041/3）两类，同时有一个CAN2.0B 集成控制器。

其最突出的特征见下表，涉及的主要设备特征在1.1中详解.. 25MIPS高速流水线式CIP-51控制器内核. CAN2.0B 控制对应的有32个信息对象,且每一个都有它自己的屏蔽位。

在系统，全速,非插入式调试接口. 有12位的ADC（C8051F040/1）或10位的ADC（C8051F042/3)，带有PGA和模拟复用开关. 对于12位的ADC（峰峰值为60伏)的高压差分放大输入可通过编程得到. 有8位的多通道DAC，带有PGA和模拟复用开关。

有两个12位DAC，通过编程更新时序. 64KB的可编程FLASH存储器. RAM可存储4352(4096+256)字节。

外部内存接口可寻址64K字节. SPI，SMBus/I2C和(2）UART串行接口通过硬件实现。

5个16位通用定时器。

可编程计数/定时阵列有6个捕捉/比较模块. 片内有看门狗定时器，VDD监视器，温度传感器由于有片内VDD监视器，看门狗定时器和时钟震荡器，C8051F04X系列单片机称得上是真正独立的片上系统。

通过使用软件可以用程序很好的管理模拟和数字外设FLASH存储器甚至还有在系统重新编程能力,可提供非易失数据存储,并允许现场更新8051程序。

片内JTAG调试支持功能允许对安装在最终应用系统上的单片机进行非侵入失式（不占用片内资源）,全速在系统调试。

该调试系统支持和修改存储器和寄存器，支持断点,观察点，单步及运行和停机命令。

在使用JTAG调试时所有的模拟和数字外设都可全功能运行。

每个单片机都可在工业温度范围—45—+85℃内采用2。

7伏到3.6V 的工作电压,端口I/O,/RST和JTAM引脚允许5V的输入信号电压。

Silicon Laboratories C8051F系列FLASH安全用户指南说明书

Rev. 1.1 12/03Copyright © 2003 by Silicon LaboratoriesAN1201. Relevant DevicesThis application note applies to the following devices:C8051F000, C8051F001, C8051F002, C8051F005,C8051F006, C8051F010, C8051F011, C8051F012,C8051F015, C8051F016, C8051F017, C8051F206,C8051F220, C8051F221, C8051F226, C8051F230,C8051F231, and C8051F236.IntroductionSilicon Labs Integrated Devices feature in-system programmable FLASH memory for convenient,upgradable code storage. The FLASH may be pro-grammed via the JTAG interface or by application code for maximum flexibility. Proprietary informa-tion in the form of code and constants are often stored in FLASH memory. Silicon Labs provides security options at the disposal of the designer to prevent unauthorized access to information stored in FLASH memory.Silicon Labs integrated devices provide FLASHsecurity options to:1.Prevent unauthorized access of intellectualproperty in the form of code and constants stored in FLASH.2.Prevent inadvertent modification of code by the end-user.3.Prevent code modification due to abnormal sys-tem conditions (e.g., low-voltage supply condi-tions to the device).Silicon Labs devices offer security options to pre-vent unauthorized access of the FLASH via the JTAG port and application software loaded by the end-user. FLASH Program Memory Security Bytes are used to prevent access via the JTAG interface,and a Software Read Limit (available on most Sili-con Labs devices) is to prevent unauthorized accessthrough application software. This application notediscusses the operation and use of the FLASH security options.Key Points•FLASH memory can be protected from access across the JTAG interface by setting bits in the FLASH Security Bytes to ‘0’.•FLASH memory can also be protected from read accesses by software by setting a Software Read Access Limit. (Used to allow the end-user to access some portions of FLASH memory.)•FLASH memory protected from software access should also be protected from JTAG access using the FLASH Security Bytes.•When protecting FLASH, the FLASH page containing the FLASH Security Bytes should also be protected. (FLASH cannot be unlocked using software).•If the end-user does not need access to FLASH memory, the entire FLASH memory can be protected by simply locking the entire FLASH memory from JTAG access (Software Read Limit is not needed in this case as the end-user cannot download software to access proprietary information).AN1202Rev. 1.1Preventing FLASH Access Via the JTAG Interface.One of the two ways to read, write, and erase the FLASH memory is via the JTAG interface (see application note “AN005 - Programming FLASH Through the JTAG Interface”.) The FLASH Pro-gram Memory Security Bytes located in the FLASH memory are used to prevent both read and/or write/ erase operations of any or all of the 512-byte mem-ory blocks via the JTAG interface.The FLASH security bytes are located in the FLASH memory as shown in Figure1 and Figure2 below. To protect a FLASH memory block from unauthorized read or write/erase operations across the JTAG interface, refer to the memory block chart (also located in each device’s data sheet). Attempting a read operation on a byte in a read-locked sector will return a value of ‘0’ and will set the FAIL bit in the FLASHDAT register to ‘1’, indicating a FLASH operation failure. (Please seeFigure 1. FLASH Security Bytes The C8051F0xx Family of Devices Figure 2. FLASH Security Bytes For The C8051F2xx Family of DevicesAN120application note, “AN005 - Programming FLASH Through the JTAG Interface” for more information about how to read FLASH data via the JTAG inter-face). Clearing a bit to logic ‘0’ in the Read Lock Byte will prevent the corresponding block of FLASH memory from being read via the JTAG interface.Attempting a write or erase operation on a byte in a write/erase-locked sector will be ignored and will set the FAIL bit in the FLASHDAT register to ‘1’indicating a FLASH operation failure. Clearing a bit to logic 0 in the write/erase lock byte will pre-vent the corresponding block of FLASH memory from write/erase operations via the JTAG interface.Clearing an entire security byte to 0x00 will protect the entire FLASH code space from that respective operation across the JTAG interface.NOTE: The FLASH Security bytes prevent access via JTAG only -- software can still access JTAG locked blocks! To prevent unauthorized access, the application should lock the entire FLASH memory. Locking all memory bytes will prevent an end-user from downloading code to unlocked memory space and using software to access information in the locked space. If an appli-cation must leave some memory unlocked, but the designer still wants to prevent access to some FLASH memory, the FLASH Access Limit feature should be used in conjunction with the security bytes. In an application that locks some blocks of FLASH memory yet leaves some blocks unlocked for the end-user, the block containing security bytes should always be write/erase locked to prevent unlocking the protected FLASH by erasing the FLASH page containing the security bytes.Device ErasePerforming a JTAG erase operation using the address of either the read lock byte or erase/write lock byte will automatically initiate erasure of the entire FLASH program space (with the exception of the RESERVED area.) This can only be per-formed via the JTAG interface, and not by soft-ware . If software attempts to erase any byte in the FLASH page containing the lock bytes, the erase operation is ignored. If a non-security byte in the memory block that contains the FLASH security bytes is addressed to perform a FLASH erase, only that 512-byte page will be erased (including the security bytes.)Preventing FLASH Access Via SoftwareNote: The Software Access Read Limit security option discussed in the following section is not available on the C8051F000/01/02 and C8051F010/11/12. In these devices, the entire FLASH user space should be read and write/erase locked using FLASH security bytes to protect intel-lectual property.Silicon Labs devices’ FLASH memory may be accessed via application software (see application note, “AN009 - Writing to FLASH from Applica-tion Code.”) This facilitates maximum flexibility in application design including the implementation of bootloading software, but does give a way for the end-user to access FLASH memory that has been locked from JTAG access (unless ALL of the FLASH memory is locked.) For this reason, Silicon Labs devices feature a FLASH access Software Read Limit to restrict access via downloaded appli-cation code. Used in conjunction with the security bytes to prevent JTAG access, the software read limit allows the application to prevent software access to some FLASH memory, while leaving some FLASH accessible to the end-user.The FLASH software access limit works as fol-lows. The designer defines an address as an access limit. FLASH memory from address 0x0000 up to and including the address defined as the software read limit is protected from software access. If code loaded into the FLASH above the software access limit address attempts to execute a MOVC instruction with a source address in the software read protected address space, a data value of 0x00AN1204Rev. 1.1will be returned. Code loaded into FLASH in the software protected space (below the FLACL boundary) is not restricted from executing. FLASH memory above the software access limit address boundary may be used as normal (i.e., read and write/erase operations may be performed by soft-ware), but may not write or erase code below the FLACL boundary. Thus, the application can protect code from unauthorized access, yet still leave FLASH memory usable to the end-user.NOTE: Software read protected FLASH should also be locked using the security bytes to prevent JTAG access to the protected memory blocks. (When locking only certain memory blocks, the memory block containing the security bytes should always be locked from JTAG access as well to pre-vent the end-user from unlocking FLASH mem-ory.)Setting the Software Read Limit The software read limit is set using the FLASH Access Limit special function register (FLACL). The upper byte of the desired software access limit address (the highest address the designer wishes to have software access protection) is moved into the FLACL register. The lower byte of the address will be 0x00. (See Figure3 below.) Thus, if the FLACL register is assigned the value 0x40, then the software access limit address will be 0x4000. Thus, all code in memory from 0x0000 to 0x4000 (including 0x4000) will not be accessible via software executing above this address. Code executing above the FLACL boundary may per-form jump and call instructions into protected memory space below the FLACL boundary. Only MOVX and MOVC operations are prevented by the Software Read Limit. To prevent access, the FLASH Security Bytes should also be used to pre-vent JTAG access of the memory blocks at and below 0x4000 for total protection (see the previous section, “Preventing FLASH Access Via the JTAG Interface.)If the application does not require FLASH memory to be programmable for the end-user, then it is best to lock the entire FLASH memory using the secu-rity bytes, and the software access read limit is not needed (the end-user will not be able to download code to FLASH to access protected information.) FLASH Write and Erase Enable BitsOne function of FLASH security is to prevent inad-vertent modification of code. Silicon Labs FLASH write and erase operations cannot occur via soft-ware unless they are enabled using the Program Store Write Enable (PSWE) and Program Store Erase Enable (PSEE) bits. In order to write to the FLASH memory, the PSWE bit must be set to 1. When the PSWE bit is set to ‘1’, the MOVX instruction writes to FLASH memory instead of XRAM (the default target). In order to erase a page of FLASH memory, the PSEE and PSWE bits must be set to ‘1’. When the PSEE bit is set to ‘1’, theAN120 FLASH control logic interprets a FLASH writeoperation as an erase operation. The PSEE andPSWE bits aid in preventing inadvertent write anderase modifications when they are not intended. Ofcourse, this does not perform the function of pro-tecting intellectual property access by an unautho-rized end-user, as the PSWE and PSEE bits arealways accessible. Always use the software readaccess limit and/or FLASH security bytes for pro-tection of intellectual property.Silicon Laboratories Inc.400 West Cesar Chavez Austin, TX 78701USASimplicity StudioOne-click access to MCU and wireless tools, documentation, software, source code libraries & more. Available for Windows, Mac and Linux!IoT Portfolio /IoTSW/HW/simplicityQuality/qualitySupport and CommunityDisclaimerSilicon Labs intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Labs products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Labs reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Silicon Labs shall have no liability for the consequences of use of the information supplied herein. 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