苹果Q41A笔记本电脑图纸

U21 PG 31 +
RUN/SS
INRUSH LIMITER
PG 30
BUCK +24V_PBUS VCC REGULATOR
(LTC1625)
BACKLIGHT INVERTER
+PBUS (12.8V)
+5V_MAIN
VCC
MAIN 2.5V/1.5V DC/DC
(MAX1715) PG 35 PGOOD
CPU PLL Config
2:1 DDR MUXES
Connector
LVDS EDID (I2C)
S-VIDEO COMPOSITE TMDS RGB
(DDC TOO)
CPU
(MPC7457)
PMU J20/J23
J7
J17
J16
LCD Panel S-Video
DVI-I
Connector Connector Connector
BACKUP BATTERY
RC AT 1M*0.1UF @ 24V
CHARGER INPUT
STARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOW
SHUT-DOWN RUN
SLEEP RUN SHUT-DOWN
& BOOST OUTPUT
B
PG 32
NO INRUSH PROTECTION
RUN/SS - 3V
+3.3V_MAIN
SEQUENCING
1M & 0.1UF @14V, IT TAKES ~5.88MS TO START SWITCHER
1_5V_2_5V_OK
D3_HOT
1_5V_2_5V_OK WILL NOT PULL LOW UNTIL +5V_MAIN TURNS ON
0.1uF
20%
2
10V CERM
402
1 C103
0.1uF
20%
2
10V CERM
402
1 C110
0.1uF
20%
2
10V CERM
402
1 C190
0.1uF
20%
2
10V CERM
402
1 C189 R2061
0.1uF 470
20%
5%
2
10V CERM
1/16W MF
402
402 2
1 C72
8
7
6
5
4
3
2
1
J18
J24
J22
Ethernet Connector
FW - A Connector
FW - B Connector
SLEEP
LED
LMU
J25
J19
2 DATA PAIRS
D
4 DATA PAIRS
U49
Ethernet PHY
@ 200MHz
U28
FireWire PHY
2 DATA PAIRS @ 400MHZ
20%
2
6.3V CERM
805
1 C8
10uF
20%
2
6.3V CERM
805
1 C153
0.1uF
20%
2
10V CERM
402
5%
1 C223
0.1uF
20%
2
10V CERM
402
1 C91
0.1uF
20%
2
10V CERM
402
1 C114
0.1uF
20%
2
10V CERM
402
1 C104
USB PORT F
33MHZ
AGP BUS 1.5V/3.3V U43
32BITS 33MHZ 3.3V
B
INTRPEID
I2C
MAXBUS
1.8V
167MHZ
32BIT ADDRESS
MAXBUS
32BITS
MEMORY
MEMORY
J21
4X AGP
66MHZ
ATI M11
CH. A
CH. C
(INTERNAL MEM) (INTERNAL MEM)
NOT USED
USB PORT B USB PORT C USB PORT D
U44
INTREPID
VIA/PMU BOOTROM
J5 Serial Debug Connector
SERIAL 5V
J15
TRACKPAD Connector
Keyboard Connector
KB LED LIGHT SENSOR
1.9 MS
POWER BLOCK DIAGRAM
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
CPU_VCORE_SLEEP 5 6 34 38 39
CPU_VCORE DECOUPLING NETWORK
MAXBUS_SLEEP 5 7 8 15 16 23 34 38
CPU_OVDD DECOUPLING NETWORK
A
DDR SDRAM DIMM 0
A
DDR SDRAM DIMM 1 SO-DIMM Connector
SYSTEM BLOCK DIAGRAM
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
POWER SYSTEM ARCHITECTURE
D
AC
ADAPTER
IN
1V20_REF
>~13.44V TURNS-ON <~13.44V SHUTS-OFF
1625 NOT RUNNING
SHUTDOWN: RUNNING SLEEP: RUNNING RUN: RUNNING
RC AT 1M*0.047UF @ 24V
STARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOW
+5V_MAIN
DCDC_EN_L
SHUTDOWN: STOPPED SLEEP: RUNNING RUN: RUNNING
MAP31 DDR I/O MAP31 DDR CORE DDR POWER
+2.5V_MAIN
1_5V_2_5V_OK
+PBUS
DCDC_EN SLEEP
D
MAXBUS SEQUENCING
PG 31
14V_PBUS
+BATT
+3V_PMU LDO
+5V_MAIN
+3V_PMU
PG 32
AC: 12.8V NO AC: BATTERY VOLTAGE
AIRPOPT
B
DDR MEMORY
Connector
MEMORY BUS
64MB
MEMORY CH. B
MEMORY CH. D
64BIT DATA
2.5V
(INTERNAL MEM) (INTERNAL MEM)
167MHZ
J8
U42
U11/U12/U13/U14
64BITS
Inverter
APOLLO
+3V_MAIN +3V_SLEEP
3V_5V_OK
+2_5V_MAIN
~11MS ~13.5MS
2.4V - ??? MS
2.6 MS
+BATT
+2_5V_SLEEP +1_5V_MAIN
2.6 MS
3S 3P PRISMATIC CELLS
NO INRUSH PROTECTION
WHEN ONLY BATTERY IS CONNECTED
PG 20
SHUTDOWN: STOPPED
GPU_VCORE +1.2V/+1.0V
SLEEP: D3HOT/D3COLD
RUN: RUNNING
RUN: RUNNING
CPU_VCORE (+1.4V/+1.5V)
+PBUS
WHEN IT’S OPEN
D3_COLD
TURNS ON AS LOW AS 0.8V/TYP 1.5V
C
MAIN 3V/5V PGOOD DC/DC
(LTC3707) VCC PG 33 STBYMD
3V_5V_OK
HOLDS BOTH RUN/SS AT GND WHEN IT’S CONNECTED TO GND TURNS CONTROL TO RUN/SS
DCDC_EN SLEEP
(LTC1778)
1394 OHCI
ULTRA ATA/100
U39
3.3V 8BIT TX/RX
Connector
EIDE
U48/J2/J4
PMU
100MHZ
I2S I2C
Fan
I2C Circuit
J10
UIDE
J3 (SHARE WITH BLUETOOTH)
LEFT USB
ETHERNET
10/100/1000
SHDN
DC/DC (MAX1717)
PG 34
C
PG 32
+4_6V_BU
RUN/SS - 5V
TURNS ON AT >1V <100UA ALLOWED INTERNAL ZENER CLAMP TO 6V
+5V_MAIN
+PBUS (12.8V)
VCC
EXT_VCC
DC/DC
SHUTDOWN: STOPPED SLEEP: STOPPED
0.1UF
20%
2
10V CERM
402
1 C170
0.1UF
20%
2
10V CERM
402
+1_8V_SLEEP
1/16W MF 603
1_8V_MAXBUS
R693
0
1
2
38 34 23 16 15 8 7 5 MAXBUS_SLEEP
BATTERY CHARGER
(MAX1772) PG 31
DC/DC
(LTC3411) +1.8V_MAIN
PG 35 MAXBUS
SHUTDOWN: STOPPED SLEEP: STOPPED RUN: RUNNING
BROADCOM
DCDC_EN DCDC_EN_L
+5V_MAIN +5V_SLEEP
U17
BOOT ROM 1M X 8
U52
USB 2.0 CONTROLLER
CARDBUS Connector
33MHZ
16/32 BITS
C
3.3V/5V
U26
TI PCI1510 CardBus
Controller
USB PORT E
PCI
J9
32BITS
PCI BUS
Modem Board Connector
J11
OPTICAL DRIVE
Connector
J14
TUBA (SOUND)
Battery
Power Supply
Connector
& Charger
SMBUS
U36
SUTRO (PWR)
Connector
D
G/MII
J13
Connector
3.3V
LMU
I2C
3.3V 10/100/1000
8BIT TX 8BIT RX 125MHZ
WHEN ONLY BATTERY IS CONNECTED
+24V_PBUS
SLEEP SLEEP_L_LS5
B
BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V (UNTIL DRAINED)
SHUTDOWN: STOPPED
INTERNAL 1.2UA CURRENT SOURCE
SLEEP: RUNNING
GPU_VCORE
RUN/SS
BACKUP BATTERY
12.8V CHARGES BACKUP BATTERY
RUN: RUNNING
INTERNAL ZENER CLAMP TO 6V <100UA ALLOWED TURNS ON AT >1V
+1_5V_SLEEP
1_5V_MAXBUS
R702
0
1
2
MPC7447 PULL-UPS
R2411
470
5% 1/16W
MF 402 2
D
C25
10uF
20% 6.3V CERM
805
C342
10uF
20% 6.3V CERM
805
1 C344
10uF
20%
2
6.3Vபைடு நூலகம்CERM
805
1 C346
10uF
TURNS ON OUTPUT @ 2.4V
ON1/ON2
+1.5V_MAIN
INTREPID CORE AGP I/O
AFTER PMU IS UP AND RUNNING DCDC_EN_L WILL PULL ON1/ON2 LOW IN SHUTDOWN
+5V_MAIN
+5V_MAIN
VCC
0.1uF
20%
2
10V CERM
402
1 C48
0.1uF
20%
2
10V CERM
402
1 C38
0.1uF
20%
2
10V CERM
402
1 C74
0.1uF
20%
2
10V CERM
402
1 C275
0.1uF
20%
2
10V CERM
402
1 C46
0.1uF
20%
2
10V CERM
402
1 C47
+1_5V_SLEEP
1_5V_2_5V_OK
(MAX1715 OUTPUT)
A
BATTERY VOLTAGE FEED-IN PATH
+PBUS
1_5V_2_5V_OK
(AT LTC1778 RUN/SS)
GPU_VCORE
(D3HOT)
~???MS
A
GPU_VCORE
PG 31
(D3COLD)
+1_8V_MAIN
FIREWIRE UATA 100 EIDE
800 MB/S
NOT USED CARDSLOT I2S I2C
USB 2.0
C
J12
USB PORT A
SCCA
RIGHT USB
BACKUP BATTERY
NOT USED
USB 2.0
J3 (SHARE WITH LEFT USB)
BlueTooth
HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER DCDC_EN_L OR PMU_POWERUP_L BECOMES ’1’; MUCH LESS THAN THE RC CHARGING AT INT_VCC (5V)
DCDC_EN_L D3_HOT
24V IS OUTPUT ONLY FROM