基于DDS的数字移相信号发生器

基于DDS的数字移相信号发生器

摘要

频率源是雷达、通信、电子对抗与电子系统实现高性能指标的关键，很多现代电子设备和系统的功能都直接依赖于所用频率源的性能，因此频率源被人们喻为众多电子系统的“心脏”。而当今高性能的频率源均通过直接数字频率合成(DDS)技术来实现。

直接数字式频率合成技术DDS(Direct Digital Synthesis)是新一代的频率合成技术，它采用数字控制信号的相位增量技术，具有频率分辨率高，频率切换快，频率切换时相位连续和相位噪声低以及全数字化易于集成等优点。

本文首先对信号发生器以及DDS的发展和现状进行了归纳叙述。其次对DDS的原理及其输出信号的性能进行了分析。再次通过对系统的分析，总结归纳出了系统的硬件结构，硬件主要由FPGA芯片、数模转换电路、幅度调节电路、功率放大电路和输入、显示电路组成。采用FPGA实现了正弦信号发生器，信号发生器主要由累加器和ROM查询表组成，可由频率和相位控制字使信号发生器的输出改变。最后完成了软件和硬件的设计和调试，对实验样机进行了测试，结果显示的数据基本能够达到输出频率变化围在4.992kHz—1272.96kHz，输出幅度为1.8V—2.1V的设计要求。

关键词直接数字频率合成器；信号发生器；现场可编程门阵列

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Digital Phase Shifter Signal Generator Base on DDS

Abstract

The frequency source is the radar, the correspondence，the electronic countermeasure and the electronic system realization high performance target key, the very many modem electronic installation and the system function all directly relies on in uses the frequency source the performance，therefore the frequency source is explained by the people for the multitudinous electronic system” the heart”．But the high performance frequency source realizes now through the direct digital frequency synthesizes(DDS).

Direct digital synthesizing is a new frequency synthesizing technology, which adopts phase increment controled by digital. It has so many virtues such as high frequency resolving, fast frequency switching ability, continuous phase, low phase noise and integration easily for its digital operation.

This article first DDS signal generator, as well as the development and summarized description of the status quo. Second, the principle of the DDS output signal and its performance analyzed. Again through the system analysis, a summary of the system's hardware architecture, hardware mainly by the FPGA chip, digital-to-analog conversion circuit, the rate adjustment circuit, power amplifier circuit and input, display circuit. The use of FPGA realization of a sinusoidal signal generator, signal generator by the accumulator and ROM look-up table composed by the word frequency and phase control signal generator so that the output change. Finally completed the hardware and software design and debugging of the experimental prototype has been tested, the data the results showed shows that it is able to meet the design requirements of frequency range between 4.992kHz and 1272.96kHz and output range between 1.8V and 2.1V.

Keywords DDS；Signal Generating；FPGA

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目录

摘要……............................................................ I Abstract ........................................................... I I

第1章绪论 (1)

1.1 信号发生器技术 (1)

1.2 频率合成技术 (2)

1.2.1 频率合成技术概述 (2)

1.2.2 频率合成技术的发展 (2)

1.2.3 DDS研究现状及意义 (3)

1.3 FPGA在DDS技术实现 (4)

1.4 论文主要研究容 (5)

第2章 DDS技术 (6)

2.1 DDS频率合成的原理与结构 (6)

2.1.1 DDS的基本原理 (6)

2.1.2 DDS的结构 (7)

2.1.3 DDS的工作特点 (9)

2.2 DDS的频谱分析 (9)

2.3 DDS的杂散特性分析 (10)

2.3.1 相位截断产生的杂散 (10)

2.3.2 幅度量化产生的杂散 (12)

2.3.3 DAC转换误差产生的杂散 (12)

2.3.4 其他噪声源带来的杂散 (13)

2.4 DDS的优点和不足 (13)

2.5 本章小结 (14)

第3章信号发生器系统的硬件设计 (15)

3.1 系统硬件总体设计 (15)

3.2 FPGA芯片 (15)

3.3 数模转换电路 (17)

3.4 幅度调节电路 (19)

3.5 功率放大电路 (19)

3.6 时钟电路 (21)

3.7 电源电路 (21)

3.8 键盘输入电路 (22)

3.9 LED显示电路 (23)

3.10 电路抗干扰措施 (24)

3.11 本章小结 (25)

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