16位乘法器学习笔记(Verilog语言源程序+仿真程序)

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LCD1602显示源程序如下:

module lcd1602(input clk, //60M

input rst_n,

output lcd_p, //Backlight Source + lcd屏幕背光

output lcd_n, //Backlight Source -

output reg lcd_rs, //0:write order; 1:write data

output lcd_rw, //0:write data; 1:read data

output reg lcd_en, //negedge 在lcd_en下降沿需保证数据有效

output reg [7:0] lcd_data);

mux16

mul(.rst_n(rst_n),.clk(clk),.start(start),.ain(data0),.bin(data1),.yout(data2),.done(done));//端口名称关联

//--------------------lcd1602 order----------------------------

parameter Mode_Set = 8'h31, //功能设置,

Cursor_Set = 8'h0c, //光标设置

Address_Set = 8'h06, //输入模式设置

Clear_Set = 8'h01; //清屏设置

/****************************LCD1602 Display Data****************************/ wire [7:0] data_r0,data_r1,data_r2; //乘数、被乘数

wire [15:0]data0,data1; //结果显示

wire [31:0]data2;

wire [7:0] addr; //write address

wire start,done;

assign data_r0 = 8'h30 + data0[7:0] ; // 8'h30在LCD1602上显示值为0。

assign data_r1 = 8'h30 + data1[7:0] ;

assign data_r2 = 8'h30 + data2[7:0];

//-------------------address------------------

assign addr = 8'h80;

/****************************LCD1602 Driver****************************/

//-----------------------lcd1602 clk_en---------------------

reg [31:0] cnt;

reg lcd_clk_en;

always @(posedge clk or negedge rst_n)

begin

if(!rst_n)

begin

cnt <= 1'b0;

lcd_clk_en <= 1'b0;

end

else if(cnt == 32'h24999) //600us

begin

lcd_clk_en <= 1'b1;

cnt <= 1'b0;

end

else

begin

cnt <= cnt + 1'b1;

lcd_clk_en <= 1'b0;

end

end

//-----------------------lcd1602 display state-------------------------------------------

reg [6:0] state;

always@(posedge clk or negedge rst_n)

begin

if(!rst_n)

begin

state <= 1'b0;

lcd_rs <= 1'b0;

lcd_en <= 1'b0;

lcd_data <= 1'b0;

end

else if(lcd_clk_en)

begin

case(state)

//-------------------init_state---------------------

6'd0: begin

lcd_rs <= 1'b0;

lcd_en <= 1'b1;

lcd_data <= Mode_Set; //进入功能设置模式,“31”:数据总线8位,显示一行。6*7点阵/每字符

state <= state + 1'd1;

end

6'd1: begin

lcd_en <= 1'b0; //lcd_en变低电平,使led_en出现下降沿

state <= state + 1'd1;

end

6'd2: begin

lcd_rs <= 1'b0;

lcd_en <= 1'b1;

lcd_data <= Cursor_Set;//光标设置:光标右移一格,且AC值加1.

state <= state + 1'd1;

end

6'd3: begin

lcd_en <= 1'b0;

state <= state + 1'd1;

end

6'd4: begin

lcd_rs <= 1'b0;

lcd_en <= 1'b1;

lcd_data <= Address_Set;//模式设置:写入新数据后光标右移,AC自增1

state <= state + 1'd1;

end

6'd5: begin

lcd_en <= 1'b0;

state <= state + 1'd1;

end

6'd6: begin

lcd_rs <= 1'b0;

lcd_en <= 1'b1;

lcd_data <= Clear_Set;//清屏操作:0x01

state <= state + 1'd1;

end

6'd7: begin

lcd_en <= 1'b0;

state <= state + 1'd1;

end

//--------------------work state--------------------

6'd8: begin

lcd_rs <= 1'b0;

lcd_en <= 1'b1;

lcd_data <= addr; //write addr

state <= state + 1'd1;

end

6'd9: begin

lcd_en <= 1'b0;

state <= state + 1'd1;

end

6'd10: begin

lcd_rs <= 1'b1;

lcd_en <= 1'b1;

lcd_data <= "R"; //write data

state <= state + 1'd1;

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