Very Low Dropout Voltage (112 mV at Full Load, TPS79330)
L4931
1/29January 2004s VERY LOW DROPOUT VOLTAGE (0.4V)sVERY LOW QUIESCENT CURRENT(TYP .50µA IN OFF MODE,600µA IN ON MODE)s OUTPUT CURRENT UP TO 250mA sLOGIC-CONTROLLED ELECTRONIC SHUTDOWNsOUTPUT VOLTAGES OF 1.25;1.5;2.5;2.7;3;3.3;3.5;4;4.5;4.7;5;5.2;5.5;6;8;12V s INTERNAL CURRENT AND THERMAL LIMIT s ONLY 2.2µF FOR STABILITYsAVAILABLE IN ±1%(AB)OR 2%(C)SELECTION AT 25°CsSUPPLY VOLTAGE REJECTION:70db TYP .FOR 5V VERSIONsTEMPERATURE RANGE:-40TO 125°CDESCRIPTIONThe L4931series are very Low Drop regulators available in TO-220,SO-8,DPAK,PPAK and TO-92packages and in a wide range of output voltages.The very Low Drop voltage (0.4V)and the very low quiescent current make them particularly suitable for Low Noise,Low Power applications and specially in battery powered systems.In PPAK and SO-8packages a Shutdown Logic Control function is available TTL compatible.This means that when the device is used as a local regulator,it is possible to put a part of the board in standby,decreasing the total power consumption.It requires only a 2.2µF capacitor for stability allowing space and cost saving.L4931SERIESVERY LOW DROPVOLTAGE REGULATORS WITHINHIBITL4931SERIES2/29ABSOLUTE MAXIMUM RATINGSAbsolute Maximum Ratings are those values beyond which damage to the device may occur.Functional operation under these condition is not implied.THERMAL DATA(*)Considering 6cm 2of copper board heat-sinkCONNECTION DIAGRAM (top view)Symbol ParameterValue Unit V I DC Input Voltage 20VI O Output Current Internally Limited P tot Power DissipationInternally LimitedT stg Storage Temperature Range-40to 150°C T opOperating Junction Temperature Range-40to 125°C SymbolParameterTO-220SO-8DPAK PPAK TO-92Unit R thj-case Thermal Resistance Junction-case 32088°C/W R thj-amb Thermal Resistance Junction-ambient5055(*)100100200°C/WL4931SERIES3/29ORDERING CODES(*)Available on request.TO-220SO-8PPAK DPAK TO-92OUTPUT VOLTAGE L4931CV12(*)L4931CD12(*)L4931CPT12(*)L4931CDT12(*)L4931CZ12(*) 1.25V L4931ABV12(*)L4931ABD12(*)L4931ABPT12(*)L4931ABDT12(*)L4931ABZ12(*) 1.25V L4931CV15(*)L4931CD15(*)L4931CPT15(*)L4931CDT15(*)L4931CZ15(*) 1.5V L4931ABV15(*)L4931ABD15(*)L4931ABPT15(*)L4931ABDT15(*)L4931ABZ15(*) 1.5V L4931CV25(*)L4931CD25L4931CPT25(*)L4931CDT25L4931CZ25(*) 2.5V L4931ABV25(*)L4931ABD25L4931ABPT25(*)L4931ABDT25L4931ABZ25(*) 2.5V L4931CV27L4931CD27L4931CPT27L4931CDT27L4931CZ27 2.7V L4931ABV27L4931ABD27L4931ABPT27L4931ABDT27L4931ABZ27 2.7V L4931CV30L4931CD30L4931CPT30L4931CDT30L4931CZ303V L4931ABV30L4931ABD30L4931ABPT30L4931ABDT30L4931ABZ303V L4931CV33L4931CD33L4931CPT33L4931CDT33L4931CZ33 3.3V L4931ABV33L4931ABD33L4931ABPT33L4931ABDT33L4931ABZ33 3.3V L4931CV35L4931CD35L4931CPT35L4931CDT35L4931CZ35 3.5V L4931ABV35L4931ABD35L4931ABPT35L4931ABDT35L4931ABZ35 3.5V L4931CV40L4931CD40L4931CPT40L4931CDT40L4931CZ404V L4931ABV40L4931ABD40L4931ABPT40L4931ABDT40L4931ABZ404V L4931CV45(*)L4931CD45(*)L4931CPT45(*)L4931CDT45(*)L4931CZ45(*) 4.5V L4931ABV45(*)L4931ABD45(*)L4931ABPT45(*)L4931ABDT45(*)L4931ABZ45(*) 4.5V L4931CV47L4931CD47L4931CPT47L4931CDT47L4931CZ47 4.75V L4931ABV47L4931ABD47L4931ABPT47L4931ABDT47L4931ABZ47 4.75V L4931CV50L4931CD50L4931CPT50L4931CDT50L4931CZ505V L4931ABV50L4931ABD50L4931ABPT50L4931ABDT50L4931ABZ505V L4931CV52(*)L4931CD52(*)L4931CPT52(*)L4931CDT52(*)L4931CZ52(*) 5.2V L4931ABV52(*)L4931ABD52(*)L4931ABPT52(*)L4931ABDT52(*)L4931ABZ52(*) 5.2V L4931CV55(*)L4931CD55(*)L4931CPT55(*)L4931CDT55(*)L4931CZ55(*) 5.5V L4931ABV55(*)L4931ABD55(*)L4931ABPT55(*)L4931ABDT55(*)L4931ABZ55(*) 5.5V L4931CV60L4931CD60L4931CPT60L4931CDT60L4931CZ606V L4931ABV60L4931ABD60L4931ABPT60L4931ABDT60L4931ABZ606V L4931CV80L4931CD80L4931CPT80L4931CDT80L4931CZ808V L4931ABV80L4931ABD80L4931ABPT80L4931ABDT80L4931ABZ808V L4931CV120L4931CD120L4931CPT120L4931CDT120L4931CZ12012V L4931ABV120L4931ABD120L4931ABPT120L4931ABDT120L4931ABZ12012VL4931SERIES4/29TEST CIRCUITSELECTRICAL CHARACTERISTICS OF L4931ABxx12(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.SymbolParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =3.3V 1.238 1.251.263VI O =5mA V I =3.3VT A =-25to 85°C1.225 1.275V I Operating Input Voltage I O =250mA2.520V I out Output Current Limit 300mA ∆V O Line Regulation V I =2.5to 20V I O =0.5mA 315mV ∆V O (*)Load Regulation V I =2.7V I O =0.5to 250mA 315mV I dQuiescent Current ON MODE V I =2.7to 20V I O =0mA 0.61mA V I =2.7to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =3.7±1V f =120Hz 80dBf =1KHz 77f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout Voltage I O =250mA 1.25V V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µFL4931SERIES5/29ELECTRICAL CHARACTERISTICS OF L4931Cxx12(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.ELECTRICAL CHARACTERISTICS OF L4931ABxx15(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.Symbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =3.3V 1.225 1.251.275VI O =5mA V I =3.3VT A =-25to 85°C1.2 1.3V I Operating Input Voltage I O =250mA2.520V I out Output Current Limit 300mA ∆V O Line Regulation V I =2.5to 20V I O =0.5mA 318mV ∆V O (*)Load Regulation V I =2.7V I O =0.5to 250mA 318mV I dQuiescent Current ON MODE V I =2.7to 20V I O =0mA 0.61mA V I =2.7to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =3.7±1V f =120Hz 80dBf =1KHz 77f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout Voltage I O =250mA 1.25V V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µFSymbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =3.5V 1.485 1.51.515VI O =5mA V I =3.5VT A =-25to 85°C1.47 1.53V I Operating Input Voltage I O =250mA2.520V I out Output Current Limit 300mA ∆V O Line Regulation V I =2.5to 20V I O =0.5mA 315mV ∆V O (*)Load Regulation V I =2.7V I O =0.5to 250mA 315mV I dQuiescent Current ON MODE V I =2.7to 20V I O =0mA 0.61mA V I =2.7to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =3.7±1V f =120Hz 79dBf =1KHz 76f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout Voltage I O =250mA 1V V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µFL4931SERIES6/29ELECTRICAL CHARACTERISTICS OF L4931Cxx15(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.ELECTRICAL CHARACTERISTICS OF L4931ABxx25(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.Symbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =3.5V 1.47 1.51.53VI O =5mA V I =3.5VT A =-25to 85°C1.44 1.56V I Operating Input Voltage I O =250mA2.520V I out Output Current Limit 300mA ∆V O Line Regulation V I =2.5to 20V I O =0.5mA 318mV ∆V O (*)Load Regulation V I =2.7V I O =0.5to 250mA 318mV I dQuiescent Current ON MODE V I =2.7to 20V I O =0mA 0.61mA V I =2.7to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =3.7±1V f =120Hz 79dBf =1KHz 76f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout Voltage I O =250mA 1V V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µFSymbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =4.5V 2.475 2.52.525VI O =5mA V I =4.5VT A =-25to 85°C2.452.55V I Operating Input Voltage I O =250mA20V I out Output Current Limit 300mA ∆V O Line Regulation V I =3.2to 20V I O =0.5mA 315mV ∆V O (*)Load Regulation V I =3.4V I O =0.5to 250mA 315mV I dQuiescent Current ON MODE V I =3.4to 20V I O =0mA 0.61mA V I =3.4to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =4.4±1V f =120Hz 75dBf =1KHz 72f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout VoltageI O =250mA 0.40.6V I O =250mAT J =-40to 125°C 0.8V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µFL4931SERIES7/29ELECTRICAL CHARACTERISTICS OF L4931Cxx25(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.ELECTRICAL CHARACTERISTICS OF L4931ABxx27(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.Symbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =4.5V 2.45 2.52.55VI O =5mA V I =4.5VT A =-25to 85°C2.42.6V I Operating Input Voltage I O =250mA20V I out Output Current Limit 300mA ∆V O Line Regulation V I =3.3to 20V I O =0.5mA 318mV ∆V O (*)Load Regulation V I =3.5V I O =0.5to 250mA 318mV I dQuiescent Current ON MODE V I =3.5to 20V I O =0mA 0.61mA V I =3.5to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =4.4±1V f =120Hz 75dBf =1KHz 72f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout VoltageI O =250mA 0.40.6V I O =250mAT J =-40to 125°C 0.8V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µFSymbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =4.7V 2.673 2.72.727VI O =5mA V I =4.7VT A =-25to 85°C2.6462.754V I Operating Input Voltage I O =250mA20V I out Output Current Limit 300mA ∆V O Line Regulation V I =3.4to 20V I O =0.5mA 315mV ∆V O (*)Load Regulation V I =3.6V I O =0.5to 250mA 315mV I dQuiescent Current ON MODE V I =3.6to 20V I O =0mA 0.61mA V I =3.6to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =4.6±1V f =120Hz 74dBf =1KHz 71f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout VoltageI O =250mA 0.40.6V I O =250mAT J =-40to 125°C 0.8V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µFL4931SERIES8/29ELECTRICAL CHARACTERISTICS OF L4931Cxx27(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified)..(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.ELECTRICAL CHARACTERISTICS OF L4931ABxx30(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.Symbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =4.7V 2.646 2.72.754VI O =5mA V I =4.7VT A =-25to 85°C2.5922.808V I Operating Input Voltage I O =250mA20V I out Output Current Limit 300mA ∆V O Line Regulation V I =3.4to 20V I O =0.5mA 318mV ∆V O (*)Load Regulation V I =3.6V I O =0.5to 250mA 318mV I dQuiescent Current ON MODE V I =3.6to 20V I O =0mA 0.61mA V I =3.6to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =4.6±1V f =120Hz 74dBf =1KHz 71f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout VoltageI O =250mA 0.40.6V I O =250mAT J =-40to 125°C 0.8V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µFSymbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =5V 2.9733.03VI O =5mA V I =5VT A =-25to 85°C2.943.06V I Operating Input Voltage I O =250mA20V I out Output Current Limit 300mA ∆V O Line Regulation V I =3.7to 20V I O =0.5mA 315mV ∆V O (*)Load Regulation V I =3.9V I O =0.5to 250mA 315mV I dQuiescent Current ON MODE V I =3.9to 20V I O =0mA 0.61mA V I =3.9to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =4.9±1V f =120Hz 74dBf =1KHz 71f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout VoltageI O =250mA 0.40.6V I O =250mAT J =-40to 125°C 0.8V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C O Output Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µFL4931SERIES9/29ELECTRICAL CHARACTERISTICS OF L4931Cxx30(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.ELECTRICAL CHARACTERISTICS OF L4931ABxx33(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.Symbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =5V 2.9433.06VI O =5mA V I =5VT A =-25to 85°C2.883.12V I Operating Input Voltage I O =250mA20V I out Output Current Limit 300mA ∆V O Line Regulation V I =3.8to 20V I O =0.5mA 318mV ∆V O (*)Load Regulation V I =4V I O =0.5to 250mA 318mV I dQuiescent Current ON MODE V I =4to 20V I O =0mA 0.61mA V I =4to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =5±1Vf =120Hz 74dBf =1KHz 71f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout VoltageI O =250mA 0.40.6V I O =250mAT J =-40to 125°C 0.8V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µFSymbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =5.3V 3.267 3.33.333VI O =5mA V I =5.3VT A =-25to 85°C3.2343.366V I Operating Input Voltage I O =250mA20V I out Output Current Limit 300mA ∆V O Line Regulation V I =4to 20V I O =0.5mA 315mV ∆V O (*)Load Regulation V I =4.2V I O =0.5to 250mA 315mV I dQuiescent Current ON MODE V I =4.2to 20V I O =0mA 0.61mA V I =4.2to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =5.2±1V f =120Hz 73dBf =1KHz 70f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout VoltageI O =250mA 0.40.6V I O =250mAT J =-40to 125°C 0.8V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µFL4931SERIES10/29ELECTRICAL CHARACTERISTICS OF L4931Cxx33(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.ELECTRICAL CHARACTERISTICS OF L4931ABxx35(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.Symbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =5.3V 3.234 3.33.366VI O =5mA V I =5.3VT A =-25to 85°C3.1683.432V I Operating Input Voltage I O =250mA20V I out Output Current Limit 300mA ∆V O Line Regulation V I =4.1to 20V I O =0.5mA 318mV ∆V O (*)Load Regulation V I =4.3V I O =0.5to 250mA 318mV I dQuiescent Current ON MODE V I =4.3to 20V I O =0mA 0.61mA V I =4.3to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =5.3±1V f =120Hz 73dBf =1KHz 70f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout VoltageI O =250mA 0.40.6V I O =250mAT J =-40to 125°C 0.8V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µFSymbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =5.5V 3.465 3.53.535VI O =5mA V I =5.5VT A =-25to 85°C3.433.57V I Operating Input Voltage I O =250mA20V I out Output Current Limit 300mA ∆V O Line Regulation V I =4.2to 20V I O =0.5mA 315mV ∆V O (*)Load Regulation V I =4.4V I O =0.5to 250mA 315mV I dQuiescent Current ON MODE V I =4.4to 20V I O =0mA 0.61mA V I =4.4to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =5.4±1V f =120Hz 73dBf =1KHz 70f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout VoltageI O =250mA 0.40.6V I O =250mAT J =-40to 125°C 0.8V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C O Output Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µF11/29ELECTRICAL CHARACTERISTICS OF L4931Cxx35(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.ELECTRICAL CHARACTERISTICS OF L4931ABxx40(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.Symbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =5.5V 3.43 3.53.57VI O =5mA V I =5.5VT A =-25to 85°C3.363.64V I Operating Input Voltage I O =250mA20V I out Output Current Limit 300mA ∆V O Line Regulation V I =4.3to 20V I O =0.5mA 318mV ∆V O (*)Load Regulation V I =4.5V I O =0.5to 250mA 318mV I dQuiescent Current ON MODE V I =4.5to 20V I O =0mA 0.61mA V I =4.5to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =5.5±1V f =120Hz 73dBf =1KHz 70f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout VoltageI O =250mA 0.40.6V I O =250mAT J =-40to 125°C 0.8V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µFSymbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =6V 3.9644.04VI O =5mA V I =6VT A =-25to 85°C3.924.08V I Operating Input Voltage I O =250mA20V I out Output Current Limit 300mA ∆V O Line Regulation V I =4.7to 20V I O =0.5mA 3.517.5mV ∆V O (*)Load Regulation V I =4.9V I O =0.5to 250mA 315mV I dQuiescent Current ON MODE V I =4.9to 20V I O =0mA 0.61mA V I =4.9to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =5.9±1V f =120Hz 72dBf =1KHz 69f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout VoltageI O =250mA 0.40.6V I O =250mAT J =-40to 125°C 0.8V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µF12/29ELECTRICAL CHARACTERISTICS OF L4931Cxx40(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.ELECTRICAL CHARACTERISTICS OF L4931ABxx45(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.Symbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =6V 3.9244.08VI O =5mA V I =6VT A =-25to 85°C3.844.16V I Operating Input Voltage I O =250mA20V I out Output Current Limit 300mA ∆V O Line Regulation V I =4.8to 20V I O =0.5mA 3.521mV ∆V O (*)Load Regulation V I =5V I O =0.5to 250mA 318mV I dQuiescent Current ON MODE V I =5to 20V I O =0mA 0.61mA V I =5to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =6±1Vf =120Hz 72dBf =1KHz 69f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout VoltageI O =250mA 0.40.6V I O =250mAT J =-40to 125°C 0.8V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µFSymbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =6.5V 4.455 4.54.545VI O =5mA V I =6.5VT A =-25to 85°C4.414.59V I Operating Input Voltage I O =250mA20V I out Output Current Limit 300mA ∆V O Line Regulation V I =5.2to 20V I O =0.5mA 3.517.5mV ∆V O (*)Load Regulation V I =5.4V I O =0.5to 250mA 315mV I dQuiescent Current ON MODE V I =5.4to 20V I O =0mA 0.61mA V I =5.4to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =6.4±1V f =120Hz 71dBf =1KHz 68f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout VoltageI O =250mA 0.40.6V I O =250mAT J =-40to 125°C 0.8V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C O Output Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µF13/29ELECTRICAL CHARACTERISTICS OF L4931Cxx45(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.ELECTRICAL CHARACTERISTICS OF L4931ABxx47(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.Symbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =6.5V 4.41 4.54.59VI O =5mA V I =6.5VT A =-25to 85°C4.324.68V I Operating Input Voltage I O =250mA20V I out Output Current Limit 300mA ∆V O Line Regulation V I =5.3to 20V I O =0.5mA 3.521mV ∆V O (*)Load Regulation V I =5.5V I O =0.5to 250mA 318mV I dQuiescent Current ON MODE V I =5.5to 20V I O =0mA 0.61mA V I =5.5to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =6.5±1V f =120Hz 71dBf =1KHz 68f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout VoltageI O =250mA 0.40.6V I O =250mAT J =-40to 125°C 0.8V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µFSymbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =6.7V 4.653 4.74.747VI O =5mA V I =6.7VT A =-25to 85°C4.6064.794V I Operating Input Voltage I O =250mA20V I out Output Current Limit 300mA ∆V O Line Regulation V I =5.4to 20V I O =0.5mA 3.517.5mV ∆V O (*)Load Regulation V I =5.6V I O =0.5to 250mA 315mV I dQuiescent Current ON MODE V I =5.6to 20V I O =0mA 0.61mA V I =5.6to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =6.6±1V f =120Hz 71dBf =1KHz 68f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout VoltageI O =250mA 0.40.6V I O =250mAT J =-40to 125°C 0.8V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µF14/29ELECTRICAL CHARACTERISTICS OF L4931Cxx47(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.ELECTRICAL CHARACTERISTICS OF L4931ABxx50(refer to the test circuits,T J =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified).(*)For SO-8package the maximum limit of load regulation and dropout is increased by 20mV.Symbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =6.7V 4.606 4.74.794VI O =5mA V I =6.7VT A =-25to 85°C4.5124.888V I Operating Input Voltage I O =250mA20V I out Output Current Limit 300mA ∆V O Line Regulation V I =5.5to 20V I O =0.5mA 3.521mV ∆V O (*)Load Regulation V I =5.7V I O =0.5to 250mA 318mV I dQuiescent Current ON MODE V I =5.7to 20V I O =0mA 0.61mA V I =5.7to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =6.7±1V f =120Hz 71dBf =1KHz 68f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout VoltageI O =250mA 0.40.6V I O =250mAT J =-40to 125°C 0.8V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µFSymbol ParameterTest Conditions Min.Typ.Max.Unit V O Output Voltage I O =5mA V I =7V 4.9555.05VI O =5mA V I =7VT A =-25to 85°C4.95.1V I Operating Input Voltage I O =250mA20V I out Output Current Limit 300mA ∆V O Line Regulation V I =5.8to 20V I O =0.5mA 3.517.5mV ∆V O (*)Load Regulation V I =6V I O =0.5to 250mA 315mV I dQuiescent Current ON MODE V I =6to 20V I O =0mA 0.61mA V I =6to 20V I O =250mA46OFF MODEV I =6V 50100µA SVRSupply Voltage RejectionI O =5mA V I =7±1Vf =120Hz 70dBf =1KHz 67f =10KHz 55eN Output Noise Voltage B =10Hz to 100KHz 50µV V d (*)Dropout VoltageI O =250mA 0.40.6V I O =250mAT J =-40to 125°C 0.8V IL Control Input Logic Low T A =-40to 125°C 0.8V V IH Control Input Logic High T A =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C O Output Bypass Capacitance ESR =0.1to 10ΩI O =0to 250mA210µF。
Richtek Technology 产品说明书:RT2519 低功耗线性电源
RT2519®Copyright 2018 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.©1A, Low Noise, Ultra High PSRR, Low-Dropout Linear RegulatorGeneral DescriptionThe RT2519 is a high performance positive low dropout (LDO) regulator designed for applications requiring very low dropout voltage and ultra high Power Supply Ripple Rejection (PSRR) at up to 1A. The input voltage range is from 2.2V to 6V and the output voltage is programmable as low as 0.8V. A P-MOSFET switch provides excellent transient response with just a 4.7μF ceramic output capacitor. The external enable control effectively reduces power dissipation while shutdown and further output noise immunity is achieved through bypass capacitor on NR pin.Additionally, the RT2519 features a precise 3% output regulation over line, load, and temperature variations. The device is available in the VDFN-8AL 3x3 package and is specified from −40°C to 125°C.Features●Very Low Dropout : 170mV Typical at 1A●Ultra High PSRR : 63dB @ 1kHz, 38dB @ 1MHz ●Input Voltage Range : 2.2V to 6V●Adjustable Output Voltage : 0.8V to 5.5V●−40°C to 125°C Operating Junction Temperature Range●Excellent Noise Immunity●Fast Response Over Load and Line Transient ●Stable with a 4.7μF Output Ceramic Capacitor ●Accurate Output Voltage 3% Over Load, Line,Process, and Temperature Variations ●Enable Control●Over-Current Protection●Over-Temperature ProtectionOrdering InformationSimplified Application CircuitApplications●T elecom/Networking Cards ●Motherboards/Peripheral Cards ●Industrial Applications ●Wireless Infrastructures ●Set-Top Boxes●Medical Equipments ●Notebook Computers●Battery Powered SystemsNote :***Empty means Pin1 orientation is Quadrant 1Richtek products are :❝ RoHS compliant and compatible with the current require-ments of IPC/JEDEC J-STD-020.❝ Suitable for use in SnPb or Pb-free soldering processes.VOUTRT2519G : Green (Halogen Free and Pb Free)***RT2519©Copyright 2018 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Functional Pin DescriptionFunctional Block DiagramPin Configuration(TOP VIEW)VDFN-8AL 3x3FB KN= : Product CodeYMDNN : Date CodeVOUT FB VOUT GNDVIN VIN ENNRRT2519©Copyright 2018 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.OperationThe RT2519 is a low noise, high PSRR LDO which supports very low dropout operation. The operating input range from 2.2V to 6V and the output voltage is programmable as low to 0.8V and the output current can be up to 1A. The internal compensation network is well designed to achieve fast transient response with good stability.In steady-state operation, the feedback voltage is regulated to the reference voltage by the internal regulator.When the feedback voltage signal is less than the reference, the output current passes through the power MOSFET will be increased. The extra amount of the current is sent to the output until the voltage level of FB pin returns to the reference.On the other hand, if the feedback voltage is higher than the reference, the power MOSFET current is decreased.The excess charge at the output can be released by the loading current.Start-UpThe RT2519 has a quick-start circuit to charge the noise reduction capacitor (C NR ). The switch of the quick-start circuit is closed at start up.To reduce the noise from bandgap, there is a low-pass (RC) filter consist of the C NR and the resistance which is connected with bandgap, as Functional Block Diagrams present.At the start-up, the quick-start switch is closed, with only 35k Ω resistance between bandgap and NR pin. The quick-start switch opens approximate 2ms after the device is enabled, the resistance between NR and bandgap is about 224k Ω to form a very good low pass filter and with great noise reduction performance.The 35k Ω resistance is used to slow down the reference voltage ramp to avoid inrush current at chip start-up, and the start-up time can be calculated as :t SS (sec) = 160000 x C NR (F) (1)It is recommend the C NR value larger than 0.01μF to reduce noise, and low leakage ceramic capacitors are suitable.However, with too large C NR will extend the start-up time very long if the C NR is not fully charged during 2ms andopens the quick-start switch, the C NR will be chargedthrough higher resistance 224k Ω and takes much longer time to finish the start up process.Enable and Shutdown OperationThe RT2519 goes into sleep mode when the EN pin is in a logic low condition. In this condition, the pass transistor,error amplifier, and bandgap are all turned off, reducing the supply current to only 2μA (max.). If the shutdown mode is not required, the EN pin can be directly tied to VIN pin to keep the LDO on.Current LimitThe RT2519 continuously monitors the output current to protect the pass transistor against abnormal operations.When an overload or short circuit is encountered, the current limit circuitry controls the pass transistor's gate voltage to limit the output within the predefined range. By reason of the build-in body diode, the pass transistor conducts current when the output voltage exceeds input voltage. Since the current is not limited, external current protection should be added if device may work at reverse voltage state.Over-Temperature Protection (OTP)The RT2519 has an over-temperature protection. When the device triggers the OTP , the device shuts down until the temperature back to normal state.Under Voltage Lock-Out (UVLO)The RT2519 utilizes an under voltage lock-out circuit to keep the output shut off until the internal circuitry is operating properly. The UVLO circuit has a de-glitch feature so that it typically ignores undershoot transients on the input if they are less than 30μs duration.RT2519©Copyright 2018 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Electrical Characteristics(V IN = V OUT + 0.5V or 2.2V , V OUT = 0.8V and 5.5V, I OUT = 1mA, V EN = 2.2V , C NR = 10nF , C OUT = 4.7μF , T J = −40°C to 125°C, unless otherwise specified)Absolute Maximum Ratings (Note 1)●All Pins ---------------------------------------------------------------------------------------------------------------------- −0.3V to 7V ●Power Dissipation, P D @ T A = 25°CVDFN-8AL 3x3-------------------------------------------------------------------------------------------------------------3.31W●Package Thermal Resistance (Note 2)VDFN-8AL 3x3, θJA --------------------------------------------------------------------------------------------------------30.2°C/W VDFN-8AL 3x3, θJC -------------------------------------------------------------------------------------------------------5.5°C/W ●Lead Temperature (Soldering, 10 sec.)-------------------------------------------------------------------------------260°C ●Junction T emperature -----------------------------------------------------------------------------------------------------150°C●Storage T emperature Range -------------------------------------------------------------------------------------------- −65°C to 150°C ●ESD Susceptibility (Note 3)HBM (Human Body Model)----------------------------------------------------------------------------------------------2kV CDM (Charged Device Model)------------------------------------------------------------------------------------------1kVRecommended Operating Conditions (Note 4)●Supply Voltage, VIN ------------------------------------------------------------------------------------------------------2.2V to 6V●Junction T emperature Range -------------------------------------------------------------------------------------------- −40°C to 125°CRT2519Copyright 2018 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.RT2519©Copyright 2018 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Typical Application CircuitNote 1. Stresses beyond those listed “Absolute Maximum Ratings ” may cause permanent damage to the device. These arestress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability.Note 2. θJA is measured under natural convection (still air) at T A = 25°C with the component mounted on a high effective-thermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard. θJC is measured at the exposed pad of the package.Note 3. Devices are ESD sensitive. Handling precaution is recommended.Note 4. The device is not guaranteed to function outside its operating conditions.Note 5. The spec. doesn't cover the tolerances from external resistors, and which is not tested at condition of V OUT = 0.8V, 4.5V≤ V IN ≤ 6V, and 750mA ≤ I OUT ≤ 1A since the power dissipation of the device is totally higher than the maximum rating of the package to lead a thermal shutdown issue.Note : All input and output capacitance in the suggested parameter mean the effective capacitance. The effectivecapacitance needs to consider any De-rating Effect like DC bias.V OUTRT2519©Copyright 2018 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Typical Operating Characteristics0.00.51.01.52.02.5-50-25255075100125Temperature (°C)S h u t d o w n C u r r e n t (μA )Reference Voltage vs. Temperature0.7900.7950.8000.8050.810-50-25255075100125Temperature (°C)R e f e r e n c e V o l t a g e (V )UVLO vs. Temperature1.51.61.71.81.92.02.12.2-50-25255075100125Temperature (°C)U V L O (V )PSRR vs. Frequency10203040506070809010 100 1k10k100k1M10MFrequency (Hz)P S R R (d B )Dropout Voltage vs. Output Current0501001502002004006008001000Output Current (mA)D r o p o u t V o l t a g e (m V )Dropout Voltage vs. Input Voltage05010015020023456Input Voltage (V)D r o p o u t V o l t a g e (m V )RT2519©Copyright 2018 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Time (50μs/Div)Power Off from ENV OUT (1V/Div)V EN (2V/Div)I OUT(500mA/Div)V IN = 4.3V, V OUT = 3.3VTime (500μs/Div)Power On from ENV OUT (1V/Div)V EN (2V/Div)I OUT(500mA/Div)V IN = 4.3V, V OUT = 3.3VTime (50μs/Div)Load Transient ResponseV OUT (50mV/Div)I OUT(500mA/Div)V IN = 4.3V, V OUT = 3.3V,I OUT = 0.1A to 1A (1A/μs, only shows the transient component)Time (50μs/Div)Line Transient Response V OUT (5mV/Div)V IN (1V/Div)V IN = 3.8V to 4.8V, V OUT = 3.3V,I OUT = 0.1AOutput Spectral Noise Density0.010.101.0010.00100.0010100100010000100000Frequency (Hz)O u t p u t S p e c t r a l N o i s e D e n s i t y (μV /√H z )RT2519©Copyright 2018 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Application InformationThe RT2519 is a low voltage, low dropout linear regulator with input voltage from 2.2V to 6V and a fixed output voltage from 0.8V to 5.5V.Dropout VoltageThe dropout voltage refers to the voltage difference between the VIN and VOUT pins while operating at specific output current. The dropout voltage V DO also can be expressed as the voltage drop on the pass-FET at specific output current(I RATED ) while the pass-FET is fully operating at ohmic region and the pass-FET can be characterized as an resistance R DS(ON). Thus the dropout voltage can be defined as (V DO = V VIN − V VOUT = R DS(ON) x I RATED ).For normal operation, the suggested LDO operating range is (V VIN > V VOUT + V DO ) for good transient response and PSRR ability. Vice versa, while operating at the ohmic region will degrade these performance severely.Output Voltage SettingFor the RT2519, the voltage on the FB pin sets the output voltage and is determined by the values of R1 and R2.The values of R1 and R2 can be calculated for any voltage using the formula given in Equation :()OUT R1 + R2V =0.8R2⨯Using lower values for R1 and R2 is recommended to reduces the noise injected from the FB pin. Note that R1is connected from VOUT pin to FB pin, and R2 is connected from FB to GND.Chip Enable OperationThe EN pin is the chip enable input. Pull the EN pin low (<0.4V) will shutdown the device. During shutdown mode,the RT2519 quiescent current drops to lower than 2μA.Drive the EN pin to high (>1.2V, <6V) will turn on the device again. For external timing control (e.g.RC), the EN pin can also be externally pulled to High by adding a 100k Ωor greater resistor from the VIN pin.Current LimitThe RT2519 continuously monitors the output current to protect the pass transistor against abnormal operations.When an overload or short circuit is encountered, thecurrent limit circuitry controls the pass transistor's gatevoltage to limit the output within the predefined range. By reason of the build-in body diode, the pass transistor conducts current when the output voltage exceeds input voltage. Since the current is not limited, external current protection should be added if device may work at reverse voltage state.C IN and C OUT SelectionLike any low dropout regulator, the external capacitors of the RT2519 must be carefully selected for regulator stability and performance. Using a capacitor of at least 4.7μF is suitable. The input capacitor must be located at a distance of no more than 0.5 inch from the input pin of the chip.Any good quality ceramic capacitor can be used. However,a capacitor with larger value and lower ESR (Equivalent Series Resistance) is recommended since it will provide better PSRR and line transient response.The RT2519 is designed specifically to work with low ESR ceramic output capacitor for space saving and performance consideration. Using a ceramic capacitor with capacitance of at least 4.7μF on the RT2519 output ensures stability.Output NoiseGenerally speaking, the dominant noise source is from the internal bandgap for most LDOs. With the noise reduction capacitor connecting to the NR pin of the RT2519, the noise component contributed from bandgap will not be significantly. Instead, the most noise source comes from the output resistor divider and the error amplifier input. For general application to minimize noise,using a 0.01μF noise-reduction capacitor (C NR ) is recommended.Thermal ConsiderationsThermal protection limits power dissipation in the RT2519.When the operation junction temperature exceeds 160°C,the OTP circuit starts the thermal shutdown function and turns the pass element off. The pass element turns on again after the junction temperature cools down by 20°C.The RT2519 output voltage will be closed to zero when output short circuit occurs as shown in Figure 1. It canRT2519©Copyright 2018 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.reduce the chip temperature and provides maximum safety to end users when output short circuit occurs.The junction temperature should never exceed theabsolute maximum junction temperature T J(MAX), listed under Absolute Maximum Ratings, to avoid permanent damage to the device. The maximum allowable power dissipation depends on the thermal resistance of the IC package, the PCB layout, the rate of surrounding airflow,and the difference between the junction and ambient temperatures. The maximum power dissipation can be calculated using the following formula :P D(MAX) = (T J(MAX) − T A ) / θJAwhere T J(MAX) is the maximum junction temperature, T A is the ambient temperature, and θJA is the junction-to-ambient thermal resistance.For continuous operation, the maximum operating junction temperature indicated under Recommended Operating Conditions is 125°C. The junction-to-ambient thermal resistance, θJA , is highly package dependent. For a VDFN-8AL 3x3 package, the thermal resistance, θJA , is 30.2°C/W on a standard JEDEC 51-7 high effective-thermal-conductivity four-layer test board. The maximum power dissipation at T A = 25°C can be calculated as below :P D(MAX) = (125°C − 25°C) / (30.2°C/W) = 3.31W for a VDFN-8AL 3x3 package.The maximum power dissipation depends on the operating ambient temperature for the fixed T J(MAX) and the thermal resistance, θJA . The derating curves in Figure 2 allowsFigure 1. Short-Circuit Protection when Output Short-Circuit Occurs V OUT Short to GNDV OUTI OUTthe designer to see the effect of rising ambient temperature on the maximum power dissipation.Figure 2. Derating Curve of Maximum Power Dissipation0.00.81.62.43.24.00255075100125Ambient Temperature (°C)M a x i m u m P o w e r D i s s i p a t i o n (W )RT251911DS2519-04 January 2018©Copyright 2018 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology yout ConsiderationFigure 3. PCB Layout Guide12DS2519-04 January 2018 Richtek Technology Corporation14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C.Tel: (8863)5526789Richtek products are sold by description only. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use;nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.V-Type 8AL DFN 3x3 Package。
KIA278R系列整流器规格书
LINE UP
ITEM KIA278R015FP/PI KIA278R018FP/PI KIA278R020FP/PI KIA278R025FP/PI KIA278R030FP/PI KIA278R033FP/PI KIA278R050FP/PI OUTPUT VOLTAGE (Typ.) 1.5 1.8 2.0 2.5 3.0 3.3 5.0 FP : D2PAK-5 PI : TO-220IS-4 PACKAGE
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SYMBOL VIN VC IOUT PD1 RATING 15 15 2.0 2.0 W 1.5 35 PD2 W 15 Tj Topr Tstg 150 -20 -30 80 150 UNIT V V A
PI FP PI
2005. 10. 21
Revision No : 0
1/10
KIA278R015FP/PI~KIA278R050FP/PI
IOUT=0.5A, f=120Hz, Vripple=0.5Vrms IO=2A
ELECTRICAL CHARACTERISTICS (KIA278R025) (Unless otherwise specified, VIN=VO+1V, IO=1A, Ta=25 )
CHARACTERISTIC Output Voltage Load Regulation Line Regulation Temperature Coefficient of Output Voltage Ripple Rejection Dropout Voltage Output ON state for control Voltage Output ON state for control Current Output OFF state for control Voltage Output OFF state for control Current Quiescent Current Quiescent Current (OFF Mode) SYMBOL VO Reg Load Reg Line TCVO R R VD VC(ON) IC(ON) VC(OFF) IC(OFF) IQ IQ(OFF) VC=0.4V IO=0A VC=0.4V, IO=0A VC=2.7V IO=5mA 2.0A VIN=3V~6.5V, IO=5mA Tj=0 125 , IO=5mA CONDITIONS MIN. 2.438 45 2.0 TYP. 2.50 0.2 0.05 0.02 60 1 0.5 MAX. 2.562 2.0 1.0 0.05 0.5 200 0.8 2.0 2 5 UNIT V % % %/ dB V V A V A mA A
NCV8164C 300mA LDO调节器(低掉电压,低噪声,高PSRR,带Power Good)说
NCV8164CSNADJT1G300 mA LDO Regulator, Low Dropout Voltage, Ultra Low Noise, High PSRR with Power Good NCV8164CThe NCV8164C is a 300 mA LDO, next generation of high PSRR,ultra −low noise and low dropout regulators with Power Good open collector output. Designed to meet the requirements of RF and sensitive analog circuits, the NCV8164C device provides ultra −low noise, high PSRR and low quiescent current. The device also offer excellent load/line transients. The NCV8164C is designed to work with a 1 m F input and a 1 m F output ceramic capacitor. It is available in industry standard TSOP −5, WDFNW6 0.65P, 2 mm x 2 mm and DFNW8 0.65P, 3 mm x 3 mm.Features•Operating Input V oltage Range: 1.6 V to 5.0 V •Available in Fixed V oltage Option: 1.2 V to 4.5 V •Adjustable Version Reference V oltage: 1.2 V •±2% Accuracy Over Load and Temperature •Ultra Low Quiescent Current Typ. 30 m A •Standby Current: Typ. 0.1 m A•Very Low Dropout: 110 mV at 300 mA for 3.3 V Variant •Ultra High PSRR: Typ. 85 dB at 10 mA, f = 1 kHz •Ultra Low Noise: 9 m V RMS (Fixed Version)•Stable with a 1 m F Small Case Size Ceramic Capacitors •Available in – TSOP −5 3 mm x 1.5 mm x 1 mm CASE 483♦WDFNW6 2 mm x 2 mm x 0.75 mm CASE 511DW ♦DFNW8 3 mm x 3 mm x 0.9 mm CASE 507AD•NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements •AEC −Q100 Qualified and PPAP Capable•These Devices are Pb −Free, Halogen Free/BFR Free and are RoHS CompliantTypical Applications•Communication Systems •In −V ehicle Networking•Telematics, Infotainment and Clusters •General Purpose AutomotiveFigure 1. Typical Application SchematicDFNW8 3x3, 0.65P CASE 507ADMARKING DIAGRAMSXXX = Specific Device Code A = Assembly Location L = Wafer Lot M = Month Code Y = Year W = Work Week G = Pb −Free Package(Note: Microdot may be in either location)TSOP −5CASE 483WDFNW6 2x2, 0.65PCASE 511DW158164XXX ALYW G G 1XXM G G PIN CONNECTONSSee detailed ordering, marking and shipping information on page 8 of this data sheet.ORDERING INFORMATIONGNDDFNW6 2x2 mm (Top View)GND IN ENADJ/SNS OUT PG 123654Table 1. PIN FUNCTION DESCRIPTIONPin No. TSOP−5Pin No.WDFNW6Pin No.DFNW8PinName Description168IN Input voltage supply pin511OUT Regulated output voltage. The output should be bypassed with small 1 m Fceramic capacitor347EN Chip enable: Applying V EN < 0.2 V disables the regulator, Pulling V EN > 0.7 Venables the LDO4 / −33PG Power Good, open collector. Use 10 k W to 100 k W pull−up resistor connected tooutput or input voltage256GND Common ground connection− / 422ADJ Adjustable output feedback pin (for adjustable version only)−22SNS Sense feedback pin.Must be connected to OUT pin on PCB (for fixed versions only)−−4, 5N/C Not connected, pin can be tied to ground plane for better power dissipation−EPAD EPAD EPAD Expose pad should be tied to ground plane for better power dissipationTable 2. ABSOLUTE MAXIMUM RATINGSRating Symbol Value Unit Input Voltage (Note 1)V IN−0.3 to 5.3V Output Voltage V OUT−0.3 to V IN+0.3, max. 5.3V Chip Enable Input V CE−0.3 to 5.3V Power Good Voltage V PG−0.3 to 5.3V Power Good Current I PG30mA Output Short Circuit Duration t SC unlimited s Maximum Junction Temperature T J150°C Storage Temperature T STG−55 to 150°C ESD Capability, Human Body Model (Note 2)ESD HBM2000V ESD Capability, Charged Device Model (Note 2)ESD CDM1000V Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.1.Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.2.This device series incorporates ESD protection and is tested by the following methods:ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)ESD Charged Device Model tested per EIA/JESD22−C101, Field Induced Charge ModelTable 3. THERMAL CHARACTERISTICSRating Symbol Value Unit THERMAL CHARACTERISTICS, TSOP−5 PACKAGEThermal Resistance, Junction−to−Ambient (Note 3)R q JA158°C/W Thermal Resistance, Junction−to−Case (top)R q JC(top)155°C/W Thermal Resistance, Junction−to−Case (bottom) (Note 4)R q JC(bot)102°C/W Thermal Resistance, Junction−to−Board R q JB197°C/W Characterization Parameter, Junction−to−Top Y JT40°C/W Characterization Parameter, Junction−to−Board Y JB82°C/W THERMAL CHARACTERISTICS, WDFNW6−2X2, 0.65 PITCH PACKAGEThermal Resistance, Junction−to−Ambient (Note 3)R q JA51°C/W Thermal Resistance, Junction−to−Case (top)R q JC(top)142°C/W Thermal Resistance, Junction−to−Case (bottom) (Note 4)R q JC(bot) 2.0°C/W Thermal Resistance, Junction−to−Board R q JB117°C/W Characterization Parameter, Junction−to−Top Y JT 1.9°C/W Characterization Parameter, Junction−to−Board Y JB7.7°C/W THERMAL CHARACTERISTICS, DFNW8−3X3, 0.65 PITCH PACKAGEThermal Resistance, Junction−to−Ambient (Note 3)R q JA50°C/W Thermal Resistance, Junction−to−Case (top)R q JC(top)142°C/W Thermal Resistance, Junction−to−Case (bottom) (Note 4)R q JC(bot)7.9°C/W Thermal Resistance, Junction−to−Board R q JB125°C/W Characterization Parameter, Junction−to−Top Y JT 2.0°C/W Characterization Parameter, Junction−to−Board Y JB7.5°C/W3.The junction−to−ambient thermal resistance under natural convection is obtained in a simulation on a high−K board, following the JEDEC51.7guidelines with assumptions as above, in an environment described in JESD51−2a.4.The junction−to−case (bottom) thermal resistance is obtained by simulating a cold plate test on the IC exposed pad. Test description canbe found in the ANSI SEMI standard G30−88.Table 4. ELECTRICAL CHARACTERISTICS (−40°C ≤ T J≤ 150°C; V IN = V OUT(NOM) + 0.5 V; I OUT = 1 mA, C IN = C OUT= 1 m F, V EN = V IN, unless otherwise noted. Typical values are at T J = +25°C (Note 5))Parameter Test Conditions Symbol Min Typ Max Unit Operating Input Voltage V IN 1.6 5.0V Output Voltage Accuracy V IN = V OUT(NOM) + 0.5 V to 5.0 V,0.1 mA ≤ I OUT≤ 300 mAV OUT−2+2%Reference Voltage (Adjustable Ver. ADJ pin connected to OUT)V IN= 1.6 V to 5.0 V,0.1 mA ≤ I OUT≤ 300 mAV ADJ 1.176 1.2 1.224VLine Regulation V OUT(NOM)+ 0.5 V ≤ V IN≤ 5.0 V Line Reg0.5mV/V Load Regulation I OUT= 1 mA to 300 mA Load Reg2mVDropout Voltage (Note 6) TSOP−5, WDFNW6I OUT= 300 mA V OUT(NOM) = 1.5 V V DO170295mVV OUT(NOM) = 1.8 V155255V OUT(NOM) = 2.5 V125200V OUT(NOM) = 2.8 V115185V OUT(NOM) = 3.0 V113177V OUT(NOM) = 3.3 V110170V OUT(NOM) = 4.5 V95135Dropout Voltage (Note 6) DFNW8I OUT= 300 mA V OUT(NOM) = 1.5 V V DO180315mVV OUT(NOM) = 1.8 V165275V OUT(NOM) = 2.5 V140220V OUT(NOM) = 2.8 V130205V OUT(NOM) = 3.0 V127197V OUT(NOM) = 3.3 V125190V OUT(NOM) = 4.5 V112170Output Current Limit V OUT = 90% V OUT(NOM)I CL350560mA Short Circuit Current V OUT = 0 V I SC580Quiescent Current I OUT= 0 mA I Q3040m A Shutdown Current V EN≤ 0.4 V I DIS0.01 1.5m A EN Pin Threshold Voltage EN Input Voltage “H”V ENH0.7VEN Input Voltage “L”V ENL0.2EN Pull Down Current V EN= 5.0 V I EN0.20.6m A Power Good Threshold Voltage Output Voltage Raising V PGUP95%Output Voltage Falling V PGDW90Power Good Output Voltage Low I PG = 5 mA, Open drain V PGLO0.3V Turn−On Time (Note 7)C OUT= 1 m F, From assertion of V ENto V OUT = 95% V OUT(NOM)120m sPower Supply Rejection Ratio (Note 7)V OUT(NOM)= 3.3 V,I OUT= 10 mAf = 100 Hz P SRR83dBf = 1 kHz85f = 10 kHz80f = 100 kHz61Output Voltage Noise (Fixed Ver.) f = 10 Hz to 100 kHz I OUT = 10 mA V N9m V RMSThermal Shutdown Threshold (Note 7)Temperature rising T SDH165°C Temperature hysteresis T HYST15°CActive output discharge resistance V EN< 0.2 V, Version A only R DIS260W Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.5.Performance guaranteed over the indicated operating temperature range by design and/or characterization.Production tested at T J = T A = 25°C.6.Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible. Dropoutvoltage is characterized when V OUT falls 3% below V OUT(NOM).7.Guaranteed by design and characterization.TYPICAL CHARACTERISTICSFigure 2. Output Voltage vs. Temperature −V OUT = 1.2 V Figure 3. Output Voltage vs. Temperature −V OUT = 1.8 VFigure 4. Output Voltage vs. Temperature −V OUT = 3.3 V Figure 5. Dropout Voltage vs. Temperature −V OUT = 1.2 VFigure 6. Dropout Voltage vs. Temperature −V OUT = 1.8 V Figure 7. Dropout Voltage vs. Temperature −V OUT = 3.3 V1.1801.1851.1901.1951.2001.2051.2101.2151.220−40−2020406080100120140O u t p u t V o l t a g e (V)Temperature (°C) 1.7901.7951.8001.8051.8101.8151.8201.8251.830−40−2020406080100120140O u t p u t V o l t a g e (V)Temperature (°C)3.2903.2953.3003.3053.3103.3153.3203.3253.330−40−2020406080100120140O u t p u t V o l t a g e (V )−40−2020406080100120140V o l t a g e D r o p o u t (m V )7090−40−2020406080100120140V o l t a g e D r o p o u t (m V )708090−40−2020406080100120140V o l t a g e D r o p o u t (m V )Temperature (°C)Temperature (°C)Temperature (°C)Temperature (°C)TYPICAL CHARACTERISTICS (continued)Figure 8. Quiescent Current va Temperature Figure 9. Turn −on Time vs. TemperatureFigure 10. Current Limit vs. Temperature Figure 11. Enable Thresholds vs TemperatureFigure 12. Power Good Threshold vs.Temperature Figure 13. Active Discharge Resistance vs.TemperatureTemperature (°C)2022242628303234363840−40−2020406080100120140Q u i e s c e n t C u r r e n t (m A )−40−2020406080100120140T u r n −o n T i m e (m s )Temperature (°C)−40−2020406080100120140C u r r e n t L i m i t (m A )−40−2020406080100120140E n a b l e T h r e s h o l d s (V )−40−2020406080100120140P o w e r G o o d T h r e s h o l d s (%)−40−2020406080100120140A c t i v e D i s c h a r g e (W )Temperature (°C)Temperature (°C)Temperature (°C)Temperature (°C)TYPICAL CHARACTERISTICS (continued)Figure 14. Power Supply Rejection Rationfor V OUT = 2.8 V, C OUT = 1 m F Figure 15. Output Voltage Noise Spectral Densityfor V OUT = 2.8 V, C OUT = 1 m FFrequency (kHz)00.010,1110100100010000P S R R (d B)1101000100000.010.1110100100010000N o i s e S p e c t r a l D e n s i t y (n V /s q r t (H z ))Frequency (kHz)APPLICATIONS INFORMATIONThe NCV8164C is the member of new family of high output current and low dropout regulators which delivers low quiescent and ground current consumption, good noise and power supply ripple rejection ratio performance. The NCV8164C incorporates EN pin and power good output for simple controlling by MCU or logic. Standard features include current limiting, soft −start feature and thermal protection.Input Decoupling (C IN )It is recommended to connect at least 1 m F ceramic X5R or X7R capacitor between IN and GND pin of the device.This capacitor will provide a low impedance path for any unwanted AC signals or noise superimposed onto constant input voltage. The good input capacitor will limit the influence of input trace inductances and source resistance during sudden load current changes. Higher capacitance and lower ESR capacitors will improve the overall line transient response.Output Decoupling (C OUT )The NCV8164C does not require a minimum Equivalent Series Resistance (ESR) for the output capacitor. The device is designed to be stable with standard ceramics capacitors with values of 1 m F or greater. The X5R and X7R types have the lowest capacitance variations over temperature thus they are recommended.Power Good Output ConnectionThe NCV8164C include Power Good functionality for better interfacing to MCU system. Power Good output is open collector type, capable to sink up to 10 mA.Recommended operating current is between 10 m A and1mA to obtain low saturation voltage. External pull −up resistor can be connected to any voltage up to 5.0 V (please see Absolute Maximum Ratings table).Power Dissipation and Heat SinkingThe maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and the ambient temperature affect the rate of junction temperature rise for the part. For reliable operation junction temperature should be limited to +125°C, however device is capable to work up to junction temperature +150°C. The maximum power dissipation the NCV8164C can handle is given by:P D(MAX)+ƪT J(MAX)*T A ƫR q JA(eq. 1)The power dissipated by the NCV8164C for given application conditions can be calculated from the following equations:P D [V IN (I GND (I OUT )))I OUT (V IN *V OUT )(eq. 2)orV IN(MAX)[P D(MAX))ǒV OUT I OUT ǓI OUT )I GND(eq. 3)HintsV IN and GND printed circuit board traces should be as wide as possible. When the impedance of these traces is high, there is a chance to pick up noise or cause the regulator to malfunction. Place external components, especially the output capacitor, as close as possible to the NCV8164C, and make traces as short as possible .Adjustable VersionNot only adjustable version, but also any fixed version can be used to create adjustable voltage, where original fixed voltage becomes reference voltage for resistor divider and feedback loop. Output voltage can be equal or higher than original fixed option, while possible range is from 1.2 V up to 4.5 V. Figure 16 shows how to add external resistors to increase output voltage above fixed value.Output voltage is then given by equationV OUT+V FIX(1)R1ńR2)(eq. 4)where V FIX is voltage of original fixed version (from 1.2V up to 4.5 V) or adjustable version (1.2 V). Do not operate the device at output voltage about 4.7 V, as device can be damaged.In order to avoid influence of current flowing into SNS pin to output voltage accuracy (SNS current varies with voltage option and temperature, typical value is 300 nA) it is recommended to use values of R1 and R2 below 500 k W.Figure 16. Adjustable Variant ApplicationPlease note that output noise is amplified by V OUT / V FIX ratio. For example, if original 1.2 V fixed variant is used to create 3.6 V output voltage, output noise is increased 3.6 / 1.2 = 3 times and real value will be 3 × 9 m Vrms =27Ăm Vrms. For noise sensitive applications it is recommended to use as high fixed variant as possible – for example in case above it is better to use 3.3 V fixed variant to create 3.6 V output voltage, as output noise will be amplified only 3.6 / 3.3 = 1.09 × (9.8 m Vrms).ORDERING INFORMATIONDevice Part No.Wafer Part Marking Package Option Package Shipping †NCV8164CSN180T1G A0C00HJ−FNT8EJ N/A TSOP5(Pb−Free)3000 / Tape & ReelNCV8164CSN280T1G A0C00HH−FNT8EK N/A TSOP5(Pb−Free)3000 / Tape & ReelNCV8164CSNADJT1G A0C00HP−FNT8E4N/A TSOP5(Pb−Free)3000 / Tape & ReelNCV8164CMTW180TAG A0C00HJ−FNT8HJ Wettable WDFNW6 2 x 2(WF, Pb−Free)3000 / Tape & ReelNCV8164CMTW280TAG A0C00HH−FNT8HK Wettable WDFNW6 2 x 2(WF, Pb−Free)3000 / Tape & ReelNCV8164CMTW290TAG A0C00HK−FNT8HH Wettable WDFNW6 2 x 2(WF, Pb−Free)3000 / Tape & ReelNCV8164CMTWADJTAG A0C00HP−FNT8H2Wettable WDFNW6 2 x 2(WF, Pb−Free)3000 / Tape & ReelNCV8164CAMLADJTCG A0C00HP−FNT8G2Wettable DFNW8 3 x 3(WF, Pb−Free)3000 / Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.PACKAGE DIMENSIONSTSOP −5CASE 483ISSUE Mǒmm inchesǓ*For additional information on our Pb −Free strategy and solderingdetails, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOLDERING FOOTPRINT*NOTES:1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.2.CONTROLLING DIMENSION: MILLIMETERS.3.MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.4.DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLDFLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSION A.5.OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION.TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2FROM BODY .DIM MIN MAX MILLIMETERS A B C 0.90 1.10D 0.250.50G 0.95 BSC H 0.010.10J 0.100.26K 0.200.60M 0 10 S2.503.00__2XDETAIL ZTOP VIEW1.35 1.652.853.15WDFNW6 2x2, 0.65PCASE 511DWISSUE BDFNW8 3x3, 0.65P CASE 507AD ISSUE ANOTES:1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.2.CONTROLLING DIMENSION: MILLIMETERS.3.DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30mm FROM THE TERMINAL TIP .4.COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS.5.THIS DEVICE CONTAINS WETTABLE FLANK DESIGN FEATURE TO AID IN FILLET FORMA-TION ON THE LEADS DURING MOUNTING.TOP VIEW8X*For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.RECOMMENDEDSOLDERING FOOTPRINT*DIM MIN NOM MILLIMETERS A 0.800.90A1−−−−−−b 0.250.30D D2 2.30 2.40E E2 1.55 1.65e 0.65 BSC L 0.300.40A30.20 REF 2.90 3.00K A4L3MAX 2.90 3.00 1.000.050.352.501.750.503.103.10CONSTRUCTIONDETAIL ASECTION C −CSURFACESDETAIL BCONSTRUCTIONPACKAGE OUTLINEDIMENSIONS: MILLIMETERS0.28 REF 0.05 REF0.10−−−−−−ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.PUBLICATION ORDERING INFORMATIONTECHNICAL SUPPORTNorth American Technical Support:Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 011 421 33 790 2910LITERATURE FULFILLMENT :Email Requests to:*******************ON Semiconductor Website: Europe, Middle East and Africa Technical Support:Phone: 00421 33 790 2910For additional information, please contact your local Sales Representative◊NCV8164CSNADJT1G。
ADM7172系列低噪声低电压LDO电路数据手册说明书
ADM7172ACPZ-1.8-R7 .ADM7172ACPZ-3.3-R7 .ADM7172ACPZ-5.0-R7 .ADM7172CP-EVALZ6.5 V, 2 A, Ultralow Noise, High PSRR,Fast Transient Response CMOS LDO Known Good Die ADM7172-KGDRev. A Document FeedbackInformation furnished by Analog Devices is believed to be accurate and reliable. However, noresponsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. T rademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, M A 02062-9106, U.S.A. Tel: 781.329.4700 ©2015–2016 Analog Devices, Inc. All rights reserved. Technical Support FEATURESInput voltage range: 2.3 V to 6.5 VMaximum load current: 2 ALow noise: 5 µV rms independent of output voltage at100 Hz to 100 kHzFast transient response: 1.5 μs for 1 mA to 1.5 A load step 60 dB PSRR at 100 kHzLow dropout voltage: 172 mV at 2 A load, V OUT = 3 VInitial accuracy: −0.5% (minimum), +1% (maximum) Accuracy over line, load, and temperature: ±1.5% Quiescent current, I GND = 0.7 mA with no loadLow shutdown current: 0.25 μA at V IN = 5 VStable with small 4.7 µF ceramic output capacitor Adjustable and fixed output voltage options: 1.2 V to 5.0 V Adjustable output from 1.2 V to V IN − V DOPrecision enableAdjustable soft startAPPLICATIONSRegulation to noise sensitive applications: analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuits, precision amplifiers, phase-locked loops (PLLs)/ voltage controlled oscillators (VCOs), and clocking ICs Communications and infrastructureMedical and healthcareIndustrial and instrumentation GENERAL DESCRIPTIONThe ADM7172-KGD is a CMOS, low dropout linear regulator (LDO) that operates from 2.3 V to 6.5 V and provides up to 2 A of output current. This high output current LDO is ideal for regulation of high performance analog and mixed-signal circuits operating from 6 V down to 1.2 V rails. Using an advanced proprietary architecture, the device provides high power supply rejection and low noise and achieves excellent line and load transient response with just a small 4.7 µF ceramic output capacitor. Load transient response is typically 1.5 μs for a 1 mA to 1.5 A load step.The ADM7172-KGD is available in a 4.2 V fixed output voltage option. Additional voltages that are available by special order are1.3 V, 1.5 V, 1.8 V, 1.85 V,2.0 V, 2.2 V, 2.5 V, 2.7 V, 2.75 V, 2.8 V,2.85 V,3.0 V, 3.8 V, 3.3 V,4.2 V, 4.6 V,5.0 V, and an adjustable output option.Inrush current can be controlled by adjusting the start-up time via the soft start pin. The typical start-up time with a 1 nF soft start capacitor is 1.0 ms.The ADM7172-KGD regulator output noise is 5 μV rms, independent of the output voltage.Additional application and technical information can be found in the ADM7172 data sheet.ADM7172-KGDKnown Good DieRev. A | Page 2 of 7TABLE OF CONTENTSFeatures .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Input and Output Capacitor, Recommended Specifications ....... 4 Absolute Maximum Ratings ............................................................5 ESD Caution...................................................................................5 Pad Configuration and Function Descriptions .............................6 Outline Dimensions ..........................................................................7 Die Specifications and Assembly Recommendations ..............7 Ordering Guide .. (7)REVISION HISTORY3/16—Rev. A to Rev. BChanges to General Description Section (1)9/15—Revision 0: Initial VersionKnown Good DieADM7172-KGDRev. A | Page 3 of 7SPECIFICATIONSV IN = (V OUT + 0.5 V) or 2.3 V (whichever is greater), EN = V IN , I LOAD = 10 mA, C IN = C OUT = 4.7 µF, T A = 25°C for typical specifications, T J = −40°C to +125°C for minimum/maximum specifications, unless otherwise noted. Table 1.ParameterSymbol Test Conditions/Comments Min Typ Max Unit INPUT VOLTAGE RANGE V IN 2.3 6.5 V LOAD CURRENTI LOAD2 A OPERATING SUPPLY CURRENT I GND I LOAD = 0 µA 0.7 2.0 mAI LOAD = 2 A4.8 8.7 mA SHUTDOWN CURRENTI GND-SD EN = GND, V IN = 5 V 0.25 3.8 µA OUTPUT VOLTAGE ACCURACYFixed Output Voltage Accuracy V OUT I LOAD = 10 mA, T J = 25°C−0.5 +1 %100 μA < I LOAD < 2 A, V IN = (V OUT + 0.5 V) to 6.5 V −1.5+1.5 % Adjustable Output Voltage Accuracy V SENSE I LOAD = 10 mA1.194 1.200 1.212 V10 mA < I LOAD < 2 A, V IN = (V OUT + 0.5 V) to 6.5 V 1.182 1.218 V REGULATIONLine ∆V OUT /∆V IN V IN = (V OUT + 0.5 V) to 6.5 V −0.1 +0.1 %/V Load∆V OUT /∆I LOAD I LOAD = 100 μA to 2 A0.1 0.3 %/A SENSE INPUT BIAS CURRENT SENSE I-BIAS 100 μA < I LOAD < 2 A, V IN = (V OUT + 0.5 V) to 6.5 V 1 nA DROPOUT VOLTAGE 1 V DROPOUT I LOAD = 500 mA, V OUT = 3 V 42 70 mV I LOAD = 1 A, V OUT = 3 V 84 135 mVI LOAD = 2 A, V OUT = 3 V172 270 mV OUTPUT NOISE OUT NOISE 10 Hz to 100 kHz, all fixed output voltages 6 µV rms100 Hz to 100 kHz, all fixed output voltages 5 µV rms Noise Spectral Density 100 Hz, all fixed output voltages 110 nV/√Hz 1 kHz, all fixed output voltages 40 nV/√Hz 10 kHz, all fixed output voltages 20 nV/√Hz100 kHz, all fixed output voltages12 nV/√Hz POWER SUPPLY REJECTION RATIO PSRR 100 kHz, V IN = 4.0 V, V OUT = 3 V, I LOAD = 1.5 A, C SS = 0 nF 60 dB 100 kHz, V IN = 3.5 V, V OUT = 3 V, I LOAD = 1.5 A, C SS = 0 nF 53 dB 100 kHz, V IN = 3.3 V, V OUT = 3 V, I LOAD = 1.5 A, C SS = 0 nF 42 dB 1 MHz, V IN = 4.0 V, V OUT = 3 V, I LOAD = 1.5 A, C SS = 0 nF 31 dB 1 MHz, V IN = 3.5 V, V OUT = 3 V, I LOAD = 1.5 A, C SS = 0 nF 30 dB1 MHz, V IN = 3.3 V, V OUT = 3 V, I LOAD = 1.5 A, C SS = 0 nF 20 dB TRANSIENT LOAD RESPONSE t TR-REC Time for output voltage to settle within ±V SETTLE from V DEV for a 1 mA to 1.5 A load step, load step rise time = 400 ns1.5 μs V DEV Output voltage deviation due to 1 mA to 1.5 A load step 35 mVV SETTLE Output voltage deviation after transient load response time (t TR-REC ) has passed, V OUT = 5 V, C OUT = 4.7 µF 0.1 % START-UP TIME 2 t START-UP V OUT = 5 V, C SS = 0 nF 380 µsV OUT = 5 V, C SS = 1 nF 1.0 ms SOFT START CURRENTI SS V IN = 5 V 0.5 1 1.5 µA CURRENT-LIMIT THRESHOLD 3 I LIMIT2.43.3 3.9 A V OUT PULL-DOWN RESISTANCE V OUT-PULL EN = 0 V, V OUT = 1 V 11 kΩ THERMAL SHUTDOWNThermal Shutdown Threshold TS SD T J rising 150 °C Thermal Shutdown Hysteresis TS SD-HYS 15 °C UNDERVOLTAGE THRESHOLDSInput Voltage Rising UVLO RISE 2.28 V Input Voltage Falling UVLO FALL 1.94 V HysteresisUVLO HYS200mVADM7172-KGDKnown Good DieRev. A | Page 4 of 7ParameterSymbol Test Conditions/Comments Min Typ Max Unit EN INPUT STANDBY2.3 V ≤ V IN ≤ 6.5 V EN Input Logic High EN STBY-HIGH 1.1 V EN Input Logic LowEN STBY-LOW 0.4 V EN Input Logic Hysteresis EN STBY-HYS80 mV EN INPUT PRECISION2.3 V ≤ V IN ≤ 6.5 V EN Input Logic High EN HIGH 1.11 1.2 1.27 V EN Input Logic LowEN LOW 1.01 1.1 1.16 V EN Input Logic Hysteresis EN HYS100 mV EN Input Leakage Current I EN-LKG EN = V IN or GND0.1 1.0 µA EN Input Delay TimeTI EN-DLYFrom EN rising from 0 V to V IN to 0.1 V × V OUT130μs1Dropout voltage is defined as the input to output voltage differential when the input voltage is set to the nominal output voltage. Dropout applies only for output voltages greater than 2.3 V. 2Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of the nominal value. 3Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 5.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of 5.0 V, or 4.5 V.INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONSTable 2.ParameterSymbol Test Conditions/Comments Min Typ Max Unit MINIMUM INPUT AND OUTPUT CAPACITANCE 1 C MIN T A = −40°C to +125°C 3.3 µF CAPACITOR ESRR ESR T A = −40°C to +125°C 0.001 0.05 Ω1Ensure that the minimum input and output capacitance is greater than 3.3 μF over the full range of operating conditions. The full range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended; Y5V and Z5U capacitors are not recommended for use with any LDO.Known Good DieADM7172-KGDRev. A | Page 5 of 7ABSOLUTE MAXIMUM RATINGSTable 3.Parameter RatingVIN to GND −0.3 V to +7 V VOUT to GND −0.3 V to V IN EN to GND −0.3 V to +7 V SS to GND −0.3 V to V IN SENSE to GND−0.3 V to +7 V Storage Temperature Range−65°C to +150°C Operating Junction Temperature Range −40°C to +125°C Soldering ConditionsJEDEC J-STD-020Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.ADM7172-KGD Known Good DieFigure 1. Pad ConfigurationTable 4. Pad Function DescriptionsPad X-Axis (µm) Y-Axis (µm) Mnemonic Pad Type Description1A −392.275 +799.55 VOUT1A Triple Regulated Output Voltage, Triple Bond Pad.1B −392.275 +607.9 VOUT1B Triple Regulated Output Voltage, Triple Bond Pad.1C −392.275 +483.05 VOUT1C Triple Regulated Output Voltage, Triple Bond Pad.2A −392.275 +306.2 VOUT2A Triple Regulated Output Voltage, Triple Bond Pad.2B −392.275 +120.8 VOUT2B Triple Regulated Output Voltage, Triple Bond Pad.2C −392.275 −8.35 VOUT2C Triple Regulated Output Voltage, Triple Bond Pad.3 −392.25 −424.55 SENSE Single Sense Input.4 −392.25 −660.925 SS Single Soft Start.5 +400 −501.6 EN Single Regulator Enable.6A +399.8 −366.225 GNDA Double Ground, Double Bond Pad.6B +399.8 −271.225 GNDB Double Ground, Double Bond Pad.7A +246.6 −70.8 VIN1A Triple Regulator Input Supply, Triple Bond Pad.7B +246.6 +33.7 VIN1B Triple Regulator Input Supply, Triple Bond Pad.7C +246.6 +268.9 VIN1C Triple Regulator Input Supply, Triple Bond Pad.8A +246.6 +462.75 VIN2A Triple Regulator Input Supply, Triple Bond Pad.8B +246.6 +588.7 VIN2B Triple Regulator Input Supply, Triple Bond Pad.8C +246.6 +818.1 VIN2C Triple Regulator Input Supply, Triple Bond Pad.Rev. A | Page 6 of 7Known Good DieADM7172-KGDRev. A | Page 7 of 7OUTLINE DIMENSIONSFigure 2. 8-Pad Bare Die [CHIP](C-8-5)Dimensions shown in millimetersDIE SPECIFICATIONS AND ASSEMBLY RECOMMENDATIONSTable 5. Die SpecificationsParameterValueUnit Die Size (Maximum) 1020 × 1940 µm Bond Pad (Minimum) 70 × 70 µm Thickness203.2 µm Scribe Line Width80µm Bond Pad Composition AlCu (0.5%) %Passivation Type Nitride Not applicable Backside BiasGND Not applicableTable 6. Assembly RecommendationsAssembly Component Recommendation Die AttachAblestik 8290 Bonding Method1.2 mil goldORDERING GUIDEModelOutput Voltage (V) Temperature Range Package Description Package OptionADM7172-4.2-KGD-WP4.2−40°C to +125°C 8-Pad Bare Die [CHIP]C-8-508-21-2015-A×0.070©2015–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D13472-03/16(A)ADM7172ACPZ-1.8-R7 .ADM7172ACPZ-3.3-R7 .ADM7172ACPZ-5.0-R7 .ADM7172CP-EVALZ。
MAX8510 MAX8511 MAX8512 极低噪声、低掉电的线性调压器说明说明书
General DescriptionThe MAX8510/MAX8511/MAX8512 ultra-low-noise, low-dropout (LDO) linear regulators are designed to deliver up to 120mA continuous output current. These regulators achieve a low 120mV dropout for 120mA load current. The MAX8510 uses an advanced architecture to achieve ultra-low output voltage noise of 11μV RMS and PSRR of 54dB at 100kHz.The MAX8511 does not require a bypass capacitor, hence achieving the smallest PC board area. The MAX8512’s output voltage can be adjusted with an external divider.The MAX8510/MAX8511 are preset to a variety of voltag-es in the 1.5V to 4.5V range. Designed with a P-channel MOSFET series pass transistor, the MAX8510/MAX8511/MAX8512 maintain very low ground current (40μA).The regulators are designed and optimized to work with low-value, low-cost ceramic capacitors. The MAX8510 requires only 1μF (typ) of output capacitance for stability with any load. When disabled, current consumption drops to below 1μA.Package options include a 5-pin SC70 and a tiny 2mm x 2mm x 0.8mm TDFN package.Applications●Cellular and Cordless Phones ●PDA and Palmtop Computers ●Base Stations●Bluetooth Portable Radios and Accessories ●Wireless LANs ●Digital Cameras ●Personal Stereos●Portable and Battery-Powered EquipmentFeatures●Space-Saving SC70 and TDFN (2mm x 2mm) Packages ●11μV RMS Output Noise at 100Hz to 100kHzBandwidth (MAX8510)●78dB PSRR at 1kHz (MAX8510) ●120mV Dropout at 120mA Load●Stable with 1μF Ceramic Capacitor for Any Load ●Guaranteed 120mA Output●Only Need Input and Output Capacitors (MAX8511) ●Output Voltages: 1.5V, 1.8V, 2.5V, 2.6V, 2.7V, 2.8V,2.85V, 3V,3.3V,4.5V (MAX8510/MAX8511) and Adjustable (MAX8512) ●Low 40μA Ground Current ●Excellent Load/Line Transient●Overcurrent and Thermal Protection19-2732; Rev 5; 5/19Output Voltage Selector Guide appears at end of data sheet.Ordering Information continued at end of data sheet.*xy is the output voltage code (see Output Voltage Selector Guide). Other versions between 1.5V and 4.5V are available in 100mV increments. Contact factory for other versions.+Denotes a lead(Pb)-free/RoHS-compliant package.T = Tape and reel.PART*TEMP RANGE PIN-PACKAGEMAX8510EXKxy+T -40°C to +85°C 5 SC70MAX8510/MAX8511/MAX8512Ultra-Low-Noise, High PSRR,Low-Dropout, 120mA Linear RegulatorsOrdering InformationClick here for production status of specific part numbers.IN to GND ................................................................-0.3V to +7V Output Short-Circuit Duration ...........................................Infinite OUT, SHDN to GND .....................................-0.3V to (IN + 0.3V)FB, BP , N.C. to GND ................................-0.3V to (OUT + 0.3V)Continuous Power Dissipation (T A = +70°C)5-Pin SC70 (derate 3.1mW/°C above +70°C) .............0.247W 8-Pin TDFN (derate 11.9mW/°C above = 70°C) .........0.953W Operating Temperature Range ...........................-40°C to +85°CMilitary Operating Temperature Range .............-55°C to +110°C Junction Temperature ......................................................+150°C Storage Temperature Range ............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Soldering Temperature (reflow) .......................................+260°C Lead (Pb)-free packages .................................................+260°C Packages containing lead (Pb) .......................................+240°C(Note 1)SC70Junction-to-Ambient Thermal Resistance (θJA ) ........324°C/W Junction-to-Case Thermal Resistance (θJC ) .............115°C/WTDFNJunction-to-Ambient Thermal Resistance (θJA ) .......83.9°C/W Junction-to-Case Thermal Resistance (θJC ) ...............37°C/W(V IN = V OUT + 0.5V, T A = -40°C to +85°C, unless otherwise noted. C IN = 1μF, C OUT = 1μF, C BP = 10nF. Typical values are at +25°C; the MAX8512 is tested with 2.45V output, unless otherwise noted.) (Note 2)PARAMETER SYMBOL CONDITIONSMIN TYPMAX UNITS Input Voltage Range V IN26VOutput Voltage Accuracy I OUT = 1mA, T A = +25°C-1+1%I OUT = 100µA to 80mA, T A = +25°C -2+2I OUT = 100µA to 80mA-3+3Maximum Output Current I OUT 120mA Current LimitI LIMV OUT = 90% of nominal value 130200300mA Dropout Voltage (Note 3)V OUT ≥ 3V, I OUT = 80mA 80170mVV OUT ≥ 3V, I OUT = 120mA1202.5V ≤ V OUT < 3V, I OUT = 80mA 902002.5V ≤ V OUT < 3V, I OUT = 120mA 1352V ≤ V OUT < 2.5V, I OUT = 80mA 1202502V ≤ V OUT < 2.5V, I OUT = 120mA180Ground Current I Q I OUT = 0.05mA4090µA V IN = V OUT (nom) - 0.1V, I OUT = 0mA 220500Line Regulation V LNR V IN = (V OUT + 0.5V) to 6V, I OUT = 0.1mA 0.001%/V Load RegulationV LDR I OUT = 1mA to 80mA 0.003%/mA Shutdown Supply CurrentI SHDNV SHDN = 0VT A = +25°C 0.0031µAT A = +85°C 0.05Ripple RejectionPSRRf = 1kHz, I OUT = 10mAMAX851078dBMAX8511/MAX851272f = 10kHz, I OUT = 10mA MAX851075MAX8511/MAX851265f = 100kHz, I OUT = 10mAMAX851054MAX8511/ MAX851246MAX8512Low-Dropout, 120mA Linear RegulatorsAbsolute Maximum RatingsStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.Electrical CharacteristicsPackage Thermal Characteristics Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layerboard. For detailed information on package thermal considerations, refer to /thermal-tutorial .(V IN = V OUT + 0.5V, T A = -40°C to +85°C, unless otherwise noted. C IN = 1μF, C OUT = 1μF, C BP = 10nF. Typical values are at +25°C; the MAX8512 is tested with 2.45V output, unless otherwise noted.) (Note 2)Note 2: Limits are 100% tested at +25°C. Limits over operating temperature range are guaranteed by design.Note 3: Dropout is defined as V IN - V OUT when V OUT is 100mV below the value of V OUT for V IN = V OUT + 0.5V.Note 4: Time needed for V OUT to reach 90% of final value.(V IN = V OUT + 0.5V, C IN = 1μF, C OUT = 1μF, C BP = 10nF, T A = +25°C, unless otherwise noted.)PARAMETER SYMBOLCONDITIONSMINTYP MAXUNITSOutput Noise Voltage (RMS)f = 100Hz to 100kHz, I LOAD = 10mA MAX851011µVMAX8511/MAX8512230f = 100Hz to 100kHz, I LOAD = 80mA MAX851013MAX8511/MAX8512230Shutdown Exit Delay R LOAD = 50Ω (Note 4)300µs SHDN Logic Low Level V IN = 2V to 6V 0.4V SHDN Logic High Level V IN = 2V to 6V 1.5V SHDN Input Bias Current V IN = 6V, V SHDN = 0V or 6VT A = +25°C µA T A = +85°C 0.01FB Input Bias Current (MAX8512)V IN = 6V,V FB = 1.3VT A = +25°C 0.0060.1µA T A = +85°C0.01Thermal Shutdown 160°C Thermal-Shutdown Hysteresis10°C MAX8510OUTPUT VOLTAGE ACCURACYvs. LOAD CURRENTM A X 8510 t o c 02LOAD CURRENT (mA)% D E V I A T I O N (%)10080604020-0.4-0.200.20.40.6-0.60120MAX8510OUTPUT VOLTAGE ACCURACYvs. TEMPERATURETEMPERATURE (°C)% D E V I A T I O N (%)603510-15-0.8-0.6-0.4-0.200.20.40.60.81.0-1.0-4085MAX8510OUTPUT VOLTAGE vs. INPUT VOLTAGEINPUT VOLTAGE (V)O U T P U T V O L T A G E (V )543210.51.01.52.02.53.00.06MAX8512Low-Dropout, 120mA Linear RegulatorsElectrical Characteristics (continued)Typical Operating Characteristics(V IN = V OUT + 0.5V, C IN = 1μF, C OUT = 1μF, C BP = 10nF, T A = +25°C, unless otherwise noted.)MAX8510DROPOUT VOLTAGE vs. OUTPUT VOLTAGEOUTPUT (V)D R O P O U T V O L T A G E (m V )3.02.82.62.42.2501001502002502.03.2MAX8510GROUND PIN CURRENT vs. TEMPERATUREM A X 8510 t o c 08TEMPERATURE (°C)G R O U N D P I N C U R R E N T (µA )603510-153540455030-4085MAX8510OUTPUT NOISE400µs/divMAX8510GROUND PIN CURRENT vs. INPUT VOLTAGEINPUT VOLTAGE (V)G R O U N D P I N C U R R E N T (µA )43211502005010025030035005MAX8510PSRR vs. FREQUENCYFREQUENCY (kHz)P S R R (d B )1101000.14050601020307080900.011000MAX8510OUTPUT NOISE SPECTRAL DENSITYvs. FREQUENCYMAX8510 toc12FREQUENCY (kHz)O U T P U T N O I S E D E N S I T Y (n V /H z )0.11101001.E+031.E+021.E+041.E+010.011000MAX8510DROPOUT VOLTAGE vs. LOAD CURRENTLOAD CURRENT (mA)D R O P O U T V O L T A G E (m V )1008060402030609012015000120MAX8510GROUND PIN CURRENT vs. LOAD CURRENTLOAD CURRENT (mA)G R O U N D P I N C U R R E N T (µA )10080604020408012016020024000120MAX8511PSRR vs. FREQUENCYFREQUENCY (kHz)P S R R (d B )0.111010040506010203070809000.011000MAX8512Low-Dropout, 120mA Linear RegulatorsTypical Operating Characteristics (continued)(V IN = V OUT + 0.5V, C IN = 1μF, C OUT = 1μF, C BP = 10nF, T A= +25°C, unless otherwise noted.)MAX8510LOAD TRANSIENT RESPONSE1ms/div V OUT 10mV/divMAX8510EXITING SHUTDOWN WAVEFORM20µs/divV OUT = 2.85VR LOAD = 47ΩOUTPUT VOLTAGE 2V/divSHUTDOWN VOLTAGEMAX8510LOAD TRANSIENT RESPONSE NEAR DROPOUT1ms/divV OUT 10mV/divMAX8510ENTERING SHUTDOWN DELAY40µs/divC BP = 0.01µFOUTPUT VOLTAGE 2V/divSHUTDOWN VOLTAGEMAX8510REGION OF STABLE C OUT ESRvs. LOAD CURRENTM A X 8510 t o c 20LOAD CURRENT (mA)C O U T E S R (Ω)806040200.11101000.01120100STABLE REGIONMAX8510OUTPUT NOISE vs. BP CAPACITANCEM A X 8510 t o c 13BP CAPACITANCE (nF)O U T P U T N O I S E (µV )1051015202501100MAX8510LINE TRANSIENT RESPONSE200µs/divV IN = 3.5V TO 4VV OUT 2mV/divMAX8510SHUTDOWN EXIT DELAY20µs/divV OUT 1V/divSHUTDOWN VOLTAGEV OUT = 3V C BP = 100nFMAX8512Low-Dropout, 120mA Linear RegulatorsTypical Operating Characteristics (continued)Detailed DescriptionThe MAX8510/MAX8511/MAX8512 are ultra-low-noise, low-dropout, low-quiescent current linear regulators designed for space-restricted applications. The parts are available with preset output voltages ranging from 1.5V to 4.5V in 100mV increments. These devices can supply loads up to 120mA. As shown in the Functional Diagram , the MAX8510/MAX8511 consist of an innovative bandgap core and noise bypass circuit, error amplifier, P-channel pass transistor, and internal feedback voltage-divider. The MAX8512 allows for adjustable output with an external feedback network.The 1.225V bandgap reference is connected to the error amplifier’s inverting input. The error amplifier compares this reference with the feedback voltage and amplifies the difference. If the feedback voltage is lower than the refer-ence voltage, the pass-transistor gate is pulled low. This allows more current to pass to the output and increases the output voltage. If the feedback voltage is too high, the pass transistor gate is pulled high, allowing less cur-rent to pass to the output. The output voltage is fed back through an internal resistor voltage-divider connected to the OUT pin.An external bypass capacitor connected to BP (MAX8510) reduces noise at the output. Additional blocks include a current limiter, thermal sensor, and shutdown logic.Internal P-Channel Pass TransistorThe MAX8510/MAX8511/MAX8512 feature a 1Ω (typ) P-channel MOSFET pass transistor. This provides sev-eral advantages over similar designs using a PNP pass transistor, including longer battery life. The P-channel MOSFET requires no base drive, which considerably reduces quiescent current. PNP-based regulators waste considerable current in dropout when the pass transistor saturates. They also use high base-drive current under heavy loads. The MAX8510/MAX8511/MAX8512 do not suffer from these problems and consume only 40μA of quiescent current in light load and 220μA in dropout (see the Typical Operating Characteristics ).Output Voltage SelectionThe MAX8510/MAX8511 are supplied with factory-set output voltages from 1.5V to 4.5V, in 100mV increments (see Ordering Information ). The MAX8512 features a user-adjustable output through an external feedback net-work (see the Typical Operating Circuits ).To set the output of the MAX8512, use the following equa-tion:OUT REF V R1R2X -1V=where R2 is chosen to be less than 240kΩ and V REF = 1.225V. Use 1% or better resistors.PINNAMEFUNCTIONMAX8510MAX8511MAX8512SC70TDFN -EP SC70TDFN -EP SC70TDFN -EP 151515IN Unregulated Input Supply 232323GNDGround343434SHDN Shutdown. Pull low to disable the regulator.42————BP Noise Bypass for Low-Noise Operation. Connect a 10nF capacitor from BP to OUT. BP is shorted to OUT in shutdown mode.————42FB Adjustable Output Feedback Point575757OUT Regulated Output Voltage. Bypass with a capacitor to GND. See the Capacitor Selection and Regulator Stability section for more details.—1, 6, 841, 2, 6,—1, 6, 8N.C.No connection. Not internally connected.——————EPExposed Pad (TDFN Only). Internally connected to GND. Connect to a large ground plane to maximize thermal performance. Not intended as an electrical connection point.MAX8512Low-Dropout, 120mA Linear RegulatorsPin DescriptionShutdownThe MAX8510/MAX8511/MAX8512 feature a low-power shutdown mode that reduces quiescent current less than 1μA. Driving SHDN low disables the voltage reference, error amplifier, gate-drive circuitry, and pass transistor (see the Functional Diagram), and the device output enters a high-impedance state. Connect SHDN to IN for normal operation.Current LimitThe MAX8510/MAX8511/MAX8512 include a current lim-iter, which monitors and controls the pass transistor’s gate voltage, limiting the output current to 200mA. For design purposes, consider the current limit to be 130mA (min) to 300mA (max). The output can be shorted to ground for an indefinite amount of time without damaging the part. Thermal-Overload ProtectionThermal-overload protection limits total power dissipation in the MAX8510/MAX8511/MAX8512. When the junction temperature exceeds T J = +160°C, the thermal sensor signals the shutdown logic, turning off the pass transis-tor and allowing the IC to cool down. The thermal sensor turns the pass transistor on again after the IC’s junction temperature drops by 10°C, resulting in a pulsed output during continuous thermal-overload conditions.Thermal-overload protection is designed to protect the MAX8510/MAX8511/MAX8512 in the event of a fault con-dition. For continual operation, do not exceed the abso-lute maximum junction temperature rating of T J = +150°C. Operating Region and Power DissipationThe MAX8510/MAX8511/MAX8512 maximum power dis-sipation depends on the thermal resistance of the case and circuit board, the temperature difference between the die junction and ambient, and the rate of airflow. The power dissipation across the device is:P = I OUT (V IN - V OUT)The maximum power dissipation is:P MAX = (T J - T A) / (θJC + θCA)where T J - T A is the temperature difference between the MAX8510/MAX8511/MAX8512 die junction and the sur-rounding air, θJC is the thermal resistance of the package, and θCA is the thermal resistance through the PC board, copper traces, and other materials to the surrounding air. The GND pin of the MAX8510/MAX8511/MAX8512 per-forms the dual function of providing an electrical connec-tion to ground and channeling heat away. Connect the GND pin to ground using a large pad or ground plane.Noise ReductionFor the MAX8510, an external 0.01μF bypass capaci-tor between BP and OUT with innovative noise bypass scheme reduces output noises dramatically, exhibiting 11μV RMS of output voltage noise with C BP = 0.01μF and C OUT = 1μF. Startup time is minimized by a poweron cir-cuit that precharges the bypass capacitor. Applications InformationCapacitor Selectionand Regulator StabilityUse a 1μF capacitor on the MAX8510/MAX8511/MAX8512 input and a 1μF capacitor on the output. Larger input capacitor values and lower ESRs provide better noise rejection and line-transient response. Reduce output noise and improve load-transient response, stability, and power-supply rejection by using large output capacitors. Note that some ceramic dielectrics exhibit large capaci-tance and ESR variation with temperature. With dielec-trics such as Z5U and Y5V, it may be necessary to use a 2.2μF or larger output capacitor to ensure stability at temperatures below -10°C. With X7R or X5R dielectrics, 1μF is sufficient at all operating temperatures. A graph of the region of stable C OUT ESR vs. load current is shown in the Typical Operating Characteristics.Use a 0.01μF bypass capacitor at BP (MAX8510) for low-output voltage noise. The leakage current going into the BP pin should be less than 10nA. Increasing the capaci-tance slightly decreases the output noise. Values above 0.1μF and below 0.001μF are not recommended. Noise, PSRR, and Transient ResponseThe MAX8510/MAX8511/MAX8512 are designed to deliv-er ultra-low noise and high PSRR, as well as low dropout and low quiescent currents in battery-powered systems. The MAX8510 power-supply rejection is 78dB at 1kHz and 54dB at 100kHz. The MAX8511/MAX8512 PSRR is 72dB at 1kHz and 46dB at 100kHz (see the Power-Supply Rejection Ratio vs. Frequency graph in the Typical Operating Characteristics).When operating from sources other than batteries, improved supply-noise rejection and transient response can be achieved by increasing the values of the input and output bypass capacitors, and through passive filter-ing techniques. The Typical Operating Characteristics show the MAX8510/MAX8511/MAX8512 line- and load-transient responses.MAX8512Low-Dropout, 120mA Linear RegulatorsDropout VoltageA regulator’s minimum dropout voltage determines the lowest usable supply voltage. In battery-powered sys-tems, this determines the useful end-of-life battery volt-age. Because the MAX8510/MAX8511/MAX8512 use aP-channel MOSFET pass transistor, their dropout voltage is a function of drain-to-source on-resistance (RDS(ON)) multiplied by the load current (see the Typical Operating Characteristics ).MAX8512Low-Dropout, 120mA Linear RegulatorsFunctional Diagram*xy is the output voltage code (see Output Voltage Selector Guide). Other versions between 1.5V and 4.5V are available in 100mV increments. Contact factory for other versions.**EP = Exposed pad.+Denotes a lead(Pb)-free/RoHS-compliant package.T = Tape and reel.(Note: Standard output voltage options, shown in bold , are available. Contact the factory for other output voltages between 1.5V and 4.5V. Minimum order quantity is 15,000 units.)PART*TEMP RANGE PIN-PACKAGE MAX8510MXK33/PR3+-55°C to +110°C 5 SC70MAX8510ETAxy+T -40°C to +85°C 8 TDFN-EP** 2mm x 2mm MAX8511EXKxy+T -40°C to +85°C 5 SC70MAX8511ETAxy+T -40°C to +85°C 8 TDFN-EP** 2mm x 2mm MAX8512EXK+T -40°C to +85°C 5 SC70MAX8512ETA+T-40°C to +85°C8 TDFN-EP** 2mm x 2mmPARTV OUT (V)TOP MARKMAX8510EXK16+T 1.6AEX MAX8510EXK18+T 1.8AEA MAX8510ETA25+T 2.5AAO MAX8510EXK27+T 2.7ATD MAX8510ETA28+T 2.8AAR MAX8510EXK29+T 2.85ADS MAX8510MXK33/PR3+ 3.3AUV MAX8510ETA30+T 3AAS MAX8510ETA33+T 3.3AAT MAX8510ETA45+T 4.5AAU MAX8510MXK33/PR3+ 3.3AUV MAX8511EXK15+T 1.5ADU MAX8511ETA18+T 1.8AAV MAX8511ETA25+T 2.5AAP MAX8511ETA26+T 2.6AAW MAX8511EXK28+T 2.8AFA MAX8511ETA29+T 2.85AAX MAX8511EXK89+T 2.9AEH MAX8511EXK31+T 3.1ARS MAX8511ETA33+T 3.3AAY MAX8511EXK45+T4.5AEJ MAX8512ETA+TAdjustableAAQPACKAGE TYPE PACKAGE CODE OUTLINE ND PATTERN NO.8 TDFN T822+121-016890-00645 SC70X5+121-007690-0188MAX8512Low-Dropout, 120mA Linear RegulatorsTypical Operating Circuits (continued)Ordering Information (continued)Output Voltage Selector GuidePackage InformationFor the latest package outline information and land patterns (footprints), go to /packages . Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.Chip InformationPROCESS: BiCMOSREVISION NUMBERREVISION DATE DESCRIPTIONPAGES CHANGED 48/11Corrected errors and added lead-free packages 1, 2, 3, 6, 955/19Updated Output Voltage Selector Guide9Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.MAX8512Low-Dropout, 120mA Linear RegulatorsRevision HistoryFor pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https:///en/storefront/storefront.html.。
500mA 低噪声 LDO 电压调节器 使用手册说明书
Rev. 2.0.5GENERAL DESCRIPTIONThe SPX3819 is a positive voltage regulator with a low dropout voltage and low noise output. In addition, this device offers a very low ground current of 800μA at 100mA output. The SPX3819 has an initial tolerance of less than 1% max and a logic compatible ON/OFF switched input. When disabled, power consumption drops to nearly zero. Other key features include reverse battery protection, current limit, and thermal shutdown. The SPX3819 includes a reference bypass pin for optimal low noise output performance. With its very low output temperature coefficient, this device also makes a superior low power voltage reference.The SPX3819 is an excellent choice for use in battery-powered applications such as cordless telephones, radio control systems, and portable computers. It is available in several fixed output voltage options or with an adjustable output voltage.This device is offered in 8 pin NSOIC, 8 pin DFN and 5-pin SOT-23 packages. APPLICATIONS•Portable Consumer Equipment •Portable Instrumentation•Industrial Equipment•SMPS Post RegulatorsFEATURES•Low Noise: 40μV Possible•High Accuracy: 1%•Reverse Battery Protection•Low Dropout: 340mV at Full Load•Low Quiescent Curre nt: 90μA•Zero Off-Mode Current•Fixed & Adjustable Output Voltages: −1.2V, 1.5V, 1.8V, 2.5V, 3.0V, 3.3V & 5.0VFixed Output Voltages−≥1.235V Adjustable Output Voltages •Available in RoHS Compliant, Lead Free Packages:−5-pin SOT-23, 8-pin SOIC and 8-pin DFNTYPICAL APPLICATION DIAGRAMFig. 1: SPX3819 Application CircuitABSOLUTE MAXIMUM RATINGSThese are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.V IN, EN ..................................................... -20V to +20V Storage Temperature .............................. -65°C to 150°C Junction Temperature .......................................... 150°C Power Dissipation ................................ Internally Limited Lead Temperature (Soldering, 5 sec) ..................... 260°C ESD Rating (HBM - Human Body Model) .................... 1kV OPERATING RATINGSInput Voltage Range V IN................................ 2.5V to 16V Enable Pin EN ............................................... 0.0V to V IN Junction Temperature Range ................. -40°C to +125°C Thermal Resistance1..................................................... θJA (SOT23-5) ...............................................191°C/W θJA (NSOIC-8) ............................................ 128.4°C/W θJA (DFN-8) ................................................... 59°C/W Note 1: The maximum allowable power dissipation is a function of maximum operating junction temperature, T J(max) the junction to ambient thermal resistance, and theambient θJA, and the ambient temperature T A. The maximum allowable power dissipation at any ambient temperature is given: P D(max)= (T J(max)-T A)/θJA, exceeding the maximum allowable power limit will result in excessive die temperature; thus, the regulator will go into thermal shutdown.ELECTRICAL SPECIFICATIONSSpecifications with standard type are for an Operating Junction Temperature of T J = 25°C only; limits applying over the full Operating Junction Temperature range are denoted by a “•”. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at T J = 25°C, and are provided for reference purposes only. Unless otherwise indicated, V IN = V OUT + 1V (V IN = V OUT + 1.2V for 1.2V option), I L= 100µA, C L = 1µF, V EN≥ 2.5V, T A= T J = 25°C.Parameter Min. Typ. Max. Units ConditionsOutput Voltage Tolerance -1 +1%-2 +2 •Output Voltage TemperatureCoefficient 57 ppm/°CLine Regulation 0.04 0.1%/VV IN = V OUT +1 to 16V and V EN≤ 6V0.2 • V IN = V EN = V OUT +1 ≤ 8V0.2 V IN = V EN = V OUT +1 ≤16VT A = 25°C to 85°CLoad Regulation 0.05 0.4 % I L= 0.1mA to 500mADropout Voltage (V IN-V OUT) 210 60mVI L = 100µA80 •125 175I L= 50mA250 •180 350I L= 150mA450 •340 550I L= 500mA700 •Quiescent Current (I GND) 0.05 3µAV ENABLE≤ 0.4V8 • V ENABLE = 0.25VGround Pin Current (I GND) 90 150µAI L = 100µA190 •250 650I L= 50mA900 •1.02.0mAI L= 150mA2.5 •6.5 25.0I L= 500mA30.0 •Ripple Rejection (PSRR) 70 dBParameterMin. Typ. Max. Units ConditionsCurrent Limit (I LIMIT )800 mAV OUT =0V 950 • Output Noise (e NO )300 µV RMS I L = 10mA, C L = 1.0µF, C IN = 1µF, (10Hz – 100kHz)40 µV RMS I L = 10mA, C L = 1.0µF, C BYP = 1µF, C IN = 1µF, (10Hz – 100kHz) Input Voltage Level Logic Low (V IL )0.4 V OFF Input Voltage Level Logic High (V IH )2 V ONENABLE Input Current0.01 2 µAVIL ≤ 0.4V VIH ≥ 2.0V320Note 2: Not applicable to output voltage 2V or less.PIN ASSIGNMENTFig. 2: SPX3819 Pin AssignmentPIN DESCRIPTIONName Pin #nSOICPin # DFN Pin # SOT-23 DescriptionVIN 2 3 1 Supply Input GND 5, 6, 7, 87 2 GroundVOUT 3 5 5 Regulator OutputEN 113Enable(input). CMOS compatible control input. Logic high – enable; logic low or open = shutdownADJ 4 8 4Adjust able part only. Feedback input. Connect to resistive voltage-divider networkBYP Fixed version only. Internal reference bypass pin. Connect 10nF to ground to reduce thermal noise on the output. NC-2, 4, 6-No ConnectORDERING INFORMATION(1)Part Number Operating Temperature Range Lead-Free Package Packaging Method SPX3819M5-L/TR-40°C≤T J≤+125°C Yes(2)SOT-23-5Tape & ReelSPX3819M5-L-1-2/TRSPX3819M5-L-1-5/TRSPX3819M5-L-1-8/TRSPX3819M5-L-2-5/TRSPX3819M5-L-3-0/TRSPX3819M5-L-3-3/TRSPX3819M5-L-5-0/TRSPX3819R2-L/TRDFN-8 SPX3819R2-L-1-2/TRSPX3819S-L/TRNSOIC-8 SPX3819S-L-5-0/TRNOTES:1.Refer to /SPX3819 for most up-to-date Ordering Information2.Visit for additional information on Environmental Rating.TYPICAL PERFORMANCE CHARACTERISTICSFig. 3: Ground Current vs Load Current Fig. 4: Ground Current vs Input VoltageFig. 5 Ground Current vs Load Current in Dropout Fig. 6 Output Voltage vs Input VoltageFig. 7 Dropout Voltage vs Load Current Fig. 8 Output Voltage vs Load CurrentFig. 9 Ground Current vs Temperature with 100μA LoadFig. 10 Ground Current vs Temperature with 50mA LoadFig. 11 Ground Current vs Temperature with 500mA LoadFig. 12 Ground Current vs Temperature in DropoutFig. 13 ENABLE Voltage, ON threshold, vs Input VoltageFig. 14 Output Voltage vs TemperatureFig. 15 Output Noise vs Bypass Capacitor Value IL = 10mA,10Hz - 100kHzFig. 16 Line Transient Response for 3.3V DeviceFig. 17 Load Transient Response for 3.3V DeviceAPPLICATION INFORMATIONThe SPX3819 requires an output capacitor for device stability. Its value depends upon the application circuit. In general, linear regulator stability decreases with higher output currents.In applications where the SPX3819 is sourcing less current, a lower output capacitance may be sufficient. For example, a regulator outputting only 10mA, requires approximately half the capacitance as the same regulator sourcing 150mA.Bench testing is the best method for determining the proper type and value of the capacitor since the high frequency characteristics of electrolytic capacitors vary widely, depending on type and manufacturer. A high quality 2.2μF aluminum electrolytic capacitor works in most application circuits, but the same stability often can be obtained with a1μF tantalum electrolytic.With the SPX3819 adjustable version, the minimum value of output capacitance is a function of the output voltage. The value decreases with higher output voltages, since closed loop gain is increased.T YPICAL A PPLICATIONS C IRCUITSFor fixed voltage options only. A 10nF capacitor on the BYP pin will significantly reduce output noise, but it may be left unconnected if the output noise is not a major concern. The SPX3819 start-up speed is inverselyproportional to the size of the BYP capacitor.Applications requiring a slow rampup of the output voltage should use a larger CBYP. However, if a rapid turn-on is necessary, the BYP capacitor can be omitted.The SPX3819’s internal reference is available through the BYP pin.Figure 18 represents a SPX3819 standard application circuit. The EN (enable) pin is pulled high (>2.0V) to enable the regulator. To disable the regulator, EN < 0.4V.Fig. 18: Standard Application Circuit The SPX3819 in Figure 19 illustrates a typical adjustable output voltage configuration. Two resistors (R1 and R2) set the output voltage. The output voltage is calculated using the formula:VOUT = 1.235V x [1 + R1/R2]R2 must be >10kΩand for best results, R2 should be bet ween 22kΩ and 47kΩ.Fig. 19: Typical Adjustable Output Voltage ConfigurationMECHANICAL DIMENSIONS 8-PIN SOICNMECHANICAL DIMENSIONS(CONTINUED) 8-PIN 2X3DFNRECOMMENDED LAND PATTERN AND STENCIL8-PIN 2X3DFNMECHANICAL DIMENSIONS(CONTINUED) 5-PIN SOT-23REVISION HISTORY RevisionDate Description 2.0.008/23/12 Reformat of Datasheet Addition of SPX3819R2-L and SPX3819R2-L/TR part numbers 2.0.112/02/13 Added Storage Temperature Range and Junction Temperature in ABS MAX Ratings.2.0.205/20/14 Updated package drawings and corrected DFN-8 package marking information [ECN 1423-03 6/3/14] 2.0.308/31/16 Updated logo and Ordering Information table. 2.0.407/19/18 Update to MaxLinear logo. Updated format and Ordering Information. Clarified ADJ and BYP pin. Correct y-axis on Figure 14. Updated ESD rating. 2.0.5 12/05/19 Corrected table alignment on last 5 specs of the Electrical Specifications table.C ORPORATE H EADQUARTERS :5966 La Place CourtSuite 100Carlsbad, CA 92008Tel.: +1 (760) 692-0711Fax: +1 (760) 444-8598The content of this document is furnished for informational use only, is subject to change without notice, and should not be construed as a commitment by Maxlinear, Inc. Maxlinear, I nc. Assumes no responsibility or liability for any errors or inaccuracies that may appear in the informational content contained in this guide. Complying with all applicable copyright laws is the responsibility of the user. Without limiting the rights under copyright, no part of this document may be reproduced into, stored in, or introduced into a retrieval system, or transmitted in any form or by any means (electronic, mechanical, photocopying, recording, or otherwise), or for any purpose, without the express written permission of Maxlinear, Inc.Maxlinear, Inc. Does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Maxlinear, Inc. Receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of Maxlinear, Inc. Is adequately protected under the circumstances.Maxlinear, Inc. May have patents, patent applications, trademarks, copyrights, or other intellectual property rights covering subject matter in this document. Except as expressly provided in any written license agreement from Maxlinear, Inc., the furnishing of this document does not give you any license to these patents, trademarks, copyrights, or other intellectual property.Maxlinear, the Maxlinear logo, and any Maxlinear trademarks, MxL, Full-Spectrum Capture, FSC, G.now, AirPHY and the Maxlinear logo are all on the products sold, are all trademarks of Maxlinear, I nc. or one of Maxlinear’s subsidiaries in the U.S.A. and other countries. All rights reserved. Other company trademarks and product names appearing herein are the property of their respe ctive owners.© 2012 - 2019 Maxlinear, Inc. All rights reserved.。
KF33中文资料
1/17January 2004s VERY LOW DROPOUT VOLTAGE (0.4V)sVERY LOW QUIESCENT CURRENT (TYP .50µA IN OFF MODE,500µA IN ON MODE)s OUTPUT CURRENT UP TO 500mA sLOGIC-CONTROLLED ELECTRONIC SHUTDOWNsOUTPUT VOLTAGES OF 1.25;1.5;2.5;2.7;3;3.3;3.5;4;4.5;4.7;5;5.2;5.5;6;8;8.5;12Vs INTERNAL CURRENT AND THERMAL LIMIT s ONLY 2.2µF FOR STABILITYs AVAILABLE IN ±2%ACCURACY AT 25°C sSUPPLY VOLTAGE REJECTION:70db (TYP .)sTEMPERATURE RANGE:-40TO 125°CDESCRIPTIONThe KF00series are very Low Drop regulators availablein SO-8package and in a wide range of output voltages.The very Low Drop voltage (0.4V)and the very low quiescent current make them particularlysuitable for Low Noise,Low Power applications and specially in battery powered systems.A Shutdown Logic Control function is available (pin 5,TTL compatible).This means that when the device is used as a local regulator,it is possible to put a part of the board in standby,decreasing the total power consumption.It requires only a 2.2µF capacitor for stability allowing space and cost saving.KF00SERIESVERY LOW DROPVOLTAGE REGULATORS WITHINHIBITKF002/17ABSOLUTE MAXIMUM RATINGSAbsolute Maximum Ratings are those values beyond which damage to the device may occur.Functional operation under these condition is not implied.THERMAL DATACONNECTION DIAGRAM (top view)ORDERING CODES(*)Available on request.(#)Available in Tape &Reel with the suffix "-TR".Symbol ParameterValue Unit V I DC Input Voltage -0.5to 20VI O Output Current Internally Limited P tot Power DissipationInternally LimitedT stg Storage Temperature Range-40to 150°C T opOperating Junction Temperature Range-40to 125°C Symbol ParameterDPAK SO-8Unit R thj-caseThermal Resistance Junction-case820°C/WTYPE SO-8(#)DPAK(#)OUTPUT VOLTAGEKF12(*)KF12BD KF12BDT 1.25V KF15KF15BD KF15BDT 1.5V KF25KF25BD KF25BDT 2.5V KF27KF27BD KF27BDT 2.7V KF30KF30BD KF30BDT 3V KF33KF33BD KF33BDT 3.3V KF35KF35BD KF35BDT 3.5V KF40KF40BD KF40BDT 4V KF45(*)KF45BD KF45BDT 4.5V KF47KF47BD KF47BDT 4.75V KF50KF50BD KF50BDT 5V KF52KF52BD KF52BDT 5.2V KF55(*)KF55BD KF55BDT 5.5V KF60KF60BD KF60BDT 6V KF80KF80BD KF80BDT 8V KF85KF85BD KF85BDT 8.5V KF120KF120BDKF120BDT12VKF003/17TEST CIRCUITSELECTRICAL CHARACTERISTICS FOR KF12(refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =3.3V1.225 1.251.275VI O =50mA,V I =3.3V,T a =-25to 85°C 1.2 1.3V I Operating Input Voltage I O =500mA2.520V I O Output Current Limit 1A ∆V O Line Regulation V I =2.5to 20V,I O =5mA 212mV ∆V O Load Regulation V I =2.8V,I O =5to 500mA250mV I dQuiescent CurrentV I =2.5to 20V,I O =0mA (ON MODE)0.51mA V I =2.6to 20V,I O =500mA 12V I =6V(OFF MODE)50100µA SVR Supply Voltage RejectionI O =5mA V I =3.5±1V f =120Hz 82dBf =1KHz 77f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 1.25V V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFKF004/17ELECTRICAL CHARACTERISTICS FOR KF15(refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR KF25(refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =3.5V1.47 1.51.53VI O =50mA,V I =3.5V,T a =-25to 85°C 1.44 1.56V I Operating Input Voltage I O =500mA2.520V I O Output Current Limit 1A ∆V O Line Regulation V I =2.5to 20V,I O =5mA 212mV ∆V O Load Regulation V I =2.8V,I O =5to 500mA250mV I dQuiescent CurrentV I =2.5to 20V,I O =0mA (ON MODE)0.51mA V I =2.8to 20V,I O =500mA 12V I =6V(OFF MODE)50100µA SVR Supply Voltage RejectionI O =5mA V I =3.5±1V f =120Hz 82dBf =1KHz 77f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 1V V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =4.5V2.45 2.52.55VI O =50mA,V I =4.5V,T a =-25to 85°C 2.42.6V I Operating Input Voltage I O =500mA20V I O Output Current Limit 1A ∆V O Line Regulation V I =3.5to 20V,I O =5mA 212mV ∆V O Load Regulation V I =3.8V,I O =5to 500mA250mV I dQuiescent CurrentV I =3.5to 20V,I O =0mA (ON MODE)0.51mA V I =3.8to 20V,I O =500mA 12V I =6V(OFF MODE)50100µA SVR Supply Voltage RejectionI O =5mA V I =4.5±1V f =120Hz 82dBf =1KHz 77f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFKF005/17ELECTRICAL CHARACTERISTICS FOR KF27(refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR KF30(refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =4.7V2.646 2.72.754VI O =50mA,V I =4.7V,T a =-25to 85°C 2.5922.808V I Operating Input Voltage I O =500mA20V I O Output Current Limit 1A ∆V O Line Regulation V I =3.7to 20V,I O =5mA 212mV ∆V O Load Regulation V I =4V,I O =5to 500mA250mV I dQuiescent CurrentV I =3.7to 20V,I O =0mA(ON MODE)0.51mA V I =4to 20V,I O =500mA12V I =6V(OFF MODE)50100µA SVRSupply Voltage RejectionI O =5mA V I =4.7±1V f =120Hz 82dBf =1KHz 77f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V dDropout VoltageI O =200mA 0.20.35V I O =500mA0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =5V2.9433.06VI O =50mA,V I =5V,T a =-25to 85°C 2.883.12V I Operating Input Voltage I O =500mA20V I O Output Current Limit 1A ∆V O Line Regulation V I =4to 20V,I O =5mA 212mV ∆V O Load Regulation V I =4.3V,I O =5to 500mA250mV I dQuiescent CurrentV I =4to 20V,I O =0mA (ON MODE)0.51mA V I =4.3to 20V,I O =500mA 12V I =6V(OFF MODE)50100µA SVR Supply Voltage RejectionI O =5mA V I =5±1Vf =120Hz 81dBf =1KHz 76f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFKF006/17ELECTRICAL CHARACTERISTICS FOR KF33(refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR KF35(refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =5.3V3.234 3.33.366VI O =50mA,V I =5.3V,T a =-25to 85°C 3.1683.432V I Operating Input Voltage I O =500mA20V I O Output Current Limit 1A ∆V O Line Regulation V I =4.3to 20V,I O =5mA 212mV ∆V O Load Regulation V I =4.6V,I O =5to 500mA250mV I dQuiescent CurrentV I =4.3to 20V,I O =0mA (ON MODE)0.51mA V I =4.6to 20V,I O =500mA 12V I =6V(OFF MODE)50100µA SVR Supply Voltage RejectionI O =5mA V I =5.3±1V f =120Hz 80dBf =1KHz 75f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =5.5V3.43 3.53.57VI O =50mA,V I =5.5V,T a =-25to 85°C 3.363.64V I Operating Input Voltage I O =500mA20V I O Output Current Limit 1A ∆V O Line Regulation V I =4.5to 20V,I O =5mA 212mV ∆V O Load Regulation V I =4.8V,I O =5to 500mA250mV I dQuiescent CurrentV I =4.5to 20V,I O =0mA (ON MODE)0.51mA V I =4.8to 20V,I O =500mA 12V I =6V(OFF MODE)50100µA SVR Supply Voltage RejectionI O =5mA V I =5.5±1V f =120Hz 79dBf =1KHz 74f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C O Output Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFKF007/17ELECTRICAL CHARACTERISTICS FOR KF40(refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR KF45(refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =6V3.9244.08VI O =50mA,V I =6V,T a =-25to 85°C 3.844.16V I Operating Input Voltage I O =500mA20V I O Output Current Limit 1A ∆V O Line Regulation V I =5to 20V,I O =5mA 318mV ∆V O Load Regulation V I =5.3V,I O =5to 500mA250mV I dQuiescent CurrentV I =5to 20V,I O =0mA (ON MODE)0.51mA V I =5.3to 20V,I O =500mA 12V I =6V(OFF MODE)50100µA SVR Supply Voltage RejectionI O =5mA V I =6±1Vf =120Hz 78dBf =1KHz 73f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =6.5V4.41 4.54.59VI O =50mA,V I =6.5V,T a =-25to 85°C 4.324.68V I Operating Input Voltage I O =500mA20V I O Output Current Limit 1A ∆V O Line Regulation V I =5.5to 20V,I O =5mA 318mV ∆V O Load Regulation V I =5.8V,I O =5to 500mA250mV I dQuiescent CurrentV I =5.5to 20V,I O =0mA (ON MODE)0.51mA V I =5.8to 20V,I O =500mA 12V I =6V(OFF MODE)50100µA SVR Supply Voltage RejectionI O =5mA V I =6.5±1V f =120Hz 77dBf =1KHz 72f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFKF008/17ELECTRICAL CHARACTERISTICS FOR KF47(refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR KF50(refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =6.7V4.606 4.74.794VI O =50mA,V I =6.7V,T a =-25to 85°C 4.5124.888V I Operating Input Voltage I O =500mA20V I O Output Current Limit 1A ∆V O Line Regulation V I =5.7to 20V,I O =5mA 318mV ∆V O Load Regulation V I =6V,I O =5to 500mA250mV I dQuiescent CurrentV I =5.7to 20V,I O =0mA (ON MODE)0.51mA V I =6to 20V,I O =500mA 12V I =6V (OFF MODE)50100µA SVR Supply Voltage RejectionI O =5mA V I =6.7±1V f =120Hz 77dBf =1KHz 72f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =7V4.955.1VI O =50mA,V I =7V,T a =-25to 85°C 4.85.2V I Operating Input Voltage I O =500mA20V I O Output Current Limit 1A ∆V O Line Regulation V I =6to 20V,I O =5mA 318mV ∆V O Load Regulation V I =6.3V,I O =5to 500mA250mV I dQuiescent CurrentV I =6to 20V,I O =0mA (ON MODE)0.51mA V I =6.3to 20V,I O =500mA 12V I =6V(OFF MODE)50100µA SVR Supply Voltage RejectionI O =5mA V I =7±1Vf =120Hz 76dBf =1KHz 71f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C O Output Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFKF009/17ELECTRICAL CHARACTERISTICS FOR KF52(refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR KF55(refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =7.2V5.096 5.25.304VI O =50mA,V I =7.2V,T a =-25to 85°C 4.9925.408V I Operating Input Voltage I O =500mA20V I O Output Current Limit 1A ∆V O Line Regulation V I =6.2to 20V,I O =5mA 318mV ∆V O Load Regulation V I =6.5V,I O =5to 500mA250mV I dQuiescent CurrentV I =6.2to 20V,I O =0mA (ON MODE)0.51mA V I =6.5to 20V,I O =500mA 12V I =6V(OFF MODE)50100µA SVR Supply Voltage RejectionI O =5mA V I =7.2±1V f =120Hz 76dBf =1KHz 71f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =7.5V5.39 5.55.61VI O =50mA,V I =7.5V,T a =-25to 85°C 5.285.72V I Operating Input Voltage I O =500mA20V I O Output Current Limit 1A ∆V O Line Regulation V I =6.5to 20V,I O =5mA 318mV ∆V O Load Regulation V I =6.8V,I O =5to 500mA250mV I dQuiescent CurrentV I =6.5to 20V,I O =0mA (ON MODE)0.51mA V I =6.8to 20V,I O =500mA 12V I =6V(OFF MODE)50100µA SVR Supply Voltage RejectionI O =5mA V I =7.5±1V f =120Hz 76dBf =1KHz 71f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFKF0010/17ELECTRICAL CHARACTERISTICS FOR KF60(refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR KF80B (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =8V5.8866.12VI O =50mA,V I =8V,T a =-25to 85°C 5.766.24V I Operating Input Voltage I O =500mA20V I O Output Current Limit 1A ∆V O Line Regulation V I =7to 20V,I O =5mA 424mV ∆V O Load Regulation V I =7.3V,I O =5to 500mA250mV I dQuiescent CurrentV I =7to 20V,I O =0mA (ON MODE)0.7 1.5mA V I =7.3to 20V,I O =500mA 12V I =9V(OFF MODE)70140µA SVR Supply Voltage RejectionI O =5mA V I =8±1Vf =120Hz 75dBf =1KHz 70f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =9V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =10V7.8488.16VI O =50mA,V I =10V,T a =-25to 85°C 7.688.32V I Operating Input Voltage I O =500mA20V I O Output Current Limit 1A ∆V O Line Regulation V I =9to 20V,I O =5mA 424mV ∆V O Load Regulation V I =9.3V,I O =5to 500mA250mV I dQuiescent CurrentV I =9to 20V,I O =0mA(ON MODE)0.7 1.5mA V I =9.3to 20V,I O =500mA 12V I =9V (OFF MODE)70140µA SVRSupply Voltage RejectionI O =5mA V I =10±1V f =120Hz 72dBf =1KHz 67f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V dDropout VoltageI O =200mA 0.20.35V I O =500mA0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =9V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µF11/17ELECTRICAL CHARACTERISTICS FOR KF85B (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR KF120B (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =10.5V8.338.58.67VI O =50mA,V I =10.5V,T a =-25to 85°C 8.168.84V I Operating Input Voltage I O =500mA20V I O Output Current Limit 1A ∆V O Line Regulation V I =9.5to 20V,I O =5mA 424mV ∆V O Load Regulation V I =9.8V,I O =5to 500mA250mV I dQuiescent CurrentV I =9.5to 20V,I O =0mA (ON MODE)0.7 1.5mA V I =9.8to 20V,I O =500mA 12V I =10V(OFF MODE)70140µA SVR Supply Voltage RejectionI O =5mAV I =10.5±1V f =120Hz 67dBf =1KHz 63f =10KHz53eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =10V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =14V11.761212.24VI O =50mA,V I =14V,T a =-25to 85°C 11.5212.48V I Operating Input Voltage I O =500mA20V I O Output Current Limit 1A ∆V O Line Regulation V I =13to 20V,I O =5mA 848mV ∆V O Load Regulation V I =13.3V,I O =5to 500mA250mV I dQuiescent CurrentV I =13to 20V,I O =0mA (ON MODE)0.7 1.5mA V I =13.3to 20V,I O =500mA 12V I =13V(OFF MODE)70140µA SVR Supply Voltage RejectionI O =5mA V I =14±1V f =120Hz 69dBf =1KHz 64f =10KHz54eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =13V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFTYPICAL PERFORMANCE CHARACTERISTICS(unless otherwise specified V O(NOM)=3.3V)Figure1:Dropout Voltage vs Output Current Figure2:Dropout Voltage vs Temperature Figure3:Supply Current vs Input Voltage Figure4:Supply Current vs Input Voltage Figure5:Short Circuit Current vs Input Voltage Figure6:Supply Voltage Rejection vs InputVoltage12/17Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is a registered trademark of STMicroelectronicsAll other names are the property of their respective owners© 2004 STMicroelectronics - All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States.17/17。
A Low-Voltage CMOS Low-Dropout Regulator With Novel Capacitor-Multiplier Frequency Compensation
A Low-Voltage CMOS Low-Dropout Regulator With Novel Capacitor-Multiplier Frequency CompensationZushu Yan1, Liangguo Shen2, Yuanfu Zhao1, Senior Member, IEEE, and Suge Yue1 1 Beijing Microelectronics Technology Institute, Beijing, China 2 Institute of Microelectronics, Peking University, Beijing, China E-mail: yanzushu@ and slg@Abstract—This paper presents a low-voltage, low-quiescent current, low-dropout voltage regulator (LDO) with a novel capacitor-multiplier frequency compensation technique. The proposed compensation strategy can make the LDO stable under the entire load-current range without relying on an ESR zero. By eliminating cascode structure or buffer stage, the proposed LDO facilitates low voltage operation. Moreover, the capacitor-multiplier circuit reduces the on-chip compensation capacitor greatly and can be effectively realized without extra current budget. Implemented in a 0.18-µm CMOS technology, the LDO is able to provide 200mA load current with 160mV dropout voltage while consuming only 20µA ground current. With a 1µF output capacitor, the load-transient output variation is 17mV through maximum current step changes. The on-chip compensation capacitor is reduced to 1pF.Rb Vb Cb -gmb1 Vb1 ro1 c1 (a) -gmb2 Vb2Mb1Ib1 Vb1 Rb ro2 c2Ib1 Vb2Mb2VbCb (b)Fig. 1. (a) capacitor-multiplier topology; (b) practical circuit realizationI. INTRODUCTION With the rapid development of portable power management, low-dropout voltage regulators (LDOs) are widely used to power up subblocks of a system due to their simplicity, small board space, low noise and low cost [1]-[5]. For a LDO structure with off-chip capacitor, the foremost issue is to guarantee loop stability. Traditional equivalent series resistance (ESR) zero compensation method relies on the ESR value, which is not well specified and varies with process and temperature. Even worse, the ESR leads to large output overshoots and undershoots during massive loadcurrent pulses especially for a small output capacitor [1], [5]. An internal zero generated through a voltage-controlled current source (VCCS) can effectively eliminate the requirement of an ESR zero. However, the VCCS consumes more voltage headroom, making it cumbersome in lowvoltage applications [4]. In addition, utilizing cascode or intermediate buffer stage to drive huge pass device also demands high supply voltage to operate, which is usually not available in standard CMOS technologies [1]-[2], [5]-[6]. Integrated capacitors in LDOs usually occupy significant physical space relative to other components like CMOS transistors. Several capacitor-multiplying techniques are reported to minimize the size of compensating capacitors and improve the transient performances [6]-[10]. Rincon-Mora proposed current-mode capacitor-multiplier circuits, which need more quiescent current and incur large random offset toobtain desired amplifying factor [6]-[7]. The capacitance enhancement circuit described by Suryanarayan et al. in [8] achieves big multiplicative gain factor, but the effective bandwidth of this circuit is quite narrow, which prohibits its application in fast LDOs. To circumvent the aforementioned problems, a frequency compensation strategy exploiting a novel capacitormultiplier circuit is proposed to stabilize the LDOs without relying on an ESR zero [9]-[10]. Due to the efficiency of the capacitor-amplifying technique, the compensation capacitors are considerably reduced. Moreover, the LDO can have rapid settling behavior and small output voltage deviations. Finally, the capacitor-multiplier circuit can be embedded in the error amplifier without increasing extra quiescent current. DESIGN OF CAPACITOR-MULTIPLIER CIRCUITS The topology of the capacitor-multiplier circuit is illustrated in Fig. 1(a). The low-impedance node seen by capacitor Cb is realized through shunt-shunt feedback by resistor Rb. The current flowing through Cb is sensed, converted to voltage Vb1, and return to current domain via a voltage-controlled current source gmb2. The amplified capacitance is roughly equal to gmb1RbCb, which can be well controlled. Fig. 2(b) shows a practical circuit of the capacitor multiplier depicted in Fig. 1(a). Since Rb is connected between the drain and source of transistor Mb1, the DC biasing voltage of the circuit is maintained and additional biasing circuits are avoided. Moreover, current-mode capacitor multiplier implemented by current mirrors Mb1 and Mb2 can be used to further enlarge the equivalent capacitance if extra current consumption in Mb1 and Mb2 is not critical [6]-[7]. To investigate the frequency capabilities of the capacitormultiplier circuit in Fig. 1(a), the transfer function from Vb to II.978-1-4244-1684-4/08/$25.00 ©2008 IEEE2685Vin1st stage 2nd stageMpGain (dB)VOUTCb Capacitor-Multiplier Compensation SchemeCapacitor-Multiplier CircuitVREFR1 CL RLPhase (degrees)R2Fig. 3. Structure of the proposed LDOFrequency (Hz)-gmf2CgdFig. 2. Frequency response of the capacitor-multiplier circuitVb1 is derived based on the following considerations: Cb >> C1; ro1 >> Rb >> 1/gmb1, and given as (1) Vb1 s ( g mb1 Rb − 1)CbVb =− g mb1 (1 + s Cb C + s 2 b Rb C1 ) g mb1 g mb1gm1 R o1 Cp1N1g m2 sCm1 o Ro2 Cp2 VN2 I2-gmp sCm2Vo Roeq CL I3 sCbVoVoI1Loop-Broken Point VfbbAs noted in the equation (1), there are high-frequency parasitic poles in the circuit, which can degrade the capability of capacitance amplification at high frequencies. Since most of LDOs operate with closed-loop bandwidth less than 1MHz, these poles can be easily pushed beyond several times the unit gain frequency (UGF) of LDOs by choosing appropriate values of Cb, gmb1 and Rb. Thus, equation (1) can be simplified as Vb1 s( g mb1 Rb − 1)Cb (2) =−Vb g mb1Fig. 4. Small-signal equivalent model of the proposed LDOConsidering the transistor-level implementation in Fig. 1(b), current sources Ib1 and Ib2 both with 4µA quiescent current consumption are realized with PMOS transistors. Rb, Cb and gmb1 are set to 100k , 1pF and 80µS, respectively. The circuit simulation is plotted in Fig. 2. Obviously, the capacitive characteristics of the capacitor-multiplier circuit can be retained up to a frequency of 6.6MHz. III. PROPOSED LDO STRUCTUREThe proposed LDO structure is shown in Fig. 3, which can be viewed as a three-stage amplifier with the pass device Mp as the final stage. The three-stage architecture enhances the loop gain to improve line and load regulations. The pass device can be designed to operate in linear region at dropout to decrease the size of the transistor and parasitic gate capacitance [3]. Thus, the slew rate at the gate of the pass device is increased due to the smaller gate capacitance. Capacitor-multiplier frequency compensation scheme is used to stabilize the proposed LDO through enhanced polesplitting effect [6]-[10]. In addition, the capacitor-multiplier circuit removes the right-half-plane (RHP) zero generated in standard Miller compensation and allows the LDO to achieve stability over entire load-current range by using quite small compensation capacitor Cb.A. Stability Analysis Fig. 4 shows the small-signal equivalent model of the proposed LDO. Frequency-dependent current sources I1, I2 and I3 characterize the capacitor-multiplier circuit, while gmi, Cpi and Roi represent the transconductance, the equivalent parasitic capacitance, and the output resistance of the corresponding gain stages, respectively. The transconductance of Mp is gmp, and gmf2 represents a feedfoward stage. CL and Roeq are the loading capacitor and lumped load resistance including load resistor RL, feedback resistors R1, R2 and output resistor of Mp. Cm1 and Cm2 are equivalent amplified capacitance enlarged by the capacitor-multiplier circuit at nodes N1, N2, respectively. b is the feedback factor R2/(R1+R2). Solving the small-signal equivalent circuit of Fig. 4 with the assumption: CL >> (Cm1, Cm2, Cb, Cp2, Cgd) >> Cp1, the open-loop transfer function L(s) is calculated as in (3) at the bottom of this page. Because gmp and Roeq vary dramatically under large load-current changes, L(s) should be discussed under different load-current conditions. (1) IL=0mA. The current flow in the pass device is minimum, which is about 2µA. Thus, the transconductance gmp is also minimum and CL >> gmpRo1gm2Ro2Cm1. As a result, L(s) in (3) can be approximated to −bg m1Ro1 g m 2 Ro 2 g mp Roeq L( s ) ≈ (4) (1 + sRoeq CL ) 1 + sRo 2 (C p 2 + Cgd ) (1 + sRo1C p1 ) From (4), the dominant pole is 1/(RoeqCL). 1/[Ro2(Cp2+Cgd)] and 1/(Ro1Cp1) are two non-dominant poles, which are located much higher than the UGF of the loop. Thus, the proposed LDO can achieve good phase margin under IL=0.L( s) =−bg m1 Ro1 g m 2 Ro 2 g mp Roeq 1 + sRoeq (C L + g mp Ro1 g m 2 Ro 2Cm1 ) + s 2 Ro 2 (C p 2 + C gd ) R oeq C L + s 3 Ro1C p1 Ro 2 (C p 2 + C gd ) R oeq C L(3)2686(2) When IL increases significantly (>1mA), gmp also increases significantly. Consequently, gmpro1gm2Ro2Cm1 >> CL, and L(s) is simplified asL( s) ≈ −bgm1 Ro1 g m2 Ro 2 g mp Roeq (1 + sRoeqCL ) 1 + s (C p 2 + Cgd )CL C (C + Cgd )CL + s 2 p1 p 2 Cm1 gm 2 Ro1 g mp Cm1 g m2 g mp (5)capacitor-multiplier circuit without degrading the phase margin of the proposed LDO. B. Circuit design The circuit diagram of the proposed LDO is shown in Fig. 5. A 0.6-V bandgap voltage reference is designed to provide the reference voltage VREF to the input of the error amplifier. The non-cascode input stage facilitates the LDO for lowvoltage operation and saves much static power in contrast to the folded-cascode structure in [5]. The capacitor-multiplier circuit is embedded in the current mirror without extra current consumption. This embedded structure eliminates the inaccuracies and mismatches which cause large dc offsets at the output of the LDO comparing the circuit implementation proposed in [10]. The second stage is a rail-to-rail stage, which can completely turn on or off the pass device Mp for large load current changes. According to equation (8), the output resistance of second stage is decreased to reduce the size of Cb by adopting short-channel devices for transistors M5-M8. Also, the short-channel device M7 with small parasitic capacitance can push 1/(Ro1Cp1) to much higher frequency, which helps improve the stability of the proposed LDO. Moreover, the pass device Mp with short-channel length operating in triode region at dropout is chosen to reduce the parasitic capacitance. Rb and Cb are set to 100k , 1pF, respectively, to achieve the multiplicative gain factor around 8. Compared to the capacitor for current-buffer compensation reported in [5], considerable silicon area can be saved by using this proposed compensation scheme. IV. SIMULATION RESULTS AND DISCUSSIONSEquation (5) shows that the UGF of the loop is fixed at bgm1/Cm1 with respect to the load-current changes. When the load current increases from moderate magnitude to heavy condition, the high-frequency poles in L(s) are separated real poles at first, and then become complex poles. The damping factor can be controlled much larger if 1/(Ro1Cp1) is located at much higher frequency. Since the capacitor-multiplier and pole-splitting effects push these non-dominant poles far beyond the UGF, the phase margin of the LDO is nearly 90 . (3) When the load current IL is between 10µA and 1mA, L(s) is approximately a second-order system and can be given asL( s ) ≈≈−bg m1 Ro1 g m 2 Ro 2 g mp Roeq 1 + sRoeq (C L + g mp Ro1 g m 2 Ro 2 Cm1 ) + s 2 Ro 2 (C p 2 + Cgd ) R oeq CL−bgm1 Ro1 g m 2 Ro 2 g mp Roeq (6)Ro 2 (C p 2 + Cgd )CL 1 + sRoeq (CL + g mp Ro1 g m 2 Ro 2Cm1 ) 1 + s CL + g mp Ro1 g m 2 Ro 2Cm1The worst-case stability of the LDO, which occurs at the minimum phase margin of the loop, can be found out by evaluating the expression of phase margin with gmp. Using the similar procedure provided in [5], the minimum phase margin is given asPM min g R C + Cgd = 90 − arc tan m1 o 2 ⋅ p 2 4 Cm1 (7)From (7), the Cm1 can be solved as g m1 Ro 2 (8) Cm1 = ⋅ (C p 2 + C gd ) 4 ⋅ tan(90 − PM min ) As implied in equation (8), Cm1 is proportional to gm1Ro2, which are parameters of different gain stages in the error amplifier. Thus, gm1 and Ro2 can be optimized separately to reduce the value of Cm1. Moreover, the actually physical capacitor Cb can be further reduced through the novelTo verify the proposed capacitor-multiplier frequency compensation technique, the LDO shown in Fig. 5 has been implemented in a 0.18-µm mixed-signal CMOS technology. The input voltage of the LDO is 1.5V with 1.2 output voltage. At this output voltage, the LDO can deliver 200mA output current while consuming only 20µA quiescent current. Fig. 6 shows the simulated loop-gain transfer function with CL=1µF under no-load and full-load conditions. For these cases, the proposed LDO has sufficient phase margin to maintain the loop stable. In addition, the phase margin of2687Full Load Gain (dB)No LoadFull Load No LoadFrequency (Hz)Fig. 6. Frequency responses of the proposed LDOTABLE I: PERFORMANCE SUMMARY OF THE PROPOSED LDO Technology SMIC 0.18-µm CMOS Vout 1.2V Vdrop 160mV@Iout=200mA IL,max 200mA Iq 20µA Current Efficiency at IL,max 99.99% Vout 17mV Settling Time (0.1%) 1.8µs CL 1µF ESR Zero Required NO Line Regulation 1.27mV/V@Iout=200mA Load Regulation 1.8µV/mA@Vdd=1.5V PSRR 70dB@10kHz, Iout=20mAPhase (Degrees)Phase Margin (Degrees)V.CONCLUSIONFig. 7. Phase margin of the proposed LDO under different load currentsA low-voltage low-dropout voltage regulator based on the novel capacitor-multiplier frequency compensation scheme is proposed in this paper. The proposed LDO achieves full load-current stability with only a 1pF internal compensation capacitor. Excellent load transient responses are also accomplished for 200mA current step changes even with 20µA quiescent current consumption. These features make it very attractive for large-current portable power management. REFERENCESG. A. Rincon-Mora and P. E. Allen, “A low-voltage, low quiescent current, low drop-out regulator,” IEEE J. Solid-State Circuits, vol. 33, no. 1, pp. 36–44, Jan. 1998. [2] G. A. Rincon-Mora and P. E. Allen, “Optimized frequency-shaping circuit toplogies for LDO’s,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process, vol. 45, no. 6, pp. 703–708, Jun. 1998. [3] K. N. Leung and P. K. T. Mok, “A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation,” IEEE J. Solid-State Circuits, vol. 38, no. 10, pp. 1691–1702, Oct. 2003. [4] C. K. Chava and J. Silva-Martínez, “A robust frequency compensation scheme for LDO voltage regulators,” IEEE Trans. Circuits Sys. I, Reg. Papers, vol. 51, no. 6, pp. 1041–1050, Jun. 2004. [5] M. Al-Shyoukh, H. Lee and R. Perez, “A transient-enhanced lowquiescent current low-dropout regulator with buffer impedance attenuation,” IEEE J. Solid-State Circuits, vol. 42, no. 8, pp. 1732– 1742, Aug. 2007. [6] G. A. Rincon-Mora, “Active capacitor multiplier in Millercompensated circuits,” IEEE J. Solid-State Circuits, vol. 35, no. 1, pp. 26–32, Jan. 2000. [7] Z. Yan, L. G. Shen and Y. F. Zhao, “Capacitor-multiplier frequency compensation for low-power multistage amplifiers,” in Proc. IEEE Int. Conf. on Electronics, Circuits and Systems, Marrakech, Morocco, Dec. 2007. [8] R. Suryanarayan, A. Gupta and T. N. Blalock, “A slew rate enhancement technique for operational amplifiers based on a tunable active Gm-based capacitance multiplication circuit,” in Proc. the 13th ACM Great Lakes symposium on VLSI, Washington, D. C., USA, Apr. 2003. [9] R. S. Wrathall, “Amplifier circuit for adding a Laplace transform zero in a linear integrated circuit,” U. S. Patent 6,737,841, May, 2004. [10] R. J. Milliken, J. Silva-Martínez and E. Sáchez-Sinencio, “Full OnChip CMOS Low-Dropout Voltage Regulator,” IEEE Trans. Circuits Sys. I, Reg. Papers, vol. 54, no. 9, pp. 1879–1890, Sep. 2007. [1]Iout (A)Vout (V)time (s)Fig. 8. Load transient response of the proposed LDOthe loop varies with load current is given in Fig. 7. The minimum phase margin is always larger than 60º through the entire range of the load current. It should be noted that the phase margin is over 90º when the load current is greater than about 30mA. This phenomenon is caused by a left-halfplane (LHP) zero located at nearly 3MHz, which is formed by Rb and Cb to create a forward signal path directly from the input of the error amplifier to the output of the LDO. The transient response of the proposed LDO is demonstrated in Fig. 8 when the load current is stepping from 0 to 200mA and back to 0 with rise and fall times of 1µs. With a 1-µF output capacitor, the maximum transientoutput variation is only 17mV including output undershoots, overshoots and load regulation. The 0.1% setting time is 1.8µs which justifies the sufficient slew rate and phase margin of the proposed LDO in both zero-load and full-load conditions. The PSRR of the LDO remains 70dB even at 10 kHz with 20mA load current. The detail performances of the proposed LDO are summarized in Table I.2688。
LM2950 1 100mA 低掉电电压调节器商品说明书
FEATURES● High accuracy output voltage ● Guaranteed 100 mA output ● Very low quiescent current● Extremely tight load and line regulation ● Very low temperature coefficient ● Current and thermal limiting ● Low dropout voltage ● Need only 1uF for stability ● Error flag warns of output dropout Pin 1 : Output ● Logi-control electronic shutdown Pin 2 : Ground ● Output programmable from 1.24 to 29V Pin 3 : Input● Moisture Sensitivity Level 3ApplicationsORDERING INFORMATION● High-efficiency linear regulator, voltage reference ● Battery powered systems ● Portable consumer equipment● Portable / Parm, Desktop / Notebook computers ● Portable Instrumentation, cordless telephones (XX= 1.5, 1.8, 2.8, 2.85, 3.0, 3.3, 5.0V,● Automotive Electronics, Radio control systems Adjustable)● SMPS Post-Regulator, AvionicsDESCRIPTIONThe LM2950/1 is a low power voltage regulator. This device excellent choice for use in battery powered application such as cordless telephone, radio control systems, and portable computers. The LM2950/1 features very low quiescent current (75㎂ Typ.) and very low drop output voltage (Typ. 400㎷ at light load and 380㎷ at 100㎃).This includes a tight initial tolerance of 0.5% Typ., extremely good load and line regulation of 0.05% Typ., and very low output temperature coefficient, making the LM2950/1 useful as a low-power voltage reference.The error flag output feature is used as power-on reset for warn of a low output voltage, due to following batteries on input. Other feature is the logic-compatible shutdown input which enable the regulator to be switched on and off. The LM2950/1 is available in 8-pin plastic packages.The regulator output voltage may be pin-strapped for a -XX volt or programmed from 1.24 volt to 29 volts with external pair of resistors. The LM2950/1 is offered in 3-pin to-92 package compatible with other fixed regulator.Dec. 2015 - Rev. 1.3HTCLM2950TA-XX LM2950-XX DEVICE SOP-8TO-92 (Tape)TO-92 (Bulk)PKGLM2951D-XX TO- 92 PKG SOP- 8 PKGPin : 1. Output 2. Sense 3. Shutdown 4. Ground 5. Error 6. Tap7. Feedback 8. Input1 2 3BLOCK DIAGRAM AND TYPICAL APPLICATIONS (LM2950)BLOCK DIAGRAM AND TYPICAL APPLICATIONS (LM2951)ABSOLUTE MAXIMUM RATINGSLead Temperature (Soldering, 5 seconds)Storage Temperature RangeOperating Junction Temperature Range Input Supply Voltage Feedback Input Voltage Shutdown Input Voltage Error Comparator OutputDec. 2015 - Rev. 1.3HTC-55℃ to +150℃-65℃ to +150℃260℃INTERNALLY LIMITED-0.3 to +30V-0.3 to +30V -1.5 to +30V -0.3 to +30V POWER DISSIPATIONELECTRICAL CHARACTERISTICS (at T a =25℃, V IN =15V, unles otherwise specified)Dec. 2015 - Rev. 1.3HTCNote 1 : Output or reference voltage temperature coefficients defined as the worst case voltage change divided by the total temperature range.Note 2 : Unless otherwise specified all limits guaranteed for T J = 25℃, V IN = V0+1V, I L = 100㎂ and C L = 1㎌. Additional condition for the 8-pin versions are feedback tied to -XX V tap and output tied to output Sense (V OUT=XX V) and V SHOUTDOWN≤0.8VNote 3 : Regulations is measured at constant junction temperature, using pulse testing with a low duty cycle. Changes in output voltage due to heating effects are covered under the specification for thermal regulation.Note 4 : Dropout voltage is defined as the input to output differential at which the output voltage drops 100 ㎷ below its nominal value measured at 1V differential. At very low values of programmed output voltage, the minimum input supply voltage(2.3V over temperature)must be taken into account.Note 5 : V REF≤V OUT≤(V IN-1V), 2.3V≤V IN≤30V, 100㎂≤I L≤100㎃, T J≤T JMAXNote 6 : Comparator thresholds are expressed in terms of a voltage differential at the feedback terminal below the nominal reference voltage measured at V OUT+1V input. To express these thresholds in terms of output voltage changed,multiply by the error amplifier gain = V OUT/V REF= (R1+R2)/R2. For example, at a programmed output voltage of 5V, the error output is guaranteed to go low when the output drops by 95 ㎷ x 5V / 1.235V = 384 ㎷. Thresholds remain constant as a percent V OUT as V OUT is varied, with the dropout warning occurring at typically 5% below nominal, 7.5% guaranteed.Note 7 : V SHUTDOWN≥2V, V IN≤30V, V OUT=0, Feed-back pin tied to -XX V Tap.Dec. 2015 - Rev. 1.3HTC。
TK11221A资料
VIN = 3.5 V, IO = 10 mA
0.2
Temperature Dependency
-20 °C ≤ TA ≤ + 75 °C
VNO
Output Noise Voltage
10 Hz < f < 80 kHz,
30
IO = 30 mA
VREF
Noise Bypass Terminal Voltage
TYP
MAX UNITS
IIN
Quiescent Current
IO = 0 mA, Except ICONT
170
350
µA
ISTBY
Standby Current
VIN = 8 V, at output off
0.1
µA
VO VDROP
Output Voltage Dropout Voltage
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
IIN
Quiescent Current
IO = 0 mA, Except ICONT
170
350
ISTBY
Standby Current
VIN = 8 V, at output off
0.1
VO VDROP
Output Voltage Dropout Voltage
Operating Temperature Range ...................-30 to +80 °C Lead Soldering Temp. (3 sec.) .............................. 230 °C Junction Temperature ........................................... 150 °C
LF00中文资料
1/34August 2003s VERY LOW DROPOUT VOLTAGE (0.45V)sVERY LOW QUIESCENT CURRENT (TYP .50µA IN OFF MODE,500µA IN ON MODE)s OUTPUT CURRENT UP TO 500mA sLOGIC-CONTROLLED ELECTRONIC SHUTDOWNsOUTPUT VOLTAGES OF 1.25;1.5;1.8;2.5;2.7;3;3.3;3.5;4;4.5;4.7;5;5.2;5.5;6;8;8.5;9;12Vs INTERNAL CURRENT AND THERMAL LIMIT s ONLY 2.2µF FOR STABILITYsAVAILABLE IN ±1%(AB)OR ±2%(C)SELECTION AT 25°Cs SUPPLY VOLTAGE REJECTION:80db (TYP .)sTEMPERATURE RANGE:-40TO 125°CDESCRIPTIONThe LF00series are very Low Drop regulators available in PENTAWATT,TO-220,TO-220FP,DPAK and PPAK package and in a wide range of output voltages.The very Low Drop voltage (0.45V)and the very low quiescent current make them particularly suitable for Low Noise,Low Power applications and specially in battery powered systems.In the 5pins configuration (PENTAWATT and PPAK)a Shutdown Logic Control function is available (pin 2,TTL compatible).This means thatdecreasing the total power consumption.In the three terminal configuration the device has the same electrical performance,but is fixed in the ON state.It requires only a 2.2µF capacitor for stability allowing space and cost saving.LF00SERIESVERY LOW DROPVOLTAGE REGULATORS WITH INHIBITLF00SERIES2/34ABSOLUTE MAXIMUM RATINGS(*)For 18<V IN <40the regulator is in shut-downTHERMAL DATACONNECTION DIAGRAM (top view)Symbol ParameterValue Unit V I DC Input Voltage -0.5to 40(*)VI O Output Current Internally Limited P tot Power DissipationInternally LimitedT stg Storage Temperature Range-40to 150°C T opOperating Junction Temperature Range-40to 125°C Symbol ParameterPENTAWATTTO-220TO-220FPDPAK/PPAKUnit R thj-case Thermal Resistance Junction-case 3358°C/W R thj-ambThermal Resistance Junction-ambient505060100°C/WLF00SERIES3/34ORDERING CODES(*)Available on request.(#)Available in Tape &Reel with the suffix "-TR".TYPE PENTAWATT TO-220TO-220FP DPAK (#)PPAK (#)OUTPUT VOLTAGE LF12C (*)LF12CV5V LF12CV LF12CP LF12CDT LF12CPT 1.25V LF12AB (*)LF12ABV5V LF12ABV LF12ABP LF12ABDT LF12ABPT 1.25V LF15C LF15CV5V (*)LF15CV (*)LF15CP (*)LF15CDT LF15CPT (*) 1.5V LF15AB LF15ABV5V (*)LF15ABV (*)LF15ABP (*)LF15ABDT LF15ABPT (*) 1.5V LF18C LF18CV5V LF18CV LF18CP LF18CDT LF18CPT 1.8V LF18AB LF18ABV5V LF18ABV LF18ABP LF18ABDT LF18ABPT 1.8V LF25C LF25CV5V LF25CV LF25CP LF25CDT LF25CPT 2.5V LF25AB LF25ABV5V LF25ABV LF25ABP LF25ABDT LF25ABPT 2.5V LF27C LF27CV5V LF27CV LF27CP LF27CDT LF27CPT 2.7V LF27AB LF27ABV5V LF27ABV LF27ABP LF27ABDT LF27ABPT 2.7V LF30C LF30CV5V LF30CV LF30CP LF30CDT LF30CPT 3V LF30AB LF30ABV5V LF30ABV LF30ABP LF30ABDT LF30ABPT 3V LF33C LF33CV5V LF33CV LF33CP LF33CDT LF33CPT 3.3V LF33AB LF33ABV5V LF33ABV LF33ABP LF33ABDT LF33ABPT 3.3V LF35C LF35CV5V LF35CV LF35CP LF35CDT LF35CPT 3.5V LF35AB LF35ABV5V LF35ABV LF35ABP LF35ABDT LF35ABPT 3.5V LF40C LF40CV5V LF40CV LF40CP LF40CDT LF40CPT 4V LF40AB LF40ABV5V LF40ABV LF40ABP LF40ABDT LF40ABPT 4V LF45C (*)LF45CV5V LF45CV LF45CP LF45CDT LF45CPT 4.5V LF45AB (*)LF45ABV5V LF45ABV LF45ABP LF45ABDT LF45ABPT 4.5V LF47C LF47CV5V LF47CV LF47CP LF47CDT LF47CPT 4.75V LF47AB LF47ABV5V LF47ABV LF47ABP LF47ABDT LF47ABPT 4.75V LF50C LF50CV5V LF50CV LF50CP LF50CDT LF50CPT 5V LF50AB LF50ABV5V LF50ABV LF50ABP LF50ABDT LF50ABPT 5V LF52C LF52CV5V LF52CV LF52CP LF52CDT LF52CPT 5.2V LF52AB LF52ABV5V LF52ABV LF52ABP LF52ABDT LF52ABPT 5.2V LF55C LF55CV5V LF55CV LF55CP LF55CDT LF55CPT 5.5V LF55AB LF55ABV5V LF55ABV LF55ABP LF55ABDT LF55ABPT 5.5V LF60C LF60CV5V LF60CV LF60CP LF60CDT LF60CPT 6V LF60AB LF60ABV5V LF60ABV LF60ABP LF60ABDT LF60ABPT 6V LF80C LF80CV5V LF80CV LF80CP LF80CDT LF80CPT 8V LF80AB LF80ABV5V LF80ABV LF80ABP LF80ABDT LF80ABPT 8V LF85C LF85CV5V LF85CV LF85CP LF85CDT LF85CPT 8.5V LF85AB LF85ABV5V LF85ABV LF85ABP LF85ABDT LF85ABPT 8.5V LF90C LF90CV5V LF90CV LF90CP LF90CDT LF90CPT 9V LF90AB LF90ABV5V LF90ABV LF90ABP LF90ABDT LF90ABPT 9V LF120C LF120CV5V LF120CV LF120CP LF120CDT LF120CPT 12V LF120ABLF120ABV5VLF120ABVLF120ABPLF120ABDTLF120ABPT12VLF00SERIES4/34TEST CIRCUITSELECTRICAL CHARACTERISTICS FOR LF12AB (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =3.3V1.238 1.251.263VI O =50mA,V I =3.3V,T a =-25to 85°C 1.225 1.275V I Operating Input Voltage I O =500mA2.516V I O Output Current Limit 1A ∆V O Line Regulation V I =2.5to 16V,I O =5mA 210mV ∆V O Load Regulation V I =2.8VI O =5to 500mA210mV I dQuiescent CurrentV I =2.5to 16V,I O =0mA ON MODE 0.51mA V I =2.6to 16V,I O =500mA 12V I =6VOFF MODE 50100µA SVR Supply Voltage RejectionI O =5mA V I =3.5±1V f =120Hz 82dBf =1KHz 77f =10KHz65eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 1.25V V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFLF00SERIES5/34ELECTRICAL CHARACTERISTICS FOR LF12C (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR LF15AB (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =3.3V1.225 1.251.275VI O =50mA,V I =3.3V,T a =-25to 85°C 1.2 1.3V I Operating Input Voltage I O =500mA2.516V I O Output Current Limit 1A ∆V O Line Regulation V I =2.5to 16V,I O =5mA 210mV ∆V O Load Regulation V I =2.8VI O =5to 500mA210mV I dQuiescent CurrentV I =2.5to 16V,I O =0mA ON MODE 0.51mA V I =2.6to 16V,I O =500mA 12V I =6VOFF MODE 50100µA SVR Supply Voltage RejectionI O =5mA V I =3.5±1V f =120Hz 82dBf =1KHz 77f =10KHz65eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 1.25V V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =3.5V1.485 1.51.515VI O =50mA,V I =3.5V,T a =-25to 85°C 1.470 1.530V I Operating Input Voltage I O =500mA2.516V I O Output Current Limit 1A ∆V O Line Regulation V I =2.5to 16V,I O =5mA 210mV ∆V O Load Regulation V I =2.8V,I O =5to 500mA210mV I dQuiescent CurrentV I =2.5to 16V,I O =0mA ON MODE 0.51mA V I =2.8to 16V,I O =500mA 12V I =6VOFF MODE 50100µA SVR Supply Voltage RejectionI O =5mA V I =3.5±1V f =120Hz 82dBf =1KHz 77f =10KHz65eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 1V V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFLF00SERIES6/34ELECTRICAL CHARACTERISTICS FOR LF15C (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR LF18AB (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =3.5V1.47 1.51.53VI O =50mA,V I =3.5V,T a =-25to 85°C 1.44 1.56V I Operating Input Voltage I O =500mA2.516V I O Output Current Limit 1A ∆V O Line Regulation V I =2.5to 16V,I O =5mA 210mV ∆V O Load Regulation V I =2.8V,I O =5to 500mA210mV I dQuiescent CurrentV I =2.5to 16V,I O =0mA ON MODE 0.51mA V I =2.8to 16V,I O =500mA 12V I =6VOFF MODE 50100µA SVR Supply Voltage RejectionI O =5mA V I =3.5±1V f =120Hz 82dBf =1KHz 77f =10KHz65eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 1V V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =3.3V1.782 1.81.818VI O =50mA,V I =3.3V,T a =-25to 85°C 1.764 1.836V I Operating Input Voltage I O =500mA316V I O Output Current Limit 1A ∆V O Line Regulation V I =2.8to 16V,I O =5mA 212mV ∆V O Load Regulation V I =3.3V,I O =5to 500mA210mV I dQuiescent CurrentV I =2.5to 16V,I O =0mA ON MODE 0.51mA V I =3.1to 16V,I O =500mA 12V I =6VOFF MODE 50100µA SVR Supply Voltage RejectionI O =5mA V I =3.5±1V f =120Hz 82dBf =1KHz 77f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.7V V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFLF00SERIES7/34ELECTRICAL CHARACTERISTICS FOR LF18C (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR LF25AB (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =3.5V1.764 1.81.836VI O =50mA,V I =3.5V,T a =-25to 85°C 1.728 1.872V I Operating Input Voltage I O =500mA316V I O Output Current Limit 1A ∆V O Line Regulation V I =2.8to 16V,I O =5mA 212mV ∆V O Load Regulation V I =3.3V,I O =5to 500mA210mV I dQuiescent CurrentV I =2.5to 16V,I O =0mA ON MODE 0.51mA V I =3.1to 16V,I O =500mA 12V I =6VOFF MODE 50100µA SVR Supply Voltage RejectionI O =5mA V I =3.5±1V f =120Hz 82dBf =1KHz 77f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.7V V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =4.5V2.475 2.52.525VI O =50mA,V I =4.5V,T a =-25to 85°C 2.4502.550V I Operating Input Voltage I O =500mA16V I O Output Current Limit 1A ∆V O Line Regulation V I =3.5to 16V,I O =5mA 212mV ∆V O Load Regulation V I =3.8V,I O =5to 500mA212mV I dQuiescent CurrentV I =3.5to 16V,I O =0mA ON MODE 0.51mA V I =3.8to 16V,I O =500mA 12V I =6VOFF MODE 50100µA SVR Supply Voltage RejectionI O =5mA V I =4.5±1V f =120Hz 82dBf =1KHz 77f =10KHz65eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFLF00SERIES8/34ELECTRICAL CHARACTERISTICS FOR LF25C (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR LF27AB (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =4.5V2.45 2.52.55VI O =50mA,V I =4.5V,T a =-25to 85°C 2.42.6V I Operating Input Voltage I O =500mA16V I O Output Current Limit 1A ∆V O Line Regulation V I =3.5to 16V,I O =5mA 212mV ∆V O Load Regulation V I =3.8V,I O =5to 500mA212mV I dQuiescent CurrentV I =3.5to 16V,I O =0mA ON MODE 0.51mA V I =3.8to 16V,I O =500mA 12V I =6VOFF MODE 50100µA SVR Supply Voltage RejectionI O =5mA V I =4.5±1V f =120Hz 82dBf =1KHz 77f =10KHz65eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =4.7V2.673 2.72.727VI O =50mA,V I =4.7V,T a =-25to 85°C 2.6462.754V I Operating Input Voltage I O =500mA16V I O Output Current Limit 1A ∆V O Line Regulation V I =3.7to 16V,I O =5mA 213mV ∆V O Load Regulation V I =4V,I O =5to 500mA213mV I dQuiescent CurrentV I =3.7to 16V I O =0mA ON MODE0.51mA V I =4to 16V I O =500mA 12V I =6VOFF MODE 50100µA SVR Supply Voltage RejectionI O =5mA V I =4.7±1V f =120Hz82dBf =1KHz 77f =10KHz65eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C O Output Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFLF00SERIES9/34ELECTRICAL CHARACTERISTICS FOR LF27C (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR LF30AB (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =4.7V2.646 2.72.754VI O =50mA,V I =4.7V,T a =-25to 85°C 2.5922.808V I Operating Input Voltage I O =500mA16V I O Output Current Limit 1A ∆V O Line Regulation V I =3.7to 16V I O =5mA 213mV ∆V O Load Regulation V I =4V,I O =5to 500mA213mV I dQuiescent CurrentV I =3.7to 16V I O =0mA ON MODE0.51mA V I =4to 16V I O =500mA 12V I =6VOFF MODE 50100µA SVR Supply Voltage RejectionI O =5mA V I =4.7±1V f =120Hz82dBf =1KHz 77f =10KHz65eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =5V2.97033.03VI O =50mA,V I =5V,T a =-25to 85°C 2.943.06V I Operating Input Voltage I O =500mA16V I O Output Current Limit 1A ∆V O Line Regulation V I =4to 16V,I O =5mA 315mV ∆V O Load Regulation V I =4.3V,I O =5to 500mA 315mV I dQuiescent CurrentV I =4to 16V,I O =0mAON MODE 0.51mA V I =4.3to 16V I O =500mA12V I =6VOFF MODE 50100µA SVRSupply Voltage RejectionI O =5mA V I =5±1Vf =120Hz 81dBf =1KHz 76f =10KHz65eN Output Noise Voltage B =10Hz to 100KHz 50µV V dDropout VoltageI O =200mA 0.20.35V I O =500mA0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFLF00SERIES10/34ELECTRICAL CHARACTERISTICS FOR LF30C (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR LF33AB (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =5V2.9433.06VI O =50mA,V I =5V,T a =-25to 85°C 2.883.12V I Operating Input Voltage I O =500mA16V I O Output Current Limit 1A ∆V O Line Regulation V I =4to 16V,I O =5mA 315mV ∆V O Load Regulation V I =4.3V,I O =5to 500mA 315mV I dQuiescent CurrentV I =4to 16V,I O =0mAON MODE0.51mA V I =4.3to 16V I O =500mA12V I =6VOFF MODE 50100µA SVRSupply Voltage RejectionI O =5mAV I =5±1Vf =120Hz 81dBf =1KHz 76f =10KHz65eN Output Noise Voltage B =10Hz to 100KHz 50µV V dDropout VoltageI O =200mA 0.20.35V I O =500mA0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =5.3V3.267 3.33.333VI O =50mA,V I =5.3V,T a =-25to 85°C 3.2343.366V I Operating Input Voltage I O =500mA16V I O Output Current Limit 1A ∆V O Line Regulation V I =4.3to 16V,I O =5mA 316mV ∆V O Load Regulation V I =4.6V,I O =5to 500mA316mV I dQuiescent CurrentV I =4.3to 16V,I O =0mAON MODE0.51mA V I =4.6to 16V,I O =500mA 12V I =6V OFF MODE50100µA SVRSupply Voltage RejectionI O =5mA V I =5.3±1V f =120Hz 80dBf =1KHz 75f =10KHz65eN Output Noise Voltage B =10Hz to 100KHz 50µV V dDropout VoltageI O =200mA 0.20.35V I O =500mA0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µF11/34ELECTRICAL CHARACTERISTICS FOR LF33C (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR LF35AB (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =5.3V3.234 3.33.366VI O =50mA,V I =5.3V,T a =-25to 85°C 3.1683.432V I Operating Input Voltage I O =500mA16V I O Output Current Limit 1A ∆V O Line Regulation V I =4.3to 16V,I O =5mA 316mV ∆V O Load Regulation V I =4.6V,I O =5to 500mA316mV I dQuiescent CurrentV I =4.3to 16V,I O =0mA ON MODE 0.51mA V I =4.6to 16V,I O =500mA 12V I =6VOFF MODE 50100µA SVR Supply Voltage RejectionI O =5mA V I =5.3±1V f =120Hz 80dBf =1KHz 75f =10KHz65eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =5.5V3.465 3.53.535VI O =50mA,V I =5.5V,T a =-25to 85°C 3.4303.570V I Operating Input Voltage I O =500mA16V I O Output Current Limit 1A ∆V O Line Regulation V I =4.5to 16V,I O =5mA 317mV ∆V O Load Regulation V I =4.8V,I O =5to 500mA317mV I dQuiescent CurrentV I =4.5to 16V,I O =0mA ON MODE 0.51mA V I =4.8to 16V,I O =500mA 12V I =6VOFF MODE 50100µA SVR Supply Voltage RejectionI O =5mA V I =5.5±1V f =120Hz 79dBf =1KHz 74f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µF12/34ELECTRICAL CHARACTERISTICS FOR LF35C (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR LF40AB (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =5.5V3.43 3.53.57VI O =50mA,V I =5.5V,T a =-25to 85°C 3.363.64V I Operating Input Voltage I O =500mA16V I O Output Current Limit 1A ∆V O Line Regulation V I =4.5to 16V,I O =5mA 317mV ∆V O Load Regulation V I =4.8V,I O =5to 500mA317mV I dQuiescent CurrentV I =4.5to 16V,I O =0mA ON MODE 0.51mA V I =4.8to 16V,I O =500mA 12V I =6VOFF MODE 50100µA SVR Supply Voltage RejectionI O =5mA V I =5.5±1V f =120Hz 79dBf =1KHz 74f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =6V3.9644.04VI O =50mA,V I =6V,T a =-25to 85°C 3.924.08V I Operating Input Voltage I O =500mA16V I O Output Current Limit 1A ∆V O Line Regulation V I =5to 16V,I O =5mA 420mV ∆V O Load Regulation V I =5.3V,I O =5to 500mA 420mV I dQuiescent CurrentV I =5to 16V,I O =0mAON MODE 0.51mA V I =5.3to 16V,I O =500mA12V I =6VOFF MODE 50100µA SVRSupply Voltage RejectionI O =5mA V I =6±1Vf =120Hz 78dBf =1KHz 73f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V dDropout VoltageI O =200mA 0.20.35V I O =500mA0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C O Output Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µF13/34ELECTRICAL CHARACTERISTICS FOR LF40C (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR LF45AB (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =6V3.9244.08VI O =50mA,V I =6V,T a =-25to 85°C 3.844.16V I Operating Input Voltage I O =500mA16V I O Output Current Limit 1A ∆V O Line Regulation V I =5to 16V,I O =5mA 420mV ∆V O Load Regulation V I =5.3V,I O =5to 500mA 420mV I dQuiescent CurrentV I =5to 16V,I O =0mAON MODE0.51mA V I =5.3to 16V,I O =500mA12V I =6VOFF MODE 50100µA SVRSupply Voltage RejectionI O =5mAV I =6±1Vf =120Hz 78dBf =1KHz 73f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V dDropout VoltageI O =200mA 0.20.35V I O =500mA0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =6.5V4.455 4.54.545VI O =50mA,V I =6.5V,T a =-25to 85°C 4.414.59V I Operating Input Voltage I O =500mA16V I O Output Current Limit 1A ∆V O Line Regulation V I =5.5to 16V,I O =5mA 422mV ∆V O Load Regulation V I =5.8V,I O =5to 500mA422mV I dQuiescent CurrentV I =5.5to 16V,I O =0mA ON MODE 0.51mA V I =5.8to 16V,I O =500mA 12V I =6VOFF MODE 50100µA SVR Supply Voltage RejectionI O =5mA V I =6.5±1V f =120Hz 77dBf =1KHz 72f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µF14/34ELECTRICAL CHARACTERISTICS FOR LF45C (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR LF47AB (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =6.5V4.41 4.54.59VI O =50mA,V I =6.5V,T a =-25to 85°C 4.324.68V I Operating Input Voltage I O =500mA16V I O Output Current Limit 1A ∆V O Line Regulation V I =5.5to 16V,I O =5mA 422mV ∆V O Load Regulation V I =5.8V,I O =5to 500mA422mV I dQuiescent CurrentV I =5.5to 16V,I O =0mA ON MODE 0.51mA V I =5.8to 16V,I O =500mA 12V I =6VOFF MODE 50100µA SVR Supply Voltage RejectionI O =5mA V I =6.5±1V f =120Hz 77dBf =1KHz 72f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =6.7V4.653 4.74.747VI O =50mA,V I =6.7V,T a =-25to 85°C 4.6064.794V I Operating Input Voltage I O =500mA16V I O Output Current Limit 1A ∆V O Line Regulation V I =5.7to 16V,I O =5mA 423mV ∆V O Load Regulation V I =6V,I O =5to 500mA423mV I dQuiescent CurrentV I =5.7to 16V,I O =0mA ON MODE 0.51mA V I =6to 16V,I O =500mA 12V I =6VOFF MODE 50100µA SVR Supply Voltage RejectionI O =5mA V I =6.7±1V f =120Hz 77dBf =1KHz 72f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C O Output Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µF15/34ELECTRICAL CHARACTERISTICS FOR LF47C (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)ELECTRICAL CHARACTERISTICS FOR LF50AB (refer to the test circuits,T j =25°C,C I =0.1µF,C O =2.2µF unless otherwise specified.)Symbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =6.7V4.606 4.74.794VI O =50mA,V I =6.7V,T a =-25to 85°C 4.5124.888V I Operating Input Voltage I O =500mA16V I O Output Current Limit 1A ∆V O Line Regulation V I =5.7to 16V,I O =5mA 423mV ∆V O Load Regulation V I =6V,I O =5to 500mA423mV I dQuiescent CurrentV I =5.7to 16V,I O =0mA ON MODE 0.51mA V I =6to 16V,I O =500mA 12V I =6VOFF MODE 50100µA SVR Supply Voltage RejectionI O =5mA V I =6.7±1V f =120Hz 77dBf =1KHz 72f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V d Dropout Voltage I O =200mA 0.20.35V I O =500mA 0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µFSymbol ParameterTest ConditionsMin.Typ.Max.Unit V O Output Voltage I O =50mA,V I =7V4.9555.05VI O =50mA,V I =7V,T a =-25to 85°C 4.95.1V I Operating Input Voltage I O =500mA16V I O Output Current Limit 1A ∆V O Line Regulation V I =6to 16V,I O =5mA 525mV ∆V O Load Regulation V I =6.3V,I O =5to 500mA 525mV I dQuiescent CurrentV I =6to 16V,I O =0mAON MODE 0.51mA V I =6.3to 16V,I O =500mA12V I =6VOFF MODE 50100µA SVRSupply Voltage RejectionI O =5mA V I =7±1Vf =120Hz 76dBf =1KHz 71f =10KHz60eN Output Noise Voltage B =10Hz to 100KHz 50µV V dDropout VoltageI O =200mA 0.20.35V I O =500mA0.40.7V IL Control Input Logic Low T a =-40to 125°C 0.8V V IH Control Input Logic High T a =-40to 125°C 2V I I Control Input CurrentV I =6V,V C =6V10µA C OOutput Bypass Capacitance ESR =0.1to 10ΩI O =0to 500mA210µF。
微芯片技术有限公司产品设计指南说明书
Battery Power Function Pack Design Guide Powering Y our Portable DesignMicrocontrollers PIC16C781MOSFET Drivers TC1411NBattery Chargers MCP73828Charge Pump DC/DC Converters MCP1252-ADJLow Dropout Linear Regulators TC55, TC1016Design ideas in this guide are based on many of the devices featured in Microchip Technology's Battery Management Function Pack, or “Fun Pack.” A complete device list and corresponding data sheets for these products can be found at /funpack Design ideas in this guide use the following devices:Operational Amplifiers MCP6041, MCP602Switching Regulators MCP1601, TC1102Closed loop control with linear regulators.Often the voltage source is “incompatible” with the load. A buffer needs to be placed between the source and load to regulate or control the voltage and/or current.Linear regulators provide closed loop control to “regulate”the voltage at the load. A basic linear regulator has three main components: an operational amplifier, a voltage reference, and a pass transistor . The main purpose of a linear regulator is to produce a constant, accurate outputvoltage at a lower magnitude than the input voltage.TC1016 Linear Regulator Features:n Space-Saving 5-Pin SC-70 Packagen Extremely Low Operating Current for Longer n Battery Life: 53 µA (typ.)n Very Low Dropout Voltage n Rated 80 mA Output CurrentnRequires only 1 µF Ceramic Output Capacitancen High Output Voltage Accuracy: ±0.5% (typ.)n 10 µsec (typ.) Wake-Up Time from SHDN n Power-Saving Shutdown Mode: 0.05 µA(typ.)n Over-Current and Over-Temperature Protection nPin Compatible Upgrade for Bipolar RegulatorsBeyond the basics, linear regulators often offer additional features: over-current protection, thermal protection, and reversed polarity protection to name a few.Microchip offers a line of CMOS, low dropout linear regulators. A low dropout regulator is a type of linearregulator designed to minimize the saturation of the output transistor and to minimize the drive requirements. LDOs can operate with a very small input to output differential.Specifications: Selected Linear RegulatorsTypical Typical Dropout Device Max. Input Output Output Active Voltage @ Max. Name Voltage Voltage Current (mA)Current (µA)I OUT (mV)FeaturesPackages TC1016 6.0 1.8, 2.7, 2.8, 3.08050150Shutdown5-pin SC-70TC5510 1.8, 2.5, 3.0, 3.3, 5.0250 1.13803-pin SOT-23A/SOT-89,3-pin TO-92TC2014 6.0 1.8, 2.5, 3.0, 3.3505545Shutdown, Reference bypass input 5-pin SOT-23A TC2015 6.0 1.8, 2.7, 2.8, 3.0, 3.31005590Shutdown, Reference bypass input 5-pin SOT-23A TC2185 6.0 1.8, 2.7, 2.8, 3.0, 3.315055140Shutdown, Reference bypass input 5-pin SOT-23A TC2116 6.0 1.8, 2.7, 2.8, 3.0, 3.315055140Shutdown, Error output5-pin SOT-23A TC21176.01.8,2.5,3.0, 3.3800806003-pin SOT-223, 3-pin DDPAKSpecifications: Selected Linear Regulator Combination Products:TC1300 6.0 2.5, 2.7, 2.8, 2.85, 30080210Shutdown Reference bypass input,8-pin MSOPLDO plus RESET output TC1301A/B*6.01.5 - 3.3 @ 100 mV300 / 150116104 / 150Dual LDO with RESET & 8-pin MSOP , 8-pin DFNincrementShutdown; TC1301B has individual shutdown*available summer 2003names: voltage step-down converter, DC-to-DC converter,chopper converter, etc. No matter what the name, inductor based, buck derived, switch-mode converters account for 80% to 90% of all converters sold.Microchip offers inductor based buck regulators and controllers. The distinction is whether or not the switch (MOSFET) is internal to the device (regulator) or controlled externally (controller). The schematic represented here depicts a MCP1601 buck regulator with its associatedexternal components.MCP1601 Synchronous Buck Regulator Features:n Input Range of 2.7V to 5.5V n PWM, PFM and LDO Operation n Integrated Switchesn 750 kHz Fixed Switching Frequencyn Oscillator Synchronization to 1 MHz PWM Mode n Auto-Switching from PWM/PFMn100% Duty Cycle Capable for Low Input Voltagen 500 mA Continuous Output Current n Under-Voltage Lock-Out Protection n Over-Temperature Protection n Integrated Soft Start Circuitry n Output Voltage Capability to 0.9Vn Wide Operating Temperature Range: -40°C to +85ºC nSmall MSOP8 PackageEmploying a switch-mode power converter.Anotherapproach to transferring the battery energy to the system load is to employ a switch-mode power converter . The primary advantage of a switch-mode power converter is that it can, ideally, accomplish power conversion and regulation at 100% efficiency. All power loss is due to non-ideal components and power loss in the control circuit.The buck converter is an inductor based switch-mode power converter used to step-down an input source to a lower magnitude output. The buck converter goes by manySpecifications: Selected Switching RegulatorsInput Voltage Output Switching Device OutputBuck/BoostRange (V)Voltage (V)Frequency FeaturesPackages MCP1601 Adjustable Step-Down 2.7 to 5.50.9 to V IN PWM/PFM/UVLO, Auto Switching, LDO 8-pin MSOP LDO TC105 Fixed Step-Down 2.2 to 10 3.0, 3.3, 5.0PFM/PWM Low-power shutdown mode5-pin SOT-23A TC110 Fixed Step-Up 2.0 to 10 3.0, 3.3, 5.0PFM/PWM Soft-start, Low-power shutdown mode 5-pin SOT-23A TC115 Fixed Step-Up 0.9 to 10 3.0, 3.3, 5.0PFM/PWM Feedback voltage sensing, Low-power shutdown mode5-pin SOT-89TC120 Fixed Step-Down 1.8 to 10 3.0, 3.3, 5.0PFM/PWM Soft-start, Low-power shutdown mode 8-pin SOP TC125 Fixed Step-Up 0.9 to 10 3.0, 3.3, 5.0PFM Low-power shutdown mode 5-pin SOT-23A TC126FixedStep-Up0.9 to 103.0, 3.3, 5.0PFMFeedback voltage sensing5-pin SOT-23A34Specifications: Battery Charger FamilyDevice Vcc Typical Supply Name Mode Cell Type Range (V)Current (µA)Features Packages MCP73826Linear Single Cell Lithium Ion 4.5 to 5.5260Small size6-pin SOT-23A MCP73827Linear Single Cell Lithium Ion 4.5 to 5.5250Mode indicator, charge current monitor 8-pin MSOP MCP73828LinearSingle Cell Lithium Ion4.5 to5.5265Charge complete indicator, temperature monitor8-pin MSOPMCP73828 Battery Charger Features:n High Accuracy Preset Voltage Regulation n Programmable Charge Current n Charge Complete IndicatornContinuous Temperature MonitoringUsing the MCP73828 charge management controller.The MCP73828 is a linear charge management controller for use in space-limited, cost sensitive applications. The MCP73828 combines high accuracy constant voltage,controlled current regulation, cell preconditioning, celltemperature monitoring, and charge complete indication in a space saving 8-pin MSOP package. The MCP73828provides a stand-alone charge management solution.n Automatic Power-Down when Input Power Removed n Shutdown Input for Charge Termination Control n Small 8-pin MSOP PackageSpecifications: PIC16C781/782Device OTP/Flash RAM I/O 8-Bit ADCComp-Timers/Max.Name Bytes Words Bytes Pins Packages Channels arators WDT Speed MHz.Other FeaturesPIC16C78117921024x141281620P , 20SO, 20SS, 821-16 bit, 1-8 bit,20Precision Vref, Op Amp, PSMC,PIC16C78235842048x1420JW1-WDT4MHz internal oscillator, DAC TC55 Low Dropout Positive Voltage Regulator Features:n Very Low Operating Current (1µA)n Very Low Dropout Voltage: 120mV typ at 100mA, 380mV typ at200mAn High Output Current: 250mA (V OUT = 5.0V)TC1411N Power MOSFET Driver Features:n Single, Non-inverting, Low-Side Driver, 1A Peak Output Current n Latch-Up Protected: Will Withstand 500mA Reverse Current n Input Will Withstand Negative Inputs Up to 5V nESD Protected: 4kVSwitch-mode, multi-chemistry charge management controller.The PIC16C781/782 are mixed analog/digital microcontrollers that combine the popular PIC®architecture with new mixed signal peripherals. The resulting devices change many of the old conventions of embedded design, and open up new application possibilities for the microcontroller .One of the applications that can take advantage of the PIC16C781/782’s unique peripheral set is a switch-mode,PIC16C781/782 Microcontroller Features:n Complete programmability n Enormous flexibilityn Stand-alone operation or in conjunction with a Smart Battery Pack nSix peripherals including 8x8-bit A/D, 8-bit D/A, V REF , Op Amp, 2x comparators, programmable switch mode controllerMCP602 Op Amp Features:n Specifications rated from 2.7V to 5.5V supplies n 2.8MHz GBWP , Unity gain stable n Low power I DD = 325mA maxnDual (MCP601 sinlge, MCP604 quad, MCP603 w/Chip Select)multi-chemistry charge management controller . This solution provides an enormous amount of design flexibility. The PIC16C781/782 can be used in a variety of switch-mode architectures allowing for diverse input and output voltages, control over charge current, charge voltage, or both. In addition, charge termination and multiple safety features can be incorporated.Specifications: MCP601/2/3/4Device# per package GBWP I Q Typ. (µA)V OS Max (mV)Operating VoltagePackagesMCP601/2/3/41/2/1 with CS/4 2.8 MHz23022.7 to 5.58-pin PDIP , 8-pin SOIC, 8-pin MSOP , 5-pin SOTSpecifications: TC55 Low Dropout Positive Voltage RegulatorDevice Max. Input VoltageOutput Voltage (V)Typ. Dropout Voltage @ 200mVTyp. Output Volt. Accuracy (%)PackagesTC55101.8,2.5,3.0,3.3,5.0380mV±0.53-pin SOT-23A, 3-pin SOT-89, 3-pin TO-92Specifications: TC1411N Power MOSFET DriverDevice Configuration Peak Output Current (A)Output Resistance (RH/RL) (Max. Ω@ 25°C)Max. Supply Voltage (V)PackagesTC1411NSingle, non-inverting111/11168-pin PDIP , 8-pin SOIC56Biasing the backlighting. The MCP1252-ADJ is an inductorless, positive-regulated charge pump DC/DC converter. The device generates an adjustable output voltage. It is specifically designed for applications requiring low noise and high efficiency and is able to deliver up to 120 mA output current. The device allows the input voltage to be lower or higher than the output voltage, by automatically switching between buck/ boostoperation.MCP1252 Charge Pump Features:n Inductorless, Buck/Boost, DC/DC Converter n Low Power: 80 µA (Typical)n 120 mA Output Currentn Wide Operating Temperature Range: -40°C to +85°C n Thermal Shutdown and Short-Circuit Protection nUses Small Ceramic Capacitorsn Low Power Shutdown Mode: 0.1 µA (Typical)n Shutdown Input Compatible with 1.8V Logic n V IN Range: 2.0V to 5.5V n Adjustable Output Voltage n Space-saving, 8-Lead MSOPnSoft-Start Circuitry to Minimize In-Rush CurrentToday's new color displays require a pure white light for back lighting. White light emitting diodes have become the component of choice. The MCP1252-ADJ is an excellent choice for biasing the back lighting. Light intensity is controlled uniformly through the use of ballast resistors.The peak intensity is set by the feedback to theMCP1252-ADJ. Dimming is accomplished by pulse-width modulating the shutdown pin of the device.Selected Regulated Charge Pump DC/DC Converters Specifications:Typical ActiveDevice Input Voltage Output Max. Input Output NameRange (V)VoltageCurrent (µA)Current (mA)FeaturesPackages MCP1252-33X50 2.7 to 5.5Selectable 3.3 or 5.0V 120 120mA for V IN >3.0V Power-Good output, 650 kHz oscillator 8-pin MSOP MCP1252-ADJ 2.0 to 5.5 Adjustable 1.5V to 5.5V 120 120mA for V IN >3.0V Power-Good output, 650 kHz oscillator 8-pin MSOP MCP1253-33X50 2.7 to 5.5 Selectable 3.3 or 5.0V120 120mA for V IN >3.0V Power-Good output, 1 MHz oscillator 8-pin MSOP MCP1253-ADJ 2.0 to 5.5 Adjustable 1.5V to 5.5V120 120mA for V IN >3.0VPower-Good output, 1 MHz oscillator8-pin MSOPTC11422.5 to 5.5-3V to -5V40020Regulated GaAs FET Supply, Internal 200 kHz oscillator, External clock 3 kHzto 500 kHz, Low-power shutdown mode 8-pin MSOPMicrochip also offers Inverting or Doubling Charge Pumps, Multi-Function Charge Pumps and Inverting and Doubling Charge Pumps. See the Microchip website for complete specifications .Driving white light emitting diodes in series. Analternative to the MCP1252 back lighting approach is to drive the white light emitting diodes in series. The series connection provides improved brightness matchingbetween the diodes since they all operate with the sameTC110 Step-Up DC/DC Controller Features:n Assured Start-up at 0.9Vn 50uA (Typ) Supply Current (f OSC = 100kHz)n 300mA Output Current @ V IN > 2.7V n 0.5uA Shutdown Moden 100kHz and 300kHz Switching Frequency Options n Programmable Soft-Start n 84% Typical EfficiencynSmall Package: 5-Pin SOT-23ASelected Switching Regulators Specifications:Input Voltage Output SwitchingDevice Output Buck/Boost Range (V)Voltage (V)Frequency FeaturesPackages TC110 Fixed Step-Up 2.0 to 10 3.0, 3.3, 5.0PFM/PWM Soft-start, Low-power shutdown mode 5-pin SOT-23A TC120FixedStep-Down1.8 to 103.0, 3.3, 5.0PFM/PWMSoft-start, Low-power shutdown mode8-pin SOPcurrent. Light intensity is adjusted by controlling the current through the diodes.The TC110 is a boost controller that can be used to bias the diodes in series as depicted.MCP6041/2/3/4 Operational Amplifier Features:n Low Quiescent Current: 600 nA/Amplifier (typ)n Rail-to-Rail Input: -0.3 V to V DD +0.3 V (max)n Rail-to-Rail Output: V SS +10 mV to V DD -10 mV (max)n Gain Bandwidth Product: 14 kHz (typ)n Wide Supply Voltage Range: 1.4 V to 5.5 V (max)n Unity Gain Stablen Available in Single, Dual and Quad n Chip Select (CS) with MCP6043n5-lead SOT-23 package (MCP6041 only)Selected Op Amp Specifications:Device# per packageGBWP IQ Typ. (µA)V OS Max (mV)Operating VoltageFeatures Packages MCP6041114 kHz 0.63 1.4 to 5.5Rail-to-rail I/O, 8-pin PDIP/SOIC/MSOP MCP61411100 kHz 0.63 1.4 to 5.5Rail-to-rail I/O, G>10 stable 8-pin PDIP/SOIC/MSOP MCP61422100 kHz 0.63 1.4 to 5.5Rail-to-rail I/O, G>10 stable 8-pin PDIP/SOIC/MSOP MCP61431100 kHz 0.63 1.4 to 5.5Rail-to-rail I/O, G>10 stable, CS 8-pin PDIP/SOIC/MSOP MCP61444100 kHz0.631.4 to 5.5Rail-to-rail I/O, G>10 stable14-pin PDIP/SOIC/MSOP7-The following Application Notes and Technical Briefs are available on the Microchip website: Application Notes:AN246:Driving the Analog Inputs of a SAR A/D Converter AN667:Smart Battery Charger with SMBus InterfaceAN693:Understanding A/D Converter Performance Specifications AN779:Using the Microchip TC54 Voltage DetectorAN786:Considerations for Driving Power MOSFETs in High Current, Switch-mode Regulators AN792: A Method to Determine How Much Power a SOT23 Can Dissipate in an ApplicationAN793:Power Management in Portable Applications: Understanding the Buck Switch-mode Power Converter AN799:Matching MOSFET Drivers to MOSFETsTechnical Briefs:TB065:Linear Circuit Devices for Applications in Battery Powered Wireless SystemsEvaluation Boards:Microchip offers a number of boards to help you evaluate device families. Contact your local Microchip sales office for a demonstration.Evaluation boards are available for the following devices featured in this guide.MCP1252/3MCP73826/7/8MCP1601MCP1301Information subject to change. The Microchip name and logo, PIC, PICmicro, are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other coun-tries. All other trademarks mentioned herein are the property of their respective companies. © 2003, Microchip Technology Inc. All rights reserved. DS39610A 5/2003Microchip Technology Inc. • 2355 W. Chandler Blvd. • Chandler, AZ 85224-6199 • (480) 792-7200 • Fax (480) 792-9210Microchip Technology’s Analog & Interface Product Families。
DCDC和LDO的区别
DC/DC和LDO的区别LDO :LOW DROPOUT VOLTAGE低压差线性稳压器,故名思意,为线性的稳压器,仅能使用在降压应用中。
也就是输出电压必需小于输入电压。
优点:稳定性好,负载响应快。
输出纹波小缺点:效率低,输入输出的电压差不能太大。
负载不能太大,目前最大的LDO为5A(但要保证5A的输出还有很多的限制条件)DC/DC:直流电压转直流电压。
严格来讲,LDO也是DC/DC的一种,但目前DC/DC 多指开关电源。
具有很多种拓朴结构,如BUCK,BOOST。
等。
优点:效率高,输入电压范围较宽。
缺点:负载响应比LDO差,输出纹波比LDO大。
DC / DC 和 LDO的区别是什么?DC/DC 转换器一般由控制芯片,电杆线圈,二极管,三极管,电容构成。
DC/DC转换器为转变输入电压后有效输出固定电压的电压转换器。
DC/DC转换器分为三类:升压型DC/DC转换器、降压型DC/DC转换器以及升降压型DC/DC转换器。
根据需求可采用三类控制。
PWM控制型效率高并具有良好的输出电压纹波和噪声。
PFM控制型即使长时间使用,尤其小负载时具有耗电小的优点。
PWM/PFM转换型小负载时实行PFM控制,且在重负载时自动转换到PWM控制。
目前DC-DC转换器广泛应用于手机、MP3、数码相机、便携式媒体播放器等产品中。
LDO是low dropout voltage regulator的缩写,整流器.DC-DC,其实内部是先把DC直流电源转变为交流电电源AC。
通常是一种自激震荡电路,所以外面需要电感等分立元件。
然后在输出端再通过积分滤波,又回到DC电源。
由于产生AC电源,所以可以很轻松的进行升压跟降压。
两次转换,必然会产生损耗,这就是大家都在努力研究的如何提高DC-DC效率的问题。
1.DCtoDC包括boost(升压)、buck(降压)、Boost/buck(升/降压)和反相结构,具有高效率、高输出电流、低静态电流等特点,随着集成度的提高,许多新型DC-DC 转换器的外围电路仅需电感和滤波电容;但该类电源控制器的输出纹波和开关噪声较大、成本相对较高。
低压降稳压器 LD2980 说明书
This is information on a product in full production.December 2017DocID6280 Rev 201/22LD2980Ultra low drop voltage regulators compatiblewith low ESR output capacitorsDatasheet - production dataFeatures∙Stable with low ESR ceramic capacitors ∙Ultra low dropout voltage (0.12 V typ. at 50 mA load, 7 mV typ. at 1 mA load)∙Very low quiescent current (80 µA typ. at no load in on mode; max 1 µA in off mode)∙Guaranteed output current up to 50 mA ∙Logic-controlled electronic shutdown ∙Output voltage of 1.8; 3.0; 3.3; 5.0 V ∙Internal current and thermal limit∙± 0.5% Tolerance output voltage available (A version)∙Output low noise voltage 160 µVRMS ∙Temperature range: -40 to 125 °C ∙Smallest package SOT23-5L∙Fast dynamic response to line and load changesDescriptionThe low drop voltage and the ultra low quiescent current make them suitable for low noise, low power applications and in battery poweredsystems. The quiescent current in sleep mode is less than 1 µA when the INHIBIT pin is pulled low. A shutdown logic control function is available on pin n° 3 (TTL compatible). This means that when the device is used as local regulator, it is possible to put a part of the board in standby, decreasing the total power consumption. The LD2980 is designed to work with low ESR ceramic capacitors. Typical applications are cellularphone, laptop computer, personal digital assistant (PDA), personal stereo, camcorder and camera.Table 1. Device summaryPart numbersAB versionC version Output voltageLD2980CM18TR1.8 V LD2980ABM30TR 3.0 VLD2980ABM33TR LD2980CM33TR 3.3 V LD2980ABM50TRLD2980CM50TR 5.0 VContents LD2980Contents1Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 117Application notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157.1External capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157.2Input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157.3Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157.4Important . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157.5Inhibit input operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157.6Reverse current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 9Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 10Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212/22DocID6280 Rev 20LD2980Diagram 1 DiagramDocID6280 Rev 203/22Pin configuration LD29804/22DocID6280 Rev 202 Pin configurationTable 2. Pin descriptionPin n°Symbol Name and function1V IN Input port 2GND Ground pin3INHIBIT Control switch ON/OFF. Inhibit is not internally pulled-up; it cannot beleft floating. Disable the device when connected to GND or to a positive voltage less than 0.18 V 4NC Not connected 5V OUTOutput portTable 3. Thermal dataSymbol ParameterValue Unit R thJC Thermal resistance junction-case 81°C/W R thJAThermal resistance junction-ambient255°C/WDocID6280 Rev 205/22LD2980Maximum ratings3 Maximum ratingsNote:Absolute maximum ratings are those values beyond which damage to the device may occur.Functional operation under these condition is not implied.Table 4. Absolute maximum ratingsSymbol ParameterValue Unit V I DC input voltage -0.3 to 16V V INH INHIBIT input voltage -0.3 to 16VI O Output current Internally limited P D Power dissipationInternally limited T STG Storage temperature range-55 to 150°C T OPOperating junction temperature range-40 to 125°CTypical application LD29806/22DocID6280 Rev 204 Typical applicationNote:Inhibit pin is not internally pulled-up then it must not be left floating. Disable the device whenconnected to GND or to a positive voltage less than 0.18 V.5 Electricalcharacteristics(T J = 25 °C, V I = V O(NOM) +1 V, C I = 1 µF, C O = 2.2 µF, I O = 1 mA, V INH = 2 V, unlessotherwise specified).Table 5. Electrical characteristics for LD2980ABMSymbol Parameter Test conditions Min.Typ.Max.Unit V OP Operating input voltage 2.516VV O Output voltage I O = 1 mA 2.9853 3.015V I O = 1 to 50 mA 2.978 3.023I O = 1 to 50 mA, T J= -40 to 125°C 2.925 3.075V O Output voltage I O = 1 mA 3.284 3.3 3.317V I O = 1 to 50 mA 3.275 3.325I O = 1 to 50 mA, T J= -40 to 125°C 3.217 3.383V O Output voltage I O = 1 mA 4.9755 5.025V I O = 1 to 50 mA 4.963 5.038I O = 1 to 50 mA, T J= -40 to 125°C 4.875 5.125V O Line regulation V O(NOM) + 1 < V IN < 16 V, I O = 1 mA0.0030.014%/V T J= -40 to 125°C0.032I Q Quiescent currentON MODEI O = 080100µAI O = 0, T J= -40 to 125°C150I O = 1 mA100150I O = 1 mA, T J= -40 to 125°C200I O = 10 mA175250I O = 10 mA, T J= -40 to 125°C450I O = 50 mA500700I O = 50 mA, T J= -40 to 125°C1200OFF MODEV INH < 0.18 V0V INH < 0.18 V, T J= -40 to 125°C1V DROP Dropout voltage(1)I O = 013mVI O = 0, T J= -40 to 125°C5I O = 1mA710I O = 1mA, T J= -40 to 125°C15I O = 10mA4060I O = 10mA, T J= -40 to 125°C90I O = 50mA120150I O = 50mA, T J= -40 to 125°C225DocID6280 Rev 207/228/22DocID6280 Rev 20I SC Short circuit current R L = 0150mA SVR Supply voltage rejection C O = 10µF, f = 1kHz63dB V INH Inhibit input logic low LOW = Output OFF, T J = -40 to 125°C 0.80.18V V INL Inhibit input logic high HIGH = Output ON, T J = -40 to 125°C 1.61.3V I INH Inhibit input current V INH = 0V, T J = -40 to 125°C 0-1µA V INH = 5V, T J = -40 to 125°C 515e N Output noise voltage B W = 300 Hz to 50 kHz, C O = 10µF160µV RMS T SHDNThermal shutdown170°C1.For V O <2.5 V dropout voltage can be calculated according to the minimum input voltage in full temperature range.Table 5. Electrical characteristics for LD2980ABM (continued)Symbol ParameterTest conditionsMin.Typ.Max.Unit(T J = 25 °C, V I = V O(NOM) +1 V, C I = 1 µF, C O = 2.2 µF, I O = 1 mA, V INH = 2 V, unlessotherwise specified).Table 6. Electrical characteristics for LD2980CMSymbol Parameter Test conditions Min.Typ.Max.Unit V OP Operating input voltage 2.516VV O Output voltage I O = 1 mA 1.782 1.8 1.818V I O = 1 to 50 mA 1.773 1.827I O = 1 to 50 mA, T J= -40 to 125°C 1.737 1.863V O Output voltage I O = 1 mA 3.267 3.3 3.333V I O = 1 to 50 mA 3.251 3.35I O = 1 to 50 mA, T J= -40 to 125°C 3.184 3.415V O Output voltage I O = 1 mA 4.955 5.05V I O = 1 to 50 mA 4.925 5.075I O = 1 to 50 mA, T J= -40 to 125°C 4.825 5.175V O Line regulation V O(NOM) + 1 < V IN < 16 V, I O = 1 mA0.0030.014%/V T J= -40 to 125°C0.032I Q Quiescent currentON MODEI O = 080100µAI O = 0, T J= -40 to 125°C150I O = 1 mA100150I O = 1 mA, T J= -40 to 125°C200I O = 10 mA175250I O = 10 mA, T J= -40 to 125°C450I O = 50 mA500700I O = 50 mA, T J= -40 to 125°C1200OFF MODEV INH < 0.18 V0V INH < 0.18 V, T J= -40 to 125°C1V DROP Dropout voltage (1)I O = 013mV I O = 0, T J= -40 to 125°C5I O = 1mA710I O = 1mA, T J= -40 to 125°C15I O = 10mA4060I O = 10mA, T J= -40 to 125°C90I O = 50mA120150I O = 50mA, T J= -40 to 125°C225I SC Short circuit current R L = 0150mA SVR Supply voltage rejection C O = 10µF, f = 1kHz63dBDocID6280 Rev 209/2210/22DocID6280 Rev 20V INH Inhibit input logic low LOW = Output OFF, T J = -40 to 125°C 0.80.18V V INL Inhibit input logic high HIGH = Output ON, T J = -40 to 125°C 1.6 1.3V I INH Inhibit input current V INH = 0V, T J = -40 to 125°C 0-1µF V INH = 5V, T J = -40 to 125°C 515e N Output noise voltage B W = 300 Hz to 50 kHz, C O = 10µF160µV RMS T SHDNThermal shutdown170°C1.For V O <2.5 V dropout voltage can be calculated according to the minimum input voltage in full temperature range.Table 6. Electrical characteristics for LD2980CM (continued)Symbol ParameterTest conditionsMin.Typ.Max.Unit6 Typical performance characteristics(T J = 25 °C, V I = V O(NOM) +1 V, C I = 1 µF, C O = 2.2 µF, V INH = 2 V, unless otherwisespecified)DocID6280 Rev 2011/22Figure 10. Quiescent current vs output Figure 11. Off mode quiescent current vsFigure 16. Supply voltage rejection vsFigure 17. Noise voltage vs frequencyDocID6280 Rev 2013/22Figure 20. Load transient responseFigure 21. Line transient responseV O = 4.7V, I O = 1 to 100mA, C O = 4.7µF (X7R)V I = [V O(NOM) +1V], V O = 4.7V, I O = 100mA, C O = 4.7µF(X7R)LD2980Application notesnotes7 Applicationcapacitors7.1 ExternalLike any low-dropout regulator, the LD2980 requires external capacitors for regulatorstability. This capacitor must be selected to meet the requirements of minimum capacitanceand equivalent series resistance (please refer to Figure18 and Figure19). We suggest tosolder input and output capacitors as close as possible to the relative pins.capacitor7.2 InputAn input capacitor whose value is 1 µF is required with the LD2980 (amount of capacitancecan be increased without limit). This capacitor must be located a distance of not more than0.5" from the input pin of the device and returned to a clean analog ground. Any good qualityceramic, tantalum or film capacitors can be used for this capacitor.capacitor7.3 OutputThe LD2980 is designed specifically to work with ceramic output capacitors. It may also bepossible to use Tantalum capacitors, but these are not as attractive for reasons of size andcost. By the way, the output capacitor must meet both the requirement for minimum amountof capacitance and ESR (equivalent series resistance) value. The Figure18 and Figure19show the allowable ESR range as a function of the output capacitance. These curvesrepresent the stability region over the full temperature and I O range. Due to the differentloop gain, the stability improves for higher output versions and so the suggested minimumoutput capacitor value, if low ESR ceramic type is used, is 1 µF for output voltages equal ormajor than 3.8 V, 2.2 µF for output voltages from 2.85 to 3.3 V, and 3.3 µF for the otherversions. However, if an output capacitor lower than the suggested one is used, it’s possibleto make stable the regulator adding a resistor in series to the capacitor (see Figure18 andFigure19 to choose the right value according to the used version and keeping in accountthat the ESR of ceramic capacitors has been measured @ 100 kHz).7.4 ImportantThe output capacitor must maintain its ESR in the stable region over the full operatingtemperature to assure stability. Also, capacitor tolerance and variation with temperaturemust be considered to assure the minimum amount of capacitance is provided at all times.This capacitor should be located not more than 0.5" from the output pin of the device andreturned to a clean analog ground.7.5 Inhibit input operationThe inhibit pin can be used to turn OFF the regulator when pulled low, so drasticallyreducing the current consumption down to less than 1 µA. When the inhibit feature is notused, this pin must be tied to V I to keep the regulator output ON at all times. To assureproper operation, the signal source used to drive the inhibit pin must be able to swing aboveDocID6280 Rev 2015/22Application notes LD2980 and below the specified thresholds listed in the electrical characteristics section under V IHV IL. Any slew rate can be used to drive the inhibit.current7.6 ReverseThe power transistor used in the LD2980 has not an inherent diode connected between theregulator input and output. If the output is forced above the input, no current will flow fromthe output to the input across the series pass transistor. When a V REV voltage is applied onthe output, the reverse current measured, according to the test circuit in Figure22, flows tothe GND across the two feedback resistors. This current typical value is 160 µA. R1 and R2resistors are implanted type; typical values are, respectively, 42.6 kΩ and 51.150 kΩ.LD2980Package mechanical data 8 Package mechanical dataIn order to meet environmental requirements, ST offers these devices in different grades ofECOPACK® packages, depending on their level of environmental compliance. ECOPACK®specifications, grade definitions and product status are available at: .ECOPACK® is an ST trademark.Table 7. SOT23-5L mechanical datammDim.Min.Typ.Max.A0.90 1.45A100.15A20.90 1.30b0.300.50c 2.090.20D 2.95E 1.60e0.95H 2.80L0.300.6008DocID6280 Rev 2017/22Package mechanical data LD29809 Packaging mechanical dataTable 8. Tape and reel SOT23-5L mechanical datammDim.Min.Typ.Max.A180C12.813.013.2D20.2N60T14.4Ao 3.13 3.23 3.33Bo 3.07 3.17 3.27Ko 1.27 1.37 1.47Po 3.9 4.0 4.1P 3.9 4.0 4.1DocID6280 Rev 2019/22LD2980Revision history 10 RevisionhistoryTable 9. Document revision historyDate Revision Changes03-Jul-200613Order codes updated and new template.13-Nov-200614Add part number LD2980ABU18TR.06-Sep-200715Add Table 1 on page 1.14-Feb-200816Modified: Table 1 on page 1.11-Jul-200817Modified: Table 1 on page 1.06-Nov-201318Document name changed from LD2980ABxx and LD2980Cxx toLD2980.Updated Table 1: Device summary, Table 5: Electrical characteristics for LD2980ABM, Table 6: Electrical characteristics for LD2980CM and Section 8: Package information.Added Section 9: Packaging information.Minor text changes in title, in features and description in cover page.30-Aug-201719Removed 5.0 V versions of device (updated Features, Table 1: Device summary, Table 5: Electrical characteristics for LD2980ABM, and Table 6: Electrical characteristics for LD2980C.Minor textual updates.07-Dec-201720Updated Table1: Device summary on the cover page.DocID6280 Rev 2021/22LD2980IMPORTANT NOTICE – PLEASE READ CAREFULLYSTMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products.No license, express or implied, to any intellectual property right is granted by ST herein.Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.Information in this document supersedes and replaces information previously supplied in any prior versions of this document.© 2017 STMicroelectronics – All rights reserved22/22DocID6280 Rev 20。
LED照明常用英文翻译对照
LED照明常用英文翻译对照1backplane背板2Bandgapvoltagereference带隙电压参考3benchtopsupply工作台电源4BlockDiagram方块图5BodePlot波特图6Bootstrap自举7BottomFETBottomFET8bucketcapcitor桶形电容9chassis机架10Combi-senseCombi-sense11constantcurrentsource恒流源12CoreSataration铁芯饱和13crossoverfrequency交叉频率14currentripple纹波电流15CyclebyCycle逐周期16cycleskipping周期跳步17DeadTime死区时间18DIETemperature核心温度19Disable非使能,无效,禁用,关断20dominantpole主极点21Enable使能,有效,启用22ESDRatingESD额定值23EvaluationBoard评估板24Exceedingthespecificationsbelowmayresultinpermanent damagetothedevice,ordevicemalfunction.Operationoutsideofthe parametersspecifiedintheElectricalCharacteristicssectionisnotimplied.超过下面的规格使用可能引起永久的设备损害或设备故障。
建议不要工作在电特性表规定的参数范围以外。
25Faillingedge下降沿26figureofmerit品质因数27floatchargevoltage浮充电压28flybackpowerstage反驰式功率级29forwardvoltagedrop前向压降30free-running自由运行31Freewheeldiode续流二极管32Fullload满负载33gatedrive栅极驱动34gatedrivestage栅极驱动级35gerberplotGerber图36groundplane接地层37Henry电感单位:亨利38HumanBodyModel人体模式39Hysteresis滞回40inrushcurrent涌入电流41Inverting反相42jittery抖动43Junction结点44Kelvinconnection开尔文连接45LeadFrame引脚框架46LeadFree无铅47level-shift电平移动48Lineregulation电源调整率49loadregulation负载调整率50LotNumber批号51LowDropout低压差52Miller密勒53node节点54Non-Inverting非反相55novel新颖的56offstate关断状态57Operatingsupplyvoltage电源工作电压58outdrivestage输出驱动级59OutofPhase异相60PartNumber产品型号61passtransistorpasstransistor62P-channelMOSFETP沟道MOSFET 63Phasemargin相位裕度64PhaseNode开关节点65portableelectronics便携式电子设备66powerdown掉电67PowerGood电源正常68PowerGroud功率地69PowerSaveMode节电模式70Powerup上电71pulldown下拉72pullup上拉73PulsebyPulse逐脉冲(PulsebyPulse)74pushpullconverter推挽转换器75rampdown斜降76rampup斜升77redundantdiode冗余二极管78resistivedivider电阻分压器79ringing振铃80ripplecurrent纹波电流81risingedge上升沿82senseresistor检测电阻83SequencedPowerSupplys序列电源84shoot-through直通,同时导通85strayinductances.杂散电感86sub-circuit子电路87substrate基板88Telecom电信89ThermalInformation热性能信息90thermalslug散热片91Threshold阈值92timingresistor振荡电阻93TopFETTopFET94Trace线路,走线,引线95Transferfunction传递函数96TripPoint跳变点97turnsratio匝数比,=Np/Ns。
LD29150V50资料
DESCRIPTION The LD29150 is a high current, high accuracy, low-dropout voltage regulator series. These regulators feature 400mV dropout voltage and very low ground current. Designed for high current loads, these devices are also used in lower current, extremely low dropout-critical systems, where their tiny dropout voltage and ground current values are important attributes. Typical applications are in Power supply switching post regulation, Series power supply for monitors, Series power supply for VCRs and TVs, Computer Systems and Battery powered systems. Figure 1: Schematic Diagram For Adjustable Version
(*) Above 14V the device is automatically in shut-down. Absolute Maximum Ratings are those beyond which damage to the device may occur. Functional operation under these condition is not implied.
低压差线性稳压器(LDO)快速参考指南说明书
1Low ‐dropout (LDO) linear voltage regulators ‐Quick Reference GuideLow ‐dropout (LDO)linear voltage regulators are vital components in almost every circuit.They provide engineers with a simple and design ‐effective method to reduce an input voltage to one suitable for the application at hand.This guide provides developers with an overview of our most commonly used low ‐dropout regulators and will help them identify the most appropriate solution for each type of application.–How do I pick the right LDO for an application?While some applications may require more attention to specific characteristics, a generalized approach to selecting an LDO is to match criteria in the following order:∙Input voltage range∙Output voltage (fixed or adjustable)∙Current requirement of the load ∙Dropout voltage∙Output accuracy, in relation to line, load and temperature ∙Power supply rejection ratio and output noise voltage ∙Quiescent current∙Extra features (Enable, Soft ‐start, Power Good, etc.)–What are the main benefits of LDOs?Ease of useUsing LDOs to regulate voltage is always easy.Adding an LDO to any circuit requires only two capacitors and two resistors at the most.Most of ST’s LDOs are available in fixed ‐output configurations,allowing the engineer to omit the resistors,and some even operate without any external capacitors at all.Small sizeNew technologies and innovative solutions allow for producing LDOs in smaller sizes,such as our bumpless ST STAMP™(0.47x 0.47mm)packages.High PSRR and Low NoiseDevices for RF applications,data conversion,healthcare and signal processing are often susceptible to noise.While the primary purpose of the LDO is to regulate voltages,the way LDOs operate also makes them efficient at filtering power supply noise,allowing noise ‐sensitive loads to perform optimally.Low quiescent currentLow self ‐consumption is ideal for portable and battery ‐powered applications where a small quiescent current can make a large difference in regards to the application’s battery lifetime.ST’s ultra ‐low quiescence LDOs retain excellent dynamic performance and are available in a variety of small footprint packages.Powering sensitive loadsThe supply requirements of digital circuits,such as microprocessors,embedded memories and digital signal processing devices,are constantly being pushed to lower voltage levels,while the tolerances are tightening.Maintaining an accurate output voltage,while also retaining other essential features is key when selecting an LDO for these applications.1.8V2.4V6V2A1.25V 1.5VLD39200500mA5.5V2.1VLD39050LDLN015LD39015I OUTV IN0.8V150mA250mALDBL20200mALDLN025LD391001ALD56050LDK3201.6VST71585mA24V2.5VST73218VLDL11171.5ALD39130SLDK1301.4VLDF16V2.6V28VLD39300LD4930020VL4931LDK1202VSTLQ020STLQ015LM293126V100mALD59030LDLN030300mASmart Cityand HomeAutomotivePortable/IoTIndustrialLDO40L400mA5 V38V1.2ALD59150LDL212LDL112LD591002.2VLD56100LDFMLD39030LD39020LD391151.9V2Ultra-low dropoutThe dropout voltage is the defined minimum difference between the input voltage and the desired output voltage at a specified output current.An ultra-low-dropout voltage extends the lifetime of battery-operated devices,as it allows the LDO to maintain a high current output even when the battery voltage is reduced as the battery is discharged.Furthermore,it reduces power dissipation. Low quiescent currentQuiescent current is the current used to power an LDO's internal circuitry.LDOs with low quiescent current are essential for maintaining efficient operation and prolonging battery life, and are a natural choice for applications with extended standby times.High PSRR/Low noisePSRR is a measure of the LDO’s ability to endure a changing input voltage without letting it affect the output,while low noise LDOs are designed to minimize the intrinsic noise. Maintaining the expected output voltage with high precision and low noise is vital when powering sensitive devices or when the supply voltage is derived from a noisy source.ST1L08LDL112LD39200LD39115JLDCL015STLQ50/015/020ST715/LDK715LD39100LD39115JLDLN025LDLN030LD39015/020/030LD3985LDBL20LD590153–Glossary4 Accuracy–The maximum deviation from the specified output.Nominal accuracy can be affected byfactors such as low tolerance components,temperature and load monly cited acrosstemperature ranges,it is sometimes specified as Tolerance.AEC‐Q100–Any integrated circuit needs to be tested for compliance with the failure modes/stress testsas described in AEC‐Q100before it can be marketed as an automotive‐grade device.Bias voltage(Vbias)–An external power rail required by some LDOs.Associated with low dropoutvoltages and excellent noise characteristics.Dropout voltage–The dropout voltage is a measure of the smallest difference between input andoutput voltages.A lower dropout allows for more effective regulation and can be used to prolong thelifetime of battery‐powered devices.Enable/Inhibit(EN/INH)–Externally enabling(or disabling)the internal circuitry when the regulatorisn’t required reduces the consumed current and can prolong battery lifetime.Feedback network–Resistors are used to set the desired output voltage in a linear regulator.In fixedoutput regulators,these are already embedded inside the chip itself.Line Regulation–Line regulation describes how well the regulator can maintain its intended outputvoltage given a change in the input voltage.Load Regulation–Load regulation describes the regulator’s ability to maintain the specified outputgiven a change in the load(output)conditions.Noise–Specifically the noise generated by the LDO's internal bandgap reference,which is amplified inthe feedback network.Good noise figures are critical in circuits for wireless communication or that relyon high‐speed clock signals.Package–The packaging size is a compromise between size and thermal properties.The smaller apackage,the more susceptible it is to self‐heating.Some larger packages have exposed metal pads tofacilitate thermal dissipation into the PCB,allowing for improved passive cooling.Pass Element–The voltage regulation is performed by applying a variable voltage to a MOSFET gate,making it act in a similar way to a variable resistor.This transistor is commonly referred to as the PassElement.Power Dissipation–When a voltage is regulated,excess power is dissipated as heat.As heat can affectthe LDO and other parts negatively,and eventually cause a malfunction or thermal shutdown,thermalmanagement is important.Power Good(PG)–This signal indicates that the output is in regulation.It is useful for power‐sequencing,reset triggering,and more.PSRR–Power Supply Rejection Ratio,measure of the LDO’s ability to filter out noisy ripples in the inputvoltage.It is always specified in dB,and always over a range of frequencies.Quiescent current–The current consumed by the regulator to operate the internal circuitry.Loweringthe quiescent current is especially important for battery‐powered solutions.Soft Start(SS)–Soft Start is a controlled gradual increase of the power throughput,which preventslarge inrush currents that can overload the power supply.Thermal shutdown–A protective function that shuts down the device to prevent damage fromoverheating.Transient response–A description of the regulator’s ability to resist fast changes,known as transients,in the load and supply conditions.See Line Regulation and Load Regulation.For more information visit us on /ldo。
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DBV5DBV6YEQFEATURESDESCRIPTIONAPPLICATIONSDBV PACKAGE (TOP VIEW)IN GND ENOUTBYPASSFixed Option DBV PACKAGE IN GND ENOUT BYPASSFB Adjustable OptionTPS79328RIPPLE REJECTIONvsFREQUENCYINENOUT BYP GNDYEQ PACKAGE 101001 k10 k104080100 k1 M10 MR i p p l e R e j e c t i o n − d Bf − Frequency − Hz 50203060709010000.050.10.150.20.250.31001 k 10 k 100 kf − Frequency − HzV /H zO u t p u t S p e c t r a l N o i s e D e n s i t y − µTPS79328OUTPUT SPECTRAL NOISE DENSITYvsTPS79301,TPS79318TPS79325,TPS79328,TPS793285TPS79330,TPS79333,TPS793475SLVS348F–JULY 2001–REVISED SEPTEMBER 2003ULTRALOW-NOISE,HIGH PSRR,FAST RF 200-mA LOW-DROPOUT LINEARREGULATORS IN NANOSTAR™WAFER CHIP SCALE AND SOT23•200-mA RF Low-Dropout Regulator The TPS793xx family of low-dropout (LDO)With Enablelow-power linear voltage regulators features high power supply rejection ratio (PSRR),ultralow noise,•Available in 1.8-V,2.5-V,2.8-V,2.85-V,3-V,fast start-up,and excellent line and load transient 3.3-V,4.75-V,and Adj (1.22V to 5.5V)responses in NanoStar wafer chip scale and SOT23•High PSRR (70dB at 10kHz)packages.NanoStar packaging gives an ultrasmall •Ultralow Noise (32µV)footprint as well as an ultralow profile and package weight,making it ideal for portable applications such •Fast Start-Up Time (50µs)as handsets and PDAs.Each device in the family is •Stable With a 2.2-µF Ceramic Capacitor stable,with a small 2.2-µF ceramic capacitor on the •Excellent Load/Line Transient Response output.The TPS793xx family uses an advanced,proprietary BiCMOS fabrication process to yield ex-•Very Low Dropout Voltage (112mV at Full tremely low dropout voltages (e.g.,112mV at 200Load,TPS79330)mA,TPS79330).Each device achieves fast start-up •5-Pin SOT23(DBV)and NanoStar Wafer Chip times (approximately 50µs with a 0.001-µF bypass Scale (YEQ)Packagescapacitor)while consuming very low quiescent cur-rent (170µA typical).Moreover,when the device is placed in standby mode,the supply current is re-•Cellular and Cordless Telephones duced to less than 1µA.The TPS79328exhibits approximately 32µV RMS of output voltage noise with •Bluetooth™,Wireless LAN a 0.1-µF bypass capacitor.Applications with analog •RF components that are noise sensitive,such as portable •VCOsRF electronics,benefit from the high PSRR and •Handheld Organizers,PDAlow-noise features as well as the fast response time.Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.Bluetooth is a trademark of Bluetooth Sig,Inc.NANOSTAR is a trademark of Texas Instruments.ABSOLUTE MAXIMUM RATINGSTPS79301,TPS79318TPS79325,TPS79328,TPS793285TPS79330,TPS79333,TPS793475SLVS348F–JULY 2001–REVISED SEPTEMBER 2003AVAILABLE OPTIONS(1)The DBVR indicates tape and reel of 3000parts.(2)The YEQR indicates tape and reel of 3000parts.YEQT indicates tape and reel of 250parts.(3)Product preview stage of development.over operating temperature range (unless otherwise noted)(1)(1)Stresses beyond those listed under "absolute maximum ratings"may cause permanent damage to the device.These are stress ratings only,and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.DISSIPATION RATING TABLE ELECTRICAL CHARACTERISTICSTPS79301,TPS79318 TPS79325,TPS79328,TPS793285 TPS79330,TPS79333,TPS793475 SLVS348F–JULY2001–REVISED SEPTEMBER2003(1)The JEDEC low K(1s)board design used to derive this data was a3-inch x3-inch,two layer board with2ounce copper traces on top ofthe board.(2)The JEDEC high K(2s2p)board design used to derive this data was a3-inch x3-inch,multilayer board with1ounce internal power andground planes and2ounce copper traces on top and bottom of the board.over recommended operating temperature range EN=V I,T J=-40to125°C,V I=V O(typ)+1V,I O=1mA,C o=10µF,C(byp)= 0.01µF(unless otherwise noted)(1)Minimum V(IN)is2.7V or V(OUT)+V(DO),whichever is greater.(2)If V O≤2.5V then V(IN),min=2.7V,V(IN),max=5.5V.FUNCTIONAL BLOCK DIAGRAM-ADJUSTABLE VERSIONV INV INGND ENTPS79301,TPS79318TPS79325,TPS79328,TPS793285TPS79330,TPS79333,TPS793475SLVS348F–JULY 2001–REVISED SEPTEMBER 2003ELECTRICAL CHARACTERISTICS (continued)over recommended operating temperature range EN =V I,T J =-40to 125°C,V I =V O(typ)+1V,I O =1mA,C o =10µF,C (byp)=0.01µF (unless otherwise noted)(3)V (IN)=V (OUT),typ -100mV.The TPS79325dropout voltage is limited by the input voltage range.Functional Block Diagram-Fixed VersionV V V OUTBypassTPS79301,TPS79318TPS79325,TPS79328,TPS793285TPS79330,TPS79333,TPS793475SLVS348F–JULY 2001–REVISED SEPTEMBER 2003Functional Block Diagram-Adjustable Version (continued)Terminal FunctionsTYPICAL CHARACTERISTICS (SOT23PACKAGE)I O − Output Current − mA − O u t p u t V o l t a g e − VV O 2.7752.782.7852.792.7952.82.805T J − Junction Temperature − °C − O u t p u t V o l t a g e − VV O−40−25−105203550658095110125T J − Junction Temperature − °CG r o u n d C u r r e n t − Aµ00.050.10.150.20.250.31001 k 10 k 100 k f − Frequency − HzV /H zO u t p u t S p e c t r a l N o i s e D e n s i t y −µ00.050.10.150.20.250.31001 k 10 k 100 kV /H zO u t p u t S p e c t r a l N o i s e D e n s i t y − µ f − Frequency − Hz1001 k 10 k 100 kf − Frequency − HzV /H zO u t p u t S p e c t r a l N o i s e D e n s i t y − µTPS79301,TPS79318TPS79325,TPS79328,TPS793285TPS79330,TPS79333,TPS793475SLVS348F–JULY 2001–REVISED SEPTEMBER 2003TPS79328TPS79328TPS79328OUTPUT VOLTAGEOUTPUT VOLTAGEGROUND CURRENTvsvsvsOUTPUT CURRENTJUNCTION TEMPERATUREJUNCTION TEMPERATUREFigure 1.Figure 2.Figure 3.TPS79328TPS79328TPS79328OUTPUT SPECTRAL NOISEOUTPUT SPECTRAL NOISEOUTPUT SPECTRAL NOISEDENSITYDENSITYDENSITYvsvsvsFREQUENCYFREQUENCYFREQUENCYFigure 4.Figure 5.Figure 6.1001 M101 k f − Frequency − Hz10 k − O u t p u t I m p e d a n c e −Z o Ω100 k10 M−40−25−105203550658095110125T J − Junction Temperature − °C− D r o p o u t V o l t a g e − m VV D O 0.0010.010.1R M S − R o o t M e a n S q u a r e d O u t p u t N o i s e −(R M S )V µC (byp) − Bypass Capacitance − µF0102030405060101001 k10 k104080100 k1 M10 MR i p p l e R e j e c t i o n− d Bf − Frequency − Hz5002030607090100101001 k10 k2060100100 k1 M10 MR i p p l e R e j e c t i o n − d Bf − Frequency − Hz 407090305080100101001 k10 k 2060100100 k 1 M 10 MR i p p l e R e j e c t i o n− d Bf − Frequency − Hz407090305080100TPS79301,TPS79318TPS79325,TPS79328,TPS793285TPS79330,TPS79333,TPS793475SLVS348F–JULY 2001–REVISED SEPTEMBER 2003TYPICAL CHARACTERISTICS (SOT23PACKAGE)(continued)ROOT MEAN SQUARE OUTPUTTPS79328NOISE OUTPUT IMPEDANCEDROPOUT VOLTAGEvsvsvsBYPASS CAPACITANCEFREQUENCYJUNCTION TEMPERATUREFigure 7.Figure 8.Figure 9.TPS79328TPS79328TPS79328RIPPLE REJECTIONRIPPLE REJECTIONRIPPLE REJECTIONvsvsvsFREQUENCYFREQUENCYFREQUENCYFigure 10.Figure 11.Figure 12.V Ot − Time − µs− O u t p u t V o l t a g e − V E n a b l e V o l t a g e − Vt − Time − µsV O O u t p u t V o l t a g e − m V∆ − C h a n g e I n − O u t p u t C u r r e n t − m AI OV O t − Time − µs− O u t p u t V o l t a g e − m VV I − I n p u t V o l t a g e − m V500 m V /d i v1s/div10050020406080100120D C D r o p u o y V o l t a g e − m V150200250140160180200I O − Output Current − mA501001502002.533.544.55V I − Input Voltage − V− D r o p o u t V o l t a g e − m VV D O TPS79301,TPS79318TPS79325,TPS79328,TPS793285TPS79330,TPS79333,TPS793475SLVS348F–JULY 2001–REVISED SEPTEMBER 2003TYPICAL CHARACTERISTICS (SOT23PACKAGE)(continued)TPS79328OUTPUT VOLTAGE,ENABLE VOLTAGEvsTPD79328TPD79328TIME (START-UP)LINE TRANSIENT RESPONSELOAD TRANSIENT RESPONSEFigure 13.Figure 14.Figure 15.TPS79301DC DROPOUT VOLTAGEDROPOUT VOLTAGEvsvsPOWER UP /POWER DOWNOUTPUT CURRENTINPUT VOLTAGEFigure 16.Figure 17.Figure 18.2341.52.53.523− M i n i m u m R e q u i r e d I n p u t V o l t a g e − VV O − Output Voltage − VV I 1.75 2.25 2.75 3.252.80.020.040.060.080.2I O − Output Current − AE S R − E q u i v a l e n t S e r i e s R e s i s t a n c e −Ω0.020.040.060.080.2I O − Output Current − AE S R − E q u i v a l e n t S e r i e s R e s i s t a n c e −ΩTPS79301,TPS79318TPS79325,TPS79328,TPS793285TPS79330,TPS79333,TPS793475SLVS348F–JULY 2001–REVISED SEPTEMBER 2003TYPICAL CHARACTERISTICS (SOT23PACKAGE)(continued)TYPICAL REGIONS OF STABILITYTYPICAL REGIONS OF STABILITYMINIMUM REQUIRED INPUT VOLT-EQUIVALENT SERIES EQUIVALENT SERIES AGE RESISTANCE (ESR)RESISTANCE (ESR)vsvsvsOUTPUT VOLTAGEOUTPUT CURRENTOUTPUT CURRENTFigure 19.Figure 20.Figure 21.APPLICATION INFORMATION0.1V ITPS793xxµFExternal Capacitor RequirementsBoard Layout Recommendation to Improve PSRR and Noise PerformanceTPS79301,TPS79318TPS79325,TPS79328,TPS793285TPS79330,TPS79333,TPS793475SLVS348F–JULY 2001–REVISED SEPTEMBER 2003The TPS793xx family of low-dropout (LDO)regulators has been optimized for use in noise-sensitive battery-operated equipment.The device features extremely low dropout voltages,high PSRR,ultralow output noise,low quiescent current (170µA typically),and enable-input to reduce supply currents to less than 1µA when the regulator is turned off.A typical application circuit is shown in Figure 22.Figure 22.Typical Application CircuitA 0.1-µF or larger ceramic input bypass capacitor,connected between IN and GND and located close to the TPS793xx,is required for stability and improves transient response,noise rejection,and ripple rejection.A higher-value electrolytic input capacitor may be necessary if large,fast-rise-time load transients are anticipated and the device is located several inches from the power source.Like all low dropout regulators,the TPS793xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop.The minimum recommended capacitance is 2.2µF.Any 2.2µF or larger ceramic capacitor is suitable,provided the capacitance does not vary significantly over temperature.The internal voltage reference is a key source of noise in an LDO regulator.The TPS793xx has a BYPASS pin which is connected to the voltage reference through a 250-k Ωinternal resistor.The 250-k Ωinternal resistor,in conjunction with an external bypass capacitor connected to the BYPASS pin,creates a low pass filter to reduce the voltage reference noise and,therefore,the noise at the regulator output.In order for the regulator to operate properly,the current flow out of the BYPASS pin must be at a minimum,because any leakage current creates an IR drop across the internal resistor thus creating an output error.Therefore,the bypass capacitor must have minimal leakage current.For example,the TPS79328exhibits only 32µV RMS of output voltage noise using a 0.1-µF ceramic bypass capacitor and a 2.2-µF ceramic output capacitor.Note that the output starts up slower as the bypass capacitance increases due to the RC time constant at the BYPASS pin that is created by the internal 250-k Ωresistor and external capacitor.To improve ac measurements like PSRR,output noise,and transient response,it is recommended that the board be designed with separate ground planes for V IN and V OUT ,with each ground plane connected only at the GND pin of the device.In addition,the ground connection for the bypass capacitor should connect directly to the GND pin of the device.Power Dissipation and Junction TemperatureP D(max)+T J max*T ARθJAWhere:T J max is the maximum allowable junction temperature.RθJA is the thermal resistance junction-to-ambient for the package, see the dissipation rating table.T A is the ambient temperature.(1)P D+ǒV I*V OǓI O(2) Programming the TPS79301Adjustable LDO RegulatorV O+V refǒ1)R1R2Ǔ(3) Where:V ref = 1.2246 V typ (the internal reference voltage)R1+ǒV O V ref*1ǓR2(4)C1+(3x10–7)x(R1)R2)(R1x R2)(5)TPS79301,TPS79318TPS79325,TPS79328,TPS793285TPS79330,TPS79333,TPS793475SLVS348F–JULY2001–REVISED SEPTEMBER2003APPLICATION INFORMATION(continued)Specified regulator operation is assured to a junction temperature of125°C;the maximum junction temperature should be restricted to125°C under normal operating conditions.This restriction limits the power dissipation the regulator can handle in any given application.To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation,P D(max),and the actual dissipation,P D,which must be less than or equal to P D(max).The maximum-power-dissipation limit is determined using the following equation:The regulator dissipation is calculated using:Power dissipation resulting from quiescent current is negligible.Excessive power dissipation triggers the thermal protection circuit.The output voltage of the TPS79301adjustable regulator is programmed using an external resistor divider as shown in Figure23.The output voltage is calculated using:Resistors R1and R2should be chosen for approximately50-µA divider current.Lower value resistors can be used for improved noise performance,but the solution consumes more power.Higher resistor values should be avoided as leakage current into/out of FB across R1/R2creates an offset voltage that artificially in-creases/decreases the feedback voltage and thus erroneously decreases/increases V O.The recommended design procedure is to choose R2=30.1kΩto set the divider current at50µA,C1=15pF for stability,and then calculate R1using:In order to improve the stability of the adjustable version,it is suggested that a small compensation capacitor be placed between OUT and FB.For voltages<1.8V,the value of this capacitor should be100pF.For voltages >1.8V,the approximate value of this capacitor can be calculated as:The suggested value of this capacitor for several resistor ratios is shown in the table below.If this capacitor is not used(such as in a unity-gain configuration)or if an output voltage<1.8V is chosen,then the minimum recommended output capacitor is4.7µF instead of2.2µF.22 pF 15 pF 15 pFOUTPUT VOL T AGE PROGRAMMING GUIDEOUTPUT VOLTAGER1R22.5 V 3.3 V3.6 VC131.6 k Ω51 k Ω59 k Ω30.1 k Ω30.1 k Ω30.1 k ΩV OV I30.7 V1µF0 pF 1.22 V shortopenRegulator ProtectionTPS79301,TPS79318TPS79325,TPS79328,TPS793285TPS79330,TPS79333,TPS793475SLVS348F–JULY 2001–REVISED SEPTEMBER 2003APPLICATION INFORMATION (continued)Figure 23.TPS79301Adjustable LDO Regulator ProgrammingThe TPS793xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (e.g.,during power down).Current is conducted from the output to the input and is not internally limited.If extended reverse voltage operation is anticipated,external limiting might be appropriate.The TPS793xx features internal current limiting and thermal protection.During normal operation,the TPS793xx limits output current to approximately 400mA.When current limiting engages,the output voltage scales back linearly until the overcurrent condition ends.While current limiting is designed to prevent gross device failure,care should be taken not to exceed the power dissipation ratings of the package or the absolute maximum voltage ratings of the device.If the temperature of the device exceeds approximately 165°C,thermal-protection circuitry shuts it down.Once the device has cooled down to below approximately 140°C,regulator operation resumes.TPS793xxYEQ NanoStar™Wafer Chip Scale InformationNOTES:A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. NanoStar ™ package configuration.D. This package is tin-lead (SnPb), consult the factory for availability of lead-free material.NanoStar is a trademark of T exas Instruments.TPS79301,TPS79318TPS79325,TPS79328,TPS793285TPS79330,TPS79333,TPS793475SLVS348F–JULY 2001–REVISED SEPTEMBER 2003APPLICATION INFORMATION (continued)Figure 24.NanoStar™Wafer Chip Scale PackageNOTES: A.All linear dimensions are in millimeters.B.This drawing is subject to change without notice.C.Body dimensions do not include mold flash or protrusion.D.Falls within JEDEC MO-178NOTES: A.All linear dimensions are in millimeters.B.This drawing is subject to change without notice.C.Body dimensions do not include mold flash or protrusion.D.Leads 1, 2, 3 may be wider than leads 4, 5, 6 for package orientation.IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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