海思Hi3536Graphics Development User Guide

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Hi3536DMEBPLUS_VER_A_SCH

Hi3536DMEBPLUS_VER_A_SCH
Vout=0.6*(1+R258/R373)=1.06V
Tdelay=Ln[3.3/(3.3-1.6)]*R*C=14.59ms
DC/DC 12V->DVDD_CPU 6Amax
10A 0.005OHM 40DEGC
8 VIN 13 EXPAD
VOUT 2
5 EN
U12
SW1 1 SW2 9
L17 1UH
C
13.DDR1A&B VTT
14.DDR1C&D VTT
32.DDR VTT
33.PCIe X1
C
15.Unit 5 of Hi3536V100 (SYSTEM) 16.SPI NOR&NAND FLASH&EMMC
17.POWER ON SETTING
D
18.Unit 3 of Hi3536V100 (INTERFACE0)
C
D 1
DC/DC 12V->1V5 1200Amax
12V0
BST
R51 0
C27 1UF
3 IN
6
1V5
U16
3.6A 0.03OHM 40DEGC
3V3
2 SW
L1
2.2UH
C
R260
6.5V Zener MP1470
100K
5 EN
1 GND
FB 4
R52 R403
0/NC C285 100NF/NC 150K R12 27K
VOUT 6 ADJ 5 BP 4
R186 C66
R207 1.5K
1%
1%
R175 4.7K
U41 1 VIN 2 GND 3 EN

海思 3516AV200全功能核心板技术手册说明书

海思 3516AV200全功能核心板技术手册说明书

海思3516AV200全功能核心板技术手册一、应用场合:1. 适用于开发以下产品:(1)网络摄像机。

(2)4G/WIFI无线传输产品。

(3)安防监控产品。

(4)网络音视频产品。

(5)编码器。

(6)4K摄像机。

(7)1200万抓拍摄像机。

(8)多路摄像机。

(9)运动相机。

(10)航拍摄像机。

(11)人工智能(AI)产品。

2. 适用于学习linux平台、熟悉ARM开发。

3. 适用于需要熟悉海思音视频编解码、AI算法、多路图像处理、图像拼接、图像展开、4G/WIFI无线传输的开发人员。

二、型号:IPC-4KCODE-MAIN-V4三、产品特色:■核心芯片采用海思高性能多媒体处理器片上系统(SOC),内部集成双核A7(800MHZ)、A17(1.25GHZ)。

■集成了海思第四代ISP,支持WDR、多级降噪、六轴防抖及多种图像增强和矫正算法,为客户提供专业级的图像质量■图像质量优异、功耗低。

■采用标准的H.264/H.265 High Profile压缩算法,方便在窄带上实现高清晰的图像传输。

■最大支持600万编码,最高支持600万/30帧或者1080P/90帧H.264/H.265编码。

■支持多达2路Sensor输入,支持全景相机和无人机等多种产品应用。

■支持双向语音对讲。

■支持ONVIF协议,可对接海康、大华、美电贝尔、雄迈等NVR。

■支持GB28181协议。

■支持手机监看。

■支持WIFI:热点和STA模式。

■支持4G全网通:联通/移动/电信,5模或者7模。

■支持二次开发四、技术参数:五、产品外观及接口定义: 核心板正面:核心板背面:(一)、核心板与底板连接J3座子定义:(二)、核心板与底板连接座子J5定义:(三)、核心板与sensor1接接座子J2定义:(四)、核心板与sensor2连接座子J6定义:。

Hi3536 SDK 安装以及升级使用说明

Hi3536 SDK 安装以及升级使用说明

Hi3536 SDK 安装以及升级使用说明序1、先明确文中的几个概念。

主片: 多片级联应用中,指PCI主片。

从片: 多片级联应用中,指PCI从片。

主arm:指双CPU中的A17。

从arm:指双CPU中的A7。

第一章 安装SDK1、Hi3536 SDK包位置在"Hi3536_V100R001***/01.software/board"目录下,您可以看到一个 Hi3536_SDK_Vx.x.x.x.tgz 的文件,该文件就是Hi3536的软件开发包。

2、解压缩SDK包在linux服务器上(或者一台装有linux的PC上,主流的linux发行版本均可以),使用命令:tar -zxfHi3536_SDK_Vx.x.x.x.tgz ,解压缩该文件,可以得到一个Hi3536_SDK_Vx.x.x.x目录。

3、展开SDK包内容返回Hi3536_SDK_Vx.x.x.x目录,运行./sdk.unpack(请用root或sudo权限执行)将会展开SDK包打包压缩存放的内容,请按照提示完成操作。

如果您需要通过WINDOWS操作系统中转拷贝SDK包,请先运行./sdk.cleanup,收起SDK包的内容,拷贝到新的目录后再展开。

4、在linux服务器上安装交叉编译器1)安装uclibc交叉编译器(注意,需要有sudo权限或者root权限):进入Hi3536_SDK_Vx.x.x.x/osdrv/opensource/toolchain/arm-hisiv300-linux目录,运行chmod +x cross.v300.install,然后运行./cross.v300.install即可。

2) 安装glibc交叉编译器:进入Hi3536_SDK_Vx.x.x.x/osdrv/opensource/toolchain/arm-hisiv400-linux目录,运行chmod +x cross.v400.install,然后运行./cross.v400.install即可。

IPC芯片规格对比列表---台湾联咏+海思AI

IPC芯片规格对比列表---台湾联咏+海思AI

IPC芯⽚规格对⽐列表---台湾联咏+海思AI联咏Novatek NT98525是⼀款⾼集成度的SoC,具有⾼图像质量、低⽐特率、低功耗的特点,⽬标是4Mp到5Mp边缘计算IP摄像机的应⽤。

SoC集成 ARM Cortex A9 CPU核,新⼀代ISP,H.265/H.264视频压缩编解码器,⾼性能硬件DLA模块、图形引擎、显⽰控制器、以太⽹PHY、USB 2.0、⾳频编解码器、RTC和SD/SDIO 3.0,可提供最佳性价⽐的边缘计算IP摄像机解决⽅案。

华为海思半导体(Hisilicon)automotive HI3569v100汽车车规摄像芯⽚华为海思半导体(Hisilicon)监控设备 hi3516型号-特征华为海思半导体(Hisilicon)监控设备 Hi3516EV100&nBSP; 主流2M智能IP摄像头SoC华为海思半导体(Hisilicon)监控设备 Hi3516EV200 专业4M智能IP摄像SoC华为海思半导体(Hisilicon)监控设备 Hi3516EV300 专业4M智能IP摄像SoC华为海思半导体(Hisilicon)监控设备 Hi3516CV100 主流全⾼清IP摄像头SoC华为海思半导体(Hisilicon)监控设备 Hi3516CV200 主流全⾼清IP摄像头SoC华为海思半导体(Hisilicon)监控设备 Hi3516CV300 主流全⾼清IP摄像头Soc华为海思半导体(Hisilicon)监控设备 Hi3516CV500 专业4M智能IP摄像SoC华为海思半导体(Hisilicon)监控设备 Hi3516CV200 主流全⾼清IP摄像头SoC华为海思半导体(Hisilicon)监控设备 Hi3516CV300 主流全⾼清IP摄像头Soc华为海思半导体(Hisilicon)监控设备 Hi3516CV500 专业4M智能IP摄像SoC华为海思半导体(Hisilicon)监控设备 hi3518型号-特征华为海思半导体(Hisilicon)监控设备 Hi3518C 主流的超⼤⾼清IP相机SoC华为海思半导体(Hisilicon)监控设备 Hi3518E 主流的超⼤⾼清IP相机SoC华为海思半导体(Hisilicon)监控设备 Hi3518A 主流的超⼤⾼清IP相机SoC华为海思半导体(Hisilicon)监控设备 Hi3518C 主流的超⼤⾼清IP相机SoC华为海思半导体(Hisilicon)监控设备 Hi3518E 主流的超⼤⾼清IP相机SoC华为海思半导体(Hisilicon)监控设备 Hi3518A 主流的超⼤⾼清IP相机SoC华为海思半导体(Hisilicon)监控设备 Hi3518EV200 主流的超⼤⾼清IP相机SoC华为海思半导体(Hisilicon)监控设备 Hi3518EV201 主流的超⼤⾼清IP相机SoC华为海思半导体(Hisilicon)监控设备 Hi3518EV300 主流的超⼤⾼清IP相机SoC华为海思半导体(Hisilicon)监控设备 hi3519型号-特征华为海思半导体(Hisilicon)监控设备 Hi3519AV100 先进的智能IP摄像头Soc华为海思半导体(Hisilicon)监控设备 Hi3519AV101 先进的智能IP摄像头Soc华为海思半导体(Hisilicon)监控设备 Hi3519V101 先进的⼯业IP摄像头Soc华为海思半导体(Hisilicon)监控设备 hi3520型号-特征华为海思半导体(Hisilicon)监控设备 HI3520D 主流4频道超⼤⾼清H.265 DVR SoC华为海思半导体(Hisilicon)监控设备 HI3520DV100 主流4频道超⼤⾼清H.265 DVR SoC华为海思半导体(Hisilicon)监控设备 HI3520DV200 ⼊门级4通道超⼤⾼清DVR SoC华为海思半导体(Hisilicon)监控设备 HI3520DV300 主流4频道超⼤⾼清H.265 DVR SoC华为海思半导体(Hisilicon)监控设备 HI3520DV400 主流4频道超⼤⾼清H.265 DVR SoC华为海思半导体(Hisilicon)监控设备 hi3521型号-特征华为海思半导体(Hisilicon)监控设备 Hi3521AV100 主流4通道全⾼清DVR SoC华为海思半导体(Hisilicon)监控设备 Hi3521DV100 主流4频道全⾼清H.265 DVR SoC华为海思半导体(Hisilicon)监控设备 hi3531型号-特征华为海思半导体(Hisilicon)监控设备 Hi3531DV100 主流8通道全⾼清H.265 DVR SoC华为海思半导体(Hisilicon)监控设备 Hi3531AV100 主流8通道全⾼清DVR SoC华为海思半导体(Hisilicon)监控设备 hi3535V100 主流4通道全⾼清NVR SoC华为海思半导体(Hisilicon)监控设备 Hi3536型号-特征华为海思半导体(Hisilicon)监控设备 Hi3536V100 多功能16通道全⾼清NVR SoC华为海思半导体(Hisilicon)监控设备 Hi3536CV100 多功能8/16通道全⾼清NVR SoC华为海思半导体(Hisilicon)监控设备 Hi3536DV100 ⼊门级4通道全⾼清NVR SoC华为海思半导体(Hisilicon) MobileCam Hi3556A100 1080p60/2KP30⼊门级移动相机解决⽅案华为海思半导体(Hisilicon) MobileCam Hi3556V100 1080P60/2KP30⼊门级移动相机解决⽅案华为海思半导体(Hisilicon) MobileCam Hi3556V200 1080P60/2KP30⼊门级移动相机解决⽅案华为海思半导体(Hisilicon) MobileCam Hi3556AV100 1080P60/2KP30⼊门级移动相机解决⽅案华为海思半导体(Hisilicon) MobileCam HI3559型号-特征华为海思半导体(Hisilicon) MobileCam Hi3559A 4KP60/4KP120或8KP30⾼端移动相机解决⽅案华为海思半导体(Hisilicon) MobileCam Hi3559C 4KP60/4KP120或8KP30⾼端移动相机解决⽅案华为海思半导体(Hisilicon) MobileCam Hi3559V100 4KP60/4KP120或8KP30⾼端移动相机解决⽅案华为海思半导体(Hisilicon) MobileCam Hi3559V200 4KP120或8KP30⾼端移动相机解决⽅案华为海思半导体(Hisilicon) MobileCam Hi3559AV100 4KP60/4KP120或8KP30⾼端移动相机解决⽅案华为海思半导体(Hisilicon) MobileCam Hi3559CV100 ⾼端4K120/8K30移动摄像头解决⽅案华为海思半导体(Hisilicon)机顶盒 Hi3136V100 DVB-S2 - DVB-S调解器芯⽚华为海思半导体(Hisilicon)机顶盒 Hi3137V100 DVB-T2/DVB-T调解器芯⽚华为海思半导体(Hisilicon)机顶盒 Hi3130V100 DVB-C解调器芯⽚华为海思半导体(Hisilicon)机顶盒 Hi3716型号-特征华为海思半导体(Hisilicon)机顶盒 Hi3716MV420 HEVC FHD PVR芯⽚组华为海思半导体(Hisilicon)机顶盒 Hi3716MV410 HEVC Zapper FHD芯⽚组华为海思半导体(Hisilicon)机顶盒 Hi3716MV310 ⼊门级FHD连接芯⽚组华为海思半导体(Hisilicon)机顶盒 Hi3716MV330 性价⽐最⾼的FHD芯⽚组。

Hi3536经验

Hi3536经验

一、ubutun 软件更新sudo apt-get update2.装一些32位的库64位Ubuntu使用sudo apt-get install ia32-libs二、安装vimapt-get install vim-gtk三、虚拟机找不到/mnt/hgfs挂载目录使用较低版本的Ubuntu低于12四、设置ubutun固定IPsudo vi /etc/network/interfaces原有内容只有如下两行:auto loiface lo inet loopback向末尾追加以下内容:auto eth0iface eth0 inet staticaddress 192.168.1.188gateway 192.168.1.1netmask 255.255.255.0network 192.168.1.0broadcast 192.168.1.255配置DNS解析vim /etc/resolvconf/resolv.conf.d/base添加:nameserver 192.168.1.1nameserver 220.170.64.68重启网卡/etc/init.d/networking restart五、解压arm-hisiv300-linux.tar.bz2文件tar –zxvf Hi3536_V100R001XX.tgz。

路径:/tftpboot/Hi3536_SDK_V2.0.2.0/osdrv/opensource/toolchain/arm-hisiv400-linux步骤1. 解压工具链。

工具链及其安装程序位于osdrv/opensource/toolchain/arm-hisiv300-linux/目录下,进入此目录进行解压,命令如下:cd toolchain/arm-hisiv300-linux/tar -xvf arm-hisiv300-linux.tar.bz2步骤2. 安装工具链。

海思半导体Hi3532 DataBrief(产品简介)

海思半导体Hi3532 DataBrief(产品简介)

● 软件实现多协议音频编解码 安全引擎 ● 硬件实现AES/DES/3DES加解密算法 ● 数字水印 视频接口 ● 视频输入接口 − 4xBT656@108/144MHz,支持16D1/960H
实时视频输入 − 8xBT656@54/72MHz,支持16D1/960H实
时视频输入 − 8xBT656@27/36MHz,支持8D1/960H实
时视频输入 − 5xBT1120@148.5MHz,支持4路
1080P@30fps或4路720P@30/60fps视频 输入;一路用于Hi3531、Hi3532间视频 数据级联传输 − 8xMutiplexed BT656@148.5MHz,支持8 路720P@30fps视频输入 ● 视频输出接口 − 1xBT1120@148.5MHz视频输出口用于 Hi3531、Hi3532间视频数据级联传输 − 提供1层OSD,格式为RGB1555、 RGB8888可配置,最大分辨率 1920x1080 − 提供1层独立的视频PIP层,实现视频画 中画功能 音频接口 ● 5个标准I2S接口 − 4个支持输入 − 1个支持输入输出 − 每个可支持最大16路16bit音频输入 网络接口 ● 1个MAC接口 − 支持MII模式 − 支持10/100Mbit/s 全双工或半双工模式
测、周界防范、视频诊断等多种智能分析 应用 视频与图形处理 ● 支持de-interlace、图像增强、边缘增强、 3D去噪等前处理功能 ● 支持视频、图形输出抗闪烁处理 ● 支持视频1/16~8x缩放功能 ● 支持图形 1/2~2x缩放功能 ● 8个区域的编码前处理OSD叠加功能 ● 视频层、图形层Alpha叠加功能 音频编解码 ● 硬件实现多协议音频编码,支持ADPCM、 G.711、G.726

海思Hi3536Description of the Installation and Upgrade of the Hi3536 SDK

海思Hi3536Description of the Installation and Upgrade of the Hi3536 SDK
2) Install the glibc cross compiler as follows:
Go to the Hi3536_SDK_Vx.x.x.x/osdrv/opensource/toolchain/arm-hisiv400-linux directory, run chmod +x cross.v400.install, and then run ./cross.v400.install.
│ ├ Makefile.param #makefile parameter file
│ ├ sample #Source code of the samples
│ └ tools #Tools related to media processing
├ drv #Source code of other chip drivers
├ mpp_master #Directory of the master ARM in dual-CPU version of the media processing platform (MPP)
3. Unpacking the SDK
Go to the Hi3536_SDK_Vx.x.x.x directory, run ./sdk.unpack (as the root or sudo user) to unpack the compressed contents of the SDK by following instructions.
│ ├ component #Component source code
│ ├ extdrv #Source code of the drivers for board-level peripherals

Hi3536 Linux开发环境用户指南

Hi3536 Linux开发环境用户指南
1.3.1 安装 Linux 服务器 ................................................................................................................................ 3 1.3.2 安装交叉编译工具................................................................................................................................ 3 1.3.3 安装 Hi3536 SDK.................................................................................................................................. 3
深圳市海思半导体有限公司
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1 开发环境..........................................................................................................................................1
1.1 嵌入式开发环境............................................................................................................................................. 1 1.2 Hi3536 Linux 开发环境 .................................................................................................................................. 1 1.3 搭建 Linux 开发环境 ..................................................................................................................................... 3

ASUS B560 Chipset主板用户手册说明书

ASUS B560 Chipset主板用户手册说明书

Note: The specifications are subject to change without notice.Intel® Socket LGA1200 for 11th Gen Intel® Core™ processors & 10th Gen Intel® Core™, Pentium® Gold and Celeron® ProcessorsSupports Intel® 14nm CPUSupports Intel® Turbo Boost Technology 2.0 and Intel® Turbo Boost Max Technology 3.0*** Refer to for CPU support list.** Intel® Turbo Boost Max Technology 3.0 support depends on the CPU types.Chipset Intel® B560 Chipset4 x DIMM, Max. 128GB, DDR4 4600(OC)/4400(OC)/4266(OC)/4000(OC)//3733(OC)/3600(OC)/3466(OC)/3333(OC)/3200(OC)/2933/2800/2666/2400/2133 MHz Non-ECC, Un-buffered Memory*Dual Channel Memory ArchitectureSupports Intel® Extreme Memory Profile (XMP)OptiMem* 10th Gen Intel® Core™ i7/i9 processors support 2933/2800/2666/2400/2133 natively, others will run at the maximum transfer rate of DDR4 2666MHz.* 11th Gen Intel® processors support 2933/2800/2666/2400/2133 natively.* Refer to for the Memory QVL (Qualified Vendors Lists), and memory frequency support depends on the CPU types.2 x DisplayPort 1.4**1 x HDMI TM 1.4 / 2.0*** * Graphics specifications may vary between CPU types.** Intel® 11th & 10th **********************************************************************************foranyupdates.*** Only Intel® 11th GenprocessorssupportHDMI™2.0withmax.resolutionof4K@60Hz,otherswillonlysupportHDMI™*************************************refer to for any updates.Intel®11th &10th Gen Processors1 x PCIe 4.0/3.0 x16 slot (support x16 mode)- Intel® 11th processors support PCIe 4.0 x16 mode- Intel® 10th processors support PCIe 3.0 x16Intel® B560 Chipset2 x PCIe 3.0 x1 slotsTotal supports 2 x M.2 slots and 6 x SATA 6Gb/s portsIntel® 11th Gen ProcessorsM.2_1 slot (Key M), type 2242/2260/2280- Only Intel® 11th Gen processors support PCIe 4.0 x4 mode, this slot will be disabled for other CPUsIntel® B560 ChipsetM.2_2 slot (Key M), type 2242/2260/2280 (supports PCIe 3.0 x4 & SATA modes)*6 x SATA 6Gb/s ports* When a device in SATA mode is installed on the M.2_2 socket, SATA6G_2 port cannot be used.1 x Intel® I219-V 1Gb Ethernet ASUS LANGuard Wireless & Bluetooth M.2 slot only (Key E) (Support CNVi & PCIe interface)**Wi-Fi module is sold separately.Rear USB (Total 6 ports)4 x USB 3.2 Gen 1 ports (4 x Type-A)2 x USB 2.0 ports (2 x Type-A)Front USB (Total 5 ports)1 x USB 3.2 Gen 1 header supports additional 2 USB 3.2 Gen 1 ports1 x USB 2.0 header supports additional2 USB 2.0 ports1 x USB 2.0 header supports additional 1 USB 2.0 portRealtek ALC897 7.1 Surround Sound High Definition Audio CODEC*- Supports: Jack-detection, Multi-streaming, Front Panel Jack-retasking- Supports up to 24-Bit/192 kHz playback*A chassis with an HD audio module in the front panel is required to support 7.1-channel audio output.4 x USB 3.2 Gen 1 ports (4 x Type-A)2 x USB 2.0 ports (2 x Type-A)2 x DisplayPort1 x HDMI TM port 1 x M.2 slot (Key E)1 x Intel® I219V 1Gb Ethernet port3 x Audio jacks1 x PS/2 keyboard (purple) port1 x PS/2 mouse (green) portFan and cooling related1 x 4-pin CPU Fan header2 x 4-pin Chassis Fan headersPower related1 x 24-pin Main Power connector1 x 8-pin +12V Power connectorStorage related2 x M.2 slots (Key M)6 x SATA 6Gb/s portsUSB1 x USB 3.2 Gen 1 header supports additional 2 USB 3.2 Gen 1 ports1 x USB 2.0 header supports additional2 USB 2.0 ports1 x USB 2.0 header supports additional 1 USB 2.0 portMiscellaneous1 x Clear CMOS header1 x Chassis Intrude header2 x COM Port headers1 x Front Panel Audio header (AAFP)1 x COM debug header1 x LPT header1 x Mono-out header(with Amp IC)1 x SMBUS header1 x Speaker header1 x SPI TPM header (14-1pin)1 x 10-1 pin System Panel header Memory Graphics Expansion Slots Internal I/O Connectors AudioCPU USB Storage Back Panel I/O Ports EthernetASUS EZ DIY- Box HeadersBespoke Motherboard Design & Business Focused Features : - ASUS Self Recovering BIOS- ASUS Event Log- ASUS Commercial BIOS kit- Anti-Moisture- 24/7 Reliability- Overcurrent ProtectionASUS Exclusive SoftwareIT Management software supported - ASUS Control Center Express(ACCE) BIOS128Mb Flash ROM, UEFI AMI BIOS Manageability WOL by PME, PXECables2 x SATA 6Gb/s cablesMiscellaneous1 x I/O Shield1 x M.2 SSD screw package1 x M.2 Key E screw packageInstallation Media1 x Support DVDDocumentation1 x ACC Express Activation Key Card1 x User manual Operating SystemWindows® 10 64-bit mATX Form Factor9.6 inch x 9.6 inch (24.4 cm x 24.4 cm) Form Factor AccessoriesSoftware FeaturesSpecial Features。

Hi3520 U-Boot 移植应用指南

Hi3520 U-Boot 移植应用指南

本文档提及的其他所有商标或注册商标,由各自的所有人拥有。
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您购买的产品、服务或特性等应受海思公司商业合同和条款的约束,本文档中描述的全部或部分产品、服 务或特性可能不在您的购买或使用范围之内。除非合同另有约定,海思公司对本文档内容不做任何明示或 默示的声明或保证。
由于产品版本升级或其他原因,本文档内容会不定期进行更新。除非另有约定,本文档仅作为使用指导, 本文档中的所有陈述、信息和建议不构成任何明..................................................................................................................3-1
3.1 概述............................................................................................................................................................3-1 3.2 初始化程序及U-boot.................................................................................................................................3-1 3.3 通过RealView Debugger烧写U-boot ........................................................................................................3-1

Hi3536V100

Hi3536V100

Hi3536 H.265 Decoder Processor Brief Data SheetIssue 03Date 2015-04-19Copyright © HiSilicon Technologies Co., Ltd. 2014. All rights reserved.No part of this document may be reproduced or transmitted in any form or by any means without prior written consent of HiSilicon Technologies Co., Ltd.Trademarks and Permissions, , and other HiSilicon icons are trademarks of HiSilicon Technologies Co., Ltd.All other trademarks and trade names mentioned in this document are the property of their respective holders.NoticeThe purchased products, services and features are stipulated by the contract made between HiSilicon and the customer. All or part of the products, services and features described in this document may not be within the purchase scope or the usage scope. Unless otherwise specified in the contract, all statements, information, and recommendations in this document are provided "AS IS" without warranties, guarantees or representations of any kind, either express or implied.The information in this document is subject to change without notice. Every effort has been made in the preparation of this document to ensure accuracy of the contents, but all statements, information, and recommendations in this document do not constitute a warranty of any kind, express or implied.HiSilicon Technologies Co., Ltd.Address: Huawei Industrial BaseBantian, LonggangShenzhen 518129People's Republic of ChinaWebsite: Email: support@Hi3536 Key SpecificationsProcessor Corez ARM Cortex A17 quad-core@maximum 1.4 GHz −32 KB L1 I-cache, 32 KB L1 D-cache− 1 MB L2 cache−Main control processor for running peripheral driversand applicationsz ARM Cortex A7 single-core@maximum 900 MHz −32 KB L1 I-cache, 32 KB L1 D-cache−128 KB L2 cache−Video-related module controlVideo Decoding Standardsz H.265 Main Profile L5.1z H.264 Baseline/Main/High profile L5.0z MPEG4 SP L0–3/ASP L0–5z MJPEG/JPEG baselineVideo Encoding Standardsz H.264 Baseline/Main/High profile L5.1z MJPEG/JPEG baselineVideo Encoding/Decodingz H.265/H.264&JPEG encoding and decoding of multiple streams:−4-channel 4K x 2K (3840 x 2160)@30 fpsH.265/H.264 decoding+2x1080p@30 fps H.264encoding+4-channel 4K x 2K@2 fps JPEG encoding −16x1080p@30 fps H.265/H.264decoding+2x1080p@30 fps H.264encoding+16x1080p@2 fps JPEG encoding−9x1080p@30 fps H.265/H.264 decoding+4K x2K@30 fps H.264 encoding+9x1080p@2 fps JPEGencoding−32x720p@30 fps H.265/H.264 decoding+4x720p@30 fps H.264 encoding+32x720p@2 fps JPEG encoding −64xD1@30 fps H.265/H.264 decoding+8xD1@30 fpsH.264 encoding+64xD1@2 fps JPEG encoding−9x720p@30 fps JPEG decodingz CBR or VBR, ranging from 16 kbit/s to 40 Mbit/sz Encoding frame rate ranging from 1 fps to 60 fpsz ROI encodingz Color-to-gray encodingGPUz Integrated Mali-T720 GPUz OpenGL ES3.1/2.0/1.1z OpenCL 1.2/1.1/1.0z Up to 63 MTris/s triangle filling ratez Double-precision FP64 and anti-aliasingIntelligent Video Analysisz Integrated IVE 2.0, supporting various intelligent analysis applications:−Motion detection−Video diagnosis−Perimeter protection Video and Graphic Processingz3D denoising, deinterlacing, edge smoothing, dynamic contrast enhancement and sharpeningz Anti-flicker for output videos and graphicsz1/8x to 16x video scalingz1/2x to 2x graphic scalingz Four cover regionsz OSD overlaying of eight regionsVideo Interfacesz VI interfaces−One BT.1120 HD input port−One video input channel for dual-chip cascading−SDR and DDR modes−Maximum input of 1080p@60 fps in SDR mode−Maximum input of 3840 x 2160@30 fps in DDRmodez VO interfaces−One HDMI 2.0 ultra-HD output interface, supportoutput up to 3840 x 2160@60 fps−One VGA HD output interface, support output up to2560 x 1600@60 fps−One BT.1120 HD output port, supporting themaximum output of 1080p@60 fps in SDR mode or3840 x 2160@30 fps in DDR mode−Two independent HD output channels (DHD0 andDHD1), output from any HD interface (HDMI, VGA,and BT.1120)−64-picture output for DHD0, maximum 3840 x2160@60 fps output−32-picture output for DHD1, maximum 1080p@60fps output−One CVBS SD output interface−Three full-screen GUI graphics layers in RGB1555or RGB8888 format, used by two HD channels andone SD channel−Two hardware cursor layers in RGB1555, RGB4444or RGB8888 format, with the maximum resolution of256 x 256Audio Interfacesz One integrated audio CODECz Three unidirectional I2S/PCM interfaces−One input, supporting 16 multiplexed inputs−Two outputsz16-bit audio input and outputEthernet Portsz Two gigabit Ethernet ports−RGMII, RMII, and MII modes−10/100 Mbit/s full-duplex or half-duplex−1000 Mbit/s full-duplex−TOE for reducing the CPU usageSecurity Enginez AES, DES, 3DES algorithmsz HASH abstract algorithmRAID Acceleration Enginez XOR accelerationz Up to nine data sources for XORz DMA, up to 16 MB data blockz Memory initialization (configurable initial value)z Descriptor linked listPeripheral Interfacesz Two SATA 3.0 interfaces−PM−eSATAz One PCIe 2.0/SATA 3.0 interfaces−Two PCIe interfaces, one PCIe interface+one SATAinterface, or two SATA interfaces−RC and EP supported as the PCIe 2.0 interface−eSATA supported as the SATA 3.0 interfacez Two USB 2.0 host ports, supporting hubz One USB 3.0 host port, supporting hubz Two SDIO interfaces−SD 2.0, SDIO 2.0, MMC 4.4.1, and SDXC (only 3.3V mode) cards supported for SDIO0 and SDIO1−Only eMMC 4.5 card supported for SDIO1−Multiplexing between SDIO0 and BT.1120 outputpins−Multiplexing between SDIO1 and NAND flashinterface pinsz Four UART interfaces, two of which supporting four wiresz One IR interfacez One I2C interfacez Multiple GPIO interfacesz One low-speed ADC interfaceMemory Interfacesz Two 32-bit DDR3/4 SDRAM interfaces−Maximum frequency of 933 MHz (1.866 Gbit/s)−Dual channels−ODT−Maximum capacity of 3 GBz SPI NOR/NAND flash interface−1-/2-/4-bit SPI NOR/NAND flash−Two CSs−Maximum 32 MB for each CS (for only the NORflash)−Maximum 8 GB for each CS (for only the NANDflash)−2 KB/4 KB page size (for only the NAND flash)−8-bit/1 KB and 24-bit/1 KB ECC (for only theNAND flash)z NAND flash interface−8-bit NAND flash−Two CSs−SLC or MLC−8-/24-/40-/64-bit ECC based on the 1 KB data block z Embedded 64 KB BOOTROM and 88 KB SRAM RTC with an Independent Power Supplyz Independent battery for supplying power to the RTC Boot Modesz Booting from the BOOTROMz Booting from the SPI NOR flashz Booting from the SPI NAND flashz Booting from the NAND flashz Booting from the eMMCz Booting the slave chip over the PCIe interfaceSDKz Linux 3.10-based SDKz Audio encoding and decoding libraries complying with various protocolsz High-performance H.265/H.264 PC decoding library Physical Specificationsz Power consumption−Typical power consumption of 4.3 W−Multi-level power-saving controlz Operating voltages−0.9 V core voltage−1.0 V CPU voltage (or decreased to 0.9 V)−3.3 V I/O voltage−1.5/1.2 V DDR3/4 SDRAM interface voltagez Package−RoHS, EDHS-PBGA−Ball pitch of 0.8 mm (0.02 in.)−Body size of 27 mm x 27 mm (1.06 in. x 1.06 in.) z Operating temperature ranging from 0°C (32°F) to 70°C (158°F)Functional Block DiagramThe Hi3536 is a professional high-end SoC targeted for the multi-channel HD or D1 NVR. The Hi3536 provides a high-performance A 17 processor, a video decoding engine (a maximum of 16x1080p decoding complying with various protocols), a high-performance video/graphics processing engine (various complicated graphics processing algorithms), and dual-channel HD outputs. These features enable the Hi3536 to provide high-quality images. In addition, the Hi3536 integrates various peripheral interfaces to meet differentiated customer requirements for functionality, features, and image quality, while reducing the eBOM cost.NVRs (Each with a Hi3536)16x1080p NVRz32x1080p@10 Mbit/s streamsz16x1080p real-time decoding (16-channel polling previewing)z2x1080p real-time encodingz1080p@32 fps JPEG snapshotz HDMI 4K x 2K@30 fps 16-picture ultra-HD output32x720p NVRz64x720p@5 Mbit/s streamsz32x720p real-time decoding (32-channel polling previewing)z4x720p real-time encodingz 720p@64 fps JPEG snapshotzHDMI+VGA 1080p@60 fps HD dual 16-picture output 64xD1 NVRz 128x D1@2.5 Mbit/s streamsz 64xD1 real-time decoding (64-channel real-time previewing) z 8xD1 real-time encoding z D1@128 fps JPEG snapshotzHDMI 4K x 2K@30 fps 64-picture ultra-HD outputGMACVGAHDMIGMAC0IP cameraLAN/WANBT.1120DDR CtrlI 2SGE PHY port multiplierHDMI PHY...Acronyms and Abbreviationsdataencryption standard3DES triplestandardencryptionAES advancedCBR constant bit rateselectCS chipvideo broadcast signalCVBS compositerateDDR double-datastandardencryptionDES dataDMA direct memory accessECC error correcting codeEP endpointadvanced technology attachmentserialeSATA externalinput/output GPIO general-purposeGUI graphical user interfaceHD high-definitionHDMI high-definition multimedia interfaceI2C inter-integratedcircuitI2S inter-ICsoundIR infraredenginevideoIVE intelligentMII media independent interfacecellMLC multi-levelNVR network video recorderterminationODT on-diedisplayOSD on-screenPBGA plastic ball grid arraycomponent interconnect expressPCIe peripheralPM portmultiplexerRAID redundant array of independent diskscomplexRC rootRGMII reduced gigabit media independent interfaceRMII reduced media independent interfaceRoHS restriction of the use of certain hazardous substances ROI region of interestclockRTC real-timetechnology attachmentadvancedSATA serialSD standard-definitionSDR single data rateSDK software development kitSDRAM synchronous dynamic random access memorySHA secure hash algorithmcellSLC single-levelSMMU system memory management unitSoC system-on-chipSP simpleprofileinterfaceperipheralSPI serialSRAM static random access memoryoffloadengineTOE TCP/IPUART universal asynchronous receiver transmitterVBR variable bit rateVGA video graphics arrayoutputVO video。

海思-Hi3559V200-图像处理-图像亮度Normalization说明书

海思-Hi3559V200-图像处理-图像亮度Normalization说明书

Brightfield Normalization:_____________________________________________________________________________________ @echo OFFecho "Normalize pictures which have ch1 included in their name."echo "Please note, that if you choose overwrite, the changes applied cannot be undone!":startset /p FIRST= Automatically normalize (please type AUTO) or manually put in parameters (MANU)?IF %FIRST%==AUTO (goto automatically) ELSE (IF %FIRST%==MANU (goto manually1) ELSE (goto error))pause:automaticallyset /p SUP2= Overwrite the original files (please type OVER) or create duplicates with the prefix'dup_'(please type DUPL)?IF %SUP2%==OVER (goto autoverwrite) ELSE (IF %SUP2%==DUPL (goto autduplicate) ELSE (goto error))pause:manually1set /p BRIGHT= Please set the brightness of the image (A brightness value of zero means no change. The range of values is -100 to +100)IF %BRIGHT% LSS -100 (goto error) ELSE (IF %BRIGHT% GTR 100 (goto error) ELSE (goto manually2))pause:manually2set /p CONT= Please set the contrast of the image (A contrast value of zero means no change. The range of values is -100 to +100)IF %CONT% LSS -100 (goto error) ELSE (IF %CONT% GTR 100 (goto error) ELSE (goto manually3))pause:manually3set /p SUP1= Overwrite the original files (please type OVER) or create duplicates with the prefix 'dup_'(please type DUPL)?IF %SUP1%==OVER (goto manoverwrite) ELSE (IF %SUP1%==DUPL (goto manduplicate) ELSE (goto error))pause:manoverwritefor %%1 in (*ch1*.tiff) do "C:\PROGRA~1\IM\convert.exe"> -convert %%1 -brightness-contrast %BRIGHT% %CONT% %%~n1.tiffgoto end:manduplicatefor %%1 in (*ch1*.tiff) do "C:\PROGRA~1\IM\convert.exe"> -convert %%1 -brightness-contrast %BRIGHT% %CONT% dup_%%~n1.tiffgoto end:autoverwritefor %%1 in (*ch1*.tiff) do "C:\PROGRA~1\IM\convert.exe"> -convert %%1 -normalize %%~n1.tiffgoto end:autduplicatefor %%1 in (*ch1*.tiff) do "C:\PROGRA~1\IM\convert.exe"> -convert %%1 -normalize dup_%%~n1.tiff goto end:errorecho Incorrect, please check your spelling (spelling is case sensitive)goto start:endset /p YO=Processing is done, do you want to repeat the procedure (PROC) or exit (EXIT)?IF %YO%==PROC (goto start) ELSE (goto kek):kekexit_____________________________________________________________________________________Before Normalization:After Normalization:Coloring and Processing Images From Different Channels_____________________________________________________________________________________ for %%1 in (*ch2*.tiff) do "C:\PROGRA~1\IM\mogrify.exe"> -mogrify -normalize %%1 %%~n1.tifffor %%1 in (*ch2*.tiff) do "C:\PROGRA~1\IM\mogrify.exe"> -mogrify -colorspace sRGB -type truecolor %%1 %%~n1.tifffor %%1 in (*ch2*.tiff) do "C:\PROGRA~1\IM\mogrify.exe"> -mogrify -fuzz 40000 -fill rgba(0,0,242,0.3) -opaque rgb(255,255,255) %%1 %%~n1.tifffor %%1 in (*ch2*.tiff) do "C:\PROGRA~1\IM\mogrify.exe"> -mogrify -fuzz 15000 -transparentrgb(25,25,25) %%1 %%~n1.tifffor %%1 in (*ch2*.tiff) do "C:\PROGRA~1\IM\mogrify.exe"> -mogrify -channel RGBA -blur 0x2 %%1 %%~n1.tiffpause_____________________________________________________________________________________ BeforeAfterOverlaying_____________________________________________________________________________________@echo OFFset A=1set B=1set C=1set D=1set E=1set /p ROW=Number of rows:set /p COLUMN=Number of columns:set /p WELLP=Number of positions in a single well:set /p ZSTACK=Number of Z stacks:set /p TIME=Number of time points:set /a TIME=TIME+1:startIF %E% LSS %TIME% (C:\PROGRA~1\IM\composite.exe> -composite r0%A%c0%B%f0%C%p0%D%-ch2sk%E%fk1fl1.tiff r0%A%c0%B%f0%C%p0%D%-ch1sk%E%fk1fl1.tiff r0%A%c0%B%f0%C%p0%D%-maskedch2ontoch1_sk%E%fk1fl1.tiffC:\PROGRA~1\IM\composite.exe> -composite r%A%c%B%f%C%p%D%-ch2sk%E%fk1fl1.tiffr%A%c%B%f%C%p%D%-ch1sk%E%fk1fl1.tiff r%A%c%B%f%C%p%D%-maskedch2ontoch1_sk%E%fk1fl1.tiffset /a E=E+1goto start) ELSE (IF %D% LSS %ZSTACK% (set /a D=D+1set E=1goto start) ELSE (IF %C% LSS %WELLP% (set /a C=C+1set D=1set E=1goto start) ELSE (IF %B% LSS %COLUMN% (set /a B=B+1set C=1set D=1set E=1goto start) ELSE (IF %A% LSS %ROW% (set /a A=A+1set B=1set C=1set D=1set E=1goto start) ELSE (echo DONEpause)))))pause_____________________________________________________________________________________Tiling_____________________________________________________________________________________ @echo OFFset A=1set B=1set C=1set D=1set /p ROW=Number of rows:set /p COLUMN=Number of columns:set /p ZSTACK=Number of Z stacks:set /p TIME=Number of time points:set /a TIME=TIME+1:startIF %D% LSS %TIME% (C:\PROGRA~1\IM\montage.exe> r0%A%c0%B%f02p0%C%-maskedch2ontoch1_sk%D%fk1fl1.tiff r0%A%c0%B%f03p0%C%-maskedch2ontoch1_sk%D%fk1fl1.tiff r0%A%c0%B%f04p0%C%-maskedch2ontoch1_sk%D%fk1fl1.tiff r0%A%c0%B%f06p0%C%-maskedch2ontoch1_sk%D%fk1fl1.tiffr0%A%c0%B%f01p0%C%-maskedch2ontoch1_sk%D%fk1fl1.tiff r0%A%c0%B%f05p0%C%-maskedch2ontoch1_sk%D%fk1fl1.tiff r0%A%c0%B%f07p0%C%-maskedch2ontoch1_sk%D%fk1fl1.tiffr0%A%c0%B%f08p0%C%-maskedch2ontoch1_sk%D%fk1fl1.tiff r0%A%c0%B%f09p0%C%-maskedch2ontoch1_sk%D%fk1fl1.tiff -tile 3x3 -geometry 1360x1024+0+0r0%A%c0%B%p0%C%sk%D%tile.tiffC:\PROGRA~1\IM\montage.exe> r%A%c%B%f02p%C%-maskedch2ontoch1_sk%D%fk1fl1.tiff r%A%c%B%f03p%C%-maskedch2ontoch1_sk%D%fk1fl1.tiff r%A%c%B%f04p%C%-maskedch2ontoch1_sk%D%fk1fl1.tiff r%A%c%B%f06p%C%-maskedch2ontoch1_sk%D%fk1fl1.tiffr%A%c%B%f01p%C%-maskedch2ontoch1_sk%D%fk1fl1.tiff r%A%c%B%f05p%C%-maskedch2ontoch1_sk%D%fk1fl1.tiff r%A%c%B%f07p%C%-maskedch2ontoch1_sk%D%fk1fl1.tiffr%A%c%B%f08p%C%-maskedch2ontoch1_sk%D%fk1fl1.tiff r%A%c%B%f09p%C%-maskedch2ontoch1_sk%D%fk1fl1.tiff -tile 3x3 -geometry 1360x1024+0+0r%A%c%B%p%C%sk%D%tile.tiffset /a D=D+1goto start) ELSE (IF %C% LSS %ZSTACK% (set /a C=C+1set D=1goto start) ELSE (IF %B% LSS %COLUMN% (set /a B=B+1set C=1set D=1goto start) ELSE (IF %B% LSS %ROW% (set /a A=A+1set B=1set C=1set D=1goto start) ELSE (echo DONEpause)))))pause_____________________________________________________________________________________ Tiled Image。

常见交换机初始化命令_F

常见交换机初始化命令_F

交换机初始化命令1:迈普交换机清除配置命令(原始用户名/密码:admin/admin) NXA-WLAN-XAMSXY#dir?dir Displays a list of files and subdirectories in a directorySNXA-WLAN-XAMSXY#dirboot.rom 492,912 --SHnos.img 4,978,852 ----boot.conf 255 ----startup.cfg 4,537 ----Used 5,476,556 bytes in 4 files, Free 1,800,192 bytes.SNXA-WLAN-XAMSXY#delete ?WORD Specifies a fileSNXA-WLAN-XAMSXY#delete startup.cfg (删除配置文件)Delete file, Are you sure? (Y/N)?[N]yDelete file ok.SNXA-WLAN-XAMSXY#reloadProcess with reboot? [Y/N] y如图所示2:中兴交换机恢复出厂设置(原始用户名/密码/超级密码:admin/zhongxing/zhongxing)zte(cfg)#config tffs (tffs enter file system config mode进入文件系统配置模式)zte(cfg-tffs)#lskernel.z 1,207,388 bytes snmpboots.v3 36 bytes startcfg.txt 2,999 bytes735,232 bytes freezte(cfg-tffs)#remzte(cfg-tffs)#remove running.cfg (清楚配置文件)Sure to remove ? [Yes|No]:yzte(cfg-tffs)#exitzte(cfg)#reboot如图所示注: config tffs 进入文件配置模式ls查看文件里面应该有running.cfg和config.txt这2了注意:新交换机可能配置的cfg文件在文件夹中,则需要通过cd xxxx(xxxx为通过ls查看到的对应文件夹名称),进入文件夹再删除文件。

海思Android安全方案 使用指南

海思Android安全方案 使用指南
2.2.1 升级包制作准备...............................................................................................................................2-14 2.2.2 签名升级包 ......................................................................................................................................2-15
增加 emmc 支持,修改 init.rc 文件和 system_sign 分区改 名为 systemsign
修改适配 HiSTBAndroidV500R001C00SPC050 版本支持功 能说明
增加对 Hi3716MV300 支持说明
增加 APK 管控方案
第一次临时发布
iv
海思专有和保密信息 版权所有 © 深圳市海思半导体有限公司
海思Android安全方案 使用指南
文档版本 发布日期
02 2014-03-12
版权所有 © 深圳市海思半导体有限公司 2014。保留一切权利。
非经本公司书面许可,任何单位和个人不得擅自摘抄、复制本文档内容的部分或全部,并不得以任 何形式传播。
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、海思和其他海思商标均为深圳市海思半导体有限公司的商标。
1.1 概述..............................................................................................................................................................1-1 1.2 高安方案软件设计......................................................................................................................................1-1

海思Hi3556V200通过FTP与PC互传文件[更直观]

海思Hi3556V200通过FTP与PC互传文件[更直观]
5.这个时候后视镜和pc都有自己的ip,打开网络连接列表,选中设备和主机的两个连接,右键选择“添加到桥”,使其建立连接,这时在各自的环境ping对方,是通的。(设备有时候显示不出来,请重启电脑后,再重置板子这边的FTP软件,我们找到了一个叫stupid-ftpd的东西,我们把它下下来,源码包为stupid-ftpd-1.5beta.tar.gz
【1】把Makefile里面的CC=gcc改成CC=arm-himix100-linux-gcc
【2】把stupid-ftpd.conf 里面的port=2121改成 port=21
然后make一下,把两个文件 拷贝到板子的根目录下面:
stupid-ftpd.Linux6和stupid-ftpd.conf
ifconfig usb0 192.168.1.250 netmask 255.255.255.0
route add default gw 192.168.1.1
ifconfig -a
ifconfig lo up
这时候ifconfig查看后视镜的ip如下:
4.在windows命令提示行下,ipconfig,找到本地网卡的ip地址如下:
这个命令会启动usb转网口的功能,这时用usb线连接pc,pc端则需要加载
Hi3559V200_MobileCam_V1.0.13/SoftWare/pc/usb_tools/linux.inf
这个驱动文件
2.驱动成功加载,在设备管理器->网络适配器中,会出现如图所示图标
3.这时要人工给这个网口分配ip地址,且跟你的电脑是要在同一个ip段范围内
这一次我们要讲一个比tftp更好用的功能,FTP,配上windows端的FlashFXP可视化界面,传输起文件来,那是更加直观明了!

海思3536中flash的规格型号

海思3536中flash的规格型号

海思3536中flash的规格型号
海思3536中的Flash是一种高性能存储设备,具有多种规格型号可供选择。

Flash是一种非易失性存储介质,能够长时间保存数据,并且具有较快的读写速度。

海思3536中的Flash具有不同的容量选项,包括4GB、8GB、16GB 和32GB等。

这些容量选项可以满足不同用户对存储需求的要求。

无论是存储大量照片、视频还是各种文件,海思3536中的Flash都能够提供足够的空间。

海思3536中的Flash还具有良好的数据传输速度。

它采用高速接口,可以实现快速的读写操作,提高用户的工作效率。

无论是传输大型文件还是进行快速备份,海思3536中的Flash都能够满足用户的需求。

海思3536中的Flash还具有可靠的数据保护功能。

它采用了先进的错误检测和纠正技术,可以有效地防止数据丢失和损坏。

即使在突发的断电情况下,海思3536中的Flash也能够保证数据的完整性和可靠性。

海思3536中的Flash是一种高性能的存储设备,具有多种规格型号可供选择。

它不仅具有大容量和快速的读写速度,还具有可靠的数据保护功能。

对于用户来说,选择海思3536中的Flash可以有效地满足各种存储需求,并提高工作效率。

无论是照片、视频还是文件,
海思3536中的Flash都是一个可靠的选择。

Hi3516C V100R001C01SPC040版本描述文件

Hi3516C V100R001C01SPC040版本描述文件

Hi3516C V100R001C01SPC040 VersionDescription DocumentHi3516C V100R001C01SPC040 版本描述文件Prepared by 拟制许吉林曾文Date日期2012-1-18Reviewed by 审核Date 日期Approved by 批准Date日期Huawei Technologies Co., Ltd.华为技术有限公司All rights reserved版权所有侵权必究(PCM04T02 V1.0/ IPD-SE)Hi3516C V100R001C01SPC040 VersionDescription DocumentHi3516C V100R001C01SPC040 版本描述文件Abstract 摘要:Hi3516C V100R001C01SPC040版本为Hi3516C IPCamera的uClibc正式版本,主要解决了上一版本的部分问题,如OV9712强日光下过曝、图像模糊场景码率过冲等问题,同时增加了部分功能,如新增对IMX122 sensor的支持等。

该版本描述文件同样适用于Hi3518A和Hi3518C。

List of abbreviations 缩略语清单:1Version Information 版本信息2Restriction to Version Use 版本使用限制说明3Improvement on All Defects in the Previous Version 对前一版本所有不足之处的改进主要解决了前一个版本中发现的问题,以及部分前期版本的遗留问题。

4 All functional Features Added to the Previous Version 对前一版本所有增加的功能特性5Standing Problems of the Version and Measures for Avoiding Them 版本的遗留问题及规避措施6Update History of Manuals 资料的修订记录无7Description/List of Functional Features of the Version 版本的功能特性说明/列表无8Description of Installation and Upgrade 安装和升级使用说明请详细阅读software/board/documents目录下《Hi3518 SDK 安装以及升级使用说明》。

Get清风Hi3516CV100R001C01SPC040本描述文件

Get清风Hi3516CV100R001C01SPC040本描述文件

Hi3516C-V100R001C01SPC040版本描述文件Hi3516C V100R001C01SPC040 VersionDescription DocumentHi3516C V100R001C01SPC040 版本描述文件Prepared by 拟制许吉林曾文Date日期2021-1-18Reviewed by审核Date 日期Approved by Date 日期批准Huawei Technologies Co., Ltd.华为技术All rights reserved版权所有侵权必究〔/ IPD-SE〕Hi3516C V100R001C01SPC040 VersionDescription DocumentHi3516C V100R001C01SPC040 版本描述文件Abstract 摘要:Hi3516C V100R001C01SPC040版本为Hi3516C IPCamera的uClibc正式版本,主要解决了上一版本的局部问题,如OV9712强日光下过曝、图像模糊场景码率过冲等问题,同时增加了局部功能,如新增对IMX122 sensor的支持等。

该版本描述文件同样适用于Hi3518A和Hi3518C。

List of abbreviations 缩略语清单:Abbreviations缩略语Full spelling 英文全名Chineseexplanation 中文解释缩略语文全名explanation 中文解释SDK Software软件开发工具包Developer’s KitMPP Media媒体处理平台ProcessingPlatformIPC Internet网络摄像机ProtocolCameraISP Image Signal图像信号处理PipelineLDC Lens Distortion镜头畸变校正CorrectionAI Auto Iris自动光圈控制ControlVI Video Input 视频输入VO Video Output 视频输出VPSS Video Process视频前处理单元Sub-SystemVEDU Video Encode视频编码单元UnitVDA Video Detect视频侦测分析AnalyseIVE Intelligent智能加速引擎VideoEngineeringPTS Presentation 时间戳缩略语文全名explanation 中文解释Time StampDDRC Double-DataDDR 控制器Rate ControllerMMZ Media Memory媒体内存区域ZoneROI Region Of感兴趣区域InterestWDR Wide Dynamic宽动态范围Range1Version Information 版本信息Version name 版本名称Versionnumber版本号Preparedate编译日期Product所属产品Hi3516C V100R001C01SPC0402021-1-28 BVT 2Restriction to Version Use 版本使用限制说明Time restriction 时间限制V100R001C01SPC050版本前Area/site restriction地域/局点限制无Other restriction其他限制条件无Conditionof versiontermination版本终止条件V100R001C01SPC050版本发布3Improvement on All Defects in the Previous Version 对前一版本所有缺乏之处的改进主要解决了前一个版本中发现的问题,以及局部前期版本的遗留问题。

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Graphics DevelopmentUser GuideIssue 00B02Date 2015-03-02D r af t ,on l yf or re fe r e n c e !Copyright © HiSilicon Technologies Co., Ltd. 2014-2015. All rights reserved.No part of this document may be reproduced or transmitted in any form or by any means without prior written consent of HiSilicon Technologies Co., Ltd.Trademarks and Permissions,, and other HiSilicon icons are trademarks of HiSilicon Technologies Co., Ltd.All other trademarks and trade names mentioned in this document are the property of their respective holders.NoticeThe purchased products, services and features are stipulated by the contract made between HiSilicon and the customer. All or part of the products, services and features described in this document may not be within the purchase scope or the usage scope. Unless otherwise specified in the contract, all statements, information, and recommendations in this document are provided "AS IS" without warranties, guarantees or representations of any kind, either express or implied.The information in this document is subject to change without notice. Every effort has been made in the preparation of this document to ensure accuracy of the contents, but all statements, information, and recommendations in this document do not constitute a warranty of any kind, express or implied.HiSilicon Technologies Co., Ltd.Address: Huawei Industrial Base Bantian, Longgang Shenzhen 518129People's Republic of China Website: Email:support@D r af t ,on l yf or re fe r e n c e !About This DocumentPurposeThis document provides one schemes for graphics development. The schemes include scheme description, derivative scheme, development process, application scenarios, and advantages and limitations.Related VersionsThe following table lists the product versions related to this document.Product NameVersionHi3536 V100Hi3521A V100Intended AudienceThis document is intended for:zTechnical support personnel zSoftware development engineersSymbol ConventionsThe symbols that may be found in this document are defined as follows. SymbolDescriptionAlerts you to a high risk hazard that could, if not avoided, result in serious injury or death.Alerts you to a medium or low risk hazard that could, if not avoided, result in moderate or minor injury.D r af t ,on l yf or re fe r e n c e !Symbol DescriptionAlerts you to a potentially hazardous situation that could, if not avoided, result in equipment damage, data loss, performance deterioration, or unanticipated results.Provides a tip that may help you solve a problem or save time.Provides additional information to emphasize or supplement important points in the main text.Change HistoryUpdates between document issues are cumulative. Therefore, the latest document issue contains all updates made in previous issues.Issue 00B02 (2015-03-02)This issue is the second draft release.The contents related to the Hi3521A are added.Issue 00B01 (2015-01-14)This issue is the first draft release.D r af t ,on l yf or re fe r e n c e !User GuideContentsContentsAbout This Document ...................................................................................................................... i 1 Introduction to Graphics Layers (1)1.1 Overview .......................................................................................................................................................... 1 1.2 Architecture of Graphics Layers .. (1)1.2.1 Architecture of Graphics Layers for Hi3536 ........................................................................................... 1 1.2.2 Architecture of Graphics Layers for Hi3521A . (2)2 Recommended Schemes for Graphics Development (4)2.1 Overview .......................................................................................................................................................... 4 2.2 GUI Scheme with a Single Graphics Layer .. (4)2.2.1 Introduction ............................................................................................................................................. 4 2.2.2 Derivative Scheme .................................................................................................................................. 6 2.2.3 Development Process (7)2.2.4 Application Scenarios ............................................................................................................................. 7 2.2.5 Advantages and Limitations .. (7)D r af t ,on l yf or re fe r e n c e !User GuideFiguresFiguresFigure 2-1 Schematic diagram of the scheme with a graphics layer ..................................................................... 5 Figure 2-2 Schematic diagram of the derivative scheme (6)D r af t ,on l yf or re fe r e n c e !User GuideTablesTablesTable 1-1 Relationships among the FB device files of the Hi3536, graphics layers, and output devices .............. 1 Table 1-2 Relationships among the FB device files of the Hi3521A, graphics layers, and output devices .. (2)D r af t ,on l yf or re fe r e n c e !1Introduction to Graphics Layers1.1 OverviewThe HiSilicon digital media processing platform (HiMPP) provides a set of mechanisms for developing graphical user interfaces (GUIs). The mechanisms consist of:z Two-dimensional engine (TDE). It processes graphics through hardware acceleration. zHiSilicon frame buffer (HiFB). It manages graphics layers. Besides the basic functions of the Linux FB, it also provides the extended functions such as inter-layer colorkey andinter-layer alpha.z For details on how to use the TDE, see the TDE API Reference .zFor details on how to use the HiFB, see the HiFB Development Guide and HiFB API Reference .1.2 Architecture of Graphics Layers1.2.1 Architecture of Graphics Layers for Hi3536The Hi3536 supports two HD display devices (DHD0 and DHD1), one SD display device (DSD0), and five graphics layers (G0−G4). G3 and G4 are cursor layers.For details about the interfaces and timings supported by each output device, see section 11.2 "VDP" in the Hi3536 H.265 CODEC Processor Data Sheet .Table 1-1shows the relationships among the FB device files of the Hi3536, graphics layers, and output devices.Table 1-1 Relationships among the FB device files of the Hi3536, graphics layers, and output devices FB Device File Graphics Layer Corresponding Display Device /dev/fb0 G0 G0 is displayed only on DHD0. /dev/fb1G1G1 is displayed only on DHD1.D r af t ,on l yf or re fe r e n c e !FB DeviceFile Graphics Layer Corresponding Display Device /dev/fb2 G2 G2 is displayed only on DSD0./dev/fb3G3G3 is a cursor layer and is always displayed on the top. For example, if the video layer of DHD0, G0, and G3 are overlaid, the overlay sequence from bottom to top is as follows: video layer < G0 < G3. G3 can act as the hardware cursor layer or software cursor layer, which is determined by the driver loading parameter softcursor . When G3 is used as the hardware cursor layer, its usage is the same as that of other graphic layers. When G3 is used as the software cursor layer, it is operated by calling dedicated software cursor interface of the HiFB /dev/fb4G4G4 is a cursor layer. It has the same features as G3.To display graphics layers, you must configure and enable VO devices by calling the interfaces of the VOU, and operate graphics layers by calling the interfaces of the Hi3536 HiFB.1.2.2 Architecture of Graphics Layers for Hi3521AThe Hi3521A supports two HD display devices (DHD0 and DHD1), one SD display device (DSD0), and three graphics layers (G0−G2). G2 is cursor layers.For details about the interfaces and timings supported by each output device, see section 11.2 "VDP" in the Hi3521A H.264 CODEC Processor Data SheetTable 1-2shows the relationships among the FB device files of the Hi3521A, graphics layers, and output devices.Table 1-2 Relationships among the FB device files of the Hi3521A, graphics layers, and output devicesFB Device File Graphics LayerCorresponding Display Device /dev/fb0G0 G0 is displayed only on DHD0. /dev/fb1G1G1 is displayed only on DSD0.D r af t ,on l yf or re fe r e n c e !FB Device File Graphics Layer Corresponding Display Device/dev/fb2G2G2 is a cursor layer and is always displayed on the top. For example, if the video layer of DHD0, G0, and G2 are overlaid, the overlay sequence from bottom to top is as follows: video layer < G0 < G2. G2 can act as the hardware cursor layer or software cursor layer, which is determined by the driver loading parameter softcursor . When G2 is used as the hardware cursor layer, its usage is the same as that of other graphic layers. When G2 is used as the software cursor layer, it is operated by calling dedicated software cursor interface of the HiFBD r af t ,on l yf or re fe r e n c e !2Recommended Schemes for GraphicsDevelopment2.1 OverviewIn the surveillance field, the GUI contents of an output device include:z Backend OSD: It includes the dividing lines of the displayed picture, channel IDs, and time that specify the display layout of multiple pictures.z GUI: It includes various menus and progress bars. You can configure devices through the GUI.zCursor: It provides user-friendly and convenient menus.The preceding GUI contents can be implemented through one or more graphics layers. As the Hi3531, Hi3532 or Hi3521 provides multiple graphics layers, this chapter describes the following recommended schemes to instruct you to use those graphics layers in a correct, reasonable, and effective manner, satisfying the requirements in various output GUI applications.2.2 GUI Scheme with a Single Graphics Layer2.2.1 IntroductionIn this scheme, each device displays the backend OSD, GUI, and cursor through one graphics layer. The cursor can also be displayed at a cursor layer.To be specific, each output device displays its backend OSD and GUI through one graphics layer. The GUI is drawn in an independent buffer, the backend OSD is drawn in the display buffer, and then alpha blending is performed by using the TDE. The cursor is displayed on a cursor layer or the shared graphics layers of the backend OSD and GUI. When the shared graphics layer is used, the cursor can be drawn in the GUI buffer. The following mechanisms are used in this scheme:zThe backend OSD of each device is drawn in its display buffer.For example, the dividing lines, channel ID, or time is drawn in the FB corresponding to each graphics layer.zEach device has a GUI canvas that is updated partially when the GUI changes.D r af t ,on l yf or re fe r e n c e !That is, each device draws the GUI by using an independent buffer (also known as GUI canvas). This canvas needs to be updated partially when the GUI changes.zThe GUI canvas is entirely transferred to the display buffer of the corresponding graphics layer.When a drawn canvas is entirely transferred to the corresponding display buffer,transparent blending between the GUI and OSD can be implemented through the TDE. Each time the GUI or OSD changes, the blended area between the GUI and OSD does not need to be calculated based on the local information, because blending is performed on the entire canvas and OSD.zDual display buffersTo avoid the drawing process being visible when a display buffer is used for drawing and displaying concurrently, dual display buffers, HIFB_LAYER_BUF_DOUBLE orHIFB_LAYER_BUF_DOUBLE_IMMEDIATE in the extended mode is recommended. That is, the HiFB module assigns dual display buffers with the same size for drawing and displaying alternatively. For example, when buffer 2 is displayed on the VOU, buffer 1 is used for drawing. For the FB standard mode, after PAN_DISPLAY andFBIOFLIP_SURFACE of the HiFB are called, the VO device is notified that buffer 1 should be displayed. For the FB extended mode, after FBIO_REFRESH of the HiFB is called, the VO device is notified that buffer 1 should be displayed.Figure 2-1 shows the schematic diagram of the scheme with a graphics layer Figure 2-1Schematic diagram of the scheme with a graphics layerD f t ,on l yf re fe r e n c e !When the backend OSD or GUI changes, the OSD or GUI needs to be drawn again in the display buffer.zWhen the backend OSD changes (such as the 16-picture dividing line is switched to the 9-picture dividing line), you need to empty the display buffer, draw a new OSD, and then transfer the entire GUI to the display buffer.zWhen the GUI changes, you also need to empty the display buffer, draw a new OSD, and then entirely transfer the new GUI to the display buffer.2.2.2 Derivative SchemeWhen DSD0 and DHD0 display the same GUI, the preceding scheme can be simplified as a derivative scheme that requires only a GUI canvas buffer.zThe canvas size (800x600) is the same as that of DHD0 GUI. You can prepare a set of pictures based on the specifications (800x600) of DHD0 GUI. Each time the GUIchanges, you need to draw the canvas partially. DSD0 GUI is obtained after scaling and anti-flicker operations are performed on the entire canvas. The DSD GUI is not as clear as the DHD GUI.zFor the HD device, each time after the canvas is updated, only the entire transferoperation by using the TDE is required, because the canvas size is the same as the GUI size. For DSD0, each time after the canvas is updated, the entire canvas needs to be scaled by using the TDE based on the size of display buffer for the graphics layer bound to DSD0, because DSD0 is an interlaced device. In addition, anti-flicker is performed.Figure 2-2 shows the schematic diagram of the derivative scheme.Figure 2-2Schematic diagram of the derivative schemeD r f t ,of or re fe r e n c e !2.2.3 Development ProcessDevelopment Process of the Scheme with a Graphics LayerThis section takes the GUIs and OSDs of DHD0 and DSD0 as examples. The dividing lines can divide the entire screen into 16 even pictures for DHD0 or four even pictures for DSD0. In addition, DHD0 and DSD0 display the same GUI concurrently. If the GUI changes, the scheme is implemented as follows:Step 1 Clear the free buffers for the graphics layers corresponding to DHD0 and DSD0.This example assumes that the free buffer is buffer 1 and the VO device displays the contents in buffer 2.Step 2 Draw 16-picture dividing lines in buffer 1 for the graphics layer corresponding to DHD0. Step 3 Draw 4-picture dividing lines in buffer 1 for the graphics layer corresponding to DSD0. Step 4 Refresh the canvas partially.Step 5 Transfer the entire canvas to buffer 1 for the graphics layer corresponding to DHD0 by usingthe TDE.During this process, alpha transparency blending is supported for making the GUI semi-transparent.Step 6 Scale the entire canvas by using the TDE based on the size of buffer 1 for the graphics layercorresponding to DSD0.During this process, anti-flicker and alpha transparency blending are supported for making the GUI semi-transparent.Step 7 Call PAN_DISPLAY to instruct DHD0 to display the contents in buffer 1 for the graphicslayer bound to DHD0.Step 8 Call PAN_DISPLAY to instruct DSD0 to display the contents in buffer 1 for the graphicslayer bound to DSD0.----End2.2.4 Application ScenariosThis scheme applies to the following scenarios:z Each device has its backend OSD. For example, the backend OSD is 16-picture layout for DHD0, 8-picture layout for DHD1, 4-picture layout for DSD0. zTwo or more output devices display the same or different GUIs.2.2.5 Advantages and LimitationsThe advantages of the scheme with a single graphics layer are as follows:z Displaying GUIs on multiple devices at the same time.zUpdating the GUI canvas partially, which saves bus bandwidth and improves the TDE capability.D r af t ,on l yf or re fe r e n c e !zImplementing transparency blending between the GUI and OSD through an easy-to-use process. Each time the GUI or OSD changes, the blended area between the GUI and OSD does not need to be calculated based on the local information, because blending is performed on the entire canvas and OSD.zIn the derivative scheme, only a set of GUI pictures are required. In this case, the GUI requirements of the devices with different solutions are met and the space of the flash memory is saved.The limitation on the derivative scheme is as follows:zThe GUI displayed on the SD device is not as clear as that on the HD device, because the GUI displayed on the SD device is obtained after being scaled.D r af t ,on l yf or re fe r e n c e !。

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