数字与逻辑电路上课课件ch7+Flip-flops

Chapter 7:Flip-FlopsOBJECTIVESAfter completing this chapter, you should be able to:Explain the operation of a SET-RESET flip-flop.Use a crossed NAND or crossed NOR flip-flop as a debounce switch. Explain the operation of a gated SET-RESET flip-flop.Explain the operation of a transparent D flip-flop.Explain the operation of a D flip-flop used as a latch.Explain the operation of a master-slave D flip-flop.Describe typical IC flip-flops.KEY TERMSCLEAR debouncecrossed NAND gated edge-triggeredSET-RESET flip-flop flip-flopcrossed NAND SET-RESET master-slave D flip-flop flip-flop PRESETcrossed NOR SET-RESET SET-RESET flip-flop flip-flop transparent D flip-flop 7.1INTRODUCTION TO FLIP-FLOPSA flip-flop is a digital circuit that has two outputs Q and Q, which are always in the opposite states. If Q is 1 then Q is 0. and the flip-flop is said to be set, on, or preset. If Q is 0 then Q is 1, and the flip-flop issaid to be reset, off, or cleared. There are several types of flip-flops,and the control inputs vary with each type. The logic levels on the flip-flop's inputs will determine the state of the Q and Q outputs according to the truth-table for that type of flip-flop.Unlike the gates studied up to this point, the flip-flop can in some states maintain its output state (on or off) after the input signals which produced the output state change. Thus, the flip-flop can store a bit of information or one place of a larger binary number. There are many other uses for flip-flops as we will see in the next few chapters.7.2CROSSED NAND SET-RESET FLIP-FLOPS Active LOWEXAMPLE 7-1Truth table7.3CROSSED NOR SET-RESET FLIP-FLOPSflop. Note thatFigure 7-8 shows a crossed NOR SET-RESET flip-flopthe inputs are not complemented; therefore they are active HIGH.ActiveHIGHTruth table7.4COMPARISON OF THE CROSSED NAND AND THECROSSED NOR SET-RESET FLIP-FLOPSEXAMPLE 7-27.5USING A SET-RESET FLIP-FLOP AS A DEBOUNCESWITCHEXAMPLE 7-37.6THE GATED SET-RESET FLIP-FLOPCrossed NAND gated SET-RESET flip-flopWhen the clock is 1. the Q and Q outputs follow the values of theSET and RESET respectively.EXAMPLE 7-47.7 THE TRANSPARENT D FLIP-FLOPOne problem with the gated NAND SET-RESET flip-flop is that there can be a 1 on the Q and a 1 on the Q when the SET and RESET inputs are both 1. This is the unused state, which should be avoided if possible. Also, it would be much more convenient if one input could SET and RESET the flip-flop. Both of these problems can be alleviated by placing an inverter between the SET and RESET inputs as shown in figure 7-24.This type of D flip-flop is called a transparent D flip -flop because when the clock is 1, Q changes when D changes. The flip-flop appears transparent until the clock falls to 0, at which time the flip-flop becomes opaque.EXAMPLE 7-5The D flip-flop is used to store bits of binary numbers. Because it can be turned on or off by the clock, it is also used to catch or latch a binary number present on the D input for a short time and store it on the Q and Q outputs. A D flip-flop can be used as the output port of a microcomputer.7.8THE MASTER-SLAVE D FLIP-FLOPA negative edge-triggered D flip-flopA transparent Dflip -flopA gated SET -RESETflip -flopCommon D flip-flopsEXAMPLE 7-67.9THE PULSE EDGE-TRIGGERED D FLIP-FLOPz SUMMARYFlip-flops are logic circuit designed to store one bit of a binary number.The outputs of a flip-flop are called Q and Q and should always have different logic states from one another. There are several types of flip-flops which are used for different things.The crossed NAND has active LOW inputs called the SET and RESET, while the crossed NOR has active HIGH inputs called SET-RESET.These flip-flops are called SET-RESET flip-flops and contain an unused state in their truth tables. Flip-flops of this type are often used for debouncing switches and storing logic states in more complex circuits. Gated flip-flops are SET-RESET flip-flops that have a pair of gate, such as NAND or NOR gates to gate the SET and RESET inputs.This gives the gated flip-flop a new input called a clock. The clock will enable the flip-flop or inhibit it. When enabled, the flip-flop can change states, but when inhibited the Q and Q can not change states.The transparent D flip-flop is a gated flip-flop with an inverter between the SET and RESET inputs to prevent them from ever being the same logic state.This type of flip-flop is used quite often as a storage register or latch in microprocessor circuits. These types of flip-flops often have PRESET and CLEAR inputs to force the Q output to a 1 or 0 respectively.A master-slave D flip-flop is made of a transparent D flip-flop with its output tied to the inputs of a gated SET-RESET flip-flop.The D flip-flop is the master and the gated flip-flop is the slave. This makes a flip-flop that will only change states on the edge of the clock. These flip-flops can be rising or falling edge flip-flops. Figure 7-43 shows the common symbols used for flip-flop clocks. Edge-triggered flip-flops can also be made using delay circuits, which will be studied late in this text.Edge-triggered flip-flops are also used as frequency dividers and counters, as we will see in the next chapter.。