74HC74
74HC74PW中文资料
74HC74; 74HCT74
handbook, halfpage handbook, halfpage
1RD 1
VCC 14 13 12 2RD 2D 2CP 2SD 2Q
1RD 1D 1CP 1SD 1Q 1Q GND
1 2 3 4 5 6 7
MNA417
14 VCC 13 2RD 12 2D
1D 1CP 1SD 1Q
Fig.1
Pin configuration DIP14, SO14 and (T)SSOP14.
Fig.2 Pin configuration DHVQFN14.
2003 Jul 10
4
元器件交易网
Philips Semiconductors
Product specification
元器件交易网
INTEGRATED CIRCUITS
DATA SHEET
74HC74; 74HCT74 Dual D-type flip-flop with set and reset; positive-edge trigger
Product specification Supersedes data of 1998 Feb 23 2003 Jul 10
2003 Jul 10
2
元器件交易网
Philips Semiconductors
Product specification
Dual D-type flip-flop with set and reset; positive-edge trigger
FUNCTION TABLES Table 1 See note 1 INPUT SD L H L Table 2 See note 1 INPUT SD H H Note 1. H = HIGH voltage level; L = LOW voltage level; X = don’t care; ↑ = LOW-to-HIGH CP transition; Qn+1 = state after the next LOW-to-HIGH CP transition. ORDERING INFORMATION PACKAGE TYPE NUMBER 74HC74N 74HCT74N 74HC74D 74HCT74D 74HC74DB 74HCT74DB 74HC74PW 74HCT74PW 74HC74BQ 74HCT74BQ TEMPERATURE RANGE −40 to +125 °C −40 to +125 °C −40 to +125 °C −40 to +125 °C −40 to +125 °C −40 to +125 °C −40 to +125 °C −40 to +125 °C −40 to +125 °C −40 to +125 °C PINS 14 14 14 14 14 14 14 14 14 14 PACKAGE DIP14 DIP14 SO14 SO14 SSOP14 SSOP14 TSSOP14 TSSOP14 DHVQFN14 DHVQFN14 RD H H CP ↑ ↑ D L H RD H L L CP X X X D X X X
74HC74中文资料_数据手册_参数
74HC74宽工作电压范围2 V 6 VD输出可以开车10 LSTTL LoadsD低功耗,40-µA马克斯ICCD典型信息= 15 nsD±4-mA输出驱动VD低输入电 流的5点1µA Maxdescription /订购informationThe HC74设备包含两个independentD-type positive-edge-triggered拖鞋。74HC74在预置(PRE)或 清除(CLR)输入设置或重置输出的低电平，而不考虑其他输入的电平。当PRE和CLR处于非活动状态(高)时，满足setuptime要求的数据 (D)输入处的数据被传输到时钟(CLK)脉冲正向边缘的输出端。时钟触发发生在电压水平，与CLK的上升时间没有直接关系。在保持时间 间隔之后，可以在不影响输出电平的情况下更改输入端的数据。订购包图纸,标准包装数量，74HC74热数据，符号，和PCB设计指南超 过“绝对最大额定值”下列出的应力可能对设备造成永久性损坏。这些只是应力等级，设备在这些或任何其他条件下的功能运行，超 出“推荐操作条件”的指示，是不受限制的。长时间暴露在绝对最大额定条件下可能会影响设备的可靠性。如果观察输入和输出电流额 定值，可能会超过输入和输出电压额定值。封装热阻抗按JESD 5计算环保(RoHS &没有某人/ Br): TI定义“绿色”意味着“Pb-Free”,此 外,使用包装材料,不含卤素,包括溴(Br)或锑(某人)总数的0.1%以上产品的重量。(3)实验室,峰值温度。湿度敏感性级别评级根据 JEDECindustry标准分类和soldertemperature峰值。重要信息和免责声明:本页所提供的信息代表德州仪器自提供之日起的知识和信念。TI 的知识和信念基于第三方提供的信息，对于这些信息的准确性不作任何陈述或保证。74HC74目前正在努力更好地整合来自第三方的信 息。TI已采取并将继续采取合理措施，提供具有代表性和准确的信息，但可能未对来料和化学品进行破坏性测试或化学分析。TI和TI供 应商认为某些信息是专有的，因此CAS号码和其他有限的信息可能无法发布。在任何情况下，TI因该等信息而产生的责任都不应超过 TIto客户在本文件中每年销售的TI部件的采购总价
D触发器74HC74
74HC74Dual D Flip−Flop with Set and ResetHigh −Performance Silicon −Gate CMOSThe 74HC74 is identical in pinout to the LS74. The device inputs arecompatible with standard CMOS outputs; with pullup resistors, theyare compatible with LSTTL outputs.This device consists of two D flip −flops with individual Set, Reset,and Clock inputs. Information at a D −input is transferred to thecorresponding Q output on the next positive going edge of the clockinput. Both Q and Q outputs are available from each flip −flop. The Setand Reset inputs are asynchronous.Features •Output Drive Capability: 10 LSTTL Loads •Outputs Directly Interface to CMOS, NMOS, and TTL •Operating V oltage Range: 2.0 to 6.0 V •Low Input Current: 1.0 m A •High Noise Immunity Characteristic of CMOS Devices •In Compliance with the JEDEC Standard No. 7A Requirements •ESD Performance: HBM > 2000 V; Machine Model > 200 V •Chip Complexity: 128 FETs or 32 Equivalent Gates•Pb −Free Packages are Available MARKING DIAGRAMS HC74= Device CodeA = Assembly LocationL, WL = Wafer LotY = YearW, WW = Work WeekG or G = Pb −Free PackageTSSOP −14DT SUFFIX CASE 948GSOIC −14D SUFFIX CASE 751AHC 74ALYW G G 114See detailed ordering and shipping information in the packagedimensions section on page 4 of this data sheet.ORDERING INFORMATION(Note: Microdot may be in either location)RESET 1DATA 1CLOCK 1SET 1RESET 2DATA 2CLOCK 2SET 2Q1Q1Q2Q2PIN 14 = V CC PIN 7 = GND FUNCTION TABLEstates are unpredictable if Set and Reset go high simultaneously.LOGIC DIAGRAM PIN ASSIGNMENTSET 1CLOCK 1DATA 1RESET 1SET 2CLOCK 2DATA 2RESET 2V CC Q2Q2GND Q1Q1MAXIMUM RATINGSSymbolParameter Value Unit V CCDC Supply Voltage (Referenced to GND)– 0.5 to + 7.0V V inDC Input Voltage (Referenced to GND)– 0.5 to V CC + 0.5V V outDC Output Voltage (Referenced to GND)– 0.5 to V CC + 0.5V I inDC Input Current, per Pin ±20mA I outDC Output Current, per Pin ±25mA I CCDC Supply Current, V CC and GND Pins ±50mA P DPower Dissipation in Still Air,SOIC Package†TSSOP Package†500450mW T stgStorage Temperature – 65 to + 150_C T L Lead Temperature, 1 mm from Case for 10 Seconds(SOIC or TSSOP Package)260300_C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied.Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.†Derating —SOIC Package: – 7 mW/_C from 65_ to 125_CTSSOP Package: − 6.1 mW/_C from 65_ to 125_C For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High −Speed CMOS Data Book (DL129/D).RECOMMENDED OPERATING CONDITIONSSymbolParameter Min Max Unit V CCDC Supply Voltage (Referenced to GND) 2.0 6.0V V in , V outDC Input Voltage, Output Voltage (Referenced to GND)0V CC V T AOperating Temperature, All Package Types – 55+ 125_C t r , t f Input Rise and Fall TimeV CC = 2.0 V(Figures 1, 2, 3)V CC = 3.0 VV CC = 4.5 VV CC = 6.0 V 00001000600500400nsThis device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high −impedance cir-cuit. For proper operation, V in and V out should be constrained to the range GND v (V in or V out ) v V CC .Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V CC ).Unused outputs must be left open.DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)Symbol Parameter Test Conditions V CC(V)Guaranteed LimitUnit – 55 to25_C v85_C v 125_CV IH Minimum High−Level Input Voltage V out = 0.1 V or V CC – 0.1 V|I out| v 20 m A2.03.04.56.01.52.13.154.21.52.13.154.21.52.13.154.2VV IL Maximum Low−Level Input Voltage V out = 0.1 V or V CC – 0.1 V|I out| v 20 m A2.03.04.56.00.50.91.351.80.50.91.351.80.50.91.351.8VV OH Minimum High−Level Output Voltage V in = V IH or V IL|I out| v 20 m A2.04.56.01.94.45.91.94.45.91.94.45.9VV in = V IH or V IL|I out| v 2.4 mA|I out| v 4.0 mA|I out| v 5.2 mA3.04.56.02.483.985.482.343.845.342.23.75.2V OL Maximum Low−Level Output Voltage V in = V IH or V IL|I out| v 20 m A2.04.56.00.10.10.10.10.10.10.10.10.1V V in = V IHor V IL|I out| v 2.4 mA|I out| v 4.0 mA|I out| v 5.2 mA3.04.56.00.260.260.260.330.330.330.40.40.4I in Maximum Input Leakage Current V in = V CC or GND 6.0±0.1±1.0±1.0m AI CC Maximum Quiescent SupplyCurrent (per Package)V in = V CC or GNDI out = 0 m A6.0 2.02080m ANOTE:Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = t f= 6.0 ns)Symbol Parameter V CC(V)Guaranteed LimitUnit – 55 to25_C v85_C v 125_Cf max Maximum Clock Frequency (50% Duty Cycle)(Figures 1 and 4)2.03.04.56.06.01530354.81024284.08.02024MHzt PLH, t PHL Maximum Propagation Delay, Clock to Q or Q(Figures 1 and 4)2.03.04.56.01007520171259025211501203026nst PLH, t PHL Maximum Propagation Delay, Set or Reset to Q or Q(Figures 2 and 4)2.03.04.56.01058021181309526221601303227nst TLH, t THL Maximum Output Transition Time, Any Output(Figures 1 and 4)2.03.04.56.07530151395401916110552219nsC in Maximum Input Capacitance—101010pF NOTE:For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).C PD Power Dissipation Capacitance (Per Flip−Flop)*Typical @ 25°C, V CC = 5.0 VpF32*Used to determine the no−load dynamic power consumption: P D = C PD V CC2f + I CC V CC. For load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).TIMING REQUIREMENTS (Input t r = t f = 6.0 ns)SymbolParameter V CC (V)Guaranteed LimitUnit – 55 to 25_C v 85_C v 125_C t su Minimum Setup Time, Data to Clock(Figure 3) 2.03.04.56.080351614100452017120552420ns t h Minimum Hold Time, Clock to Data(Figure 3) 2.03.04.56.03.03.03.03.0 3.03.03.03.0 3.03.03.03.0ns t rec Minimum Recovery Time, Set or Reset Inactive to Clock (Figure 2) 2.03.04.56.08.08.08.08.08.08.08.08.08.08.08.08.0ns t w Minimum Pulse Width, Clock (Figure 1) 2.03.04.56.0602512107530151390401815ns t w Minimum Pulse Width, Set or Reset (Figure 2) 2.03.04.56.0602512107530151390401815ns t r , t f Maximum Input Rise and Fall Times (Figures 1, 2, 3) 2.03.04.56.0100080050040010008005004001000800500400nsORDERING INFORMATIONDevicePackage Shipping †74HC74DSOIC −1455 Units / Rail 74HC74DGSOIC −14(Pb −Free)74HC74DR2SOIC −142500 / Tape & Reel 74HC74DR2GSOIC −14(Pb −Free)74HC74DTR2TSSOP −14*74HC74DTR2G TSSOP −14*†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.*This package is inherently Pb −Free.SWITCHING WAVEFORMSSET DATARESETFigure 5. EXPANDED LOGIC DIAGRAMPACKAGE DIMENSIONSSOIC −14CASE 751A −03ISSUE HNOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 (0.006)PER SIDE.5.DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127(0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.DIM MIN MAX MIN MAX INCHES MILLIMETERS A 8.558.750.3370.344B 3.80 4.000.1500.157C 1.35 1.750.0540.068D 0.350.490.0140.019F 0.40 1.250.0160.049G 1.27 BSC 0.050 BSC J 0.190.250.0080.009K 0.100.250.0040.009M 0 7 0 7 P 5.80 6.200.2280.244R 0.250.500.0100.019____DIMENSIONS: MILLIMETERS*For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.PACKAGE DIMENSIONSTSSOP −14CASE 948G −01ISSUE B DIM MIN MAX MIN MAX INCHES MILLIMETERS A 4.90 5.100.1930.200B 4.30 4.500.1690.177C −−− 1.20−−−0.047D 0.050.150.0020.006F 0.500.750.0200.030G 0.65 BSC 0.026 BSC H 0.500.600.0200.024J 0.090.200.0040.008J10.090.160.0040.006K 0.190.300.0070.012K10.190.250.0070.010L 6.40 BSC 0.252 BSC M 0 8 0 8 NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.4.DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.5.DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08(0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.6.TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY .7.DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W −.____14X REF K14X 0.360.65PITCHSOLDERING FOOTPRINT**For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。
几种常用的集成触发器
逻 辑 符 号
1S
&
1R
Q
本页完 继续
几种常用的集成触发器
二、集成JK成触发器(74HC76)
74HC76触发器功能表 清零 输 入 输 出 维持
SD 0 1 1 1 1 1 RD 1 0 1 1 1 1 CP J 0 1 0 1 K 0 0 1 1 Q 1 0 Qn 1 0 Qn
1Q
JK触发器1 1Q 2Q JK触发器2 2Q 本页完 继续
Qn
74HC76 触发器内有两个 JK触发器，电源和地是共用 的，其它则分开单独使用。
逻 辑 符 号
几种常用的集成触发器
三、集成D成触发器(74HC74)
预置1 74HC74触发器功能表 清零
1RD 1 2 14
VCC
2RD
输
SD 0 1 1 1 1 RD 1 0 1 1 1 0
74HC76逻辑功能概括： 1. 具有预置、清零功能，预置端 加低电平，消零端加高电平时，触发 器置1，反之触发器置0。预置和清零 与 CP 无关 ，这种方式称为直接预置 HC76逻辑功能概括 和直接清零。 2.正常工作时，预置端和清零端 置高电平，CP端输入时钟脉冲。
1SD 1J 1CP 1K 1RD 2SD 2J 2CP 2K 2RD
输
Q 1 0 Qn 1 0 不
出 维持
Q
S1 S2 S3 R1 R2 R3
SD & 1CP 1S Q
置1 0 0 置
& RD SD S1 S2 S3 1CP R1 R2 R3 RD
74LS71 功能表 Q 1R
1 Qn 0 1 定
74hc74触发器
5
5.5
Vcc
74 4.75 5 5.25
输入高电平电压VIH
2
输入低电平 54
0.8
电VIL
74
0.8
输出高电平电流IOH
输出低电平 54
-400 16
电流IOL
74
16
时钟频率fCLK
0
15
脉冲宽 CP(H) 30
度tW CP(L) 37
PR(L)
30
CLR(L)
建立时 D(H) 20*
间tSU
W
54S74/74S74
110 MHz
150mW
54LS74/74LS74
33 MHz
20mW
引出端符号
1CP、2CP
1D、2D
＿
＿
1Q、2Q、1Q、2Q
CLR1、CLR2
PR1、PR2
时钟输入端 数据输入端
输出端 直接复位端（低电平有效） 直接置位端（低电平有效）
逻辑图
双列直插封装
极限值 电源电压………………………………………….7V 输入电压 54/7474、54/74H74、54/74S74…………….5.5V 54/74LS74……………………………………7V
三毛电子世界
工作环境温度 54XXX …………………………………. -55~125℃ 74XXX …………………………………. 0~70℃
存储温度 ………………………………………….-65~150℃
功能表
推荐工作条件
5474/7474 最小 额定 最大
电 源 电 压 54 4.5
13.5
40
tPLH CP－Q
tPHL
74HC系列芯片的区别(DOC)
74HC/LS/HCT/F系列芯片的区别：1、 LS是低功耗肖特基，HC是高速COMS。
LS的速度比HC略快。
HCT 输入输出与LS兼容，但是功耗低；F是高速肖特基电路；2、 LS是TTL电平，HC是COMS电平。
3、 LS输入开路为高电平，HC输入不允许开路， hc 一般都要求有上下拉电阻来确定输入端无效时的电平。
LS 却没有这个要求4、 LS输出下拉强上拉弱，HC上拉下拉相同。
5、工作电压不同，LS只能用5V，而HC一般为2V到6V；而HCT的工作电压一般为4.5V～5.5V。
6、电平不同。
LS是TTL电平，其低电平和高电平分别为0.8和V2.4，而CMOS在工作电压为5V时分别为0.3V和3.6V，所以CMOS 可以驱动TTL，但反过来是不行的7、驱动能力不同，LS一般高电平的驱动能力为5mA，低电平为20mA；而CMOS的高低电平均为5mA；8、 CMOS器件抗静电能力差，易发生栓锁问题，所以CMOS的输入脚不能直接接电源。
74系列集成电路大致可分为6大类：.74××（标准型）；.74LS××（低功耗肖特基）；.74S××（肖特基）；.74ALS××（先进低功耗肖特基）；.74AS××（先进肖特基）；.74F××（高速）。
近年来还出现了高速CMOS电路的74系列，该系列可分为3大类：.HC为COMS工作电平；.HCT为TTL工作电平，可与74LS系列互换使用；.HCU适用于无缓冲级的CMOS电路。
这9种74系列产品，只要后边的标号相同，其逻辑功能和管脚排列就相同。
根据不同的条件和要求可选择不同类型的74系列产品，比如电路的供电电压为3V就应选择74HC系列的产品系列电平典型传输延迟ns 最大驱动电流(-Ioh/Lol)mAAHC CMOS 8.5 -8/8AHCT COMS/TTL 8.5 -8/8HC COMS 25 -8/8HCT COMS/TTL 25 -8/8ACT COMS/TTL 10 -24/24F TTL 6.5 -15/64ALS TTL 10 -15/64LS TTL 18 -15/24注：同型号的74系列、74HC系列、74LS系列芯片，逻辑功能上是一样的。
几种常用的集成触发器
预置1
74HC74触发器功能表 清零
1RD 1
14
VCC
输入
SD RD CP
D
01
10
11
1
输出
1D
2
13
2RD
Q 1 0
Q 置1 0 置0 1 维持
引 三1C、P D3集成1触2 发器2D
脚 图
1SD
744HC7114
2CP
符11QQ号图56 ，引1脚90 图和22SQD 功
GND 7 能表 8
辑 符
1RD 2SD
号 2J
2CP
2K
2RD
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
JK触发器1
JK触发器2
1K 1Q 1Q GND 2K 2Q 2Q 2J
1Q
1Q
2Q
2Q 继续
几种常用的集成触发器
二、集成JK成触发器(74HC76)
74HC76触发器功能表
输入
输出
SD RD CP J K
Q 1
置1 脚 二Q、JK 集成触发器HC76
图 符号图，引脚图和功能表
置0 0
1J VCC
2CP
10
0 1 翻转
2SD 2RD
11
00
Qn Qn
11
10
10
11
01
01
11
11
Qn Qn
74HC76 触发器内有两个 JK触发器，电源和地是共用 的，其它则分开单独使用。
SN74HC74N中文资料
PACKAGING INFORMATIONOrderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)5962-8405601VCA ACTIVE CDIP J141None Call TI Level-NC-NC-NC 5962-8405601VDA ACTIVE CFP W141None Call TI Level-NC-NC-NC 84056012A ACTIVE LCCC FK201None Call TI Level-NC-NC-NC 8405601CA ACTIVE CDIP J141None Call TI Level-NC-NC-NC 8405601DA ACTIVE CFP W141None Call TI Level-NC-NC-NC JM38510/65302B2A ACTIVE LCCC FK201None Call TI Level-NC-NC-NC JM38510/65302BCA ACTIVE CDIP J141None Call TI Level-NC-NC-NC JM38510/65302BDA ACTIVE CFP W141None Call TI Level-NC-NC-NC SN54HC74J ACTIVE CDIP J141None Call TI Level-NC-NC-NC SN74HC74ADBLE OBSOLETE SSOP DB14None Call TI Call TISN74HC74D ACTIVE SOIC D1450Pb-Free(RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIMSN74HC74DBLE OBSOLETE SSOP DB14None Call TI Call TISN74HC74DBR ACTIVE SSOP DB142000Pb-Free(RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIMSN74HC74DR ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74HC74DT ACTIVE SOIC D14250Pb-Free(RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIMSN74HC74N ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NC SN74HC74N3OBSOLETE PDIP N14None Call TI Call TISN74HC74NSR ACTIVE SO NS142000Pb-Free(RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIMSN74HC74PW ACTIVE TSSOP PW1490Pb-Free(RoHS)CU NIPDAU Level-1-250C-UNLIMSN74HC74PWLE OBSOLETE TSSOP PW14None Call TI Call TISN74HC74PWR ACTIVE TSSOP PW142000Pb-Free(RoHS)CU NIPDAU Level-1-250C-UNLIMSN74HC74PWT ACTIVE TSSOP PW14250Pb-Free(RoHS)CU NIPDAU Level-1-250C-UNLIM SNJ54HC74FK ACTIVE LCCC FK201None Call TI Level-NC-NC-NC SNJ54HC74J ACTIVE CDIP J141None Call TI Level-NC-NC-NC SNJ54HC74W ACTIVE CFP W141None Call TI Level-NC-NC-NC (1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-May not be currently available-please check /productcontent for the latest availability information and additional product content details.None:Not yet available Lead(Pb-Free).Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Green(RoHS&no Sb/Br):TI defines"Green"to mean"Pb-Free"and in addition,uses package materials that do not contain halogens, including bromine(Br)or antimony(Sb)above0.1%of total product weight.(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.元器件交易网IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,enhancements, improvements, and other changes to its products and services at any time and to discontinueany product or service without notice. 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74HC74管脚排列中文资料
74HC74管脚排列
74HC74 概述
74HC74是一款高速CMOS器件，74HC74引脚兼容低功耗肖特基TTL （LSTTL）系列。
74HC74遵循JEDEC标准no.7A。
74HC74是双路D 型上升沿触发器，带独立的数据（D）输入、时钟（CP）输入、设置（SD）和复位（RD）输入、以及互补的Q和Q输出。
设置和复位为异步低电平有效，且不依赖于时钟输入。
74HC74数据输入口的信息在时钟脉冲的上升沿传输到Q口。
为了获得预想中的结果，D输入必须在时钟脉冲上升沿来临之前，保持稳定一段就绪时间。
74HC74时钟输入的施密特触发功能使得电路对于缓慢的脉冲上升和下降具备更高的容差性。
74HC74 特性
工作电压范围：2.0～6.0 V
对称输出阻抗
高抗扰
低功耗
ESD保护
HBM EIA/JESD22-A114-A超过2000 V
MM EIA/JESD22-A115-A超过200 V
74HC74 参数
74HC74 基本参数
电压 2.0～6.0V
驱动电流+/-5.2 mA
传输延迟14 ns@5V
74HC74 其他特性
逻辑电平CMOS
功耗考量低功耗或电池供电应用74HC74 封装与引脚
SO14, SSOP14, DIP14, TSSOP14。
74HC系列芯片资料
74HC系列芯⽚资料74HC00 四 2 输⼊与⾮门国际通⽤符号54/7400 ， 54/74H00 ， 54L 00 ， 54/74S00 ， 54/74LS00 ， 54/74ALS00 ， 54/ 74F 00 ， 54/74HC00 ， 54/ 74AC 00 ，54/74HCT00 ， 54/74ACT00 ， 54/74AHC00 ， 54/74AHCT00 ， 74LV00 ，74LVC00。
74HC02 四 2 输⼊或⾮门国际通⽤符号54/7402 ， 54L 02 ， 54/74S02 ， 54/74LS02 ， 54/74AS02 ， 54/74ALS02 ， 54/ 74F 02 ， 54/74HC02 ， 74AC 02 ，54/74HCT02 ， 54/74ACT02 ， 54/74AHC02 ， 54/AHCT02 ， 74LV02 ，74LVC02。
74HC04 六反相器国际通⽤符号54/7404 ， 54L 04 ， 54/74H04 ， 54/74S04 ， 54/74LS04 ， 54/74AS04 ， 54/74ALS04 ，54/ 74F 04 ， 54/74HCU04 ，54/74HC04 ， 54/ 74AC 04 ， 54/74HCT04 ， 54/74ACT04 ，54/74AHC04 ， 54/74AHCT04 ， 74LV04 ， 74LVC04 ，54/74AHCU04 ， 74LVU04 ， 74LVCU04。
74HC08 四 2 输⼊与门国际通⽤符号54/7408 ， 54/74S08 ， 54/74LS08 ， 54/74AS08 ， 54/74ALS08 ， 54/ 74F 08 ， 54/74HC08 ，54/74HCT08 ， 54/ 74AC 08 ， 54/74ACT08 ， 54/74AHC08 ， 54/74AHCT08 ， 74LV08 ， 74LVC08。
74HC74LS74HC74TF系列芯片的区别
74HC/LS/HCT/F系列芯片的区别1、LS是低功耗肖特基，HC是高速COMS。
LS的速度比HC略快。
HCT输入输出与LS兼容，但是功耗低；F是高速肖特基电路；2、LS是TTL电平，HC是COMS电平。
3、LS输入开路为高电平，HC输入不允许开路，hc 一般都要求有上下拉电阻来确定输入端无效时的电平。
LS 却没有这个要求4、LS输出下拉强上拉弱，HC上拉下拉相同。
5、工作电压不同，LS只能用5V，而HC一般为2V到6V；6、电平不同。
LS是TTL电平，其低电平和高电平分别为0.8和V2.4，而CMOS在工作电压为5V时分别为0.3V和3.6V，所以CMOS可以驱动TTL，但反过来是不行的7、驱动能力不同，LS一般高电平的驱动能力为5mA，低电平为20mA；而CMOS的高低电平均为5mA8、CMOS器件抗静电能力差，易发生栓锁问题，所以CMOS的输入脚不能直接接电源。
74系列集成电路大致可分为6大类：. 74××（标准型）；.74LS××（低功耗肖特基）；.74S××（肖特基）；.74ALS××（先进低功耗肖特基）；.74AS××（先进肖特基）；.74F××（高速）。
近年来还出现了高速CMOS电路的74系列，该系列可分为3大类：. HC为COMS工作电平；. HCT为TTL工作电平，可与74LS系列互换使用；.HCU适用于无缓冲级的CMOS电路。
这9种74系列产品，只要后边的标号相同，其逻辑功能和管脚排列就相同。
根据不同的条件和要求可选择不同类型的74系列产品，比如电路的供电电压为3V就应选择74HC系列的产品74HC的速度比4000系列快，引脚与标准74系列兼容，4000系列的好处是有的型号可工作在+15V 。
新产品最好不用LSLV - 低电压系列电平典型传输延迟ns 最大驱动电流(-Ioh/Lol)mAAHC CMOS 8.5 -8/8AHCT COMS/TTL 8.5 -8/8HC COMS 25 -8/8HCT COMS/TTL 25 -8/8ACT COMS/TTL 10 -24/24F TTL 6.5 -15/64ALS TTL 10 -15/64LS TTL 18 -15/24LVCACSLC注：同型号的74系列、74HC系列、74LS系列芯片，逻辑功能上是一样的。
4 集成触发器及其应用电路设计74HC74
3．输出端不能短路(线与)！ 4．多余输入端处理方法— 不能悬空
CMOS与非门、与门：接+5V，并联 CMOS或非门、或门：接地，并联
VCC 4B 4A 4Y 3B 3A 3Y 14 13 12 11 10 9 8
&
&
&
&
1234567 1A 1B 1Y 2A 2B 2Y GND
1. CP CH1，Q0 CH2。触发信源选谁？
必须选频率低的通道为触发信源
错误：信源=CH1
1 2 3 45 6 7 8 9
CP
1
01010101
Q0
2
正确：信源=CH2
1 2 3 45 6 7 8 9
显示情况
CP
1
01010101
Q0
2
2. 观测3个以上的波形，应该如何操作？
应依次将所有波形与频率最低的波形同屏比较！
74LS00 四 2 输入与非门
14 13 12 11 10 9 8 VDD 4B 4A 4Y 3Y 3B 3A
CC4011 四 2 输入与非门 1A 1B 1Y 2Y 2A 2B VSS 1234567
MC14011 CD4011
14 13 12 11 10 9 8 VDD 3C 3B 3A 3Y 1Y 1C
幅度灵敏度
触发电平位置
TRIGGER 与触发有关的操作
LEVEL
触发控制钮
1. LEVEL（电平） —— 改变触发电平值 正确操作：应使触发电平设在信号振幅范围内
2. MENU（菜单） —— 显示触发功能菜单
3. SET LEVEL TO 50%（设为50％） —— 将触发电平设在信号振幅范围的中点
74LS系列与74HC
74LS系列与74HC，74HCT，CD系列的区别一、概述：74LS是TTL电路的一个系列，TTL电路以双极型晶体管为开关元件所以以称双极型（电子和空穴）集成电路。
74HC是CMOS电路，CMOS电路是MOS电路中的主导产品。
MOS电路以绝缘栅场效应晶体管为开关元件。
所以又称单极型集成电路。
按其导电沟道的类型，MOS电路可分为PMOST 、NMOS和CMOS电路。
CMOS电路沿着4000A--4000B/4500B（统一称为4000B）--74HC/74vHC--74HCT系列高速发展。
HCT系列还同TTL电平兼容，扩大了应用范围。
CD代表标准的4000系列CMOS电路，我国生产的CMOS电路系列为“CC4000B”。
二、TTL逻辑芯片与与CMOS逻辑芯片的区别1.TTL工作电压范围为5V正负左右。
CMOS为3--18V左右。
2.频率特性：标准TTL电路在5MHZ以下，一般COMS在100KHZ以下。
3.速度*功耗积：（在100KHZ时，单位为PJ）标准TTL电路和为100。
标准CMOS为11。
4.最小输出的驱动电流（单位MA，输出低电平0.4V）标准输出：标准TTL系列为16。
标准COMS（4000系列为16，74系列为4）。
5.大电流输出：标准TTL为48V。
标准COMS（4000为16，74系列为6）6.扇出能力：标准TTL为系列为40（大电流输出为120）。
标准COMS（4000系列为4，74系列为10，大电流输出为4，15）。
7.最大输入电流（单位MA，输出低电平4V）：标准TTL系列为-1.6。
COMS（4000系列为正负0.001，74系列为负0.001）。
8.输入阻抗：COMS可达10M，TTL为5M。
74LSHC高电平规定为0.7倍电源电压，低电平规定为0.3倍电源电压。
LS规定高电平为2.0V，低电平为0.8V。
带负载特性不同。
2.HC上拉下拉能力相同，LS上拉弱而下拉强。
3.输入特性不同:HC输入电阻很高，输入开路时电平不定。
74、74HC、74LS系列芯片对照表
74、74HC、74LS系列芯片资料系列电平典型传输延迟ns 最大驱动电流(-Ioh/Lol)mAAHC CMOS 8.5 -8/8AHCT COMS/TTL 8.5 -8/8HC COMS 25 -8/8HCT COMS/TTL 25 -8/8ACT COMS/TTL 10 -24/24F TTL 6.5 -15/64ALS TTL 10 -15/64LS TTL 18 -15/24注：同型号的74系列、74HC系列、74LS系列芯片，逻辑功能上是一样的。
74LSxx的使用说明如果找不到的话，可参阅74xx或74HCxx的使用说明。
有些资料里包含了几种芯片，如74HC161资料里包含了74HC160、74HC161、74HC162、74HC163四种芯片的资料。
找不到某种芯片的资料时，可试着查看一下临近型号的芯片资料。
7400 QUAD 2-INPUT NAND GATES与非门7401 QUAD 2-INPUT NAND GATES OC与非门7402 QUAD 2-INPUT NOR GATES或非门7403 QUAD 2-INPUT NAND GATES与非门7404 HEX INVERTING GATES反向器7406 HEX INVERTING GATES HV高输出反向器7408 QUAD 2-INPUT AND GATE与门7409 QUAD 2-INPUT AND GATES OC与门7410 TRIPLE 3-INPUT NAND GATES与非门7411 TRIPLE 3-INPUT AND GATES与门74121 ONE-SHOT WITH CLEAR单稳态74132SCHMITT TRIGGER NAND GATES触发器与非门7414 SCHMITT TRIGGER INVERTERS触发器反向器74153 4-LINE TO 1 LINE SELECTOR四选一74155 2-LINE TO 4-LINE DECODER译码器74180 PARITY GENERATOR/CHECKER奇偶发生检验741914-BIT BINARY COUNTER UP/DOWN计数器7420DUAL 4-INPUT NAND GATES双四输入与非门7426 QUAD 2-INPUT NAND GATES与非门7427 TRIPLE 3-INPUT NOR GATES三输入或非门7430 8-INPUT NAND GATES八输入端与非门7432 QUAD 2-INPUT OR GATES二输入或门7438 2-INPUT NAND GATE BUFFER与非门缓冲器7445 BCD-DECIMAL DECODER/DRIVER BCD译码驱动器7474 D-TYPE FLIP-FLOP D型触发器7475 QUAD LATCHES双锁存器7476 J-K FLIP-FLOP J-K触发器7485 4-BIT MAGNITUDE COMPARATOR四位比较器7486 2-INPUT EXCLUSIVE OR GATES双端异或门74HC00 QUAD 2-INPUT NAND GATES双输入与非门74HC02QUAD 2-INPUT NOR GATES双输入或非门74HC03 2-INPUT OPEN-DRAIN NAND GATES与非门74HC04 HEX INVERTERS六路反向器74HC05 HEX INVERTERS OPEN DRAIN六路反向器74HC08 2-INPUT AND GATES双输入与门74HC107J-K FLIP-FLOP WITH CLEAR J-K触发器74HC109A J-K FLIP-FLOP W/PRESET J-K触发器74HC11TRIPLE 3-INPUT AND GATES三输入与门74HC112DUAL J-K FLIP-FLOP双J-K触发器74HC113DUAL J-K FLIP-FLOP PRESET双JK触发器74HC123A RETRIGGERABLE MONOSTAB可重触发单稳74HC125TRI-STATE QUAD BUFFERS四个三态门74HC126 TRI-STATE QUAD BUFFERS六三态门74HC132 2-INPUT TRIGGER NAND施密特触发与非门74HC13313-INPUT NAND GATES十三输入与非门74HC1373-TO-8 DECODERS W/LATCHES 3-8线译码器74HC1383-8 LINE DECODER3线至8线译码器74HC1392-4 LINE DECODER2线至4线译码器74HC14 TRIGGERED HEX INVERTER六触发反向器74HC147 10-4 LINE PRIORITY ENCODER 10-4编码器74HC148 8-3 LINE PRIORITY ENCODER8-3编码器74HC149 8-8 LINE PRIORITY ENCODER 8-8编码器74HC1518-CHANNEL DIGITAL MUX8通道多路器74HC153 DUAL 4-INPUT MUX双四输入多路器74HC154 4-16 LINE DECODER4线至16线译码器74HC1552-4 LINE DECODER2线至4线译码器74HC157QUAD 2-INPUT MUX四个双端多路器74HC161BINARY COUNTER二进制计数器74HC163DECADE COUNTERS十进制计数器74HC164 SERIAL-PARALLEL SHIFT REG串入并出74HC165 PARALLEL-SERIAL SHIFT REG并入串出74HC166SERIAL-PARALLEL SHIFT REG串入并出74HC173 TRI-STATE D FLIP-FLOP三态D触发器74HC174 HEX D FLIP-FLOP W/CLEAR六D触发器74HC175HEX D FLIP-FLOP W/CLEAR六D触发器74HC181ARITHMETIC LOGIC UNIT算术逻辑单元74HC182LOOK AHEAD CARRYGENERATR进位发生器74HC190BINARY UP/DN COUNTER二进制加减计数器74HC191DECADE UP/DN COUNTER十进制加减计数器74HC192DECADE UP/DN COUNTER十进制加减计数器74HC193BINARY UP/DN COUNTER 二进制加减计数器74HC1944BIT BI-DIR SHIFT4位双向移位寄存器74HC1954BIT PARALLEL SHIFT4位并行移位寄存器74HC20 QUAD 4-INPUT NAND GATE四个四入与非门74HC221A NON-RETRIG MONOSTAB不可重触发单稳74HC237 3-8 LINE DECODER 地址锁3线至8线译码器74HC242/243TRI-STAT TRANSCEIVER三态收发器74HC244OCTAL 3-STATE BUFFER八个三态缓冲门74HC245OCTAL 3-STATE TRANSCEIVER三态收发器74HC2518-CH 3-STATE MUX 8路3态多路器74HC253DUAL 4-CH 3-STATE MUX4路3态多路器74HC257QUAD 2-CH 3-STATE MUX4路3态多路器74HC2582-CH 3-STATE MUX 2路3态多路器74HC259 3-8 LINE DECODER8位地址锁存译码器74HC266A2-INPUT EXCLUSIVE NOR GATE异或非74HC27 TRIPLE 3-INPUT NOR GATE三个3输入或非门74HC273 OCTAL D FLIP-FLOP CLEAR8路D触发器74HC280 9BIT ODD/EVEN GENERATOR奇偶发生器74HC283 4BIT BINARY ADDER CARRY四位加法器74HC299 3-STATE UNIVERSAL SHIFT三态移位寄存74HC308-INPUT NAND GATE8输入端与非门74HC32QUAD 2-INPUT OR GATE四个双端或门74HC34NON-INVERTER非反向器74HC354 8-CH 3-STATE MUX 8路3态多路器74HC356 8-CH 3-STATE MUX 8路3态多路器74HC365 HEX 3-STATE BUFFER六个三态缓冲门74HC3663-STATE BUFFER INVERTER缓冲反向器74HC3673-STATE BUFFER INVERTER缓冲反向器74HC368 3-STATE BUFFER INVERTER缓冲反向器74HC373 3-STATE OCTAL D LATCHES 三态D型锁存器74HC374 3-STATE OCTAL D FLIPFLOP三态D触发器74HC3934-BIT BINARY COUNTER 4位二进制计数器74HC4016QUAD ANALOG SWITCH四路模拟量开关74HC402014-Stage Binary Counter 14输出计数器74HC4017Decade Counter/Divider with 10 Decoded Outputsvvv十进制计数器带10个译码输出端74HC4040 12 Stage Binary Counter12出计数器74HC4046 PHASE LOCK LOOP相位监测输出器74HC4049 LEVEL DOWN CONVERTER电平变低器74HC4050 LEVEL DOWN CONVERTER电平变低器74HC4051 8-CH ANALOG MUX8通道多路器74HC4052 4-CH ANALOG MUX4通道多路器74HC4053 2-CH ANALOG MUX2通道多路器74HC4060 14-STAGE BINARY COUNTER14阶BIN计数74HC4066 QUAD ANALOG MUX四通道多路器74HC4075 TRIPLE 3-INPUT OR GATE 3输入或门74HC42 BCD TO DECIMAL BCD转十进制译码器74HC423A RETRIGGERABLE MONOSTAB可重触发单稳74HC4511BCD-7 SEG DRIVER/DECODER7段译码器74HC45144-16 LINE DECODER4至16线译码器74HC4538A RETRIGGERAB MONOSTAB可重触发单稳74HC4543 LCD BCD-7 SEG LCD用的BCD-7段译码驱动74HC51AND OR GATE INVERTER与或非门74HC5218BIT MAGNITUDE COMPARATOR判决定路74HC5333-STATE D LATCH三态D锁存器74HC5343-STATE D FLIP-FLOP三态D型触发器74HC540 3-STATE BUFFER三态缓冲器74HC5413-STATE BUFFER INVERTER三态缓冲反向器74HC58DUAL AND OR GATE与或门74HC589 3STATE 8BIT SHIFT 8位移位寄存三态输出74HC5948BIT SHIFT REG8位移位寄存器74HC595 8BIT SHIFT REG8位移位寄存器出锁存74HC597 8BIT SHIFT REG8位移位寄存器入锁存74HC620 3-STATE TRANSCEIVER反向3态收发器74HC623 3-STATE TRANSCEIVER八路三态收发器74HC640 3-STATE TRANSCEIVER反向3态收发器74HC643 3-STATE TRANSCEIVER八路三态收发器74HC646 NON-INVERT BUS TRANSCEIVER总线收发器74HC648INVERT BUS TRANCIVER反向总线收发器74HC6888BIT MAGNITUDE COMPARATOR8位判决电路74HC7266 2-INPUT EXCLUSIVE NOR GATE异或非门74HC73 DUAL J-K FLIP-FLOP W/CLEAR双JK触发器74HC74A PRESET/CLEAR D FLIP-FLOP双D触发器74HC754BIT BISTABLE LATCH4位双稳锁存器74HC76PRESET/CLEAR JK FLIP-FLOP双JK触发器74HC85 4BIT MAGNITUDE COMPARATOR4位判决电路74HC86 2INPUT EXCLUSIVE OR GATE2输入异或门74HC942 BAUD MODEM300BPS低速调制解调器74HC943 300 BAUD MODEM300BPS低速调制解调器74LS00 QUAD 2-INPUT NAND GATES与非门74LS02 QUAD 2-INPUT NOR GATES或非门74LS03 QUAD 2-INPUT NAND GATES与非门74LS04 HEX INVERTING GATES反向器74LS05HEX INVERTERS OPEN DRAIN六路反向器74LS08 QUAD 2-INPUT AND GATE与门74LS09 QUAD 2-INPUT AND GATES OC与门74LS10 TRIPLE 3-INPUT NAND GATES与非门74LS109 QUAD 2-INPUT AND GATES OC与门74LS11TRIPLE 3-INPUT AND GATES与门74LS112DUAL J-K FLIP-FLOP双J-K触发器74LS113 DUAL J-K FLIP-FLOP PRESET双JK触发器74LS114NEGATIVE J-K FLIP-FLOP负沿J-K触发器74LS122Retriggerable Monostab可重触发单稳74LS123Retriggerable Monostable 可重触发单稳74LS125 TRI-STATE QUAD BUFFERS四个三态门74LS13 QUAL 4-in NAND TRIGGER 4输入与非触发器74LS160 BCD DECADE 4BIT BIN COUNTERS计数器74LS136 QUADRUPLE 2-INPUT XOR GATE异或门74LS138 3-8 LINE DECODER3线至8线译码器74LS1392-4 LINE DECODER2线至4线译码器74LS14 TRIGGERED HEX INVERTER六触发反向器74HC147 10-4 LINE PRIORITY ENCODER10-4编码器74HC148 8-3 LINE PRIORITY ENCODER 8-3编码器74HC149 8-8 LINE PRIORITY ENCODER 8-8编码器74LS1518-CHANNEL DIGITAL MUX8通道多路器74LS153DUAL 4-INPUT MUX双四输入多路器74LS1552-4 LINE DECODER 2线至4线译码器74LS1562-4 LINE DECODER/DEMUX2-4译码器74LS157QUAD 2-INPUT MUX四个双端多路器74LS1582-1 LINE MUX2-1线多路器74LS160A BINARY COUNTER二进制计数器74LS161A BINARY COUNTER二进制计数器74LS162A BINARY COUNTER二进制计数器74LS163A DECADE COUNTERS十进制计数器74LS164SERIAL-PARALLEL SHIFT REG串入并出74LS168BI-DIRECT BCD TO DECADE双向计数器74LS1694BIT UP/DN BIN COUNTER 四位加减计数器74LS173TRI-STATE D FLIP-FLOP三态D触发器74LS174HEX D FLIP-FLOP W/CLEAR六D触发器74LS175HEX D FLIP-FLOP W/CLEAR六D触发器74LS190BINARY UP/DN COUNTER 二进制加减计数器74LS191 DECADE UP/DN COUNTER 十进制加减计数器74LS192 DECADE UP/DN COUNTER 十进制加减计数器74LS193 BINARY UP/DN COUNTER二进制加减计数器74LS194A 4BIT BI-DIR SHIFT4位双向移位寄存器74LS195A 4BIT PARALLEL SHIFT4位并行移位寄存器74LS20QUAD 4-INPUT NAND GATE四个四入与非门74LS214-INPUT AND GATE四输入端与门74LS240 OCTAL 3-STATE BUFFER八个三态缓冲门74LS244 OCTAL 3-STATE BUFFER八个三态缓冲门74LS245 OCTAL 3-STATE TRANSCEIVER三态收发器74LS253 DUAL 4-CH 3-STATE MUX4路3态多路器74LS256 4BIT ADDRESS LATCH四位可锁存锁存器74LS257 QUAD 2-CH 3-STATE MUX4路3态多路器74LS258 2-CH 3-STATE MUX2路3态多路器74LS27TRIPLE 3-INPUT NOR GATES三输入或非门74LS279QUAD R-S LATCHES四个RS非锁存器74LS28 QUAD 2-INPUT NOR BUFFER 四双端或非缓冲74LS283 4BIT BINARY ADDER CARRY四位加法器74LS30 8-INPUT NAND GATES八输入端与非门74LS32 QUAD 2-INPUT OR GATES二输入或门74LS352 4-1 LINE SELECTOR/MUX4-1线选择多路器74LS365HEX 3-STATE BUFFER六个三态缓冲门74LS367 3-STATE BUFFER INVERTER缓冲反向器74LS368A 3-STATE BUFFER INVERTER缓冲反向器74LS373 OCT LATCH W/3-STATE OUT三态输出锁存器74LS76 Dual JK Flip-Flop w/set2个JK触发器74LS379QUAD PARALLEL REG四个并行寄存器74LS38 2-INPUT NAND GATE BUFFER与非门缓冲器74LS390 DUAL DECADE COUNTER2个10进制计数器74LS393 DUAL BINARY COUNTER2个2进制计数器74LS42 BCD TO DECIMAL BCD转十进制译码器74LS48 BCD-7 SEG BCD-7段译码器74LS49 BCD-7 SEG BCD-7段译码器74LS51 AND OR GATE INVERTER与或非门74LS540OCT Buffer/Line Driver8路缓冲驱动器74LS541 OCT Buffer/LineDriver8路缓冲驱动器74LS74 D-TYPE FLIP-FLOP D型触发器74LS6828BIT MAGNITUDE COMPARATOR8路比较器74LS684 8BIT MAGNITUDE COMPARATOR8路比较器74LS75QUAD LATCHES双锁存器74LS83A4BIT BINARY ADDER CARRY四位加法器74LS85 4BIT MAGNITUDE COMPARAT4位判决电路74LS862INPUT EXCLUSIVE OR GATE2输入异或门74LS90 DECADE/BINARY COUNTER十/二进制计数器74LS95B4BIT RIGHT/LEFT SHIFT 4位左右移位寄存74LS6888BIT MAGNITUDE COMPARAT8位判决电路74LS1362-INPUT XOR GATE2输入异或门74LS651BUS TRANSCEIVERS总线收发器74LS653BUS TRANSCEIVERS总线收发器74LS6703-STATE 4-BY-4 REG3态4-4寄存器74LS73A DUAL J-K FLIP-FLOP W/CLEAR 双JK触发器整理2011.01.28PA SS。
74HC系列芯片的区别
74HC/LS/HCT/F系列芯片的区别1、LS是低功耗肖特基，HC是高速COMS。
LS的速度比HC略快。
HCT输入输出与LS兼容，但是功耗低；F是高速肖特基电路；2、LS是TTL电平，HC是COMS电平。
3、LS输入开路为高电平，HC输入不允许开路，hc 一般都要求有上下拉电阻来确定输入端无效时的电平。
LS 却没有这个要求4、LS输出下拉强上拉弱，HC上拉下拉相同。
5、工作电压不同，LS只能用5V，而HC一般为2V到6V；6、电平不同。
LS是TTL电平，其低电平和高电平分别为0.8和V2.4，而CMOS在工作电压为5V时分别为0.3V和3.6V，所以CMOS可以驱动TTL，但反过来是不行的7、驱动能力不同，LS一般高电平的驱动能力为5mA，低电平为20mA；而CMOS的高低电平均为5mA；8、CMOS器件抗静电能力差，易发生栓锁问题，所以CMOS的输入脚不能直接接电源。
74系列集成电路大致可分为6大类：. 74××（标准型）；.74LS××（低功耗肖特基）；.74S××（肖特基）；.74ALS××（先进低功耗肖特基）；.74AS××（先进肖特基）；.74F××（高速）。
近年来还出现了高速CMOS电路的74系列，该系列可分为3大类：. HC为COMS工作电平；. HCT为TTL工作电平，可与74LS系列互换使用；.HCU适用于无缓冲级的CMOS电路。
这9种74系列产品，只要后边的标号相同，其逻辑功能和管脚排列就相同。
根据不同的条件和要求可选择不同类型的74系列产品，比如电路的供电电压为3V就应选择74HC系列的产品系列电平典型传输延迟ns 最大驱动电流(-Ioh/Lol)mAAHC CMOS 8.5 -8/8AHCT COMS/TTL 8.5 -8/8HC COMS 25 -8/8HCT COMS/TTL 25 -8/8ACT COMS/TTL 10 -24/24F TTL 6.5 -15/64ALS TTL 10 -15/64LS TTL 18 -15/24LVCACSLC注：同型号的74系列、74HC系列、74LS系列芯片，逻辑功能上是一样的。
74LS与74HC的区别
8，TTL电路有集电极开路OC门，MOS管也有和集电极对应的漏极开路的OD门，它的输出就叫
做开漏输出。
OC门在截止时有漏电流输出，那就是漏电流，为什么有漏电流呢？那是因为当三机管截
止的时候，它的基极电流约等于0，但是并不是真正的为0，经过三极管的集电极的电流也
输入 L： <0.3*Vcc ； H：>0.7*Vcc.
一般单片机、DSP、FPGA他们之间管教能否直接相连. 一般情况下，同电压的是可以的，不过最好是要好好查查技术手册上的VIL,VIH,VOL,VOH的值，看是否能够匹配（VOL要小于VIL，VOH要大于VIH，是指一个连接当中的）。有些在一般应用中没有问题，但是参数上就是有点不够匹配，在某些情况下可能就不够稳定，或者不同批次的器件就不能运行。
源，再开启输入信号和负载的电源；关闭时，先关闭输入信号和负载的电源，再关闭COMS
电路的电源。
6，COMS电路的使用注意事项
1）COMS电路时电压控制器件，它的输入总抗很大，对干扰信号的捕捉能力很强。所以
，不用的管脚不要悬空，要接上拉电阻或者下拉电阻，给它一个恒定的电平。
2）输入端接低内组的信号源时，要在输入端和信号源之间要串联限流电阻，使输入的
STTL——Schottky TTL
LSTTL——Low-power Schottky TTL
ASTTL——Advanced Schottky TTL
ALSTTL——Advanced Low-power Schottky TTL
FAST(F)——Fairchild Advanced schottky TTL
电流限制在1mA之内。
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一、简介 74HC74 是双通道可再触发、 再复位单触发多频振荡器， 是一个高速的 CMOS 集成电路， 适合于低功率的 TTL 电信号，符合 JEDEC 标准的第 7A 条款。 二、特点 宽电压输入范围：2.0～6.0V； 对称输出阻抗； 抗噪声性能强； 低功耗； 平稳的发送延迟； ESD 保护。 三、内部框图
四、引脚功能
引 脚 1 2 3 4 号 名
1R D
称
功
能
异步复位指令输入（低电平有效） 数据输入 时钟输入 异步设置指令输入（低电平有效） 触发输出主通道 触发输出补偿 地 触发输出补偿
6
7 8
9 10 11 12 13 14
2Q
触发输出主通道 异步设置指令输入（低电平有效） 时钟输入 数据输入 异步复位指令输入（低电平有效） 正电源电压
2SD
2CP 2D
2SD
VCC