3.弘浩明传AC培训之基础篇Ver2012

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弘浩AC及AP配置具体操作

Radius服务器配置
2009-10-07
弘浩明传科技（北京）有限公司
AC-基本配置-AS服务器配置
AS服务器配置
2009-10-07
弘浩明传科技（北京）有限公司
AC-基本配置-AP版本信息配置-新建AP版本
输入所属厂商，设备型号，硬件版本（此三项为必填），选择升级类型（值有固件，软件，配置文件），升级特征和目标文件版本，升级目标文件为可选输入。
2009-10-07
弘浩明传科技（北京）有限公司
AC-AP在线升级
2009-10-07
弘浩明传科技（北京）有限公司
AC-AP在线升级
2009-10-07
弘浩明传科技（北京）有限公司
AC及AP基本配置完成
谢谢各位！
2009-10-07
弘浩明传科技（北京）有限公司
新建WLAN配置。
2009-10-07Biblioteka 弘浩明传科技（北京）有限公司
AC-WLAN配置-新建配置说明
WLAN ID为系统生成。安全模式下拉框里有open,wep,802.11i,WAPI等选项： open表示WLAN是开放的，不需要加密； WEP表示采用WEP加密； 802．11i表示采用802.11i安全机制； WAPI表示采用WAPI安全机制。其它设置有: SSID : 无线局域网网络名。广播 : 有广播和不广播两种选项，选择不广播时，用户扫描无线局域网时将不能扫描到该无线局域网，而只能以直接输入网络名（SSID）的方式加入。 Vlan ID : 虚拟局域网ID。这个选项需要相关设备支持VLAN（虚拟局域网） QOS : 服务质量设置，包括打开与关闭，最大用户数 : 此无线局域网配置允许接入的最大用户数。生效标志 : 有立即生效，只对新加入的AP生效和只保存三个选项: 立即生效，无线管理系统将把此WLAN配置马上下发给所有管理中的在线AP; 只对新加入的AP生效，有新的AP上线时，将此WLAN配置下发给新上线的AP，只保存，不下发给AP。

Contents COURSE STAFF......................................................................

Faculty of EngineeringSchool of Computer Science and EngineeringCOMP4511User Interface Design andConstructionSession 1, 2008ContentsCOURSE STAFF (2)COURSE DETAILS (2)TIMES (2)COURSE AIMS (2)LEARNING OUTCOMES (4)RATIONALE (4)TEACHING STRATEGIES (4)ASSESSMENT (5)ACADEMIC HONESTY AND PLAGIARISM (6)COURSE SCHEDULE (7)RESOURCES FOR STUDENTS (7)COURSE EVALUATION AND DEVELOPMENT (8)OTHER MATTERS (8)Course staff•Daniel Woo, Lecturer in Chargeo Room 307-K17o9385 6495o danielw@.au•Outside of consultation times e-mail Daniel directly or locate on-line course content via .au/~cs4511Course details• 6 units of credit (UoC)•Pre- and co-requisiteso COMP3511/9511 Human Computer Interaction (User centred design) (pre-requisite)o COMP4001 Object-Oriented Software Development (C++, UML) (co-requisite)•The course is currently run as a 4th year elective.•Postgraduate students are permitted to undertake this course under the undergraduate course code. Postgraduate students are assigned an additional assignment exercise to write a technical paper on a topic relevant to user interface software developmentTimes•Lectures: Monday 11:00am-1:00pm, Wed 10:00-11:00am•Studio: Thursday 3:00-6:00pmCourse aims•Extend paper-based user-centred design techniques introduced in COMP3511/9511 and object-oriented design concepts introduced in COMP4001•Provide practical object-oriented software development skills specifically for graphical user interfaces•Understand the design and programming constraints user interfaces•Provide experience in usability testing of software applicationsLearning outcomes•Write applications in the Objective-C programming language•Design and implement graphical user interface (GUI) software•Write two user interface software applications as part of assignment work to first gain confidence in developing GUI applications and then to develop your skills with more complex behaviour •Understand the role design patterns in user interface software, notably the model view controller and state design patterns•Understand concepts such as event handling and views•Develop graphical user interface software with features that support copy, paste, undo, menus and responding to mouse and keyboard actions•Conduct peer usability evaluations of software developed in this course•Describe aspects of your software using object oriented techniques such as Unified Markup Language (UML)•Become competent with version control systems to maintain source code and other project related documents•Work collaboratively in a multidisciplinary environmentRationale•COMP4511 is a highly practical course that introduces you to the programming aspects of user interface software. We do not assume that you have developed such an application before but require that you feel competent in object-oriented principles and programming techniques •Usability evaluation is a key component in the software design lifecycle, so the designs that you develop in this course will be evaluated by your peers. This provides feedback to help improve your design and gives you further experience to evaluate software systems.•We build on the user centred design principles introduced in COMP3511 expecting that you will conduct user interviews to better understand requirements, develop paper or electronic prototypes of your design and conduct usability walkthroughs of your designs preferably before you write code (but we understand that this is possibly the first time that you have engaged in this process). •One of your assignment tasks will be to develop an interactive application in the domain that is of interest to you. We believe that by helping you create something that you are passionate about then your desire to excel and learn far outweighs completing a project for which you have no interest.•The lecture and studio are conducted in the CHI Lab (G11-K17) so that you have the tools and technologies immediately in front of you during class. This allows us experiment with the material whilst we are learning, addressing practical issues as they arise.•Video streaming content will be used to provide on-line course material. The Moodle class web site will host an on-line forum. We are very interested to better understand user/student needs for on-line course delivery•Based on the feedback we have had from both former students and some of their employers, the students who successfully completed this course have a balanced view of the software development process: they care about user needs, they can carry out the user centred design process, they understand the rigour and technical demands of software engineering, and they have applied knowledge in the area of usability evaluation•We train software aware students to be more than just programmersTeaching strategies•The CHI lab will be available for access to Mac based computers for self study programming exercises, conducting usability tests and hold team design meetings•Thursday 3-6pm is reserved for “studio” where we conduct workshop exercises that are focussed on usability, in-class design or coding exercises. Tutors and the lecturer will be available to discuss and review your progress•Thursday 3-4pm will be also be used for small group or individual consultation to review progress and assigned checkpoints•Additional lecture material will be provided on-line using streaming multimedia to cover design topics and more in-depth programming topics•The Moodle site will be used to conduct on-line discussion.•The overall format of the lectures and studios provide opportunity for feedback and discussionAssessmentThe exact assignment topics are still subject to change given that we are investigating collaboration with the school of industrial design and possibly working with a commercial organisation as a possible “client” that will help focus the work around a theme. Typically we would allow you to choose your own topic. This will be discussed in classes in Week 1.•Assignment 1: Introductory User Interface Involving Timeo Code Due Week 5, Fridayo15 %o Assessment will be based on Software Design, Code Implementation, User Interface Design, Version Control, Paper Prototyping, User Interviewso There will be other deliverables in studio to demonstrate progress•Assignment 2: Part 1 Design and Prototyping of an Interactive Applicationo Code Due Week 8, Thursday 2pmo15 %o Assessment will be based on Project Planning, User Centred Design, Paper Prototyping, Software Design, Code Prototyping, Version Control and UsabilityEvaluationso There will be other deliverables in studio to demonstrate progress•Assignment 2: Part 2 Implementation and Evaluation of an Interactive Applicationo Code Due Week 11, Thursday 2pmo25 %o Assessment will be based on Iterative Improvements, Additional Features, Code Implementations, Version Control, Usability Evaluations and Final Poster Presentation o There will be other deliverables in studio to demonstrate progress•Participation (Undergraduate)o5%o Studio Participationo Design Diary useo Reflection on Progress in Journal•Paper (Postgraduate)o5%o Research Paper on a topic related to interaction design and user centred designo Participation will be recorded•Final Examinationo40%o Written examination•Assignment 1 is an introductory assignment that allows you to learn about the Objective C language and develop a basic graphical user interface application that can respond to simple events generated by timers•Assignment 2 is in two parts and is designed to be your major project for the course. You may choose to develop an application that is interactive and supports the concept of direct manipulation. This will involve responding to mouse and keyboard events and drawing to the screen using the graphics functionality available in Cocoa. Examples could be a drawing application, a furniture layout application or a file system / Finder replacement.•Assignment source code is not explicitly submitted but will utilise the version control system (subversion) used in the course. On the due date, your assignment repository will be copied and the tagged branch will be copied and used as the assessable work. Written design reports should also be kept in the repository with any other non-electronic submissions handed in to class on the due date.•Assignment code will be kept in the repository trunk. Submissions will use a tagged branch.Documentation relating to the assignments will be kept in the repository and/or the on-line trac/wiki system (which is different from Moodle).•All electronic work submitted will be retained by the University of New South Wales and can be used for teaching, research and review purposes. We will acknowledge your contribution if you wish, or withhold your name should you choose to remain anonymous.•You also have the right to use your electronic submissions for your own personal use. You must retain any copyright notices contained in other code used in your submissions so the origin of the source is retained (eg. From class examples).•Any data provided as part of assignments (eg. Test data sets) may not be used for commercial purposes and must not be provided in any form to any other party.Academic honesty and plagiarismWhat is Plagiarism?Plagiarism is the presentation of the thoughts or work of another as one’s own.* Examples include:•direct duplication of the thoughts or work of another, including by copying material, ideas or concepts from a book, article, report or other written document (whether published orunpublished), composition, artwork, design, drawing, circuitry, computer program or software, web site, Internet, other electronic resource, or another person’s assignment without appropriateacknowledgement;•paraphrasing another person’s work with very minor changes keeping the meaning, form and/or progression of ideas of the original;•piecing together sections of the work of others into a new whole;•presenting an assessment item as independent work when it has been produced in whole or part in collusion with other people, for example, another student or a tutor; and•claiming credit for a proportion a work contributed to a group assessment item that is greater than that actually contributed.†For the purposes of this policy, submitting an assessment item that has already been submitted for academic credit elsewhere may be considered plagiarism.Knowingly permitting your work to be copied by another student may also be considered to be plagiarism.Note that an assessment item produced in oral, not written, form, or involving live presentation, may similarly contain plagiarised material.The inclusion of the thoughts or work of another with attribution appropriate to the academic discipline does not amount to plagiarism.The Learning Centre website is main repository for resources for staff and students on plagiarism and academic honesty. These resources can be located via:.au/plagiarismThe Learning Centre also provides substantial educational written materials, workshops, and tutorials to aid students, for example, in:•correct referencing practices;•paraphrasing, summarising, essay writing, and time management;•appropriate use of, and attribution for, a range of materials including text, images, formulae and concepts.Individual assistance is available on request from The Learning Centre.Students are also reminded that careful time management is an important part of study and one of the identified causes of plagiarism is poor time management. Students should allow sufficient time for research, drafting, and the proper referencing of sources in preparing all assessment items.* Based on that proposed to the University of Newcastle by the St James Ethics Centre. Used with kind permission from the University of Newcastle† Adapted with kind permission from the University of Melbourne.Course scheduleSubject to changesLectures Studio Assignment Deliverables Week 0Week 1 Course IntroductionGoal Directed DesignIntroduction Obj-CMemoryFoundation Classes Object Oriented Design Interface Builder Actions and Outlets Assignment 1 DesignWeek 2 Contacts ExampleModel View ControllerTablesTimers Coding StyleDebuggingVersion ControlAssignment 1 DesignA1 Concept DocumentMid Semester BreakWeek 3 ControlsArchivingMenusToolbarsDialogs Unit Testing Usability TestingWeek 4 User Centred DesignProcess Assignment 1Usability EvaluationA1 OO Design BriefWeek 5 ViewsDrawingEventsA1 Presentation A1 Code DueWeek 6 Graphics ApplicationBehaviour and Form A1 ReviewA2 ConceptsA2 Project PlanWeek 7 Graphics ApplicationState Design PatternA2 Walkthroughs A2 Concept DocumentWeek 8 Graphics ApplicationCopy / Paste / UndoNIB and Window ControllersA2 Usability Evaluations A2 Code Part 1 DueWeek 9 Interaction Details A2 Usability EvaluationsWeek 10 Document ArchitectureUser PreferencesA2 Usability Evaluations A2 Usability ReportWeek 11 Interaction Design Topics A2 Usability Evaluations A2 Code Part 2 Due Week 12 Project/UCD Reflection A2 Presentations A2 Final ReportResources for studentsRequired Text Books•Cooper, Reimann and Cronin (2007), About Face 3: The Essentials of Interaction Design, John Wiley•Hillegrass (2004), Cocoa Programming for Mac OS X (2nd Ed), Addison WesleyReferences from COMP3511/9511 or COMP4001•Preece, Rogers, Sharp (2007), Interaction Design Beyond Human Computer Interaction, John Wiley & Sons Inc.•Nielsen (1993), Usability Engineering, Morgan Kaufmann.•Gamma, Helm, Johnson and Vlissides (1995), Design Patterns: Elements of Reusable Object-Oriented Software, Addison-Wesley.Other References•Apple Computer Inc. (2001), Learning Cocoa, O’Reilly and Associates Inc.•Garfunkel and Mahoney (2002), Building Cocoa Applications, O’Reilly and Associates Inc. •Kochran, SG (2004), Programming in Objective-C, Sams Publishing•Students seeking resources can also obtain assistance from the UNSW Library. One starting point for assistance is:.au/web/services/services.htmlOther Materials•Design Diary A4 or A3 bound sketchpad for design work. This will be assessed during Studio consultation.•Post-it Notes™, coloured pens and pencils will be used as part of the design work. Please use only Blu-Tack™ for placing posters on walls. Do not use sticky or masking tape.Course evaluation and development•We will use both paper-based and electronic survey tools throughout the session to gather feedback about the course. This is used to assess the quality of the course in order to make on going improvements. We do take this feedback seriously and approach the design of this course using the user centred design philosophies.Other matters•Students are expected to attend all classes•Please review the official school policies available at .au/~studentoffice/policies/yellowform.html. It contains important information regarding use of laboratories, originality of assignment submissions and special consideration. Note that in order to receive a CSE login account you must have agreed to the conditions stated in that document.•The Yellow Form also states the supplementary assessment policy and outlines what to do in case illness or misadventure that affects your assessment, and supplementary examinations procedures within the School of Computer Science and Engineering•Please read and understand the School Policy in relation to laboratory conduct.•Note that no food or drink is permitted in the laboratory. CSE fines will apply.•The laboratory is to be secured at all times. No equipment or furniture can be removed from the laboratory.•You are not permitted to provide unauthorised access to this laboratory.•UNSW Occupational Health and Safety policies and expectations.au/ohs/ohs.shtml•Computer Ergonomics for Students.au/ergonomics/ergoadjust.html•OHS Responsibility and Accountability for Students.au/ergonomics/ohs.html•Students who have a disability are encouraged to discuss their study needs with the course convener prior to, or at the commencement of the course, or with the Equity Officer (Disability) in the Equity and Diversity Unit (9385 4734). Information for students with disabilities is available at: .au/disabil.htmlIssues to be discussed may include access to materials, signers or note-takers, the provision of services and additional examination and assessment arrangements. Early notification is essential to enable any necessary adjustments to be made. Information on designing courses and course outlines that take into account the needs of students with disabilities can be found at:.au/acboardcom/minutes/coe/disabilityguidelines.pdf。

FEATURES...................................................................................

D O C-0332-010,RE V ECSM12C32 Educational Module for Freescale MC9S12C321CONTENTSCAUTIONARY NOTES (4)FEATURES (5)REFERENCES (6)INTRODUCTION (6)GETTING STARTED (6)OPERATION (7)POWER (7)PWR (7)CONNECTOR J1 (7)PWR_SEL JUMPER (8)RESET SWITCH (8)LOW-VOLTAGE DETECT (8)TIMING (8)COMMUNICATIONS (9)COM CONNECTOR (9)CONNECTOR J1 (9)USER OPTIONS (10)SWITCHES (10)LED’S (10)DEVELOPMENT SUPPORT (11)ASCII MONITOR OPERATION (11)MONITOR COMMANDS (11)MONITOR MEMORY MAP (11)INTERRUPT SUPPORT (12)INTERRUPT VECTOR TABLE (12)SERIAL MONITOR OPERATION (14)SERIAL MONITOR MEMORY MAP (14)BDM_PORT HEADER (14)MECHANICAL DETAILS...............................................ERROR! BOOKMARK NOT DEFINED. APPENDIX A..................................................................ERROR! BOOKMARK NOT DEFINED.BILL OF MATERIALS................................................ERROR! BOOKMARK NOT DEFINED.FIGURESFigure 1: PWR_SEL (8)Figure 2: COM Connector (9)Figure 3: MCU_PORT Connector (10)Figure 4: BDM_PORT (15)TABLESTable 1: Serial COM Signals (9)Table 2: User Option Jumper Settings (10)Table 4: Monitor Commands (11)Table 5: Monitor Memory Map (11)Table 6: MON12 Interrupt Vector Table (12)Table 7: Serial Monitor Memory Map (14)REVISIONFebruary 22, 2005B Update initial releaseApril 7, 2005C Updated monitor information. Differentiated betweenserial monitor and debug monitor. Updated docu-ment format. Removed BOM and Schematic.June 8, 2005D Updated installed monitor information. Added BOMto appendixJune 8, 2006E Removed BOM and Mechanical Dwg. Updated boardpart numberCAUTIONARY NOTES1) Electrostatic Discharge (ESD) prevention measures should be used when handling thisproduct. ESD damage is not a warranty repair item.2) Axiom Manufacturing does not assume any liability arising out of the application or use ofany product or circuit described herein; neither does it convey any license under patent rights or the rights of others.3) EMC Information on the CSM12C32 module:a) This product as shipped from the factory with associated power supplies and cables, hasbeen verified to meet with requirements of CE and the FCC as a CLASS B product.b) This product is designed and intended for use as a development platform for hardwareor software in an educational or professional laboratory.c) In a domestic environment, this product may cause radio interference in which case theuser may be required to take adequate prevention measures.d) Attaching additional wiring to this product or modifying the products operation from thefactory default as shipped may effect its performance and cause interference with nearby electronic equipment. If such interference is detected, suitable mitigating measures should be taken.TERMINOLOGYThis module uses option selection jumpers and cut-traces to setup default configuration. Ter-minology for application of the option jumpers is as follows:Jumper – a plastic shunt that connects 2 terminals electricallyJumper on, in, or installed - jumper is installed such that 2 pins are connected together Jumper off, out, or idle - jumper is installed on 1 pin only. It is recommended that jump-ers be idled by installing on 1 pin so they will not be lost.Cut-Trace – a circuit trace connection between component pads. The circuit trace may be cut using a razor knife to break the default connection. To reconnect the circuit, simply install a suitably sized 0-ohm resistor or attach a wire across the pads.FEATURESThe CSM12C32 is an educational module for the FREESCALE MC9S12C32 microcontroller. The included wall plug, DB9 serial cable, sample software tools, examples, and debug monitor makes application development quick and easy. A background DEBUG port is provided for development tool use and is compatible with HCS12 BDM interface cables and software. A monitor has also been preloaded into MCU Flash to provide the user with a simple develop-ment platform. The monitor is accessible through the COM connector. A 40-pin connector al-lows the CSM12C32 module to be connected to an expanded evaluation environment such as the Axiom Manufacturing, MCU Project Board - 2.Features:♦MC9S12C32 MCU, 48 QFP♦32K Byte Flash EEPROM♦2K Bytes RAM♦31 I/O lines♦ Timer/PWM♦SCI and SPI Communications Ports♦Key Wake-up Port♦BDM DEBUG Port♦CAN 2.0 Module♦ Analog Comparator♦8 MHz Internal Bus Operation Default♦25 MHz Bus Operation using internal PLL♦+3.3VDC to +5VDC operation♦40 pin connector provides access to most MCU I/O signals♦Power Input Selection Jumper♦On-board, regulated +5V power supply♦Optional power input from Connector J1♦Optional power output through Connector J1♦16 MHz Ceramic Resonator♦RS-232 Serial Port w/ DB9 Connector♦8-Ch, 10-bit, Analog Comparator with full rail-to-rail operation andexternal trigger capability♦8-Channel, 16-bit Timer with Input Capture, Output Compare,and PWM capabilities♦User Components Provided♦ 3 Push Button Switches: 2 User, RESET♦ 3 LED Indicators: 2 User, VDD♦ Jumpers♦Disable User Functions♦ Power Select♦ Connectors♦40-pin MCU I/O Connector♦ 2.0mm Barrel Connector Power Input♦DEBUG BDM Connector♦DB9 Communications Connector♦Supplied with DB9 Serial Cable, Documentation (CD), Manual, and Wall plug type power supply. Specifications:Module Size 2.2” x 1.6”Power Input: +9VDC @ 200 mA typical, +6 to +16VDC rangeREFERENCESReference documents are provided on the support CD in Acrobat Reader format. More infor-mation can be found in the Application Notes section of the Freescale Web site.CSM12C32_SCH_B.pdf CSM12C32 Module Schematic Rev BCSM12C32_UG_C.pdf CSM12C32 User Guide, Rev C (this document)9S12C32DGV1.pdf MC9S12C32 Device User Guide9S12C32_ZIP.zip Zip file containing Device Block User GuidesModule_QuickStart.pdf Educational Module Quick Start GuideAN2548.pdf Serial Monitor Program for HCS12 MCU’s INTRODUCTIONBefore using this module, the user should be familiar with the hardware and software operation of the target MCU. Refer to the MC9S12C32 User Manual and MC9S12C32 Reference Man-ual for details on MCU operation. The module’s purpose is to promote the features of the MC9S12C32 and to assist the user in quickly developing an application in a known working environment. Users should be familiar with memory mapping, memory types, and embedded software design for quick, successful, application development.The CSM12C32 Educational Module is a fully assembled, fully functional module supporting Freescale MC9S12C32 microcontroller. The module comes with a serial cable, power supply, and an embedded monitor for stand-alone operation. Support software for this module is pro-vided for Windows 95/98/NT/2000/XP operating systems.Application development may be performed by using the embedded monitor, or any compati-ble BDM cable with supporting host software. The embedded monitor provides an effective, low cost, debug method. Note that when a BDM cable is used for debugging, the BDM pod should be powered from an external supply.GETTING STARTEDPlease refer to the Educational Module Quick Start Guide to quickly setup the hardware and install the AxIDE terminal interface.OPERATIONThe CSM12C32 module provides input and output features designed to assist embedded ap-plication development. Access to MCU port signals is available through module the connector J1. This connector may also be used to input power to the module or to output power to at-tached modules. RS-232 communications signals may also be input through connector J1. Care must be exercised when using the J1 to power the module, as only regulated voltage in the range of +3.3V to +5V should be supplied to this connection. The on-board regulator pro-vides a fixed +5V voltage to the module.Five option jumpers and 3 cut-traces control module operation. Enabling a jumper option re-quires installing a shunt across the associated header pins. Removing the shunt disables the associated option. An option enabled by a cut-trace can be disabled by removing the circuit trace between the cut-trace component pads. Use a sharp knife to cut the embedded circuit trace. Be careful not to damage adjacent circuitry. To re-enable the option, simply install a 1206 sized 0-ohm resistor or piece of wire across the cut-trace component pads.PowerPower is supplied to the module through a 2.0mm barrel connector at location PWR for stand-alone operation. The module may also be powered through connector J1 when connected to the MCU Project Board. Power may be sourced off-module through connector J1 to external circuitry. Power routing on the module is determined by the PWR_SEL jumper.PWRThe PWR connector accepts a 2.1mm, center-positive, barrel plug that allows the module to be powered from a wall-plug transformer or from a desktop power supply. Input voltage should be limited to between +7V and +20V. Input voltage of +9VDC is typical. This input supplies the on-board +5V regulator that powers the module.Connector J1Power may be supplied to the module through the pins J1-1 and J1-2. Use of this option re-quires a regulated voltage input limited to the range of +3.3VDC to +5VDC. This input is con-nected directly to the module power and ground planes. Care should be exercised not to over-drive this input. Use of connector J1 to supply +3.3V to the module requires disabling the volt-age supervisor (LV1) by opening cut-trace CT-1. See the Low-Voltage Detect section below. To re-enable the low-voltage supervisor, install a 1206 sized 0-ohm resistor at CT1. Connector J1 may also be used to source +5V power from the on-board regulator to external modules attached to connector J1. The PWR_SEL option header determines how power is routed to the module.PWR_SEL JumperThe PWR_SEL jumper is a 4-position option header that configures power routing on the CSM12C32 module. The module may be powered by an external transformer connected to the PWR connector or through connector J1. The module may also source power to auxiliary modules connected to the connector J1. Damage may occur if the J1 power input pins are over-driven. Refer to the Table 3 below to determine correct PWR_SEL jumper setting. Figure 1: PWR_SEL12Source power input from barrel connector PWR.12Source power input from connector J1.1 2Source power from barrel connector PWR and supply power to external cir-cuitry connected to J1.Reset SwitchThe RESET switch provides an asynchronous reset input to the MCU. Pressing the RESET switch produces a low-voltage level on the RESET input to the MCU. The low-voltage supervi-sor (LV1) holds the RESET line low for approximately 150 ms after the pushbutton is released.Low-Voltage DetectA DS1813 (LV1) provides POR, low-voltage detect, and pushbutton reset services for the module. At power-on, LV1 holds the MCU in reset for 150 ms after V CC reaches approximately 4.35V. During normal operation, LV1 asserts RESET when V CC falls below 4.35V and holds RESET true for 150 ms after VCC returns to normal. The push-button operation is described in the paragraph above. Use of connector J1 to supply +3.3V to the module requires disabling LV1.LV1 may be disabled by opening the cut-trace CT1. Simply remove the circuit trace between the cut-trace pads to open the circuit. To restore the circuit functionality, install a 1206 size, 0-ohm, resistor or a short piece of wire across the cut-trace pads.TimingA ceramic resonator (Y1) provides a 16.0 MHz base operating frequency to the MCU. This supports a default 8.0 MHz internal operating frequency. Higher frequencies are possible us-ing the embedded PLL. The resonator output is routed to the MCU only and is not available at the MCU Port connector (J1). The MCU ECLK output is available to the user at connector J1 if enabled.CommunicationsThe CSM12C32 module provides a single RS-232 communications port. An RS-232 trans-ceiver (U2) provides RS-232 signal level to TTL/CMOS logic level translation. RS232 signals TXD and RXD are routed between the transceiver and the MCU. These signals are also routed to connector J1. RS-232 communication signals input on J1 must be TTL/CMOS logic levels; no translation support is provided through this path. The transceiver output may also be driven off-module if the signals are suitably buffered. As added development support, hardware flow control signals RTS and CTS are available on the logic side of U2. These sig-nals are routed to vias located near the transceiver (U2). RTS has been biased properly to support 2-wire RS-232 communications.Use of the J1 connector to input RS-232 signals requires disabling the on-board RS-232 trans-ceiver. Otherwise, signal corruption may occur. Disabling the on-board transceiver is accom-plished by opening cut-traces CT1, and CT2. Simply remove the circuit trace between the cut-trace pads to open the circuit. To restore the circuit functionality, install a 1206 size, 0-ohm, resistor or a short piece of wire across the cut-trace pads.Table 1: Serial COM SignalsCOM Signal MCU Port Connector DisableTXD PS1/TXD J1-5CT5RXD PS0/RXD J1-7CT4COM ConnectorA standard 9-pin Dsub connector provides external connections for the COM port. The COM port is configured as a DCE device. Component U2 provides RS-232 translation services. The figure below shows the DB9 connector.Figure 2: COM Connector16TXD27RTS RXD38CTS49NC GND5Female DB9 connector that interfaces to the DCE serial port via anRS232 transceiver. It provides simple 2-wire asynchronous serial com-munications without flow control. A straight-through serial cable may be connected to a DTE device such a PCPins 1, 4, and 6 are connected together.Connector J1Connector J1 provides access to CSM12C32 I/O port signals.Figure 3: MCU_PORT ConnectorV x12PE1/IRQ*Default Signal AssignmentsGND34RESET*MCU PORT Signal Disable PS1/TXD56MODC/BKGDPS0/RXD78NC PS1/TXD COM1 TXD CT-5PP5/KWP5910NC PS0/RXD COM1 RXD CT-4PE0/XIRQ*1112NC PE1/IRQ*SW1User1 PT0/PW0/IOC01314NC PP5/KWP5SW2User2PT1/PW1/IOC11516NC PA0LED1User3 PM4/MOSI1718PAD00/AN00PB4LED2User4PM2/MISO1920PAD01/AN01PM5/SCK2122PB4PM3/SS*2324PA0PE4/ELCK2526PM1/TXCAN Note: Default signal assignment should be disabled to use the signal at connector J1PE7/XCLKS2728PM0/RXCANPAD02/AN022930PT2/PW2/IOC2PAD03/AN033132PT3/PW3/IOC3PAD04/AN043334PT4/PW04/IOC4PAD05/AN053536PT5/IOC5PAD06/AN063738PT6/IOC6PAD07/AN073940PT7/IOC7User OptionsUser options include 2 LED’s, and 2 pushbutton switches. Each user option may be enabled individually using the USER option header. When the appropriate USER option jumper is in-stalled, the associated user option is enabled. Removing a jumper disables the associated user option.Table 2: User Option Jumper SettingsJumper On Off MCU SignalUser 1Enable SW1Disable SW1PE0/XIRQ*User 2Enable SW2Disable SW2PP5 /KWP5User 3Enable LED1Disable LED1PA0User 4Enable LED2Disable LED2PB4SwitchesTwo push button switches provide momentary, active low, input to the MCU for user applica-tions. Pressing a switch provides a momentary low logic level input tot the MCU. SW1 and SW2 provide input to MCUI/O ports PE0 and PP5 respectively.LED’sTwo LED’s provide active-low, visual output for user applications. A low voltage level driven out on the appropriate MCU port causes the LED to light. MCU ports PA0 and PB4 drive LED1 and LED2 respectively.DEVELOPMENT SUPPORTThe CSM12C32 ships from the factory with a serial monitor installed in FLASH. An ASCII monitor is also installed to provide quick and easy debug access to the user. The text monitor is available out of RESET. The serial monitor is available by pressing and holding SW1 as the module exits RESET. In the discussion below, the terms text and ASCII are used inter-changeably.ASCII Monitor OperationThe debug monitor provides a simple application development platform for developing applica-tion code. The debug monitor allows the user to quickly and easily develop and debug RAM based application code.The debug monitor is accessible through the COM port using an ASCII terminal program such as HyperTerminal or AxIDE. The terminal should be configured for 9600, 8, N, 1 with no flow-control. The monitor relocates the hardware interrupt vector table from 0xFF8A:0xFFFF to 0X0F8A:0x0FFF(see Table 3 below). The vectors remain in the same order as the default hardware table. The Reset vector is reserved; user should use autostart to start applications from reset.ASCII Monitor Memory MapTable 3: Monitor Memory Map$0000 -$03FFRegisters1K bytesReserved$0800 -$0DFFInternal RAM. 1.5K bytes$0E00 -$0F8BMonitor Reserved$0F8A -$0FFF Relocated Interrupt Vector Table512 bytes Reserved$8000 -$BFFFUser Program Memory16K bytes$C000 -$FFFFProtected Monitor Space16K bytesMonitor CommandsTable 4: Monitor CommandsBF <StartAddress> <EndAddress> [<data>]Block Fill memory range with data BR [<Address>]Set/Display user breakpoints CALL [<Address>]Call user subroutine at <Address>GO [<Address>]Begin/continue execution of user codeHELP Display the Mon12 command summaryLOAD [P]Load S-Records into memory, P = Paged S2 MD <StartAddress> [<EndAddress>]Memory Display BytesMM <Address>Modify Memory Bytes (8 bit values)MW <Address>Modify memory Words (16 bit values)MOVE <StartAddress> <EndAddress><DestAddress>Move a block of memoryRD Display all CPU registersOFFSET – [arg]Offset for downloadProceed Continue program executionRM Modify CPU Register ContentsSTOPAT <Address>Trace until addressT [<count>]Trace <count> instructionsNOTE: Items in Italics are not implemented at this time.Interrupt SupportAll interrupt services under are provided through the relocated vector table, see Table 5 below. Each location in the table is initialized to a value of $0000 to cause the trap of an unscheduled interrupt. Any nonzero value will allow the interrupt to proceed to the user's service routine that should be located at the address indicated. The interrupt service delay is +21 cycles over the standard interrupt service.To use vectors specified in the table, the user must insert the address of the interrupt service routine during software initialization into the ram interrupt table. For an example, for the IRQ vector, the following is performed:Example:IRQ Service routine label = IRQ_SRVRam Vector Table address is defined in table below, IRQ vector definition:VIRQ EQU $0FF2; define ram table vector locationPlace IRQ service routine address in the table:MOVW#IRQ_SRV,VIRQThis vector initialization will remain in effect until a RESET is invoked.Interrupt Vector TableTable 5: MON12 Interrupt Vector TableRam Interrupt Vector Address MCU Interrupt VectorAddressTRAP code VectorSource0F8A FF8A02LVI0F8C FF8C04PWME 0F8E FF8E06PTPI 0F90FF9008C4TX0F92FF920A C4RX0F94FF940C C4ERR0F96FF960E C4WU0F98FF9810C3TX0F9A FF9A12C3RX0F9C FF9C14C3ERR0F9E FF9E16C3WU0FA0FFA018C2TX0FA2FFA21A C2RX0FA4FFA41C C2ERR0FA6FFA61E C2WU0FA8FFA820C1TX0FAA FFAA22C1RX0FAC FFAC24C1ERR0FAE FFAE26C1WU0FB0FFB028C0TX0FB2FFB22A C0RX0FB4FFB42C C0ERR0FB6FFB62E C0WU0FB8FFB830FEPRG0FBA FFBA32EEPRG0FBC FFBC34SPI20FBE FFBE36SPI10FC0FFC038I2C0FC2FFC23A BDLC0FC4FFC43C CRGC0FC6FFC63E CRGL0FC8FFC840PACBO0FCA FFCA42MCNT0FCC FFCC44PTHI0FCE FFCE46PTJI0FD0FFD048ADC10FD2FFD24A ADC00FD4FFD44C SCI10FD6FFD64E SCI00FD8FFD850SPI00FDA FFDA52PACAI0FDC FFDC54PACAO0FDE FFDE56TOF0FE0FFE058TC70FE2FFE25A TC60FE4FFE45C TC50FE6FFE65E TC40FE8FFE860TC30FEA FFEA62TC20FEC FFEC64TC10FEE FFEE66TC00FF0FFF068RTI0FF2FFF26A IRQ0FF4FFF46C XIRQ0FF6FFF66E SWI0FF8FFF870TRAP0FFA FFFA72COP0FFC FFFC74CLM0FFE FFFE76RESERVEDSerial Monitor OperationA serial binary monitor is loaded in the MCU internal flash memory. Press and hold SW1 while pressing the RESET button or applying power. This section provides a brief description of this serial monitor operation. Refer to application note AN2548 for complete details on the serial monitor operation. This application note may be found on the Support CD received with the module or from the Freescale web site.Serial Monitor Memory MapTable 6: Serial Monitor Memory Map0x0000 –0x03FFRegisters1K bytesReserved0x3800 –0x3FFF Internal RAM(Relocated)2K bytes Reserved0x8000 –0xBFFF Fixed Flash EEPROM Block 1(visible at RESET)16K bytes0xC000 –0xF77F Fixed Flash EEPROM Block 213.8K bytes0xF780 –0xF7FF User Vectors (Relocated) User Reset Vector F7FE:F7FF0xF800 –0xFFFF Vectors (Protected)2.12K bytesNOTE: Although the monitor does not support external memory, the user can enable externalmemory accesses in the unfilled areas of the memory map.The 2K-byte serial monitor program provides an RS-232 serial interface to a host PC. Serial data rate is 115.2K bps. The monitor is compatible with Metrowerks CodeWarrior Develop-ment Studio and other serial monitor interface IDE’s. The serial monitor is not compatible with ASCII interface programs such as HyperTerm or AxIDE. The monitor supports 23 primitive commands to control the target MCU. To allow a user to specify the address of each interrupt service routine, this monitor redirects interrupt vectors to an unprotected portion of FLASH.To boot to the serial monitor, the user simply pressed and holds SW1 while pressing the RESET switch or applying power. The status of SW1 is read only during the rising edge of RESET. To load user application on start-up, the user is responsible for programming the pseudo-reset vector (0xF7FE:0xF7FF). Pressing SW1 after the MCU exits reset will not ac-cess the serial monitor. After exiting reset, pressing SW1 has effect as defined in the user ap-plication.BDM_PORT HeaderBDM access is gained through the BDM_PORT header. This is a 6-pin header that allows connection of a compatible HCS12 BDM cable. Refer to the documentation for the specificBDM cable used for details on its use. The figure below shows the pin-out for the DEBUG header.Figure 4: BDM_PORTMODC/BKGD12GND34RESET*56VDD See the HC12 Reference Manual for complete DEBUG documentation。

1.弘浩明传AC培训之产品篇Ver2012

2000 3000 4000
独立使用。单板可完成AP管理以及用户数据处理、转发的功能。
板卡一览——接口板
接口板（只能安装相关业务类板的扩展接口上）
板卡名称
12*1GE接口板（旧平台） 2*10GE前扣板（新平台） 8*1GE前扣板（新平台） 2*10GE+8*1GE前扣板（新平台） 16*1GE后插板（新平台） 16*1GE+1*10GE后插板（新平台）提供、扩展接口数量
OMC网管关键功能-可管理资源

可管理资源热点名称位置厂商软件版本上联设备名称上联设备端口上联设备IP 管理IP地址
OMC网管关键功能-在线用户查询

可查询信息终端MAC地址 IP地址使用的SSID 信道号 VLAN号信号强度上下行流量
2000 3000 4000
管理板和业务板必须配合使用。一般根据所需管理的AP数选择管理板数量，再根据所需管理的用户数选择业务板数量基础应用中，一块管理板配合使用两块业务板（由于 2000只有两个槽位，只配置1块管理板+1块业务板）特殊情况下，可多配置业务板处理特定业务
综合接入板（新平台）
WLAN端到端的其他设备
OMC网管关键功能-拓扑
拓扑结构
OMC网管关键功能-可管理资源

可管理资源别名位置厂商软件版本用户数硬件配置 IP地址池
OMC网管关键功能-可管理资源

可管理资源别名位置厂商软件版本 ESSID 信道无线参数硬件配置站点
HM-ANI4000型AC简介
HM-ANI4000型AC 插槽式设备两个交换槽位，12个业务槽位最大可支持288个SFP模块，36个 10GE SFP+模块整机最大支持12288AP 最大768K并发用户 482.6X532.6(高)X400(深) 14U标准机箱 3200W（额定功率）直流电压：-48V，电流：100A 双电源支持。

2012年公司消防培训资料1

名称：空中紧急疏散标示牌规格：15cm×30cm × 配置要求：出入口、主通道，配置要求：出入口、主通道，8-10米/个米个说明空中紧急疏散标示牌和消防应急灯一样是一种自动充电的照明灯，当发生一样是一种自动充电的照明灯，火灾或停电时，火灾或停电时，紧急疏散标示牌会自动工作发光，工作发光，指示人们安全通道和出口的位置
2、燃烧的必要条件
可燃物助燃物着火源
3、火灾燃烧阶段
初起阶段发展阶段猛烈阶段下降阶段熄灭阶段
3、防火的基本方法
防火的所有措施都是以防止燃烧的三个条件结合在一起为目的。控制可燃物隔绝助燃物消灭着火源
4、灭火的基本方法
隔离法：隔离法：将可燃/易燃/助燃物质与火源分开。。冷却法：冷却法：用水直接喷射到燃烧物体上，使温度降至燃点以下。窒息法：窒息法：用湿棉毯、温麻袋、温棉被、干沙等不燃物覆盖在燃烧物的表面，隔绝空气，使燃烧停止。化学抑制法：就是用含氮的化学灭火器喷射到燃烧物上，使灭火剂参与到燃烧中，发生化学作用，覆盖火焰使燃烧的化学连锁反应中断，使火熄灭。
压把软管
保险栓压力表
筒身喷嘴
名称：推车式灭火器规格：35公斤公斤配置要求：重点区域（熟食/仓库等仓库等）配置要求：重点区域（熟食仓库等）使用说明 1、当发生火灾时将灭火器推至现场； 1、当发生火灾时将灭火器推至现场； 2、拔出安全梢，筒体与地面垂直手握、拔出安全梢，胶管。胶管。 3、选择上风位置接近火点，将皮管朝、选择上风位置接近火点，向火苗根部 4、用力压下握把，摇摆喷射，将干粉、用力压下握把，摇摆喷射，射入火焰根部。射入火焰根部。 5、息灭后并以水冷却除烟。、息灭后并以水冷却除烟。注意：灭火时应顺风不宜逆风。注意：灭火时应顺风不宜逆风。

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常见2X2，前面2表示2个空间发送，后面2表示2个空间接收，即前面的整数是代表发送，后者表示接收。
传统802.11标准，空口均工作在20MHz
802.11n（续）
3）MAC enhancement（A-MSDU & A-MPDU）
A-MSDU是将若干个以太网帧聚合到一起，并封装为一个802.11报文进行发送。 A-MPDU是将经过802.11报文封装后的MPDU聚合到一起，一次性发送多个MPDU。
FIT AP的数据流模式（2）
（2）集中数据转发 FIT AP和AC间通过专用的数据隧道进行数据转发，FIT AP和AC间的数据隧道中为二层数据。采用此模式时，所有用户数据都要通过AC进行转发。此种方式下，用户数据流向容易控制，适合运营商的组网架构。而且由于采用隧道技术，对用户IP分配可以更加灵活。此模式适用于任何组网，对其他关联设备如AP的接入交换机的依赖最小，同时对其配置的影响也最小。思考：为什么本地转发比集中转发更适合大流量的环境？
6）Power Savings——静态与动态两种 7）工作模式——Mixed（混合）和Greenfield （纯粹）
只有Mixed模式向后兼容a/g。
802.11各标准对比表
标准号标准发布时间 IEEE 802.11a 1999年9月 5.150－5.350GHz 工作频率范围 5.475－5.725GHz 5.725－5.850GHz 2.4－2.4835GHz 2.4－2.4835GHz IEEE 802.11b 1999年9月 IEEE 802.11g 2003年6月 IEEE 802.11n 2009年9月
AP发现AC的各种方式的优先级
AP在DHCP过程中，最优选择带有option60的dhcp offer报文，option43 次之，最后是任意offer。从上述AP获取ip地址的优先级，可以得出发现AC的优先级顺序。 Option60方式是弘浩明传特有的，是为了应付网络中可能存在多个DHCP server的实际环境，在开局中优先使用。思考：为什么option43不能应付多个DHCP server环境？ Option43是业界通用的方式，下发一个AC地址（如10.1.1.1）的格式是16 进制：80 04 0A 01 01 01，下发两个AC地址（10.1.1.1 11.1.1.1）的格式是 80 08 0A 01 01 01 0B 01 01 01 后续：故障定位的手段
STA接入AP的必要条件
STA要满足如下条件才有可能接入AP 1）匹配的SSID； 2）兼容的无线速率； 3）身份验证的凭证。
STA的关联过程
1）使用与AP匹配的SSID； 2）向AP认证； 3）使用一种加密方式，确保数据的隐蔽性（可选）； 4）使用一种认证方式，确定数据的完整性（可选）； 5）建立同AP的关联。
802.11n
使用802.11a与802.11b/g的双频段，即5GHz和2.4GHz。有15个互不重叠的信道。正交频分多路复用(OFDM)的调制技术和MIMO(多入多出) 最高数据率：600Mbit/s 关键技术： 1）双频带——20MHz和 40MHz信道 2）MIMO-OFDM——通过在OFDM传输系统中采用阵列天线实现空间分集，提高了信号质量，并增加了多径的容限，使无线网络的有效传输速率有质的提升。
ห้องสมุดไป่ตู้
IEEE 802.11f
在现有的无线网络中实现不同AP之间漫游的标准。
802.1X
漫游
漫游指的是从一个AP将关联切换到另外一个AP关联，让无线连接在客户端移动时保持的过程。漫游过程完全是由无线客户端驱动程序（而不是AP）驱动的，漫游的临界点，目前没有统一标准，均是由各网卡厂家自行定义。被动扫描——只侦听来自可用AP的802.11信标；主动扫描——主动发送802.11探针请求帧来查询可用AP 传统意义上的漫游，并不支持第3层漫游。
FIT AP的工作原理（续）
4）AC将FIT AP上报的信息（所属厂商、设备型号、硬件版本，这3个信息是必要信息）进行比较，如果不同，则向FIT AP发回不允许加入AC的应答；如果相同，则向FIT AP发回允许加入AC的应答信息（主要包括AP版本等信息）； 5）FIT AP根据AC的应答信息，判断是否需要升级版本，如果不需要，则进入 AC配置FIT AP状态；如果需要，则进入FIT AP版本升级状态。 6）FIT AP与AC建立一条不加密的CAPWAP隧道和一条加密的CAPWAP隧道，前者是用于传输管理数据流，后者用于传输无线客户端的数据。思考：FIT AP加入AC的几个必要条件？故障定位的手段。
目录
Title
无线局域网基础 FIT AP的工作原理 FIT AP发现AC的方式 FIT AP的数据流模式 CAPWAP技术概况
WLAN的热点词汇
FIT AP
管理
11n
3G+W
融合
IPv6
WAPI
WLAN发展历程
无线专网
FAT AP
FAT AP+ 无线网关
FIT AP+ 无线控制器
802.11a
使用5GHz的未经许可的国家信息框架（U-NII）频段。实际上，FCC将该频段分成了3个更小的频段用于不同用途： 1）低频段：5.15~5.25，供室内使用； 2）中频段：5.25~5.35，供室内和室外使用； 3）高频段：5.725~5.825，供室外使用；在上述每个频段内，均有4个互不重叠的信道，这意味着在WLAN环境中可以使用4、8、或者12个互不重叠的信道。正交频分多路复用(OFDM)的调制技术最高数据率：54Mbit/s 由于与b/g频段不一样，所以，a与b/g是可以同存的。思考：最大传输数据的速率为多少？
AP的工作原理
抽象来说，可以把AP视为转换网桥，即在第2层（链路层）对来自不同介质的帧进行转换和桥接。 AP的主要功能就是将无线数据桥接到有线网络中；当然， AP也可以用作无线网桥，在两个相隔较远的AP之间建立一条无线链路，即我们常见的无线回传功能。
802.11帧的类型
管理帧：用于管理WLAN通告和STA成员资格，包括： 1）通告AP以及WLAN参数的信标； 2）STA关联、重关联、解除关联； 3）STA认证和撤销认证。控制帧：用于控制STA同AP的关联，包括： 1）探针请求和响应，用于STA请求AP的信息； 2）RTS和CTS消息。数据帧：由任何无线设备发送，包含数据或者有效负载信息。注意：在管理帧中，总是包含一个48位的BSSID字段。BSSID是该AP的无线侧 MAC地址，它唯一标识AP服务。
2.4－2.4835GHz 5.150－5.850GHz
非重叠信道数
物理速率（Mbps）实际吞吐量（Mbps）受干扰机率环境适应性调制方式兼容性
4、8、12
54 28 低较好 OFDM 802.11a
3
11 6 高差 CCK/DSSS 802.11b
3
54 28① 高好 CCK/OFDM 802.11b/g
描述RF信号强度的术语
使用单位瓦（W）或者毫瓦（mW）； dBm：信号相对于1mW的强度；计算公式：10lg（功率值/1mw）。如：100mW的AP，用dBm表示是20dBm； 500mW的AP，用dBm表示是27dBm；思考：dBm可以为负数吗？
802.11标准
802.11标准定义了无线局域网在第1层和第2层的工作方式，这包括无线频率和信道以及吞吐量、安全性和移动性。主要包括如下： 802.11a 802.11b 802.11g 802.11n
AC培训之基础篇
技术支持部
Date /2012.02
目录
Title
无线局域网基础 FIT AP的工作原理 FIT AP发现AC的方式 FIT AP的数据流模式 CAPWAP技术概况
有线和无线局域网的比较
从最本质上说，有线网络需要电缆，而无线网络不需要。所以只要是在无线覆盖的范围内，任何人通过特定的无线网卡都可以捕获到传输的数据。传统以太网是由IEEE802.3标准定义的，而无线局域网则由IEEE802.11标准定义的。传统以太网采用载波侦听多路访问/冲突检测（CSMA/CD）方法来传输和接收，而无线网络采用载波侦听多路访问/冲突避免（CSMA/CA）方法来传输和接收。前者是检测冲突，后者是尽可能避免冲突，所以，前者可以做到全双工，而后者总是半双工。
FAT与FIT AP组网对比
FIT AP的工作原理
FIT AP被设计为无需接触他就能对其进行配置，他工作的必要条件是必须找到一个无线控制器（AC）并获得所有的配置参数。 FIT AP启动的过程： 1）FIT AP从DHCP服务器获取一个ip地址； 2）FIT AP获悉所有可用的AC地址； 3）FIT AP向其AC地址列表中的第一个AC发送加入请求信息。如果该AC没有应答，将尝试下一个AC 。AC接受FIT AP时，将向FIT AP发回加入应答信息；
802.11b

使用2.4GHz的频段。FCC只允许WLAN使用频率范围2.4000~2.4835GHz 总共14个信道，但只有3个互不重叠的信道，即1、6、11。直接序列扩频调试（DSSS）技术或者补偿码键控（CCK）的调制技术最高数据率：11Mbit/s 思考：最大传输数据的速率为多少？
15
300-600 100以上低很好 MIMO/OFDM 802.11a/b/g/n
其他常见标准
IEEE 802.3af
定义了以太网供电(PoE)的实现标准，功率小于12.95W。
IEEE 802.11i
指定 802.11 网络安全机制的 IEEE 标准。802.11i 使用高级加密标准 (AES) 分组密码。该标准还增强了密钥管理、基于 802.1X 的用户身份验证和头数据完整性。