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CommScope 电源优化系统说明书

CommScope 电源优化系统说明书

The patent pending PowerShift ™dynamically to match your exact RRU power requirements.Section 1: PowerShift ™Section 2: Capacitive Jumper ..................................................................................................................03Section 3: Recommended Interconnect Power Cables ........................................................................04Section 4: General Wiring Diagram ....................................................................................................05Section 5: Rack Installation ..............................................................................................................................06Section 6: Wiring of the Module ........................................................................................................................06Section 7: Capacitive Jumper Installation ..............................................................................................08Section 8: Capacitive Jumper Mounting ............................................................................................09Section 9: Splicing Capacitive Jumper to Power ................................................................................10Section 10: Module Installation ...........................................................................................................................11Section 11: Testing and Maintenance .....................................................................................................12Section 12: Output Circuit Overload Protection . .................................................................................14Section 13: Dip Switch / RJ45 Jacks / Alarm Relay . (17)Field Engineering Services (FES)Support services, such as our Field Engineering Services (FES) Group gives CommScope customers access to technical support where and when it is needed the most — in the field. The FES team is staffed by an expert team of technicians who, in turn, are supported by some of the brightest and most experienced product line managers.Customer Service CenterUnited States and Mexico 1-800-255-1479 or 1-888-235-5732 International: +1-779-435-8579For the most current, up-to-date information on all our products and product information please visit our eCatalog section at .PowerShift ® V1 DAS Installation Instructions, Rev DGUI v1.4 − Power Module Series 1:1 and newer (firmware v1.9 and newer)The Base Unit is used in conjunction with the existing DC power plant at the installation site.1. The modules are plug-and-play for easy installation and site maintenance. 2. The base unit has capacity for four modules.3. Each module has DC input and DC output for three Remote Radio Units (RRU), for a total capacity of 12 RRU sectorsper PowerShift base unit.4.Each module unit is also provided with diagnostic indicators, explained in section 12.Section 1: PowerShift ™ V1 System ComponentsThe PowerShift V1 System Consists of two components: the Base Unit and Capacitive Jumpers.Rack Part Number: PS-R-1Module Part Number: PS-1-73Note: The PowerShift base unit will not operate without the corresponding Capacitive Jumper. Each modulerequires three Capacitive Jumpers (oneper circuit)1 Per circuit; 3 circuits per module2Input/output voltage and current range are guaranteed values, typical operating values will exceed these by about 10%; examples:Typical input cutoff (minimum) voltage: 42V x 0.9 ≈ 38VTypical output maximum current: 20A x 1.1 ≈ 22A3 Turn-on voltage is higher than cut-off voltage in order to provide hysteresis protection4 Total power = power consumed by radio + power loss in trunk cable5 RRU input voltage set-point is factory programmed (not user settable). Other voltage set-point are possible, contact CommScope 6For cable lengths outside these ranges, contact CommScope for more informationThe Capacitive Jumper is a circuit at the radio input to provide the PowerShift base unit with information regarding actual line impedance. Additionally it compensates for DC inductance of the power line further reducing power loss.Section 2: Capacitive JumperGeneral SpecificationsTypePower-only Capacitive Jumper BrandHELIAX ® FiberFeed ® Conductor Gauge, singles 6-12 AWG (10 AWG typical)Conductors, quantity 2Enclosure Color Grey Jacket ColorBlackEnvironmental SpecificationsEnvironmental Space UV resistant for outdoor and/or direct burial installations Operating Temperature Maximum value based on a standard condition of 20 °C (68 °F)Safety Voltage Rating600 VDimensionsWeight 1.1 kg | 2.5 lb Diameter Over Jacket12.395 mm | 0.488 inEnclosure 304.8 mm | 12 in (length, including cable gland nuts) 76.2 mm | 3 in (width)76.2 mm | 3 in (depth)GeneralMount Tabs includedSection 3: Recommended Interconnect Power Cables(coordinate with a CommScope representative to determine popper gauge/length) ConstructionMaterials: PWRT-210-S Construction Type Conductor Material Dielectric MaterialDrain Wire MaterialFiller MaterialGround Wire Material Insulation Material, singles Jacket MaterialOuter Shield (Braid) Coverage Outer Shield (Braid) Gauge Outer Shield (Braid) Material Outer Shield (Tape) MaterialDimensionsCable WeightDiameter Over Conductor, singlesDiameter Over Dielectric Diameter Over Drain WireDiameter Over Ground Wire Diameter Over Jacket Diameter Over Shield (Braid) Jacket Thickness Electrical Specifications Conductor dc Resistance Conductor dc Resistance NoteSafety Voltage Rating Environmental Specifications Environmental Space Operating Temperature Safety Standard General Specifications ApplicationCable TypeJacket ColorConductor Gauge, singles Conductor Type, singles Conductors, quantity Construction TypeDrain Wire GaugeGround Wire Gauge Ground Wire TypeJacket Color, singles Non-armoredTinned copperPVCTinned copper PolypropyleneTinned copperPVCPVC65 %36 AWGTinned copperAluminum/Poly, nonbonded0.30 kg/m | 0.20 lb/ft3.2004 mm per 105 strand0.1260 in per 105 strand4.7244 mm | 0.1860 in1.8800 mm per 7 strand0.0740 in per 7 strand3.200 mm | 0.126 in12.395 mm | 0.488 in10.109 mm | 0.398 in1.143 mm | 0.045 in1.06 ohms/kft | 3.47 ohms/km Maximum value based on a standard condition of 20 °C (68 °F)600 VUV resistant for outdoor and/or direct burial installations-40°C to +90 °C (-40°F to+194 °F)NEC Article 336 (Type TC)IndustrialPowerBlack8 AWGStranded2Discrete power cable12 AWG10 AWGStrandedBlack | RedPWRT-210-SSection 4: General Wiring DiagramBoxSleeve/Pendant Long cable runPower-only Capacitive JumperRemotesJunction or splice box* based on the # of RRU’s on-siteSection 5: Rack InstallationDetermine the installation depth required for the base unit, attach the side flanges in the appropriate location. 3 screws are required per side.Mount the unit in a standard 19” rack near the current DC power output breaker box.Ground the unit by installing a ground wire at the base of the unit.Section 6: Wiring of the ModuleRemove 2 small screws on the back of the unit and remove the back cover to expose the terminal screws. (replace screws to keep them with the unit)The rear of the shelf is divided into 12 individual circuits each containing a DC input and a DC output. There is a positive and negative terminal strip connection for each DC input and out. The right side pair is for the DC input and the left sideRun cables from the Base Unit Output screws to the baseband Surge Protection Device / Over Voltage Protection (SPD / OVP) input if installed. Then attach the SPD / OVP outputs to the trunk cable that runs to the Remote’s.If no SPD/OVP is installed, then connect the trunk cable directly to the Base Unit Output screws.Repeat for each circuit.Re-install the back cover of the unit when complete.the expected value in micro-Farads (µF) is 1100µF +/- 25% (i.e. 825 to 1375µF). If an open or short condition is detected then there is likely a fault in the trunk cable or in the capacitive jumper.Section 8: Capacitive Jumper MountingMethod 2: Using a multi-meter, take a resistance measurement across the Base Unit Output screws. First, take a resistance measurement to confirm the circuit is open. Second, temporarily connect (short) the two conductors together at thecapacitive jumper (i.e. at the end of the capacitive jumper cable) and take a resistance measurement; the value should be less than 3 Ohms (it is dependent on the trunk cable gauge and length).Connect the other end of the capacitive jumper to the Remote Radio Unit. See section 10 for connector installation instructions.23Loosen 4 screws to remove the cover. Screws are ARE captive to the lid but can be removed if required.1Section 9: Splicing Capacitive Jumper to Power101.6 mm (4 in)6.35 mm (1/4 in)When lid is removed inspect pre-installed jumper to be sure nothing has come loose during shipping and handling.Braided ground-48VRTNRemove 101.6 mm (4 inches) of outer shielding from the power trunk cable. Remove 6.35 mm (1/4 inch) of conductor jacketing. Install power trunk into enclosure by loosening gland nut and threading into gland opening. Connect 0 Volt conductor to the corresponding 0 Volt terminal. Connect -48 Volt conductor to the corresponding -48 Volts terminal. Connect the braided ground to its terminal. Tighten cable gland and reinstall the lid. Support the power trunk cable 152 mm (6 in) from the cablegland.Braided ground-48VRTN Power from Junction BoxCable glandCompleted 4 module (12 RRU) installationdetermine the line resistance• A major alarm will be raised on the base unit alarm relay• After the 30 second interval, the module will still enable output voltage to power up the radio; a default line resistance of 0.15 Ohms is used, which should result in an output voltage sufficient to power up the radio• Troubleshoot by confirming the capacitive jumper is connected, repeat the integrity check in Section 7• Note that PowerShift can not measure a line resistance that is > 3.5 Ohms5. If any status lights are not green, refer to the alarm information below.6. Note the following:• Cycling the input power to a circuit (off and back on) will restart the 30 second measurement interval (i.e., the module will perform a new measurement of the line resistance)• After the 30 second measurement interval is complete, the module will use the measured line resistance indefinitely;it will not attempt to re-measure the line resistance unless the input power to the circuit is cycledAlarmsThere are four LED status indicators on each PowerShift Module: 1, 2, 3 and X:1. 1, 2 and 3 represent the status of each of the three power circuits in the module.2. X represents the status of the overall module.3. Intermittent or latent failures will be indicated by the X indicator even if the individual circuits are functioning correctly.Circuit LEDs (1, 2, 3)1. Solid green LED indicates the circuit is functioning properly.2. A blinking green LED indicates the circuit is performing a line resistance measurement• This occurs every time input power is applied to the circuit (including when the input power is cycled off and back on)• The circuit LED should blink green for about 30 seconds and then change to solid green• If the LED continues to blink green after 30 seconds this indicates an alarm condition (the module is unable to measure the line resistance)Module LED (“X”)1. Solid green LED indicates the module is functioning properly.2. If the X LED is not green, but 1, 2 and/or 3 are green, the indicated circuit(s) are still functioning properly and deliveringpower, but a latent failure has occurred (e.g., a temporary over-temperature condition)See the alarm table on following page for additional information on LED status and troubleshootingThe power module is designed to shut off the output from a circuit in the event the load demand exceeds the circuit maximum output capacity of 1460W total power (radio demand + power loss in the trunk cable)Under normal circumstance an output overload should not occur; the proper design and installation of the PowerShift system ensures the maximum radio load demand and the trunk cable length do not exceed the circuit capacity.However, off-nominal events such as a short in the trunk cable or a malfunctioning radio could cause the load demand to exceed the module output capacity. In this event the module functions as follows:When circuit capacity is exceeded the module will shut off its output, the GUI appears as shown below using Circuit 1 as an example Note the following: • The GUI shows Circuit 1 has input voltage but no output voltage or current (output is shut off due to the overload condition)• The LEDs and GUI icons for Circuit 1 for “X” are yellow blinking• The GUI circuit status shows red text for “off” (no output power) and out• The alarm relay on the back of the shelf is set for a critical alarm conditionSection 12: Output Circuit Overload ProtectionModule Circuit-Overload RecoveryThe module will check the condition of the circuit about every 3-5 seconds to determine if the overload condition remains or if it has cleared; each time the circuit check is performed the applicable module circuit LED will briefly flash green and the GUI status will briefly show “okay”If the overload condition clears within 20 minutes then the module will re-enable power output of the circuitIf the overload condition has not cleared, the module will continue to keep the circuit output shut off and will continue to check the circuit condition about every 3-5 secondsAfter 20 minutes, if the circuit overload condition has not cleared, the module will latch the circuit output off and will discontinue checking the circuit condition (the applicable circuit and “X” LEDs will continue to blink yellow)Once the circuit has latched off, the user must intervene as follows to re-enable the circuit:• The circuit overload condition must be cleared• The input power to the circuit must be cycled off and back on (typically by using the DC plant circuit breaker)• The circuit will re-enable its output power, the applicable circuit LED will blink green for about 30 seconds while the line resistance is measured• After about 30 seconds:• GUI Circuit number icon and the module front panel LED are both solid green• The GUI circuit status shows “okay”• The GUI “X” icon and module LED are both solid greenModule High Temperature ProtectionT he power module is designed to protect itself from an excessive temperature (overheating) condition. Under normal operating conditions the module cooling fans provide adequate cooling for the module. However in off-nominal conditions (blockage of the module’s air intake or exhaust grill, failure of the site shelter cooling) the module will shutoff output if its internal temperature rises too high. In this event the module functions as follows:• When the internal temperature rises too high the module shuts off the output of all affected circuit(s)• There are two possible operating conditions for the module once a thermal overload has occurred: Condition 1, Critical Alarm: The high temperature condition (e.g., failure of the shelter cooling) has not beenresolved and thus the module output remains shut off. The high temperature condition must be resolved and the internal module temperature allowed to drop down below threshold before the module will re-enable its output powerCondition 2, Major Alarm: The thermal overload condition has been resolved and the module output hasre-enabled. Note that the thermal overload alarm still remains active (latched) until the user intervenes to clear the alarm• Using Circuit 1 as an example, the GUI and module LEDs will appear as shown below for the two conditions:Thermal Shutdown, Condition 1, Critical Alarm (high temperature condition is not resolved, no output power)Note the following:• The GUI shows Circuit 1 has input voltage but no output voltage or current (output is shut off due to an unresolved high temperature condition)• The GUI Circuit 1 icon and the “X” icon are both highlighted red blinking• The GUI Circuit 1 status shows “temp out-I off” indicating the circuit shutoff is due to a thermal overload• The module front panel “1” and “X” LEDs are both red blinking• The alarm relays on the back of the shelf is set for a critical alarm conditionThermal Shutdown, Condition 2, Major Alarm (high temperature condition has resolved, output power in enabled)Note the following:• The GUI shows Circuit 1 has output voltage and output currentThe GUI Circuit 1 icon shows green blinking, the “X” icon shows yellow solid•• The GUI Circuit 1 status shows “temp ” indicating there is an alarm condition on the circuit (i.e., a latched alarm for the prior thermal shutdown)• The module front panel “1” LED is green blinking, and the “X” LED is yellow solid• The alarm relays on the back of the shelf is set for a major alarm conditionModule Thermal - Overload RecoveryNote the following:• If the module is still shutdown (Condition 1, critical alarm) then the high temperature condition must first be resolved(e.g., unblock the fan, restore shelter cooling) such that the module internal temperature falls below the shutdownthreshold and the module re-enables output power (it will then be in Condition 2)• Once the module has re-enabled power (Condition 2, major alarm) the user must clear the alarm by using the GUI to click the “clear” button for each circuit that has highlighted “temp” status• The applicable circuits will change back to nominal operating condition (see below):The GUI Circuit number icon and the module front panel LED are both solid greenThe GUI circuit status shows “ok”The GUI “X” icon and module LED are both solid greenDip Switch and RJ45 jacks are present on each base unit for possible attachment to an external controller such as a GE Critical Power Standard Controller.Section 14: Dip Switch / RJ45 Jacks / Alarm RelayThe Dip switch position is factory preset for no controller with both switches down. If for any reason these switches are not set accordingly, the unit will not function properly unless configured for use with a controller. Please ensure that both switches are reset to the down position as illustrated above.Dip SwitchLocated on the side of therack behind the DATA portsAlarm Relay Connections1. The alarm status of the unit is externally accessible with the screw terminal present at the rear near the RJ45 Jacks.。

ADN8810 12位高输出电流源数据手册(版本C)说明书

ADN8810 12位高输出电流源数据手册(版本C)说明书

12-Bit High Output Current Source Data Sheet ADN8810Rev. C Document FeedbackInformation furnished by Analog Devices is believed to be accurate and reliable. However, noresponsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. T rademarks and registered trademarks are the property of their respective owners. O ne Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2004–2017 Analog Devices, Inc. All rights reserved. Technical Support FEATURESHigh precision 12-bit current sourceLow noiseLong term stabilityCurrent output from 0 mA to 300 mA Output fault indicationLow driftProgrammable maximum current24-lead, 4 mm × 4 mm LFCSP3-wire serial interface APPLICATIONSTunable laser current source Programmable high output current source Automatic test equipmentFUNCTIONAL BLOCK DIAGRAM3195-0 RESET4.096VSERIALINTERF ACEADDRESSSBF AULTINDICA TIONFigure 1.GENERAL DESCRIPTIONThe ADN8810 is a 12-bit current source with an adjustable full-scale output current of up to 300 mA. The full-scale output current is set with two external sense resistors. The output compliance voltage is 2.5 V, even at output currents up to 300 mA.The device is particularly suited for tunable laser control and can drive tunable laser front mirror, back mirror, phase, gain, and amplification sections. A host CPU or microcontroller controls the operation of the ADN8810 over a 3-wire serial peripheral interface (SPI). The 3-bit address allows up to eight devices to be independently controlled while attached to the same SPI bus.The ADN8810 is guaranteed with ±4 LSB integral nonlinearity (INL) and ±0.75 LSB differential nonlinearity (DNL). Noise and digital feedthrough are kept low to ensure low jitteroperation for laser diode applications. Full-scale and scaledoutput currents are given in Equation 1 and Equation 2,respectively.SNREFFS RVI⨯≈10(1)⎪⎪⎪⎪⎭⎫⎝⎛+Ω⨯⨯⨯=1.01514096kRRVCodeI SNSNREFOUT(2)ADN8810Data SheetRev. C | Page 2 of 14TABLE OF CONTENTSFeatures .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Timing Characteristics ................................................................ 4 Absolute Maximum Ratings ............................................................ 5 ESD Caution .................................................................................. 5 Pin Configuration and Function Descriptions ............................. 6 Typical Performance Characteristics ............................................. 7 Terminology ...................................................................................... 9 Functional Description (10)Setting Full-Scale Output Current ........................................... 10 Power Supplies ............................................................................ 10 Serial Data Interface ................................................................... 10 Standby and Reset Modes ......................................................... 11 Power Dissipation....................................................................... 11 Using Multiple ADN8810 Devices for Additional Output Current ......................................................................................... 11 Adding Dither to the Output Current ..................................... 12 Driving Common-Anode Laser Diodes ................................. 12 PCB Layout Recommendations ............................................... 13 Suggested Pad Layout for CP-24 Package ............................... 13 Outline Dimensions ....................................................................... 14 Ordering Guide .. (14)REVISION HISTORY11/2017—Rev. B. to Rev. CChanged R S to R SN .......................................................... Throughout Change to Figure 1 ........................................................................... 1 Changes to Maximum Full-Scale Output Current Parameter and Power Supply Rejection Ratio Parameter, Table 1 ................ 3 Moved Timing Characteristics Section, Table 2, and Figure 2 ..... 4 Added Lead Temperature Range (Soldering 10 sec) Parameter, Table 3 ................................................................................................ 5 Changes to Figure 3 and Table 4 ..................................................... 6 Changes to Setting Full-Scale Output Current Section ............. 10 Changes to Adding Dither to the Output Current Section,Figure 20, and Figure 21 ................................................................ 12 Changes to PCB Layout Recommendations Section andFigure 25 .......................................................................................... 13 Updated to Outline Dimensions .................................................. 14 3/2016—Rev. A to Rev. BChanges to Figure 3 and Table 4 ...................................................... 7 Updated Outline Dimensions ....................................................... 15 Changes to Ordering Guide . (15)4/2009—Rev. 0 to Rev. A Changes to Table 3 ............................................................................. 6 Changes to Figure 25 ...................................................................... 14 Updated Outline Dimensions ....................................................... 15 Changes to Ordering Guide . (15)1/2004—Revision 0: Initial VersionData Sheet ADN8810 SPECIFICATIONSAVDD = DVDD = 5 V, PVDD = 3.3 V, AVSS = DVSS = DGND = 0 V, T A = 25°C, covering output current (I OUT) from 2% full-scale current (I FS) to 100% I FS, unless otherwise noted.Rev. C | Page 3 of 14ADN8810Data SheetRev. C | Page 4 of 141 With respect to AVSS. 2R SN = 20 Ω. 3See Table 2 for timing specifications.TIMING CHARACTERISTICS1, 21 Guaranteed by design. Not production tested.2Sample tested during initial release and after any redesign or process change that may affect these parameters. All input signals are measured with tr = tf = 5 ns (10% to 90% of DVDD) and timed from a voltage level of (V IL + V IH )/2.SCLKC SSDIRESET*ADDRESS BIT A3 MUST BE LOGIC LOW03195-0-002Figure 2. Timing DiagramData SheetADN8810Rev. C | Page 5 of 14ABSOLUTE MAXIMUM RATINGSTable 3.Parameter Rating Supply Voltage 6 VInput VoltageGND to V S + 0.3 V Output Short-Circuit Duration to GND IndefiniteStorage Temperature Range −65°C to +150°C Operating Temperature Range−40°C to +85°C Junction Temperature Range, CP Package −65°C to +150°C Lead Temperature Range (Soldering 10 sec)300°CStresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.ESD CAUTIONADN8810Data SheetRev. C | Page 6 of 14PIN CONFIGURATION AND FUNCTION DESCRIPTIONS03195-0-003FAULT ADDR0ADDR1FB RSN ADDR2NICVREF AVDD AVSS NIC DVSS117P V D D I O U T I O U T P V D D 1E N C O M P S B NOTES1. NIC = NOT INTERNALLY CONNECTED.2. EXPOSED PAD. CONNECT THE EXPOSED PAD TO DGND.Figure 3. Pin ConfigurationData SheetADN8810Rev. C | Page 7 of 14TYPICAL PERFORMANCE CHARACTERISTICSCODE1.2–0.84,500500I N L E R R O R (L S B )1,0001,5002,0002,5003,0003,5004,0001.00.2–0.2–0.4–0.60.80.600.403195-0-005Figure 4. Typical INL PlotCODE0.4–0.304,500500D N LE R R O R (L S B )1,0001,5002,0002,5003,0003,5004,0000.1–0.1–0.20.300.203195-0-006Figure 5. Typical DNL PlotTEMPERATURE (°C)0.200.15–0.20–4085–15∆I N L (L S B )1035600–0.05–0.10–0.150.100.0503195-0-007Figure 6. ∆INL vs. TemperatureTEMPERATURE (°C)0.200.15–0.20–4085–15∆D N L (L S B )1035600–0.05–0.10–0.150.100.0503195-0-008Figure 7. ∆DNL vs. TemperatureTEMPERATURE (°C)0.2580.2570.250–4085–15F U L L -S C A L E O U T P U T (A )1035600.2540.2530.2520.2510.2560.255R SN = 1.6Ω03195-0-009Figure 8. Full-Scale Output vs. TemperatureTEMPERATURE (°C)20.76520.75520.720–4085–15F U L L -S C A L E O U T P U T (m A )10356020.74020.73520.73020.72520.75020.745R SN = 20Ω20.76003195-0-010Figure 9. Full-Scale Output vs. TemperatureADN8810Data SheetRev. C | Page 8 of 14TEMPERATURE (°C)0.500.35I P V D D (m A )0.200.150.100.050.300.250.400.4503195-0-011Figure 10. PVDD Supply Current (I PVDD ) vs. Temperature120I D V D D (µA )864210TEMPERATURE (°C)03195-0-012Figure 11. DVDD Supply Current (I DVDD ) vs. Temperature1.51.0I A V D D (m A )1.41.31.21.1TEMPERATURE (°C)03195-0-013Figure 12. AVDD Supply Current (I AVDD ) vs. TemperatureFREQUENCY (Hz)100k1O U T P U T I M P E D A N C E (Ω)1k1001010k03195-0-014Figure 13. Output Impedance vs. FrequencyTIME (1µs/DIV)CSI OUTV O L T A GE (2.7V /D I V )03195-0-015Figure 14. Full-Scale Settling TimeTIME (200ns/DIV)CSI OUT03195-0-016Figure 15. 1 LSB Settling TimeData SheetADN8810Rev. C | Page 9 of 14TERMINOLOGYRelative AccuracyRelative accuracy or integral nonlinearity (INL) is a measure of the maximum deviation, in least significant bits (LSBs), from an ideal line passing through the endpoints of the DAC transfer function. Figure 4 shows a typical INL vs. code plot. The ADN8810 INL is measured from 2% to 100% of the full-scale (FS) output.Differential NonlinearityDifferential nonlinearity (DNL) is the difference between the measured change and the ideal 1 LSB change between any two adjacent codes. A specified differential nonlinearity of ± 1 LSB maximum ensures monotonicity. The ADN8810 is guaranteed monotonic by design. Figure 5 shows a typical DNL vs. code plot . Offset ErrorOffset error, or zero-code error, is an interpolation of the output voltage at code 0x000 as predicted by the line formed from the output voltages at code 0x040 (2% FS) and code 0xFFF (100% FS). Ideally, the offset error is 0 V . Offset error occurs from a combination of the offset voltage of the amplifier and offset errors in the DAC. It is expressed in LSBs.Offset DriftThis is a measure of the change in offset error with a change in temperature. It is expressed in (ppm of full-scale range)/°C. Gain ErrorGain error is a measure of the span error of the DAC. It is the deviation in slope of the output transfer characteristic from ideal. The transfer characteristic is the line formed from the output voltages at code 0x040 (2% FS) and code 0xFFF (100% FS). It is expressed as a percent of the full-scale range.Compliance VoltageThe maximum output voltage from the ADN8810 is a function of output current and supply voltage. Compliance voltage defines the maximum output voltage at a given current and supply voltage to guarantee the device operates within its INL, DNL, and gain error specifications.Output Current Change vs. Output Voltage ChangeThis is a measure of the ADN8810 output impedance and is similar to a load regulation spec in voltage references. For a given code, the output current changes slightly as output voltage increases. It is measured as an absolute value in (ppm of full-scale range)/V .O U T P U T V O L T A G E03195-0-004Figure 16. Output Transfer FunctionADN8810Data SheetRev. C | Page 10 of 14FUNCTIONAL DESCRIPTIONThe ADN8810 is a single 12-bit current output digital-to-analog converter (DAC) with a 3-wire SPI interface. Up to eight devices can be independently programmed from the same SPI bus. The full-scale output current is set with two external resistors. The maximum output current can reach 300 mA. Figure 17 shows the functional block diagram of the ADN8810.03195-0-017Figure 17. Functional Blocks, Pins, and Internal ConnectionsSETTING FULL-SCALE OUTPUT CURRENTTwo external resistors set the full-scale output current from the ADN8810. These resistors are equal in value and are labeled R SN in Figure 1. Use 1% or better tolerance resistors to achieve the most accurate output current and the highest output impedance.Equation 3 shows the approximate full-scale output current. The exact output current is determined by the data register code as shown in Equation 4. The variable code is an integer from 0 to 4095, representing the full 12-bit range of the ADN8810.SNFS R I ×≈10096.4(3)+Ω××=1.0151000,1k R R Code I SN SN OUT(4)The ADN8810 is designed to operate with a 4.096 V referencevoltage connected to VREF. The output current is directly proportional to this reference voltage. To achieve the bestperformance, use a low noise precision (the ADR292, ADR392, or REF198 is recommended).POWER SUPPLIESThere are three principal supply current paths through the ADN8810: •AVDD provides power to the analog front end of the ADN8810 including the DAC. Use this supply line topower the external voltage reference. For best performance, AVDD must be low noise.•DVDD provides power for the digital circuitry. Thisincludes the serial interface logic, the SB and RESET logic inputs, and the FAULT output. Tie DVDD to the same supply line used for other digital circuitry. It is not necessary for DVDD to be low noise.•PVDD is the power pin for the output amplifier. It canoperate from as low as 3.0 V to minimize power dissipation in the ADN8810. For best performance, PVDD must be low noise.Current is returned through the following three pins: •AVSS is the return path for both AVDD and PVDD. This pin is connected to the substrate of the die as well as the slug on the bottom of the lead frame chip scale package (LFCSP). For single-supply operation, connect this pin to a low noise ground plane.•DVSS returns current from the digital circuitry powered by DVDD. Connect DVSS to the same ground line or plane used for other digital devices in the application.•DGND is the ground reference for the digital circuitry. In a single-supply application, connect DGND to DVSS.For single-supply operation, set AVDD to 5 V , set PVDD from 3.0 V to 5 V , and connect AVSS, AGND, and DGND to ground.SERIAL DATA INTERFACEThe ADN8810 uses a serial peripheral interface (SPI) with three input signals: SDI, CLK, and CS . Figure 2 shows the timing diagram for these signals.Data applied to the SDI pin is clocked into the input shift register on the rising edge of CLK. After all 16 bits of the data-word have been clocked into the input shift register, a logic high on CS loads the shift register byte into the ADN8810. If more than 16 bits of data are clocked into the shift register before CS goes high, bits are pushed out of the register in first-in first-out (FIFO) fashion.The four MSB of the data byte are checked against the address of the device. If they match, the next 12 bits of the data byte are loaded into the DAC to set the output current. The first bit (MSB) of the data byte must be a logic zero, and the following three bits must correspond to the logic levels on pins ADDR2, ADDR1, and ADDR0, respectively, for the DAC to be updated. Up to eight ADN8810 devices with unique addresses can be driven from the same serial data bus.Table 5 shows how the 16-bit DATA input word is divided into an address byte and a data byte. The first four bits in the input word correspond to the address. Note that the first bit loaded (A3) must always be zero. The remaining bits set the 12-bit data byte for the DAC output. Three example inputs are demonstrated.•Example 1: This SDI input sets the device with an address of 111 to its minimum output current, 0 A. Connecting the ADN8810 pins ADDR2, ADDR1, and ADDR0 to VDD sets this address.• Example 2: This input sets the device with an address of 000 to a current equal to half of the full-scale output. •Example 3: The ADN8810 with an address of 100 is set to full-scale output.STANDBY AND RESET MODESApplying a logic low to the SB pin deactivates the ADN8810 and puts the output into a high impedance state. The device continues to draw 1.3 mA of typical supply current in standby. When logic high is reasserted on the SB pin, the output current returns to its previous value within 6 µs.Applying logic low to RESET sets the ADN8810 data register to all zeros, bringing the output current to 0 A. When RESET is deasserted, the data register can be reloaded. Data cannot be loaded into the device while it is in standby or reset mode.POWER DISSIPATIONThe power dissipation of the ADN8810 is equal to the output current multiplied by the voltage drop from PVDD to the output.()SN OUT OUT OUT DISS R I V PVDD I P ×−−×=²(5)The power dissipated by the ADN8810 causes a temperature increase in the device. For this reason, PVDD must be as low as possible to minimize power dissipation.While in operation, the ADN8810 die temperature, also known as junction temperature, must remain below 150°C to prevent damage. The junction temperature is approximatelyDISS JA A J P T T ×θ+=(6)where:T A is the ambient temperature in °C,θJA is the thermal resistance of the package (32°C/W). •Example 4: A 300 mA full-scale output current is required to drive a laser diode within an 85°C environment. The laser diode has a 2 V drop and PVDD is 3.3 V .Using Equation 5, the power dissipation in the ADN8810 is found to be 267 mW . At T A = 85°C, this makes the junction temperature 93.5°C, which is well below the 150°C limit. Note that even with PVDD set to 5 V , the junction temperature increases to only 110°C.USING MULTIPLE ADN8810 DEVICES FOR ADDITIONAL OUTPUT CURRENTConnect multiple ADN8810 devices in parallel to increase the available output current. Each device can deliver up to 300 mA of current. To program all parallel devices simultaneously, set all device addresses to the same address byte and drive all CS , SDI, and CLK from the same serial data interface bus. The circuit in Figure 18 uses two ADN8810 devices and delivers 600 mA to the pump laser.SERIAL INTERFACE (FROM µC OR DSP)I 600mA03195-0-018Figure 18. Using Multiple Devices for Additional Output CurrentTable 5. Serial Data Input ExamplesAddress Byte Data Byte SDI Input A3 A2 A1 A0D11 D10 D9 D8 D7 D6 D5 D4D3 D2 D1 D0 Example 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 Example 2 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 Example 31 01111 11 11 1 1 1 1ADDING DITHER TO THE OUTPUT CURRENTSome tunable laser applications require the laser diode bias current to be modulated or dithered. This is accomplished by dithering the V REF voltage input to the ADN8810. Figure 19 demonstrates one method.DITHERR203195-0-019Figure 19. Adding Dither to the Reference VoltageSet the gain of the dither by adjusting the ratio of R2 to R1. Increase C to lower the cutoff frequency of the high-pass filter created by C and R1. The cutoff frequency of Figure 19 is approximately 98 Hz.The AD8605 is recommended as a low offset, rail-to-rail input amplifier for this circuit.DRIVING COMMON-ANODE LASER DIODESThe ADN8810 can power common-anode laser diodes. These are laser diodes whose anodes are fixed to the laser module case. The module case is typically tied to either VDD or ground. For common anode to ground applications, a −5 V supply must be provided.In Figure 20, R SN sets up the diode current by the following equation:40965.16111.1096.4Code k R I SN ×Ω+×=(7)where Code is an integer value from 0 to 4095.Using the values in Figure 20, the diode current is 300.7 mA at a code value of 2045 (0x7FF), or half full-scale. This effectively provides 11-bit current control from 0 mA to 300 mA of diode current.The maximum output current of this configuration is limited by the compliance voltage at the IOUT pin of the ADN8810. The voltage at IOUT cannot exceed 1 V below PVDD, in this case, 4 V. The IOUT voltage is equal to the voltage drop across R S N plus the gate-to-source voltage of the external FET. For this reason, select a FET with a low threshold voltage.In addition, the voltage across the R SN resistor cannot exceed the voltage at the cathode of the laser diode. Given a forward laser diode voltage drop of 2 V in Figure 20, the voltage at the RSN pin (I × R SN ) cannot exceed 3 V . This sets an upper limit to the value of code in Equation 5.Although the configuration for anode-to-ground diodes is similar, the supply voltages must be shifted down to 0 V and −5 V , as shown in Figure 21. The AVDD, DVDD, and PVDD pins are connected to ground with AVSS connected to −5 V .The 4.096 V reference must also be referred to the −5 V supply voltage. The diode current is still determined by Equation 7. All logic levels must be shifted down to 0 V and −5 V levels as well. This includes RESET , CS , SCLK, SDI, SB , and all ADDR pins. Figure 22 shows a simple method to level shift a standard TTL or CMOS (0 V to 5 V) signal down using external FETs.NOTE: LEAVE FB WITH NO CONNECTION03195-0-020Figure 20. Driving Common-Anode-to-VDD Laser DiodesNOTE: LEAVE FB WITH NO CONNECTION03195-0-021Figure 21. Driving Common-Anode-to-Ground Laser Diodes with a NegativeSupplyRESETCS SCLK SDI03195-0-022Figure 22. Level Shifting TTL/CMOS LogicPCB LAYOUT RECOMMENDATIONSAlthough they can be driven from the same power supply voltage, keep DVDD and AVDD current paths separate on the printed circuit board (PCB) to maintain the highest accuracy; likewise for AVSS and DGND. Tie common potentials together at a single point located near the power regulator. This technique is known as star grounding and is shown in Figure 23. This method reduces digital crosstalk into the laser diode or load.LOGIC GROUNDRETURN03195-0-023Figure 23. Star Supply and Ground TechniqueTo improve thermal dissipation, solder the slug on the bottom of the LFCSP package be soldered to the PCB with multiple vias into a low noise ground plane. Connecting these vias to a copper area on the bottom side of the board further improves thermal dissipation.Use identical trace width and lengths for the two output sense resistors. These lengths are shown as X and Y in Figure 24. Differences in trace lengths cause differences in parasitic seriesresistance. Because the sense resistors can be as low as 1.37 Ω, small parasitic differences can lower both the output current accuracy and the output impedance. See the AN-619 Application Note for a sample layout for these traces.03195-0-024Figure 24. Use Identical Trace Lengths for Sense ResistorsSUGGESTED PAD LAYOUT FOR CP-24 PACKAGEFigure 25 shows the dimensions for the PCB pad layout for the ADN8810. The package is a 4 mm × 4 mm, 24-lead LFCSP . The metallic slug underneath the package must be soldered to a copper pad connected to AVSS, the lowest supply voltage to the ADN8810. For single-supply applications, this is ground. Use multiple vias to this pad to improve the thermal dissipation of the package.0.0270.011(0.28)0.020(0.50)CONTROLLING DIMENSIONS ARE IN MILLIMETERS03195-0-025Figure 25. Suggested PCB Layout for the CP-24-10 Pad LandingOUTLINE DIMENSIONS0.300.250.200.800.750.700.25 MIN2.202.10 SQ 2.000.50BSC0.500.400.30COMPLIANT TO JEDEC STANDARDS MO-220-WGGD-8.BOTTOM VIEWTOP VIEWSIDE VIEW4.104.00 SQ 3.900.05 MAX 0.02 NOM0.203 REFCOPLANARITY0.08PIN 1INDICATORFOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONSSECTION OF THIS DATA SHEET.02-21-2017-AEXPOSED PAD00SEATING PLANEDETAIL A (JEDEC 95)Figure 26. 24-Lead Lead Frame Chip Scale Package [LFCSP]4 mm × 4 mm Body and 0.75 mm Package Height(CP-24-10)Dimensions shown in millimetersORDERING GUIDEModel 1Temperature Range Package DescriptionPackage Option ADN8810ACPZ–40°C to +85°C 24-Lead Lead Frame Chip Scale Package [LFCSP] CP-24-10 ADN8810ACPZ-REEL7–40°C to +85°C 24-Lead Lead Frame Chip Scale Package [LFCSP] CP-24-101Z = RoHS Compliant Part.©2004–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D03195-0-11/17(C)。

CS4334-KSZ资料

CS4334-KSZ资料
The CS4334 family is based on Delta-Sigma modulation, where the modulator output controls the reference voltage input to an ultra-linear analog low-pass filter. This architecture allows for infinite adjustment of sample rate between 2 kHz and 100 kHz simply by changing the master clock frequency.
3.1 Digital Interpolation Filter ................................................................................................. 12 3.2 Delta-Sigma Modulator .................................................................................................... 12 3.3 Switched-Capacitor DAC ................................................................................................. 12 3.4 Analog Low-Pass Filter .................................................................................................... 12 4. SYSTEM DESIGN .................................................................................................................. 13 4.1 Master Clock .................................................................................................................... 13 4.2 Serial Clock ...................................................................................................................... 13

M7 VHF数据传输器说明书

M7 VHF数据传输器说明书

The M7 VHF data transceiver is a rugged ½ - 5 wattVHF data radio modem with an RS-232 or optional422/485 serial interface, perfect for SCADA andtelemetry applications. Additional options includeIP65-rated (“weatherproof”) enclosure and/or GPS.Product O verviewLong-Range OperationOperating in the VHF 136-155MHz frequency band (other bands available), the RV-M7-VA radio modem works over 60 miles point-to-point and many miles with omni-directional antennas. All RV-M7 modems support store-and-forward repeating for wide-area coverage.Fast PollingThe M7 transceiver has a 5mS PLL in it, making it one of the fastest telemetry radios available, especially well suited for polled, DNP and MODBUS applications. Its can send up to 50 transmissions per second.High Speed and High EfficiencyThe RV-M7 operates with user-selectable over-the air data rates of 800 to 19200bps. Faster rates for higher efficiency or lower-speed for increased communication range.GPS OptionThe optional internal GPS allows the RV-M7 to be a powerful Automatic Vehicle Locating (AVL) system or Time Space Position Information (TSPI) reporting device.Fully ProgrammableIt is configured with a serial connection using industry-standard AT commands. Parameters such as network IDs, unit ID and transmission rate are easily configured. The M7 is easily configured through the included PC program “Radio Manager”. Digital Base BandData rate, modulation, and IF bandwidth are digitally programmed. Wide (25kHz) and Narrow (12.5kH) IF bandwidths may be user-configured. The over-the-air data rate may be adjusted to suit a particular application.Real-time diagnostics and statisticsChannel performance, RSSI, RF power, packet counters, and radio configuration are easily accessed via the serial port or remotely over-the-air.Very Low Power ConsumptionThe advanced VHF transceiver is integrated with a 32-bit microprocessor-based modem in one easy-to mount package. It has very low power consumption, and sleep modes that allow it to be active and consume a minimum amount of resources.Rugged and “Weatherproof”The RV-M7 is available with optional IP65-rated “weatherproof”connections and enclosure. All models include protection against damage from over-temperature, high VSWR, and reverse voltage.Flexible Addressing and Error CorrectionThe RV-M7 uses a 16 bit address with a 16 bit network mask, allowing for many devices to be co-located without receiving each other, as well as the creation of sophisticated network topologies.For More InformationFor more information about this or any other Raveon product, call in the U.S.A. 1-760-444-5995.RV-M7-V ATechnical Specifications are subject to change without notice.Raveon Technologies Corporation2461 Impala DriveCarlsbad, CA 92010Copyright Raveon Technologies Corp, 2012Phone: +1-760-444-5995All rights reservedFax: +1-760-444-5997Email:****************Version C3. Printed in the USAGeneral SpecificationsModel:RV-M7-Vx-oo (x=band) (oo=options) RV-M7-VM (MURS model) Size: 4.60” X 2.60” X .956 (11.7cm X 6.6cm X 2.43cm) Weight:6 ozInput Voltage: 10 – 16 VDC Current draw:Receiving data: <65mA (55mA typ. at 12VDC)Transmitting data: (1.8A @ 5w, 1.1A @ 2W typical) Frequency Band:Band Frequency A 136-155MHz Available Frequencies: B 150-174MHz SRS-M7-VBMURS 5 MURS chan. SRS-M7-VM Serial Port Baud Rates (programmable)1.2k,2.4k, 4.8k, 9.6k, 19.2k, 38.4k, 57.6k, 115.2k Over-the-air baud rates (programmable) Narrow IF: 800, 1200, 2000, 2400, 4.8k, 5142, 8K, 9.6kWide IF: 1200, 2000, 2400, 4.8k, 8k, 9.6k, 19.2k Operating ModeSimplex or Half-duplex Full Spec Operating Temperature range -30°C to +60°CTX-RX and RX-TX turn-around time <5mS Wake-up time<500mS from OFF <5mS from Sleep Front Panel LEDsPower , Status (Carr Det, TX, mode…) RF I/O ConnectorBNC (Female) Power CableRaveon P/N: RT-CB-H1 AddressingIndividual address: 65,536 Groups: 254Transmitter SpecificationsRF Power Output 500mW – 5.0 W programmable (2W max for MURS model)Maximum Duty Cycle 100% @ 2W to 40C, 25% @5W (100% w/ optional heatsink) Frequency Deviation± 2.2kHz (N) ± 3.3kHz (W)RF BandwidthFull-band without tuning Occupied bandwidth 11 kHz (-N) 16kHz(-W)TX Spurious outputs < -70dBc TX Harmonic outputs < -80dBc Occupied BandwidthPer FCCFCC Emissions Designator 11K0F1D (narrowband mode) 15K0F1D (wideband mode) Frequency Stability Better than ±2.5ppmReceiver SpecificationsRX sensitivity (1% PER, N) ................... 9600bps < -108dBm4800bps < -114dB 1200bps < -118dBRF No-tune bandwidth ......................... Full-band without tuning Adjacent Channel Selectivity ................ -70dB (1200bps Wide) Adjacent Channel Selectivity ................ -65dB (1200bps Narrow) Adjacent Channel Selectivity ................ -60dB (4800bps Narrow) Alternate Channel Selectivity ............... -70dB Blocking and spurious rejection ........... -80dBRX intermodulation rejection ............... -75dB (4800bps Narrow) RX intermodulation rejection ............... -80dB (1200bps Narrow)Interface SpecificationsSerial Interface PortConnector Type DB-9IO Voltage Levels RS-232, RS-485, RS-422(user selectable) Word length7 or 8 bits, N, O, or E Modem handshake signalsRTS, CTS, CDAT Commands OverviewChannel Number, Operating Frequency, IF bandwidth Modem StatisticsPower-savings modesUnit Address and Destination address Network Address Mask ARQ error correction on/off Baud Rate, parity, stop bitsSelect Packet or Streaming mode of data transmission Store-and-forward Repeating configurationHardware flow control operation LEDs operation or disabledFor a complete feature list see the technical manual here:/support.html。

baseband

baseband

1 ( 64 ) CONFIDENTIAL Nokia Mobile Phones08-Apr-04 错误! 错误!未知的文档属性名称RH37 BasebandTypeSubTitleHereCreator/Owner: Staffan Lamberg Function: Baseband Approver: Victor Burger Location: Lotus Notes, xyz DocMan (if stored in Unix only, pls enter path)Change History see Lotus NotesSelect this option if you maintain the change history in Lotus Notes ONLY. In that case leave the table empty.Vers. 0.1Date 19-05-03Status DraftHandled byComments Initial DraftNew A4PC Template especially for UlmCopyright © Nokia Mobile Phones2 ( 64 ) CONFIDENTIAL Nokia Mobile Phones08-Apr-04 错误! 错误!未知的文档属性名称Contents:1.2. 3.Introduction ................................................................................................................................ 4 1.1 Block diagram ...................................................................................................................... 5Abbreviations ............................................................................................................................... 7 Environmental specifications ........................................................................................................ 8 3.1 Absolute Maximum Ratings ................................................................................................ 8 3.2 Temperature Conditions ..................................................................................................... 8 3.3 Humidity and Water Resistance ........................................................................................ 8 3.4 Frequencies in Baseband ...................................................................................................... 8 3.5 PWB ...................................................................................................................................... 9 3.5.1 Characteristics of the PWB ............................................................................................. 9 3.5.2 Key Components .......................................................................................................... 10 4. Technical Specifications ......................................................................................................... 11 4.1 Baseband Core.................................................................................................................... 11 4.1.1 UPP .............................................................................................................................. 11 4.1.2 UEMEK......................................................................................................................... 11 4.1.3 External SRAM and Flash ......................................................................................... 12 4.2 Energy management ........................................................................................................ 12 4.2.1 Modes of operation .................................................................................................... 12 4.2.2 No Supply ................................................................................................................... 13 4.2.3 Backup ........................................................................................................................ 13 4.2.4 Acting Dead ................................................................................................................ 13 4.2.5 Active ........................................................................................................................... 13 4.2.6 Sleep Mode................................................................................................................. 13 4.2.7 Charging ..................................................................................................................... 14 4.3 Power distribution ................................................................................................................ 14 4.4 DC Characteristics ............................................................................................................... 15 4.4.1 Supply Voltage Ranges ................................................................................................ 15 4.4.2 Baseband regulators..................................................................................................... 16 5. Function Groups ........................................................................................................................ 16 5.1 Battery ................................................................................................................................. 16 5.2 Audio ................................................................................................................................... 17 5.2.1 Internal Microphone ................................................................................................... 17 5.2.2 Internal Speaker ........................................................................................................... 17 5.2.3 IHF Speaker ................................................................................................................. 18 5.2.4 External Audio .............................................................................................................. 19 5.2.5 External Microphone Connection ............................................................................. 19 5.2.6 IHF Speaker and Head Set Connections ...................................................................... 19 5.2.7 Test possibilities ........................................................................................................... 19 5.3 Camera................................................................................................................................ 19 5.3.1 Key Features ................................................................................................................ 20 5.3.2 Specifications ............................................................................................................... 20 5.3.3 CCP Bus ..................................................................................................................... 21 5.3.4 CCI Bus ....................................................................................................................... 21 5.3.5 UIF Bus ....................................................................................................................... 22 5.3.6 Clocks.......................................................................................................................... 22 5.3.7 Test Possibility ........................................................................................................... 22 5.4 Vibra .................................................................................................................................... 22 5.4.1 Test Possibility ........................................................................................................... 22 5.5 FCI ...................................................................................................................................... 22 5.5.1 General......................................................................................................................... 22New A4PC Template especially for Ulm Copyright © Nokia Mobile Phones3 ( 64 ) CONFIDENTIAL Nokia Mobile Phones 5.5.2 5.5.308-Apr-04 错误! 错误!未知的文档属性名称Function........................................................................................................................ 23 Test Possibility ............................................................................................................ 24 5.6 LCD Module ....................................................................................................................... 24 5.6.1 Characteristics ............................................................................................................ 24 5.6.2 LCD Connector........................................................................................................... 25 5.6.3 Test possibility ............................................................................................................ 26 5.7 Keypad ................................................................................................................................ 26 5.7.1 Test Possibility ........................................................................................................... 26 5.8 Illumination .......................................................................................................................... 27 5.8.1 Test Possibility ........................................................................................................... 28 5.9 XPress on grip LEDs ........................................................................................................... 28 5.9.1 Test Possibility ........................................................................................................... 29 5.10 SIM .................................................................................................................................. 29 5.10.1 Test Possibility ........................................................................................................ 29 6. Interfaces ................................................................................................................................... 30 6.1 BB-RF Interface ................................................................................................................... 30 6.1.1 Digital Signals ............................................................................................................. 30 6.1.2 Analogue Signals ....................................................................................................... 31 6.2 System Connector Interface ................................................................................................ 32 6.2.1 System connector ...................................................................................................... 32 6.2.2 ACI ............................................................................................................................... 33 6.2.3 FBUS ............................................................................................................................ 33 6.2.4 VOUT ........................................................................................................................... 34 6.2.5 DC Plug ........................................................................................................................ 34 7. BB Calibration ............................................................................................................................ 35 7.1 UEMEK Calibration .............................................................................................................. 35 7.1.1 Calibration Limits .......................................................................................................... 37 8. Test Points ................................................................................................................................. 38 9. Troubleshooting ......................................................................................................................... 40 9.1 Top level flow 1 .................................................................................................................... 40 9.2 Top level flow 2 .................................................................................................................... 41 9.3 Phone is dead...................................................................................................................... 42 9.4 Phone is dead 2................................................................................................................... 43 9.5 Flash faults .......................................................................................................................... 44 9.6 Flash faults 2 ....................................................................................................................... 45 9.7 Phone is jammed ................................................................................................................. 46 9.8 Phone is Jammed 2 ............................................................................................................. 48 9.9 Charger ............................................................................................................................... 49 9.10 SIM Card .......................................................................................................................... 50 9.11 Audio Faults ..................................................................................................................... 51 9.12 Audio Faults 2 .................................................................................................................. 52 9.13 Audio Faults 3 .................................................................................................................. 53 9.14 Audio Faults 4 .................................................................................................................. 54 9.15 Earpiece .............................................................................................................................. 55 9.16 Display Faults .................................................................................................................. 56 9.17 Display Faults 2................................................................................................................ 57 9.18 Keypad Faults .................................................................................................................. 58 9.19 Keypad faults 2 ................................................................................................................ 59 9.20 Camera Faults.................................................................................................................. 60 9.21 Camera faults2 ................................................................................................................. 61 9.22 Self-test ............................................................................................................................ 62 9.23 Functional Cover Interface ............................................................................................... 63New A4PC Template especially for UlmCopyright © Nokia Mobile Phones4 ( 64 ) CONFIDENTIAL Nokia Mobile Phones08-Apr-04 错误! 错误!未知的文档属性名称1. INTRODUCTION Product RH37 is a DCT4.5 Expression segment phone. There are two variants: An EGSM900 / GSM-1800 / GSM-1900 phone and a US variant, RH 49, with GSM850/1800/1900. The HW has the following features: • • • • • • • • • • • • GPRS and HSCSD with Edge in up to (2RX + 2TX) (MCS5), without edge also in (3RX + 1TX) (MCS6) DCT4 with AMR and 16 MIDI tones 128/16 Mbit Combo memory Amazon Active display with 64k colours Battery BL-5B Illuminated XPress on grips Pop-Port interface 5-way navigation key with select FCI rear side (C-cover) VGA Camera Vibra IHFThe RH37 BB is based on the DCT4/4.5 engine and is compatible to the Pop-Port accessories. The DCT4/4.5 engine consists basically of two ASICs. The UEMEK (Universal Energy Management IC including voltage regulators, charge control and audio circuits, audio IFH amplifier from DCT4.5) and the UPP (Universal Phone Processor including MCU, DSP and RAM from DCT4).New A4PC Template especially for UlmCopyright © Nokia Mobile Phones5 ( 64 ) CONFIDENTIAL Nokia Mobile Phones08-Apr-04 错误! 错误!未知的文档属性名称1.1 Block diagramThe picture below shows the main Baseband function blocks.VVCameraRF InterfaceLCDActive TFD colourFLASH128 MbitSRAMLED drivers16 MbitSIMUEMEKUPP8MFunctional Cover IFBatteryBL-5BKeyboardKeyboard IlluminationVIBRAPAIHFChargerDC jackSystemconnectorPop-PortFigure 1. Baseband block diagramUEMEK supplies both Baseband and RF with power via built in voltage regulators, which are connected to the battery. The RF parts use mainly 2.78 V and the Baseband parts 1.8V I/O voltage. The UPP core is supplied with programmable core voltage of 1.0V, 1.3V or 1.5V. UEMEK includes 7 linear LDO (Low Drop-Out) regulators for Baseband and 7 regulators for RF. It also includes 4 current sources for biasing purposes and internal usage. The UEMEK is furthermore supplying the SIM interface with a programmable voltage of 1.8V or 3V. Note: 5V SIM cards are no longer supported by DCT-4 generation Baseband. UPP operates from a 26 MHz clock coming from the RF ASIC Helga. The clock signal is divided by two down to the nominal system clock frequency of 13 MHz. The DSP and MCU contain PLLs, which can multiply the system clock to a higher frequency.New A4PC Template especially for UlmCopyright © Nokia Mobile Phones6 ( 64 ) CONFIDENTIAL Nokia Mobile Phones08-Apr-04 错误! 错误!未知的文档属性名称A real time clock function is integrated into the UEMEK, which utilizes the same 32kHz clock supply as the sleep clock. The communication between UEMEK and UPP is implemented using two bi-directional serial busses, CBUS and DBUS. The CBUS is controlled by the MCU and operates at a speed of 1 MHz. The DBUS is controlled by the MCU and operates at a speed of 13 MHz. Both processors are located in the UPP. The UEMEK ASIC handles the analog interface between the Baseband and the RF section. UEMEK provides A/D and D/A conversion of the in-phase and quadrature receive and transmit signal paths and also A/D and D/A conversions of received and transmitted audio signals to and from the user interface. The UEMEK supplies the analog TXC and AFC signals to RF section according to UPP .signal control. There are also separate signals for PDM coded audio. Digital speech processing is handled by the DSP inside UPP ASIC. UEMEK is a dual voltage circuit, the digital parts are running from the baseband supply 1.8V and the analog parts are running from the analog supply 2.78V. Also VBAT is directly used (Vibra, LED-driver, Audio amplifier). The Baseband supports both internal and external microphone inputs and speaker outputs. Keypad tones, DTMF, and other audio tones are generated and encoded by the UPP and transmitted to the UEMEK for decoding. An external vibra alert control signals are generated by the UEMEK with separate PWM outputs. EMC shielding is implemented using a soldered shielding, RF cans and PWB grounding.New A4PC Template especially for UlmCopyright © Nokia Mobile Phones7 ( 64 ) CONFIDENTIAL Nokia Mobile Phones08-Apr-04 错误! 错误!未知的文档属性名称2. ABBREVIATIONS ACI: ADC ASIC: BB: BSI DCT4: DSP: DUT: EMC: ESD: FC FR: GSM: HW: IF: IHF: IMEI: I/O IR: IrDa: LCD: LED: LDO MCU: PA Phoenix: PLL PWB: RF RTC SIM: SW: UEMEK: UI: UPP: USB: Accessory Control Interface Analogue to Digital Converter Application Specific Integrated Circuit Baseband Battery Size Indcator Digital Core Technology, generation 4 Digital Signal Processor Device under test Electro Magnetic Compatibility Electro Static Discharge Functional Cover Full Rate Global System for Mobile Communication Hardware Interface Integrated Hands Free International Mobile Equipment Identity Input/Output Infrared Infrared Data Association Liquid Crystal Display Light Emitting Diode Low Drop Out Microprocessor Control Unit Power Amplifier SW tool of DCT4 Phase Locked Loop Printed Wired Board Radio Frequency Real Time Clock Subscriber Identification Module Software Universal Energy Management User Interface Universal Phone Processor Universal Serial BusNew A4PC Template especially for UlmCopyright © Nokia Mobile Phones8 ( 64 ) CONFIDENTIAL Nokia Mobile Phones08-Apr-04 错误! 错误!未知的文档属性名称3. ENVIRONMENTAL SPECIFICATIONS 3.1 Absolute Maximum Ratings Table 1 Absolute Maximum Ratings Signal Battery Voltage (Idle) Battery Voltage (Call) Charger Input Voltage Note -0.3…5.5V Max 4.8V -0.3V …16V3.2 Temperature ConditionsTable 2. Temperature Conditions Condition Normal operating temperature Reduced functionality Storage Min -10°C -25°C -40°C Max +55°C +75°C +85°C3.3 Humidity and Water ResistanceTable 3. Humidity Conditions Condition Relative Humidity Min 5% Max 95%The module is not protected against water.3.4 Frequencies in Baseband Table 4. Frequencies in BasebandFrequency 1,2 kHz?? 32 kHz 1 MHz 6,5 MHz 3,25 MHz 13 MHz 26 MHz 40 MHzContext FCI SleepClk CBUS Display IF SIMIFUPP UEMEK Flash SIM Comment X X X X X X X X X X Min X X X X EstimationUp to 1 MHz RFConvClkDBUS, RFBUClik X RF Clk Memory ClockNew A4PC Template especially for UlmCopyright © Nokia Mobile Phones9 ( 64 ) CONFIDENTIAL Nokia Mobile Phones08-Apr-04 错误! 错误!未知的文档属性名称3.5 PWB 3.5.1 Characteristics of the PWB • • • Single PWB 8 layer board Double side assembledBurried via through internal layersRCCTOVia through all layers Blind BOTTOFigure 2. PWB vias.RCCNew A4PC Template especially for UlmCopyright © Nokia Mobile Phones10 ( 64 ) CONFIDENTIAL Nokia Mobile Phones08-Apr-04 错误! 错误!未知的文档属性名称3.5.2 Key ComponentsD1470 HW Accelerator Figure 3 Key ComponertsD2800 UPPD2200 UEMEKD3000 ComboTable 5 Key ComponentsPosition D1470 D2800 D2200 D3000Component Name HW Accelerator UPP8M UEMEKV1.1 Combo NMP DCT4Code 4370911 337B068 4371701 4341409New A4PC Template especially for UlmCopyright © Nokia Mobile PhonesConfidential Staffan Lamberg4. TECHNICAL SPECIFICATIONS4.1 Baseband Core4.1.1 UPPMain characteristics of the used UPP are:∙DSP by Texas Instruments, LEAD3 16 bit DSP core 32 bit IF max. 200 MHz∙MCU based on ARM RISC MCU core max 50 MHz∙Internal 8 Mbit SRAM (PDRAM)∙General purpose UARTS∙SIM card interface∙Accessory interface (ACI)∙Interface control for Keypad, LCD, Audio and UEM control∙Handling of BB-RF Interface4.1.2 UEMEKMain characteristics of the used UEMEK are:∙ACI support∙Audio codec∙11 Channel A/D converter∙Auxiliary A/D converter∙Real time logic∙32 KHz crystal oscillator∙SIM interface and drivers∙Security logic∙Storage of IMEI code∙Buzzer and vibra motor drivers∙ 2 LED drivers∙Voltage reference for analogue blocks∙Charging function∙Baseband regulators∙RF regulators∙RF interface convertersConfidential Staffan Lamberg4.1.3 External SRAM and FlashThe Combo-Memeory is a multi chip package memory which combines 128 Mbit (8Mx16) muxed burst multibank flash and 16 Mbit muxed CMOS PSRAM (Pseudo SRAM: DRAM with SRAM interface). These two dies are stacked on each other in one package, The functionality of the flash memory is the same as for other generic BB4.0 products.The combo is supplied by single 1,8 V for read, write and erase operations. For accelerated flash programming, VID = 9.0 V has to be applied to VPP input of the combo device.The combo memory is housed in a 44-ball FBGA.Figure 4. Combo memory4.2 Energy managementThe energy management of RH37 is based on BB 4.0 architecture. A so-called semi fixed battery (BL-5B) supplies power primarily to UEMEK ASIC and the RF PA. The UEMEK includes several regulators to supply RF and Baseband. It provides energy management including power up/down procedure.(If the main battery is not present, a cell capacitor maintains backup power supply for the RTC part of UEMEK)4.2.1 Modes of operationThe Baseband engine has six different functional modes: Since the UEMEK controls the regulated power distribution; each of these states affects the general functionality of the phone.1. No supply2. Backup3. Acting Dead4. Active5. Sleep6. ChargingConfidential Staffan Lamberg4.2.2 No SupplyIn NO_SUPPLY mode, the phone has no supply voltage. This mode is due to disconnection of main battery and backup battery or low battery voltage level in both of the batteries.Phone is exiting from NO_SUPPLY mode when sufficient battery voltage level is detected. Battery voltage can rise either by connecting a new battery with VBAT > V MSTR+ or by connecting charger and charging the battery above V MSTR+.4.2.3 BackupIn BACKUP mode the backup battery has sufficient charge but the main battery can be disconnected or empty (VBAT < V MSTR and VBACK > VBU COFF).VRTC regulator is disabled in BACKUP mode. VRTC output is supplied without regulation from backup battery (VBACK). All the other regulators are disabled.4.2.4 Acting DeadIf the phone is off when the charger is connected, the phone is powered on but enters a state called ”Acting Dead”. To the user, the phone acts as if it was switched off. A battery-charging alert is given and/or a battery charging indication on the display is shown to acknowledge the user that the battery is being charged.4.2.5 ActiveIn the Active mode the phone is in normal operation, scanning for channels, listening to a base station, transmitting and processing information. There are several sub-states in the active mode depending on if the phone is in burst reception, burst transmission, if DSP is working etc. In Active mode the RF regulators are controlled by SW writing into UEMEK´s registers wanted settings: VR1A can be enabled or disabled. VR2 can be enabled or disabled and its output voltage can be programmed to be 2.78V or 3.3V. VR4 -VR7 can be enabled, disabled, or forced into low quiescent current mode. VR3 is always enabled in Active mode.4.2.6 Sleep ModeSleep mode is entered when both MCU and DSP are in stand–by mode. Both processors control sleep-mode. When SLEEPX signal (low) is detected UEMEK enters SLEEP mode. VCORE, VIO and VFLASH1 regulators are put into low quiescent current mode. All the RF regulators are off in SLEEP. When SLEEPX=1 detected UEMEK enters ACTIVE mode and all functions are activated.The sleep mode is exited either by the expiration of a sleep clock counter in the UEMEK or by some external interrupt, generated by a charger connection, key press, headset connection etc. In sleep mode VCTCXO is shut down and 32 kHz sleep clock oscillator is used as reference clock for the Baseband.Confidential Staffan Lamberg4.2.7 ChargingIn RH37 the battery type/size is indicated by a BSI-resistor. The resistor value corresponds to a specific battery capacity. Also BTEMP, NTC resistor, is located on an engine board.The battery voltage, temperature, size and current are measured by the UEMEK controlled by the charging software running in the UPP.The charging control circuitry (CHACON) inside the UEMEK controls the charging current delivered from the charger to the battery. The battery voltage rise is limited by turning the UEMEK switch off when the battery voltage has reached 4.2 V. Charging current is monitored by measuring the voltage drop across a 220 mΩ resistor.4.3 Power distributionUnder normal conditions, the battery powers the Baseband module. Individual regulators located within the UEMEK regulate the battery voltage VBAT. These regulators supply the different parts of the phone. 8 regulators are dedicated to the RF module and 6 to the Baseband module.The VSIM regulator is able to deliver both 1,8V and 3,0 V DC and thus supporting two different SIM technologies.The regulator VCORE is likewise adjustable by the MCU. VCORE supplies the core logic of the UPP.The system connector provides a voltage to supply accessories.The white LEDs need a higher voltage supply than the battery can supply and are fed by a separate external voltage regulator.VBAT is directly distributed to the RF power amplifier, audio power amplifier and external Baseband regulators.。

compKPNS

compKPNS

Virtuoso® Schematic Editor Known Problems and SolutionsProduct Version 5.1.41December 20051990-2005 Cadence Design Systems, Inc. All rights reserved.Printed in the United States of America.Cadence Design Systems, Inc., 555 River Oaks Parkway, San Jose, CA 95134, USATrademarks:Trademarks and service marks of Cadence Design Systems, Inc. (Cadence) contained in this document are attributed to Cadence with the appropriate symbol.For queries regarding Cadence’s trademarks, contact the corporate legal department at the address shown above or call 1-800-862-4522.All other trademarks are the property of their respective holders.Restricted Print Permission:This publication is protected by copyright and any unauthorized use of this publication may violate copyright,trademark,and other laws.Except as specified in this permission statement, this publication may not be copied, reproduced, modified, published, uploaded, posted, transmitted, or distributed in any way,without prior written permission from Cadence.This statement grants you permission to print one (1) hard copy of this publication subject to the following conditions:1.The publication may be used solely for personal, informational, and noncommercial purposes;2.The publication may not be modified in any way;3.Any copy of the publication or portion thereof must include all original copyright, trademark, and otherproprietary notices and this permission statement; and4.Cadence reserves the right to revoke this authorization at any time, and any such use shall bediscontinued immediately upon written notice from Cadence.Disclaimer: Information in this publication is subject to change without notice and does not represent a commitment on the part of Cadence. The information contained herein is the proprietary and confidential information of Cadence or its licensors,and is supplied subject to,and may be used only by Cadence’s customer in accordance with, a written agreement between Cadence and its customer. Except as may be explicitly set forth in such agreement, Cadence does not make, and expressly disclaims, any representations or warranties as to the completeness, accuracy or usefulness of the information contained in this document. Cadence does not warrant that use of such information will not infringe any third party rights, nor does Cadence assume any liability for damages or costs of any kind that may result from use of such information.Restricted Rights:Use,duplication,or disclosure by the Government is subject to restrictions as set forth in FAR52.227-14 and DFAR252.227-7013 et seq. or its successor.ContentsVirtuoso Schematic Editor Known Problems and Solutions. .5 PCR 784954: Problem creating netSet property on instance with terminal as inherited connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 PCR 781085: Cannot access Edit menu commands (client software license problems) 6PCR 773356: Schematic route flight shorts nets . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 PCR 763396: Instance renumbering overflows when numeric entry >=2e10 . . . . . . .7 PCR 757323: ICMS and ICFB -V and -W indicate incorrectly built binaries . . . . . . . .8 PCR742904:Schematic check and save gives warning about an invalid Verilog identifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 PCR 740262: Add Simulation Monitor not working with OpenAccess. . . . . . . . . . . . .9Virtuoso Schematic Editor Known Problems and SolutionsProduct Version 5.1.41Updated: December 2004 5.1.41USR1Updated: July 2005 5.1.41USR2Updated: December 2005 5.1.41USR3This Known Problems and Solutions document describes important Product Change Requests (PCRs) for the Virtuoso® Schematic Editor and tells you how to solve or work around these problems. For information about PCRs that are fixed for this release, see the What’s New In Virtuoso Schematic Editor in 5.1.41.Important: Only the problems and solutions that were known at release time are available in this document. An up-to-date list of known problems for the schematic editor is published on the SourceLink®online customer support system.PCR 784954: Problem creating netSet property on instance with terminal as inherited connectionDescription:There is a current limitation with inherited connections where iterated instances, for example x<0:3>, cannot be used as intended.This is because of a limitation in the CDBA and OpenAccess2.0databases,in that there are no placeholders to store property information on a per-bit instance basis.Although you can have netSet on an iterated instance,care must be taken as it will overwrite ALL bits identically.Note:This impacts all DFII applications, and is not exclusive to inherited connections. The issue originates from the limitation of not being able to have bitInstance property values. Solution:The workaround is to create multiple instances,for example,x<0>,x<1>,x<2>, and x<3> rather than a single iterated instance named, in this case,x<0:3>.PCR781085:Cannot access Edit menu commands(client software license problems)Description:Due to changes in the client license server software,introduced in the IC 5.1.41USR1 release,you may encounter problems accessing certain schematic editor functionality, such as the Edit menu options.Previously,all IC releases used the same client software,Softshare7.2,however from IC5.1.41USR1, the client version was updated to 10.1.3.Note:The new client software will be used in all 1H2005 base releases.Solution:If you are using products from multiple release streams,you must ensure that the latest client license (10.1.x) is being used.All IC5.1.41USR1, and beyond, applications require a 10.1.x license server, as they will not fully function with older license servers. Whereas license servers are backward compatible, working with older clients, a new client does not operate correctly with older servers.PCR 773356: Schematic route flight shorts netsDescription:There can be a problem with the schematic router where shorts are created between nets when the route flight line command is used.Solution:As a workaround, you should perform the following:1.Define a SKILL procedure as follows:procedure( CCSrouteFlightLines()let((cv f_lines)cv = geGetEditCellView()f_lines = setof(x cv~>shapes x~>lpp == list("wire" "flight"))foreach(line f_linesgeSelectFig(line)schHiRouteFlightLine())t))2.Call this newly created function,for the cellview in question,and it will perform the routingof all flight lines, one by one.PCR763396:Instance renumbering overflows when numeric entry>=2e10 Description:If you attempt to enter a number>=2e10in the“Start resulting sequence with index” field, of the Renumber Instances form (first select Design – Renumber Instances), the schematic editor will encounter problems due to a numeric overflow.This overflow causes further numeric entries in the index field to no longer be accepted, and for the schematic editor to continue to display solely on those components of the resultant overflow.Solution:This problem occurs because the renumber instances command uses signed, rather than unsigned, integers when generating the index.The field entry limit here is (2^31 - 1).A negative number can also be entered in the “Start resulting sequence index” field, and this will cause instances to be renumbered as appropriate. Note however, that instances with negative indices will not be renamed by subsequent applications of renumber instances.PCR 757323: ICMS and ICFB -V and -W indicate incorrectly built binaries Description:The Linux 3.0 platform causes error messages when using the-V and-W options with icms and icfb (the icde,layout and layoutPlus executables do not display this problem).For example:icms -WIncorrectly built binary which accesses errno or h_errno directly. Needs to be fixed. sub-version 5.10.41_USR1.7.39icms -VIncorrectly built binary which accesses errno or h_errno directly. Needs to be fixed.@(#)$CDS: icms.exe version 5.1.0 11/07/2004 23:07 () $ Note:This issue is not specific to the schematic editor,but is rather a general problem with the DFII workbenches.Solution:To workaround this you should set the following variable:PCR 742904: Schematic check and save gives warning about an invalid Verilog identifierRelated PCR: 756222Description:If you activate the Verilog HDL Syntax rule option(in the Name tab of the Setup Schematic Rules Checks form, under Check – Rules Setup), and perform a check on an explicit pin inherited connections schematic, you may get an unexpected warning message related to a signal name not being a valid Verilog identifier. For example:Signal name “VSS!” is not a valid Verilog identifierThe problem here is with the “!” character suffix, as it is not part of the string name, but is, instead,part of the inherited connections identification.The warning is displayed because the “!” character is an illegal character in the Verilog name space.Solution:Although potentially confusing, you can safely ignore the warning message regarding the invalid identifier. This problem will be rectified in a future release.PCR 740262: Add Simulation Monitor not working with OpenAccess Description:Add simulation monitor functionality is not operating correctly with OpenAccess in the schematic editor.For example, if you select a schematic instance, then chose Check – Schematic Monitors – Add, to display the Add Simulation Monitor form, then click on the Auto Placement option, the CIW will display a list of warning messages similar to the following:\a schSimProbeAddForm->probeFormat->value="<name>=<time>:<state>""<name>=<time>:<state>"\w *WARNING* dbCreateInstWithPurpose: creating instances with purposes other than "cell" or "pin" is not supported.\w *WARNING* dbCreateInstWithPurpose: creating instances with purposes other than "cell" or "pin" is not supported.....Note:There are also similar problems when adding schematic monitors manually. Solution:For information only.。

VDS2100 2200 Installation Manual

VDS2100 2200 Installation Manual
2. If you cannot see the picture in the Viewer side (e.g. a monitor), check if the camera is working well.
3. If you cannot hear the sound in the Viewer side (e.g. a monitor or a speaker), check if the microphone is working well.

041ab, Jan. 2005
VDS2100/2200 Installation Manual
Introduction
VDS2100/2200 is a transmission system for transmitting video, audio signals and DC power through one coaxial cable. The Sender unit and the Viewer unit can send signals and 12VDC camera power for 500 meters. If a camera is powered at the remote end, without DC power supplying from the Viewer, the transmission distance of the system can be over 500 meters.
VDS 2100/2200 Installation Manual
Contents
Introduction .........................................................2 Features .............................................................2 Packing Checklist....................................................2 The Connection Layout of VDS2100/2200 ...............................2 Certificate ..........................................................2 Patents ..............................................................2 Limited Warranty .....................................................2 Functions of Remote Unit(VDS 2100 Sender-V) .........................3 Specification of VDS 2100 Sender-V ..................................3 Functions of Local Unit(VDS 2200 Viewer) ............................4 Specification of VDS 2200 Viewer ....................................4 Making Connections...................................................5 Installation Notice..................................................5 Connecting the Sender unit ..........................................6 Connecting the Viewer unit ..........................................6 Reference data for coaxial cable used ...............................7 Trouble Shooting .....................................................8 Connector Adaptors...................................................8

SingNet eVolve Business Fibre Broadband 故障排查指南说明书

SingNet eVolve Business Fibre Broadband 故障排查指南说明书

Troubleshooting Guide for SingNet eVolve Business Fibre BroadbandIdentify your issue and follow this step-by-step guide to troubleshootyour SingNet eVolve Business Fibre Broadband.Your fibre broadband set up consists of:Your Optical Network Terminal (ONT) and/or Wireless Router might differ from the images shown due to the use of different models. Please refer to the guide from page 5 onwards for instructions on how to troubleshoot the specific model of your hardware.Please refer to the following set up guide to check if your ONT/ONR and wireless router are connected correctly. You can refer to page 4 for a troubleshooting infographic to help you resolve set up issues.1Unplug the green plastic cover from port 1 on the Fibre Termination Point (FTP).Note: The FTP can be commonly found near your Optical Network Terminal (ONT) or Optical Network Router (ONR).2Remove both green caps from the fibre optic cable. Do not touch the tip of the cable as dust and fingerprints may cause interference with the connection and affect your internet speed.Note: A fibre optic cable is made of glass – do not stretch, tie or bend sharply.3Connect the fibre optic cable from port 1 of the FTP to the Passive Optical Network (PON) port located at the back of the ONT or ONR. Ensure that the cables are firmly plugged into the ports. Depending on the model of your ONT/ONR,the port may be located on the back or under the device.4Connect the ONT/ONR to a power source and switch it on. Wait for the Power and PON lights to turn green. If your ONT Power and PON lights are blinking or red, please refer to page 7 for an explanation of what the lights represent based on your specific device model.Note: If the PON light continues to flicker/blink after 2 minutes, switch off the ONT and repeat steps 1 to 3. Ensure that the fibre cable is firmly plugged into the ports on the FTP and the ONT.5Use an RJ45 Ethernet cable to connect LAN 1 port on the ONT/ONR to the Internet / Ethernet / WAN port of the Wireless Router.6Connect your Wireless Router to a power source and switch it on. Wait for Power and Internet lights to turn green. Do refer to page 13 onwards for an explanation of what the status lights represent based on your specific router model. If you need to reboot, please follow the instructions provided for your router model.You may also refer to the following illustration to troubleshoot your network:Connecting to Wireless/WiFi NetworkWindows 8Step 1 Bring up the Charms Bar by moving your mouse cursor to the lower right corner of the screen.Step 2 Click on Settings > Network icon.Step 3 A list of available networks will be displayed. Locate and select your wireless network (e.g. SINGTEL(5G)-8992), the name of your wireless network can be found on your router.•Ensure that the Airplane Mode is Off.•Tick the “Connect automatically” box and you will not need to re-enter the network security key during your next connection to the same wireless network.•Click on the Connect button to initiate login.Step 4 Enter your network security key and click on the Next button. You can find the default network security key on your Singtel modem or wireless router.Step 5 If you are prompted to turn on sharing, choose "Yes, turn on sharing and connect to devices".Step 6 Once the wireless network is successfully connected, the bars of the Wireless Network icon will be lit according to the network strength. A full bar indicates a strong signal.Windows 10Step 1 Click the Start button and click Settings from the Start menu.Step 2 Click the Settings app’s Network & Internet icon, which opens to show your available wireless networks.Step 3 Choose to connect to the desired network by clicking its name and clicking the Connect button (e.g. SINGTEL(5G)-8992). The name of your wireless network can be found on your router. Ensure that the Airplane Mode is Off.Step 4 Enter a password if needed. If you try to connect to a security-enabled wireless connection, Windows will prompt you to enter a network security key. Your network security key can be found on your modem or wireless router.Step 5 Choose whether you want to share your files with other people on the network. If you’re connecting on your own home or office network, choose “Yes, turn on sharing and connect to devices.” That lets you share files with others and connect to shared devices, such as printers.Step 6 Once the wireless network is successfully connected, the bars of the Wireless Network icon will be lit according to the network strength. A full bar indicates a strong signal.Optical Network Terminal (ONT) Model GuidePlease follow the guide according to the model of your ONT. To reboot your ONT, simply unplug and plug the power adapter connected to your ONT hardware.Current available models:ModelModel NamePageEricsson T0635ALU I-240G-D6ALU C-240C 7Huawei GPON ONR HG8244H8ZTE F620G9Ericsson T063:LED NameStatus DescriptionPower / AlarmGreen DC Power is available to the ONT. AmberError Condition / Alarm ConditionNote:LED will be amber during ONT boot up. Amber LED will be cleared upon completion of boot up sequence. LED will also be amber during software upgrade operation. Amber LED will be cleared upon ONT reboot post software upgrade process.Off There is no DC power at the ONT.If power is provided, but this state persists:• Ensure that the power cable connector is correctly seated inthe ONT power output• Verify that the power supply adapter is plugged into a live ACoutlet or UPSPONGreen GPON handshake complete and OMCI link to the OLT is established. Flashing The OMCI link is being established. Off No OMCI link established or OMCI link setup in progress. This isnormal at boot-up and can take up to two minutes to turn green. If this state persists, contact 1606, choose option 2, 3, 2.LAN Green LAN port connectivity established on any of the 4 ports. IndividualLAN port activity LED resides on RJ45 socket at rear of ONT.Off No LAN port connectivity detected on all LAN ports. Phone 1-2Green Voice phone line 1 is on-hook. Off Voice phone line 1 is on-hook.ALU I-240G-D:LED Name Status DescriptionPowerGreen Operating on AC power. Flashing Operating on battery power. Off ONT power is off.OPTICAL / PONGreen Optical module normal; synchronized.Flashing PON optical port synchronization.Off PON optical port is not synchronized.Red Optical module power or signal loss. Please contact 1606.LANGreen ONT local RJ-45 Ethernet interface connection is established. Flashing Ethernet data link transceiver.Off Ethernet interface is not connected.UPDATERed Upgrade failed. Please contact 1606.Flashing UpgradingOff No LAN port connectivity detected on all LAN ports.ALM Green Local access.Off Normal state.Red Hardware exceptions. Please contact 1606.POTSGreen Off hook.Flashing Off hook for more than one hour. Off On hook.ALU C-240C:LED NameStatus DescriptionPowerGreen Operating on AC power. Flashing Operating on battery power. Off ONT power is off.OPTICAL / PONGreen Optical module normal; synchronized. Flashing PON optical port synchronization. Off PON optical port is not synchronized.Red Optical module power or signal loss. Please contact 1606. LANGreen ONT local RJ-45 Ethernet interface connection is established. Flashing Ethernet data link transceiver.Off Ethernet interface is not connected. UPDATERed Upgrade failed. Please contact 1606. Flashing UpgradingOff No LAN port connectivity detected on all LAN ports. ALMGreen Local access. Off Normal state.Red Hardware exceptions. Please contact 1606. POTSGreen Off hook.Flashing Off hook for more than one hour. OffOn hook.Huawei GPON ONR HG8244H:LED NameStatus DescriptionPOWERGreen The ONR is powered on.Off The power supply is cut off.Blinking Red Hardware self-check failed or failed to start. Blinking Red twicethen Stable GreenUploading firmware.PONGreen Fibre connection is up.Off Fibre connection is down.Blinking Fibre connection set up in progress.RedOptical signals are abnormal, please reconnect the fibreport. Contact service provider if the problem is notresolved. Please contact 1606.TEL 1 – TEL 2Green Corresponding voice service is up.Blinking Voice service is up and the phone is off-hook or ringing. Off Voice service is down or not available.LAN 1 – LAN 4Green Ethernet connection is in normal state. Blinking Data is being transmitted on the Ethernet port. Off Ethernet connection is not set up.USBGreenUSB port is connected and is working in the host mode,but no data is transmitted.Blinking Data is being transmitted on USB port.Off USB port is not connected.INTERNETGreen Internet service is OK. Blinking Internet data is being transmitted. Off Internet service is down.IPTVGreen IPTV WAN IP address and STB detected OK. BlinkingNo IP address obtained in IPTV interface and STBdetected OK.Off No STB detected.ZTE F620G:LED Name Status DescriptionPower Green The ONT power is on. Off The ONT power is off.PON Green The ONT is registered successfully.Blink The ONT is in the process of registration.Off The ONT failed to be registered or the system is not on.LOS Red The ONT is receiving optical signals abnormally. Please contact 1606. Off The ONT is receiving signals normally.ALARM Red The ONT is inactive or in fault. Please contact 1606. Blink Software download/upgrade in progress.Off The ONT is in normal operation.LAN 1 - 4 Green The network interface is connected but no data is transmitted. Blink Data is being transmitted or received.Off The device is not powered ON or data cable is not connected.Phone 1-2x Green The device is registered on the SS but no data is transmitted. Blink Data is transmitted.Off The device is not powered ON or fails to register on SoftSwitch.Singtel Wireless Router Model GuidePlease follow the guide according to the model of your wireless router.Current available models:ModelModel NamePageAztech DSL8900GR(AC) 9Arcadyan Router AC2800 10Arcadyan Mesh Router12Aztech DSL8900GR(AC):Back Panel Ports & Button• Power• Ethernet LAN Ports 1 to 4 • 5GHz • 2.4GHz • USB• Broadband (ADSL and Ethernet WAN) • Internet• WPS Indicator and Button• USB 1 • USB 2• Ethernet LAN Ports 1 to 4 • Ethernet WAN Port • ADSL Port • Reset Button• Power Adapter JackArcadyan Router AC2800: LED Name Status DescriptionPower Green Router is receiving power.Red System failure. Please contact 1606. OffPower off.Internet Green WAN connection is functioning correctly. Red Internet connection failure.Amber 4GPP service has been detected and in use. Red No Internet link. Please contact 1606.IPTV Green Set-Top Box connection has been established. Red No link. Please contact 1606.LAN (1 – 4)Green Ethernet connection has been established. Flashing The indicated LAN port is sending or receiving data. Off No LAN connection on the port.USBGreen USB connection has been established.Flashing The indicated USB port is sending or receving data. Off No USB connection on the port.2.4GHzGreen 2.4GHz Wireless link has been established. Flashing Data is being transmitted via wireless network. Off No wireless link.5GHzGreen 5GHz Wireless link has been established. Flashing Data is being transmitted via wireless network. Off No wireless link.WPS (Wi-Fi Protected Setup) Green WPS link has been successfully established. Off The WPS is disabled.Items DescriptionWPS Button Press this button for at least 6 seconds when activating the WPS function.LED Button Use this button to enable/disable the LED indicator light.USB Port Connect your USB (storage or mobile dongle) device to the USB port.The router also supports the following ports and one reset button on the rear panel:ItemsDescriptionLAN Ports Gigabit Ethernet ports (RJ-45). Connect devices on your local area network to these ports (i.e., a PC, hub, or switch).Internet (WAN) PortGigabit Ethernet port (RJ-45). Connect your Ethernet PPPoA/PPPoE link to this port.Reset Button Use this button to reset the Router and restore the default factory settings. To reset without losing configuration settings, refer to the Reboot settings below.Power Inlet Connect the included power adapter to this inlet. Using the wrong type of power adapter may cause damage.To reboot:StepsDescriptionStep 1Press the Reboot button to refresh the Router.Step 2 Click OK to reboot the device. Step 3 The reboot will be complete when the screen prompts for login.Note: If you use the reset button on the back panel, the Router performs a power reset. If the button is pressed for over 6 seconds, the factory default settings will be restored. Please ensure that you have noted down your previous settings before resetting the router.Arcadyan Mesh Router: LED Name Status DescriptionPowerWhite System is powered. Flashing FW is being upgraded.Red System fail. Please contact 1606.InternetWhiteInternet service is on.FlashingGetting IP address or No IP address. Off No WAN Ethernet connected.LAN White One of the Ethernet LAN cable is linked. Off No Ethernet LAN cable is linked.MeshWhite Mesh connected – Good.Flashing Mesh is being paired.Red Mesh connected – Bad. Please contact 1606. Off No Mesh paired.Steps DescriptionStep 1 Plug the power adapter into the power socket on the rear of the Router, and the other end into a power outlet.Step 2 Use RJ-45 cable to connect from port 1 of the ONT device and the other end to the ETHERNET or INTERNET WAN port (depending on your Router model).Step 3 Use RJ-45 cables toconnect any of the four LAN ports on the Router and an Ethernet adapter on your PC.Step 4 If needed, you can use a 4G dongle to plug in the USB port.。

Trouble shooting - displays

Trouble shooting - displays
• The display file xxx was not found
• CauБайду номын сангаасe:
– The display filename was incorrectly typed – The display cannot be located in the Station or server display paths
Display calls up with scripting error
• Problem:
– An error dialog appears similar to:
• Cause:
– Normally a mismatch between the displays on the server and those on the client
• To Resolve:
– Update your script to use the new methods by consulting the online documentation.
• Common examples:
– .visible – .group .style.visibility (=“hidden”, “inherit” or “visible”) .all or .children
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MT9094资料

MT9094资料

7-45®Features•Programmable µ-Law /A -Law codec and filters •Programmable CCITT (G.711)/sign-magnitude coding•Programmable transmit, receive and side-tone gains•DSP-based:i)Speakerphone switching algorithm ii)DTMF and single tone generator iii)Tone Ringer•Differential interface to telephony transducers •Differential audio paths •Single 5 volt power supplyApplications•Fully featured digital telephone sets •Cellular phone sets•Local area communications stationsDescriptionThe MT9094 DPhone-II is a fully featured integrated digital telephone circuit. Voice band signals are converted to digital PCM and vice versa by a switched capacitor Filter/Codec. The Filter/Codec uses an ingenious differential architecture to achieve low noise operation over a wide dynamic range with a single 5V supply. A Digital Signal Processor provides handsfree speaker-phone operation. The DSP is also used to generate tones (DTMF , Ringer and Call Progress) and control audio gains. Internal registers are accessed through a serial microport conforming to INTEL MCS-51™ specifications. The device is fabricated in Mitel's low power ISO 2-CMOS technology.Figure 1 Functional Block DiagramDigital Signal ProcessorFilter/Codec Gain DSTo DSTi F0i C4i VSSD VDD VSSA VSS SPKR VBias VRefS1S12BP WD PWRST ICCSSCLK DATA 1DATA 2SPKR-SPKR+HSPKR-HSPKR+M+M-MIC+MIC-Transducer Interface22.5/-72dB ∆1.5dB Tx & RxENCODER 7dB DECODER-7dBC-Channel RegistersControl RegistersTiming CircuitsLCD DriverNew Call Tone Generator S/P &P/S ConverterSerial Port (MCS-51Compatible)STATUS ISSUE 2May 1995MT9094Digital Telephone (DPhone-II)ISO 2-CMOS ST -BUS ™ FAMIL Y Ordering Information MT9094AP44 Pin PLCC-40°C to +85°CMT90947-46Figure 2 - Pin ConnectionsPin DescriptionPin #Name Description1M+Non-Inverting Microphone (Input).Non-inverting input to microphone amplifier from the handset microphone.2NC No Connect. No internal connection to this pin.3V Bias Bias Voltage (Output). (V DD /2) volts is available at this pin for biasing external amplifiers.Connect 0.1µF capacitor to V SSA .4V Ref Reference voltage for codec (Output). Nominally [(V DD /2)-1.5] volts. Used internally.Connect 0.1µF capacitor to V SSA .5ICInternal Connection.Tie externally to V SS for normal operation.6PWRST Power-up Reset (Input). CMOS compatible input with Schmitt Trigger (active low).7DSTi ST-BUS Serial Stream (Input).2048 kbit/s input stream composed of 32 eight bit channels;the first four of which are used by the MT9094. Input level is TTL compatible.8DSToST-BUS Serial Stream (Output).2048 kbit/s output stream composed of 32 eight bitchannels. The MT9094 sources digital signals during the appropriate channel, time coincident with the channels used for DSTi.9C4i 4096 kHz Clock (Input). CMOS level compatible.10F0i Frame Pulse (Input). CMOS level compatible. This input is the frame synchronization pulse for the 2048 kbit/s ST -BUS stream.11V SSD Digital Ground. Nominally 0 volts.12NC No Connect. No internal connection to this pin.13SCLKSerial Port Synchronous Clock (Input). Data clock for MCS-51 compatible microport. TTL level compatible.1654324443424140789101112131415163938373635343332313023181920212224252627281729P W R S T I C V B i a s V R e f N C M -V S S A M I C +M I C -M +DSTi DSTo C4i F0i VSSD NC SCLK DATA 2DATA 1CS WDSPKR+SPKR-HSPKR+HSPKR-VDD BP S12S11S10S9S8I C N C N C V S S D S 1S 3S 4S 5S 6S 7S 244 PIN PLCCV S S S P K RMT90947-47NOTES:Intel and MCS-51 are registered trademarks of Intel Corporation, Santa Clara, CA, USA.14DATA 2Serial Data Transmit.In an alternate mode of operation, this pin is used for data transmit fromMT9094. In the default mode, serial data transmit and receive are performed on the DATA 1 pin and DATA 2 is tri-stated.15DATA 1Bidirectional Serial Data.Port for microprocessor serial data transfer compatible withMCS-51 standard (default mode). In an alternate mode of operation , this pin becomes the data receive pin only and data transmit is performed on the DATA 2 pin. Input level TTL compatible.16CS Chip Select (Input). This input signal is used to select the device for microport data transfers.Active low. (TTL level compatible.)17WD Watchdog (Output). Watchdog timer output. Active high.18IC Internal Connection.Tie externally to V SS for normal operation.19,20NC No Connection.No internal connection to these pins.21V SSDDigital Ground. Nominally 0 volts.22-33S1-S12Segment Drivers (Output).12 independently controlled, two level, LCD segment drivers. Anin-phase signal, with respect to the BP pin, produces a non-energized LCD segment. An out-of-phase signal, with respect to the BP pin, energizes its respective LCD segment.34BP Backplane Drive (Output). A two-level output voltage for biasing an LCD backplane.35V DDPositive Power Supply (Input). Nominally 5 volts.36HSPKR-Inverting Handset Speaker (Output). Output to the handset speaker (balanced).37HSPKR+Non-Inverting Handset Speaker (Output). Output to the handset speaker (balanced).38SPKR-Inverting Speaker (Output).Output to the speakerphone speaker (balanced).39SPKR+Non-Inverting Speaker (Output). Output to the speakerphone speaker (balanced).40V SS SPKR Power Supply Rail for Analog Output Drivers.Nominally 0 Volts.41MIC-Inverting Handsfree Microphone (Input).Handsfree microphone amplifier inverting inputpin.42MIC+Non-inverting Handsfree Microphone (Input).Handsfree microphone amplifiernon-inverting input pin.43V SSA Analog Ground.Nominally 0 V .44M-Inverting Microphone (Input). Inverting input to microphone amplifier from the handset microphone.Pin Description (continued)Pin #NameDescriptionMT90947-48OverviewThe Functional Block Diagram of Figure 1 depicts the main operations performed within the DPhone -II .Each of these functional blocks will be described in the sections to follow. This overview will describe some of the end-user features which may be implemented as a direct result of the level of integration found within the DPhone -II .The main feature required of a digital telephone is to convert the digital Pulse Code Modulated (PCM)information, being received by the telephone set, into an analog electrical signal. This signal is then applied to an appropriate audio transducer such that the information is finally converted into intelligible acoustic energy. The same is true of the reverse direction where acoustic energy is converted first into an electrical analog and then digitized (into PCM) before being transmitted from the set. Along the way if the signals can be manipulated, either in the analog or the digital domains, other features such as gain control, signal generation and filtering may be added. More complex processing of the digital signal is also possible and is limited only be the processing power available. One example of this processing power may be the inclusion of a complex handsfree switching algorithm. Finally, most electro-acoustic transducers (loudspeakers) require a large amount of power to develop an effective acoustic signal. The inclusion of audio amplifiers to provide this power is required.The DPhone -II features Digital Signal Processing (DSP) of the voice encoded PCM, complete Analog/Digital and Digital/Analog conversion of audio signals (Filter/CODEC) and an analog interface to the external world of electro-acoustic devices (Transducer Interface). These three functional blocks combine to provide a standard full-duplex telephone conversation utilizing a common handset. Selecting transducers for handsfree operation, as well as allowing the DSP to perform its handsfree switching algorithm, is all that is required to convert the full-duplex handset conversation into a half-duplex speakerphone conversation. In each of these modes,full programmability of the receive path and side-tone gains is available to set comfortable listening levels for the user as well as transmit path gain control for setting nominal transmit levels into the network.The ability to generate tones locally provides the designer with a familiar method of feedback to the telephone user as they proceed to set-up, and ultimately, dismantle a telephone conversation. Also,as the network slowly evolves from the dial pulse/DTMF methods to the D-Channel protocols it is essential that the older methods be available forbackward compatibility. As an example; once a call has been established, say from your office to your home, using the D-Channel signalling protocol it may be necessary to use in-band DTMF signalling to manipulate your personal answering machine in order to retrieve messages. Thus the locally generated tones must be of network quality and not just a reasonable facsimile. The DPhone -II DSP can generate the required tone pairs as well as single tones to accommodate any in-band signalling requirement.Each of the programmable parameters within the functional blocks is accessed through a serial microcontroller port compatible with Intel MCS-51specifications.Functional DescriptionIn this section, each functional block within the DPhone -II is described along with all of the associated control/status bits. Each time a control/status bit(s) is described it is followed by the address register where it will be found. The reader is referred to the section titled ‘Register Summary' for a complete listing of all address map registers, the control/status bits associated with each register and a definition of the function of each control/status bit.The Register Summary is useful for future reference of control/status bits without the need to locate them within the text of the functional descriptions.Filter-CODECThe Filter/CODEC block implements conversion of the analog 3.3kHz speech signals to/from the digital domain compatible with 64kb/s PCM B-Channels.Selection of companding curves and digital code assignment are register programmable. These are CCITT G.711 A-law or µ-Law, with true-sign/Alternate Digit Inversion or true-sign/Inverted Magnitude coding, respectively. Optionally, sign-magnitude coding may also be selected for proprietary applications.The Filter/CODEC block also implements transmit and receive audio path gains in the analog domain.These gains are in addition to the digital gain pad provided in the DSP section and provide an overall path gain resolution of 0.5dB. A programmable gain,voice side-tone path is also included to provide proportional transmit speech feedback to the handset receiver so that a dead sounding handset is not encountered. Figure 3 depicts the nominal half-channel and side-tone gains for the DPhone -II .MT90947-49On PWRST (pin 6) the Filter/CODEC defaults such that the side-tone path, dial tone filter and 400Hz transmit filter are off, all programmable gains are set to 0dB and µ-Law companding is selected. Further,the Filter/CODEC is powered down due to the PuFC bit (Transducer Control Register, address 0Eh) being reset. This bit must be set high to enable the Filter/CODEC.The internal architecture is fully differential to provide the best possible noise rejection as well as to allow a wide dynamic range from a single 5 volt supply design. This fully differential architecture is continued into the Transducer Interface section to provide full chip realization of these capabilites.A reference voltage (V Ref ), for the conversion requirements of the CODER section, and a bias voltage (V Bias ), for biasing the internal analog sections, are both generated on-chip. V Bias is also brought to an external pin so that it may be used for biasing any external gain plan setting amplifiers. A 0.1µF capacitor must be connected from V Bias to analog ground at all times. Likewise, although V Ref may only be used internally, a 0.1µF capacitor from the V Ref pin to ground is required at all times. It is suggested that the analog ground reference point for these two capacitors be physically the same point.To facilitate this the V Ref and V Bias pins are situated on adjacent pins.The transmit filter is designed to meet CCITT G.714specifications. The nominal gain for this filter path is 0dB (gain control = 0dB). An anti-aliasing filter isSERIAL PORTDSP GAIN*FILTER/CODECTRANSDUCER INTERFACEPCMPCM–72 to +22.5 dB (1.5dB steps)DTMF,Tone Ringer &Handsfree–72 to +22.5 dB (1.5dB steps)Receive Filter Gain 0 to –7 dB (1 dB steps)Side-tone –9.96 to +9.96dB (3.32 dB steps)Side-tone Nominal Gain Transmit Filter Gain 0 to +7dB (1 dB steps)µ-Law –11 dB Α-Law –18.8 dB-6 dBSpeaker Gain 0 to –24 dB (8 dB steps)Receiver DriverSpeaker Phone Driver 0.2dB*Tone Ringer (input from DSP)Transmit GainM U Xµ-Law –6.3 dB Α-Law –3.7 dB µ-Law 6.1dB Α-Law 15.4dBMIC+MIC–M+M–-6 dB HSPKR+HSPKR–SPKR+SPKR–Speakerphone Speaker (40Ω nominal)(32Ω min)Handsfree mic Transmitter microphoneHandset Receiver (150Ω)Transmit Internal to DeviceExternal to DeviceDIGITAL DOMAINANALOG DOMAIN7575Note: *gain the same for A-Law and m −LawReceiveFigure 3 - Audio Gain PartitioningMT90947-50included. This is a second order lowpass implementation with a corner frequency at 25kHz.Attenuation is better than 32dB at 256 kHz and less than 0.01dB within the passband.An optional 400Hz high-pass function may be included into the transmit path by enabling the Tfhp bit in the Transducer Control Register (address 0Eh).This option allows the reduction of transmitted background noise such as motor and fan noise.The receive filter is designed to meet CCITT G.714specifications. The nominal gain for this filter path is 0 dB (gain control = 0dB). Filter response is peaked to compensate for the sinx/x attenuation caused by the 8kHz sampling rate.The Rx filter function can be altered by enabling the DIAL EN control bit in the Transducer Control Register (address 0Eh). This causes another lowpass function to be added, with a 3dB point at 1000Hz. This function is intended to improve the sound quality of digitally generated dial tone received as PCM.Transmit sidetone is derived from the Tx filter and is subject to the gain control of the Tx filter section.Sidetone is summed into the receive path after the Rx filter gain control section so that Rx gain adjustment will not affect sidetone levels. The side-tone path may be enabled/disabled with the SIDE EN bit located in the Transducer Control Register (address 0Eh). See also STG 0-STG 2(address 0Bh).Transmit and receive filter gains are controlled by the TxFG 0-TxFG 2 and RxFG 0-RxFG 2 control bits respectively. These are located in the FCODEC Gain Control Register 1 (address 0Ah). Transmit filter gain is adjustable from 0dB to +7dB and receive filter gain from 0dB to -7dB, both in 1dB increments.Side-tone filter gain is controlled by the STG 0-STG 2control bits located in the FCODEC Gain Control Register 2 (address 0Bh). Side-tone gain is adjustable from -9.96dB to +9.96dB in 3.32dB increments.Law selection for the Filter/CODEC is provided by the A/µ companding control bit while the coding scheme is controlled by the sign-mag/CCITT bit.Both of these reside in the General Control Register (address 0Fh).Digital Signal ProcessorThe DSP block is located, functionally, between the serial ST -BUS port and the Filter/CODEC block. Itsmain purpose is to provide both a digital gain control and a half-duplex handsfree switching function. The DSP will also generate the digital patterns required to produce standard DTMF signalling tones as well as single tones and a tone ringer output. A programmable (ON/OFF) offset null routine may also be performed on the transmit PCM data stream. The DSP can generate a ringer tone to be applied to the speakerphone speaker during normal handset operation so that the existing call is not interrupted.The main functional control of the DSP is through two hardware registers which are accessible at any time via the microport. These are the Receive Gain Control Register at address 1Dh and the DSP Control Register at address 1Eh. In addition, other functional control is accomplished via multiple RAM-based registers which are accessible only while the DSP is held in a reset state. This is accomplished with the DRESET bit of the DSP Control Register. Ram-based registers are used to store transmit gain levels (20h for transmit PCM and 21h for transmit DTMF levels), the coefficients for tone and ringer generation (addresses 23h and 24h),and tone ringer warble rates (address 26h). All undefined addresses below 20h are reserved for the temporary storage of interim variables calculated during the execution of the DSP algorithms. These undefined addresses should not be written to via the microprocessor port. The DSP can be programmed to execute the following micro-programs which are stored in instruction ROM, (see PS0 to PS2, DSP Control Register, address 1Eh). All program execution begins at the frame pulse boundary.PS2 PS1 PS0Micro-program000Power up reset program1Transmit and receive gain control program; with autonulling of the transmit PCM, if the AUTO bit is set (see address 1Dh)010DTMF generation plus transmit and receive gain control program (autonull available via the AUTO control bit)011Tone ringer plus transmit and receive gain control program (autonull available via the AUTO control bit)100handsfree switching program101110Last three selections reserved111MT90947-51Note: For the DSP to function it must be selected tooperate, in conjunction with the Filter/Codec, in one of the B-Channels. Therefore, one of the B-Channel enable bits must be set (see Timing Control, address 15h : bits CH 2EN and CH 3EN).Power Up reset ProgramA hardware power-up reset (pin 6,PWRST) will initialize the DSP hardware registers to the default values (all zeros) and will reset the DSP program counter. The DSP will then be disabled and the PCM streams will pass transparently through the DSP . The RAM-based registers are not reset by the PWRST pin but may be initialized to their default settings by programming the DSP to execute the power up reset program. None of the micro-programs actually require the execution of the power up reset program but it is useful for pre-setting the variables to a known condition. Note that the reset program requires one full frame (125µSec) for execution.Gain Control ProgramGain control is performed on converted linear code for both the receive and the transmit PCM. Receive gain control is set via the hardware register at address 1Dh (see bits B0 - B5) and may be changed at any time. Gain in 1.5dB increments is available within a range of +22.5dB to -72dB. Normal operation usually requires no more than a +20 to -20dB range of control. However, the handsfree switching algorithm requires a large attenuation depth to maintain stability in worst case environments, hence the large (-72 dB) negative limit. Transmit gain control is divided into two RAM registers, one for setting the network level of transmit speech (address 20h) and the other for setting the transmit level of DTMF tones into the network (address 21h). Both registers provide gain control in 1.5dB increments and are encoded in the same manner as the receive gain control register (see address 1Dh, bits B0 - B5). The power up reset program sets the default values such that the receive gain is set to -72.0 dB, the transmit audio gain is set to 0.0dB and the transmit DTMF gain is set to -3.0dB (equivalent to a DTMF output level of -4dBm0 into the network).Optional Offset NullingTransmit PCM may contain residual offset in the form of a DC component. An offset of up to ±fifteen linear bits is acceptable with no degradation of the parameters defined in CCITT G.714. The DPhone -II filter/CODEC guarantees no more than ±ten linear bits of offset in the transmit PCM when the autonullroutine is not enabled. By enabling autonulling (see AUTO in the Receive Gain Control Register, address 1Dh) offsets are reduced to within ±one bit of zero.Autonulling circuitry was essential in the first generations of Filter/Codecs to remove the large DC offsets found in the linear technology. Newer technology has made nulling circuitry optional as offered in the DPhone -II .DTMF and Gain Control ProgramThe DTMF program generates a dual cosine wave pattern which may be routed into the receive path as comfort tones or into the transmit path as network signalling. In both cases, the digitally generated signal will undergo gain adjustment as programmed into the Receive Gain Control and the Transmit DTMF Gain Control registers. The composite signal output level in both directions is -4dBm0 when the gain controls are set to 2Eh (-3.0 dB). Adjustments to these levels may be made by altering the settings of the gain control registers. Pre-twist of 2.0dB is incorporated into the composite signal. The frequency of the low group tone is programmed by writing an 8-bit coefficient into Tone Coefficient Register 1 (address 23h), while the high group tone frequency uses the 8-bit coefficient programmed into Tone Coefficient Register 2 (address 24h). Both coefficients are determined by the following equation:COEFF = 0.128 x Frequency (in Hz)where COEFF is a rounded off 8 bit binary integer A single frequency tone may be generated instead of a dual tone by programming the coefficient at address 23h to a value of zero. In this case thefrequency of the single output tone is governed by the coefficient stored at address 24h.Table 1DTMF Signal to distortion:The sum of harmonic and noise power in the frequency band from 50Hz to 3500Hz is typically more than 30dB below the power in the tone pair. All individual harmonics are typically more than 40dB below the level of the low group tone.Frequency(Hz)COEFActual Frequency%Deviation69759h 695.3-.20%77063h 773.4+.40%8526Dh 851.6-.05%94179h 945.3+.46%12099Bh 1210.9+.20%1336ABh 1335.9.00%1477BDh 1476.6-.03%1633D1h1632.8-.01%MT90947-52Table 1 gives the standard DTMF frequencies, the coefficient required to generate the closest frequency, the actual frequency generated and the percent deviation of the generated tone from the nominal.Tone Ringer and Gain Control ProgramA locally generated alerting (ringing) signal is used to prompt the user when an incoming call must be answered. The DSP uses the values programmed into Tone Coefficient Registers 1 and 2 (addresses 23h and 24h) to generate two different squarewave frequencies in PCM code. The amplitude of the squarewave frequencies is set to a mid level before being sent to the receive gain control block. From there the PCM passes through the decoder and receive filter, replacing the normal receive PCM data,on its way to the loudspeaker driver. Both coefficients are determined by the following equation:COEFF = 8000/Frequency (Hz)where COEFF is a rounded off 8 bit binary integer The ringer program switches between these two frequencies at a rate defined by the 8-bit coefficient programmed into the Tone Ringer Warble Rate Register (address 26h). The warble rate is defined by the equation:Tone duration (warble frequencyin Hz) = 500/COEFFwhere 0 < COEFF < 256, a warble rate of 5-20Hz is suggested.An alternate method of generating ringer tones to the speakerphone speaker is available. With this method the normal receive speech path through the decoder and receive filter is uninterrupted to the handset,allowing an existing conversation to continue. The normal DSP and Filter/CODEC receive gain control is also retained by the speech path. When the OPT bit (DSP Control Register address 1Eh) is set high the DSP will generate the new call tone according to the coefficients programmed into registers 23h, 24h and 26h as before. In this mode the DSP output is no longer a PCM code but a toggling signal which is routed directly through the New Call Tone gain control section to the loudspeaker driver. Refer to the section titled ‘New Call Tone’.Handsfree ProgramA half-duplex speakerphone program, fully contained on chip, provides high quality gain switching of the transmit and receive speech PCM to maintain loop stability under most network and local acoustic environments. Gain switching is performed in continuous 1.5dB increments and operates in a complimentary fashion. That is, with the transmit path at maximum gain the receive path is fully attenuated and vice versa. This implies that there is a mid position where both transmit and receive paths are attenuated equally during transition. This is known as the idle state.Of the 64 possible attenuator states, the algorithm may rest in only one of three stable states; full receive, full transmit and idle. The maximum gain values for full transmit and full receive are programmable through the microport at addresses 20h and 1Dh respectively, as is done for normal handset operation. This allows the user to set the maximum volumes to which the algorithm will adhere. The algorithm determines which path should maintain control of the loop based upon the relative levels of the transmit and receive audio signals after the detection and removal of background noise energy. If the algorithm determines that neither the transmit or the receive path has valid speech energy then the idle state will be sought. The present state of the algorithm plus the result of the Tx vs. Rx decision will determine which transition the algorithm will take toward its next stable state. The time durations required to move from one stable state to the next are parameters defined in CCITT Recommendation P .34 and are used by default by this algorithm (i.e., build-up time, hang-over time and switching time).Quiet CodeThe DSP can be made to send quiet code to the decoder and receive filter path by setting the RxMUTE bit high. Likewise, the DSP will send quiet code in the transmit (DSTo) path when the TxMUTE bit is high. Both of these control bits reside in the DSP Control Register at address 1Eh. When either of these bits are low, their respective paths function normally.MT90947-53Transducer InterfacesFour standard telephony transducer interfaces are provided by the DPhone -II . These are:±The handset microphone inputs (transmitter),pins M+/M- and the speakerphone microphone inputs, pins MIC+/MIC-. The transmit path is muted/not-muted by the MIC EN control bit.Selection of which input pair is to be routed to the transmit filter amplifier is acomplished by the MIC/HNSTMIC control bit. Both of these reside in the Transducer Control Register (address 0Eh). The nominal transmit path gain may be adjusted to either 6.1dB (suggested for µ-Law)or 15.4dB (suggested for A-Law). Control of this gain is provided by the MICA/u control bit (General Control Register, address 0Fh). This gain adjustment is in addition to the programmable gain provided by the transmit filter and DSP .±The handset speaker outputs (receiver), pins HSPKR+/HSPKR-. This internally compensated, fully differential output driver is capable of driving the load shown in Figure 4.This output is enabled/disabled by the HSSPKR EN bit residing in the Transducer Control Register (address 0Eh). The nominal handset receive path gain may be adjusted to either -12.3dB (suggested for µ-Law) or - 9.7dB (suggested for A-Law). Control of this gain is provided by the RxA/u control bit (General Control Register, address 0Fh). This gain adjustment is in addition to the programmable gain provided by the receive filter and DSP .±The loudspeaker outputs, pins SPKR+/SPKR-.This internally compensated, fully differential output driver is capable of directly driving 6.5vpp into a 40 ohm load. This output is enabled/disabled by the SPKR EN bit residing in the Transducer Control Register (address 0Eh). The nominal gain for this amplifier is 0.2dB.C-ChannelAccess to the internal control and status registers of Mitel basic rate, layer 1, transceivers is through the ST -BUS Control Channel (C-Channel), since direct microport access is not usually provided, except in the case of the SNIC (MT8930). The DPhone -II provides asynchronous microport access to the ST -BUS C-Channel information on both DSTo and DSTi via a double-buffered read/write register (address 14h). Data written to this address is transmitted on the C-Channel every frame when enabled by CH 1EN (see ST -BUS/Timing Control).Figure 4 - Handset Speaker DriverLCDA twelve segment, non-multiplexed, LCD display controller is provided for easy implementation of various set status and call progress indicators. The twelve output pins (S n ) are used in conjunction with 12 segment control bits, located in LCD Segment Enable Registers 1&2 (addresses 12h and 13h), and the BackPlane output pin (BP) to control the on/off state of each segment individually.The BP pin drives a continuous 62.5Hz, 50% duty cycle squarewave output signal. An individual segment is controlled via the phase relationship of its segment driver output pin with respect to the backplane, or common, driver output. Each of the twelve Segment Enable bits corresponds to a segment output pin. The waveform at each segment pin is in-phase with the BP waveform when its control bit is set to logic zero (segment off) and is out-of-phase with the BP waveform when its control bit is set to a logic high (segment on). Refer to the LCD Driver Characteristics for pin loading information.MicroportA serial microport, compatible with Intel MCS-51(mode 0) specifications, provides access to all DPhone -II internal read and write registers. This microport consists of three pins; a half-duplex transmit/receive data pin (DATA1), a chip select pin (CS) and a synchronous data clock pin (SCLK).On power-up reset (PWRST) or with a software reset (RST), the DATA1 pin becomes a bidirectional (transmit/receive) serial port while the DATA2 pin is internally disconnected and tri-stated.HSPKR+HSPKR-75Ω75Ω1000 pF150 ohm load(speaker)1000 pFgroundMT9094。

Trouble_shooting

Trouble_shooting

Failure Message and Troubleshooting
Short Failure
Shorts fail message
Shorts Report for "shorts". Fri Jun 29 08:27:28 2001 bnj1_p2 ---------------------------------------Short #1, Thresh 8, Delay 50us Ohms From: _TXD 20905 4 ctp577.1 Two nodes fail ic3.1 ic11.13 To: _N_75779 204107 4 ctp332.1 ic11.12 Common Common Devices: Device ic11 Total of 2 nodes, Message is: None. ------End, 1 Problem Reported----------bnj1_p2 OEM_SN: 01Y906011240 Sorry, this CARD HAS FAILED ICT
Analog Failure
Analog fail message
---------------------------------------3070 Board bnk1 Thu Jun 07 16:56:18 2001 ---------------------------------------c209 HAS FAILED WP-90006L70 x-1.52 y2.87 B Measured: 31.665p Nominal: 27.000p High Limit: 31.066p Low Limit: 22.707p Capacitance in FARADS ---------------------------------------Failed r29 HAS FAILED high limit WP-92864L1 x-3.41 y5.32 B Measured: 750.79k Nominal: 866.00 High Limit: 942.90 Low Limit: 832.31 Resistance in OHMS ------------------------------------------------------------------------------3070 Board bnk1 Thu Jun 07 16:56:45 2001 ---------------------------------------OEM_SN: 01Y906020003 Sorry, this CARD HAS FAILED ICT

DB8 DB4 音频处理器简介说明书

DB8 DB4 音频处理器简介说明书

1Thank you for choosing DB8 or DB4 as your next step in audio. Even if the near future is analog we are convinced you have chosen wisely. Consistency in Loudness is the single most important audio issue to get right in broadcast today. DB8 and DB4 employ cutting edge technology to enable stations get rid of listener complaints about jumping levels, and to transmit in analog and digital with optimum processing for both feeds.The Difference Between DB8 and DB4DB8 contains four independent processors in one frame -DB4 holds two. Two or four processors is the onlydifference, and DB4 is even preset compatible with DB8.DB8 is designed for large broadcast centers, while DB4may be a more appropriate match for a regional station,but they share the same processing, the same presets and the same physical I/O structure - and even the sameprogram to control them. Many machines of both types can be controlled from one Icon program (included with this package), and they will identify themselves over a network,be it local or remotely located machines.Software and Manual for DB8 and DB4Software updates for both machines are always released simultaneously, and the two machines share the same manual. The relevat differences are highlighted. Instead of both names being printed throughout the manual, "DB8" is used as a generic term.PresetsDB8 and DB4 include a number of international standard presets ready for use. More presets are continuously made available in software updates, and from the TC web-site.Presets are based on information from broadcastersaround the world. Some are subtle, some aggressive, but they all provide outstanding audio resolution, never before available in a broadcast processor.Identify Your OpportunitiesIf your station is an early mover in digital and seeking to identify advantages, DB8 and DB4 will provide you with all the possibilities you need to experiment and find the right competitive angle. The processors can also adapt to your audience's changing needs, or audio strategy could even be changed from program to program.TC Electronic, Sindalsvej 34, DK-8240 Risskov *********************Introduction DB8/DB4 Rev 1.60English versionTechnical IntegritySynchronous 48kHz sampling and 48 bit processing throughout. Wide range, high order jitter rejection. The DB8/DB4 platform is without compromises. In fact,hundreds of machines could be cascaded without even degrading the transmitted sound. If optional analoginterfacing cards are added, they too represent state of the art technology with 96kHz sampling and mastering quality dynamic range. Analog prescaling is under remote control to NAB and EBU standards or even up to +30dBu Inputs.FoundationTC's involvement with high quality digital audio dates back to the mid eighties with pre-DSD technology being employed in the still ubiquitous delay, 2290. TC'scommitment to digital excellence continued over the years with equipment for the music, film and mastering industries.The multichannel processing in DB8 and DB4, for instance,was originally developed for film. Those tools have been adjusted for broadcast use and are now part of your arsenal. Or dynamics control, where some of the latest end-listener distortion canceling methods originally invented for mastering have been build in.Seven years experience with analog and digital broadcast combined with the know-how of skilled engineers is the strong base of the DB8/DB4 platform. From the purist and quality conscious hardware engineers to software writers of whom some were involved with designing the MPEGcodecs, the team forms a competent, non-dogmatic design group ready to take broadcast audio to the next level.We are confident you will value your new possibilities.。

NI 9215 Getting Started Guide

NI 9215 Getting Started Guide

GETTING STARTED GUIDENI 9215±10 V, 100 kS/s/ch, 16-Bit, Simultaneous Input, 4-Channel C Series Voltage Input ModuleThis document explains how to connect to the NI 9215. In this document, the NI 9215 with screw terminal, NI 9215 with spring terminal, and NI 9215 with BNC are referred to inclusively as the NI 9215.Note Before you begin, complete the software andhardware installation procedures in your chassisdocumentation.Note The guidelines in this document are specific tothe NI 9215. The other components in the system mightnot meet the same safety ratings. Refer to thedocumentation for each component in the system todetermine the safety and EMC ratings for the entiresystem.Safety GuidelinesOperate the NI 9215 only as described in this document.Caution Do not operate the NI 9215 in a manner notspecified in this document. Product misuse can result ina hazard. You can compromise the safety protectionbuilt into the product if the product is damaged in any 2| | NI 9215 Getting Started Guideway. If the product is damaged, return it to NI forrepair.NI 9215 with Screw Terminal and NI 9215 with Spring T erminal Safety VoltagesConnect only voltages that are within the following limits.Channel-to-COM±30 V maximumIsolationChannel-to-channel NoneChannel-to-earth groundContinuous250 Vrms,Measurement Category II Withstand2,300 Vrms, verified by a 5 sdielectric withstand test Measurement Category II is for measurements performed on circuits directly connected to the electrical distribution system. This category refers to local-level electrical distribution, such as that provided by a standard wall outlet, for example, 115 V for U.S. or 230 V for Europe.NI 9215 Getting Started Guide| © National Instruments| 3Caution Do not connect the NI 9215 to signals or usefor measurements within Measurement Categories IIIor IV.NI 9215 with BNC Safety VoltagesConnect only voltages that are within the following limits.AI+-to-AI-±30 V maximumIsolationChannel-to-channel NoneChannel-to-earth groundContinuous60 VDC,Measurement Category IWithstand1,500 Vrms, verified by a 5 sdielectric withstand test Measurement Category I is for measurements performed on circuits not directly connected to the electrical distribution system referred to as MAINS voltage. MAINS is a hazardous live electrical supply system that powers equipment. This category is for measurements of voltages from specially protected secondary circuits. Such voltage measurements include signal levels, special 4| | NI 9215 Getting Started Guideequipment, limited-energy parts of equipment, circuits powered by regulated low-voltage sources, and electronics.Note Measurement Categories CAT I and CAT O areequivalent. These test and measurement circuits are notintended for direct connection to the MAINS buildinginstallations of Measurement Categories CAT II,CAT III, or CAT IV.Caution Do not connect the NI 9215 to signals or usefor measurements within Measurement Categories II,III, or IV.Safety Guidelines for Hazardous VoltagesYou can connect hazardous voltages only to the NI 9215 with screw terminal and the NI 9215 with spring terminal. Do not connect hazardous voltages to the NI 9215 with BNC.If hazardous voltages are connected to the device, take the following precautions. A hazardous voltage is a voltage greater than 42.4 V pk voltage or 60 V DC to earth ground.Caution Ensure that hazardous voltage wiring isperformed only by qualified personnel adhering to localelectrical standards.NI 9215 Getting Started Guide| © National Instruments| 5Caution Do not mix hazardous voltage circuits andhuman-accessible circuits on the same module.Caution Ensure that devices and circuits connected tothe module are properly insulated from human contact.Caution When module terminals are hazardousvoltage LIVE (>42.4 V pk/60 V DC), you must ensurethat devices and circuits connected to the module areproperly insulated from human contact. You must usethe NI 9927 connector backshell kit with the NI 9215with screw terminal and the NI 9981 connectorbackshell kit with the NI 9215 with spring terminal toensure that the terminals are not accessible.Safety Guidelines for Hazardous LocationsThe NI 9215 is suitable for use in Class I, Division 2, Groups A, B, C, D, T4 hazardous locations; Class I, Zone 2, AEx nA IIC T4 and Ex nA IIC T4 hazardous locations; and nonhazardous locations only. Follow these guidelines if you are installing the NI 9215 in a potentially explosive environment. Not following these guidelines may result in serious injury or death.6| | NI 9215 Getting Started GuideCaution Do not disconnect I/O-side wires orconnectors unless power has been switched off or thearea is known to be nonhazardous.Caution Do not remove modules unless power hasbeen switched off or the area is known to benonhazardous.Caution Substitution of components may impairsuitability for Class I, Division 2.Caution For Division 2 and Zone 2 applications,install the system in an enclosure rated to at least IP54as defined by IEC/EN 60079-15.Caution For Division 2 and Zone 2 applications,connected signals must be within the following limits. Capacitance0.2 µF maximumSpecial Conditions for Hazardous Locations Use in Europe and InternationallyThe NI 9215 has been evaluated as Ex nA IIC T4 Gc equipment under DEMKO 03 ATEX 0324020X and is IECEx UL 14.0089X certified. Each NI 9215 is marked II 3G and is suitable for useNI 9215 Getting Started Guide| © National Instruments| 7in Zone 2 hazardous locations, in ambient temperatures of -40 °C ≤ Ta ≤ 70 °C. If you are using the NI 9215 in Gas Group IIC hazardous locations, you must use the device in an NI chassis that has been evaluated as Ex nC IIC T4, Ex IIC T4, Ex nA IIC T4, or Ex nL IIC T4 equipment.Caution You must make sure that transientdisturbances do not exceed 140% of the rated voltage.Caution The system shall only be used in an area ofnot more than Pollution Degree 2, as defined inIEC 60664-1.Caution The system shall be mounted in anATEX/IECEx-certified enclosure with a minimumingress protection rating of at least IP54 as defined inIEC/EN 60079-15.Caution The enclosure must have a door or coveraccessible only by the use of a tool.8| | NI 9215 Getting Started GuideSafety Compliance and Hazardous Locations StandardsThis product is designed to meet the requirements of the following electrical equipment safety standards for measurement, control, and laboratory use:•IEC 61010-1, EN 61010-1•UL 61010-1, CSA C22.2 No. 61010-1•EN 60079-0, EN 60079-15•IEC 60079-0: Ed 6, IEC 60079-15; Ed 4•UL 60079-0; Ed 6, UL 60079-15; Ed 4•CSA C22.2 No. 60079-0, CSA C22.2 No. 60079-15Note For UL and other safety certifications, refer tothe product label or the Product Certifications andDeclarations section.NI 9215 Getting Started Guide| © National Instruments| 9CE ComplianceThis product meets the essential requirements of applicable European Directives, as follows:•2014/35/EU; Low-V oltage Directive (safety)•2014/30/EU; Electromagnetic Compatibility Directive (EMC)•2014/34/EU; Potentially Explosive Atmospheres (ATEX)Electromagnetic Compatibility Guidelines This product was tested and complies with the regulatory requirements and limits for electromagnetic compatibility (EMC) stated in the product specifications. These requirements and limits provide reasonable protection against harmful interference when the product is operated in the intended operational electromagnetic environment.This product is intended for use in industrial locations. However, harmful interference may occur in some installations, when the product is connected to a peripheral device or test object, or if the product is used in residential or commercial areas. To minimize 10| | NI 9215 Getting Started Guideinterference with radio and television reception and prevent unacceptable performance degradation, install and use this product in strict accordance with the instructions in the product documentation.Furthermore, any changes or modifications to the product not expressly approved by National Instruments could void your authority to operate it under your local regulatory rules.Caution To ensure the specified EMC performance,operate this product only with shielded cables andaccessories.Caution Electrostatic Discharge (ESD) can damagethe NI 9215. To prevent damage, use industry-standardESD prevention measures during installation,maintenance, and operation.Special Conditions for Marine Applications Some models are approved for marine (shipboard) applications. To verify marine approval certification for a model, visit / product-certifications, search by model number, and click the appropriate link.Notice In order to meet the EMC requirements formarine applications, install the model in a shieldedenclosure with shielded and/or filtered power andinput/output ports. In addition, take precautions whendesigning, selecting, and installing measurement probesand cables to ensure that the desired EMC performanceis attained.Physical CharacteristicsIf you need to clean the module, wipe it with a dry towel.Tip For two-dimensional drawings and three-dimensional models of the C Series module andconnectors, visit /dimensions and search bymodule number.Screw-terminal wiringGauge0.2 mm2 to 2.5 mm2 (26 AWGto 14 AWG) copper conductorwireWire strip length13 mm (0.51 in.)Temperature rating90 °C minimumTorque for screw terminals 0.5 N · m to 0.6 N · m (4.4 lb · in. to 5.3 lb · in.)Wires per screw terminal One wire per screw terminal; two wires per screw terminal using a 2-wire ferruleFerrules0.25 mm2 to 2.5 mm2 (26 AWGto 14 AWG)Spring-terminal wiringGauge0.2 mm2 to 2.5 mm2 (26 AWGto 14 AWG) copper conductorwireWire strip length10 mm (0.39 in.) Temperature rating90 °C minimumWires per spring terminal One wire per spring terminal;two wires per spring terminalusing a 2-wire ferrule Ferrules0.25 mm2 to 2.5 mm2 (26 AWGto 14 AWG)Connector securementSecurement type Screw flanges provided0.2 N · m (1.80 lb · in.)Torque for screwflangesWeight150 g (5.3 oz)NI 9215 with screwterminalNI 9215 with spring138 g (4.9 oz)terminalNI 9215 with BNC173 g (6.1 oz)Preparing the EnvironmentEnsure that the environment in which you are using the NI 9215 meets the following specifications.Operating temperature(IEC 60068-2-1, IEC 60068-2-2)-40 °C to 70 °COperating humidity (IEC 60068-2-78)10% RH to 90% RH, noncondensingPollution Degree2Maximum altitude2,000 mIndoor use only.Note Refer to the device datasheet on /manualsfor complete specifications.NI 9215 PinoutAI0AI1AI2AI3Grounded Differential ConnectionsFloating Differential Connections•Connect the negative lead to COM through a 1 MΩ resistor to keep the signal source within the common-mode voltagerange.•The NI 9215 with screw terminal and the NI 9215 with spring terminal does not read data accurately if the signal source is outside of the common-mode voltage range.The NI 9215 with BNC has internal circuitry that maintains the common mode voltage range.Single-Ended ConnectionsConnect the ground signal to COM to keep the signal source within the common-mode voltage range.NI 9215 Getting Started Guide| © National Instruments| 21The NI 9215 with BNC has internal circuitry that maintains the common mode voltage range.Connection Guidelines•Make sure that devices you connect to the NI 9215 are compatible with the module specifications.•You must use 2-wire ferrules to create a secure connection when connecting more than one wire to a single terminal on the NI 9215 with screw terminal or NI 9215 with springterminal.22| | NI 9215 Getting Started GuideHigh-Vibration Application ConnectionsIf your application is subject to high vibration, NI recommends that you follow these guidelines to protect connections to theNI 9215 with screw terminal or the NI 9215 with spring terminal:•Use ferrules to terminate wires to the detachable connector.•Use the NI 9927 backshell kit with the NI 9215 with screw terminal or the NI 9981 backshell kit with the NI 9215 with spring terminal.Overvoltage ProtectionThe NI 9215 provides overvoltage protection for each channel.Note Refer to the device datasheet on /manualsfor more information about overvoltage protection.NI 9215 Getting Started Guide| © National Instruments| 23Where to Go NextLocated at /manuals24 | |Product Certifications and DeclarationsRefer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for NI products, visit /product-certifications, search by model number, and click the appropriate link.Worldwide Support and ServicesThe NI website is your complete resource for technical support. At /support, you have access to everything from troubleshooting and application development self-help resources to email and phone assistance from NI Application Engineers. Visit /services for information about the services NI offers. Visit /register to register your NI product. Product registration facilitates technical support and ensures that you receive important information updates from NI.NI corporate headquarters is located at11500 North Mopac Expressway, Austin, Texas, 78759-3504. NI NI 9215 Getting Started Guide| © National Instruments| 25also has offices located around the world. For support in the United States, create your service request at /support or dial 1 866 ASK MYNI (275 6964). For support outside the United States, visit the Worldwide Offices section of / niglobal to access the branch office websites, which provide up-to-date contact information.Information is subject to change without notice. Refer to the NI Trademarks and Logo Guidelines at /trademarks for information on NI trademarks. Other product and company names mentioned herein are trademarks or trade names of their respective companies. For patents covering NI products/technology, refer to the appropriate location: Help»Patents in your software, the patents.txt file on your media, or the National Instruments Patent Notice at / patents. Y ou can find information about end-user license agreements (EULAs) and third-party legal notices in the readme file for your NI product. Refer to the Export Compliance Information at /legal/export-compliance for the NI global trade compliance policy and how to obtainrelevant HTS codes, ECCNs, and other import/export data. NI MAKES NO EXPRESS OR IMPLIED WARRANTIES AS TO THE ACCURACY OF THE INFORMATION CONTAINED HEREIN AND SHALL NOT BE LIABLE FOR ANY ERRORS. U.S. Government Customers: The data contained in this manual was developed at private expense and is subject to the applicable limited rights and restricted data rights as set forth in FAR 52.227-14, DFAR 252.227-7014, and DFAR 252.227-7015.© 2004—2019 National Instruments. All rights reserved.373779H-01June 9, 2019。

Audi B6 B7 S4 Timing Chains - Non-De

Audi B6 B7 S4 Timing Chains - Non-De
– When the +me comes for a +ming chain service, some effort is needed by the mechanic to familiarise themselves with the layout of the beast and understand what parts are required on each chain.
– Poor oil maintenance, excessive wear & tear (or bad luck) is the cause of +ming chain ra`le noises when one or more guides are unable to maintain perfect posi+oning of one or more +ming chains.
04/06/20
DraK 01
1
DISCLAIMER
• While a lot of effort has gone into compiling this document to provide accurate and independent informa+on that has been gathered from reputable sources - the author cannot be blamed, flamed or chas+sed on internet forums, social media (or down the local boozer) for geXng anything wrong here.
• Timing Chain Service

翻译黄金管弦乐的说明书样本

翻译黄金管弦乐的说明书样本

翻译黄金管弦乐阐明书(连载)作者:断剑本文为本人依照在网上搜索来英文手册《The Complete Guide - EWQLSO》翻译得来,为非赚钱性作品,仅供广大兴趣者学习之用,请勿用于商业用途,谢谢!由于本人水平有限,翻译中难免有各种错误,但愿高人能指正。

英文原版手册我曾经发过,在这里(名字不同样内容同样)1手册有100多页,我只翻了一小某些,背面某些我会一边翻译一边发布,但愿人们关注和支持。

安装EWQLSO The EASTWEST/QUANTUM LEAP SYMPHONIC ORCHESTRA (有关帖子诸多,略过)用EWQLSO制作音乐犹如真实管弦乐队同样,EWQLSO采样文献也被分为四组:弦乐组(strings)木管组(woodwinds)铜管组(brass)打击乐组(percussion)每个组内又包具有许多乐器。

例如:弦乐组包括了小提琴、中提琴、大提琴、大提贝以及竖琴。

EWQLSO又进一步将每种乐器划分为独奏和群组两个类别。

并且在小提琴组里,群组音色又被分为“18小提琴”和“11小提琴”,以体现老式乐队中第一小提琴组和第二小提琴组声音区别。

因而,在EWQLSO中,对于乐器定义与咱们在真实世界中稍微有些不同,解释如下;当咱们用EWQLSO自带Kompakt采样器载入一种采样音色时,你将在打开菜单中看见几种不同层。

下图中显示就是白金版中加载音色时显示三个层。

让咱们先忽视中间那层最小菜单,留在后来讨论。

这层子菜单只存在于白金版中,除非你建立自己子菜单。

左边菜单在EWQLSO中称之为乐器。

在列表中,上方是全编制管弦乐队中常规五个弦乐群组,下方是三个独奏乐器(大提琴、竖琴和小提琴),以及一种额外乐器:LARGE STRING SECTION 以再现一种全体弦乐组齐奏声音。

右边菜单在EWQLSO中称之为演奏法。

这是由演奏家以尽量多演奏方式来演奏乐器所采集而成采样。

如何使用EWQLSO乐器及演奏法有诸各种办法来制作管弦乐队中大多数乐器声音。

Listen EVERYWHERE 故障排除指南说明书

Listen EVERYWHERE 故障排除指南说明书

Listen EVERYWHERE Troubleshooting GuideContentsOverview ------------------------------------------------------------------------------------------------------------------- 1 Unable to Perform a Successful Venue Scan -------------------------------------------------------------------- 1 Front Power LED is Solid ------------------------------------------------------------------------------------------- 2 Front Power LED is Blinking Steadily (1 Blink Per Second) ------------------------------------------------ 4 Front Power LED is Blinking Rapidly (2 Blinks Per Second) ----------------------------------------------- 4 Server is Unable to Connect to Cloud Services ----------------------------------------------------------------- 5 High Latency, Noise, Crackling, or Dropouts in Audio --------------------------------------------------------- 5 No Audio or Partial Audio --------------------------------------------------------------------------------------------- 7Overview:The purpose of this tech note is to provide a troubleshooting guide for the ListenEVERYWHERE (LE) server. Most of the issues outlined are usually encountered when initially installing the LE server or after altering a pre-existing installation of the LE server in asignificant way (i.e., installing into a different location, changing networking or audio equipment, etc.). There may be issues or resolutions that extend beyond this document. If so, please do not hesitate to contact Listen Technical Support using the contact information located at the end of this document.Unable to Perform a Successful Venue Scan:If you are reviewing this section, you are not able to connect to the Listen EVERYWHERE server through the Listen EVERYWHERE app using the Venue Scan option. The user will witness a 30-second countdown timer and/or an error message. To preface, theuser must be physically present in the venue location where ListenEVERYWHERE is installed and must be connected to the samenetwork. The server is not designed to stream over the internet ortraverse networks. The Venue Scan feature also requires theallowance of particular ports and services mentioned later in thissection. If this is not desired or possible in the venue, please consultthe Mobile App Connection Methods tech note for alternativeconnection methods.Note: The first time the app is opened on devices running iOS 14 or higher, you will see the prompt “Listen EVERYWHERE would like to find and connect to devices on your local network. This app will beable to discover and connect to devices on the networks you use”, press “OK”. This can be changed atany time in Settings > Privacy > Local Network on the iOS platform.Front Power LED is SolidThis section will provide solutions in a situation where a Venue Scan will fail while thefront power LED on the LE server is solid.•Enable Multicast UDP / Multicast DNS (mDNS) on the network. This is a common problem on guest networks or networks with high levels of security because thisfeature may be disabled. Multicast DNS (mDNS) is used in the discovery processfor the app and the server to connect via a network scan. This then allowsautomatic connection when the app is opened. To enable mDNS, perform thefollowing:o Add the following services to the allowed list in the Gateway/WAP mDNS settings: Array▪_ExXothermic._tcp▪_AsClient_ExXothermic._tcpo Open Port 5353.o Add the mDNS IP address to theallowed subnets list. 224.0.0.251 isthe most common mDNS IPaddress, but it could be any of the224.0.0.0/24 range.•Whitelist the LE server on the network. Onguest networks and VLANs, it’s possiblethat client isolation is enabled. Clientisolation prevents connected wirelessdevices from communicating with otherdevices on the network (such asiOS/Android devices communicating withthe LE server) and disables mDNS. Inconjunction with enabling mDNS on thenetwork (see previous bullet point), the IPaddress or MAC address must be added tothe allowed address list (Whitelist) for the GuestNetwork/VLAN in the Router and/or WAP configuration.•Expand the allocation of IP addresses. The network may be limited by the number of host devices that can acquire an IP address (i.e., connect to thenetwork). This will be evident when the LE server is successfully connected to the network but only some users cannot successfully connect to the network and therefore, are unable to successfully perform a Venue Scan in the LE app. In that case, the subnet mask may need to be expanded to include more hosts. A calculator can be found here. For networks with a single Listen EVERYWHERE server, it is recommended to set the subnet mask to at least 255.255.252.0/22 to accommodate the 1000 user specification of the server. This may vary based on the network infrastructure needs. Class B (default subnet mask of255.255.0.0) is best for medium to large venues.•Consider IP address lease time. Lease time refers to how long a device will reserve an IP address on a network before it is renewed and re-added to the IP address pool availability. Similar to expanding the IP address allocation, the IP address lease time may also be adjusted based on the needs of the venue. It’s recommended to place a Listen EVERYWHERE server on a network with a 24-hour lease time so that devices do not encounter any disruption whilestreaming audio through the Listen EVERYWHERE app. However, a venue may want to consider lowering the lease time in high traffic environments or forapplications that required a user to be connected for a predetermined finite amount of time (e.g., a guided tour).•Ensure that users are connected to the correct network and are not using mobile data. As mentioned previously, make sure that users are connected to the same network as the LE server. To help verify, it may be beneficial toperform a network scan from a mobile device using a network analyzer app.Usually, the LE server should appear with the Server ID (e.g., AEL6-XXXX-XXXX-XXX) as the name and “WIBRAIN” as the manufacturer. If using the LE server on a network without internet connection, some devices may have troubleconnecting. Below are a few tips to help connect to these networks: o When first connecting to the network, you may see a prompt to stay connected even if the network does not have internet. Select Yes orKeep Trying Wi-Fi. Do not manually switch to mobile or cellular data.o Forget the network and reconnect. This may elicit a prompt to stay connected even if the network does not have internet. Select Yes orKeep Trying Wi-Fi. Do not manually switch to mobile or cellular data.o Turn off Mobile / Cellular Data and connect to the network.o Turn on Airplane Mode and connect to the network.Front Power LED is Blinking Steadily (1 Blink Per Second)This section will provide solutions in a situation where a Venue Scan will fail while the front power LED on the LE server is blinking once per second.By default, the Listen EVERYWHERE server is designed to acquire an IP address automatically from a DHCP server. This is typically the router. While acquiring the IP address from the network, the user will see the power LED blink once per second for roughly 30 seconds. If the blinking pattern persists beyond that, an IP address isn’t properly being assigned to the server or the internal components are not functioning properly.•Verify that a DHCP server / router is properly setup and installed. Follow the steps provided by the manufacturer of the networking hardware to set up andprepare the network for use. Sometimes, these devices may fail over time.Performing a factory reset on the networking equipment and following thesetup procedures may resolve the issue.•Check the network cable and Ethernet port. The network cable may be faulty, disconnected, or connected into the wrong Ethernet port on the network switch or router. The Ethernet LAN port may also be faulty, disabled, or configuredincorrectly.•Check the Power supply. A faulty or incorrect power supply will cause internal components of the Listen EVERYWHERE server to function incorrectly. The LEserver uses a 5V / 6.0A / 30W power supply.Front Power LED is Blinking Rapidly (2 Blinks Per Second)This section will provide solutions in a situation where a Venue Scan will fail while the front power LED on the LE server is blinking twice per second.•Verify that the network settings placed on the Listen EVERYWHERE server are correct. Network settings can be adjusted on the LE server through the ServerAdmin interface. Some errors, such as IP address conflicts on the network, willoccur after the configuration is saved and the server is rebooted. When errorslike this are encountered, the front panel LED status will flash in panic mode (2blinks per second) indicating the server has an improper network configuration and cannot communicate on the network. When this happens, the server willrevert to a known working DHCP configuration after 5 minutes.Server is Unable to Connect to Cloud Services:•internet access.•Enable ports and services. This will likely be necessary if the network has a high level of security or firewall in place. Cloud Services communicates via HTTP with the LE server through * over port 1025, with updates communicating over port 80.Refer to Figure 1 on Page 2.High Latency, Noise, Crackling, or Dropouts in Audio:If you are reviewing this section, you are able to successfully connect to the Listen EVERYWHERE server through the Listen EVERYWHERE app. However, the latency of the audio stream through the app seems excessively high or the audio stream has excessive noise, crackling, or dropouts. These audio effects may be heard immediately, occasionally, or infrequently. An example can be heard here.The average latency on the Listen EVERYWHERE server is 60ms but can vary by network and device.•Upgrade the networking equipment. Older and/or low-cost networking equipment may result in unreliable and slower packet delivery, especially when many users areconnected to a single network. It is highly recommended to use high-end consumer-grade networking equipment or enterprise-grade networking equipment to improvepacket reliability and speed. More information and recommended networkingequipment can be found in our Wireless Access Point Optimization for ListenEVERYWHERE tech note.• Do not use a mesh network . A mesh network iscomprised of multiple nodes that communicatewith each other to provide wireless access to asingle network. These nodes may also be calledpoints or extenders. You may also think of thesenodes as being wirelessly daisy-chained to oneanother. Mesh networks have a high likelihood ofcausing excessive latency, dropouts, andunwanted noise because it extends the pathwayfrom the user device to the Listen EVERYWHEREserver. Refer to Figure 2 on the right.• Use an open network (no encryption). Usingencryption can lower the number of users thatcan connect to the WAP and add latency to theLE system. TKIP encryption should not be used.• Enable Quality of Service (QoS) for the LE serveron the network . By default, the LE server uses the 0xB8 Type of Service/Differentiated Services(ToS/DS) tag so that audio data can be prioritized over other data traffic on the network. This priority allows the latency and dropouts to be as low and infrequent as possible while travelling over the network. The QoS setting may still need to be enabled on the managed network, especially if there are many other connected devices or there are existing QoS prioritizations on other connected devices.• Ensure that there is adequate Wi-Fi coverage. If latency improves as a user movescloser to the wireless access point or when there are less users connected to thenetwork, the venue may need to consider adding additional wireless access points for adequate coverage and bandwidth allocation. Network speeds can also be tested using third-party apps. Refer to our Wireless Access Point Optimization for ListenEVERYWHERE tech note for more details.• Consider network frequency . Typically, users will receive better performance on the5GHz frequency versus a 2.4GHz frequency. The 2.4GHz frequency can usually beturned off through your network’s admin interface. However, 2.4GHz frequencies will work more efficiently as the user moves further away from the access point. Both may be considered depending on your wireless access point placement.• Check your mobile device. Some third-party, low-cost and/or older mobile devices maynot have high computing power or strong Wi-Fi antennas. Test with multiple mobiledevices to isolate the problem. If the problem exists on one or few devices, it may benecessary to use an alternate mobile device to stream audio.•Set a static channel on the wireless access point(s). Many WAPs can automatically change channels to try and find one with the least interference. This feature can cause audio dropouts each time the channel changes, as often as every 20 seconds. If it does not settle on a channel after 30-60 minutes, it may be best to choose a channelmanually.•Check your Bluetooth device (if applicable). Bluetooth speakers and headphones can potentially cause an additional 200-700ms in latency. The amount of latency can varybetween Bluetooth devices. Utilizing devices with Bluetooth 5.0 or higher and Bluetooth Low Energy (BLE) can help reduce latency. If using a hearing aid or cochlear implantwith Bluetooth technology, try toggling between listening modes to reduce latency.Bluetooth devices are also susceptible to interference from Wi-Fi signals. Try movingcloser to the wireless access point.•Be mindful of cable runs. Cable runs from the audio source to the Listen EVERYWHERE server should be balanced to avoid introducing interference or noise. If an unbalanced cable is used, you can reduce noise by improving cable shielding, avoiding long cableruns (usually over 15ft), and by avoiding objects that can be picked up by the groundwire.•Avoid ground loops. A ground loop is characterized by the introduction of a humming noise in the audio and can occur when multiple devices are interconnected through a shared ground reference. Grounding is needed for both power and audio connections, so it’s important to not allow these ground references to create a loop within the device setup. When it comes to Listen EVERYWHERE, it may occur when the source audio,other audio devices, and LE server are connected to the same ground reference,usually in the form of a shared power strip or electrical outlets with interconnectedground references. In order to combat a ground loop occurrence, the equipment’scircuitry will need to be separated or a ground loop isolator can be installed.No Audio or Partial Audio:If you are reviewing this section, you are able to successfully connect to the Listen EVERYWHERE server through the Listen EVERYWHERE app. However, no audio or partial audio is heard on the channel after channel selection within the app. The LE server contains green LEDs on the front of the unit that will illuminate when audio is present and at an adequate level. This may help determine if the issue is audio-based or network-based and can be troubleshot accordingly.•Correctly connect audio to the Listen EVERYWHERE server. If the server is set up for mono, connect to a single terminal block input, or connect to one vertical pair of redand white RCA connections (LW-100P only). If the server is set up for stereo, connect toa pair of terminal block inputs, or connect to one RCA input on the left and one RCAinput on the right (LW-100P only). The LW-150 Dante connection handles both mono and stereo with the same connection. Refer to Figure 3 below.•Verify that audio cables being used are working properly or have been properly assembled. This can be tested by using a different cable. If a custom-made cable is being used, some wiring diagrams are available on our Audio Input Connection for Listen EVERYWHERE tech note to ensure that it had been made properly. A multimeter may also be used to check for continuity between the two connectors of the cable. •Verify that headphones are working properly. This can be tested by using a different pair of headphones and/or confirming that the audio can be heard through thespeaker of the smartphone or tablet used for streaming.•Audio input should be line level. Mic level audio sources are not meant to be used on the Listen EVERYWHERE server. Doing so may result in low level audio and pitch where no audio or only partial audio may be heard.•Ensure that traffic is enabled on port 16384. The LE Server sends RTP packets via UDP to the app over a range of ports, including dynamic ephemeral ports. The mobile app listens via UDP over port 16384. If these ports are not enabled, no audio will stream through the app. See Figure 1 on Page 2. It also may be necessary to perform anetwork scan or capture (e.g., through Wireshark) to identify which ports the network is utilizing. See example below.•Do not attempt to stream audio across different networks. Attempting to stream across different networks will likely end up producing no audio within the Listen EVERYWHERE app.Should you have any further questions or concerns, please contact Listen Technologies’Technical Services team at 1-800-330-0891 or**********************for assistance.。

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Nokia Customer Care2115i/2116/2116i (RH-66)Mobile TerminalsBaseband Description and Troubleshooting2115i/2116/2116i (RH-66)Baseband Description and TroubleshootingContents Page Introduction (5)Baseband and RF Architecture (6)Power Up and Reset (7)Power Up (9)Power Key (9)Charger (9)RTC Alarm (10)Power Off (10)Power Consumption and Operation Modes (10)Power-off Mode (10)Sleep Mode (10)Active Mode (11)Charging Mode (11)Power Distribution (11)Clock Distribution (13)RFClk (19.2 MHz Analog) (13)RFConvClk (19.2 MHz digital) (14)CBUS Clk Interface (15)DBUS Clk Interface (15)SleepCLK (Digital) (16)SleepCLK (Analog) (16)Flash Programming Error Codes (17)Charging Operation (19)Battery (19)Charging Circuitry (19)Charger Detection (20)Charge Control (21)Audio (21)Display and Keyboard (22)Flashlight (22)Accessories (23)Charging (23)Pop-port Headset Detection (25)FBUS Detection (26)Accessory Detection Through ACI (26)SIM CAR (28)GPS Module (29)Test Points - Bottom (31)Test Points - Top (34)Troubleshooting (36)Mobile Terminal is Dead (37)Flash Faults (38)Power Does Not Stay on or the Mobile Terminal is Jammed (40)Charger Faults (42)Audio Faults (43)Display Faults (47)Keypad Faults (49)2115i/2116/2116i (RH-66) Nokia Customer Care Baseband Description and TroubleshootingFlashlight Faults (51)GPS Faults (52)2115i/2116/2116i (RH-66)Baseband Description and Troubleshooting Nokia Customer CareThis page intentionally left blank.2115i/2116/2116i (RH-66) Nokia Customer Care Baseband Description and TroubleshootingIntroductionThe mobile terminal uses a CDMA tri-mode engine (AMPS/800/1900) with a DCT4baseband consisting of three ASICs:•Universal Energy Management cost reduction (UEMC)•Universal Phone Processor (UPP) - UPP8Mv4.2•8MB flash memory with 1 MB of RAM memoryThe baseband architecture supports a power-saving function called sleep mode. Sleepmode shuts off the voltage-controlled temperature-compensated crystal oscillator(VCTCXO), which is used as the system clock source for both the RF and the baseband.During sleep mode, the system runs from a 32 kHz crystal and all the RF regulators(VR1A, VR1B, VR2—VR7) are off. The sleep time is determined by network parameters.Sleep mode is entered when both the Master Control Unit (MCU) and the Digital Signal Processor (DSP) are in standby mode and the normal VCTCXO clock is switched off. The mobile terminal is awakened by a timer running from this 32 kHz clock supply. The period of the sleep/wake up cycle (slotted cycle) is 1.28N seconds, where N= 0, 1, 2, depending on the slot cycle index.The mobile terminal supports standard Nokia 2-wire and 3-wire chargers (ACP-x andLCH-x). However, the 3-wire chargers are treated as 2-wire chargers. The PWM control signal for controlling the 3-wire charger is ignored. The UEMC and energy management software control charging.A BL-6C (1070 mAh) lithium-ion battery is used as the main power source.2115i/2116/2116i (RH-66)Baseband Description and Troubleshooting2115i/2116/2116i (RH-66) Nokia Customer Care Baseband Description and TroubleshootingPower Up and ResetThe UEMC ASIC controls the power up and reset. The baseband can power up in thefollowing ways:•Pressing the Power button, which means grounding the PWRONX pin of the UEMC•Connecting the charger to the charger input•Initiating the real-time clock (RTC) alarm (when the RTC logic has beenprogrammed to give an alarm)After receiving one of the above signals, the UEMC counts a 20 ms delay and then enters reset mode. The watchdog starts, and if the battery voltage is greater than Vcoff+, a200ms delay starts to allow references (etc.) to settle. After this delay elapses, theVFLASH1 regulator enables. Then, 500 us later, the VR3, VANA, VIO, and VCORE enable.The Power Up Reset (PURX) line holds low for 20 ms and is sent to the UPP. Resets are generated for the MCU and the DSP. During this reset phase, the UEMC forces theVCTCXO regulator on regardless of the status of the sleep control input signal to theUEMC.The FLSRSTx from the UPP is used to reset the flash during power up and to put the flash in power down during sleep mode. All baseband regulators are switched on when theUEMC is powered on. The UEMC internal watchdogs run during the UEMC reset state,with the longest watchdog time selected. If the watchdog expires, the UEMC returns to the power-off state. The UEMC watchdogs are internally acknowledged at the risingedge of the PURX signal to always give the same watchdog response time to the MCU.Figure2 and Figure3 represent the UEMC start-up sequence from reset to power-onmode.2115i/2116/2116i (RH-66)Baseband Description and TroubleshootingFigure 2: Power-on sequence and timing2115i/2116/2116i (RH-66) Nokia Customer Care Baseband Description and TroubleshootingFigure 3: Measured power-on sequence and timingPower UpThe mobile terminal can power up using the power key, a charger, or an RTC alarm. Power KeyWhen the power key is pressed, the UEMC enters the power-up sequence. Pressing the power key causes the PWRONX pin on the UEMC to ground. The UEMC PWRONX signal is not part of the keypad matrix. The power key is only connected to the UEMC. This means that when pressing the power key an interrupt is generated to the UPP that starts theMCU. The MCU then reads the UEMC interrupt register and notices that it is a PWRONX interrupt. The MCU reads the status of the PWRONX signal using the UEMC control bus (CBUS). If the PWRONX signal stays low for a certain time the MCU accepts this as avalid power-on state and continues with the software baseband initialization. If thepower key does not indicate a valid power-on situation, the MCU powers off thebaseband.ChargerCharging is controlled by start-up charging circuitry in order to detect and start charging in cases where the main battery is empty and the UEMC has no supply (NO_SUPPLY or BACKUP mode).2115i/2116/2116i (RH-66)Baseband Description and TroubleshootingCharging is controlled by START_UP charge circuitry when it detects the VBAT level to be below the master reset threshold (V MSTR-). Connecting a charger forces the VCHAR input to rise above the charger detection threshold (VCH DET+), and by detection start-upcharging initiates. The UEMC generates 100 mA of constant output current from theconnected charger’s output voltage. The battery’s voltage rises at it charges, and when the VBAT voltage level is detected to be higher than the master reset threshold limit(V MSTR+), the START_UP charge is terminated.The charge control (CHACON) monitors the VBAT voltage level. A MSTRX=‘1’ output reset signal (internal to the UEMC) is given to the UEMC’s reset block when the VBAT isgreater than the V MSTR+ and the UEMC enters into the reset sequence.If the VBAT is detected to fall below V MSTR during start-up charging, charging iscancelled. Charging restarts if a new rising edge on the VCHAR input is detected (VCHAR rising above VCH DET+).RTC AlarmIf the mobile terminal is in power-off mode when the RTC alarm begins, the wake-upprocedure occurs. After the baseband is powered on, an interrupt is given to the MCU.When an RTC alarm occurs during active mode, the interrupt is generated to the MCU. Power OffThe baseband switches to power-off mode if any of following occurs:•Power key is pressed•Battery voltage is too low (VBATT < 3.2 V)•Watchdog timer register expiresThe UEMC controls the power-down procedure.Power Consumption and Operation ModesPower-off ModeIn power-off mode, power (VBAT) is supplied to the UEMC, vibra, LED, PA, and PA drivers.During this mode, the current consumption is approximately 35 uA.Sleep ModeIn sleep mode, both processors (MCU and DSP) are in stand-by. The mobile terminalenters sleep mode only when both processors make the request. When the UEMC detects as low SLEEPX signal, the mobile terminal enters sleep mode. The VIO and VFLASH1regulators are put into low quiescent current mode, VCORE enters LDO mode, and theVANA and VFLASH2 regulators are disabled. All RF regulators are disabled during sleep mode. When the SLEEPX signal is detected high by the UEMC, the mobile terminal enters active mode and all functions are activated.Sleep mode is exited either by the expiration of a sleep clock counter in the UEMC or by some external interrupt (generated by a charger connection, key press, headsetconnection, etc.). The VCTCXO is shut down in sleep mode and the 32 kHz sleep clockoscillator is used as a reference clock for the baseband.Active ModeIn active mode, the mobile terminal operates normally by scanning for channels,listening to a base station, and transmitting and processing information. There areseveral sub-states in the active mode depending on the mobile terminal present state of the mobile terminal, such as burst reception, burst transmission etc.In active mode, software controls the UEMC RF regulators: VR1A and VR1B can beenabled or disabled. VSIM can be enabled or disabled and its output voltage can beprogrammed to be 1.8 V or 3.3 V. VR2 and VR4—VR7 can be enabled or disabled or forced into low quiescent current mode. VR3 is always enabled in active mode and disabledduring sleep mode and cannot be controlled by software in the same way as the other regulators. VR3 only turns off if both processors request to be in sleep mode. Charging ModeCharging mode can function in parallel with any other operating mode. A BSI resistorinside the battery pack indicates the battery type/size. The resistor value corresponds toa specific battery capacity. The UEMC measures the battery voltage, temperature, size,and charging current.CHACON inside the UEMC controls the charging current delivered from the charger tothe battery and mobile terminal. The battery voltage rise is limited by turning the UEMC switch off when the battery voltage has reached 4.2 V. The charging current is monitored by measuring the voltage drop across a 220 mOhm resistor.Power DistributionIn normal operation, the baseband is powered from the mobile terminal‘s battery. Thebattery consists of one lithium-ion cell capacity of 1070 mAh and some safety andprotection circuits.The UEMC ASIC controls the power distribution to the whole mobile terminal throughthe baseband and RF regulators excluding the power amplifier (PA), which has acontinuous power rail directly from the battery. The battery feeds power directly to the following parts of the system:•UEMC•PA•Vibra•Display•Keyboard lightsBaseband Description and TroubleshootingThe heart of the power distribution is the power control block inside the UEMC. Itincludes all the voltage regulators and feeds the power to the entire system. The UEMC handles hardware power-up functions so the regulators are not powered and the power up reset (PURX) is not released if the battery voltage is less than 3 V.The baseband is powered from the following UEMC regulators:Table 2 includes the UEMC regulators for the RF.The charge pump that is used by VR1A is constructed around the UEMC. The charge pump works with the CBUS oscillator (1.2 MHz) and gives a 4.75 V regulated output voltage to the RF.Table 1: Baseband RegulatorsRegulatorMaximum Current (mA)Vout (V)NotesVCORE 300 1.35/1.05Power up default 1.35V and 1.05V in sleep mode.VIO 150 1.8Enabled always except during power-off mode VFLASH170 2.78Enabled always except during power-off mode VFLASH240 2.78Enabled only when data cable is connected VANA 80 2.78Enabled only when the system is awake (Off during sleep and power-off modes)VSIM253.0Enabled only when SIM card is usedTable 2: RF RegulatorsRegulatorMaximum Current (mA)Vout (V)NotesVR1A 10 4.75Enabled when cell transmitter is on VR1B 10 4.75Enabled when the transmitter is on VR2100 2.78Enabled when the transmitter is on VR320 2.78Enabled when SleepX is high VR450 2.78Enabled when the receiver is on VR550 2.78Enabled when the receiver is on VR650 2.78Enabled when the transmitter is on VR7452.78Enabled when the receiver is onClock DistributionRFClk (19.2 MHz Analog)The main clock signal for the baseband is generated from the voltage and temperature controlled crystal oscillator (VCTCXO) and sent to the UPP at pin M5.Figure 4: Waveform of the 19.2 MHz clock (VCTCXO) going to the UPPBaseband Description and TroubleshootingRFConvClk (19.2 MHz digital)The UPP distributes the 19.2 MHz internal clock to the DSP and MCU, where the software multiplies this clock by seven for the DSP and by two for the MCU.Figure 5: RFCovCLk waveformCBUS Clk InterfaceA 1.2 MHz clock signal is used for CBUS, which is used by the MCU to transfer databetween the UEMC and the UPP.Figure 6: CBUS data transferDBUS Clk InterfaceA 9.6 MHz clock signal is used for DBUS, which is used by the DSP to transfer databetween the UEMC and UPP.Figure 7: DBUS data transferringThe system clock is stopped during sleep mode by disabling the VCTCXO power supply(VR3) from the UEMC regulator output by turning off the controlled output signal SleepX from the UPP.Baseband Description and TroubleshootingSleepCLK (Digital)The 32 kHz sleep clock in the UEMC is also used in the UPP for sleep mode timing.Figure 8: 32 kHz Digital output from UEMCSleepCLK (Analog)When the system enters sleep mode or power off mode, the external 32 KHz crystal provides a reference to the UEMC RTC circuit to turn on the mobile terminal during power-off or sleep mode.Figure 9: 32 kHz analog waveform at the 32 KHz crystal inputFlash Programming Error CodesThe following characteristics apply to the information in Table3.•Error codes can be seen from the test results or from Phoenix's flash-tool.•Underlined information means that the connection under consideration is being used for the first time.Table 3: Flash Programming Error CodesError Description Not Working ProperlyC101"The Phone does not set FbusTx line high after the startup." Vflash1VBattBSI and FbusRX from prommer to UEMC. FbusTx from UPP->UEMC->Prommer(SA0)C102"The Phone does not set FbusTx line low after the line has been high. The Prommer generatesthis error also when the Phone is not con-nected to the Prommer."PURX(also to Safari)VR3Rfclock(VCTCXO->Safari->UPP)Mbus from Prommer->UEMC->UPP(MbusRx)(SA0)FbusTx from UPP->UEMC->Prommer(SA1) BSI and FbusRX from prommer to UEMC.C103" Boot serial line fail."Mbus from Prommer->UEMC->UPP(MbusRx)(SA1)FbusRx from Prommer->UEMC->UPPFbusTx from UPP->UEMC->Prommer C104"MCU ID message sending failed in the Phone."FbusTx from UPP->UEMC->PrommerC105"The Phone has not received Secondary boot codes length bytes correctly."Mbus from Prommer->UEMC->UPP(MbusRx) FbusRx from Prommer->UEMC->UPP FbusTx from UPP->UEMC->PrommerC106"The Phone has not received Secondary code bytes correctly."Mbus from Prommer->UEMC->UPP(MbusRx) FbusRx from Prommer->UEMC->UPP FbusTx from UPP->UEMC->PrommerC107"The Phone MCU can not start Secondary codecorrectly."UPPC586"The erasing status response from the Phoneinforms about fail."FlashC686"The programming status response from thePhone informs about fail."FlashCx81"The Prommer has detected a checksum errorin the message, which it has received from thePhone."FbusTx from UPP->UEMC->PrommerCx82"The Prommer has detected a wrong ID byte inthe message, which it has received from thePhone."FbusTx from UPP->UEMC->PrommerBaseband Description and TroubleshootingA204 Cx83 Cx84 Cx85"The flash manufacturer and device IDs in theexisting algorithm files do not match with theIDs received from the target phone.""The Prommer has not received phoneacknowledge to the message.""The phone has generated NAK signal duringdata block transfer.""Data block handling timeout"FlashUPPVIO/VANASignals between UPP-FlashMbus from Prommer->UEMC->UPP(MbusRx)FbusRx from Prommer->UEMC->UPPFbusTx from UPP->UEMC->PrommerCx87"Wrong MCU ID."RFClockUPP(Vcore)Startup for flashing Required startup for flashing Vflash1VBattTable 3: Flash Programming Error Codes (Continued)Error Description Not Working ProperlyCharging OperationBatteryThe 2115i/2116/2116i uses a Lithium-Ion cell battery with a capacity of 1070 mAh.Reading a resistor inside the battery pack on the BSI line indicates the battery size. The mobile terminal measures the approximate temperature of the battery on the BTEMP line with an NTC resistor on the PCB.The temperature and capacity information are needed for charge control. These resistors are connected to the BSI pin of the battery connector and the BTEMP of the mobileterminal. The mobile terminal has 100kΩ pull-up resistors for this line so that they can be read by A/D inputs in the mobile terminal.Figure 10: BL-6C battery pack pin orderCharging CircuitryThe UEMC ASIC charge control is dependent on the charger type and the battery size.External components are needed for electromagnetic compatibility (EMC), reversepolarity, and transient protection of the input to the baseband module. The chargerconnection is through the system connector interface. The baseband supports DCT3chargers, including both 2- and 3-wire type chargers. However, 3-wire chargers aretreated as 2-wire chargers.Baseband Description and TroubleshootingFigure 11: Charging circuitryCharger DetectionConnecting a charger creates voltage on the VCHAR input of the UEMC. Charging starts when the UEMC detects the VCHAR input voltage level above 2 V (VCHdet+ threshold).The VCHARDET signal is generated to indicate the presence of the charger for thesoftware. The energy management (EM) software controls the charger identification/acceptance. The charger recognition is initiated when the EM software receives a”charger connected” interrupt. The algorithm basically consists of the following threesteps:1.Check that the charger output (voltage and current) is within safety limits.2.Identify the charger as a 2- or 3-wire charger.3.Check that the charger is within the charger window (voltage and current).2115i/2116/2116i (RH-66) Nokia Customer Care Baseband Description and TroubleshootingIf the charger is accepted and identified, the appropriate charging algorithm is initiated.Figure 12: Charging circuitCharge ControlIn active mode, charging is controlled by the UEMC’s digital part. Charging voltage and current monitoring are used to limit charging into a safe area. The UEMC has thefollowing programmable charge cut-off limits:•VBATLim1 = 3.6 V (Default)•VBATLim2L = 5.0 V•VBATLim2H = 5.25 VVBATLim1, 2L, and 2H are designed with hystereses. When the voltage rises aboveVBATLim1, 2L, 2H+, charging is stopped by turning off the charging switch. No change is done in operational mode. Charging restarts after the voltage has decreased belowVBATLim-.There are two pulse-width modulation (PWM) frequencies in use depending on the type of the charger. A 2-wire charger uses a 1 Hz, while a 3-wire charger uses a 32 Hz. The duty cycle range is 0% to 100%. The maximum charging current is limited to 1.2 A.Figure 13: Charging circuity at the batteryAudioThe audio control and processing is provided by the UEMC, which contains the audiocodec, and the UPP, which contains the MCU and DSP blocks. These blocks handle and process the audio data signals. The baseband supports three microphone inputs and two earpiece outputs.MIC1 input is used for the mobile terminal's internal microphone. MIC2 input is used for headsets. MIC3 is not used. Every microphone input can have either a differential orsingle-ended AC connection to the UEMC circuit. The internal microphone (MIC1) andexternal microphone (MIC2) for Pop-port TM accessory detection are both differential. The microphone signals from different sources are connected to separate inputs at the2115i/2116/2116i (RH-66)Baseband Description and TroubleshootingUEMC. Inputs for the microphone signals are differential types. Also, MICBIAS1 is used for MIC1 and MICBIAS2 is used for MIC2. The 2115i/2116/2116i also support a hands-free speaker, which is driven by an IHF audio amplifier.Display and KeyboardThe mobile terminal uses light-emitting diodes (LEDs) for liquid crystal display (LCD) and keypad illumination. There is one LED for the LCD and four LEDs for the keypad. KLIGHT is the signal used to drive the LED driver for the LCD and keyboard. This signal turns on the LED driver (N2400).The mobile terminal also uses an IOS LCD. The interface uses a 9-bit data transfer and is quite similar to the DCT3 type interface, except the Command/Data information istransferred together with the data.Figure 14: Waveform for the LCD InterfaceFlashlightThe flashlight is driven by the white LED driver and controlled by the UEMC. TheTK65600B-G is an active-high enable device, which is tied to the DLIGHT signal from the UEMC.2115i/2116/2116i (RH-66) Nokia Customer Care Baseband Description and TroubleshootingAccessoriesThe 2115i/2116/2116i supports Pop-port accessories. Detection of the accessories is donethrough the ACI signal.The pin out on the Pop-port connector is as follows:•Charger•Charger GND•ACI•Vout•USB Vbus•USB D+ / Fbus Rx•USB D-/Fbus Tx•Data GND•XMic N•XMic P•HSear N•HSear P•HSear R N•HSear R PYou can perform the following in Pop-port accessories:•Charging•Accessory detection•FBUS communication•Fully differential audio interface for mono and stereo outputsChargingCharging through the Pop-port connector is accomplished in the same manner asthrough the charger connector. Pin 1 is physically connected to the charger connector.When the mobile terminal is connected to a desktop charger, it charges in the samemanner as it does with the charger connector.2115i/2116/2116i (RH-66)Baseband Description and TroubleshootingFigure16 shows the actual charging sequence. The channels shown are:•CH1 = Charging current across the .22 Ohm (R2200) resistor on UEMK•CH2 = Charger voltage measure at V2000•CH3 = Battery voltage measure at R2200•CH4=PURXIn Channel 4, PURX is released, which shows when the mobile terminal operation goes from reset mode to power-on mode.2115i/2116/2116i (RH-66) Nokia Customer Care Baseband Description and TroubleshootingPop-port Headset DetectionAccessory detection on the Pop-port is done digitally. The pins used for this accessorydetection are:•Pin 2 (Charge GND)•Pin 3 (ACI)•Pin4(Vout)2115i/2116/2116i (RH-66)Baseband Description and TroubleshootingFBUS DetectionFBUS communication in Pop-port is done through the following lines:•Pin 2 (Charge GND)•Pin 3 (ACI)•Pin4(Vout)•Pin 6 (FBUS Rx)•Pin 7 (FBUS Tx)Figure 18: Waveform showing Pop-port FBUS communicationAccessory Detection Through ACIUSB and audio on (mono or stereo)/FM radio communication in Pop-port is done through the following signals:Table 4: Accessory Detection SignalsUSBAudio/FMPin 5 (USB Vbus)Pin 9 (XMic N)Pin 6 (USB +)Pin 10 (SMIC P)Pin 7 (USB -)Pin 11 (HSEAR N)Pin 8 (Data GND)Pin 12 (HSEAR P)Nokia Customer CareBaseband Description and Troubleshooting2115i/2116/2116i (RH-66)Figure 19: Waveform showing accessory detection through ACIPin 13 (HSEAR R N)Pin 14 (HSEAR R P)Table 4: Accessory Detection Signals (Continued)USB Audio/FM2115i/2116/2116i (RH-66)Baseband Description and TroubleshootingSIM CARThe 2115i/2116/2116i supports SIM CAR. Use the waveform in Figure20 to verify that the sim_vcc, sim_i/o, cim_clk, and sim_rst signals are activated in the correct sequence atpower up. The figure shows the proper waveforms when the interface is working. SeeFigure23on page32 for the test point’s location.Figure 20: RUIM signal waveform2115i/2116/2116i (RH-66) Nokia Customer Care Baseband Description and TroubleshootingGPS ModuleThe GPS circuitry utilizes RF signals from satellites stationed in geosynchronous orbit to determine longitude and latitude of the mobile terminal. The GPS circuitry is completely separate of the CE circuitry and is located almost exclusively on the secondary side ofthe PWB underneath the display module. (See Figure21on page30.)Use the following steps for basic GPS BB troubleshooting:1.Always perform a visual inspection on the GPS circuitry to see if the problem isphysical (dislodged parts, corrosion, poor solder joints, etc.) before performing adiagnostic test.2.Put the GE and CE in the proper mode.3.Check to make sure that necessary inputs from the CE are good (power, clock,etc.).4.Ensure that these inputs produce the proper outputs.Because of the large level of integration (most functionality is contained in the two ASIC chips), the diagnostics you can perform are limited.2115i/2116/2116i (RH-66)Baseband Description and Troubleshooting Nokia Customer Care ArrayPage 30©2005 Nokia Corporation Company Confidential Issue 1 03/2005Vibra Vbat vibraMIC1PMIC1NAudio amplifierVIO 32KHz crystalBaseband Description and TroubleshootingFigure 23: BB test points (bottom 2)LED driverVCOREVCORE driver19.2MHz clockVBAT in to DC/DCVR3VR5VR7VR6VR4VR1BVR2VR1AVCORE LINVANAVFLASH1VRF_GPSGPS_CLKVBATBSIGNDPower on switchIHFPPOWERONXIHFNFigure 24: BB test points (bottom 3)Baseband Description and TroubleshootingFigure 26: BB test points (top 2)Baseband Description and TroubleshootingTroubleshootingFirst, carry out a through visual check of the module. Ensure in particular that:•There are no mechanical damages•Soldered joints are okay•ASIC orientations are okayThe following hints should help finding the cause of the problem when the circuitryseems to be faulty. Troubleshooting instructions are divided into the following sections:•"Mobile Terminal is Dead"•"Flash Faults"•"Power Does Not Stay on or the Mobile Terminal is Jammed"•"Charger Faults"•"Audio Faults"•"Display Faults"•"Keypad Faults"•"Flashlight Faults"•"GPS Faults"Mobile Terminal is DeadBaseband Description and TroubleshootingBaseband Description and TroubleshootingBaseband Description and Troubleshooting Charger FaultsAudio FaultsBaseband Description and TroubleshootingBaseband Description and TroubleshootingBaseband Description and TroubleshootingKeypad FaultsBaseband Description and Troubleshooting。

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