Chapter 7 Serial__ communication
CCNA2 思科第二学期 v2.0 ERouting Chapter 7答案
请参见图示。
如果所有路由器都运行RIP 第2 版,为什么没有192.168.1.32/27 网络的路由?Rip 第2 版不会在更新中发送子网掩码。
路由器A 并未将RIP 设置为路由协议。
Rip 第2 版默认将自动总结路由。
路由器B 未设置为通告192.168.1.64/30 网络。
2 points for Option 3请参见图示。
下列哪个路由器上的哪条命令可让Router1 获知192.168.0.0/20 网络?Router1(config)# ip classlessRouter1(config-router)# no passive-interface serial 0/1/1Router2(config-router)# version 2Router2(config-router)# neighbor 10.0.0.22 points for Option 3哪两项是选择实施RIP 第 2 版而不是RIP 第 1 版的原因?(选择两项。
)RIP 第2 版支持VLSM。
RIP 第2 版支持16 台以上的路由器。
RIP 第2 版支持有类(而不是无类)路由RIP 第2 版支持路由更新验证。
RIP 第2 版支持多区域。
RIP 第2 版使用Dijkstra 算法而不是贝尔曼-福特算法。
Option 1 and Option 4 are correct.RIP v1 和RIP v2 的相似点有哪些?(选择三项。
)两者都使用跳数作为度量。
两者对无穷距离使用相同的度量值。
两者都向邻居广播其更新。
两者都在更新中发送子网掩码信息。
两者都对更新来源进行身份验证。
两者都使用水平分割来防止路由环路。
Option 1, Option 2, and Option 6 are correct.请参见图示。
路由器East 和West 被配置为使用RIPv1。
两台路由器都会发送有关其直连路由的更新。
East 路由器可以ping 通West 路由器的串行接口,West 可以ping 通East 的串行接口。
单片机毕业设计(论文)
西南交通大学本科毕业设计(论文)基于单片机的多通道数据监测系统A multi-channel data detection system based onMCU年级:学号:姓名:专业:机械电子工程指导老师:2014 年8 月院系机械工程学院专业机械电子工程年级 2010级姓名题目基于单片机的多通道数据监测系统指导教师评语指导教师 (签章)评阅人评语评阅人 (签章) 成绩答辩委员会主任 (签章)年月日毕业设计(论文)任务书班级茅机学生姓名学号 20101426 发题日期: 2014 年 3 月 5 日完成日期: 6 月 10 日题目基于单片机的多通道数据监测系统1、本论文的目的、意义温度压力液位流量是工业自动化常见控制参量,实现其监测与控制是基础性工作,也是机械电子工程专业学生必须掌握的基础内容。
本课题要求学生综合利用所学知识,培养动手能力,在前人工作基础上,改进完善,实现多通道模拟工业温度压力液位信号采集和处理显示,实现上下限报警和电磁继电器和开关通断控制。
该课题对于机电测控实验中心完善实验建设具备价值。
2、学生应完成的任务(1)查阅收集资料、熟悉设计原始资料、完成相关不少于10000个字符的外文资料翻译。
(2)完成毕业实习调研以及实习报告的撰写。
(3)现有温度压力液位流量监测与控制系统调研和资料搜集。
(4)多路参量监测与控制系统方案设计。
(5)接口电路板制作和加工。
(6)实验程序设计与调试。
(7)完整程序和实物一套。
(8)整理完成不少于24000字的毕业论文。
3、论文各部分内容及时间分配:(共 12 周)第一部分调研准备和资料搜集(2周)第二部分方案设计和元器件采购(2周)第三部分硬件制作(3周)第四部分软件调试(3周)第五部分系统集成,撰写毕业论文(1周)评阅及答辩评阅答辩(1周)备注指导教师:年月日审批人:年月日摘要随着电子计算机信息技术的不断发展和完善,采用单片机实现的数据采集系统的应用越来越多。
专四听力之DICTATION
bottle
popular
odd
shop
box
crop
hot
polish
spot
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字母o的读音
美音中/t/ 出现在两个元音之间且处于非重读位置的时候,发音近似/d/
letter
01
matter
02
city
03
better
04
pretty
05
waitor
06
winter
07
chapter
08
常见音变现象:弱音
1
弱音指元音的弱化,即一个单词中的元音在口语中,由于说话速度快或在句中处于次要位置而不发标准读音,变为弱化元音的现象。常见的弱音现象: 长原因弱化为短原因 he been 元音前的辅音省略或辅音前的元音弱读 his have 元音弱化成? us for
英音和美音的几大区别
美音中除了Mrs.中的“r”不卷舌之外,只要含有“r”字母的单词均要卷舌。 spare burglar purpose chairman horse dirty ladder lecture weather
字母a的发音
ask can't dance fast half path chance advantage answer ....
(二)常见错误分析
由音变现象而导致的错误 正确:More energy arrives at the earth's surface in an hour than is consumed in the world in a whole year. 错误:More energy arrives at the earth's surface in a how than is consumed in the world in a whole year. 正确:It is up to the tour operator... 错误:Its up to the tour operator... 正确:Can you imagine how difficult life would become... 错误:Can you imagine how difficult life will become... 正确:Everywhere we turn, we find paper.. 错误:Everywhere we turn, we fine paper.
PC机与单片机之间的串行通讯、数据的发送和接收
PC机与单片机之间的串行通讯、数据的发送和接收【摘要】本文以MCS-51单片机为例,详细介绍了PC机与单片机之间的串行通讯、数据的发送和接收。
在Windows98下利用VB的串行通讯控件可实现PC机与单片机之间的通讯。
其数据的发送和接收采用红外线通信方式,其优点是:省去了有线通信信号线的直接连接,使用简单,移动方便,微机与单片机无直接连接,属完全隔离状态,两者间不会因为电平的不同而造成数据传输的失误,抗干扰能力强。
本设计主要应用AT89C51作为控制核心,并与LED数码显示管、双向可控硅、红外发射与接收相结合的系统,充分发挥了单片机的性能。
其优点硬件电路简单,软件功能完善,控制系统可靠,性价比较高等特点,具有一定的使用和参考价值。
【关键字】MSC-51(单片机),红外,RS-232,电平转换器,串行通信半双工【Abstract】This text take one-chip computer MCS-51 for example , introduce a serial communication, data’s sending and receiving . Under the Windows98 we make use of a communication control of VB to achieve the communication of the machine of PC and one-chip computer. Its data’s sending and receiving adopts the method of the infrared ray communication, its advantage is that it exclude the direct link of signal line of with-wired communication ,and usage are simple, and move is convenience etc. The tiny machine have no direct conjunction with single a machine, belonging to the complete insulation appearance, can't result in the error that data deliver both because give or get an electric shock even and different, the antijam ability is strong.This design is a system that it applies AT89C51 as control core and combine the LED figures manifestation tube, MAX232CPE level changer, infrared’s sending and receiving. The system completely exerts the function of one-chip computer. Its advantage is that the hardware circuit is simple; the software function is perfect; the control system is dependable; the rate of price and function is high etc. So the system has certainly consult value.【Keyword】MSC-51(One-chip computer), infrared, RS-232, Level changer, serial communication,half duplex目录前言3第一章系统分析4 1.1 系统功能的概述 5 1.2 系统要求及主要内容 5 1.3 系统技术指标 5第二章系统总体设计6 2.1硬件设计思路 6 2.2软件设计思路 7第三章硬件电路设计7 3.1 单片机模块设计 8 3.2 红外通信(发射与接收)电路的设计 14 3.3 PC机模块的设计 17第四章串行口通信技术20 4.1 单片机串行口通信 21 4.2 PC机串口通信 24第五章软件设计25 5.1 单片机通信程序设计 25 5.2 PC机通信程序设计 29第六章系统调试30 6.1 硬件调试 30 6.2 软件调试 31 6.3 综合调试 33 6.4 故障分析及解决方案 33 6.5 结论与经验 34结束语35附录36 附录1 电路原理图 36 附录2程序流程图 38 附录3程序清单 41 附录4元器件清单 44 附录5 英文资料 45 附录6 中文翻译 52参考文献56前言单片机的英文名称是Micro Controller unit,缩写为MCU,又称为微控制器,它是一种面向控制的大规模集成电路芯片。
SIMATIC S7-1200基本控制器说明文档说明书
Basic Controller SIMATIC S7-1200Be flexible thanks to networking possibilities Unrestricted / © Siemens AG/s7-1200SIMATIC controllers set new automation scaleTrends Solutions…Ethernet-based field busIT functionality Increased functionality and designflexibilityIncreased Integrated functionalityOptimized usabilityEasy to manage, reduced complexityPROFINET I/O as a standard at all PLCse.g. web server on-board all PLCsFor the same priceMore interfaces, higher performance, memory …e.g. motion control functions / PID controller /Trace / high speed counterse.g. integrated system diagnostics, project upload Simplified commissioning (serial machine building) Reduced, optimized portfolioIncrease of system functionalityHighlight performance•PROFINET Master –decentralized Profinet architectures possible for I/O, HMI, drives, and other Profinet field devices. NO communication module required!•PROFIBUS Master & Slave –decentralized Profinet architectures possible for I/O, drives, and other Profinet devices, including integration into existing system networks.•AS-i Master –The new AS-i-Master is configured in full in the TIA Portal and a new AS-i network can be created very easily with just a few clicks. AS-i networks do not therefore require separate software!•CANopen Master –Enables connection with CANopen devices, as well as with devices running Transparent CAN 2.0A.Highlight performance•Modbus TCP –Enables communication with devices as Modbus master or slave. Only one TCP function block is required for this. •IO-Link Master –Fast and easy integration of the SIRIUS compact starter, M200D starter and SIRIUS soft starter for simple starter control.•GPRS/LTE module –Easy implementation for data recording and control of decentralized computer.•TCP/IP –Via the instructions for open communication you can communicate with other CPUs, other PCs and with devices that use TCP/IP communication protocols as standard. NO communication module required!SIMATIC S7-1200 in the TIA PortalHighlight performance•RS-485, RS-422 & RS-232 –The S7-1200 CPU supports point-to-point (PtP) communication for character-based serial protocols, and this provides maximum freedom and flexibility for the use of PtP communication instructions in the user program.•Modbus RTU –Using the Modbus instructions the Modbus master or slave is able to communicate with devices that use the Modbus RTU protocol.•USS –Using simple USS instructions you can control the operation of drives that support the USS (Universal Serial Interface) protocolS7-1200CPUSMCM CP SM 1278CB 1241 RS485SINAMICS V20USSMODBUS RTUModuleCommunicationCM 1241RS232serial CM 1241RS422/485serialCM 1243-2AS-i master CM 1242-5PROFIBUS DP slave CM 1243-5PROFIBUS DP masterCP 1242-7GPRS Mobile communications telecontrolCP 1243-7LTE Mobile communications telecontrolCP1243-1Ethernet VPN/Firewall, Telecontrol Ethernet (DNP3, IEC 60870)RF120C RFID 1 Reader port; RS422CM CANopenCANopen3rd party: HMS 021620-BS7-1200 integrated PROFINET (Ethernet) interface… with the STEP 7 software•CPU hardware configuration•Loading a project•Monitoring/amending runtime tags•Set runtime I/O statuses•Diagnostics information... with HMI panels•Data from or to the CPU•System diagnostics... from CPU to CPU•Open communication with T-block instructions•Supported protocols: TCP/IP, ISO on TCP, UDP, S7 Com. (PUT/GET)MRP -Media redundancy protocolBased on ring topology (IEC 61158-5-10)Max. 50 nodes in the ring•PROFINET IO-Controller•PROFINET IO-Devices•Components of the network infrastructure (IE switches) 200 ms reconfiguration timeCPU 1215/17 as MRP Client at least FW V4.1 Configuration and diagnostics in STEP7Industrial Ethernet PROFINET•Improved plant availability•More flexibility•Lower costs since less equipment required > V4.1< V4.2S7 routing•Enables a connection between different subnets • A SIMATIC S7-1200 station acts as an S7 router •Based on PROFINET•Actually only with CP 1243-1 at least V2.0 (6GK7243-1BX30-0XE0) andCPU FW V4.2192.168.0.1 192.168.0.3 177.168.0.1192.168.0.2S7 routedConnectionSubnet1Subnet 2CommunicationWebserverIntegrated Web server•Access to system and process reports as well as identification data •System diagnostics for all configured assemblies centrally anddecentralized•Communication diagnostics on parameters, statistics, connection status •Access to process data via tag tables and freely definable tag lists •Pages to be defined by the user•Firmware updateArchive•Access via Webserver using Filebrowser for reciprocal exchanges of data in .csv format•Logging of user-defined tagsStation webserverVarious types of communication access: CPU PN interface, CP 1243-7 LTE,CP1242-7 V2•Central access via CPU page independentlyof the interface•User is then able to browse to the CP-specific webpages from thereuniform, consistent webserverfor entireS7-1200 stationRemote access viaInternet/mobile communicationsPN accessPROFINET i-Device•Simple configuration of S7-1200 CPUsin a master/slave architecture through reading and writing the reciprocal I/O images•Connection of CPUs in different projects•NO PN-PN coupler required (transparent network)IO controllerCPU1IE / PROFINETIO deviceOperational systemApplication / userprogramIO process imageInputaddr.Outputaddr.Operational systemApplication / userprogramIO process imageInputaddr.Outputaddr.PROFINET IOIO controller 1IO device 2IE / PROFINETIO device 1IO device 3i-deviceSavings with costs / installation / wiring of additional hardwareCPU2•Access for up to 2 controllers on S7-1200 as i-device •Rapid exchange of data in real time between S7-1x00 CPUs•Incorporation of 3rd party controllers under PROFINETAs ofV4.1Shared I-DeviceSerial communication•ASCII protocol (character-based serial communication)uses STEP 7 PtP instructions•USS Drive protocol is programmed with STEP 7 USSlibrary instructions•MODBUS protocol is programmed with STEP 7MODBUS library instructions•3964R ProtokollRS232RS485/422USS drivesUpdate rate Array•Fixed update rate (as fast as possible)•Enable instructions in an interrupt alarm OB in order toset a user-defined update rate.Support for drives•Maximum 15 drives per CM (communication module) supported•Non support:•MM3 drives•Deregistration of missing drives•S7-1200 CPU up to 8 IO-Link master modules -centralized•Data rate COM1 (4.8 kbaud), COM2 (38.4 kbaud), COM3 (230.4 kbaud)•Standard IO Mode (SIO Mode)•up to 4 IO-Link devices (3 wire) or 4 standard actuators•Diagnostics configurable for each port •I&M identification•IO-Link parameter allocation with S7-PCT (Port Configuration Tool) V3.2IO-Link supportSM 1278 4xIO-Link master (6ES7 274-1XK30-0XA0)•Point-to-point connection, no bus system•Existing wiring topologies are retained•Standard sensor/actuator cable (three wires with one signal wire), unshielded, 20 m in length,no special-purpose cable / connector•Manufacturer-independent communication standard for the PNO•Non-stop consistent communication•Cyclical, bidirectional process data communication (typ.2 ms cycle)•Non-cyclical service data transmission betweensensors/actuators and the controller as required •Integrated differentiated diagnostics alarms• LinkSwitchingdevices<20 mControl cabinet<20 m3RA6compact starters3RA27function modules for feeders3UG4monitoring relays3RW40soft startersSIMATIC RF120C –Fast communication module for S7-1200RF120CInterface to the applicationInternal S7 busConnection technology S7-1200 setup technology; screw terminals for 24 V supply Interface to the reader RS422 incl. 24 Volt; up to 115.2 KBaud Connection technology Submin-D connectorRFID system RF200, RF300, RF600, MOBY D/U, MV400FB, driver Instructions: Read, Write, Read_EPC-Mem, Write_EPC-Mem, Set_Ant_RF300, Set_Ant_RF600, Reset_Reader; based on FB101Number of readers 1 per RF120C; 3 per S7-1200Degree of protection IP 20Dimensions (W x H x D)30 x 100 x 75•Level measurement in silos and bunkers •Plattform scales•Force and tension measurements •Typical industries: Food & Beverage,Chemicals, Cement, Aggregate•Legal for trade certificate according OIML-R76•CPU 1212C →up to two SIWAREX modules •CPU 1214C orhigher→up to eight SIWAREX modules •Full parameter access from the CPU via free downloadable function block →Complete commissioning andcalibration via CPU/HMISIWAREX WP231 –Basic applications•Up to eight parallel connected analog 350 Ohm load cells per SIWAREX (1mV/V, 2mV/V, 3mV/V or 4mV/V)• 1 SIWAREX = 1 scale• 4 digital inputs / 4 digital outputs • 1 analog output•Ethernet (Modbus TCP & SIWATOOL)•RS485 (Modbus RTU)SIWAREX WP241 –Belt weigherapplications•Belt scales (Cement-, Aggragate plants, Mines, Food & Beverage plants)•Weigh feeder applications (Food & Beverage, Chemical, Steel)•CPU 1212C →up to two SIWAREX modules •CPU 1214C or higher→up to eight SIWAREX modules •Full parameter access from the CPU via free downloadable function block →Complete commissioning andcalibration via CPU/HMI•Up to eight parallel connected analog 350 Ohm load cells per SIWAREX (1mV/V, 2mV/V, 3mV/V or 4mV/V)• 1 SIWAREX = 1 scale• 3 digital inputs / 4 digital outputs / 1 speed sensor input • 1 analog output•Ethernet (Modbus TCP & SIWATOOL)•RS485 (Modbus RTU)SIMATIC S7-1200SIWAREX WP251 –Dosing , Batching and Bagging applications•Dosing and batching scales (Chemical-, Food-, Pharma, Packaging industries)•Bagging machines (Bulk solids industries)•Eichfähig gemäß OIML-R51, R61 und R76•CPU 1212C →up to twoSIWAREX modules •CPU 1214C or higher→up to eight SIWAREX modules •Full parameter access from the CPU via free downloadable function block →Complete commissioning andcalibration via CPU/HMI•Up to eight parallel connected analog 350 Ohm load cells per SIWAREX (1mV/V, 2mV/V, 3mV/V or 4mV/V)• 1 SIWAREX = 1 scale• 4 digital inputs / 4 digital outputs • 1 analog output•Ethernet (Modbus TCP & SIWATOOL)•RS485 (Modbus RTU)•RS485 (Modbus RTU)•A CANopen connection to a S7-1200 systemenables integration between devices and the S7-1200 system •Up to 3 CANopen modules per S7-1200 CPU •Connection type to the CAN: 9-pin DSUB (male)•Up to 16 CANopen nodes per module•256 bytes each for inputs and outputs with the CANopen module•Can be integrated in the hardware catalog of the TIA Portal configuration suite •Ready-made function blocks for simple PLC programming available in the TIA Portal • LinkController Area Network CANopen 021620-BMODBUS communication•Use of a CM or CB 1241 module for serial communication•MODBUS instructions of the communication module for simplified MODBUS RTU operation.•MB_COMM_LOAD for basic initialization of the master and slave operation•MB_MASTER and MB_SLAVE for controlling the report and connection allocations•Modbus addressing supports a maximum of 247 slaves (slave numbers 1 to 247).•Maximum of 32 devices per segment in the Modbus network depending on the loading and drive functions of the RS485 interface•Repeater required if using more than 32 devices to extend to the next segment•Open User Communication MODBUS TCP instructions usethe PROFINET port integrated in the CPUOverview of CP 1243-1 product features•Single-width S7-1200 enclosure (30 x 110 x 75)•Temperature range in operation: -20°C to +70°C•Standard rail mounting•Diagnostic LEDs (overall status and detail)•Power supply using backplane bus•1 x Ethernet Port RJ45 (10/100 Mbit/s) for connectinga modem/router such as SCALANCE M•Integrated security functions (VPN and Firewall)•Integration to Scada Systems via Telecontrol Protokolls(DNP3, IEC 60870)Communication Processor for connecting S7-1200 to Ethernet network withadditional Interface and security features firewall and VPN. Integration toScada Systems via Telecontrol Protokolls (DNP3, IEC 60870, TelecontrolBasic).Overview of CP 1243-7 product features•1 connection to LTE (4G) mobile network(different versions for EU and North America)•Single-width S7-1200 enclosure (30 x 110 x 75)•Temperature range in operation from -20ºC to +70ºC•Standard rail mounting•Diagnostic LEDs (overall status and detail)•Integrated security functions (VPN and Firewall)•Access to the CPU Webserver•Email and SMS Alarms•Process Monitoring and Control via Cellular networkPROFIBUS DP-Master CM 1243-5•Connection for up to 16 DP slaves•PG/OP communication:up to 4 connection for HMI and 1 connection for PG •S7 communication:4 S7 connections to other S7 stations with PUT/GETPROFIBUS DP-Slave CM 1242-5•as an intelligent DP slave for communication for the S7-1200 with any other DP masterCommunication for S7-1200 CPUs according to PROFIBUS standard IEC61158/61784SIMATIC S7-1200PROFIBUS communication DP master CM 1243-5 and DP slave CM 1242-5Challenges need innovative answersIndividualization Globalization Production Logistics •Global alliance ofproduction and suppliers •New business modelsProduction•Customized mass production•Top quality at a competitive priceTime to Market New Technology•Critical to success inhighly competitive industries•Pressure on productivity increases, shortening time for new developmentSustainabilityEnergy Consumption•The efficient use of energy and environmentally safe materialsAlways the appropriate controller with comprehensive functionalities!Innovations across the entire automation life cycle!Engineered in TIA PortalSecurity IntegratedIntegrated system diagnosis Technology Integrated+Design and Handling+Safety IntegratedInnovative system functions for more productivity!Protecting intellectual property and investment Protecting against unauthorized project changesSecurity integratedFor Efficient fault analysis, Uniform display concept and reducing plant downtimesSystem DiagnosticsInvestment protection while replacing S7-1200 with S7-1500 thanks to compatibility of programsScalabilityUser-friendly products, high efficiency and a scalableproduct portfolioFeature / Function BenefitIntegrated PROFINET◆Web server for service-and diagnostic informationTechnology Integrated◆perfect integration of drives through motion control functionalities and PROFIdriveIntegrated Trace functionality◆Program-and application diagnostics at real-time for recognizing even sporadic problemsUse of all TIA Portal advantages◆Efficient programming, commissioning and service toolshighest engineering requirementsEasily adapted to suit your needsFeature / Function BenefitSystem ModularityModular board concept is integrated customization ◆Adding I/O without increasing theCPU footprintExtensive built-in hardwarecapabilitiesEthernet,analog in/out-puts, MC I/O, HSC I/O, SD memory ◆Reduced need for additionalspecialty modules,smaller footprintand lower costOne Engineering SoftwareOne user program for logic, HMI, networking & drives. ◆Reduced engineering time/cost, easier to maintain, easier to reuseSafety IntegratedOne Controller for fail-safe and standard-automation◆reduction of types-and components by single automation system for Standard and SafetyOne Controller for Standard andSafetyNewNewFeature / Function Benefit•Basic Controller with SafetyIntegrated•Connecting ext. devices viaPROFIsafe•CPU 1212CF◆•One Controller, one Network andone Engineering for standardand fail-safe automation tasks•Energy Meter ModuleSM1238 AI ◆•Central Measurement andHandling of energy data •MRP at 2 Port CPUs 1215 / 17as client (FW 4.2)•S7-Routing (FW 4.2)◆•Higher flexibility in network set-up (flexible topology) and highernetwork availability •Userdefined web pages as startpages (FW 4.2)◆•Individual and easy adaption of(CPU) web pages to applications•Backup / Restore with retaindata (FW 4.2)◆•Protection of data loss(incl actual process values)Easy PLC selection thanks to an optimized Portfolio2xTMCPU 1211C-1PN CPU 1212C-1PN CPU 1214C-1PN CPU 1215C-2PN CPU 1217C-2PN CPU 1212FC CPU 1214FC CPU 1215FCCSM PM 13x CM / CP22x I/Q 11x SB 1x CB 1x BBSM 1226 F-DO 2x Relay SM 1226F-DO 4 x 24 V DC SM 1226 F-DI 16 x 24 V DCMarienhöher Milchproduktion Agro Waldkirchen GmbH / Waldkirchen, Germany -S7-1200 and Energy Meter ModuleAllow internal balancingduring operation without high effort and cost1Efficient operation and cost optimization2ReliableSystem Protection3Transparency in energy consumption... through the acquisition of energy data in acompact solutionIncrease of energy efficiency ... through analysisof the reactive power consumptionGuaranteeing plant availability ... by monitoring the current peaksCPU 1212C with SM1238 Energy Meter ModuleCPU 1212C with SM1238 and visualization via KTP 400CPU 1212C with SM1238 and visualization via KTP 400ChallengePreviously Now -CPU 1212CJanitza UMG96SM 1238 Energy Meter -Basic Panel, KTP 400TIA Portal BasicProducts usedCustomer benefitsProducts/solution Energy data acquisition of direct marketing(butcher shop, diary, cheese factory, sales room), transparency and internal balancing in an agricultural enterprise End customer /F&BWaldkirchen/GermanyiProject informationSIMATIC Controller Get more Information…Always up-to-date!•interesting news from and about AS, such as product innovations, success news, best practice information etc.Newsletter/newsletter Detailed product information and related subjects!•Product Websites •Twitter, Youtube..Internet/S7-1200References CenterFrom customer to customer! •Customers gives account to there experiences using our Products for their applicationsGetting Started/automation-tasksEasy Introduction to the new SIMATIC controller generation!•Learn about the new possibilitiesand get to know the new Hardware even betterhttps:///referen zen/#language=enSubject to changes and errors. The information given in this document only contains general descriptions and/or performance features which maynot always specifically reflect those described, or which may undergo modification in the course of further development of the products. The requested performance features are binding only when they are expressly agreed upon in the concluded contract.All product designations, product names, etc. may contain trademarks or other rights of Siemens AG, its affiliated companies or third parties. Their unauthorized use may infringe the rights of the respective owner.。
SP16系列编程器用户手册说明书
SP16 SERIES PROGRAMMERUSER MANUALRevision B5Before using the programmer, please read this manual carefully and operate the programmer correctly as required. Failure to follow the instructions will result in damage to the programmer and no warranty service!深圳硕飞科技有限公司SHENZHEN SOFI TECHNOLOGY CO.,LTD .WEB: 硕飞科技ContentsChapter1. Introduction into Products ∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 3 Performance and Characters∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 3Correlation Table of SP16 Performance∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 4 Chapter 2. Programmer Hardware∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 5 Chapter 3. Quick start∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 6 Programming steps for on-line mode∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 6LED status for On-line programming mode∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 8 Chapter 4. Off-line programming∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 10 Download Off-line Data∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 10Off-line Operation - Manual Mode∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 12Off-line Operation - Automatic Control Mode∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 12ATE interface definitions∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 12LED status for off-line programming mode ∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 12View Off-line Data ∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 13 Chapter 5.ISP Programming∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 14 Use ISP programming mode∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 14ISP Interface∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 14ISP cable∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 14Target devices connections∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 15ISP Power supply mode∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 16 Chapter 6. FlyPRO MCP multi-machine control software∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 17 Function Introduction∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 17Usage Instruction∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 17FlyPRO_MCP function limitations∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 19About USB hub∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 19 Appendix I FAQ∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙20 Appendix II Disclaimer ∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 22 Appendix III Revision history ∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙ 23Chapter 1. Introduction into ProductsPerformance and characters⚫Designed specifically for serial EEPROM / SPI FLASH device, faster and more stable than general-purpose programmer⚫USB power supply and communication, no external power supply required. Small size (size: 103x71x23mm), easy to carry⚫Supports a full range of 93/24/25/BR90 memories, supports software upgrades to increase support for new devices⚫Supports detection of 25 series SPI FLASH device models;⚫Supports pin contact detection to improve the reliability of programing;⚫Supports ISP program. On-board patch devices can be directly connected to be programmed⚫Standard 40Pin ZIF socket, applicable to wide/narrow devices and general adapters⚫Overcurrent protection function to effectively prevent misplaced or destroyed device’s effects on the programmer;⚫Programmer has a built-in 32-bit high-speed processor that provides high-speed programming and precise timing;⚫Supports off-line programming without connecting computers. Has a large data memory built-in that can supports up to 512Mbit device to program off-line (Note 1);⚫Mass production programming mode, automatic detection of device placement and start programming operation;⚫ATE interface function that supports automatic programming machine to control (Note 2);⚫Supports one computer to connect multiple programmers programming at the same time, one computer can connect up to 8 programmers⚫The buzzer present voice prompt for success or failure⚫Programmable voltage design, adjustable from 1.7V to 5.0V, supporting 1.8V/2.5V/3V/3.3V/5V devices; ⚫Provide device self-test function;⚫Support WinXP (SP2), VISTA, Win7/Win8/Win10 (32bit/64bit)Note 1: Off-line operation is limited to SP16-F, SP16-FX mode; off-line program does not support ISP mode Note 2: SP16-FX mode onlyCorrelation table of SP16 performanceModel SP16-FX SP16-F SP16-B maximum capacity of Supporteddevices512MbSupported device voltage programmable voltage adjustable from 1.7V to 5.0V , supports1.8V/2.5V/3V/3.3V/5V...Off-line programming (Note 1)Y Y N Built-in memory for off-line data 512Mb -On-line mass production (Note 1)Y (automatic detection device placement/removal) Multi connection (Note 2)YAuto serial number Y(On-line program mode only)Buzzer prompt Y (off-line mode only) N Overcurrent/short circuit protection YZIF Socket ARIESISP programming Support 24/93/25 series (clock adjustable) OTP area read and write (Note 3)supportDevice configuration (Note 3)supportAutomatic programing MachineSupport (ATE)Y N Nprograming speed (Note 4)GD25Q16(SOP8) Off-line P+V=6S; on-line P+V=7S W25Q128FV(SOP8) Off-line P+V=47S; on-line P+V=52S MX25L12845E(SOP16) Off-line P+V=62S; on-line P+V=68Soff-line data download speeds 41S@128Mb -Support the number of devices(Note 5)10284 10284Note 1: Off-line programming means the model can program without computer, suitable for mass production.On-line mass production refers to connecting to a computer for batch programming.Note 2: One computer can maximum connect eight SP16 series programmers (need to work together with FlyPRO_MCP software, search Chapter 6 for specific usage);Note 3: Depending on the software function, not all the devices are supported;Note 4: The programming speed is tested by the complete device random number, “P” is programming, V “is”verification;Note 5: Based on FlyPRO software version V4.48 (2019-05-29). The devices will increase with software upgrades. The number in the table is for reference only. Please download the latest supported software from Sofi official website download center.Chapter 2. Programmer hardwareProgrammerAccessoriesUSB Cable ISP Cable 5V/1A Power adapter⚫ The appearance of different models and batches may vary, please refer to the actualproduct;⚫ The power adapter is used to power the programmer during offline programming, andonly SP16-F/SP16-FX which supports offline programming has equipped ;⚫ The programmer is equipped with a device adapter (IC socket) as standard, pleasechoose according to your needs.USB InterfaceZIF SocketPWR(Power) STA(State) ISP/ATE InterfaceChapter 3. Quick startProgramming steps for on-line mode1. Install programmer control software: FlyPRO (Includes USB driver, single control software FlyPRO,multi-control software FlyPRO), software download website: 2. Connect programmer to USB port of computer with a USB cable.3. Run the single control software FlyPRO ,the programmer hardware will be automatically connected afterthe software starts. After the connection is successful, the software status bar will display theprogrammer mode and product serial number, and then you can program devices.The following takes a device W25Q32BV packaged of SOIC8 (208mil) as an example to introduce the steps of programming devices:4. Click the toolbar button,or menu [Device] - [Select Device], open the "Select Device" dialog box, select the device model to be programmed and the corresponding package"W25Q32BV[SOIC8]". You can quickly find the device by entering the device model keyword through the search box.Connect to computer USB portNOTE:The “W25Q32BV” in the device listdoes not have a “[ ]” suffix,indicating that the model is an DIPdevice;"[SOIC8]", "[SOIC16]", "[WSON88x6]", "[WSON8 6x5]", etc. indicatethe package type of device;“[ISP]” means to use ISP mode toprogram, please refer to “Chapter5. ISP progr amming”.5. Load programming fileClick toolbar button,or menu [File] - [Load File] to load the data file of program.6. Set operation optionsClick the toolbar button,or menu [Operation] - [Operational Options] to deviceprogramming settings. In most cases, you can use the default settings. For details on the operation options, please refer to the helper topic of the programmer software.7. Place device to ZIF SocketThe DIP packaged device can be directly inserted, and the non-straight-inserted device needs to be matched with IC socket. In this example, an SOP8 wide-body programing seat is used. First, lift ZIF Socket’s handle, insert the bottom side of IC socket into the bottom of ZIF Socket, press the handle, and then put the device into IC socket. Pay attention to the direction of the first leg of device.Pin1 Pin1Physical map Device pin position diagram For other device s’ placement (including IC socket information), please open the device information in the FlyPRO software for viewing. Most of 8-pin devices are inserted into ZIF Socket according to thecorresponding relationship on the right. A very small number of devices are placed in a special way.Please pay attention to the prompts that the software pops up.Note: ZIF Socket is only used to place the device to be programmed (including IC socket). It is forbidden to programming devices which have already been welded on circuit board, through wires from ZIF socket. The peripheral circuit on the board will cause the operation to fail. Serious conditions can cause permanent damage to the programmer hardware. The manufacturer is not responsible for anyconsequences that may result from this incorrect operation. The EMI method is recommended for the device that has been soldered. Please refer to "Chapter 5. ISP Programming".8. Perform programmingThere are three modes for programming, including manual mode, automatic mode, and automatic mass production mode. Choose one of the modes to operate according to different situations.Manual modeSelect the "Manual Operation" page in the command bar on the left side of the main software window.Follow the typical operation steps according to the device type.Automatic modeSelect the "Automatic Programming" page in the command bar on the left side of the main software window. First set the operation content, and then click the "single program" button. The programmer then performs the steps set in "Operational Content" to complete programming process of one device.Typical steps:➢Program SPI FLASH (25 series): Erase → check space →program → check➢Program SPI FLASH (25 series, brand new blank device): Program → check➢Program I2C EEPROM (24 Series): Program → Verify➢Read device data and save it to file: Read → Verify → SaveProduction modeAfter clicking “Production Programm ing” button, the programmer automatically detects the placement and removal of the device and automatically completes the steps in “Operational Content”. The software pops up a message box to remind users to pick and place devices. It is convenient and quick to program without using mouse or any buttons.LED status for on-line programming modePower LED (PWR):A long red light indicates that the power supply is normal, and a red flash indicates that the programmer has detected a device short circuit or excessive current.Status LED (STA):STA LED status Status descriptionOrange Programming deviceGreen Device programming completed, programming successfullyRed Device programming failed●The above operation is only a demonstration of the conventional programming stepsof the general device,and the specific operation needs to be determined accordingto actual needs.●For detailed instructions on using the software, please refer to the help topic ofFlyPRO software.Chapter 4. Off-line ProgramingSP16-F、SP16-FX supports off-line program. In this mode, programmers don't have to be connected to a computer. Programmer has a built-in 128Mbit data memory, eliminating the need for additional storage. Off-line program is easy and efficient. In this mode, programmers automatically detect the placement of devices, start programming, and present results via state lights and a built-in buzzer.Off-line mode includes two methods: manual operation and automatic control:In manual operation mode, programmer automatically detects placement and removal of device. Indicates working status and programming result through state lights and built-in buzzer.In automatic control mode, connecting to automatic control machine through ISP/ATE multi-function interface which controls its function and outputs corresponding indication signals.SP16-F supports off-line manual mode only; SP16-FX supports two modes above, and it can be operated by any one of them through software settings.Download off-line dataBefore off-line operation, you must download off-line data into programmer by using computer in advance. The data download operation steps are as follows:1. First connect programmer to computer with a USB cable and then turn on the FlyPRO software.2. Select the correct device model.3. Load files that need to program.4. Click the menu [Device] - [Off-line Data Management] - [Download Off-line Data] to open off-line data downloaddialog box and download off-line data. As shown below:Controlled by ISP/ATE interfaceThis option can be used only in SP16-FX. When this function is checked, SP16-FX works in the automatic control mode and works with automatic machine.If this function is not checked, SP16-FX works in manual mode.Erase optionThis feature is currently supported by SP16-F/SP16-FX and available for FLASH class devices only.In order to reduce time of erase options, it can be used to set operation mode when operation content box contains erase option.Forced Erase: Always erase the device in its entiretyNon-empty erase: Perform erase operation when the device is not blank. The programmer will first perform a blank check on the device. The erase operation will be performed only if it is not blank. If the device is already blank, the erase operation will not be performed.Device Type Operation Content setting Erase Option All blank FLASH devices program→check -All non-blank FLASH devices erase→program→check Forced eraseBlank device mixed with non-blankerase→program→check Non-empty erase deviceand it will be disabled in gray. It is enabled only if there is an erase item in the action content.For other setting options, please refer to the help topic of FlyPro software.5. Disconnect the USB cable between computer and programmer after completing off-line data download, and then programmer can work independently from the computer.Off-line operation - manual modeThe steps for the programmer to operate off-line are as follows:1. Power the programmer with the power adapter that came with the product.2. After the programmer is powered on, the internal off-line data will be checked to verify that the data iscomplete and accurate.This takes 3 to 25 seconds. STA indicator will flash green if the test passes, indicating that theprogrammer has entered to off-line programming mode. STA displays a red flashing state if the test fails, i ndicating that there is no valid off-line data in the programmer, and off-line programming cannot be started.3. The programmer's STA indicator flashes green to indicate that it is waiting for the device to be placed.4. STA stops flashing and being orange indicates that the programmer has detected the device and isprogramming.5. STA displays green or red indicates that device is programmed. Green indicates successful, and redindicates failed. At the same time, the programmer begins to wait for the current device to be removed fromZIF Socket. If the buzzer prompt function is turned on, programmer will make sounds when programming is completed.6. After detecting the device removal, programmer repeats steps 3 through 5 to program next device.Off-line operation – automatic control modeThe automatic control mode is only applicable to SP16-FX, which is used to cooperate with automatic equipment such as automatic programming machine and robot to realize automatic operation of devices. When downloading off-line data, check the "Control via ISP/ATE interface" option to enable this feature. In this mode of operation, the programmer's ATE interface provides a START enable signal, and OK / NG / BUSY indicator.ATE Interface definitionsLED status for off-line programming modeSTA LED status Status description (Manual mode) Status description(Automatic control mode, SP16-FX only)Flashing red The programmer did not downloadoff-line dataThe programmer did not download off-line dataFlashing green Waiting for device placement <no status> Orange Programming device Programming deviceGreen Device programming completed,programming successfully(Waiting for device removal)Device programming completed,programming successfullyRed Device programming failed(waiting for device removal)Device programming failed 3--BUSY 5--OK 9--NG7--START 2—VCC 4/6/8/10--GNDView off-line dataOff-line data that has been downloaded to the programmer can be viewed with FlyPRO software.Click the menu [Device] - [Off-line Data Management] - [View Off-line Data] to open off-line data viewing dialog box, as shown below:●Offline working mode does not support ISP mode to program.●Use the power adapter supplied with the product when working offline. Do not use otherpower adapters.Incorrect use of other power adapters may result in damage toprogrammer.Chapter 5. ISP ProgramingThe ISP is called In System Program, which is on-line programming. The ISP programming mode only needs to connect several signal lines to the relevant pins of the onboard device to be read and written, which can eliminate the trouble of removing and soldering devices.Use ISP programming modeThe SP16 series programmer only supports ISP mode programming of some devices. When the device model with the "[ISP]" suffix is selected in the software, it means that ISP mode is used for programming. (Selecting the device mode without ISP suffix, you can only program it through ZIF Socket. Do not select wrong mode for both programming methods.)Note: ISP program should use a dedicated ISP interface to connect, do not connect through wires from ZIF socket.ISP interfaceThe SP16 Series Programmer provides an additional ISP interface as shown below:ISP/ATE interface ISP interface definiensISP CableThe ISP cable is a 10-color color cable with a 5x2 standard plug on one end and access to the programmer's ISP/ATE interface. The other end is 10 DuPont connectors that are connected to the corresponding pins on the target board. The following figure shows the BIOS upgrade for the ASUS motherboard with SPI interface reserved.ISP/ATE接口1 97532 10864接口引脚图The correspondence between the color of the connecting line and the pin number is as follows:Color Pin number Color Pin numberbrown 1 Blue 6Red 2 purple 7 Orange(or pink) 3 Gray 8 Yellow 4 White 9Green 5 Black 10Target device connectionsCommon 25 series and 93/24 series FLASH/EEPROM connection diagrams are as follows Typical 25 series FLASH connection diagrams Typical 93 series EEPROM connection diagramsTypical 24 series EEPROM connection diagrams NOTE:Different devices will have different connection methods.For detailed connection information of the device, please open the device information in FlyPRO software for viewing.ISP Power supply modeWhen using ISP program, there are two power modes available for the target device. The power mode can be set in the operating options of FlyPRO software.⚫Powered by programmerProgrammer supplies voltage to the target board at a supply voltage of 1.8V, 2.5V, 3.3V, or 5V (set in operating options of FlyPRO software).In this mode, if the programmer detects that the target board power supply already exists, it will give an error message about the power supply conflict. Programmer has equipped with an overcurrent detection function that limits the current to 250mA when power is supplied to the target board. Overcurrentprotection will occur when current exceeding this range. If the target board's operating current is greater than 250mA, use the target board self-powered mode.⚫Target board self-poweredProgrammer does not supply power to the target board in this mode.SP16 programmer can support a target voltage range of 1.65V~5.5V. The signal driving voltage of the ISP is automatically adjusted following the VCC voltage of the target board.● ISP programming is relatively complicated to implement , you must be very familiarwith the circuit;● The interference introduced by lead wire or other circuits on the circuit board maycause ISP programming to fail. Please remove the device and use conventional ICsocket to program.● For more detailed usage, please refer to the software help topic or the electronicmanual.Chapter 6. FlyPRO MCP multi-machine control software Function Introduction●FlyPRO MCP is the multi-machine control software of SOFI SP16 series programmer●Up to 8 programmers can be connected to a single computer●Can support 8 programmers to work at the same time, including: automatic programming (single), massproduction programming, download off-line data (SP16-F/SP16-FX)●Support the management of project filesUsage InstructionStep 1: Install multi-machine applicationStarting in 2016-10-10, FlyPRO installation package includes SP16 series of multi-machine operating software (FlyPRO MCP),If it has been installed, Skip step 1.●Download FlyPRO programmer software (SP8 series/SP16 series) from SOFI official website:●Unzip the downloaded file and install itStep 2: Connect multiple SP16 programmers to the computer using a USB hubStep 3: USB driver installation●When using for the first time, the computer needs to install the driver for each USB interface programmer.Usually the computer will do this automatically.●USB driver installation may take several minutes, please wait for the installation to complete●After all the drivers of programmer are installed, restart the programmer.●If the USB hub has a power switch, re-switch the USB hub once.Step 4: Start the FlyPRO_MCP software●Click the desktop image to open the multi-machine control software.⚫After startup, you need to select the mode of programmer and enter on-line or demo mode as needed.Step 5: Create a new programming project / or open the project fileThe detailed operation steps are as follows:Step 6: ActionFlyPRO_MCP function limitationsCompared to the standard stand-alone software FlyPRO, the following functions are not supported in multi-machine software.●Automatic serial number●Manual operation (multi-machine software only supports automatic programming, mass productionprogramming and off-line data download)●Programmer device self-test●Programmer firmware upgrade●Pin contact failure prompt (multi-machine software will directly report error and terminate the operationwhen pin contact is poor)●Test device mode●View off-line information in the programmerTo apply the above information, please use the standard stand-alone software FlyPROAbout USB hub●To ensure performance, please use a USB hub with an external power supply.●It is recommended to use USB3.0 hub.Appendix I FAQ☺Why 24 series device does not have an erase function◼The device is based on EEPROM technology, device data can be directly rewritten without pre-erasing, so there is no erase operation available.◼If you want to clear the device data, please write FFH data directly to the device.☺What is the reason for the software prompt device initialization error?When programming some devices (such as 24 series devices), the programmer will perform initialization detection on the device. The error will be prompted if the detection fails. Device initialization errors usually have the following reasons:◼The device is not placed on ZIF Socket, or the device pins are not in contact.◼Device placement direction or position error◼There is a problem with the device itself◼The device mode does not match (the model selected in the software is different from the actual placement on the lock seat)◼ISP connection line problem (ISP mode only, device with [ISP] suffix)☺Why the programmed device cannot work properly?The programmed device does not work properly for the following reasons:◼The data file was not loaded correctly before the device was programmed◼There is a problem with the data file itself◼Programming operation steps are wrong◼Device working circuit / voltage problem☺Is it possible to program devices which have already been welded on circuit board through wires from ZIF socket?No.The ZIF Socket is only used to place the device to be programmed (including IC socket). It is forbidden to operate the device soldered on the circuit board through wires from ZIF socket. The peripheral circuit on the board will cause the operation to fail and result in permanent damage to the programmer hardware.Manufacturer is not responsible for any consequences that may result from this incorrect operation. The EMI method is recommended for the device that has been soldered. Please refer to "Chapter 5 ISP Program".☺Can img file be programming?The file encoding format supported by the programmer software is binary and hexadecimal (Inter HEX), the binary file is suffixed with *.bin, and the hex file is suffixed with *.hex.Img is just a file suffix, does not represent the file encoding format, usually (90% or more) such files are binary coded, can be loaded directly in the software. The software automatically recognizes whether the file is binary encoded and loads it in the recognized format.In order to ensure the accuracy of file loading, we recommend that users check the buffer checksum and file checksum with the engineering technician (or file code provider/customer, etc.) after loading such files.The information will be displayed below the main window of program software).。
GL823K Datasheet
GL823KUSB 2.0 SD Card Reader ControllerDatasheetRevision HistoryTable of ContentsCHAPTER 1GENERAL DESCRIPTION (6)CHAPTER 2FEATURES (7)CHAPTER 3PIN ASSIGMENT (8)3.1SSOP16 Pinout (8)3.2Pin Description (9)CHAPTER 4BLOCK DIAGRAM (10)4.1OCCS USB PHY (10)4.2SIE (10)4.3EPFIFO (10)4.4MCU (10)4.5MHE (11)4.6Regulator (11)4.7PMOS (11)CHAPTER 5ELECTRICAL CHARACTERISTICS (12)5.1Temperature Conditions (12)5.2Operating Conditions (12)5.3DC Characteristics (12)5.4Memory Card Clock Frequency (12)5.5Maximum Ratings (13)CHAPTER 6PACKAGE DIMENSION (14)CHAPTER 7ORDERING INFORMATION (15)List of FiguresFigure 3.1 – SSOP 16 Pinout Diagram (8)Figure 6.1 – SSOP 16 Pin Package (150 mil) (14)List of TablesTable 3.1 – Pin Description (9)Table 4.1 – Functional Block Diagram (10)Table 5.1 – Temperature Conditions (12)Table 5.2 – Operating Conditions (12)Table 5.3 – DC Characteristics (12)Table 5.4 – SD/MMC Card Clock Frequency (12)Table 5.5 – Maximum Ratings (13)Table 7.1 – Ordering Information (15)CHAPTER 1GENERAL DESCRIPTIONThe GL823K is a USB 2.0 Single-LUN card reader controller which can support SD/MMC Flash Memory Cards. It supports USB 2.0 high-speed transmission to Secure Digital TM(SD), SDHC, SDXC, miniSD TM, microSD TM(T-Flash), MultiMediaCard TM (MMC), RS MultiMediaCard TM (RS MMC), MMCmicro , HS-MMC and MMCmobile. As a single chip solution for USB 2.0 flash card reader, the GL823K complies with Universal Serial Bus specification rev. 2.0, USB Storage Class Specification ver.1.0, and each flash card interface specification.The GL823K integrates a high speed 8051 microprocessor and a high efficiency hardware engine for the best data transfer performance between USB and flash card interfaces. Its pin assignment design fits to card sockets to provide easier PCB layout. Inside the chip, it integrates 5V to 3.3V regulator, 3.3V to 1.8V regulator and power MOSFETs and it enables the function of on-chip clock source (OCCS) which means no external 12MHz XTAL is needed and that effectively reduces the total BOM cost.The GL823K implements USB disconnect function; it can be used for Mobile cable/ OTG reader/ PC card reader application.CHAPTER 2FEATURES●USB specification compliance-Comply with 480Mbps Universal Serial Bus specification rev. 2.0-Comply with USB Storage Class specification rev. 1.0-Support one device address and up to four endpoints: Control (0)/Bulk Read (1)/Bulk Write (2)/Interrupt (3) ●Integrated USB building blocks-USB2.0 transceiver macro (UTM), Serial Interface Engine (SIE), Build-in power-on reset (POR) and low-voltage detector (LVD)●Embedded 8051 micro-controller-Operate @ 60 MHz clock, 12 clocks per instruction cycle-Embedded mask ROM and internal SRAM●Secure Digital TM (SD) and MultiMediaCard TM (MMC)-Supports SD specification v1.0 / v1.1 / v2.0 / SDHC (Up to 32GB)-Compatible with SDXC (Up to 2TB)-Supports MMC specification v3.x / v4.0 / v4.1 / v4.2-Supports 1 / 4 bit data bus-Compliant with Secure Digital TM v5.0●Support boost mode for SD3.0 for better performance●Support non-SD Card Detect pin, non-MS Insertion/Removal pin design to save BOM cost●Support non-SD Write Protection pin design to save BOM cost●Support LED function to indicate power and access status●On chip clock source and no need of 12MHz Crystal Clock input●On-Chip 5V to 3.3V and 3.3V to 1.8V regulators●On-Chip power MOSFET for supplying flash media card power●Support USB disconnection by memory card unplug or manual switch for Mobile cable/ OTG reader/ PCcard reader application●Available in SSOP16 package (150 mil)CHAPTER 3 PIN ASSIGMENT3.1 SSOP16 Pinout38765214D 0D 2P M O S C M D V S S D 1D 3C L KFigure 3.1 – SSOP 16 Pinout Diagram3.2Pin DescriptionTable 3.1 – Pin DescriptionNotation:Type O OutputI InputB Bi-directionalpu internal pull-up when inputpd internal pull-down when inputP Power / GroundA AnalogCHAPTER 4BLOCK DIAGRAMTable 4.1 – Functional Block Diagram4.1OCCS USB PHYThe USB 2.0 Transceiver Macrocell is the analog circuitry that handles the low level USB protocol and signaling, and shifts the clock domain of the data from the USB 2.0 rate to one that is compatible with the general logic. On chip clock source and no need of 12MHz Crystal Clock input.4.2SIEThe Serial Interface Engine, which contains the USB PID and address recognition logic, and other sequencing and state machine logic to handle USB packets and transactions.4.3EPFIFOEndpoint FIFO includes Control FIFO (FIFO0) and Bulk In/Out FIFO●EP0 FIFO FIFO of control endpoint 0. It is 64-byte FIFO and used for endpoint 0 data transfer.●Interrupt FIFO 64-byte depth FIFO of endpoint 3 for status interrupt●Bulk FIFO It can be in the TX mode or RX mode:1. It contains ping-pong FIFO (512 bytes each bank) for transmit/receive data continuously.2. It can be directly accessed by micro-controller4.4MCU8051 micro-controller inside.●8051 Core Compliant with Intel 8051 high speed micro-controller●ROM FW code on ROM●SRAM Internal RAM area for MCU access4.5MHE●MIF Media Interface: SD/MMC●MCFIFO It can access by MCU for memory card short data packet.4.6Regulator●5V to 3.3V Band Gap Regulator for stable voltage supply for USB PHY, PMOS●3.3V to 1.8V For core logic and internal memory.4.7PMOSOn-Chip power MOSFETs for memory card powerCHAPTER 5ELECTRICAL CHARACTERISTICS 5.1Temperature ConditionsTable 5.1 – Temperature Conditions5.2Operating ConditionsTable 5.2 – Operating Conditions5.3DC CharacteristicsTable 5.3 – DC Characteristics5.4Memory Card Clock FrequencyTable 5.4 – SD/MMC Card Clock Frequency5.5Maximum RatingsTable 5.5 – Maximum RatingsCHAPTER 6PACKAGE DIMENSIONInternalNo.Lot CodeDateGL823KAAAAAAAAAAYWWXXXXVersionNo.Figure 6.1 – SSOP 16 Pin Package (150 mil)CHAPTER 7ORDERING INFORMATIONTable 7.1 – Ordering Information。
serial_串列传输
Serial Interfaces:SPI, I2C, UARTDemystifiedBruce E. Hall, W8BHObjective: learn how to use SPI,I2C, and UART on your AVRmicrocontroller.1) INTRODUCTIONIt took me a long time to get here. I’ve used various flavors o f AVR microcontrollers, writing to them in assembly, C, and Arduino “wiring/processing”. For some reason, I always avoided using the built-in serial communication hardware. Often I used someone else’s serial library. Sometimes I emulated the protocol using GPIO pins. But eventually I realized that using the built-in interfaces isn’t difficult after all. Here is my collection of quick-‘n-dirty serial interface routines. This is all hobby-grade material: no fancy objects, no long list of initialization options, or interrupt-driven code with ring buffers. But follow along, and you’ll be able to use the serial hardware with minimal fuss and minimal code. At the end I’ll use the UART and I2C interfaces in a small RTC project.2) SERIAL PERIPHERAL INTERFACE (SPI)At its core, the SPI algorithm is very straightforward:∙Put a data bit on the serial data line.∙Pulse the clock line.∙Repeat for all the bits you want to send, usually 8 bits at a time.You must set the microcontroller’s SPI control register (SPCR) to enable SPI communication. This is an eight-bit register that contains the following bits:SPCR = 0x50:bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0SPIE SPE DORD MSTR CPOL CPHA SPR1 SPR00 1 0 1 0 0 0 0The first bit on the left, SPIE, enables the SPI interrupt and is not needed for this application. The SPE bit enables SPI. DORD determines the data direction: when 0, the most-significant bit is sent & received first. MSTR determines if the micro acts as a master (1) or slave (0) device. CPOL and CPHA together determine the transfer mode. Our TFT display works well with Mode 0, in which both bits are zero. Finally, SPR1 and SPR0 determine the transfer speed, as a fraction of the microcontroller’s oscillator. When both are 0, the SPI transfer speed is osc/4, which on my 16 MHz micro is 16/4 = 4 MHz. When both bits are 1, the transfer speed is osc/256 = 62.5 kHz.Using an SPCR value of 0x50, SPI is enabled as Master, in Mode 0 at 4 MHz. The code to open SPI communication can be as simple as the following:void SPI_Init(){SPCR = 0x50; // SPI enabled as Master, Mode0 at 4 MHz}To close SPI, just set the SPE bit to 0. This will stop SPI and return the four dedicated SPI lines (MOSI, MISO, SCLK, SS) to the general purpose I/O functions:void SPI_Close(){SPCR = 0x00; // clear SPI enable bit}Only one more routine is needed: the SPI transfer routine. SPI is a bidirectional protocol, with two separate data lines. The data is transmitted over MOSI and received over MISO at the same time. Even if we only want to send, we are always going to receive. And vice versa. If you aren’t expecting any received data, just ignore what is returned to you.The data transfer register is SPDR. Load this register with a value, and the data transfer will start automatically. A bit in SPSR, the status register, will tell us when the transfer is complete. As the data bits are serially shifted out of the transfer register, the received bits are shifted in. When the transfer completes, SPDR will hold the received data:byte SPI_Xfer(byte data) // you can use uint8_t for byte{SPDR = data; // initiate transferwhile (!(SPSR & 0x80)); // wait for transfer to completereturn SPDR;}3) TESTING THE SPI INTERFACEThe three routines above are all we need for SPI. Let’s make sure they work by doing a serial loop-back test. In this test, the output data on MOSI is looped-back as the input on MISO. Whatever value we put into the data register should come right back in.Without a working display, we need a way to verify the data. You might want to use your fancy debugger, or send the value to a monitor via UART, but here is something even simpler: flashthe LED on your controller board. Most AVR boards have a connected LED. On many AVR boards, including the Arduino, the status LED is on PB5. Here is a routine to flash it: void FlashLED(byte count)// flash the on-board LED at ~ 2 Hz{DDRB |= _BV(DDB5); // Set PB5 as outputfor (;count>0;count--){PORTB |= _BV(PORTB5); // turn LED on_delay_ms(250); // waitPORTB &= ~_BV(PORTB5); // turn LED off_delay_ms(250); // wait}}Now, disconnect the microcontroller’s MOSI (digital 11, PB3) from t he TFT display, and connect it to the micro controller’s MISO line (digital 12, PB4). Run the following code: void SPI_LoopbackTest(){SPI_Init(); // start communication to TFTchar i = SPI_Xfer(5); // MISO to MOSI -> returns 5// MISO to +5V -> returns 255// MISO to Gnd -> returns 0SPI_Close(); // return portB lines to general useFlashLED(i+1); // flash (returned value + 1)}What happens? If all goes well, the LED will flash 6 times. The value 5 is sent out the MOSI line, comes back in on the MISO line, and is returned from the SPI xfer routine.You may wonder if Xfer worked at all. Maybe nothing was transferred: the value 5 could have stayed in the transfer register ‘untouched’. How can we know for sure?For the doubters out there like me, take your wire on the MISO line and put to ground (logic 0). Now, all bits shifted-in will be 0, and the value returned should be 0x00000000 = 0. If you run the program now, the LED should flash only once. To further convince you, connect MISO to +5V. Now, all bits shifted-in will be one, and the value returned will always be 0x11111111 = 255. The LED should not flash at all, since 255+1 = 256 = 0, for byte-sized variables.I have posted an SPI project that drives a TFT display at /avr/AvrTFT.pdf4) THE I2C INTERFACEAtmel calls their version of I2C the “two-wire” interface, or TWI. It is a serial-data protocol which uses two data lines for communication: a data line (SDA) and a clock (SCL). Deviceson the I2C bus can either be masters or slaves. Masters initiate data transfers, and slaves react only to master requests. In this article, the AVRmega328 is the master, and the RTC is always the slave. Slaves are specified by a 7-bit address, plus a read/write bit. The device address for the DS1307 is fixed at 0xd0.The interface circuit is “open collector”, which meansthat the data lines are passively kept high by resistors toVcc. Any device on the bus can actively pull a data line low. Up to 128 devices can be put on the same data bus.There are plenty of good articles on TWI/I2C programming for AVR microcontrollers. Check out the following for a good start:1. :/avr-libc/user-manual/group__twi__demo.html2. AVR beginners:/architecture/twi/twi.html3. ATMEL AVR315:/Images/doc2564.pdfCompared with SPI, using I2C is a bit more involved. The first job is to set the frequency of the serial data clock. Typically, the clock frequency is 10 (slow mode), 100 (standard mode), or 400 (fast mode) kHz. The maximum clock rate is determined by the slowest device on the bus, as well as bus capacitance. As a practical matter, most I2C devices run at 100 kHz. The DS1307 runs at 100 kHz.Again, keep in mind there are already libraries available for using I2C with your AVR or arduino. You do not need to do this yourself. A search for ‘I2C master library’ will turn up a few alternatives. Keep reading if you’d like roll your own.There are two special registers on the ATmega which control the SCL frequency: TWSR and TWBR. TWSR is the TWI status register, and contains prescalar bits used to divide the CPU clock frequency. We do not need a prescalar, so we can ignore these bits. The TWBR is the bit-rate register. The SCL frequency is a function of the CPU frequency and this register, according to the following formula: F_SCL in MHz = F_CPU/(16+2(TWBR)). Kinda complicated, isn’t it? To determine the value of TWBR we can rewrite it like this: TWBR = ((F_CPU/F_SCL)-16)/2. My CPU has a 16 MHz clock, and I want to run the interface in standard 100 kHz mode. So the value of TWBR must be ((16/0.1)-16)/2 = (160-16)/2 = 72.#define F_CPU 16000000L// CPU clock speed 16 MHz#define F_SCL100000L// I2C clock speed 100 kHzvoid I2C_Init()// at 16 MHz, the SCL frequency will be 16/(16+2(TWBR)), assuming prescalar of 0.// so for 100KHz SCL, TWBR = ((F_CPU/F_SCL)-16)/2 = ((16/0.1)-16)/2 = 144/2 = 72.{TWSR=0;// set prescalar to zeroTWBR=((F_CPU/F_SCL)-16)/2;// set SCL frequency in TWI bit register}Here is the protocol for sending data from master to slave: “MT” (master transmit) mode ∙Master generates Start Condition, status code 0x08 is returned∙Master sends slave address (0xd0), slave device returns ACK, status code 0x18∙Master sends one or more data bytes, slave device returns ACK, status code 0x28∙Master generates Stop Condition, no status code returnedAfter each operation, the ‘ready’ bit in TWCR will go to logic 0, and return to logic 1 when the operation is completed. Byte-sized data is sent/received via the special TWDR register. The start, stop, and data transfer conditions are specified by the TWCR control register. And thestatus codes are put in the TWSR register. Let’s look at the code and compare it to the protocol. Here is how to generate a start condition:#define TW_START0xA4// send start condition (TWINT,TWSTA,TWEN)#define TW_READY(TWCR&0x80)// ready when TWINT returns to logic 1.#define TW_STATUS(TWSR&0xF8)// returns value of status registerbyte I2C_Start()// generate a TW start condition{TWCR=TW_START;// send start conditionwhile(!TW_READY);// waitreturn(TW_STATUS==0x08);// return 1 if found; 0 otherwise}To generate a start, load TWCR with 0xA4 a nd wait. That’s all there is t o it. Why 0xA4? 0xA4 is binary 10100100. The three ‘1’ values correspond to the TWINT, TWSTA, and TWEN bits of the control register. These bits enable the TWI interrupt, the start-condition, and the whole TWI module. You will see many people write it like this: TWCR = (1<<TWINT) | (1<<TWSTA) | (1<<TWEN). Most think that this ‘self-documenting’ style of coding is p referable, so please use it if you like. For me, start is simply code 0xA4.The next thing to do is send the bus address of the slave we are communicating with. For example, the DS1307 real-time clock has a bus address of 0xd0. Here is our code to do that:#define DS13070xD0// I2C bus address of DS1307 RTC#define TW_SEND0x84// send data (TWINT,TWEN)byte I2C_SendAddr(addr)// send bus address of slave{TWDR=addr;// load device's bus addressTWCR=TW_SEND;// and send itwhile(!TW_READY);// waitreturn(TW_STATUS==0x18);// return 1 if found; 0 otherwise}Put the address of the slave device into TWDR, put the send command in TWCR, and wait. The next operation, sending a data byte, looks almost exactly the same. Notice that the returned status code will be different, however:byte I2C_Write(byte data)// sends a data byte to slave{TWDR=data;// load data to be sentTWCR=TW_SEND;// and send itwhile(!TW_READY);// waitreturn(TW_STATUS!=0x28); // return 1 if found; 0 otherwise}For the DS1307 we will do this Write operation twice: once to set the address pointer on the RTC, and again to supply the data for that address.The last step is the send the Stop condition. Here we just set the command register to 0x94, the value for TW_STOP. Again, this value sets the TW enable, TW interrupt, and TW stop bits. Go ahead, use (1<<TWINT) | (1<<TWEN) | (1<<TWSTO) if you prefer. We do not haveto wait or check for status codes, so it is just a one-line command. Instead of writing a routine I made a macro instead:#define TW_STOP0x94// send stop condition (TWINT,TWSTO,TWEN)#define I2C_Stop()TWCR=TW_STOP// inline macro for stop conditionJust a quick note on the status codes: I’ve written my routines to check the status, but I ignore the results. In my simple setup this works OK. You may want to check each code and show error messages when appropriate.Reading data is little trickier: we have to write to the device first, to set its internal address pointer, and then read to get the data at that address. Here is the protocol for receiving data from the slave.∙Master generates Start Condition, status code 0x08 is returned∙Master sends slave bus address (0xd0), DS1307 returns ACK, status code 0x18∙Master sends address pointer, slave device returns ACK, status code 0x28∙Master generates another Start Condition = restart, status code 0x10 returned∙Master sends slave bus address + read bit (0xd1), slave returns ACK, status code 0x40∙Master requests data byte with NACK, slave returns byte, status code 0x58∙Master sends Stop condition, no status code returnedThe only new code required for reading is the read operation in the next to last step. It looks very similar to the write operation. NACK is used to a request of a single (or last) byte of data.#define TW_NACK0x84// read data with NACK (last byte)#define READ 1byte I2C_ReadNACK()// reads a data byte from slave{TWCR=TW_NACK;// nack = not reading more datawhile(!TW_READY);// waitreturn TWDR;}Putting it all together, here are sample routines for reading and writing registers on the slave device. You will need to check the datasheet of the slave device you intend to use; each device may have its own unique protocol for addressing its registers, memory contents, etc.void I2C_WriteRegister(byte deviceRegister,byte data){I2C_Start():I2C_SendAddr(DS1307);// send bus addressI2C_Write(deviceRegister);// first byte = device register addressI2C_Write(data);// second byte = data for device registerI2C_Stop();}byte I2C_ReadRegister(byte deviceRegister){byte data=0;I2C_Start();I2C_SendAddr(DS1307);// send device bus addressI2C_Write(deviceRegister);// set register pointerI2C_Start();I2C_SendAddr(DS1307+READ); // restart as a read operationdata=I2C_ReadNACK();// read the register dataI2C_Stop();// stopreturn data;}I wrote a RTC tutorial using the I2C interface at /avr/AvrDS1307.pdf5) THE UART INTERFACECompared to I2C, using the UART is darn-easy. UART stands for Universal Asynchronous Receive/Transmit. The hardware can also run in synchronous mode, so it is often called a USART. A good article about the hardware is at . And a good programming reference is Dean Camera’s UART article at .As opposed to SPI and I2C, which are often used for binary data exchange between hardware devices, UART is often used for transmission of (slower) ASCII data. For example, you might use the UART for keyboard input or monitor/character LCD output. Speedy SPI transfers data to dedicated hardware devices at MHz speeds, while UART transfers are a thousand times slower.Each data frame consists ofa start bit, a variable numberof data bits, an optionalparity bit, and 1 or 2 stopbits. The most commonconfiguration is 1 start bit, 8data bits, no parity bit, and 1stop bit (“8N1”).In asynchronous mode, there is no clock line: data is transmitted on the transmit line (Tx) and received on the receive line (Rx). The UART is initialized by configuring control registers that determine the baud rate, parity, number of stop bits:#define BAUDRATE9600void UART_Init(){UBRR0=F_CPU/(BAUDRATE*16L)-1;// set speed according to BAUDRATE defineUCSR0B=0x18;// enable UART: set Rx,Tx enable bitsUCSR0C=0x06;// set mode: 8 data bits, no parity, 1 stop bit }The first control register, UBRR0, controls the data transmission rate. The value is determined from the desired baud rate and CPU frequency. For example, a baud rate of 9600 bps on my16 MHz controller requires a register value of (16000000/9600/16)-1 = 130. Setting bits 4 and 3 in the second control register UCSR0B, enables the special Rx & Tx data lines. The third control register, UCSR0C, sets the data frame format. For 8N1, the most common data frame format, the register value should be set to 0x06. Check out the AVRmega328 datasheet for information on all of the available options.Once initialized, the controller handles all of the implementation details. Reading & writing byte-sized data from/to the UART data register, UDR0, looks like this:#define RX_READY(UCSR0A&0x80)// check bit7 of UCSRA0#define TX_READY(UCSR0A&0x20)// check bit5 of UCSRA0void UART_Write(byte data){while(!TX_READY);// wait until ready to sendUDR0=data;// OK, send it now!}byte UART_Read(){while(!RX_READY);// wait until byte rec'dreturn UDR0;// OK, return it.}In both routines, the first line waits until the UART is ready to send/receive. The second line writes/reads the data register. That’s pretty simple, isn’t it?6) TESTING THE UART INTERFACEThe UART uses two data lines, so try a loopback test like the one for SPI. Tie the Tx(PD1/TxD) and Rx (PD0/RxD) lines together, and run the following routine:void UART_LoopbackTest(){UART_Write(5);// send a '5' out the Tx linebyte b=UART_Read();// listen on Rx lineFlashLED(b);// indicate value returned}If all goes well, the LED should flash 5 times.7) MAKING LIBRARIESEach of the interfaces is a great candidate for a library. For example, put the three SPI routines in a file called spi.c. Then make a header file called spi.h that includes only the function declarations. Do the same for UART and I2C. Now you can include whichever interface you need like this:i nclude “spi.h”8) DS1307 RTC REVISITEDIn the DS1307 tutorial I used a character LCD for output.Let’s use the UART interface to use our computer screeninstead. The AVR TxD and RxD lines require additionalhardware to connect back to your PC. In the ‘old days’,all PCs had RS232 serial ports, and you would use aMax232 chip to convert the +/- 12V signals from thecomputer to the TTL (+5V) logic levels on the micro. Aquick internet search for “Max232 module” will give youseveral options costing around $5. To the left is oneavailable for around $3 at NewEgg.However, most modern PCs have abandonedRS232 ports and use USB ports instead. Toconnect AVR serial lines to USB I use the “FTDIfriend ” adapter from Adafruit. It will set you backabout $15. Connect TxD to the adapter input line(Rx), RxD to the output line (Tx), and GND toground.Next, connect your DS1307 module. Run the SDA line to A4/PC4. Run the SCL line to A5/PC5. And power the module with +5V and GND. Your module must include pullup resistors on the SDA and SCL lines.DS1307 RTC DC BoarduinoFTDI FriendYou should have two lines running from the clock module to the micro, and two lines from the micro your USB adapter.Once everything is connected, verify that your computer recognizes the FTDI board. Connect a USB cable between your computer and the adapter, and then check the computer’s device manager -> ports. You should see a USB serial port listed, such as ‘COM9’. If not, follow the device manufacturer’s recommendation for installing the appropriate driver.Next, you need a console application. Windows used to have a preinstalled application called ‘Hypertext’, but it is no longer available on all computers. I recommend one called ‘PuTTY’, which available at and elsewhere. In putty.exe, select connection type: serial and enter the name of the communication port, such as ‘COM9’, that you got from the device manager.If you are doing this for the very first time, you can easily verify that the USB adapter and console app are configured correctly: temporarily disconnect both data lines between the micro and the adapter. Now do a loopback test by connecting the adapter’s Tx and Rx lines together. Anything you type in the console application will be sent out the Tx line, back into Rx, and be displayed on the console screen. If you have more than one application running on your computer, make sure the console app is ‘on top’ and has focus.Once the console app and USB adapter are working, let’s add our microcontroller and extend the loopback test:void Typewriter(){for(char ch=0;ch!='!';)// wait for stop char '!'{ch=UART_Read();// get byte from keyboardUART_Write(ch);// send it to outputif(ch=='\r')// if it is a <return>UART_Write('\n');// add a <newline>}}This code will read a byte from the UART and echo it back to the console. There is a check for the return c haracter, since <return> doesn’t bump the cursor to the next line on my console.Now, instead of writing to the LCD via LCD_Char(), we send the data to the computer screen via UART_Write(). The source code below shows the slightly modified routines. In addition, we can prompt the user for updated time information, and get the information via keyboard input.Many console applications do terminal-emulation, and allow you to control the cursor and display colors via escape-codes. See /ansi-escape-sequences.php for a list of these codes. In the source code, ANSI escape sequences are used for clearing the screen and for setting cursor position.9) SOURCE CODE//-----------------------------------------------------------------------------// Serial interfaces: useful SPI, I2C, and UART routines//// Author : Bruce E. Hall <bhall66@>// Website : /avr/serial.pdf// Version : 1.0// Date : 12 May 2014// Target : ATmega328P microcontroller// Language : C, using AVR studio 6// Size : 1994 bytes//// Fuse settings: 8 MHz osc with 65 ms Delay, SPI enable; *NO* clock/8//// Demo will get time & date info from from DS1307-RTC module via I2C// and display time & date on computer console via UART.//// ---------------------------------------------------------------------------// GLOBAL DEFINES#define F_CPU16000000 // run CPU at 16 MHz#define LED5// Boarduino LED on PB5#define ClearBit(x,y)x&=~_BV(y)// equivalent to cbi(x,y)#define SetBit(x,y)x|=_BV(y)// equivalent to sbi(x,y)// ---------------------------------------------------------------------------// INCLUDES#include<avr/io.h> // deal with port registers#include<util/delay.h>// used for _delay_ms function#include<stdlib.h>// used for itoa, atoi// ---------------------------------------------------------------------------// TYPEDEFStypedef uint8_t byte;// I just like byte & sbyte bettertypedef int8_t sbyte;// ---------------------------------------------------------------------------// GLOBAL VARIABLES// ---------------------------------------------------------------------------// MISC ROUTINESvoid msDelay(int delay)// put into a routine{// to remove code inliningfor(int i=0;i<delay;i++)// at cost of timing accuracy_delay_ms(1);}void FlashLED(byte count)// flash the on-board LED at ~ 3 Hz{SetBit(DDRB,LED);// make sure PB5 is an outputfor(;count;count--){SetBit(PORTB,LED);// turn LED onmsDelay(100);// waitClearBit(PORTB,LED);// turn LED offmsDelay(200);// wait}}long IntToBCD(int i)// converts an integer into its Hex BCD equivalent. Ex: decimal 32 --> 0x32{long ans=0;byte digit,shiftvalue=0;while(i>0){digit=(i%10);// get least significant decimal digitans+=(digit<<shiftvalue);// add it in proper positioni/=10;// remove least significant digitshiftvalue+=4;// bump up digit position in answer }return ans;}// ---------------------------------------------------------------------------// SPI ROUTINES//// How to use the SPI://// 1. The data rate is set in SPI_Init, by setting bits in the SPCR (below).// By default, the rate is FCPU/2 = 8 MHz for a 16 MHz board.// The microcontroller is Master, and the external device is Slave.// 2. Connect the transmit line (MOSI/D11/PB3) to the external device MOSI line. // 3. Connect the receive line (MISO/D12/PB4) to the external device MISO line. // 4. Connect the serial clock (SCK/D13/PB5) to the external device SCK line// 5. Ground the external device select line; usually select is active-low.// 6. Start the SPI with SPI_Init.// 7. Transfer bytes between micro and device with SPI_Xfer//// SPI Status Control Register (SPCR) ---------//// b7 b6 b5 b4 b3 b2 b1 b0// SPCR: SPIE SPE DORD MSTR CPOL CPHA SPR1 SPR0// 0 1 0 1 . 0 0 0 1//// SPIE - enable SPI interrupt// SPE - enable SPI// DORD - 0=MSB first, 1=LSB first// MSTR - 0=slave, 1=master// CPOL - 0=clock starts low, 1=clock starts high// CPHA - 0=read on rising-edge, 1=read on falling-edge// SPRx - 00=osc/4, 01=osc/16, 10=osc/64, 11=osc/128//// SPCR = 0x50: SPI enabled as Master, mode 0, at 16/4 = 4 MHzvoid SPI_Init(){SPCR=0x50;// SPI enabled as Master, Mode0 at 4 MHz SetBit(SPSR,SPI2X);// double the SPI rate: 4-->8 MHz}void SPI_Close(){SPCR=0x00;// clear SPI enable bit}byte SPI_Xfer(byte data){SPDR=data;// initiate transferwhile(!(SPSR&0x80));// wait for transfer to completereturn SPDR;}// ---------------------------------------------------------------------------// I2C (TWI) ROUTINES//// How to use the I2C://// 1. Set the data transmission speed in the F_SCL define.// Common speeds are 100 kHz (100000L) and 400 kHz (400000L).// The microcontroller is Master, and the external device is Slave.// 2. Connect the data line (SDA/PC4) to the external device SDA line.// 3. Connect the clock (SCL/PC5) to the external device SCL line// 4. Attach 3.3K pullup resistors from SDA to Vcc and SCL to Vcc.// 5. Start the SPI with I2C_Init.// 6. Reading & Writing data to is often device specific:// use I2C_Send to send a 'raw' byte over the bus// use I2C_Write to send a byte to a specific bus address// use I2C_WriteRegister to send a byte to a specific device register// use I2C_ReadAck to read a byte from slave, with an acknowledgment// use I2C_ReadNACK to read a byte from slave, with no acknowledgment// use I2C_ReadRegister to read a byte from a specific device register#define F_SCL100000L// I2C clock speed 100 KHz#define READ 1#define TW_START0xA4// send start condition (TWINT,TWSTA,TWEN) #define TW_STOP0x94// send stop condition (TWINT,TWSTO,TWEN) #define TW_ACK0xC4// return ACK to slave#define TW_NACK0x84// don't return ACK to slave#define TW_SEND0x84// send data (TWINT,TWEN)#define TW_READY(TWCR&0x80)// ready when TWINT returns to logic 1.#define TW_STATUS(TWSR&0xF8)// returns value of status register#define I2C_Stop()TWCR=TW_STOP// inline macro for stop conditionvoid I2C_Init()// at 16 MHz, the SCL frequency will be 16/(16+2(TWBR)), assuming prescalar of 0. // so for 100KHz SCL, TWBR = ((F_CPU/F_SCL)-16)/2 = ((16/0.1)-16)/2 = 144/2 = 72. {TWSR=0;// set prescalar to zeroTWBR=((F_CPU/F_SCL)-16)/2;// set SCL frequency in TWI bit register}byte I2C_Detect(byte addr)// look for device at specified address; return 1=found, 0=not found{TWCR=TW_START;// send start conditionwhile(!TW_READY);// waitTWDR=addr;// load device's bus addressTWCR=TW_SEND;// and send itwhile(!TW_READY);// waitreturn(TW_STATUS==0x18);// return 1 if found; 0 otherwise}byte I2C_FindDevice(byte start)// returns with address of first device found; 0=not found{for(byte addr=start;addr<0xFF;addr++)// search all 256 addresses{if(I2C_Detect(addr))// I2C detected?return addr;// leave as soon as one is found }return0;// none detected, so return 0.}void I2C_Start(byte slaveAddr){I2C_Detect(slaveAddr);}byte I2C_Send(byte data)// sends a data byte to slave{TWDR=data;// load data to be sentTWCR=TW_SEND;// and send itwhile(!TW_READY);// waitreturn(TW_STATUS!=0x28);}byte I2C_ReadACK()// reads a data byte from slave{TWCR=TW_ACK;// ack = will read more datawhile(!TW_READY);// wait。
hcs12 mc9s12zvm-family 參考手冊说明书
MC9S12ZVM-Family Reference Manual HCS12MicrocontrollersTo provide the most up-to-date information, the document revision on the Internet is the most current. A printed copy may be an earlier revision. To verify you have the latest information available, refer to :.This document contains information for all constituent modules, with the exception of the S12Z CPU. For S12ZCPU information please refer to the CPU S12Z Reference Manual.S12ZVM32 and S12ZVM16 specific information is preliminary until these devices are qualified.The following revision history table summarizes changes contained in this document. The individual module sections contain revision history tables with more detailed information.Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty,representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”, must be validated for each customer application by customer’s technical experts. Freescale Semiconductor does not convey any license under its patent rights nor the rights of others. Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or Table 0-1. Revision History DateRevision Description 12 Dec 2013 1.2 Replaced generic 8-channel TIM section with specific 4-channel TIM sectionTextual enhancements and corrections throughoutUpdated electrical parameter section and added parameters for temperataures up to 175°C- Added Table A-5- Merged Table A-8 and A-9 into Table A-9. Values updated. .- Table A-15. Parameter #2. max changed from 800uA to 1050uA- Table A-15. Inserted new C class parameter ISUPS at 85C. typ. 80uA- Appendices B,D and E. Updated parameter values based on characterization results.- Appendix C. Added parameter values for range above T=150°C- Table F-3. Merged rows 2a and 2b. Merged rows 6a and 6b.- Appendix G. Merged tables G-1 and G-2.- Tables H-1 and H-2 values updated.20 JAN 2014 1.3Updated Stop mode description for BDC enabled caseRemoved false reference to modified clock monitor assert frequencyUpdated electricals for 175°C Grade0- Removed temperature range disclaimer from electrical parameter spec.footer- Added sentence above table A-3- Table D-1. LINPHY parameters 12a and 12b replaced by 12a, 12b and 12c-- Table D-2. LINPHY wake up pulse over whole temperature range- Table E-1. FET gate charge spec. updated22 MAY2014 1.4Updated family derivative table for S12ZVML32, S12ZVM32 and S12ZVM16 devicesAdded 64KB, 32KB and 16KB derivative information to flash module chapterAdded pin routing options for S12ZVM32 and S12ZVM16 devicesAdded HV Phy information for the S12ZVM32 and S12ZVM16 derivativesUpdated Part ID assignment table and ordering information for S12ZVM32 and S12ZVM16Corrected PLL VCO maximum frequency specificationChanged V LVLSA maximum from 7V to 6.9VAdded electrical parameter for HD division ratio through the phase multiplexerCorrected preferred VRL reference from VRL_1 to VRL_0Included NVM timing parameters for the S12ZVM32 and S12ZVM16 devicesAdded GDU S12ZVM32 and S12ZVM16 specific differences and electrical specificationsAdded references to f WSTAT Added VDDX short circuit fall back current and temperature/input dependency specs.Chapter1Device Overview MC9S12ZVM-Family1.1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 1.2Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181.2.1MC9S12ZVM-Family Member Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181.2.2Functional Differences Between N06E and 0N95G Masksets . . . . . . . . . . . . . . . . . . . . 191.2.3Functional Differences Between 1N95G and 0N95G Masksets . . . . . . . . . . . . . . . . . . . 20 1.3Chip-Level Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 1.4Module Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 211.4.1S12Z Central Processor Unit (CPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 211.4.2Embedded Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221.4.3Clocks, Reset & Power Management Unit (CPMU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231.4.4Main External Oscillator (XOSCLCP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 241.4.5Timer (TIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 241.4.6Pulse width Modulator with Fault protection (PMF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 241.4.7Programmable Trigger Unit (PTU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 241.4.8LIN physical layer transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251.4.9Serial Communication Interface Module (SCI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251.4.10Multi-Scalable Controller Area Network (MSCAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251.4.11Serial Peripheral Interface Module (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261.4.12Analog-to-Digital Converter Module (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261.4.13Supply V oltage Sensor (BATS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261.4.14On-Chip V oltage Regulator system (VREG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261.4.15Gate Drive Unit (GDU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 271.4.16Current Sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 271.4.17High V oltage Physical Interface (S12ZVM32, S12ZVM16) . . . . . . . . . . . . . . . . . . . . . . 27 1.5Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 1.6Device Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 291.6.1Flash Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 301.6.2Part ID Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 1.7Signal Description and Device Pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 321.7.1Pin Assignment Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 321.7.2Detailed External Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 331.7.3Power Supply Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 391.7.4Package and Pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 1.8Internal Signal Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 461.8.1ADC Connectivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 471.8.2Motor Control Loop Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 481.8.3Device Level PMF Connectivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 481.8.4BDC Clock Source Connectivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 481.8.5LINPHY Connectivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 481.8.6HVPHY Connectivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 481.8.7FTMRZ Connectivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 491.8.8CPMU Connectivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 1.9Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 491.9.1Chip Configuration Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 491.9.2Debugging Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 501.9.3Low Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 1.10Security . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 511.10.1Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 511.10.2Securing the Microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 511.10.3Operation of the Secured Microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 521.10.4Unsecuring the Microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 521.10.5Reprogramming the Security Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 531.10.6Complete Memory Erase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 1.11Resets and Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 541.11.1Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 541.11.2Interrupt Vectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 541.11.3Effects of Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 1.12Module device level dependencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 581.12.1CPMU COP Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 581.12.2CPMU High Temperature Trimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 581.12.3Flash IFR Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 1.13Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 591.13.1ADC Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 591.13.2SCI Baud Rate Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 591.13.3Motor Control Application Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 601.13.4BDCM Complementary Mode Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 681.13.5BLDC Six-Step Commutation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 721.13.6PMSM Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 741.13.7Power Domain Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78Chapter2Port Integration Module (S12ZVMPIMV2)2.1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 832.1.1Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 832.1.2Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 2.2External Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 2.3Memory Map and Register Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 882.3.1Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 892.3.2PIM Registers 0x0200-0x020F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 932.3.3PIM Generic Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1012.3.4PIM Generic Register Exceptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 2.4Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1102.4.1General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1102.4.2Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1112.4.3Pin I/O Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1122.4.4Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1132.4.5Pin interrupts and Key-Wakeup (KWU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1142.4.6Over-Current Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1152.5Initialization and Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1152.5.1Port Data and Data Direction Register writes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1152.5.2Over-Current Protection on EVDD1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115Chapter3Memory Mapping Control (S12ZMMCV1)3.1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1173.1.1Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1183.1.2Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1183.1.3Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1183.1.4Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1193.1.5Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 3.2External Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 3.3Memory Map and Register Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1203.3.1Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1203.3.2Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 3.4Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1253.4.1Global Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1253.4.2Illegal Accesses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1273.4.3Uncorrectable ECC Faults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128Chapter4Interrupt (S12ZINTV0)4.1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1294.1.1Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1304.1.2Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1304.1.3Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1314.1.4Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 4.2External Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 4.3Memory Map and Register Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1324.3.1Module Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1324.3.2Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 4.4Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1384.4.1S12Z Exception Requests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1384.4.2Interrupt Prioritization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1384.4.3Priority Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1394.4.4Reset Exception Requests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1394.4.5Exception Priority . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1404.4.6Interrupt Vector Table Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 4.5Initialization/Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1404.5.1Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1404.5.2Interrupt Nesting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1414.5.3Wake Up from Stop or Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142Chapter5Background Debug Controller (S12ZBDCV2)5.1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1435.1.1Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1435.1.2Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1445.1.3Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1445.1.4Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146 5.2External Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147 5.3Memory Map and Register Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1475.3.1Module Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1475.3.2Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148 5.4Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1525.4.1Security . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1525.4.2Enabling BDC And Entering Active BDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1525.4.3Clock Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1535.4.4BDC Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1535.4.5BDC Access Of Internal Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1695.4.6BDC Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1725.4.7Serial Interface Hardware Handshake (ACK Pulse) Protocol . . . . . . . . . . . . . . . . . . . . 1755.4.8Hardware Handshake Abort Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1775.4.9Hardware Handshake Disabled (ACK Pulse Disabled) . . . . . . . . . . . . . . . . . . . . . . . . . 1785.4.10Single Stepping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1795.4.11Serial Communication Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180 5.5Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1805.5.1Clock Frequency Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180Chapter6S12Z Debug (S12ZDBGV2) Module6.1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1816.1.1Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1826.1.2Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1826.1.3Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1826.1.4Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1836.1.5Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184 6.2External Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1846.2.1External Event Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1846.2.2Profiling Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185 6.3Memory Map and Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1856.3.1Module Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1856.3.2Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188 6.4Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2096.4.1DBG Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2096.4.2Comparator Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2096.4.3Events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2136.4.4State Sequence Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2156.4.5Trace Buffer Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2166.4.6Code Profiling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2256.4.7Breakpoints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229 6.5Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2306.5.1Avoiding Unintended Breakpoint Re-triggering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2306.5.2Debugging Through Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2306.5.3Breakpoints from other S12Z sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2316.5.4Code Profiling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231Chapter7ECC Generation Module (SRAM_ECCV1)7.1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2337.1.1Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233 7.2Memory Map and Register Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2337.2.1Register Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2337.2.2Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235 7.3Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2397.3.1Aligned 2 and 4 Byte Memory Write Access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2407.3.2Other Memory Write Access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2407.3.3Memory Read Access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2417.3.4Memory Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2417.3.5Interrupt Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2417.3.6ECC Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2427.3.7ECC Debug Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242Chapter8S12 Clock, Reset and Power Management Unit (S12CPMU_UHV_V6)8.1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2458.1.1Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2468.1.2Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2488.1.3S12CPMU_UHV_V6 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251 8.2Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2538.2.1RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2538.2.2EXTAL and XTAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2538.2.3VSUP — Regulator Power Input Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2538.2.4VDDA, VSSA — Regulator Reference Supply Pins . . . . . . . . . . . . . . . . . . . . . . . . . . 2538.2.5VDDX, VSSX— Pad Supply Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2538.2.6BCTL— Base Control Pin for external PNP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2548.2.7VSS1,2 — Core Ground Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2548.2.8VDD— Core Logic Supply Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2548.2.9VDDF— NVM Logic Supply Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2548.2.10API_EXTCLK — API external clock output pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2548.2.11TEMPSENSE — Internal Temperature Sensor Output V oltage . . . . . . . . . . . . . . . . . . 254。
N1500FT Modbus通信手册说明书
N1500FTMODBUS COMMUNICATION MANUALINTRODUCTIONAll equipment configurations, as well as the input channels reading, are made through Modbus protocol.This manual has all needed information to read data from N1500FT using any software that has Modbus RTU communication (master) abilities.Further details about the implementation of a network of Modbus devices over RS485 can be found in the RS485 & RS422 Basics file, available for download in the website.SERIAL COMMUNICATIONThe optional serial interface RS485 allows to address up to 247 indicators in a network communicating remotely with a host computer or master controller.RS485 Interface•Compatible signals with RS485 standard• 2 wire connection from master to up to 31 slaves indicators in a multidrop bus. It is possible address 247 nodes with multiple outputs converters.•Maximum communication distance: 1000 meters•The RS485 signals are:•D1: Bidirectional data line.•D0: Bidirectional inverted data line.•GND: Optional connection which left communication better.General Characteristics•Optically isolated serial interface.•Programmable baud rate: 1200, 2400, 4800, 9600, 19200, 38400, 57600 or 115200bps.•Data bits: 8•Parity: None, odd or even.•Stop Bits: 1MODBUS COMMANDSThe following listed Modbus commands (functions) are implemented. In order to get more information about each one and about Modbus protocol in general, access the website:READ HOLDING REGISTERS – 03HThis command can be used to read one or more holding registers, as listed in a table in the next chapter.WRITE SINGLE COIL – 05HThis command can be used to activate or deactivate the output relays. First coil refers to relay 1, second coil refers to relay 2 and son on.Important Note: In order to be set by this command, relays must not be assigned to any enabled alarms.WRITE SINGLE REGISTER – 06HThis command can be used to write in one holding register, as listed in a table in the next chapter.WRITE MULTIPLE REGISTERS – 16HThis command can be used to write in a block of holding registers, as listed in a table in the next chapter.HOLDING REGISTERS TABLE0 Instantaneous flow rate (floating point – word high) -3,4e+38 +3,4e+38 R 1 Instantaneous flow rate (floating point – word low)2 Total flow rate (floating point – word high) -3,4e+38 +3,4e+38 R3 Total flow rate (floating point – word low)4 Non-resettable total flow rate (floating point – word high) -3,4e+38 +3,4e+38 R5 Non-resettable total flow rate (floating point – word low)6 Auxiliary 4 to 20 mA input (floating point – word high) -3,4e+38+3,4e+38R7 Auxiliary 4 to 20 mA input (floating point – word low) 8 Maximum instantaneous flow rate (floating point – word high)-3,4e+38 +3,4e+38 R9 Maximum instantaneous flow rate (floating point – wordlow) 10 Minimum instantaneous flow rate (floating point – word high) -3,4e+38 +3,4e+38 R11 Minimum instantaneous flow rate (floating point – word low)12 Instantaneous flow rate (integer x 10) -32768 32767 R InstantFlow 13 Total flow rate (word 3 – MSB) 0 65535 R TotalFlow_3 14 Total flow rate (word 2 – MSB) 0 65535 R TotalFlow_2 15 Total flow rate (word 1 – MSB) 0 65535 R TotalFlow_1 16 Total flow rate (word 0 – LSB)0 65535 R TotalFlow_0 17 Non-resettable total flow rate (word 3 – MSB) 0 65535 R GrandTotalFlow_3 18 Non-resettable total flow rate (word 2 – MSB) 0 65535 R GrandTotalFlow_2 19 Non-resettable total flow rate (word 1 – MSB) 0 65535 R GrandTotalFlow_1 20 Non-resettable total flow rate (word 0 – LSB) 0 65535 R GrandTotalFlow_021 Auxiliary 4 to 20 mA input (integer x 10) -32768 32767 R AuxInput 22 Maximum instantaneous flow rate (integer x 10) -32768 32767 R MaxInstantFlow 23 Minimum instantaneous flow rate (integer x 10) -32768 32767 R MinInstantFlow 24 Number of times that the total non-resettable reachingmaximum and restarted totalization65535RGrandTotalRollOvers100 Instantaneous flow multiplying factor(floating point – word high) -3,4e+38 +3,4e+38 R/W101 Instantaneous flow multiplying factor(floating point – word low)102 Total flow multiplying factor (floating point – word high) -3,4e+38 +3,4e+38 R/W 103 Total flow multiplying factor (floating point – word low) 104 Input lower limit 4 to 20 mA (floating point – word high) -3,4e+38 +3,4e+38 R/W 105 Input lower limit 4 to 20 mA (floating point – word low) 106 Input higher limit 4 to 20 mA (floating point – word high) -3,4e+38+3,4e+38R/W107 Input higher limit 4 a 20 mA (floating point – word low) 108 Retransmission lower limit 4 to 20 mA (floating point – wordhigh) -3,4e+38 +3,4e+38 R/W109 Retransmission lower limit 4 to 20 mA (floating point – wordlow) 110 Retransmission higher limit 4 to 20 mA (floating point – wordhigh) -3,4e+38 +3,4e+38 R/W111 Retransmission higher limit 4 to 20 mA (floating point – wordlow)112 Instant flow rate unit tag0 65535 R/W 113 0 65535 R/W 114 0 65535 R/W 115 Total flow rate unit tag 065535 R/W 116 0 65535 R/W 117 0 65535 R/W 118 Instant flow rate unit 0 3 R/W 119 Instant flow rate Input type0 4 R/W122 Configuration of the main screen 0 11 R/W123 Configuration of F key function 0 4 R/W124 Digital input function configuration 0 4 R/W125 4 to 20 mA input filter configuration 0 20 R/W127 Enable 4 to 20 mA root square 0 1 R/W128 Enable 4 to 20 mA auxiliary read 0 1 R/W129 4 to 20 mA output error 0 1 R/W130 Width of the retransmission pulse (ms) 0 32000 R/W131 Manual operation mode enable 0 1 R/W132 4 to 20 output mA in manual mode (floating point – word high)-3,4e+38 +3,4e+38 R/W 133 4 to 20 output mA in manual mode (floating point – word low)134 Pulse output status in manual mode 0 1 R/W135 Relay 1 status in manual mode 0 1 R/W136 Relay 2 status in manual mode 0 1 R/W137 Relay 3 status in manual mode 0 1 R/W138 Relay 4 status in manual mode 0 1 R/W139 Enable user calibration 0 1 R/W140 Value applied to the input of 4 to 20mA for calibration rangestart (floating point – word high)-3,4e+38 +3,4e+38 R/W141 Value applied to the input of 4 to 20mA for calibration range start (floating point – word low)142 Value applied to the input of 4 to 20mA for calibration rangeend (floating point – word high)-3,4e+38 +3,4e+38 R/W143 Value applied to the input of 4 to 20mA for calibration range end (floating point – word low)144 Readed value of the input of 4 to 20mA for calibration rangestart (floating point – word high)-3,4e+38 +3,4e+38 R/W145 Readed value of the input of 4 to 20mA for calibration range start (floating point – word low)146 Readed value of the input of 4 to 20mA for calibration rangeend (floating point – word high)-3,4e+38 +3,4e+38 R/W147 Readed value of the input of 4 to 20mA for calibration range end (floating point – word low)148 Restores factory calibration 0 1 R/W149 Password input 0 9999 R/W 156 Pulse output type 0 2 R/W157 Alarm 1 function 0 4 R/W158 Alarm 2 function 0 4 R/W159 Alarm 3 function 0 4 R/W160 Alarm 4 function 0 4 R/W161 Alarm 1 setpoint (floating point – word high)-3,4e+38 +3,4e+38 R/W 162 Alarm 1 setpoint (floating point – word low)163 Alarm 2 setpoint (floating point – word high)-3,4e+38 +3,4e+38 R/W 164 Alarm 2 setpoint (floating point – word low)165 Alarm 3 setpoint (floating point – word high)-3,4e+38 +3,4e+38 R/W 166 Alarm 3 setpoint (floating point – word low)167 Alarm 4 setpoint (floating point – word high)-3,4e+38 +3,4e+38 R/W 168 Alarm 4 setpoint (floating point – word low)169 Hysteresis Alarm 1 (floating point – word high)-3,4e+38 +3,4e+38 R/W 170 Hysteresis Alarm 1 (floating point – word low)171 Hysteresis Alarm 2 (floating point – word high)-3,4e+38 +3,4e+38 R/W 172 Hysteresis Alarm 2 (floating point – word low)173 Hysteresis Alarm 3 (floating point – word high)-3,4e+38 +3,4e+38 R/W-3,4e+38 +3,4e+38 R/W 176 Hysteresis Alarm 4 (floating point – word low)177 Block Alarm 1 0 1 R/W178 Block Alarm 20 1 R/W179 Block Alarm 30 1 R/W180 Block Alarm 40 1 R/W181 Alarm 1 Timer 1 0 32000 R/W182 Alarm 1 Timer 2 0 32000 R/W183 Alarm 2 Timer 1 0 32000 R/W184 Alarm 2 Timer 2 0 32000 R/W185 Alarm 3 Timer 1 0 32000 R/W186 Alarm 3 Timer 2 0 32000 R/W187 Alarm 4 Timer 1 0 32000 R/W188 Alarm 4 Timer 2 0 32000 R/W189 Enable flash display on alarm 0 1 R/W190 Cutoff frequency (floating point – word high)-3,4e+38 +3,4e+38 R/W 191 Cutoff frequency (floating point – word low)192 Serial communication parity 0 2 R/W193 Serial communication Baud Rate 0 7 R/W194 Modbus slave address 0 247 R/W195 Protection level HMI 0 9 R/W198 Volume of a volumetric pulse 1 32000 R/W199 Frequency retransmission divider 2 32000 R/W200 Enable input linearization 0 1 R/W201 Input 1 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 202 Input 1 linearization (floating point – word low)203 Input 2 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 204 Input 2 linearization (floating point – word low)205 Input 3 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 206 Input 3 linearization (floating point – word low)207 Input 4 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 208 Input 4 linearization (floating point – word low)209 Input 5 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 210 Input 5 linearization (floating point – word low)211 Input 6 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 212 Input 6 linearization (floating point – word low)213 Input 7 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 214 Input 7 linearization (floating point – word low)215 Input 8 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 216 Input 8 linearization (floating point – word low)217 Input 9 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 218 Input 9 linearization (floating point – word low)219 Input 10 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 220 Input 10 linearization (floating point – word low)221 Input 11 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 222 Input 11 linearization (floating point – word low)223 Input 12 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 224 Input 12 linearization (floating point – word low)225 Input 13 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 226 Input 13 linearization (floating point – word low)227 Input 14 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 230 Input 15 linearization (floating point – word low)231 Input 16 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 232 Input 16 linearization (floating point – word low)233 Input 17 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 234 Input 17 linearization (floating point – word low)235 Input 18 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 236 Input 18 linearization (floating point – word low)237 Input 19 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 238 Input 19 linearization (floating point – word low)239 Input 20 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 240 Input 20 linearization (floating point – word low)241 Input 21 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 242 Input 21 linearization (floating point – word low)243 Input 22 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 244 Input 22 linearization (floating point – word low)245 Input 23 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 246 Input 23 linearization (floating point – word low)247 Input 24 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 248 Input 24 linearization (floating point – word low)249 Input 25 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 250 Input 25 linearization (floating point – word low)251 Input 26 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 252 Input 26 linearization (floating point – word low)253 Input 27 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 254 Input 27 linearization (floating point – word low)255 Input 28 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 256 Input 28 linearization (floating point – word low)257 Input 29 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 258 Input 29 linearization (floating point – word low)259 Input 30 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 260 Input 30 linearization (floating point – word low)261 Output 1 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 262 Output 1 linearization (floating point – word low)263 Output 2 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 264 Output 2 linearization (floating point – word low)265 Output 3 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 266 Output 3 linearization (floating point – word low)267 Output 4 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 268 Output 4 linearization (floating point – word low)269 Output 5 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 270 Output 5 linearization (floating point – word low)271 Output 6 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 272 Output 6 linearization (floating point – word low)273 Output 7 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 274 Output 7 linearization (floating point – word low)275 Output 8 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 276 Output 8 linearization (floating point – word low)277 Output 9 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W 278 Output 9 linearization (floating point – word low)279 Output 10 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W282 Output 11 linearization (floating point – word low)283 Output 12 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W284 Output 12 linearization (floating point – word low)285 Output 13 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W286 Output 13 linearization (floating point – word low)287 Output 14 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W288 Output 14 linearization (floating point – word low)289 Output 15 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W290 Output 15 linearization (floating point – word low)291 Output 16 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W292 Output 16 linearization (floating point – word low)293 Output 17 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W294 Output 17 linearization (floating point – word low)295 Output 18 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W296 Output 18 linearization (floating point – word low)297 Output 19 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W298 Output 19 linearization (floating point – word low)299 Output 20 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W300 Output 20 linearization (floating point – word low)301 Output 21 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W302 Output 21 linearization (floating point – word low)303 Output 22 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W304 Output 22 linearization (floating point – word low)305 Output 23 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W306 Output 23 linearization (floating point – word low)307 Output 24 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W308 Output 24 linearization (floating point – word low)309 Output 25 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W310 Output 25 linearization (floating point – word low)311 Output 26 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W312 Output 26 linearization (floating point – word low)313 Output 27 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W314 Output 27 linearization (floating point – word low)315 Output 28 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W316 Output 28 linearization (floating point – word low)317 Output 29 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W318 Output 29 linearization (floating point – word low)319 Output 30 linearization (floating point – word high)-3,4e+38 +3,4e+38 R/W320 Output 30 linearization (floating point – word low)600 Serial number (word high) 1200 9999 R SerialNumber_H 601 Serial number (word low) 0 9999 R SerialNumber_L 602 Firmware version 0 999 R FirmwareVersion 603 Product identifier 80 80 R628 Status word 1 0 65535 R Status_1 629 Status word 2 0 65535 R Status_2 630 Status word 3 0 65535 R Status_3DETAILS ABOUT SOME REGISTERSREGISTERS 112 TO 114 – TEXT STRING FOR THE INSTANT FLOW RATE UNITText string for the instant flow rate unit (ASCII - UTF8). The first character is in HIGH byte of the first register. The next character is the LOW byte of the same register, and so on. The last character indicates the time base and can only assume the values ‘s’, ‘m’, ‘h’ or ‘d’, respectively, for “second”, “minute”, “hour” or “day”.REGISTERS 115 TO 117 – TEXT STRING FOR THE TOTAL FLOW RATE UNITText string for the total flow rate unit (ASCII - UTF8). The first character is in HIGH byte of the first register. The next character is the LOW byte of the same register, and so on. Characters can be chosen from those available. REGISTERS 600 AND 601 – SERIAL NUMBERDevice serial number. The register 600 has the number corresponding to the first four digits of the serial number, while the register 601 has the number corresponding to the last four digits.REGISTER 602 – FIRMWARE VERSIONIndicates the firmware version of the device, as the following examples:If the version is "1:00" will read the value "100". If the version is "2:04" will read the value "204".REGISTERS 628 TO 630 – STATUS AS TABLE BELOWStatus word 1 Bit 0 Alarm status 1 Bit 1 Alarm status 2 Bit 2 Alarm status 3 Bit 3 Alarm status 4Status word 2 Bit 0Analog input signal above themaximum allowedBit 1Analog input signal below theminimum allowedBit 2 Open analog inputStatus word 3 Bit 0 Relay status 1 Bit 1 Relay status 2 Bit 2 Relay status 3 Bit 3 Relay status 4 Bit 4 Digital input stateFLOATING POINT FORMAT USEDN1500FT uses floating point values in single precision (32 bit) format as described in standard IEEE-754 (IEEE Standard for Floating-Point Arithmetic).。
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1.1 Overview .......................................................................................................................................... 4 1.2 Features of the UART Application Kit............................................................................................ 4 1.3 Conventions...................................................................................................................................... 4 1.4 Acronyms and abbreviations ........................................................................................................... 5
Variables to be replaced with actual values are shown in italics.
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UART Application Kit for Windows Embedded CE 6.0 - User's Manual
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mpc5674f 单片机参考手册说明书
MPC5674F MicrocontrollerReference ManualDevices Supported:MPC5674FMPC5673FMPC5674FRMRev. 7Feb 2015This page is intentionally left blank.MPC5674F Microcontroller Reference Manual, Rev. 7ii Freescale SemiconductorTable of ContentsChapter1Device Overview1.1Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11.1.1MPC5500 and MPC5600 Family Comparison . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 1.2Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-41.2.1Critical Performance Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-41.2.2Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-51.2.3Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-51.2.4Chip-Level Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-51.2.5Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-61.2.6Module Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-91.2.6.1 High-Performance e200z7 Core Processor . . . . . . . . . . . . . . . . . . . . . 1-91.2.6.2 Crossbar Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-101.2.6.3 Enhanced Direct Memory Access Controller (eDMA2) . . . . . . . . . . . . 1-101.2.6.4 Interrupt Controller (INTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-111.2.6.5 Frequency-Modulated PLL (FMPLL) . . . . . . . . . . . . . . . . . . . . . . . . . 1-121.2.6.6 External Bus Interface (EBI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-121.2.6.7 System Integration Unit (SIU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-131.2.6.8 Error Correction Status Module (ECSM) . . . . . . . . . . . . . . . . . . . . . . 1-141.2.6.9 On-Chip Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-141.2.6.10 General-Purpose Static RAM (SRAM) . . . . . . . . . . . . . . . . . . . . . . . 1-151.2.6.11 Boot Assist Module (BAM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-151.2.6.12 Enhanced Modular Input Output System (eMIOS) . . . . . . . . . . . . . . 1-151.2.6.13 Enhanced Timing Processor Unit (eTPU2) . . . . . . . . . . . . . . . . . . . . 1-161.2.6.14 Enhanced Queued Analog to Digital Converter (eQADC) . . . . . . . . 1-171.2.6.15 Deserial Serial Peripheral Interface Module (DSPI) . . . . . . . . . . . . . 1-181.2.6.16 Enhanced Serial Communication Interface Module (eSCI) . . . . . . . 1-191.2.6.17 FlexCAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-201.2.6.18 Dual-Channel FlexRay Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-211.2.6.19 Nexus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-221.2.6.20 System Timer Module (STM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-231.2.6.21 Software Watchdog Timer (SWT) . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-231.2.6.22 Periodic Interrupt Timer (PIT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-241.2.6.23 JTAG Controller (JTAGC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-241.2.6.24 Power Management Controller (PMC) . . . . . . . . . . . . . . . . . . . . . . . 1-25 1.3Developer Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-25Chapter2Signal Descriptions2.1Pin Function Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1MPC5674F Microcontroller Reference Manual Rev. 7Freescale Semiconductor Table of Contents-i2.1.1Pad Configuration Register (PCR) PA Definition . . . . . . . . . . . . . . . . . . . . . . . 2-12.1.2LVDS Signal Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 2.2External Signal Descriptions, Pin Multiplexing, and Attributes . . . . . . . . . . . . . . . . . . . 2-3 2.3Detailed Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-552.3.1eTPU Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-552.3.2IRQ and GPIO Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-562.3.3eMIOS Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-572.3.4eQADC Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-582.3.5FlexRay Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-592.3.6FlexCAN Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-592.3.7eSCI Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-602.3.8DSPI Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-602.3.9EBI Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-622.3.10Reset and Clock Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-642.3.11JTAG and Nexus Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-642.3.12PMC and Power/Voltage Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-66Chapter3Resets3.1Reset Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 3.2Reset Vector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 3.3Reset Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-23.3.1RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-23.3.2RSTOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3 3.4FMPLL Lock Gating Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3 3.5Reset Source Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-33.5.1Power-on Reset (POR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-63.5.2External Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-63.5.3Loss of Lock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-63.5.4Loss of Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-73.5.5Core Watchdog Timer/Debug Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-73.5.6JTAG Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-73.5.7Software System Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-83.5.8Software External Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8 3.6Reset Registers in the SIU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8 3.7Reset Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-93.7.1Reset Configuration Half Word (RCHW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-93.7.1.1 RCHW Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-93.7.1.2 RCHW Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-93.7.2Reset Configuration Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-113.7.3Reset Weak Pull Up/Down Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11MPC5674F Microcontroller Reference Manual Rev. 7Table of Contents-ii Freescale SemiconductorChapter4Power Management Controller (PMC)4.1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14.1.1Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14.1.1.1 Features of the Analog Portion of PMC_SMPS . . . . . . . . . . . . . . . . . . 4-24.1.1.2 Features of the Digital Portion of PMC_SMPS . . . . . . . . . . . . . . . . . . . 4-24.1.2Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-34.1.3PMC Operation Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3 4.2External Signals Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-44.2.1Signals Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4 4.3Signals Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-44.3.1VDDREG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-44.3.2VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-54.3.3VDDSYN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-54.3.4VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-54.3.5REGCTL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-54.3.6REGSEL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-54.3.7VDD33 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5 4.4Memory Map/Register Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-64.4.1Configuration Register (PMC_MCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-64.4.2Trimming Register (PMC_TRIMR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-84.4.3Status Register (PMC_SR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-12 4.5Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-144.5.1PMC Internal 1.2V Voltage Regulator Selection . . . . . . . . . . . . . . . . . . . . . . . 4-154.5.2PMC Bandgap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-164.5.3VDDREG LVD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-164.5.4 3.3V Internal Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-164.5.5 3.3V VDDSYN LVD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-174.5.6 1.2V Voltage Regulator Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-184.5.7 1.2V VDD LVD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-194.5.8Trimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-204.5.9Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-204.5.10PMC Power-on Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-204.5.11ADC Test Mux . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-22 4.6Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-23 4.7Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-234.7.1Regulator Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-234.7.2Hardware Design Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-24Chapter5Frequency Modulated Phase-Locked Loop (FMPLL)5.1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-15.1.1Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-25.1.2Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2MPC5674F Microcontroller Reference Manual Rev. 7Freescale Semiconductor Table of Contents-iii5.1.3Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3 5.2External Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3 5.3Memory Map and Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-35.3.1Module Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-35.3.2Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-45.3.2.1 FMPLL Synthesizer Status Register (SYNSR) . . . . . . . . . . . . . . . . . . . 5-45.3.2.2 FMPLL Enhanced Synthesizer Control Register 1 (ESYNCR1) . . . . . . 5-65.3.2.3 FMPLL Enhanced Synthesizer Control Register 2 (ESYNCR2) . . . . . . 5-85.3.2.4 FMPLL Synthesizer FM Control Register(SYNFMCR) . . . . . . . . . . . . 5-11 5.4Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-135.4.1General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-135.4.2PLL Off Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-135.4.3Normal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-135.4.3.1 PLL Lock Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-145.4.3.2 Loss-of-Clock Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-155.4.3.3 PLL Normal Mode Without FM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-165.4.3.4 PLL Normal Mode With Frequency Modulation . . . . . . . . . . . . . . . . . 5-18 5.5Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-215.5.1Clock Mode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-215.5.1.1 Power-On Reset (POR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-215.5.1.2 External Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-215.5.2PLL Loss-of-Lock Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-225.5.3PLL Loss-of-Clock Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-22 5.6Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-225.6.1Loss-of-Lock Interrupt Request . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-225.6.2Loss-of-Clock Interrupt Request . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-22Chapter6System Integration Unit (SIU)6.1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-16.1.1Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-26.1.2Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-36.1.3Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3 6.2External Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-46.2.1Detailed Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-46.2.1.1 Reset Input (RESET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-46.2.1.2 Reset Output (RSTOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-56.2.1.3 General-Purpose I/O (GPIO n) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-56.2.1.4 Boot Configuration (BOOTCFG[0:1]) . . . . . . . . . . . . . . . . . . . . . . . . . . 6-56.2.1.5 I/O Weak Pullup Reset Configuration (WKPCFG) . . . . . . . . . . . . . . . . 6-66.2.1.6 External Interrupt Request Input (IRQ) . . . . . . . . . . . . . . . . . . . . . . . . . 6-6 6.3Memory Map and Register Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-76.3.1Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-106.3.1.1 MCU ID Register (SIU_MIDR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-106.3.1.2 Reset Status Register (SIU_RSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-11MPC5674F Microcontroller Reference Manual Rev. 7Table of Contents-iv Freescale Semiconductor6.3.1.3 System Reset Control Register (SIU_SRCR) . . . . . . . . . . . . . . . . . . . 6-156.3.1.4 External Interrupt Status Register (SIU_EISR) . . . . . . . . . . . . . . . . . . 6-156.3.1.5 DMA/Interrupt Request Enable Register (SIU_DIRER) . . . . . . . . . . . 6-166.3.1.6 DMA/Interrupt Request Select Register (SIU_DIRSR) . . . . . . . . . . . . 6-176.3.1.7 Overrun Status Register (SIU_OSR) . . . . . . . . . . . . . . . . . . . . . . . . . 6-186.3.1.8 Overrun Request Enable Register (SIU_ORER) . . . . . . . . . . . . . . . . 6-196.3.1.9 IRQ Rising-Edge Event Enable Register (SIU_IREER) . . . . . . . . . . . 6-206.3.1.10 IRQ Falling-Edge Event Enable Register (SIU_IFEER) . . . . . . . . . . 6-216.3.1.11 IRQ Digital Filter Register (SIU_IDFR) . . . . . . . . . . . . . . . . . . . . . . . 6-226.3.1.12 IRQ Filtered Input Register (SIU_IFIR) . . . . . . . . . . . . . . . . . . . . . . . 6-226.3.1.13 Pad Configuration Registers (SIU_PCR) . . . . . . . . . . . . . . . . . . . . . 6-246.3.1.14 GPIO Pin Data Output Registers 0–512 (SIU_GPDO n) . . . . . . . . . . 6-406.3.1.15 GPIO Pin Data Input Registers 0–255 (SIU_GPDI n) . . . . . . . . . . . . 6-406.3.1.16 External IRQ Input Select Register (SIU_EIISR) . . . . . . . . . . . . . . . 6-416.3.1.17 DSPI Input Select Register (SIU_DISR) . . . . . . . . . . . . . . . . . . . . . . 6-436.3.1.18 eQADC Command FIFO Trigger Source Select - IMUX Select Registers(SIU_ISEL[4-7]) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-466.3.1.19 eTPU Input Select Register (SIU_ISEL 8) . . . . . . . . . . . . . . . . . . . . 6-606.3.1.20 eQADC Advance Trigger Selection (SIU_ISEL9) . . . . . . . . . . . . . . . 6-616.3.1.21 Decimation Filter Register 1 (SIU_DECFIL1) . . . . . . . . . . . . . . . . . . 6-626.3.1.22 Decimation Filter Register 2 (SIU_DECFIL2) . . . . . . . . . . . . . . . . . . 6-646.3.1.23 Chip Configuration Register (SIU_CCR) . . . . . . . . . . . . . . . . . . . . . 6-656.3.1.24 External Clock Control Register (SIU_ECCR) . . . . . . . . . . . . . . . . . 6-666.3.1.25 Compare B Register High (SIU_CBRH) . . . . . . . . . . . . . . . . . . . . . . 6-686.3.1.26 Compare B Register Low (SIU_CBRL) . . . . . . . . . . . . . . . . . . . . . . . 6-686.3.1.27 System Clock Register (SIU_SYSDIV) . . . . . . . . . . . . . . . . . . . . . . . 6-696.3.1.28 Halt Register (SIU_HLT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-696.3.1.29 Halt Acknowledge Register (SIU_HLTACK) . . . . . . . . . . . . . . . . . . . 6-716.3.1.30 Parallel GPIO Pin Data Output Register (SIU_PGPDO0 - SIU_PGPDO15)6-736.3.1.31 Parallel GPIO Pin Data Input Register (SIU_PGPDI0 - SIU_PGPDI15) 6-746.3.1.32 Masked Parallel GPIO Pin Data Output Register (SIU_MPGPDO0 -SIU_MPGPDO31) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-746.3.1.33 SIU DSPI Serialization Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-756.3.1.34 Serialized Output Signal Selection Registers for DSPI_D . . . . . . . . 6-836.3.1.35 GPIO Pin Data Input Registers (SIU_GPDI0_3 - SIU_GPDI508_511) -Standard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-85 6.4Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-866.4.1Pad Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-866.4.2Reset Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-876.4.2.1 Reset Boot Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-876.4.2.2 RESET Pin Glitch Detect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-876.4.3External Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-876.4.4GPIO Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-90MPC5674F Microcontroller Reference Manual Rev. 7Freescale Semiconductor Table of Contents-v6.4.5.1 eQADC External Trigger Input Multiplexing . . . . . . . . . . . . . . . . . . . . 6-916.4.5.2 SIU External Interrupt Input Multiplexing . . . . . . . . . . . . . . . . . . . . . . 6-926.4.5.3 Multiplexed Inputs for DSPI Multiple Transfer Operation . . . . . . . . . . 6-92Chapter7System Information Module7.1SIM Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-17.1.1SIM Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1Chapter8Boot Assist Module (BAM)8.1Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-1 8.2Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-1 8.3Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-18.3.1Normal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-18.3.2Debug Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-28.3.3Internal Boot Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-28.3.4Serial Boot Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-28.3.5Development Bus Boot Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2 8.4Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2 8.5Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-38.5.1BAM Program Flow Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-38.5.2BAM Program Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-48.5.3Reset Configuration Half Word (RCHW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-68.5.3.1 Application Start Address Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-88.5.4Internal Boot Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-88.5.5Serial Boot Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-88.5.5.1 CAN Controller Configuration in the Fixed Baud Rate Mode . . . . . . . 8-108.5.5.2 SCI Controller Configuration in Fixed Baud Rate Mode . . . . . . . . . . . 8-118.5.5.3 Serial Boot Mode Download Protocol . . . . . . . . . . . . . . . . . . . . . . . . . 8-118.5.5.4 Download Protocol Execution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-128.5.5.5 Baud Rate Detection Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-148.5.5.6 CAN Baud Rate Detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-148.5.6Booting from the Development Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-168.5.6.1 EBI Configuration for Separate Address and Data Development Bus BootMode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-168.5.6.2 EBI Configuration for multiplexed Address and Data Development BusBoot Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-178.5.7Enabling Debug of a Censored Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-17Chapter9Interrupts and Interrupt Controller (INTC)9.1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1MPC5674F Microcontroller Reference Manual Rev. 7Table of Contents-vi Freescale Semiconductor9.1.2Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-29.1.3Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-49.1.4Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-59.1.4.1 Software Vector Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-59.1.4.2 Hardware Vector Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-6 9.2External Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-7 9.3Memory Map and Register Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-79.3.1Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-99.3.1.1 INTC Module Configuration Register (INTC_MCR) . . . . . . . . . . . . . . . 9-99.3.1.2 INTC Current Priority Register (INTC_CPR) . . . . . . . . . . . . . . . . . . . 9-109.3.1.3 INTC Interrupt Acknowledge Register (INTC_IACKR) . . . . . . . . . . . . 9-109.3.1.4 INTC End-of-Interrupt Register (INTC_EOIR) . . . . . . . . . . . . . . . . . . 9-119.3.1.5 INTC Software Set/Clear Interrupt Registers (INTC_SSCIR0–7) . . . . 9-129.3.1.6 INTC Priority Select Registers (INTC_PSR0–479) . . . . . . . . . . . . . . . 9-13 9.4Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-139.4.1Interrupt Request Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-139.4.1.1 Peripheral Interrupt Requests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-319.4.1.2 Software configurable Interrupt Requests . . . . . . . . . . . . . . . . . . . . . 9-319.4.1.3 Unique Vector for Each Interrupt Request Source . . . . . . . . . . . . . . . 9-319.4.2Priority Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-319.4.2.1 Current Priority and Preemption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-329.4.2.2 LIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-339.4.3Details on Handshaking with Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-339.4.3.1 Software Vector Mode Handshaking . . . . . . . . . . . . . . . . . . . . . . . . . 9-339.4.3.2 Hardware Vector Mode Handshaking . . . . . . . . . . . . . . . . . . . . . . . . . 9-34 9.5Initialization and Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-359.5.1Initialization Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-359.5.2Interrupt Exception Handler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-369.5.2.1 Software Vector Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-369.5.2.2 Hardware Vector Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-379.5.3ISR, RTOS, and Task Hierarchy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-379.5.4Order of Execution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-389.5.5Priority Ceiling Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-399.5.5.1 Elevating Priority . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-399.5.5.2 Ensuring Coherency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-399.5.6Selecting Priorities According to Request Ratesand Deadlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-429.5.7Software configurable Interrupt Requests . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-429.5.7.1 Scheduling a Lower Priority Portion of an ISR . . . . . . . . . . . . . . . . . . 9-429.5.7.2 Scheduling an ISR on Another Processor . . . . . . . . . . . . . . . . . . . . . 9-439.5.8Lowering Priority Within an ISR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-439.5.9Negating an Interrupt Request Outside of its ISR . . . . . . . . . . . . . . . . . . . . . . 9-439.5.9.1 Negating an Interrupt Request as a Side Effect of an ISR . . . . . . . . . 9-439.5.9.2 Negating Multiple Interrupt Requests in One ISR . . . . . . . . . . . . . . . . 9-44MPC5674F Microcontroller Reference Manual Rev. 7Freescale Semiconductor Table of Contents-vii。
UC-3100系列硬件用户手册.pdf_1704940939.9741514说明书
UC-3100 Series Hardware User’s ManualEdition 1.0, October 2018/product© 2018 Moxa Inc. All rights reserved.UC-3100 Series Hardware User’s Manual The software described in this manual is furnished under a license agreement and may be used only in accordance withthe terms of that agreement.Copyright Notice© 2018 Moxa Inc. All rights reserved.TrademarksThe MOXA logo is a registered trademark of Moxa Inc.All other trademarks or registered marks in this manual belong to their respective manufacturers.DisclaimerInformation in this document is subject to change without notice and does not represent a commitment on the part of Moxa.Moxa provides this document as is, without warranty of any kind, either expressed or implied, including, but not limited to, its particular purpose. Moxa reserves the right to make improvements and/or changes to this manual, or to the products and/or the programs described in this manual, at any time.Information provided in this manual is intended to be accurate and reliable. However, Moxa assumes no responsibility for its use, or for any infringements on the rights of third parties that may result from its use.This product might include unintentional technical or typographical errors. Changes are periodically made to the information herein to correct such errors, and these changes are incorporated into new editions of the publication.Technical Support Contact Information/supportMoxa AmericasToll-free: 1-888-669-2872 Tel: +1-714-528-6777 Fax: +1-714-528-6778Moxa China (Shanghai office) Toll-free: 800-820-5036Tel: +86-21-5258-9955 Fax: +86-21-5258-5505Moxa EuropeTel: +49-89-3 70 03 99-0 Fax: +49-89-3 70 03 99-99Moxa Asia-PacificTel: +886-2-8919-1230 Fax: +886-2-8919-1231Moxa IndiaTel: +91-80-4172-9088 Fax: +91-80-4132-1045Table of Contents1.Introduction ...................................................................................................................................... 1-1Overview ........................................................................................................................................... 1-2 Model Description ............................................................................................................................... 1-2 Package Checklist ............................................................................................................................... 1-2 Product Features ................................................................................................................................ 1-2 Hardware Specifications ...................................................................................................................... 1-3 2.Hardware Introduction...................................................................................................................... 2-1Appearance ........................................................................................................................................ 2-2 LED Indicators .................................................................................................................................... 2-5 Monitoring the Function Button (FN Button) Action Using the SYS LED....................................................... 2-5 Reset to Factory Default ............................................................................................................... 2-6 Real-Time Clock ................................................................................................................................. 2-6 Placement Options .............................................................................................................................. 2-6 3.Hardware Connection Description ..................................................................................................... 3-1Wiring Requirements ........................................................................................................................... 3-2 Connector Description .................................................................................................................. 3-2 A.Regulatory Approval Statements ....................................................................................................... A-11Introduction The UC-3100 Series computing platform is designed for embedded data acquisition applications. The computer comes with two RS- 232/422/485 serial ports and dual auto-sensing 10/100 Mbps Ethernet LAN ports. These versatile communication capabilities let users efficiently adapt the UC-3100 to a variety of complex communications solutions.The following topics are covered in this chapter:❒Overview❒Model Description❒Package Checklist❒Product Features❒Hardware SpecificationsOverviewMoxa’s UC-3100 Series computers can be used as edge-field smart gateways for data pre-processing andtransmission, as well as for other embedded data acquisition applications. The UC-3100 Series includes three models, each supporting different wireless options and protocols.The UC-3100’s advanced heat dissipation design makes it suitable for use in temperatures ranging from -40 to 70°C. In fact, the Wi-Fi and LTE connections can be used simultaneously in both cold and hot environments, allowing you to maximize your “data pre-processing” and “data transmission” capability in most harshenvironments. In addition, TPM v2.0 uses a hardware chip to boost data security, making it highly unlikely that hackers will be able to steal your data, either remotely or locally.Model DescriptionRegion Model Name Carrier Approval Wi-Fi CAN SD SerialUS UC-3101-T-US-LXAT&T- - - 1 UC-3111-T-US-LX✓- ✓ 2 UC-3121-T-US-LX 1 - 1VZW UC-3101-T-US-LXVerizon- - - 1 UC-3111-T-US-LX✓- ✓ 2 UC-3121-T-US-LX 1 - 1EU/APAC UC-3101-T-US-LX-- - - 1 UC-3111-T-US-LX✓- ✓ 2 UC-3121-T-US-LX 1 - 1AU/NZS UC-3101-T-US-LXTelstra, Optus- - - 1 UC-3111-T-US-LX✓✓✓ 2 UC-3121-T-US-LX 1 - 1Package ChecklistBefore installing the UC-3100, verify that the package contains the following items:• 1 x UC-3100 Arm-based computer• 1 x DIN-rail mounting kit (preinstalled)• 1 x Power jack• 1 x 3-pin terminal block for power• 1 x CBL-4PINDB9F-100: 4-pin pin header to DB9 female console port cable, 100 cm• 1 x Quick installation guide (printed)• 1 x Warranty cardNOTE: Notify your sales representative if any of the above items are missing or damaged.Product Features•Armv7 Cortex-A8 1000 MHz processor•Integrated Bluetooth 4.1, Wi-Fi 802.11a/b/g/n, and LTE Cat.1 for the US, EU, AUS, and APAC regions •Supports TPM v2.0 (optional)•Industrial CAN 2.0 A/B protocol supported•-40 to 70°C system operating temperature•Meets the EN 61000-6-2 and EN 61000-6-4 standards for industrial EMC applications•Ready-to-run Debian 9 with 10-year long-term support•Supports Linux real-time OS mode•Robust Root File System to prevent the system from being bricked due to a firmware update failureHardware SpecificationsComputerCPU: Armv7 Cortex-A8 1000 MHzOS (preinstalled): Debian 9 (Kernel 4.4)USB: 1 USB 2.0 host (type A connector)DRAM: 512 MB DDR3 SDRAMStorage ExpansionMain Storage: 4 GB eMMC with OS preinstalledExpansion Storage (UC-3111 only): 1 SDHC/SDXC socketOther PeripheralsTPM: v2.0 reserved (SPI interface)SIM: 2 nano SIM slotsEthernet InterfaceLAN: 2 auto-sensing 10/100 Mbps ports (RJ45)Magnetic Isolation Protection: 1.5 kv built-inCellular InterfaceStandard: LTE (FDD) 3GPP Rel.9 CompliantRegional Variants:US Model:•LTE Bands: 1, 3, 8, 20, 28 (700, 800, 900, 1800, 2100 MHz)•GSM Bands: 900 and 1800 MHz•Carrier Approval: AT&TVZW Model:•LTE Bands: 4,13 (1700/2100 AWS, 700 MHz)•Carrier Approval: VerizonEU/APAC Model:•LTE Bands: 2, 4, 5, 12 (700, 850, 1700/2100 (AWS) and 1900 MHz)•UMTS Bands: 5, 4, 2 (WCDMA/FDD 850, 1700/2100 (AWS) and 1900 MHz)AU/NZS Model:•LTE Bands 3, 5, 8, 28 (1800, 850, 900, 700 MHz)•UMTS Bands 1, 5, 8 (WCDMA/FDD 2100, 850, 900 MHz)•Carrier Approval: Telstra, OptusWLAN Interface (UC-3111/3121 only)Standards:•IEEE 802.11a/b/g/n for Wireless LAN•IEEE 802.11i for Wireless SecuritySupported Bands: 2.4 GHz and 5 GHzSerial InterfaceStandards: 1 or 2 RS-232/422/485 ports, software-selectableConsole Port: Type: DB9 maleSerial Communication ParametersData Bits: 5, 6, 7, 8Stop Bits: 1, 1.5, 2Parity: None, Even, Odd, Space, MarkFlow Control: XON/XOFF, ADDC® (automatic data direction control) for RS-485Baudrate: 921600 bps (max.)Serial SignalsRS-232: TxD, RxD, RTS, CTS, GNDRS-422: TxD+, TxD-, RxD+, RxD-, GNDRS-485-4w: TxD+, TxD-, RxD+, RxD-, GNDRS-485-2w: Data+, Data-, GNDCAN InterfaceStandards: 1 CAN port, CAN 2.0A/2.0B compliantSignals: CAN_H, CAN_L, CAN_GND, CAN_SHLD, CAN_V+, GNDIsolation: 2kV digital isolationSpeed: 10 kbps to 1 MbpsConnector Type: DB9 maleConsole InterfaceStandards: 1 RS-232 portSignals: TxD, RxD, GNDConnector Type: 4-pin header output (115200, n, 8,1)Switches and ButtonsPush Button: Initially configured to return a diagnostic report, and to reset the device to factory defaults Physical CharacteristicsHousing: Al 5052Weight:550 g (1.22 lb)Dimensions:UC-3101: 128.5 x 89.1 x 26 mm (5.06 x 3.51 x 1.02 in)UC-3111, UC-3121: 128.5 x 89.1 x 41 mm (5.06 x 3.51 x 1.61 in)Mounting: Wall, DIN railEnvironmental LimitsOperating Temperature:Standard Temp. models: -10 to 60°C (-14 to 140°F)Wide Temp. Models: -40 to 70°C (-40 to 158°F)Storage Temperature: -40 to 85°C (-40 to 185°F)Ambient Relative Humidity: 5 to 95% (non-condensing)Anti-Vibration: 2 Grms @ IEC 60068-2-64, random wave, 5-500 Hz, 1 hr per axis (without any USB devices attached)Anti-Shock: 20 g @ IEC 60068-2-27, half sine wave, 30 msPower RequirementsInput Voltage: 9 to 36 VDC (3-pin terminal block, V+, V-, SG)Input Current: 500 mA @ 12 VDCPower Consumption: 6 W (without cellular mode active)Standards and CertificationsSafety: UL 60950-1Hazardous Environments: C1D2, IECEx, ATEXEMC: IEC 61000-6-2/6-4EMI: CISPR 32, FCC Part 15B Class AEMS:IEC 61000-4-2 ESD: Contact: 4 kV; Air: 8 kVIEC 61000-4-3 RS: 80 MHz to 1 GHz, 10 V/mIEC 61000-4-4 EFT: Power: 2 kV; Signal: 1 kVIEC 61000-4-5 Surge: DC Power: 0.5 kV; Signal: 1 kVIEC 61000-4-6 CS: 10 VIEC 61000-4-8 PFMF: 30 A/mGreen Product: RoHS, CRoHS, WEEECellular: CE: EN 301511 (2G), EN 301908-1 (4G), MPE SAR, EN 301489-1-1 (2G), EN 301489-24 (4G), FCC, PTCRB, AS/NZS S042, AS/NZS 60950Wi-Fi: EN 301489-1-17 (EMC), EN 300328 (2.4G), EN 301893 (5G)ReliabilityAlert Tools: External RTC (real-time clock)Automatic Reboot Trigger: External WDT (watchdog timer)WarrantyWarranty Period: 5 years Details: See /warranty2Hardware Introduction The UC-3100 embedded computers are compact and rugged making them suitable for industrial applications. The LED indicators help in monitoring performance and troubleshooting issues. The multiple ports provided on the computer can be used to connect to a variety of devices. The UC-3100 comes with a reliable and stable hardware platform that lets you devote the bulk of your time to application development. In this chapter, we provide basic information about the embedded computer’s hardware and its various components.The following topics are covered in this chapter:❒Appearance❒LED Indicators❒Monitoring the Function Button (FN Button) Action Using the SYS LEDR eset to Factory Default❒Real-Time Clock❒Placement OptionsUC-3100 Series Hardware Hardware IntroductionAppearanceUC-3101UC-3111Dimensions [units: mm (in)] UC-3101UC-3121LED IndicatorsRefer to the following table for information about each LED. LED Name Status Function NotesSYSGreen Power is onRefer to the Monitoring the Function Button (FN Button) Action Using the SYS LED section for more details. Red FN button is pressed OffPower is offLAN1/ LAN2 Green 10/100 Mbps Ethernet mode Off Ethernet port is not activeCOM1/ COM2/ CAN1 OrangeSerial/CAN port is transmitting or receiving dataOff Serial/CAN port is not activeWi-FiGreen Wi-Fi connection has been establishedClient mode : 3 levels with signal strength 1 LED is on: Poor signal quality 2 LEDs are on: Good signal quality All 3 LEDs are on: Excellent signal quality AP mode : All 3 LEDs blinking at the same timeOffWi-Fi interface is not activeLTEGreenCellular connection has been established3 levels with signal strength 1 LED is on: Poor signal quality 2 LEDs are on: Good signal quality All 3 LEDs are on: Excellent signal qualityOffCellular interface is not activeMonitoring the Function Button (FN Button) Action Using the SYS LEDThe FN button is used to perform software reboot or to perform firmware restoration. Pay attention to the SYS LED indicator and release the FN button at the appropriate time to enter the correct mode to either reboot your device or restore your device to the default configuration.The mapping of the action on the FN button with the behavior of the SYS LED and the resulting system status is given below: System Status FN Button ActionSYS LED behaviorReboot Press and release within 1 sec Green, blinking until the FN button is releasedRestorePress and hold for over 7 secFN Button Pressed Release the button within 1 sec to perform a software Release the button after 7 sec to perform a system Time (sec) 01379Reset to Factory DefaultFor details on resetting your device to factory default values, refer to the Function Button and LED Indicators section.Real-Time ClockThe real-time clock in the UC-3100 is powered by a lithium battery. We strongly recommend that you do not replace the lithium battery without the help of a Moxa support engineer. If you need to change the battery,contact the Moxa RMA service team.Placement OptionsThe UC-3100 computer can be mounted on to a DIN rail or on a wall. The DIN-rail mounting kit is attached by default.To order a wall-mounting kit, contact a Moxa sales representative.DIN-Rail MountingTo mount the UC-3100 on to a DIN rail, do the following:1.Pull down the slider of the DIN-rail bracket located at the back of the unit2.Insert the top of the DIN rail into the slot just below the upper hook of the DIN-rail bracket.tch the unit firmly on to the DIN rail as shown in the illustrations below.4.Once the computer is mounted properly, you will hear a click and the slider will rebound back into placeautomatically.Wall Mounting (Optional)The UC-3100 can also be wall mounted. The wall-mounting kit needs to be purchased separately. Refer to datasheet for more information.1.Fasten the wall-mounting kit to the UC-3100 as shown below:e two screws to mount the UC-3100 on to a wall.3 Hardware Connection DescriptionThis section describes how to connect the UC-3100 to a network and connect various devices to the UC-3100. The following topics are covered in this chapter:❒Wiring RequirementsC onnector DescriptionWiring RequirementsIn this section, we describe how to connect various devices to the embedded computer. You must pay attention to the following common safety precautions, before proceeding with the installation of any electronic device: • Use separate paths to route wiring for power and devices. If power wiring and device wiring paths mustcross, make sure the wires are perpendicular at the intersection point.NOTE: Do not run the wires for signal or communication and power wiring in the same wire conduit. To avoid interference, wires with different signal characteristics should be routed separately.• You can use the type of signal transmitted through a wire to determine which wires should be kept separate.The rule of thumb is that wiring that shares similar electrical characteristics can be bundled together. • Keep input wiring and output wiring separate.• We strongly advise that you label wiring to all devices in the system for easy identification.Connector DescriptionPower ConnectorConnect the power jack (in the package) to the UC-3100’s DC terminal block (located on the bottom panel), and then connect the power adapter. It takes several seconds for the system to boot up. Once the system is ready, the SYS LED will light up.Grounding the UC-3100Grounding and wire routing help limit the effects of noise due to electromagnetic interference (EMI). There are two ways to connect the UC-3100 grounding wire to the ground.1.Through the SG (Shielded Ground, sometimes called Protected Ground):The SG contact is the left-most contact in the 3-pin power terminal block connector when viewed from the angle shown here. When you connect to the SG contact, the noise will be routed throughthe PCB and the PCB copper pillar to the metal chassis.2. Through the GS (Grounding Screw):The GS is located between the console port and the power connector. When you connect to the GS wire, the noise is routed directly from the metal chassis.Ethernet PortThe 10/100 Mbps Ethernet port uses the RJ45 connector. The pin assignment of the port is shown below:Pin Signal 1 ETx+ 2ETx- 3 ERx+ 4 – 5 – 6 ERx- 7 – 8–Serial PortThe serial port uses the DB9 male connector. It can be configured by software for the RS-232, RS-422, or RS-485 mode. The pin assignment of the port is shown below:Pin RS-232 RS-422 RS-4851 DCD TxD-(A) –2 RxD TxD+(A) –3 TxD RxD+(B) Data+(B)4 DTR RxD-(A) Data-(A) 5GND GND GND 6 DSR –– 7 TRS – – 8 CTS – – 9–––CAN Port (UC-3121 Only)The UC-3121 comes with a CAN port which uses the DB9 male connector and is compatible with the CAN 2.0A/B standard. The pin assignment of the port is shown below:Pin Signal Name1 –2 CAN_L3 CAN_GND4 – 5CAN_SHLD6 GND7 CAN_H8 – 9CAN_V+SIM Card SocketThe UC-3100 comes with two nano-SIM card sockets for cellular communication. The nano-SIM card sockets are located on the same side as the antenna panel. To install the cards, remove the screw and the protection cover to access the sockets, and then insert the nano-SIM cards into the sockets directly. You will hear a click when the cards are in place. The left socket is for SIM 1 and the right socket is for SIM 2. To remove the cards, push the cards in before releasing them.SMA ConnectorThe UC-3100 comes with a built-in wireless module. You must connect the antenna to the SMA connector before you can use the wireless function (refer to datasheet for more information). The C1 & C2 connectors are interfaces to the cellular module, W1 & W2 (UC-3111 & UC-3121 only) are interfaces to the Wi-Fi module.SD Card Socket (UC-3111 Only)The UC-3111 comes with a SD-card socket for storage expansion. The SD card socket is located next to the Ethernet port. To install the SD card, remove the screw and the protection cover to access the socket, and then insert the SD card into the socket. You will hear a click when the card is in place. To remove the card, push the card in before releasing it.Console PortThe console port is an RS-232 port that you can connect to with a 4-pin pin header cable (in the package). You can use this port for debugging or firmware upgrade.PinSignal 1 GND 2NC 3 RxD 4TxDUSBThe USB port is a type-A USB 2.0 version port, which can be connected with a USB storage device or other type-A USB compatible devices.ARegulatory Approval StatementsThis device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.Class A: FCC Warning! This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the users will be required to correct the interference at their own expense.European Community。
Allen Bradley SLC MicroLogix Imprint 2 通信用户手册说明书
CommunicationAllen Bradley SLC / MicroLogixImprint2 Communication Allen Bradley SLC / MicroLogix 11/2013 MN04802105Z-EN Manufacturer Eaton Automation AG Spinnereistrasse 8-14 CH-9008 St. Gallen Switzerland Support Region North America Eaton Corporation Electrical Sector 1111 Superior Ave. Cleveland, OH 44114 United States 877-ETN-CARE (877-386-2273) Other regions Please contact your supplier or send an E-Mail to: a ******************* Original instructions The German version of this document is the original instructions Editor Manfred Hüppi Brand and product names All brand and product names are trademarks or registered trademarks of the owner concerned. Copyright © Eaton Automation AG, CH-9008 St. Gallen All rights reserved, also for the translation. None of this document may be reproduced or processed, duplicated or distributed by electronic systems in any form (print, photocopy, microfilm or any other process) without the written permission of Eaton Automation AG, St. Gallen. Subject to modifications.ImprintCommunication Allen Bradley SLC / MicroLogix 11/2013 MN04802105Z-EN 3Imprint1 General ............................................................................................................................... 5 1.1 Aim and purpose of this document ...................................................................................... 5 1.2 Comments about this user manual ..................................................................................... 5 1.3Additional documentation .................................................................................................... 5 2 Communication overview ................................................................................................. 7 2.1 Serial communication operating principle ........................................................................... 7 2.2 Ethernet communication operating principle ....................................................................... 8 2.3 Supported systems ............................................................................................................. 9 2.3.1 Client ................................................................................................................................... 9 2.3.2 Server .................................................................................................................................. 9 2.4 Communication parameters (serial communication) ......................................................... 10 2.5 Supported data .................................................................................................................. 11 2.5.1 Addresses ......................................................................................................................... 11 2.5.2 Timer ................................................................................................................................. 11 2.5.3Counter ............................................................................................................................. 13 3Hardware .......................................................................................................................... 15 4 Software ........................................................................................................................... 17 4.1 GALILEO ........................................................................................................................... 17 4.1.1 Configuring communication in GALILEO – serial interface ............................................... 17 4.1.2 Configuring communication in GALILEO – Ethernet interface .......................................... 18 4.1.3 Addressing variables in GALILEO ..................................................................................... 19 4.2 THC ................................................................................................................................... 20 4.2.1Configuration ..................................................................................................................... 20 5 Error messages (21)1 General4Communication Allen Bradley SLC / MicroLogix11/2013 MN04802105Z-EN 1 General1General1.1Aim and purpose of this documentThis user manual contains information required for connecting the automation components of EatonAutomation to SLC and MicroLogix from Allen Bradley.This user manual describes the installation and configuration. The operating system and applicationsoftware are not described.1.2Comments about this user manualPlease send any comments, recommendations or suggestions relating to this user manual to********************.1.3Additional documentationFurther documents may be helpful in addition to this user manual.The following documentation can be obtained from our website ():[1]MN05010007ZSystem Description Windows CECommunication Allen Bradley SLC / MicroLogix11/2013 MN04802105Z-EN 51 General6Communication Allen Bradley SLC / MicroLogix11/2013 MN04802105Z-EN 2 Communication overviewCommunication Allen Bradley SLC / MicroLogix 11/2013 MN04802105Z-EN 72Communication overview 2.1 Serial communication operating principleThe communication uses the DF1 protocol via the RS232 interface. Communication is implemented from a panel or a PC with exactly one «Controller» per RS232.Fig. 1 Serial communication operating principle2 Communication overview8 Communication Allen Bradley SLC / MicroLogix 11/2013 MN04802105Z-EN 2.2Ethernet communication operating principle The communication uses the DF1 protocol via the Ethernet interface. Communication is implemented from a panel or a PC with exactly one «Controller» per Ethernet.Fig. 2 Ethernet communication operating principle2 Communication overview2.3Supported systems2.3.1ClientThe following devices are suitable for communication with Allen Bradley SLC / MicroLogix:⏹PC with GALILEO Open and RS232 interface⏹MICRO PANEL XV Series with RS232 interface⏹MICRO PANEL M Series with RS232 interfaceThe term «Client» in the following documentation stands for these devices and the software runningon them.2.3.2ServerThe following «Controllers» are supported:⏹SLC 5/03 (RS232 interface)⏹SLC 5/04 (RS232 interface)⏹SLC 5/05 (RS232 interface)⏹MicroLogix (RS232 interface and Ethernet interface)The term «Controller» in the following documentation stands for these devices.Communication Allen Bradley SLC / MicroLogix11/2013 MN04802105Z-EN 92 Communication overview2.4Communication parameters (serial communication)The baud rate settings for «Client» and «Controller» must be identical.The «Client» uses node address 0.Configure the DF1 interface of the «Controller»:⏹Node address: 1⏹System Mode⏹DF1 Full Duplex⏹8 Data Bits, Even Parity, 1 Stop Bit⏹No Handshaking⏹BCC or CRC Error Detection⏹1000 ms ACK Timeout⏹ 3 NAK Retries⏹ 3 ENQ Retries10Communication Allen Bradley SLC / MicroLogix11/2013 MN04802105Z-EN 2 Communication overview2.5Supported data2.5.1AddressesDescription Address rangeB-File B0:0 … B255:255N-File N0:0 … N255:255F-File F0:0 … F255:255Tab. 1Supported addressesIn addition to the files listed above, there are also supported timer and counter queries for theEthernet communication.The available address ranges are:Description Address rangeT-File T0:0 … T255:255C-File C0:0 … C255:255Tab. 2Supported addresses2.5.2TimerThe Timer consists of three Word Datablocks.Word Bit0 … 12 13 14 15DN TT EN0 Internal useonly1 Preset value2 Accumulated valueTab. 3DN = Timer Date BitTT = Timer Timing BitEN = Timer Enable Bit2 Communication overviewTo access the entire data block on the HMI, it is necessary to make a Word Array with 3 elements.Fig. 3Timer ArrayThe start address of the data block is specified as usual.Fig. 4Setting address2 Communication overview2.5.3CounterThe Counter consists of three Word Datablocks.Word Bit0 … 8 11 12 13 14 15UN OV DN CD CU0 Notused1 Preset value2 Accumulated valueTab. 4UN = Count Underflow BitOV = Count Overflow BitDN = Count Done BitCD = Count Down Enable BitCU = Count Up Enable BitPerform the same steps as described under 2.4.2 Timer, to create Counter tags.2 Communication overview3 Hardware3HardwareBoth «Client» and also «Controller» are provided with an RS232 interface via which they can beconnected. With the MicroLogix Controller there is also the possibility of a connection via Ethernet.Information on mounting, wiring and commissioning is provided in the operating instructions of therespective devices.3 Hardware4 Software4Software4.1GALILEOThe GALILEO visualization software supports several parallel communication channels. A«Controller» is assigned one serial interface exclusively. However, it is possible to configure severalcommunication channels to the same «Controller» (the same serial interface).4.1.1Configuring communication in GALILEO – serial interfaceChoose «A. Bradley – SLC 5/03 – MicroLogix – DF1» and set the communication parameters.1)Configuring communication in GALILEOCommunication parameter CommentBaud rate The baud rate settings for «Client» and «Controller» must beidentical.Status Refresh Read the Online Help of your GALILEO version.Tab. 5Communication parameters4 Software4.1.2Configuring communication in GALILEO – Ethernet interfaceChoose «A. Bradley – MicroLogix – EtherNet/IP» and set the communication parameters.2)Configuring communication in GALILEO – Ethernet interfaceCommunication parameter CommentIP Address or Hostname IP Address or HostnameExample: 192.168.1.1Tab. 6Communication parameters4 Software4.1.3Addressing variables in GALILEOThe chapter 2.5 describes which variables of the «Controllers» you can access. GALILEO supportsthe following address forms and data types:GALILEO ControllerB%d:%dVariables on the controller.N%d:%dF%d:%dTab. 7Address forms in GALILEOGALILEO ControllerBit / Error B, NByte B, NWord B, Ndword not supportedFloat FString not supportedStructure B, NSystem B, NTab. 8Data types in GALILEO4 Software4.2THCA THC component (THC = Tag Handle Container) is used on the «Client» for the communication tothe server. As a GALILEO user, you do not have anything to do directly with the THC component.However, you need the following information when using, for example, the ThcSymbolicClient libraryin XSoft-CoDeSys or MXpro.4.2.1ConfigurationConfiguration parameter ValueComponent MicroPanel.AB.SLC.dllProgId MicroInnovation. AB.SLC.TagServerTab. 9THC configuration parameterCommunication parameter Data type CommentLocalSerialPort String Serial interface used by the cliente.g. COM1BaudRate Unsigned32 Baud rate of the serial interface of the cliente.g. 19200Tab. 10THC communication parameter5Error messages3)Error message5.1Local STS Error CodesThe local STS error code nibble contains errors found by the local node. Error codes (in hex) that youmay find in the local error code nibble include.Code Explanation00 Success – no error01 DST node is out of buffer space02 Cannot guarantee delivery: link layer(The remote node specified does not ACK command.)03 Duplicate token holder detected04 Local port is disconnected05 Application layer timed out waiting for a response06 Duplicate not detected07 Station is offline08 Hardware faultTab. 11Local STS Error CodesLocal STS codes 09 through 0F (hex) are not used.5.2Remote STS Error CodesThe remote STS error code nibble contains errors found by the remote node receiving the command.Error codes (in hex) that you may find in the remote error code nibble of the STS byte include.Code Explanation00 Success – no error10 Illegal command or format20 Host has a problem and will not communicate30 Remote node host is missing, disconnected or shutdown40 Host could not complete function due to hardware fault50 Addressing problem or memory protect rungs60 Function not allowed due to command protectionselection70 Processor is in Program mode80 Compatibility mode file missing or communicationzone problem90 Remote node cannot buffer commandA0 Wait ACK (1775-KA buffer full)B0 Remote node problem due to downloadC0 Wait ACK (1775-KA buffer full)D0 Not usedE0 Not usedF0 Error code in the EXT STS byte (see Tab. 13)Tab. 12Remote STS Error Codes5.2.1EXT STS byteYou have an EXT STS byte if your STS code is F0 (hex).EXT STS Codes for CMD ofHex Code Explanation0 Not used1 A file has an illegal value2 Less levels specified in address than minimum for anyaddress3 More levels specified in address than system supports4 Symbol not found5 Symbol is of improper format6 Address doesn’t point to something usable7 File is wrong size8 Cannot complete request, situation has changed sincethe start of the command9 Data or file is too largeA Transaction size plus word address is too largeB Access denied, improper privilegeC Condition cannot be generated – resource is notavailableD Condition already exists – resource is alreadyavailableE Command cannot be executedF Histogram overflow10 No access11 Illegal data type12 Invalid parameter or invalid data13 Address reference exists to deleted area14 Command execution failure for unknown reason;possible PLC-3 histogram overflow15 Data conversion error16 Scanner not able to communicate with 1771 rackadapter17 Type mismatch18 1771 module response was not valid19 Duplicated label22 *Remote rack fault23 *Timeout24 *Unknown error1A File is open; another node owns it1B Another node is the program owner 1C Reserved1D Reserved1E Data table element protection violation 1F Temporary internal problemTab. 13Remote STS Error Codes*These codes are for passthru from a DH+ link to a remote I/O link.。
串口通讯标准
UART IP Core SpecificationAuthor: Jacob Gorban jacob.gorban@Rev. 0.3June 23, 2001This page has been intentionally left blankRevision History Rev.Date Author Description0.1Jacob Gorban First Draft0.227/5/01Jacob Gorban Added reset values and other changes.0.323/6/01Jacob Gorban Divisor latch is 16-bit wide updateContents Introduction (1)IO ports (2)Clocks (3)Registers (4)Operation (12)Architecture (13)Introduction The UART (Universal Asynchronous Receiver/Transmitter) core provides serial communication capabilities, which allow communication with modem or other external devices, like another computer using a serial cable and RS232 protocol. This core is designed to be maximally compatible with the industry standard National Semiconductors’ 16550A device.Features:•WISHBONE interface•FIFO only operation•Register level and functionality compatibility with NS16550A (but not 16450).IO ports 2.1 WISHBONE interface signalsPort Width Direction DescriptionCLK_I1Input Block’s clock inputRST_I1Input Asynchronous ResetADR_I3Input Used for register selectionDAT_I8Input Data inputDAT_O8Output Data outputWE_I1Input Write or read cycle selectionSTB_I1Input Specifies transfer cycleCYC_I1Input A bus cycle is in progressACK_O1Output Acknowledge of a transfer2.2 Other internal signalsPort Width Direction DescriptionINT_O1Output Interrupt output2.3 External (off-chip) connectionsPort Width Direction DescriptionSTX_O1Output The serial output signalSRX_I1Input The serial input signalRTS_O1Output Request To SendDTR_O1Output Data Terminal ReadyCTS_I1Input Clear To SendDSR_I1Input Data Set ReadyRI_I1Input Ring IndicatorDCD_I1Input Data Carrier DetectClocks Clocks table:Name SourceRates (MHz)Remarks DescriptionMax Min Resolution????????Wishbone clock clk_wb Wishbone busRegisters 4.1 Registers listIn addition, there are 2 Clock Divisor registers that together form one 16-bit.The registers can be accessed when the 7th (DLAB) bit of the Line Control Register is set to ‘1’. At this time the above registers at addresses 0-1 can’t be accessed.4.2 Interrupt Enable Register (IER)This register allows enabling and disabling interrupt generation by the UART. Bit #Access Description0RW Received Data available interrupt‘0’ – disabled‘1’ – enabled1RW Transmitter Holding Register empty interrupt‘0’ – disabled‘1’ – enabled2RW Receiver Line Status Interrupt‘0’ – disabled‘1’ – enabled3RW Modem Status Interrupt‘0’ – disabled‘1’ – enabled7-4RW Reserved. Should be logic ‘0’.Reset Value: 00h4.3 Interrupt Identification Register (IIR)The IIR enables the programmer to retrieve what is the current highest priority pending interrupt.Bit 0 indicates that an interrupt is pending when it’s logic ‘0’. When it’s ‘1’ – no interrupt is pending.The following table displays the list of possible interrupts along with the bits they enable,priority, and their source and reset control.B i t 3B i t 2B i t 1P r i o r i t yInterrupt Type Interrupt SourceInterrupt Reset Control0111st Receiver Line StatusParity, Overrun or Framing errors or Break Interrupt Reading the Line Status Register 0102nd Receiver Data available FIFO trigger level reached FIFO drops below trigger level112ndTimeout IndicationThere’s at least 1 character in the FIFO but no character has been input to the FIFO or read from it for the last 4Char times.Reading from the FIFO (Receiver Buffer Register)0013rdTransmitter HoldingRegister empty Transmitter Holding Register Empty Writing to theTransmitter Holding Register or reading the IIR.0004thModem StatusCTS, DSR, RI or DCD.Reading the Modem status register.Bits 4 and 5: Logic ‘0’.Bits 6 and 7: Logic ‘1’ for compatibility reason.Reset Value: 1The FCR allows selection of the FIFO trigger level (the number of bytes in FIFO required to enable the Received Data Available interrupt). In addition, the FIFOs can be cleared using this register.Bit #Access Description0W Ignored (Used to enable FIFOs in NS16550D). Since this UARTonly supports FIFO mode, this bit is ignored.1W Writing a ‘1’ to bit 1 clears the Receiver FIFO and resets its logic.But it doesn’t clear the shift register, i.e. receiving of the currentcharacter continues.2W Writing a ‘1’ to bit 2 clears the Transmitter FIFO and resets itslogic. The shift register is not cleared, i.e. transmitting of thecurrent character continues.5-3W Ignored7-6W Define the Receiver FIFO Interrupt trigger level‘00’ – 1 byte‘01’ – 4 bytes‘10’ – 8 bytes‘11’ – 14 bytesReset Value : 11000000bThe line control register allows the specification of the format of the asynchronous data communication used. A bit in the register also allows access to the Divisor Latches, which define the baud rate. Reading from the register is allowed to check the current settings of the communication.Bit #Access Description1-0RW Select number of bits in each character‘00’ – 5 bits‘01’ – 6 bits‘10’ – 7 bits‘11’ – 8 bits2RW Specify the number of generated stop bits‘0’ – 1 stop bit‘1’ – 1.5 stop bits when 5-bit character length selected and2 bits otherwiseNote that the receiver always checks the first stop bit only.3RW Parity Enable‘0’ – No parity‘1’ – Parity bit is generated on each outgoing character andis checked on each incoming one.4RW Even Parity select‘0’ – Odd number of ‘1’ is transmitted and checked in each word (data and parity combined). In other words, if the data has aneven number of ‘1’ in it, then the parity bit is ‘1’.‘1’ – Even number of ‘1’ is transmitted in each word.5RW Stick Parity bit.‘0’ – Stick Parity disabled‘1’ - If bits 3 and 4 are logic ‘1’, the parity bit is transmitted and checked as logic ‘0’. If bit 3 is ‘1’ and bit 4 is ‘0’ then theparity bit is transmitted and checked as ‘1’.6RW Break Control bit‘1’ – the serial out is forced into logic ‘0’ (break state).‘0’ – break is disabled7RW Divisor Latch Access bit.‘1’ – The divisor latches can be accessed‘0’ – The normal registers are accessedReset Value: 00000011b4.6 Modem Control Register (MCR)The modem control register allows transferring control signals to a modem connected to the UART.Bit #Access Description0W Data Terminal Ready (DTR) signal control‘0’ – DTR is ‘1’‘1’ – DTR is ‘0’1W Request To Send (RTS) signal control‘0’ – RTS is ‘1’‘1’ – RTS is ‘0’2W Out1. In loopback mode, connected Ring Indicator (RI) signal input 3W Out2. In loopback mode, connected to Data Carrier Detect (DCD)input.4W Loopback mode‘0’ – normal operation‘1’ – loopback mode. When in loopback mode, the SerialOutput Signal (STX_O) is set to logic ‘1’. The signal of thetransmitter shift register is internally connected to the input of thereceiver shift register.The following connections are made:DTR Î DSRRTS Î CTSOut1 Î RIOut2 Î DCD7-5W IgnoredReset Value: 04.7 Line Status Register (LSR)Bit #Access Description0R Data Ready (DR) indicator.‘0’ – No characters in the FIFO‘1’ – At least one character has been received and is in the FIFO.1R Overrun Error (OE) indicator‘1’ – If the FIFO is full and another character has beenreceived in the receiver shift register. If another character is startingto arrive, it will overwrite the data in the shift register but the FIFOwill remain intact. The bit is cleared upon reading from the register.Generates Receiver Line Status interrupt.‘0’ – No overrun state2R Parity Error (PE) indicator‘1’ – The character that is currently at the top of the FIFOhas been received with parity error. The bit is cleared upon readingfrom the register. Generates Receiver Line Status interrupt.‘0’ – No parity error in the current character3R Framing Error (FE) indicator‘1’ – The received character at the top of the FIFO did nothave a valid stop bit. The UART core tries re-synchronizing byassuming that the bit received was a start bit. Of course, generally,it might be that all the following data is corrupt. The bit is clearedupon reading from the register. Generates Receiver Line Statusinterrupt.‘0’ – No framing error in the current character4R Break Interrupt (BI) indicator‘1’ – A break condition has been reached in the currentcharacter. The break occurs when the line is held in logic 0 for atime of one character (start bit + data + parity + stop bit). In thatcase, one zero character enters the FIFO and the UART waits for avalid start bit to receive next character. The bit is cleared uponreading from the register. Generates Receiver Line Status interrupt.‘0’ – No break condition in the current character5R Transmit FIFO is empty.‘1’ – The transmitter FIFO is empty. Generates Transmitter Holding Register Empty interrupt. The bit is cleared in thefollowing cases: The LSR has been read, the IIR has been read ordata has been written to the transmitter FIFO.‘0’ – Otherwise6R Transmitter Empty indicator.‘1’ – Both the transmitter FIFO and transmitter shift register are empty. The bit is cleared upon reading from the register or uponwriting data to the transmit FIFO.Bit #Access Description‘0’ – Otherwise7R‘1’ – At least one parity error, framing error or breakindications have been received and are inside the FIFO. The bit iscleared upon reading from the register.‘0’ – Otherwise.4.8 Modem Status Register (MSR)The register displays the current state of the modem control lines. Also, four bits also provide an indication in the state of one of the modem status lines. These bits are set to ‘1’ when a change in corresponding line has been detected and they are reset when the register is being read.Bit #Access Description0R Delta Clear To Send (DCTS) indicator‘1’ – The CTS line has changed its state.1R Delta Data Set Ready (DDSR) indicator‘1’ – The DSR line has changed its state.2R Trailing Edge of Ring Indicator (TERI) detector. The RI line haschanged its state from low to high state.3R Delta Data Carrier Detect (DDCD) indicator‘1’ – The DCD line has changed its state.4R Complement of the CTS input or equals to RTS in loopback mode.5R Complement of the DSR input or equals to DTR in loopback mode. 6R Complement of the RI input or equals to Out1 in loopback mode.7R Complement of the DCD input or equals to Out2 in loopback mode.4.9 Divisor LatchesThe divisor latches can be accessed by setting the 7th bit of LCR to ‘1’. You should restore this bit to ‘0’ after setting the divisor latches in order to restore access to the other registers that occupy the same addresses. The 2 bytes form one 16-bit register, which is internally accessed as a single number. You should therefore set all 2 bytes of the register to ensure normal operation. The register is set to the default value of 0 on reset, which disables all serial I/O operations in order to ensure explicit setup of the register in the software. The value set should be equal to (system clock speed) / (16 x desired baud rate). The internal counter starts to work when the LSB of DL is written, so when setting the divisor, write the MSB first and the LSB last.OperationThis UART core is very similar in operation to the standard 16550 UART chip with the main exception being that only the FIFO mode is supported. The scratch register is removed, as it serves no purpose.5.1 InitializationUpon reset the core performs the following tasks:•The receiver and transmitter FIFOs are cleared.•The receiver and transmitter shift registers are cleared•The Divisor Latch register is set to 0.•The Line Control Register is set to communication of 8 bits of data, no parity, 1 stop bit.•All interrupts are disabled in the Interrupt Enable Register.For proper operation, perform the following:•Set the Line Control Register to the desired line control parameters. Set bit 7 to ‘1’to allow access to the Divisor Latches.•Set the Divisor Latches, MSB first, LSB next.•Set bit 7 of LCR to ‘0’ to disable access to Divisor Latches. At this time thetransmission engine starts working and data can be sent and received.•Set the FIFO trigger level. Generally, higher trigger level values produce lessinterrupt to the system, so setting it to 14 bytes is recommended if the systemresponds fast enough.•Enable desired interrupts by setting appropriate bits in the Interrupt Enableregister.Remember that (Input Clock Speed)/(Divisor Latch value) = 16 x the communication baud rate. Since the protocol is asynchronous and the sampling of the bits is performed in the perceived middle of the bit time, it is highly immune to small differences in the clocks of the sending and receiving sides, yet no such assumption should be made when calculating the Divisor Latch values.Architecture The core implements the WISNBONE SoC bus interface for communication with the system. It has an 8-bit data bus for compatibility reason. The core requires one interrupt. It requires 2 pads in the chip (serial in and serial out) and, optionally, another six modem control signals, which can otherwise be implemented using general purpose I/Os on the chip.The block diagram of the core is on the following page.。
SERIAL COMMUNICATION EQUIPMENT
专利名称:SERIAL COMMUNICATION EQUIPMENT 发明人:MIWA SHOHEI申请号:JP15005489申请日:19890613公开号:JPH0314335A公开日:19910123专利内容由知识产权出版社提供摘要:PURPOSE:To prevent the occurrence of misreading by making the phases of clocks variable to be selected. CONSTITUTION:The serial communication equipment is provided with clock generating parts 10 to 1n for generating plural clocks CLK0 to CLKn having the same frequency as a clock CLK used for sending a serial input SIN but mutually shifted at their phases, a clock selector 20 for detecting the changing point of the serial input SIN and setting up a point of time delayed from the detected point as a new changing point, a serial input register 30 for inputting successive serial inputs SIN in order by respective shift clocks, and a clock switching part 40 for applying a corresponding clock to the register 30 in accordance with the output of the clock selection part 20. Since the serial inputs can be read out at respective stabilized positions in the serial communication equipment, the occurrence of misreading can be prevented.申请人:FUJITSU TEN LTD更多信息请下载全文后查看。
串口通信基础
串口通信基础1、0xC0转换为二进制数结果是()? [单选题] *A.1100 0000(正确答案)B.0000 1100C.0011 0000D.1011 00002、0x1B转换为二进制数结果是()? [单选题] *A.1011 0001B.0001 1011(正确答案)C.001 1100D.0011 11003、P1DIR |= 0x03的作用是()? [单选题] *A. 设置P1_0、P1_1端口为输出(正确答案)B. 设置P1_0、P1_1端口为输入C. 设置P1_2、P1_3端口为输出D. 设置P1_2、P1_3端口为输入4、数据通信时,根据CPU与外设之间的连线结构和数据传送方式的不同,可以将通信方式分为两种:是()? *A. 并行通信(正确答案)B. 串行通信(正确答案)C. 异步通信D. 同步通信5、异步通信以字符为单位进行数据传送,每一个字符均按照固定的格式传送,称为帧。
每一帧数据由哪些构成()? *A. 起始位(低电平)(正确答案)B. 数据位(正确答案)C. 奇偶校验位(正确答案)D. 停止位(正确答案)6、串口是串行接口(serial port)的简称,也称为串行通信接口或COM接口。
[判断题] *对(正确答案)错7、串口通信是指采用串行通信协议(serial communication)在一条信号线上将数据一个比特一个比特地逐位进行传输的通信模式。
[判断题] *对(正确答案)错8、在串行通信中,数据在1位宽的单条线路上进行传输,一个字节的数据要分为8次,由低位到高位按顺序一位一位的进行传送。
[判断题] *对(正确答案)错9、CC2530芯片共有UART0和UART1两个串行通信接口。
[判断题] *对(正确答案)错10、常用的两种基本串行通信方式包括同步通信和异步通信。
[判断题] *对(正确答案)错。
ICP DAS DS-2200 Series 快速开始指南说明书
DS-2200 Series Quick StartV1.0, Jul. 2020What’s in the box?The package includes the following items:DS-2200 Series Module x 1 Quick Start x1 (This Document) Related Information•DS Series Product Page:/en/product/guide+Industrial__Communication+Serial __Communication+Serial-to-Ethernet__Device__Server#1189•Documentation & Firmware:/en/download/index.php?model=DS-2215i•NS-205/NS-205PSE Product Page (optional):https:///en/product/guide+Industrial__Communicat ion+Ethernet__Communication+Ethernet__Switch#7921 Connecting the Power and Host PC1) Make sure your PC has workable network settings.Disable or well configure your Windows firewall and Anti-Virus firewall first, else the “Search Servers” on Chapter 4 may not work. (Please contact with your system Administrator)2) Connect both the DS-2200 and your PC to the same sub network or thesame Ethernet switch.3) Supply power (PoE or +12~+48 V DC) to the DS-2000.Note : Please use the first RJ-45 jack (ETH1) to connect the PoE Switch when using the PoE to power.The second RJ-45 jack (ETH2)doesn’t support the PoE function2Self-Test WiringWiring Notes for RS-232/485/422 Interfaces:☑: Here, the RS-232 and RS-485 wiring is used as an example.While using RS-485 modules, you can not wire the Data+ with Data- signals for self-test. But you can test two RS-485 ports by wiring the Data1+ with Data2+ signals, and wiring the Data1- with Data2- signals. Then send data to one and receive data from another.RxD TxD TxD RxD GND GND RTS CTS CTSRTSTxD+ RxD+ TxD- RxD- RxD+ TxD+ RxD- TxD- GNDGNDData+ Data+ Data- Data- GNDGND3Installing Software on Your PCInstall VxComm Utility, which can be obtained from the web site:https:///en/download/index.php?nation=US&kind1=&model=&kw=vxcomm4Configuring Network Settings1) Double-click the VxComm Utility shortcut on the desktop. 2) Click the “Search Servers ” to search your DS-2200.3) Double-click the name of DS-2200 to open the “Configure Server (UDP)” dialog box.❷❸❶4) Contact your Network Administrator to obtain a correct networkconfiguration (such as IP/Mask/Gateway ). Enter the network settings and click “OK ”. Note: The DS-2200 will use the new settings 2 seconds later.5Configuring Virtual COM Ports1) Wait 2 seconds and click “Search Servers ” button again to ensure the DS-2200 is working well with new configuration. 2) Click the name of DS-2200 to select it.❹ ❷ ❶3) Click the “Add Server[S]” button.4) Assign a COM Port number and click “OK ” to save your settings.5) Click on DS-2200 name and check the virtual COM Port mappings on the PC.❸❹❺6) Click the “Restart Driver ” item in the “Tools ” menu to display the “VxComm Utility: Restarting Driver ” dialog box. 7) Click the “Restart Driver ” button.6Self-Test1) Right click Port1 and then choose the “Open COM Port ” item.2) Check that the configuration of the COM Port is correct and then click the “Open COM ” button.❼❻❶❷3) T ype a string in the “S end” field.4) C lick the “Hex/Text ” option in the “Display ” section. 5) C lick the “Send ” button to send the message.6) I f a response is received, it will be displayed in the received field.❸❹❻❺。
单词serial的中文是什么意思
单词serial的中文是什么意思英语单词serial的中文意思英 [ˈsɪəriəl] 美 [ˈsɪriəl]第三人称复数:serials形容词连续的; 连载的; 顺序排列的; 分期偿付的名词连载小说; 电视连续剧; 定期刊物; [军]行军梯队英语单词serial的单语例句1. The canyon's walls prevented them from radioing their positions to their colleagues, just as Serial Two had not radioed its change in plans.2. The books published by the capital's Foreign Language Teaching and Research Press comprise the country's first serial translation of Peking Opera works into English.3. She turned her Chinese sojourn into a book named after the serial, picked up soon after by Paramount Pictures for a screen adaptation.4. Hot money is stolen cash that can be traced back to a crime, such as marked currency or new bills with consecutive serial numbers.5. As serial champions the Brazilians are used to matchday pressure while their media have to adopt a siege mentality with deadlines constantly appearing.6. Such market uncertainties are coupled with the government's battle against inflation and the resultant tightening credit policy that has spawned serial interest rate rises.7. The couple's lives are revealed in the documentary serial The Journey of Danube airing on Guangdong TV.8. His death at the hands of a serial killer is central to the book but also opens a new dramatic phase.9. Police believe the serial attacks were deliberately targeted at former vice health ministers and suspected the murder was the same person.英语单词serial的双语例句1. Our results along with those reported by Lin et al demonstrate reossification and stabilization of tumor size can be achieved on CT and MRI imaging following serial arterial embolization.我们和Lin等的结果都表明连续动脉栓塞术后在CT和MRI上可以见到重新骨化和肿瘤大小的稳定。
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Chapter 7 Serial Communication Subsystem
Objective:
describe the differences between serial and parallel communication, provide definitions for key serial communications terminology.
Serial Communications Serial Communication Terminology USART
I. Serial Communications
Data may be exchanged by using parallel or serial techniques. With parallel techniques, an entire byte of data is typically sent simultaneously from the transmitting device to the receiver device. Although this is efficient from a time point of view, it requires eight separate lines for the data transfer
In serial transmission, a byte of data is sent a single bit at a time. Once 8 bits have been received at the receiver, the data byte is reconstructed. Although this is inefficient from a time point of view, it only requires a line (or two) to transmit the data. The ATmega16 is equipped with a host of different serial communication subsystems, including the serial USART, SPI, and TWI.
II. Serial Communication Terminology
1. Asynchronous versus Synchronous Serial Transmission In serial communications, the transmitting and receiving device must be synchronized to one another and use a common data rate and protocol. Synchronization allows both the transmitter and receiver to be expecting data transmission/reception at the same time. There are two basic methods of maintaining ‘‘sync’’ between the transmitter and receiver: asynchronous and synchronous.
In an asynchronous serial communication system, such as the USART aboard theATmega16, framing bits are used at the beginning and end of a data byte. These framing bits alert the receiver that an incoming data byte has arrived and also signals the completion of the data byte reception. The data rate for an asynchronous serial system is typically much slower than the synchronous system, but it only requires a single wire between the transmitter and receiver.
A synchronous serial communication system maintains ‘‘sync’’ between the transmitter and receiver by employing a common clock between the two devices. Data bits are sent and received on the edge of the clock. This allows data transfer rates higher than with asynchronous techniques but requires two lines, data and clock, to connect the receiver and transmitter.
2. Baud Rate Data transmission rates are typically specified as a baud or bits per second rate.
3. Full Duplex serial communication systems must both transmit and receive data. To do both transmission and reception simultaneously requires separate hardware for transmission and reception. A single duplex system has a single complement of hardware that must be switched from transmission to reception configuration. A full duplex serial communication system has separate hardware for transmission and reception.
4. Parity To further enhance data integrity during transmission, parity techniques may be used. Parity is an additional bit (or bits) that may be transmitted with the data byte. The ATmega16 uses a single parity bit.
5. American Standard Code for Information Interchange(ASCII) ASCII is a standardized seven-bit method of encoding alphanumeric data.
III. USART
The Universal Synchronous and Asynchronous serial Receiver and Transmitter (USART) is a highly flexible serial communication device. The main features are: Full Duplex Operation (Independent Serial Receive and Transmit Registers) Asynchronous or Synchronous Operation Master or Slave Clocked Synchronous Operation High Resolution Baud Rate Generator Supports Serial Frames with 5, 6, 7, 8, or 9 Data Bits and 1 or 2 Stop Bits
Odd or Even Parity Generation and Parity Check Supported by Hardware Data OverRun Detection Framing Error Detection Noise Filtering Includes False Start Bit Detection and Digital Low Pass Filter Three Separate Interrupts on TX Complete, TX Data Register Empty, and RX Complete Multi-processor Communication Mode Double Speed Asynchronous Communication Mode
USART Block Diagram
Frame Formats
。