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P460HVN01.0-1920×1080-700cd-20111101

Model Name: P460HVN01.0Issue Date : 2011/11/01(＊)Preliminary Specifications(…)Final SpecificationsCustomer Signature Date AUO DateApproved By_________________________________ Reviewed By PM DirectorMichael Goan____________________________________Reviewed By RD DirectorEugene CC Chen____________________________________ Reviewed By Project LeaderBenson Chai____________________________________NotePrepared By PMTravis Huang____________________________________ContentsNoCONTENTSRECORD OF REVISIONS1 GENERAL DESCRIPTION2 ABSOLUTE MAXIMUM RATINGS3 ELECTRICAL SPECIFICATION3-1 ELECTRIACL CHARACTERISTICS3-2 INTERFACE CONNECTIONS3-3 SIGNAL TIMING SPECIFICATION3-4 SIGNAL TIMING WAVEFORM3-5 COLOR INPUT DATA REFERENCE3-6 POWER SEQUENCE3-7 BACKLIGHT SPECIFICATION4 OPTICAL SPECIFICATION5 MECHANICAL CHARACTERISTICS5-1 PLACEMENT SUGGESTIONS6 RELIABILITY TEST ITEMS7 INTERNATIONAL STANDARD7-1 SAFETY7-2 EMC8 PACKING8-1 DEFINITION OF LABEL8-2 PACKING METHODS8-3 PALLET AND SHIPMENT INFORMATION9 PRECAUTION9-1 MOUNTING PRECAUTIONS9-2 OPERATING PRECAUTIONS9-3 ELECTROSTATIC DISCHARGE CONTROL9-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE9-5 STORAGE9-6 HANDLING PRECAUTIONS FOR PROTECT FILM9-7 OPERATING CONDITION IN PID APPLICATIONRecord of RevisionVersion Date Page Description0.0 2011/06/23 First preliminary spec sheet release0.1 2011/7/5 22 Front View Drawing Update23 Read View Drawing Update0.2 2011/07/25 4 Format change0.3 2011/11/01 4 Format change1. General DescriptionThis specification applies to the 46.0 inch Color TFT-LCD Module P460HVN01.0. This LCD module has a TFT active matrix type liquid crystal panel 1,920x1,080 pixels, and diagonal size of 46.0 inch. This module supports 1,920x1080 mode. Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is determined with a 10-bit gray scale signal for each dot.The P460HVN01.0 has been designed to apply the 10-bit 2 channel LVDS interface method. The main feature of P460HVN01.0 would be high brightness, high contrast, wide viewing angle, high color saturation, super narrow bezel, direct LED backlight and high color depth.* General InformationItems Specification Unit NoteActive Screen Size 46.0 InchDisplay Area 1018.08(H) x 572.67(V) mmOutline Dimension 1026.68(H) x 578.27(V) x 37.5(D) mm 1Driver Element a-Si TFT active matrixDisplay Colors 10 bit (8bit+FRC), 1073.7M ColorsNumber of Pixels 1,920x1080 PixelPixel Pitch 0.176 (H) x 0.53(W) mmPixel Arrangement RGB vertical stripeDisplay Operation Mode Normally BlackDisplay Orientation Landscape/Portrait EnableSurface Treatment AG Haze = 11% Note:(1) Dmax: 54.2mm (Front bezel to Driver cover); Dmin: 37.5mm (Front bezel to Bezel back)2. Absoute Maximum RatingsThe followings are maximum values which, if exceeded, may cause faulty operation or damage to the unitItem Symbol Min Max Unit Conditions Logic/LCD Drive Voltage Vcc -0.3 14 [Volt] Note 1Input Voltage of Signal Vin -0.3 4 [Volt] Note 1Operating Temperature TOP 0 +50 [o C] Note 2Operating Humidity HOP 10 90 [%RH] Note 2Storage Temperature TST -20 +60 [o C] Note 2Storage Humidity HST 10 90 [%RH] Note 2Panel Surface Temperature PST 65 [o C] Note 3Note 1: Duration:50 msec.Note 2 : Maximum Wet-Bulb should be 39 and No condensation.℃The relative humidity must not exceed 90% non-condensing at temperatures of 40or less. At temperatures℃greater than 40, the wet bulb temperature must not exceed 39.℃℃Note 3: Surface temperature is measured at 50℃ Dry condition3. Electrical SpecificationThe P460HVN01.0 requires two power inputs. One is employed to power the LCD electronics and to drive the TFT array and liquid crystal. The second is employed for LED driver.3.1.1 Electrical CharacteristicsValueParameter SymbolMin. Typ. MaxUnit Note LCDPower Supply Input Voltage V DD10.8 12 13.2 V DCPower Supply Input Current I DD-- 0.9 1.08 A 1 Power Consumption P C-- 10.8 12.96 Watt 1 Inrush Current I RUSH- - 5.5 A 2 Permissible Ripple of Power Supply InputVoltage(for input power=12V)V RP-- -- V DD * 5% mV pk-pk 3 Input Differential Voltage ∣V ID∣200 400 600 mV DC 4Differential Input High ThresholdVoltageV TH+100 -- +300 mV DC 4Differential Input Low Threshold Voltage V TL-300 -- -100 mV DC4LVDSInterfaceInput Common Mode Voltage V ICM 1.1 1.25 1.4V DC4Input High Threshold VoltageV IH(High)2.7 --3.3 V DCCMOSInterfaceInput Low Threshold VoltageV IL(Low)0 -- 0.6 V DC7Backlight Power Consumption P BL-- 203 WLife Time(MTTF) -- 50000 -- 8 3.1.2 AC CharacteristicsValueParameter SymbolMin. Typ. MaxUnit Note Receiver Clock : SpreadSpectrum Modulation range Fclk_ssFclk-3%--Fclk+3%MHz 9Receiver Clock : SpreadSpectrum Modulation frequency Fss30--200KHz9LVDSInterfaceReceiver Data Input MarginFclk = 85 MHz Fclk = 65 MHz tRMG-0.4-0.5----0.40.5ns10Note :1. Test Condition:(1) V DD = 12.0V(2) Fv = Type Timing, 60Hz, 120Hz or Other (3) F CLK = Max freq. (4) Temperature = 25 ℃ (5) Test Pattern : White Pattern2. Measurement condition : Rising time = 400usDD3. Test Condition:(1) The measure point of V RP is in LCM side after connecting the System Board and LCM. (2) Under Max. Input current spec. condition.4. V ICM = 1.25VID |V IC G N 0VL V D S -L V D S5. Do not attach a conducting tape to lamp connecting wire. If the lamp wire attach to conducting tape,TFT-LCD Module have a low luminance and the inverter has abnormal action because leakage current occurs between lamp wire and conducting tape.6. The relative humidity must not exceed 80% non-condensing at temperatures of 40 or less. At℃temperatures greater than 40, the wet bulb temperature must not exceed 39. When operate at low ℃℃temperatures, the brightness of LED will drop and the life time of LED will be reduced.7. The measure points of V IH and V IL are in LCM side after connecting the System Board and LCM.8. The lifetime (MTTF) is defined as the time which luminance of the LED is 50% compared to its original value. [Operating condition: Continuous operating at Ta = 25±2℃]9. LVDS Receiver Clock SSCG (Spread spectrum clock generator) is defined as below figuresFclk Fclk__ss ss((max max))Fclk Fclk__ss ss((min min))Fclk10. Receiver Data Input MarginRatingParameterSymbol Min Type Max Unit Note Input Clock Frequency Fclk Fclk (min) -- Fclk (max) MHz T=1/Fclk Input Data Position0 tRIP1 -|tRMG| 0 |tRMG| ns Input Data Position1 tRIP0 T/7-|tRMG| T/7 T/7+|tRMG| ns Input Data Position2 tRIP6 2T/7-|tRMG| 2T/7 2T/7+|tRMG| ns Input Data Position3 tRIP5 3T/7-|tRMG| 3T/7 3T/7+|tRMG| ns Input Data Position4 tRIP4 4T/7-|tRMG| 4T/7 4T/7+|tRMG| ns Input Data Position5 tRIP3 5T/7-|tRMG| 5T/7 5T/7+|tRMG| ns Input Data Position6 tRIP26T/7-|tRMG|6T/76T/7+|tRMG|nsP460HVN01.0 Product SpecificationRev. 0.33.2Interface ConnectionsLCD connector : 187059-51221(Manufactured by P-TWO);PIN Symbol Description PIN Symbol Description1 VCC 12V Power Supply 27 RXEN1 LVDS Even pixel data input pair 1(-)2 VCC 12V Power Supply 28 RXEP1 LVDS Even pixel data input pair 1(+)3 VCC 12V Power Supply 29 RXEN2 LVDS Even pixel data input pair 2(-)4 VCC 12V Power Supply 30 RXEP2 LVDS Even pixel data input pair 2(+)5 VCC 12V Power Supply 31 GND GND6 GND GND 32 RXENCLK LVDS Even pixel clock input pair(-)7 GND GND 33 RXEPCLK LVDS Even pixel clock input pair(+)8 GND GND 34 GND GND9 GND GND 35 RXEN3 LVDS Even pixel data input pair 3(-)10 RXON0 LVDS Odd pixel data input pair 0(-) 36 RXEP3 LVDS Even pixel data input pair 3(+)11 RXOP0 LVDS Odd pixel data input pair 0(+) 37 RXEN4 LVDS Even pixel data input pair 4(-)12 RXON1 LVDS Odd pixel data input pair 1(-) 38 RXEP4 LVDS Even pixel data input pair 4(+)13 RXOP1 LVDS Odd pixel data input pair 1(+) 39 GND GND14 RXON2 LVDS Odd pixel data input pair 2(-) 40 NC No connected15 RXOP2 LVDS Odd pixel data input pair 2(+) 41 Reserved AUO Internal Use Only16 GND GND 42 NC No connected17 RXONCLK LVDS Odd pixel clock input pair(-) 43 NC No connected18 RXOPCLK LVDS Odd pixel clock input pair(+) 44 NC No connected19 GND GND20 RXON3 LVDS Odd pixel data input pair 3(-) 45 LVDSORDSelect LVDS data order:High or NC →NS, Low →JEIDA21 RXOP3 LVDS Odd pixel data input pair 3(+) 46 NC No connected22 RXON4 LVDS Odd pixel data input pair 4(-) 47 NC No connected23 RXOP4 LVDS Odd pixel data input pair 4(+) 48 NC No connected24 GND GND 49 Reserved AUO Internal Use Only25 RXEN0 LVDS Even pixel data input pair 0(-) 50 Reserved AUO Internal Use Only26 RXEP0 LVDS Even pixel data input pair 0(+) 51 Reserved AUO Internal Use OnlyNote 1: All GND (ground) pins should be connected together and should also be connected to the LCD’s metal frame.Note 2: All V DD (power input) pins should be connected together.Note 3: All NC (no connection) pins should be open without voltage input.P460HVN01.0 Product SpecificationRev. 0.3 LVDS Option = High/Open NSC lo cC H xC H xC H xC H xC H xC H xC H xC H xC H xC H xNote: x = 1, 2, 3, 4…C loC H xC H xC H xC H xC H xC H xC H xC H xC H xC H xNote: x = 1, 2, 3, 4…P460HVN01.0 Product Specification Rev. 0.33.3 Signal Timing SpecificationThis is the signal timing required at the input of the user connector. All of the interface signal timing should be satisfied with the following specifications for its proper operation.Timing Table (DE only Mode) Vertical Frequency Range (60Hz)Signal Item Period Vertical Section Active Blanking Period Horizontal Section Active Blanking Clock Vertical Frequency Horizontal Frequency Frequency Frequency Frequency Symbol Tv Tdisp (v) Tblk (v) Th Tdisp (h) Tblk (h) Fclk=1/Tclk Fv Fh 70 50 47 60 10 1030 Min. 1090 Typ. 1125 1080 45 1100 960 140 74.25 60 67.5 365 82 63 73 400 1325 Max 1480 Unit Th Th Th Tclk Tclk Tclk MHz Hz KHzNotes: (1) Display position is specific by the rise of DE signal only. Horizontal display position is specified by the rising edge of 1 DCLK after the rise of 1 DE, is displayed on the left edge of the screen. (2)Vertical display position is specified by the rise of DE after a “Low” level period equivalent to eight times of horizontal period. The 1 data corresponding to one horizontal line after the rise of 1 DE is displayed at the top line of screen. (3)If a period of DE “High” is less than 1920 DCLK or less than 1080 lines, the rest of the screen displays black. (4)The display position does not fit to the screen if a period of DE “High” and the effective data period do not synchronize with each other.st st st st© Copyright AUO Optronics Corp. 2009 All Rights Reserved.Page 11 / 31P460HVN01.0 Product Specification Rev. 0.3Tv Tblk(v) Th DE Tdisp(v) N L in eM pixelRGB DataInvalid DataLine NLine 1Line 2Line 3Line 4Line NInvalid DataCLK Tclk Th Tdisp(h) DE Tblk(h)CH1Pixel M-7Pixel M-5Pixel M-3Pixel M-1Invalid DataPixel 1Pixel 3Pixel 5Pixel 7Pixel 9Pixel 11Pixel M-5Pixel M-3Pixel M-1Invalid DataPixel 1Pixel 33.4 Signal Timing WaveformsCH2Pixel M-6Pixel M-4Pixel M-2Pixel MInvalid DataPixel 2Pixel 4Pixel 6Pixel 8Pixel 10Pixel 12Pixel M-4Pixel M-2Pixel MInvalid DataPixel 2Pixel 4© Copyright AUO Optronics Corp. 2009 All Rights Reserved.Page 12 / 31P460HVN01.0 Product Specification Rev. 0.33.5 Color Input Data ReferenceThe brightness of each primary color (red, green and blue) is based on the 10 bit gray scale data input for the color; the higher the binary input, the brighter the color. The table below provides a reference for color versus data input. COLOR DATA REFERENCE Input Color Data Color RED MSB LSB MSB GREEN LSB MSB BLUE LSBR9 R8 R7 R6 R5 R4 R3 R2 R1 R0 G9 G8 G7 G6 G5 G4 G3 G2 G1 G0 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 Black Red(1023) Green(1023) Basic Blue(1023) Color Cyan Magenta Yellow White RED(000) RED(001) R ---RED(1022) RED(1023) GREEN(000) GREEN(001) G ---GREEN(1022) 0 GREEN(1023) 0 BLUE(000) BLUE(001) B ---BLUE(1022) BLUE(1023) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 1 0 0 0 1 0 0 0 1 1 1 0 0 0 1 0 0 0 1 1 1 0 0 0 1 0 0 0 1 1 1 0 0 0 1 0 0 0 1 1 1 0 0 0 1 0 0 0 1 1 1 0 0 0 1 0 0 0 1 1 1 0 0 0 1 0 0 0 1 1 1 0 0 0 1 0 0 0 1 1 1 0 0 0 1 0 0 0 1 1 1 0 1 0 0 1 0 1 0 1 1 0 0 0 0 1 0 1 0 1 1 0 0 0 0 1 0 1 0 1 1 0 0 0 0 1 0 1 0 1 1 0 0 0 0 1 0 1 0 1 1 0 0 0 0 1 0 1 0 1 1 0 0 0 0 1 0 1 0 1 1 0 0 0 0 1 0 1 0 1 1 0 0 0 0 1 0 1 0 1 1 0 0 0 0 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0© Copyright AUO Optronics Corp. 2009 All Rights Reserved.Page 13 / 31P460HVN01.0 Product Specification Rev. 0.33.6 Power Sequence Power Sequence of LCD90% 90% 10% 10%Pow er Supply For LCD VD D (+ 12 V )G ND10%t1t2t5t6t7Interface Signal ( LV DS Data & CLK )G NDValid D atat3t4Backlight on / off control signal ( VBLO N )GNDt8t9CM O S Interface SignalG NDParameter t1 t2 t3 t4 t5 t6 t7 t8 t9Values Min. 0.4 0.1 450 0*1Type. -------------------Max. 30 50 --------*2Unit ms ms ms ms ms ms ms ms ms0 --500 10 0--50 ---Note: (1) t4=0 : concern for residual pattern before BLU turn off. (2) t6 : voltage of VDD must decay smoothly after power-off. (customer system decide this value)© Copyright AUO Optronics Corp. 2009 All Rights Reserved.Page 14 / 31P460HVN01.0 Product Specification Rev. 0.33.7 Backlight SpecificationThe backlight unit contains 220pcs LED.3.7.1 Electrical specificationSpec Item 1 2 3 4 Input Voltage Input Current Input Power Inrush Current Symbol VDDB IDDB PDDB IRUSH ON 5 On/Off control voltage VBLON OFF VDDB=24V 0 VDDB=24V MAX 7 Dimming Control Voltage V_DIM MIN 8 9 Dimming Control Current Internal Dimming Ratio External PWM Control Voltage External PWM Control Current I_DIM DIM_R MAX V_EPWM MIN I_EPWM D_EPWM F_EPWM HI 14 15 DET status signal Input Impedance DET LO Rin VDDB=24V VDDB=24V 0 300 0.8 VDC Kohm VDDB=24V VDDB=24V VDDB=24V VDDB=24V 0 5 140 180 0.8 2 100 240 mADC % Hz VDC VDDB=24V VDDB=24V VDDB=24V VDDB=24V 5 2 0 2 100 5.5 VDC 3 VDC mADC % 3.1 0.8 1.5 5.5 mA VDC Condition Min VDDB=24V VDDB=24V VDDB=24V 22.8 --2 Typ 24 8.49 203.8 Max 25.2 8.9 213.5 TBD 5.5 VDC VDC ADC W ADC 1 1 2 Unit Note6On/Off control currentIBLON101112 External PWM Duty ratio 13 External PWM FrequencyOpen CollectorNote 1 : Dimming ratio= 100% (MAX) Ta=25±5 , Turn on for 45minutes Note 2: Measurement condition Rising time = 20ms (VDDB : 10%~90%) and at dimming ration = 100% Note 3: Less than10% dimming control is functional well and no backlight shutdown happened（℃）© Copyright AUO Optronics Corp. 2009 All Rights Reserved.Page 15 / 31P460HVN01.0 Product Specification Rev. 0.33.7.2 Input Pin AssignmentLED driver board connector: CI0114M1HRL-NH (Cvilux)Pin 1 2 3 4 5 6 7 8 9 10 11Symbol VDDB VDDB VDDB VDDB VDDB BLGND BLGND BLGND BLGND BLGND DETDescription Operating Voltage Supply, +24V DC regulated Operating Voltage Supply, +24V DC regulated Operating Voltage Supply, +24V DC regulated Operating Voltage Supply, +24V DC regulated Operating Voltage Supply, +24V DC regulated Ground and Current Return Ground and Current Return Ground and Current Return Ground and Current Return Ground and Current Return BLU status detection: Normal : 0~0.8V ; Abnormal : Open collector BLU On-Off control: BL On : High/Open (2V~5.5V); BL off : Low (0~0.8V/GND) Internal PWM (0~3.3V for 10~100% Duty, open for 100%) < NC ; at External PWM mode> External PWM (5%~100% Duty, open for 100%) < NC ; at Internal PWM mode>12VBLON13 14VDIM PDIM© Copyright AUO Optronics Corp. 2009 All Rights Reserved.Page 16 / 31P460HVN01.0 Product Specification Rev. 0.3CI0112M1HRL-NHPin 1 2 3 4 5 6 7 8 9 10 11 12Symbol VDDB VDDB VDDB VDDB VDDB BLGND BLGND BLGND BLGND BLGND NC NCDescription Operating Voltage Supply, +24V DC regulated Operating Voltage Supply, +24V DC regulated Operating Voltage Supply, +24V DC regulated Operating Voltage Supply, +24V DC regulated Operating Voltage Supply, +24V DC regulated Ground and Current Return Ground and Current Return Ground and Current Return Ground and Current Return Ground and Current Return No connection No connection(Note*) IF External PWM function includes 5% dimming ratio. Judge condition as below: (1) Backlight module must be lighted ON normally. (2) All protection function must work normally. (3) Uniformity and flicker could NOT be guaranteed© Copyright AUO Optronics Corp. 2009 All Rights Reserved.Page 17 / 31P460HVN01.0 Product Specification Rev. 0.34. Optical SpecificationOptical characteristics are determined after the unit has been ‘ON’ and stable for approximately 45 minutes in a dark environment at 25° C while panel is placed in the default position. The default position is T-con side as the top side of panel. The value specified is at an approximate distance 50cm from the LCD surface at a viewing angle of φ and θ equal to 0° .Fig.1 presents additional information concerning the measurement equipment and method.SR3 or equivalentParameter Contrast Ratio Surface Luminance (White) Luminance Variation Response Time (G to G) Color Gamut Color Coordinates RedSymbol Min. CR LWH δWHITE(9P) Tγ NTSC 3200 560 ---Values Typ. 4000 700 -6.5 72 Max --1.33 --UnitNotes 1cd/m22 3Ms %4RX RY0.640 0.330 0.320 Typ.-0.03 0.620 0.150 0.050 0.280 0.290 5 Typ.+0.03GreenGX GYBlueBX BYWhiteWX WYViewing Angle x axis, right(φ=0° ) x axis, left(φ=180° ) y axis, up(φ=90° ) y axis, down (φ=270° ) θr θl θu θd ----89 89 89 89 ----degree degree degree degree© Copyright AUO Optronics Corp. 2009 All Rights Reserved.Page 18 / 31P460HVN01.0 Product Specification Rev. 0.3Note: 1. Contrast Ratio (CR) is defined mathematically as: Contrast Ratio= Surface Luminance of Lon5 Surface Luminance of Loff52. Surface luminance is luminance value at point 5 across the LCD surface 50cm from the surface with all pixels displaying white. From more information see FIG 2. When lamp current IH = 11mA. the luminance with all pixels displaying white at center 5 location. 3. The variation in surface luminance, δWHITE is defined (center of Screen) as: δWHITE(9P)= Maximum(Lon1, Lon2,…,Lon9)/ Minimum(Lon1, Lon2,…Lon9) 4. Response time T LWH=Lon5 where Lon5 isγ is the average time required for display transition by switching the input signal for fiveTarget 0%25% to 0% 50% to 0% 75% to 0% 100% to 0% 50% to 25% 75% to 25% 100% to 25% 75% to 50% 100% to 50% 100% to 75%luminance ratio (0%,25%,50%,75%,100% brightness matrix) and is based on Fv=60Hz to optimize.Measured Response Time 0% 25% Start 50% 75% 100% 25%0% to 25%50%0% to 50% 25% to 50%75%0% to 75% 25% to 75% 50% to 75%100%0% to 100% 25% to 100% 50% to 100% 75% to 100%4. Viewing angle is the angle at which the contrast ratio is greater than 10. The angles are determined for the horizontal or x axis and the vertical or y axis with respect to the z axis which is normal to the LCD surface. For more information see FIG4.FIG. 2 LuminanceVH/2123456H789H/6 V/6 V/2© Copyright AUO Optronics Corp. 2009 All Rights Reserved.Page 19 / 31P460HVN01.0 Product Specification Rev. 0.3FIG.3 Response Time The response time is defined as the following figure and shall be measured by switching the input signal for “any level of gray(bright) “ and “any level of gray(dark)”. Any level of gray (Bright) Any level of gray (Dark) Any level of gray (Bright)0%, 25%, 50%, 75%, 100%0%, 25%, 50%, 75%, 100%FIG.4 Viewing Angle© Copyright AUO Optronics Corp. 2009 All Rights Reserved.Photodetector Output0%, 25%, 50%, 75%, 100%TimeT γ (F)T γ (R)Page 20 / 315. Mechanical CharacteristicsThe contents provide general mechanical characteristics for the model P546HW04 V0. In addition the figures in the next page are detailed mechanical drawing of the LCD.Horizontal (typ.) 1026.68 mmVertical (typ.) 578.27mmOutline DimensionDepth (typ.) 37.5 mmHorizontal (typ.) 1018.68 mmBezel Opening AreaVertical (typ.) 573.27 mmHorizontal 1018.08 mmActive Display AreaVertical 572.67 mmWeight TBD5.1 Placement suggestions:The Suggestion placement is as following:1. Landscape mode: The default placement is T-Con Side as the top side.2. Portrait mode: The default placement is T-Con side has to be placed in the right side via viewing fromthe front.Landscape (Front view) Portrait (Front view)Front ViewBack View6. Reliability Test Items (TBD)Test Item Q’ty Condition1 High temperature storage test 3 60,℃500hrs2 Low temperature storage test3 -20,℃500hrs3 High temperature operation test 3 50,℃500hrs4 Low temperature operation test 3 -5,℃500hrs5 Vibration test (non-operation) 3 Wave form: randomVibration level: 1.0G RMS Bandwidth: 10-300Hz, Duration: X, Y, Z 10min per axes X,Y,Z : Horizontal, face up6 Shock test (non-operation) 3 Shock level: 30GWaveform: half since wave, 11ms Direction: ±X, ±Y, ±Z, One time each direction7 Vibration test (With carton) 1 (PKG) Random wave (1.05G RMS, 10-200Hz) 10mins per each X,Y,Z axes8 Drop test (With carton) 1 (PKG) Surround four flats drop height:15 cm Bottom flat drop height:25.4 cm twice (ASTMD4169)7. International Standard7.1 Safety(1) UL60065,2003, Underwriters Laboratories, Inc. (AUO file number : E204356)Audio, video and similar electronic apparatus, safety requirement(2) UL60950-1,2003, Underwriters Laboratories, (AUO file number : E204356)Standard for safety of information technology equipment including electrical business equipment(3) EN60065(4) EN60950(5) IEC 60065, European Committee for Electro technical Standardization (CENELEC)Audio, video and similar electronic apparatus, safety requirement(6) IEC 60950-1:European Committee for Electrotechnical Standardization (CENELEC)European Standard for safety of information technology equipment including electrical businessequipment7.2 EMC(1) ANSI C63.4 “Methods of Measurement of Radio-Noise Emissions from Low-Voltage Electrical andElectrical Equipment in the Range of 9kHz to 40GHz. “American National standards Institute(ANSI), 1992(2) C.I.S.P.R “Limits and Methods of Measurement of Radio Interface Characteristics of InformationTechnology Equipment.” International Special committee on Radio Interference.(3) EN 55022 “Limits and Methods of Measurement of Radio Interface Characteristics of InformationTechnology Equipment.” European Committee for Electrotechnical Standardization. (CENELEC), 19988. Packing (TBD)8-1 DEFINITION OF LABEL: A. Panel Label:*xxxxxxxxxxxx-xxxx*Green mark description(1) For Pb Free Product, AUO will addfor identification.(2) For RoHs compatible products, AUO will add RoHS for identification.Note: The green Mark will be present only when the green documents have been ready by AUO internal green team. (definition of green design follows the AUO green design checklist.)B. Carton Label: (TBD)Panel Unique ID AUO Internal Use8-2 PACKING METHODS: (TBD)1pcs Module/ESD Bag8-3 Pallet and Shipment Information (TBD)SpecificationItemQty. Dimension (mm) Weight (kg)Packing Remark 1 Packing BOX 3 pcs/box 1305(L)*383(W)*800 (H) 75 2 Pallet11315(L)*1150(W)*132(H)203 Boxes per Pallet 3 boxes/pallet4 Panels per Pallet9 pcs/palletPallet after packing 9 pcs1315(L)*1150(W)*932(H)2459. PRECAUTIONSPlease pay attention to the followings when you use this TFT LCD module.9-1 MOUNTING PRECAUTIONS(1) You must mount a module using holes arranged in four corners or four sides.(2) You should consider the mounting structure so that uneven force (ex. twisted stress) is not appliedto module. And the case on which a module is mounted should have sufficient strength so thatexternal force is not transmitted directly to the module.(3) Please attach the surface transparent protective plate to the surface in order to protect the polarizer.Transparent protective plate should have sufficient strength in order to the resist external force.(4) You should adopt radiation structure to satisfy the temperature specification.(5) Acetic acid type and chlorine type materials for the cover case are not desirable because the formergenerates corrosive gas of attacking the polarizer at high temperature and the latter cause circuitbroken by electro-chemical reaction.(6) Do not touch, push or rub the exposed polarizer with glass, tweezers or anything harder than HBpencil lead. And please do not rub with dust clothes with chemical treatment. Do not touch thesurface of polarizer for bare hand or greasy cloth. (Some cosmetics are detrimental to the polarizer.)(7) When the surface becomes dusty, please wipe gently with absorbent cotton or other soft materialslike chamois soaks with petroleum benzene. Normal-hexane is recommended for cleaning theadhesives used to attach front/ rear polarizer. Do not use acetone, toluene and alcohol becausethey cause chemical damage to the polarizer.(8) Wipe off saliva or water drops as soon as possible. Their long time contact with polarizer causesdeformations and color fading.(9) Do not open the case because inside circuits do not have sufficient strength.9-2 OPERATING PRECAUTIONS(1) The device listed in the product specification sheets was designed and manufactured for TVapplication(2) The spike noise causes the mis-operation of circuits. It should be lower than following voltage:V=±200mV(Over and under shoot voltage)(3) Response time depends on the temperature. (In lower temperature, it becomes longer..)(4) Brightness of LED depends on the temperature. (In lower temperature, it becomes lower.) And inlower temperature, response time (required time that brightness is stable after turned on) becomeslonger.(5) Be careful for condensation at sudden temperature change. Condensation makes damage topolarizer or electrical contacted parts. And after fading condensation, smear or spot will occur.(6) When fixed patterns are displayed for a long time, remnant image is likely to occur.。

易欣达7寸数字京东方屏规格书

Shenzhen Digital Technology Co.,ltd.PRODUCTSPECIFICATIONPRODUCT TYPE：7.0” TFT , Transmissive typeMODEL NO：Y81287VERSION:01DATE:2011.05.05Customer ApprovedCustomer:Project name：Approved by:Dept:Data:Designer QC Confirmed ApprovedShenzhen Digital Technology Co.,ltd.5F,43Bldgm Baotian Industrial Area，Xixiang,Baoan District,ShenZhen ChinaTel:(+86)755-61113669/71/72/73Fax:(+86)755-61113619RECORDS OF REVISIONDESCRIPTIONS DATE Version REVISEDISSUE2011.05.05 01FIRST深圳市德智欣科技有限公司CONTENTS1. GENERAL DESCRIPTION - - - - - - - - - - - - - - - - - - - - - - - - - -2. MECHANICAL SPECIFICATIONS - - - - - - - - - - - - - - - - -- - - - - - - -3. OUTLINE DIMENSIONS - - - - - - - - - - - - - - - - - - - - -4. INTERFACE ASSIGNMENT - - - - - - - - - - - - - - - - - - - - - - - - --------5. TIMING CHARACTERISTICS - - - - - - - - - - - - - - - - - - - - - - - ------------------------------------------------6. RESETTIMINGCHARACTERISTICS7. POWER ON/OFF SEQUENCE - - - - - - - - - - - - - - - - - - - - - - - - - - -8. INSTRUCTION TABLE - - - - - - - - - - - - - - - - - - - - - - - - - - -9. ELECTRICAL CHARACTERISTICS - - - - - - - - - - - - - - - - - - - - -10. LED BACKLIGHT CHARACTERISTICS - - - - - - - - - - - - - - - - - - -11. OPTICAL CHARACTERISTICS - - - - - - - - - - - - - - - - - - - - - - - - - -Condition -----------------------------------------------------------12. Reliability13. Inspection Standards ----------------------------------------------------14. Precaution - - - - - - - - - - - - - - - - - - - - - - - -深圳市德智欣科技有限公司1.GENERAL DESCRIPTIONThis LCM Y81287 is a 800 x 3RGB x 480 dots matrix 7.0 ”TFT LCD module. It has a TFTpanel,composed of 1200 -channel source driver and 960-channel gate driver.2. MECHANICAL SPECIFICATIONSUNIT Item Contents LCD Type 7.0” TFT-LCD, TransmissiveOutline Dimension 100(W)x164.9(H)x3.4(T) mmActive Area 85.92(W) x151.68(H) mmViewing direction 6 O’CLOCK ---Source HX8664BDriver ICGate IC HX8264DDisplay Color 16MNumber of Dots 800(RGB)x480 DotsDot Pitch (H×V)0.0642(W) x 0.1790(H) mmAssy Type COG+FPC+BL ---BACKLIGHT WHITE LED Backlight －Interface24 bit interfaceWEIGHT TBD g深圳市德智欣科技有限公司4. INTERFACE ASSIGNMENTPIN NO. SYMBOL1 Power for LED backlighr (Anode) LEDA2 Power for LED backlighr (Anode) LEDA3 Power for LED backlighr (Cathode) LEDK4 Power for LED backlighr (Cathode) LEDKground GND5 Powervoltage VCOM6 Common7 Power for Digital Circuit DVDDmodeselect MODE8 DE/SYNC9 Data input Enable DE10 Vertical Sync Input VS11 Horizontal Sync Input HS12~19 Blue data B7~B020~27 Green data G7~G028~35 Red data R7~R036 Power ground GND37 Sample clock DCLK38 Power ground GND39 Left / right selection L/R40 Up/down selection U/D41 Gate NO Voltage VGH42 Gate OFF Voltage VGL43 Power for Analog Circuit A VDD44 Global reser pin RESET45 No connection NC46 Common Voltage VCOM47 Dithering function DITHB48 Power ground GND49 No connection NC50 No connection NC深圳市德智欣科技有限公司5.TIMING CHARACTERISTICS深圳市德智欣科技有限公司6.RESET TIMING CHARACTERISTICS深圳市德智欣科技有限公司7. POWER ON/OFF SEQUENCE深圳市德智欣科技有限公司8. HX8664B&HX8264D INSTRUCTION TABLE9. ELECTRICAL CHARACTERISTICS深圳市德智欣科技有限公司深圳市德智欣科技有限公司12. Reliability Condition13.Inspection Standards 13.1 Major DefectItem NoItems to be inspected Inspection Standard Classification of defects13.1.1 Allfunctional defects1)No display2) Display abnormally3) Missing vertical, horizontal segment 4) Short circuit5)Back-light no lighting flickering and abnormal lighting.13.1.2 Missing Missing component13.1.3 OutlinedimensionOverall outline dimension beyond the drawing is not allowed.Major13.2 Cosmetic defectItem No Item ConditionRemark1 High temperatureOperating 70°C ±2°C for 240 hours2 Low temperatureOperating -20°C ±2°C for 240 hours3 High temperatureStorage 80°C ±2°C for 240 hours4 Low temperatureStorage -30°C ±2°C for 240hours5High temperature & humidity Storage50℃±5°C , 90%RH, 120 hours 6Thermal Shock Storage (No operation)-20℃ , 30min.<=> 70℃ , 30min.10 Cycles7 ESD test-8 Vibration test 10 => 55 =>10 Hz, within 1 minute;Amplitude:1.5mm.15 minutes for each Direction ( X,Y ,Z ) 9 Drop testPacked, 100CM free fall6 sides, 1 corner, 3edgesNO DEFECT IN DISPLAYING AND OPERATIONAL FUNCTION深圳市德智欣科技有限公司(i) chips on cornerX Y Z ≤2.0≤SDisregardNotes:S=contact pad lengthChips on the corner of terminal shall not be allowed to extend intothe ITO pad or expose perimeter seal. Minor(ii)Usual surface cracksX Y Z≤3.0＜Inner border line of the seal DisregardMinor13.3.1Glass defect(iii)CrackCracks tend to break are not allowed.Major13.3.2 Partsalignment1) Not allow IC and FPC/heat-seal lead width is more than 50 %beyond lead pattern.2) Not allow chip or solder component is off center more than 50 % of the pad outline. 13.3.3 SMTAccording to the <Acceptability of electronic assemblies>IPC-A-610C class 2 standard. Component missing or function defect are Major defect, the others are Minor defect.Major14. Precaution14.1 Handling(1) Protect the panel from static, it may cause damage to the CMOS Gate Array IC.(2) Use fingerstalls with soft gloves in order to keep display clean during the incominginspection and assembly process.(3) If the liquid crystal material leaks from the panel, it should be kept away from theeyes or mouth. In case of contact with hands, legs or clothes, it must be washedaway thoroughly with soap.(4) The desirable cleaners are water, IPA (Isopropyl Alcohol) or Hexane. Don’t useKetone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methylchloride. It might permanent damage to the polarizer due to chemical reaction.(5) Pins of I/F connector shall not be touched directly with bare hands.(6) Refrain from strong mechanical shock and / or any force to the panel. In addition todamage, this may cause improper operation or damage to the panel.(7) Note that polarizers are very fragile and could be easily damaged. Do not press orscratch the surface harder than a B pencil lead.(8) Wipe off water droplets or oil immediately. If you leave the droplets for a long time,staining and discoloration may occur.(9) If the surface of the polarizer is dirty, clean it using some absorbent cotton or soft cloth.14.2 Storage(1) Do not leave the panel in high temperature, and high humidity for a long time. It ishighly recommended to store the panel with temperature from 0 to 35℃ andrelative humidity of less than 70%.(2) The panel shall be stored in a dark place. It is prohibited to apply sunlight orfluorescent light during the store.14.3 Operation(1) The LCD shall be operated within the limits specified. Operation at values outside ofthese limits may shorten life, and/or harm display images.(2) Do not exceed the absolute maximum rating value. (the supply voltage variation,Input voltage variation in part contents and environmental temperature and so on).Otherwise the panel may be damaged.(3) If the panel displays the same pattern continuously for a long period of time, it canbe the situation when the image” Sticks” to the screen.深圳市德智欣科技有限公司。

3.5寸液晶屏规格书SGC035COM—54PIN

Product SpecificationsCustomerDescription 3.45” TFT LCD ModuleModel Name SGC035COM—54PINDate 2008/6/13Doc. No.Revision BCustomer ApprovalDateThe above signature represents that the product specifications, testing regulation, and warranty in the specifications are acceptedEngineeringCheck Date Prepared DateDoris2008/6/13CONTENTSNo. ITEM PAGE0 RECORD OF REVISION 31 SUMMARY 42 FEATURES 43 GENERAL SPECIFICATIONS 44 ABSOLUTE MAXIMUM RATINGS 45 ELECTRICAL CHARACTERISTICS 56 DC CHARATERISTICS 67 AC CHARACTERISTICS 6~108 OPTICAL CHARATERISTIC 119 TOUCH PANEL 14~1510 INTERFACE 16~1911 BLOCK DIAGRAM 2012 QUALITY ASSURANCE 2113 OUTLINE DRAWING 2214 PACKAGE INFORMATION 2315 PRECAUTIONS 24~26RECORD OF REVISIONSRevision Date Page DescriptionA 2008/2/12 all New CreationB 2008/6/13 18 LCM PIN Definition1. SUMMARYThis technical specification applies to 3.45“color TFT-LCD panel. The 3.45“ color TFT-LCD panel is designed for GPS, camcorder, digital camera application and other electronic products which require high quality flat panel displays. This module follows RoHS.2. FEATURESHigh Resolution: 230,400 Dots (320 RGB x 240). SGC 035COM—54PIN is atransmissive type color active matrix liquid crystal display (LCD) which uses amorphous thin film transistor (TFT) asswitching devices. This product is composed of a TFT LCD panel, driver ICs, FPC, backlight unit and touch panel.,3. GENERAL SPECIFICATIONSParameter Specifications Unit Screen size 3.45(Diagonal) InchDisplay Format 320 RGB x 240 DotActive area 70.08(H) x 52.56(V) mmDot size 73x 219 umPixel Configuration RGB-Stripe Outline dimension 76.9(W) x 63.9(H) x 3.3(D) mm Display Mode Normally white/Transmissive Surface Treatment Haze 20% Display Garmut NTSC 60% Input Interface Digital 24-bit RGB/SERIALRGB/CCIR656/CCIR601Weight (31) g View Angle direction 6 o’clockOperation -20~70 ℃Temperature RangeStorage -30~80 ℃4. ABSOLUTE MAXIMUM RATINGSItem Symbol Condition Min. Max. Unit Remark Power Voltage DVDD,AVDD GND=0 -0.3 5.0 V Input SignalVoltage V in GND=0 -0.3 VDD+0.3 VNOTE Logic OutputVoltageV OUT GND=0 -0.3 VDD+0.3 V NOTENote: Device is subject to be damaged permanently if stresses beyond those absolute maximum ratings listed above1. Temp. ≤ 60℃, 90% RH MAX.Temp. ＞ 60℃, Absolute humidity shall be less than 90% RH at 60℃2.5. ELECTRICAL CHARACTERISTICS 5.1. Operating conditions:Parameter SymbolRatingMin. Typ. Max.Unit ConditionPower Voltage VCC 3.0 3.3 3.6 V Digital Operation CurrentIcc 8.6 mA Gate On Power VGH 14 15 18 V Gate Off Power VGL -11-10 -8V Vcom High Voltage VcomH 3.7 V Note1 Vcom low VoltageVcomL-1.6VNote1Vcom level max VcomA 6 VNote1. VcomH& VcomL ：Adjust the color with gamma data. Vp-p should be higher then4V.(Option 5V)Note: Please power on following the sequence VCC Æ VDD5.2 LED driving conditionsParameter Symbol Min. Typ. Max. Unit Remark LED current- 20 - m A Power Consumption - 400 420 mW LED voltage VBL+ 18.619.8 21 V Note 1 LED Life Time - (50,000)- - HrNote 2,3Note 1 : There are 1 Groups LEDILEDNote 2 : Ta = 25℃Note 3 : Brightess to be decreased to 50% of the initial value深圳宏辉成液晶显示有限公司/6. DC CHARATERISTICSParameter SymbolRatingUnit Condition Min. Typ. Max.Low level input voltage V IL 0-0.3VCCVHight level input voltage V IH0.7VCC-VCC V7. AC CHARATERISTICSDigital Parallal RGB interfaceSignal Item Symbol Min Typ Max UnitFrequency Tosc - 156 - ns Dclk High Time Tch - 78 - nsLow Time Tcl - 78 - nsDataSetup Time Tsu 12 - - nsHold Time Thd 12 - - nsPeriod TH - 408 - Tosc Pulse Width THS 5 30 - ToscHsyncBack-Porch Thb 38 ToscDisplay Period TEP - 320 - ToscHsync-den time THE 36 68 88 TsocFront-Porch Thf - 20 - ToscPeriod Tv - 262 - THPulse Width Tvs 1 3 5 TH Vsync Back-Porch Tvb - 15 - TH Display Period Tvd - 240 - THFront-Porch Tvf 2 4 - TH1. Thp + Thb = 68, the user is make up by yourself.2. Tv = Tvs + Tvb + Tvd + Tvf , the user is make up by yourself.3.When SYNC mode is used,1st data start from 68th Dclk after Hsync fallingDigital Serial RGB interfaceSignal Item Symbol Min Typ Max Unit Frequency Tosc - 52 - ns Dclk High Time Tch - 78 - ns Low Time Tcl - 78 - nsData Setup Time Tsu 12 - - nsHold Time Thd 12 - - nsPeriod TH - 1224 - Tosc Pulse Width THS 5 90 - ToscHsyncBack-Porch Thb 114 ToscDisplay Period TEP - 960 - Tosc Hsync-den time THE 108 204 264Front-Porch Thf - 60 - ToscPeriod Tv - 262 - THPulse Width Tvs 1 3 5 THVsync Back-Porch Tvb - 15 - THDisplay Period Tvd - 240 - THFront-Porch Tvf 2 4 - TH Note: 1. Thp + Thb = 204, the user is make up by yourself.2. Tv = Tvs + Tvb + Tvd + Tvf , the user is make up by yourself.3. When SYNC mode is used,1st data start from 204th Dclk after Hsync fallinCCIR601/656 InterfaceSignalData Setup Time Tsu 12 - - ns Hold Time Thd 12 - - ns深圳宏辉成液晶显示有限公司/[_//f+--------------------H " "'= 1560--------------------+jInvalid Data Inva l i d Da t a018,0"'=DOTCLK In va li d DataIn v a l i d Data]---...t--f------------H018, =1440-------------+jslrL//RR[7:0]In va lid DataIn va l i d Dataf---- t.<sP = HBP[6:0]'4+STH[1:0'1-- *. - ----------- IH0,se = 128--- --- ----.!Figure1 CCIR601 Horizontal Timing深圳宏辉成液晶显示有限公司 /手机 : 133 166 766 58 MSN: lcd.sales@ QQ：1378107648Doc. No.SEL[2:0] = 100- 111, NTSCVSYNC HSYNCRR[7:0]tveP = VBP[6:0]DL1DL2DL3IDL2391DL240I---ODD Field VSYNCEVEN FieldHSYNCRR[7:0]tvsP= VBP[6:0] + 1·IODD FieldI IDL1DL2DL3IDL2391DL240ISEL[2:0] = 100- 111, PAL, PALM=OEVEN VSYNCHSYNCRR[7:0]tvsP= VBP[6:0]DL1DL2DL3IDL2791DL280IODD Field VSYNCEVEN Fi l eHSYNCRR[7:0]tvsP= VBP[6:0] + 1·IODD FieldI IDL1DL2DL3IDL2791DL280ISEL[2:0] = 100 - 111, PAL, PALM=1EVEN VSYNCHSYNCRR[7:0]tveP= VBP[6:0]DL1DL2DL3IDL2871DL288 1ODD Field VSYNCEVEN Fi l eHSYNCI深圳宏辉成液晶显示有限公司 /手机 : 133 166 766 58 MSN: lcd.sales@ QQ：1378107648IRR[7:0]lvsP= VBP[6 0] + 1·IDL1DL2DL3IDL287 1DL288 1Figure1CCIR601 Vertical Timing深圳宏辉成液晶显示有限公司 /手机 : 133 166 766 58 MSN: lcd.sales@ QQ：1378107648Figure2 CCIR656 Horizontal Timing深圳宏辉成液晶显示有限公司 /手机 : 133 166 766 58 MSN: lcd.sales@ QQ：1378107648Figure2 CCIR656 Vertical Timing深圳宏辉成液晶显示有限公司 /手机 : 133 166 766 58 MSN: lcd.sales@ QQ：1378107648Figure 3Digital RGB NTSC mode Vertical Data Format for 262THH cycle = 1224tHBP = 204HDISP = 960t HFP = 60DOTCLKHSYNCPixel DataDumm yD0D1----------D 957 D 958 D 959Dum mya ) Horizontal Data Transaction Tim ing V cycle = 262 Lines t VBP = 18VSYNC VDISP = 240 Lines t VFP = 4HSYNC Line 0 b ) Vertical Data Transaction Tim ing Line 239深圳宏辉成液晶显示有限公司 /手机 : 133 166 766 58 MSN: lcd.sales@ QQ：1378107648Figure 3 Data Transaction Timing in Serial RGB (8 bit) Interface (SYNC Mode)深圳宏辉成液晶显示有限公司 /手机 : 133 166 766 58 MSN: lcd.sales@ QQ：1378107648Figure3 Data Transaction Timing in Serial RGB (8 bit) Interface (DE Mode)深圳宏辉成液晶显示有限公司 /手机 : 133 166 766 58 MSN: lcd.sales@ QQ：1378107648Figure3Data Transaction Timing in Parallel RGB (24 bit) Interface (SYNC Mode)深圳宏辉成液晶显示有限公司 /手机 : 133 166 766 58 MSN: lcd.sales@ QQ：1378107648Figure4 Data Transaction Timing in Parallel RGB (24 bit) Interface (DE Mode)7.1.1 Standby ON/OFF Control LQ35NC211 has a power ON/OFF sequence control function. When STB pin is pulled L,blank data is outputted for 5-frames first, form the falling edge of the following VSYNC signal. The blank data would be gray level 255 for normally white LC.Figure5 Standby ON/OFF Control 7.1.2 Clock and Sync waveforms深圳宏辉成液晶显示有限公司 /手机 : 133 166 766 58 MSN: lcd.sales@ QQ：1378107648Figure6 CLK and IHS timing waveformTV FTC LTH B7.2 Reset Timing ChartThe RESET input must be held at least 1ms after power is stable8. OPTICAL CHARATERISTICTa=25±2℃, ILED=20mA Item Symbol Condition Min. Typ. Max. Unit Remark Response timeTr θ=0°、Φ=0°Tf- 10 ms- 15 msNote 3,5 Contrast ratio CRAt optimizedviewing angle300 400 - - Note 4,5 Color ChromaticityWhiteRedGreenBlueWxθ=0°、Φ=0WyRxθ=0°、Φ=0RyGxθ=0°、Φ=0GyBxθ=0°、Φ=0By(0.26) (0.31) (0.36) Note 2,6,7(0.28) (0.33) (0.38)Hor.ΘR(50) (60)Viewing angleΘL CR≧10(50) (60)Deg. Note 1Ver.ΦT(40) (50)ΦB(45) (55)Brightness - - 180 200 - cd/m2Center ofdisplayTa=25±2℃, I L=20mANote 1: Definition of viewing angle rangeFig. 8-1 Definition of viewing angleNote 2: Test equipment setup:After stabilizing and leaving the panel alone at a driven temperature for 10 minutes, the measurement should be executed. Measurement should be executed in a stable, windless, and dark room. Optical specifications are measured by Topcon BM-7 luminance meter 1.0° field of view at a distance of 50cm and normal direction.Fig. 8-2 Optical measurement system setupNote 3: Definition of Response time:The response time is defined as the LCD optical switching time interval between “White” state and“Black” state. Rise time, Tr, is the time between photo detector output intensity changed from 90﹪to 10﹪. And fall time, Tf, is the time between photo detector output intensity changedfrom10﹪to 90﹪.Note 4: Definition of contrast ratio:The contrast ratio is defined as the following expression.Contrast ratio (CR)= Luminance measured when LCD on the “White” stateLuminance measured when LCD on the “Black” stateNote 5: White Vi = V i50 ± 1.5VBlack Vi = Vi50 ± 2.0V“±” means that the analog input signal swings in phase with VCOM signal. “±” means that the analog input signal swings out of phase with VCOM signal.The 100% transmission is defined as the transmission of LCD panel when all the input terminals of module are electrically opened.Note 6: Definition of color chromaticity (CIE 1931)Color coordinates measured at the center point of LCDNote 7: Measured at the center area of the panel when all the input terminals of LCD panel are electrically opened.Brightness (min)Note 8 : Uniformity (U) = x 100%Brightness (max)9. TOUCH PANELNA10. INTERFACE10.1. LCM PIN DefinitionPin Symbol I/O Function Remark1 LED- I Backlight LED Ground2 LED- I Backlight LED Ground3 LED+ I Backlight LED Power4 LED+ I Backlight LED Power5 Y1 I Top electrode ,6 X1 I Right electrode7 NC Not Use8 /RESET - Hardware Reset9 SPENA I SPI Interface Data Enable Signal Note 310 SPCLK I SPI Interface Data Clock Note 311 SPDAT I SPI Interface Data Note 312 B0 I Blue Data Bit 013 B1 I Blue Data Bit 114 B2 I Blue Data Bit 215 B3 I Blue Data Bit 316 B4 I Blue Data Bit 417 B5 I Blue Data Bit 518 B6 I Blue Data Bit 619 B7 I Blue Data Bit 720 G0 I Green Data Bit021 G1 I Green Data Bit122 G2 I Green Data Bit223 G3 I Green Data Bit324 G4 I Green Data Bit425 G5 I Green Data Bit526 G6 I Green Data Bit627 G7 I Green Data Bit728 R0 I Red Data Bit0 /DX0 Note 429 R1 I Red Data Bit1 /DX1 Note 430 R2 I Red Data Bit2 /DX2 Note 431 R3 I Red Data Bit3 /DX3 Note 432 R4 I Red Data Bit4 /DX4 Note 4Control the input data format /floatingControl the input data formatControl the input data formatNot UseData Enable Input54 AVSS INote:1. The mode control (SEL2) not use ,it can’t control CCIR601 interface , If not use CCIR601 ,itcan floating.2. For digital RGB input data format, both SYNC mode and DE+SYNC mode are supported. If DEsignal is fixed low, SYNC mode is used. Otherwise, DE+SYNC mode is used.Suggest used SYNC mode!!Suggest the DE signal usually pull low.3. usually pull high.4. IF select serial RGB or CCIR601/656 input mode is selected,only DX0-DX7 used,and the other short to GND, Onlyselected serial RGB、CCIR601/656 interface,DX BUS will enable,Digital input mode DX0 is LSB and DX7 is MSB.5. Control the input data formatDoc. No.10.2 SPI timing CharacteristicsFigure8 SPI read、write timingFigure9 SPI timingFigure10 SPI Reference program10.3 SPI Register DescriptionWill be showing on Application Note From Chihsin .10.4 Basic Display Color and Gray ScaleColorRedMSB LSBInput Color DataGreenMSB LSBBlueMSBLSBR7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0BasicColorsBlack Red(255) Green(255) Blue(255)CyanMagenta Yellow White 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 1 1 1 1 1RedRed(0) Dark Red(1) Red(2) :Red(253) Red(254)Red(255) Bright0 0 0 0 0 0 0 0 0 : : : 1 1 1 1 1 1 1 1 10 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 : : : : : : : 1 1 1 0 1 0 0 1 1 1 1 0 0 0 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 : : : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 : : : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 : : : 0 0 0 0 0 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 : : : : : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0GreenGreen(0) Dark 0 0 0 Green(1) 0 0 0 Green(2) 0 0 0:: : : Green(253) 0 0 0 Green(254) 0 0 0 Green(255)Bright 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 : : : : : : : 0 0 0 0 0 1 1 0 0 0 0 0 1 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 : : : 1 1 1 1 1 1 1 1 1 0 0 0 0 0 1 0 1 0 : : : 1 0 1 1 1 0 1 1 1 0 0 0 0 0 0 0 0 0 : : : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 : : : : : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Blue Blue(0) Dark Blue(1) Blue(2): Blue(253)Blue(254)Blue(255) Bright0 0 0 0 0 0 0 0 0 : : : 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 : : : : : : : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 : : : 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 : : : 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 : : : 1 1 1 1 1 1 10 0 0 0 0 0 0 0 0 1 0 0 0 1 0 : : : : : 1 1 1 0 1 1 1 1 1 0 1 1 1 1 111. BLOCK DIAGRAMCUSTOMER’S SYSTEMDigital24-bits,CCIR656, CCIR601,SERIAL SPCLK, SPDAT, Hsync, Vsync, DCLK12. QUALITY ASSURANCENo. Test Items Test Condition REMARK 1 High Temperature Storage Test Ta=80℃ Dry 240h 2 Low Temperature Storage Test Ta=-30℃ Dry 240h 3 High Temperature Operation Test Ta=70℃ Dry 240h 4 Low Temperature Operation Test Ta=-20℃ Dry 240h5High Temperature and High HumidityOperation TestTa=60℃ 90%RH 240h6 Electro Static Discharge Test7 Shock Test (non-operating)8 Vibration Test (non-operating) Panel surface / top case. Contact / Air ：±6KV / ±8KV ，150pF ，330ΩShock Level : 100GWaveform : Half Sinusoidal WaveShock Time : 6msNumber of Shocks : 3 times for each ±X, ±Y, ±Z direction Frequency range: 10Hz ~ 550HzStoke ：1.3mmSweep : 1.5G, 33.3~400HzVibration : Sinusoidal Wave, 1Hrsfor X,YZ direction.Non-operating9 Thermal Shock Test-20℃(0.5h) ~ 70℃(0.5h) / 100cycles***** T a = Ambient TemperatureNote:1. The test samples have recovery time for 2 hours at room temperature before the function check. In the standard conditions, there is no display function NG issue occurred.2. All the cosmetic specifications are judged before the reliability stress.Doc. No.13. OUTLINE DRAWING Rev: BPage: 27 of 30Date: 2008/6/13ITO Film:Sheet Resistance 200~900ΩITO Glass:Sheet Resistance 200~900ΩSurface hardness MIN. 3H此區顯示為 lable 的貼附範圍lable 的實際大小則依據B L specComponent H=1.5mmX2 Y1Y2 X1 +Kapton1DATEDATEDATE 2007-11-192007-11-19TITLE:8Doc. No.14.PACKAGE INFORMATION Rev: BPage: 28 of 30Date: 2008/6/132APPROVED DATEE奇信電子股份有限公司DWG. NO.: HS-P-03450915QH011CHECKED DATE REV.:UNIT: SCALE:SHEET:DESIGNER Lake Chao DATE 01/15"07SIEZ: A2PART NO.: 09150190-001:1 1/14 5DRAWER Lake Chao7DATE 01/15"078TITLE:包材圖15 RECAUTIONSPlease pay attention to the following when you use this TFT LCD module.15.1 MOUNTING PRECAUTIONS(1) You must mount a module using arranged in four corners or four sides.(2) You should consider the mounting structure so that uneven force (ex. Twisted stress) is notapplied to the module.And the case on which a module is mounted should have sufficient strength so that external force is not transmitted directly to the module.(3) Please attach a transparent protective plate to the surface in order to protect the polarizer.Transparent protective plate should have sufficient strength in order to the resist external force.(4) You should adopt radiation structure to satisfy the temperature specification.(5) Acetic acid type and chlorine type materials for the cover case are not describe becausethe former generates corrosive gas of attacking the polarizer at high temperature and the latter causes circuit break by electro-chemical reaction.(6) Do not touch, push or rub the exposed polarizers with glass, tweezers or anything harderthan HB pencil lead. And please do not rub with dust clothes with chemical treatment.Do not touch the surface of polarizer for bare hand or greasy cloth. (Some cosmetics are determined to the polarizer)(7) When the surface becomes dusty, please wipe gently with adsorbent cotton or other softmaterials like chamois soaks with petroleum benzene. Normal-hexane is recommended for cleaning the adhesives used to attach front / rear polarizers. Do not use acetone, toluene and alcohol because they cause chemical damage to the polarizer.(8) Wipe off saliva or water drops as soon as possible. Their long time contact with polarizercauses deformations and color fading.(9) Do not open the case because inside circuits do not have sufficient strength.15.2 OPERATING PRECAUTIONS(1) The spike noise causes the mis-operation of circuits. It should be lower than followingvoltage：V=±200mV(Over and under shoot voltage)(2) Response time depends on the temperature. (In lower temperature, it becomes longer.)(3) Brightness depends on the temperature. (In lower temperature, it becomes lower)And in lower temperature, response time (required time that brightness is stable after turned on) becomes longer.(4) Be careful for condensation at sudden temperature change. Condensation makes damageto polarizer or electrical contacted parts. And after fading condensation, smear or spot will occur.(5) When fixed patterns are displayed for a long time, remnant image is likely to occur.(6) Module has high frequency circuits. Sufficient suppression to the electromagneticinterference shall be done by system manufacturers. Grounding and shielding methods may be important to minimize the interference.15.3 ELECTROSTATIC DISCHARGE CONTROLSince a module is composed of electronic circuits, it is not strong to electrostatic discharge.Make certain that treatment persons are connected to ground through wristband etc. And don’t touch interface pin directly.15.4 PRECAUTIONS FOR STRONG LIGHT EXPOSUREStrong light exposure causes degradation of polarizer and color filter.15.5 STORAGE When storing modules as spares for a long time, the following precautions are necessary. (1) Store them in a dark place. Do not expose the module to sunlight or fluorescent light. Keep the temperature between 5℃ and 35℃ at normal humidity. (2) The polarizer surface should not come in contact with any other object. It is recommended that they be stored in the container in which they were shipped. 15.6 HANDLING PRECAUTIONS FOR PROTECTION FILM (1) When the protection film is peeled off, static electricity is generated between the film and polarizer. This should be peeled off slowly and carefully by people who are electrically grounded and with well ion-blown equipment or in such a condition, etc. (2) The protection film is attached to the polarizer with a small amount of glue. Is apt to remain on the polarizer.Please carefully peel off the protection film without rubbing it against the polarizer. (3) When the module with protection film attached is stored for a long time, sometimes there remains a very small amount of glue still on the polarizer after the protection film is peeled off. (4) You can remove the glue easily. When the glue remains on the polarizer surface or its vestige is recognized, please wipe them off with absorbent cotton waste or other soft material like chamois soaked with normal-hexane. 15.7 Cautions for installing and assembling Bezel edge must be positioned in the area between the Active area and View area. The bezel may press the touch screen and cause activation if the edge touches the active area. A gap of approximately 0.5mm is needed between the bezel and the top electrode. It may cause unexpected activation if the gap is too narrow. There is a tolerance of 0.2 to 0.3mm for the outside dimensions of the touch panel and tail. A gap must be made to absorb the tolerance in the case and connector.。

群创7寸数字屏规格书

The copyright belongs to InnoLux. Any unauthorized use is prohibited.INNO L U X DISPLAY CORPORATIONLCD MODULESPECIFICATIONCustomer: Model Name: AT070TN94SPEC NO.: A070-94-TT-01 Date: 2009/12/02 Version:01□Preliminary Specification ■Final SpecificationFor Customer ’s AcceptanceApproved byCommentApproved byReviewed by Prepared byJoe Lin2009/12/08James Yu2009/12/08David Lee2009/12/02InnoLux copyright 2004All rights reserved,Copying forbidden.Record of RevisionVersion Revise Date Page ContentPre-Spec.01 2009/07/07 All Initial ReleaseFinal-spec.01 2009/12/02 All The first version final specification.6 Modify V COM to 3.8V(Typ.), 3.6V(Min.) and 4.0V(Max.).9 Add Input Clock and Data Timing Diagram.18 Update the Mechanical Drawing.The copyright belongs to InnoLux. Any unauthorized use is prohibited.I NNO L U XContents1. General Specifications (1)2. Pin Assignment (2)3. Operation Specifications (5)3.1. Absolute Maximum Ratings (5)3.1.1. Typical Operation Conditions (6)3.1.2. Current Consumption (7)3.1.3. Backlight Driving Conditions (7)3.2. Power Sequence (8)3.3. Timing Characteristics (9)3.3.1. AC Electrical Characteristics (9)3.3.2. Input Clock and Data Timing Diagram (9)3.3.3. Timing (10)3.3.4. Data Input Format (11)4. Optical Specifications (12)5. Reliability Test Items (16)6. General Precautions (17)6.1. Safety (17)6.2. Handling (17)6.3. Static Electricity (17)6.4. Storage (17)6.5. Cleaning (17)7. Mechanical Drawing (18)8. Package Drawing (19)8.1. Packaging Material Table (19)8.2. Packaging Quantity (19)8.3. Packaging Drawing (20)The copyright belongs to InnoLux. Any unauthorized use is prohibited.1. General SpecificationsNo. Item Specification Remark1 LCD size 7.0 inch(Diagonal)2 Driver element a-Si TFT active matrix3 Resolution 800 × 3(RGB) × 4804 Display mode Normally White, Transmissive5 Dot pitch 0.0642(W) × 0.1790(H) mm6 Active area 154.08(W) × 85.92(H) mm7 Module size 164.9(W) ×100.0(H) ×5.7(D) mm Note 18 Surface treatment Anti-Glare9 Color arrangement RGB-stripe10 Interface Digital11 Backlight power consumption 1.674W (Typ.)12 Panel power consumption 0.226W (Typ.)13 Weight 150g (Typ.)Note 1: Refer to Mechanical Drawing.2. Pin AssignmentFPC Connector is used for the module electronics interface. The recommended model is FH12A-50S-0.5SH manufactured by Hirose.Pin No. Symbol I/O Function Remark1 V LED+P Power for LED backlight (Anode)2 V LED+P Power for LED backlight (Anode)3 V LED-P Power for LED backlight (Cathode)4 V LED-P Power for LED backlight (Cathode)5 GND P Power ground6 V COM I Common voltage7 DV DD P Power for Digital Circuit8 MODE I DE/SYNC mode select Note 19 DE I Data Input Enable10 VS I Vertical Sync Input11 HS I Horizontal Sync Input12 B7 I Blue data(MSB)13 B6 I Blue data14 B5 I Blue data15 B4 I Blue data16 B3 I Blue data17 B2 I Blue data18 B1 I Blue data Note 219 B0 I Blue data(LSB) Note 220 G7 I Green data(MSB)21 G6 I Green data22 G5 I Green data23 G4 I Green data24 G3 I Green data25 G2 I Green data26 G1 I Green data Note 227 G0 I Green data(LSB) Note 228 R7 I Red data(MSB)29 R6 I Red data30 R5 I Red data31 R4 I Red data32 R3 I Red data33 R2 I Red data34 R1 I Red data Note 235 R0 I Red data(LSB) Note 236 GND P Power Ground37 DCLK I Sample clock Note 338 GND P Power Ground39 L/R I Left / right selection Note 4,540 U/D I Up/down selection Note 4,541 V GH P Gate ON Voltage42 V GL P Gate OFF Voltage43 AV DD P Power for Analog Circuit44 RESET I Global reset pin. Note 645 NC - No connection46 V COM I Common Voltage47 DITHB I Dithering function Note 748 GND P Power Ground49 NC - No connection50 NC - No connectionI: input, O: output, P: PowerNote 1: DE/SYNC mode select. Normally pull high.When select DE mode, MODE=”1”, VS and HS must pull high.When select SYNC mode,MODE= ”0”, DE must be grounded.Note 2: When input 18 bits RGB data, the two low bits of R,G and B data must be grounded.Note 3:Data shall be latched at the falling edge of DCLK.Note 4: Selection of scanning modeSetting of scan control inputU/D L/R Scanning direction GND DV DD Up to down, left to right DV DD GND Down to up, right to left GND GND Up to down, right to left DV DDDV DDDown to up, left to rightNote 5: Definition of scanning direction. Refer to the figure as below:Note 6: Global reset pin. Active low to enter reset state. Suggest to connect with an RCreset circuit for stability. Normally pull high.Note 7: Dithering function enable control, normally pull high. When DITHB=”1”,Disable internal dithering function, When DITHB=”0”,Enable internal dithering function,RightLeft DownUp3. Operation Specifications3.1. Absolute Maximum Ratings(Note 1)ValuesItem SymbolMin. Max.Unit RemarkDV DD -0.3 5.0 VAV DD 6.5 13.5 VV GH -0.3 40.0 VV GL -20.0 0.3 V Power voltageV GH-V GL- 40.0 V Operation Temperature T OP -30 85 ℃Storage Temperature T ST-30 85 ℃LED Reverse Voltage V R- 1.2 VEach LEDNote 2 LED Forward Current I F- 25 mA Each LEDNote 1: The absolute maximum rating values of this product are not allowed to be exceeded at any times. Should a module be used with any of the absolute maximum ratingsexceeded, the characteristics of the module may not be recovered, or in an extremecase, the module may be permanently destroyed.Note 2: V R Conditions: Zener Diode 20mA3.1.1. Typical Operation Conditions( Note 1)ValuesUnit Remark Item SymbolMin. Typ. Max.DV DD 3.0 3.3 3.6 V Note 2AV DD 10.2 10.4 10.6 VPower voltageV GH 15.3 16.0 16.7 VV GL -7.7 -7.0 -6.3 VInput signal voltage V COM 3.6 3.8 4.0 VInput logic high voltage V IH 0.7 DV DD - DV DD VNote 3 Input logic low voltage V IL 0 - 0.3 DV DD VNote 1: Be sure to apply DV DD and V GL to the LCD first, and then apply V GH.Note 2: DV DD setting should match the signals output voltage (refer to Note 3) of customer’s system board.Note 3: DCLK,HS,VS,RESET,U/D, L/R,DE,R0~R7,G0~G7,B0~B7,MODE,DITHB.3.1.2. Current ConsumptionValuesItem SymbolMin. Typ. Max.Unit RemarkI GH - 0.2 1.0 mA V GH =16.0VI GL - 0.2 1.0 mA V GL = -7.0V IDV DD - 4.0 10 mA DV DD =3.3VCurrent for DriverIAV DD - 20 50 mA AV DD =10.4V3.1.3. Backlight Driving ConditionsValuesItem SymbolMin. Typ. Max.Unit Remark Voltage for LED backlight V L 8.4 9.3 10.2 V Note 1 Current for LED backlight I L 170 180 200 mALED life time - 20,000 - - Hr Note 2Note 1: The LED Supply Voltage is defined by the number of LED at Ta=25℃ andI L =180mA.Note 2: The “LED life time” is defined as the module brightness decrease to 50% original brightness at Ta=25℃ and I L =180mA. The LED lifetime could be decreased ifoperating I L is lager than 180mA.3.2. Power Sequencea. Power on:Note: Data include R0~R7, B0~B7, GO~G7, U/D, L/R, DCLK, HS,VS,DE.DV DD→VGL→AVDD→VGH→Data→B/LB/L→Data→VGH→AVDD→VGL→DV DD3.3. Timing Characteristics3.3.1. AC Electrical CharacteristicsValuesItem SymbolMin. Typ. Max.Unit Remark HS setup time T hst8 - - nsHS hold time T hhd 8 - - nsVS setup time T vst8 - - nsVS hold time T vhd8 - - nsData setup time T dsu8 - - nsData hole time T dhd8 - - nsDE setup time T esu 8 - - nsDE hole time T ehd8 - - nsDV DD Power On Slew rate T POR - - 20 ms From 0 to 90% DV DDRESET pulse width T Rst 1 - - ms DCLK cycle time T coh 20 - - ns DCLK pulse duty T cwh 40 50 60 %3.3.2. Input Clock and Data Timing Diagram3.3.3. TimingValuesUnit Remark Item SymbolMin. Typ. Max.Horizontal Display Area thd- 800 - DCLKDCLK Frequency fclk26.4 33.3 46.8 MHzOne Horizontal Line th862 1056 1200 DCLKHS pulse width thpw 1 - 40 DCLKHS Blanking thb46 46 46 DCLKHS Front Porch thfp 16 210 354 DCLKValuesItem SymbolUnit RemarkMin. Typ. Max.Vertical Display Area tvd- 480 - THVS period time tv 510 525 650 THVS pulse width tvpw 1 - 20 THVS Blanking tvb23 23 23 THVS Front Porch tvfp7 22 147 TH3.3.4. Data Input Format4. Optical SpecificationsValuesItem Symbol ConditionMin. Typ. Max.Unit RemarkθL Φ=180°(9 o’clock) 60 70 -θRΦ=0°(3 o’clock) 60 70 -θTΦ=90°(12 o’clock) 40 50 -Viewing angle(CR≥ 10)θBΦ=270°(6 o’clock) 60 70 -degree Note 1T ON - 10 20 msec Note 3 Response timeT OFF - 15 30 msec Note 3 Contrast ratio CR 400 500 - - Note 4W X 0.26 0.31 0.36 -Color chromaticityW Y 0.28 0.33 0.38 -Note 2Note 5Note 6 Luminance L 320 400 - cd/m² Note 6 LuminanceuniformityY UNormalθ=Φ=0°70 75 - % Note 7Test Conditions:1. DV DD=3.3V, I L=180mA (Backlight current), the ambient temperature is 25℃.2. The test systems refer to Note 2.Note 1: Definition of viewing angle rangeFig. 4-1 Definition of viewing angleNote 2: Definition of optical measurement system.The optical characteristics should be measured in dark room. After 30 minutesoperation, the optical properties are measured at the center point of the LCD screen. (Response time is measured by Photo detector TOPCON BM-7, other items are measured by BM-5A/Field of view: 1° /Height: 500mm.)Normal line θ=Φ=0°Photo detectorΦ=90°12 o’clock directionΦ=270° 6 o’clock directionΦ=0°Φ=180°Active Area500mmLCMNormal line θ=Φ=0°Φ=90°12 o’clock directionΦ=270°6 o’clock directionΦ=0°Φ=180°Active AreaθLθTθBθRLCMNote 3: Definition of Response timeThe response time is defined as the LCD optical switching time interval between“White” state and “Black” state. Rise time (T ON) is the time between photo detector output intensity changed from 90% to 10%. And fall time (T OFF) is the timebetween photo detector output intensity changed from 10% to 90%.Fig. 4-3 Definition of response timeNote 4: Definition of contrast ratiostateBlack""theonLCDwhenmeasuredLuminancestateWhite""theonLCDwhenmeasuredLuminance(CR)ratioContrast=Note 5: Definition of color chromaticity (CIE1931)Color coordinates measured at center point of LCD.Note 6: All input terminals LCD panel must be ground while measuring the center area of the panel.The LED driving condition is I L=180mA .90%10%0%Photodetectoroutput(Relativevalue)ONTWhite (TFT OFF) Black (TFT ON) White (TFT OFF)Note 7:Definition of Luminance UniformityActive area is divided into 9 measuring areas (Refer to Fig. 4-4 ).Every measuring point is placed at the center of each measuring area.maxminBB(Yu)UniformityLuminance=L-------Active area length W----- Active area widthWW/3W/3W/6L/3L/3L/6LFig. 4-4 Definition of measuring pointsB max: The measured maximum luminance of all measurement position.B min: The measured minimum luminance of all measurement position.5. Reliability Test Items(Note3)Item Test Conditions Remark High Temperature Storage Ta = 85℃240hrs Note 1，Note 4 Low Temperature Storage Ta = -30℃240hrs Note 1，Note 4 High Temperature Operation Ts = 85℃240hrs Note 2，Note 4 Low Temperature Operation Ta = -30℃240hrs Note 1，Note 4 Operate at High Temperatureand Humidity+60℃, 90%RH 240hrs Note 4Thermal Shock -30℃/30 min ~ +85℃/30 min for a total 100cycles, Start with cold temperature and endwith high temperature.Note 4Vibration Test Frequency range:10~55Hz Stroke:1.5mmSweep:10Hz~55Hz~10Hz2 hours for each direction of X. Y. Z.(6 hours for total)Mechanical Shock 100G 6ms,±X, ±Y, ±Z 3 times for each directionPackage Vibration Test Random Vibration :0.015G*G/Hz from 5-200HZ, -6dB/Octave from 200-500HZ2 hours for each direction of X. Y. Z.(6 hours for total)Package Drop Test Height:60 cm1 corner, 3 edges, 6 surfacesElectro Static Discharge ± 2KV, Human Body Mode, 100pF/1500ΩNote 1: Ta is the ambient temperature of samples.Note 2: Ts is the temperature of panel’s surface.Note 3: In the standard condition, there shall be no practical problem that may affect the display function. After the reliability test, the product only guarantees operation,but don’t guarantee all of the cosmetic specification.Note 4: Before cosmetic and function test, the product must have enough recovery time, at least 2 hours at room temperature.6. General Precautions6.1. SafetyLiquid crystal is poisonous. Do not put it in your mouth. If liquid crystal touches your skin or clothes, wash it off immediately by using soap and water.6.2. Handling1. The LCD panel is plate glass. Do not subject the panel to mechanical shock or toexcessive force on its surface.2. The polarizer attached to the display is easily damaged. Please handle it carefullyto avoid scratch or other damages.3. To avoid contamination on the display surface, do not touch the module surfacewith bare hands.4. Keep a space so that the LCD panels do not touch other components.5. Put cover board such as acrylic board on the surface of LCD panel to protect panelfrom damages.6. Transparent electrodes may be disconnected if you use the LCD panel underenvironmental conditions where the condensation of dew occurs.7. Do not leave module in direct sunlight to avoid malfunction of the ICs.6.3. Static Electricity1. Be sure to ground module before turning on power or operating module.2. Do not apply voltage which exceeds the absolute maximum rating value.6.4. Storage1. Store the module in a dark room where must keep at 25±10℃ and 65%RH or less.2. Do not store the module in surroundings containing organic solvent or corrosivegas.3. Store the module in an anti-electrostatic container or bag.6.5. Cleaning1. Do not wipe the polarizer with dry cloth. It might cause scratch.2. Only use a soft sloth with IPA to wipe the polarizer, other chemicals mightpermanent damage to the polarizer.7. Mechanical Drawing8. Package Drawing8.1. Packaging Material TableNo. ItemModel(Material)Dimensions(mm)UnitWeight(kg)Quantity Remark1 LCMModuleAT070TN94 164.9 × 100.0 × 5.7 0.150 50pcs2 Partition BC Corrugatedpaper512 × 349 × 226 1.466 1set3 CorrugatedPaperB Corrugatedpaper510 × 350 0.071 4pcs4 CorrugatedBarB Corrugatedpaper512 × 11 × 3 0.046 4pcs5 Dust-ProofBagPE 700 × 530 0.048 1pcs6 A/S Bag PE 180 × 133 × 0.2 0.002 50pcs7 Carton Corrugatedpaper530 × 355 × 255 1.100 1pcs8 Total weight 10.682 kg± 5%8.2. Packaging QuantityTotal LCM quantity in Carton: no. of Partition 2 Rows × quantity per Row 25 = 508.3. Packaging Drawing。

电阻式触摸屏规格书(中小尺寸)

3H pencil, pressure 1N/45°
[鉛筆 3H,壓力 1N/45°(JIS K5400)]
≧3H
800g by vertical 90°
Satisfy (1) of Item 6
[800g , 垂直 90°]
135°10 times left & right
[符合 6 項目(1)]
[此規格適用於五線-類比電阻式觸控屏幕]
Item [項目] (1) Type
[型式]
(2) Input Mode [操作模式]
(3) Cable [連結線]
Specifications [規格] Five-Wire Analog Resistive
[五線-類比電阻式]
Stylus or Finger
Satisfy (1) of Item 6
[135°角,左右來回 10 次]
[符合 6 項目(1)]
08. Reliability
[可靠度]
Item [項目] High Temperature /Humidity
[高溫高濕]
High temperature
[高溫]
Low temperature
[低溫]
萬達光電科技股份有限公司

PRODUCT SPECIFICATIONS 產品規範書
Customer (客戶)： Model (型式)： T121S-5RA006N-0A18R0-200FH Mode (種類)： Five-wire Analog Touch Panel Date (日期)： Sep. 16, 2008
Hardness
[硬度]
Peeling
[剝離]

32-37超薄LED电源

• 当电源的输出端电压12V或24V电压增大时，由于 REF>2.5V，则AS431内部比较器的输出高电平从而使 NPN管导通。IC605即光电耦合器的2脚位电位随着降低，显然这种变化势必会使得流过光电耦合器的发光二极管的电流有所增大。由于光电耦合器817C的CTR （电流传感系数即流过发光二极管的电流与流过光敏三极管的电流的比值）约等于1，使得从817C中的光敏三极管的2脚(FB)流过的电流也有所增大，这导致 5641 PIN2 (FB)端电压降低，控制IC输出脉冲占空比变小，使次级输出电压降低，所以达到降压的目的。输出电压下降；同理，当输出电压降低时，AS431内部比较器的输出低电平从而使NPN截止，从而使得流过光电耦合器的发光二极管的电流减小，可使5641 PIN2 (FB)端电压升高，于是IC输出脉冲占空比变大，输出电压上升。
• 4）各控制电路输出整流稳压电路。
输出整流电路由二极管组成的半波整流电路。
电源方框图
三、各电路分述
• 1、EMI防护与滤波电路
¤交流输入与EMI滤波电路。基本工作过程为，市电经由V601、CX6001、 L600、CY601、CY602、CX6002、L601、BD1等组成的整流滤波电路后转变成脉动直流. ¤CX6001、L600、CY601、CY602、CX6002、L601等组成的整流滤波电路主要是防止外界的杂讯信号对电源的干扰以及电源的开关杂讯对电网产生的干扰。此部分电路的作用就是我们熟称为的EMI抑制电路。
1）.待机电路
• ①原理及内部框图：此待机芯片为Sanken公司的 STR-A6059M，它是一个集成块，里面集成了控制芯片与开关管。外形如下图所示：
• 此芯片最大功率可做到14Ｗ左右。

N133HSE-EA3 屏规格书

Doc. Number:□ Tentative Specification ■ Preliminary Specification □ Approval SpecificationMODEL NO: N133HSESUFFIX: EA3Approved ByChecked ByPrepared ByCONTENTS1. GENERAL DESCRIPTION (5)1.1 OVERVIEW (5)1.2 GENERAL SPECIFICATI0NS (5)2. MECHANICAL SPECIFICATIONS (5)2.1 CONNECTOR TYPE (5)3. ABSOLUTE MAXIMUM RATINGS (6)3.1 ABSOLUTE RATINGS OF ENVIRONMENT (6)3.2 ELECTRICAL ABSOLUTE RATINGS (6)3.2.1 TFT LCD MODULE (6)4. ELECTRICAL SPECIFICATIONS (7)4.1 FUNCTION BLOCK DIAGRAM (7)4.2. INTERFACE CONNECTIONS (7)4.3 ELECTRICAL CHARACTERISTICS (9)4.3.1 LCD ELETRONICS SPECIFICATION (9)4.3.2 LED CONVERTER SPECIFICATION (11)4.3.3 BACKLIGHT UNIT (13)4.4 DISPLAY PORT SIGNAL TIMING SPECIFICATION (14)4.4.1 DISPLAY PORT INTERFACE (14)4.5 DISPLAY TIMING SPECIFICATIONS (15)4.6 POWER ON/OFF SEQUENCE (16)5. OPTICAL CHARACTERISTICS (19)5.1 TEST CONDITIONS (19)5.2 OPTICAL SPECIFICATIONS (19)6. RELIABILITY TEST ITEM (22)7. PACKING (23)7.1 MODULE LABEL (23)7.2 CARTON (24)7.3 PALLET (25)7.4 UN-PACK METHOD (26)8. PRECAUTIONS (27)8.1 HANDLING PRECAUTIONS (27)8.2 STORAGE PRECAUTIONS (27)8.3 OPERATION PRECAUTIONS (27)Appendix. EDID DATA STRUCTURE (28)Appendix. OUTLINE DRAWING (31)Appendix. SYSTEM COVER DESIGN GUIDANCE (33)Appendix. LCD MODULE HANDLING MANUAL (40)REVISION HISTORYVersion Date Page Description0.0 Jan,22,2014 All Tentative spec. ver. 0.0 was first issued.1.0 Apr,8,2014 All Preliminary spec. ver. 1.0 was first issued.1. GENERAL DESCRIPTION 1.1 OVERVIEWN133HSE-EA3 is a 13.3” (13.3” diagonal) TFT Liquid Crystal Display module with LED Backlight unit and 30 pins EDP interface. This module supports 1920 x 1080 FHD model and can display 16,777,216 colors. The optimum viewing angle is at 6 o’clock direction.1.2 GENERAL SPECIFICATI0NSItemSpecification Unit Note Screen Size 13.3 diagonal Driver Element a-si TFT active matrix - - Pixel Number 1920 x R.G.B. x 1080 pixel - Pixel Pitch0.1529 (H) x 0.1529 (V) mm - Pixel Arrangement RGB vertical stripe - - Display Colors16,777,216 color - Transmissive Mode Normally black - - Surface Treatment Hard coating (3H), Anti-Glare - - Luminance, White 350 Cd/m2 Power ConsumptionTotal (5.77) W(Max.) @ cell (0.86)W(Max.), BL (4.91) W(Max.)(1)Note (1) The specified power consumption (with converter efficiency) is under the conditions at VCCS = 3.3 V, fv = 60 Hz, LED_VCCS = Typ, fPWM = 200 Hz, Duty=100% and Ta = 25 ± 2 ºC, whereas mosaic2. MECHANICAL SPECIFICATIONSItem Min. Typ. Max. Unit Note Horizontal (H)304.85 305.35 305.85 mm Vertical (V) (W/ PCBA)(193.27) (193.77) (194.27) mm Module Size Thickness (T) NA (2.85) (3.00) mm (1) Horizontal293.66 293.76 293.86 mm Active AreaVertical165.14 165.24 165.34 mm Weight-(245)(260)gNote (1) Please refer to the attached drawings for more information of front and back outline dimensions.2.1 CONNECTOR TYPEPlease refer Appendix Outline Drawing for detail design.Connector Part No.: IPEX-20455-030E-12 User’s connector Part No: IPEX-20453-030T-01Pin1Pin303. ABSOLUTE MAXIMUM RATINGS3.1 ABSOLUTE RATINGS OF ENVIRONMENTValueItemSymbol Min. Max. Unit Note Storage TemperatureT ST -20 +60 ºC (1) Operating Ambient Temperature T OP+50ºC(1), (2)Note (1) (a) 90 %RH Max. (Ta < 40 ºC).(b) Wet-bulb temperature should be 39 ºC Max. (Ta < 40 ºC).(c) No condensation.Note (2) The temperature of panel surface should be 0 ºC min. and 50 ºC max.3.2 ELECTRICAL ABSOLUTE RATINGS 3.2.1 TFT LCD MODULEValue ItemSymbol Min. Max. Unit Note Power Supply Voltage VCCS (-0.3) (+4.0) V Logic Input Voltage V IN (-0.3) (VCCS+0.3)V(1) Converter Input VoltageLED_VCCS (-0.3) (25) V (1) Converter Control Signal Voltage LED_PWM, (-0.3) (5) V (1) Converter Control Signal VoltageLED_EN(-0.3)(5)V(1)Note (1) Stresses beyond those listed in above “ELECTRICAL ABSOLUTE RATINGS” may causepermanent damage to the device. Normal operation should be restricted to the conditions described in “ELECTRICAL CHARACTERISTICS”.4. ELECTRICAL SPECIFICATIONS 4.1 FUNCTION BLOCK DIAGRAM4.2. INTERFACE CONNECTIONSPIN ASSIGNMENT Pin Symbol DescriptionRemark1 NC No Connection (Reserved for INX test)2 H_GND High Speed Ground3 ML1- Complement Signal-Lane 14 ML1+ True Signal-Main Lane 15 H_GND High Speed Ground6 ML0- Complement Signal-Lane 07 ML0+ True Signal-Main Lane 08 H_GND High Speed Ground9 AUX+ True Signal-Auxiliary Channel10 AUX- Complement Signal-Auxiliary Channel 11 H_GND High Speed Ground12 VCCS Power Supply +3.3 V (typical) 13 VCCS Power Supply +3.3 V (typical)14 NC No Connection (Reserved for INX test) 15 GND Ground 16 GND Ground17 HPD Hot Plug Detect 18 BL_GND BL Ground 19 BL_GND BL Ground 20 BL_GND BL Ground 21 BL_GND BL Ground22LED_ENBL_Enable Signal of LED ConverterSignalsGNDConverter Input Signals23 LED_PWM PWM Dimming Control Signal of LED Converter24 NC No Connection (Reserved for INX test) 25 NC No Connection (Reserved for INX test) 26 LED_VCCS BL Power27 LED_VCCS BL Power 28 LED_VCCS BL Power 29 LED_VCCSBL Power30NCNo Connection (Reserved for INX test)Note (1) The first pixel is odd as shown in the following figure.4.3 ELECTRICAL CHARACTERISTICS4.3.1 LCD ELETRONICS SPECIFICATIONValueParameter SymbolMin. Typ. Max.UnitNotePower Supply Voltage VCCS (3.0) (3.3) (3.6) V(1)-High Level (3.0) - (3.6) VHPDLow Level (0) - (0.4) VRipple Voltage V RP- (50) - mV (1)- Inrush Current I RUSH- - (1.5) A (1),(2)Mosaic - (244) (262) mA(3)aPower Supply CurrentWhite lcc- (271) (310) mA (3)bNote (1) The ambient temperature is Ta = 25 ± 2 ºC.Note (2) I RUSH: the maximum current when VCCS is risingI IS: the maximum current of the first 100ms after power-onMeasurement Conditions: Shown as the following figure. Test pattern: white.SWVCCS +3.3VVCCS rising time is 0.5msNote (3) The specified power supply current is under the conditions at VCCS = 3.3 V, Ta = 25 ± 2 ºC, DCCurrent and f v = 60 Hz, whereas a power dissipation check pattern below is displayed.Active Areaa. Mosaic PatternActive Areab. White Pattern4.3.2 LED CONVERTER SPECIFICATIONValueParameterSymbolMin.Typ. Max. UnitNote Converter Input power supply voltage LED_Vccs (5.0) (12.0) (21.0) V Converter Inrush CurrentILED RUSH- - (1.5) A (1) Backlight On(2.2)-(5.0)VEN Control LevelBacklight Off(0) - (0.6) V PWM High Level(2.2)-(5.0)VPWM Control LevelPWM Low Level(0) - (0.6) V PWM Control Duty Ratio(5) - (100) % PWM Control PermissiveRipple VoltageV PWM_pp- - (100) mV PWM Control Frequencyf PWM (190) - (1K) Hz (2) LED Power Current LED_VCCS =Typ.ILED (302)(357)(409)mA(3)Note (1) ILED RUSH : the maximum current when LED_VCCS is rising, ILED IS : the maximum current of the first 100ms after power-on,Measurement Conditions: Shown as the following figure. LED_VCCS = Typ, Ta = 25 ± 2 ºC, f PWM = 200 Hz, Duty=100%.LED_VCCS(Typ)ILEDLED_VCCLED_PWM LED_ENNote (2)If PWM control frequency is applied in the range less than 1KHz, the “waterfall” phenomenon onthe screen may be found. To avoid the issue, it’s a suggestion that PWM control frequency should follow the criterion as below.PWM control frequency f PWM should be in the range≤∗+f N )33.0( f PWM f N ∗+≤)66.0(N : Integer )3(≥Nf : Frame rateNote (3) The specified LED power supply current is under the conditions at “LED_VCCS = Typ.”, Ta = 25± 2 ºC, f PWM = 200 Hz, Duty=100%.VLED rising time is 0.5ms4.3.3 BACKLIGHT UNITTa = 25 ± 2 ºCValue ParameterSymbol Min. Typ. Max. Unit NoteLED Light Bar Power Supply VoltageV L 23.426.1 28.8VLED Light Bar Power Supply CurrentI L 126mA(1)(2)(Duty100%)Power Consumption P L - 3.2886 3.6288 W (3) LED Life Time L BL15000 --Hrs(4)Note (1) LED current is measured by utilizing a high frequency current meter as shown below :Note (2) For better LED light bar driving quality, it is recommended to utilize the adaptive boost converter withcurrent balancing function to drive LED light-bar.Note (3) P L = I L ×V L (Without LED converter transfer efficiency)Note (4) The lifetime of LED is defined as the time when it continues to operate under the conditions at Ta = 25 ±2oC and I L = 21 mA (Per EA) until the brightness becomes 50% of its original value.≦V I Channels4.4 DISPLAY PORT SIGNAL TIMING SPECIFICATION 4.4.1 DISPLAY PORT INTERFACEParameterSymbol Min. Typ. Max. Unit Notes Differential Signal Common Mode Voltage(MainLink and AUX) VCM (0) (2) V (1)(3) AUX AC Coupling CapacitorC AUX(75)(200)nF(2)Note (1) Display port interface related AC coupled signals should follow VESA DisplayPort StandardVersion1. Revision 1a and VESA Embedded DisplayPort TMStandard Version 1.1.(2) The AUX AC Coupling Capacitor should be placed on Source Devices.(3)The source device should pass the test criteria described in DisplayPortCompliance TestSpecification (CTS) 1.10VV CM |Single EndedV D+ V D-4.5 DISPLAY TIMING SPECIFICATIONSThe input signal timing specifications are shown as the following table and timing diagram . Refresh rate 60Hz Signal Item Symbol Min.Typ.Max.UnitNote DCLKFrequency 1/Tc (116.17) (138.78) (142.77) MHz - Vertical Total Time TV (1103) (1112) (1462) TH - Vertical Active Display PeriodTVD (1080) (1080) (1080) TH - Vertical Active Blanking PeriodTVB TV-TVD (32) TV-TVDTH - Horizontal Total Time TH (2058) (2080) (2910) Tc- Horizontal Active Display Period THD (1920)(1920) (1920)Tc - DEHorizontal Active Blanking PeriodTHBTH-THD(160)TH-THDTc-INPUT SIGNAL TIMING DIAGRAMDCLKDEDEDATA4.6 POWER ON/OFF SEQUENCERestartPower OnPower Off-Power Supplyfor LCD, VCCS -eDP Display-HPD from Sink -AUX Channel -Main Link Data- LED Converter,LED_VCCS - LED Converter LED_PWM - LED Converter Enable Signal, LED_ENTiming Specifications: Value ParameterDescriptionReqd. By Min Max Unit Notes t1Power rail rise time, 10% to 90% Source0.5 10ms-t2 Delay from LCD,VCCS to black video generationSink 0 200 msAutomatic Black Videogeneration prevents display noise until valid video data is received from the Source (see Notes:2 and 3 below) t3Delay from LCD,VCCS to HPD highSink 0 200 ms Sink AUX Channel must be operational upon HPD high (see Note:4 below )t4 Delay from HPD high to link training initialization Source - - ms Allows for Source to read Link capability and initializet5Link training durationSource--ms Dependant on Source link training protocol t6 Link idle Source - -msMin Accounts for required BS-Idlepattern. Max allows for Source frame synchronizationt7Delay from valid video data from Source to video on displaySink 0 50msMax value allows for Sink to validate video data and timing. At the end of T7, Sink willindicate the detection of valid video data by setting theSINK_STATUS bit to logic 1 (DPCD 00205h, bit 0), and Sink will no longer generateautomatic Black Video t8Delay from valid video data from Source to backlight onSource - -msSource must assure display video is stable t9Delay from backlight off to end of valid video dataSource - -msSource must assure backlight is no longer illuminated. At the end of T9, Sink will indicate the detection of no valid video data by setting the SINK_STATUS bit to logic 0 (DPCD00205h, bit 0), and Sink will automatically display Black Video. (See Notes: 2 and 3 below)t10 Delay from end of valid video data from Source to power off Source 0 500 ms Black video will be displayed after receiving idle or off signals from Sourcet11 VCCS power rail fall time, 90% to 10%Source 0.5 10 ms - t12 VCCS Power off timeSource 500 - ms - t A LED power rail rise time, 10% to 90%Source 0.5 10 ms - t BLED power rail fall time, 90% to 10%Source10ms-t C Delay from LED power rising to LED dimming signalSource 1 - ms - t D Delay from LED dimming signal to LED power fallingSource 1 - ms - t E Delay from LED dimming signal to LED enable signalSource 1 - ms - t FDelay from LED enable signal to LED dimming signalSource1-ms-Note (1) Please don’t plug or unplug the interface cable when system is turned on.Note (2) The Sink must include the ability to automatically generate Black Video autonomously. The Sink mustautomatically enable Black Video under the following conditions:- Upon LCDVCC power-on (within T2 max)- When the “NoVideoStream_Flag” (VB-ID Bit 3) is received from the Source (at the end of T9) Note (3) The Sink may implement the ability to disable the automatic Black Video function, as described inNote (2), above, for system development and debugging purposes.Note (4) The Sink must support AUX Channel polling by the Source immediately following LCDVCCpower-on without causing damage to the Sink device (the Source can re-try if the Sink is not ready). The Sink must be able to response to an AUX Channel transaction with the time specified within T3 max.5. OPTICAL CHARACTERISTICS5.1 TEST CONDITIONSItem Symbol Value Unit Ambient Temperature Ta 25±2 o CAmbient Humidity Ha 50±10 %RHSupply Voltage V CC 3.3 VInput Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"LED Light Bar Input Current I L(126) mAThe measurement methods of optical characteristics are shown in Section 5.2. The following items should be measured under the test conditions described in Section 5.1 and stable environment shown in Note (5).Note (2) Definition of Contrast Ratio (CR):The contrast ratio can be calculated by the following expression. Contrast Ratio (CR) = L63 / L0 L63: Luminance of gray level 63 L 0: Luminance of gray level 0 CR = CR (1)CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).Note (3) Definition of Response Time (T R , T F ):Note (4) Definition of Average Luminance of White (L AVE ):Measure the luminance of gray level 63 at 5 pointsL AVE = [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5L (x) is corresponding to the luminance of the point X at Figure in Note (6)100% 90%10% 0%OpticalNote (5) Measurement Setup:The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt temperature change during measuring. In order to stabilize the luminance, the measurement should be executed after lighting Backlight for 20 minutes in a windless room.Note (6) Definition of White Variation (δW):Measure the luminance of gray level 63 at 5 points δW 5p = {Minimum [L (1)~L (5)] / Maximum [L (1)~ L (5)]}*100%Note (7) The listed optical specifications refer to the initial value of manufacture, but the condition ofthe specifications after long-term operation will not be warranted.: Test Point X=1 to 136. RELIABILITY TEST ITEMTest Item Test Condition Note High Temperature Storage Test 60ºC, 240 hoursLow Temperature Storage Test -20ºC, 240 hoursThermal Shock Storage Test -20ºC, 0.5hour←→60, 0.5hour; 100cycles, 1hour/cycle℃High Temperature Operation Test 50ºC, 240 hoursLow Temperature Operation Test 0ºC, 240 hoursHigh Temperature & High HumidityOperation Test50ºC, RH 80%, 240hoursHigh Temperature & High Humidity Storage Test 40ºC, RH 90%, 240hours(1) (2)ESD Test (Operation) 150pF, 330Ω, 1sec/cycleCondition 1 : Contact Discharge, ±8KVCondition 2 : Air Discharge, ±15KV(1)Shock (Non-Operating) 220G, 2ms, half sine wave,1 time for each direction of±X,±Y,±Z(1)(3)Vibration (Non-Operating) 1.5G / 10-500 Hz, Sine wave, 30 min/cycle, 1cycle for eachX, Y, Z(1)(3)Note (1) criteria : Normal display image with no obvious non-uniformity and no line defect.Note (2) Evaluation should be tested after storage at room temperature for more than two hourNote (3) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that the module would not be twisted or bent by the fixture.7. PACKING7.1 MODULE LABELThe barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.(a) Model Name: N133HSE – EA3(b) Revision: Rev. XX, for example: C1, C2 …etc. (c)(d) Production Location: MADE IN XXXX. (e) UL Logo: XXXX is UL factory ID.Serial ID includes the information as below:(a) Manufactured Date: Year: 0~9, for 2010~2019Month: 1~9, A~C, for Jan. ~ Dec.Day: 1~9, A~Y , for 1stto 31st, exclude I , O and U(b) Revision Code: cover all the change(c) Serial No.: Manufacturing sequence of product (d) Product Line: 1 -> Line1, 2 -> Line 2, …etc.Product Line Year, Month, Date INX Internal Use RevisionINX Internal UseSerial No. CT:CDSQRRR5CWWXXXN133HSE-EA3 Rev. XX7.2 CARTONFigure. 7-1 Packing method7.3 PALLET7.4 UN-PACK METHODFigure. 7-3 Un-Packing method8. PRECAUTIONS8.1 HANDLING PRECAUTIONS(1) The module should be assembled into the system firmly by using every mounting hole. Be carefulnot to twist or bend the module.(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may causeelectrical short or damage the polarizer.(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection andassembly process.(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizeris very soft and easily scratched.(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do notuse Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might permanently damage the polarizer due to chemical reaction.(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panelfor a long time.(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. Incase of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.(9) Do not disassemble the module.(10) Do not pull or fold the LED wire.(11) Pins of I/F connector should not be touched directly with bare hands.8.2 STORAGE PRECAUTIONS(1) High temperature or humidity may reduce the performance of module. Please store LCD modulewithin the specified storage conditions.(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture maydamage LCD module when it is operating.(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, theresponse time will become slowly, and the starting voltage of LED will be higher than the room temperature.8.3 OPERATION PRECAUTIONS(1) Do not pull the I/F connector in or out while the module is operating.(2) Always follow the correct power on/off sequence when LCD module is connecting and operating.This can prevent the CMIS LSI chips from damage during latch-up.(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock whileassembling with converter. Do not disassemble the module or insert anything into the Backlight unit.Appendix. EDID DATA STRUCTUREThe EDID (Extended Display Identification Data) data formats are to support displays as defined in the VESA Plug & Display and FPDI standards.Byte#(decimal)Byte#(hex)Field Name and CommentsValue(hex)Value(binary)000Header0000000000 101Header FF11111111 202Header FF11111111 303Header FF11111111 404Header FF11111111 505Header FF11111111 606Header FF11111111 707Header0000000000 808EISA ID manufacturer name ("CMN")0D00001101 909EISA ID manufacturer name AE10101110 100A「」 6101100001 110B ID product code (MSB)1300010011 120C ID S/N (fixed "0")0000000000 130D ID S/N (fixed "0")0000000000 140E ID S/N (fixed "0")0000000000 150F ID S/N (fixed "0")0000000000 1610Week of manufacture (fixed week code)0700000111 1711Year of manufacture (fixed year code)1800011000 1812EDID structure version ("1")010******* 1913EDID revision ("4")0400000100 2014Video I/P definition ("Digital")A510100101 2115Active area horizontal ("29.376cm")1D00011101 2216Active area vertical ("16.524cm")1100010001 2317Display Gamma (Gamma = "2.2")7801111000 2418Feature support ("RGB, Non-continous")020******* 2519Rx1, Rx0, Ry1, Ry0, Gx1, Gx0, Gy1, Gy0CE11001110 261A Bx1, Bx0, By1, By0, Wx1, Wx0, Wy1, Wy0851******* 271B Rx=0.64A310100011 281C Ry=0.345701010111 291D Gx=0.3084E01001110 301E Gy=0.6159D10011101 311F Bx=0.152600100110 3220By=0.0712******** 3321Wx=0.3135001010000 3422Wy=0.3295401010100 3523Established timings 10000000000 3624Established timings 20000000000 3725Manufacturer's reserved timings0000000000 3826Standard timing ID # 10100000001 3927Standard timing ID # 10100000001 4028Standard timing ID # 20100000001 4129Standard timing ID # 20100000001422A Standard timing ID # 30100000001 432B Standard timing ID # 30100000001 442C Standard timing ID # 40100000001 452D Standard timing ID # 40100000001 462E Standard timing ID # 50100000001 472F Standard timing ID # 50100000001 4830Standard timing ID # 60100000001 4931Standard timing ID # 60100000001 5032Standard timing ID # 70100000001 5133Standard timing ID # 70100000001 5234Standard timing ID # 80100000001 5335Standard timing ID # 801000000015436Detailed timing description # 1 Pixel clock ("138.78MHz, According toVESA CVT Rev1.4")36001101105537# 1 Pixel clock (hex LSB first)3600110110 5638# 1 H active ("1920")8010000000 5739# 1 H blank ("160")A010100000 583A# 1 H active : H blank ("1920:160")7001110000 593B# 1 V active ("1080")3800111000 603C# 1 V blank ("32")2000100000 613D# 1 V active : V blank ("1080:32")4001000000 623E# 1 H sync offset ("46")2E00101110 633F# 1 H sync pulse width ("30")1E00011110 6440# 1 V sync offset : V sync pulse width ("2:4")24001001006541# 1 H sync offset : H sync pulse width : V sync offset : V sync width("46: 30 : 2 : 4")00000000006642# 1 H image size ("293 mm")2500100101 6743# 1 V image size ("165 mm")A510100101 6844# 1 H image size : V image size1000010000 6945# 1 H boarder ("0")0000000000 7046# 1 V boarder ("0")0000000000 7147# 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol Negatives18000110007248Detailed timing description # 2 Pixel clock ("92.52MHz", According toVESA CVT Rev1.4)24001001007349# 2 Pixel clock (hex LSB first)2400100100 744A# 2 H active ("1920")8010000000 754B# 2 H blank ("160")A010100000 764C# 2 H active : H blank ("1920 :160")7001110000 774D# 2 V active ("1080")3800111000 784E# 2 V blank ("32")2000100000 794F# 2 V active : V blank ("1080 :32")4001000000 8050# 2 H sync offset ("46")2E00101110 8151# 2 H sync pulse width ("30")1E00011110 8252# 2 V sync offset : V sync pulse width ("2 : 4")24001001008353# 2 H sync offset : H sync pulse width : V sync offset : V sync width("46: 30 : 2 : 4")00000000008454# 2 H image size ("293 mm")2500100101 8555# 2 V image size ("165 mm")A5101001018656# 2 H image size : V image size1000010000 8757# 2 H boarder ("0")0000000000 8858# 2 V boarder ("0")0000000000 8959# 2 Non-interlaced, Normal, no stereo, Separate sync, H/V pol Negatives1800011000 905A Detailed timing description # 30000000000 915B# 3 Flag0000000000 925C# 3 Reserved0000000000 935D# 3 ASCII string Vendor FE11111110 945E# 3 Flag0000000000 955F# 3 Character of string ("C")4301000011 9660# 3 Character of string ("M")4D01001101 9761# 3 Character of string ("N")4E01001110 9862# 3 New line character indicates end of ASCII string0A00001010 9963# 3 Padding with "Blank" character2000100000 10064# 3 Padding with "Blank" character2000100000 10165# 3 Padding with "Blank" character2000100000 10266# 3 Padding with "Blank" character2000100000 10367# 3 Padding with "Blank" character2000100000 10468# 3 Padding with "Blank" character2000100000 10569# 3 Padding with "Blank" character2000100000 1066A# 3 Padding with "Blank" character2000100000 1076B# 3 Padding with "Blank" character2000100000 1086C Detailed timing description # 40000000000 1096D# 4 Flag0000000000 1106E# 4 Reserved0000000000 1116F# 4 ASCII string Model Name FE11111110 11270# 4 Flag0000000000 11371# 4 Character of Model name ("N")4E01001110 11472# 4 Character of Model name ("1")3100110001 11573# 4 Character of Model name ("3")3300110011 11674# 4 Character of Model name ("3")3300110011 11775# 4 Character of Model name ("H")4801001000 11876# 4 Character of Model name ("S")5301010011 11977# 4 Character of Model name ("E")4501000101 12078# 4 Character of Model name ("-")2D00101101 12179# 4 Character of Model name ("E")4501000101 1227A# 4 Character of Model name ("A")4101000001 1237B# 4 Character of Model name ("3")3300110011 1247C# 4 New line character indicates end of ASCII string0A00001010 1257D# 4 Padding with "Blank" character2000100000 1267E Extension flag0000000000 1277F Checksum A110100001Appendix. OUTLINE DRAWINGAppendix. SYSTEM COVER DESIGN GUIDANCE0. Permanent deformation of system cover after reliability testDefinitionSystem cover including front and rear cover may deform during reliability test. Permanent deformation of system front and rear cover after reliability test should not interfere with panel. Because it may cause issues such as pooling, abnormal display, white spot, and also cell crack. Note: If the interference can not be avoided, please feel free to contact INX FAE Engineer for collaboration design. We can help to verify and pass risk assessment for customer reference. 1. Design gap A between panel & any components on system rear-coverDefinitionGap between panel’s maximum thickness boundary & system’s inner surface components such as wire, cable, extrusion is needed for preventing from backpack or pogo test fail. Because zero gap or interference may cause stress concentration. Issues such as pooling, abnormal display, white spot, and cell crack may occur. Maximum flatness of panel and system rear-cover should be taken into account for gap design. Note: If the interference can not be avoided, please feel free to contact INX FAE Engineer for collaboration design. We can help to verify and pass risk assessment for customer reference. 2 Design gap B1 & B2 between panel & protrusions。

3.0寸 37PIN(CMO+R61509V)(8bit,16bit)16;9 规格书

修改记录日期版本修改内容拟制检查核准2012-8-28 01 初版发行上线目录1. 概述 - - - - - - - - - - - - - - - - -- - - - - - - - - - 32. 产品特征 - - - - - - - - - - - - - - - - -- - - - - - - - - - 33. 机械规格- - - - - - - - - - - - - - - - -- - - - - - - - - - 34. 外形尺寸 - - - - - - - - - - - - - - - - -- - - - - - - - - - 45. 接口定义 - - - - - - - - - - - - - - - - -- - - - - - - - - - 56. 功能框图 - - - - - - - - - - - - - - - - -- - - - - - - - - - 67. 接口时序 - - - - - - - - - - - - - - - - -- - - - - - - - - - 68. 复位时序 - - - - - - - - - - - - - - - - -- - - - - - - - - - 79. DDRAM 映射表 - - - - - - - - - - - - - - - - -- - - - - - - - 810. 极限技术参数 - - - - - - - - - - - - - - - - -- - - - - - - - 1011. 电气参数 - - - - - - - - - - - - - - - - -- - - - - - - - - - 1012. 背光参数 - - - - - - - - - - - - - - - - -- - - - - - - - - - 1113. 光电参数 - - - - - - - - - - - - - - - - - - - - - - -- - - - 1114. 极限环境参数- - - - - - - - - - - - - - - - -- - - - - - - - - 1515. 可靠性测试 - - - - - - - - - - - - - - - - - - - - - - - - - - 1516. LCM检验标准 - - - - - - - - - - - - - - - - - - - -- - - - 1617. LCM的使用- - - - - - - - - - - - - - - - -- - - - -- - - - 191. 概述1-1范围:此份规格书涵盖了LCM从上线科技到客户的运输过程中应该注意的所有要求。

中文-奇美37寸屏规格书

奇美37寸液晶屏简介一、概述V370H1-LOA 是 CHI-MEI 公司(奇美)2006 年生产的液晶屏,带有 20 支冷阴极荧光灯作背光源。

两路ＬＶＤＳ接口，支持分辨率为 1920×1080 的 HDTV，能显示 16.7M 色彩（8bit/基色）。

内设有背光源的逆变器。

▪超宽视角–支持广视角技术▪高亮度（500 尼特）▪高对比度> 1000:1▪快速响应时间< 8 ms▪色饱和度高(NTSC 75%)▪高清分辨率(1920 x 1080 像素)▪单一数据使能控制模式▪ LVDS (低压差分信号) 接口注1注 2：表面处理的规格是暂定的，奇美公司有权更改二、极限参数注（1）温度和相对温度范围如图1所示（a）最大相对湿度90%（Ta＜40ºC）（b）湿环温度计最大是39ºC（Ta＞40ºC）（c）无凝露注（2）屏的最大运行温度是基于屏表面温度小于等于60ºC，若超过60ºC应缩小运行温度范围，这一点在产品的设计时应重视。

注（3）11ms，半正弦波±x，±y，±z方向各一次。

注（4）10～200Hz，持续10分钟，X、Y、Z方向各一次。

注（5）在做冲击和震动试验时，夹具应将模块夹紧，模块应有刚性，不应被夹具固定时出现变形。

图1 温度和相对湿度范围图注（1）：如超过最大值，屏可能会产生永久性损坏，正常工作条件下的运行功能将受到限制。

注（1）制。

注（2）：潮气不凝露或冰结。

注（3）：控制信号是指on/off控制和内部PWM控制信号。

三、电气特性注（2）：测试电路如下注（3）：表中所列的电源供电电流测试条件是：VCC=18V/12V，Ta=25±2℃，fV=60Hz，屏的画面图形如图4、5、6所示。

图2 冲击电流测试电路图3 Vcc上升时间是470μs图7逆变器电源和控制信号时序图注（1）：灯电流测量须用高频电流表。

10.1,1280x800,寸IPS规格书(2.35厚,LVDS,40PIN)

规格书SpecificationProduct品名：Customer客戶：Part No.型号：T2101B12522H8Date日期：Customer Approved Approved CheckedContentsNo. Contents Page ----- Cover 1 ----- Contents 2 ----- Revision History 3 一General Description 4 二Electrical Characteristics 5 三Optical Specification 8四Interface Connection 12 五Input Signal Timing 13 六Outline Dimension 16 七Handling Precautions 18 八Packaging 19Revision RecordDate Version Revision Items Page Design by 2012/8/16 01 New All1. General Description1.1 DescriptionT2101B12522H8 is a color active matrix TFT LCD module using amorphous silicon TFT's (Thin Film Transistors) as an active switching devices. This module has a 10.07 inch diagonally measured active area with WSVGA resolutions (1280 horizontal by 800 vertical pixel array). Each pixel is divided into RED, GREEN, BLUE dots which are arranged in vertical stripe and this module can display 16.7M colors. The TFT-LCD panel used for this module is adapted for a low reflection and higher color type.1.2 Features< Table 1. General Specifications >■ 1 Channel LVDS Interface with 1 pixel / clock■ Thin and light weight■ Display 16.7M colors■ High luminance and contrast ratio, low reflection and wide viewing angle■ DE (Data Enable) signal mode■ 3.7V for Logic Power■ RoHS Compliant& Halogen free2.Electrical Characteristics2.1 Absolute Maximum RatingsThe followings are maximum values which, if exceed, may cause faulty operation or damage to the unit. The operational and non-operational maximum voltage and current values are listed in Table 2.< Table 2. LCD Module Electrical Specifications > [Ta =25±2 ℃]2.2 TFT LCD Module< Table 3. LCD Module Electrical Specifications > [Ta =25±2 ℃]Notes : 1. The supply voltage is measured and specified at the interface connector of LCM.The current draw and power consumption specifiedis for 3.3Vat 25 ℃a) Typ: TizuMap Patternb) Max : Skip Sub Pixel2.2.Calculated value for reference (VLED X ILED)2.3 Power On/Off SequenceTo prevent the device damage from latch up, the power on/off sequence shown below must be followed.Notes:1. When the power supply VDD is 0V, keep the level of input signals on the low or keep high impedance.2 Do not keep the interface signal high impedance when power is on.Back Light must be turn on after power for logic and interface signal are valid.2.4 Connector DescriptionPhysical interface is described as for the connector on LCM.These connectors are capable of accommodating the following signals and will be following components.2.4.1 TFT LCD Module2.5 Backlight Unit< Table 4. LED Driving guideline specifications > Ta=25+/-2°CNotes : 1. Calculator Value for reference ILED × VLED = PLED2. The LED Life-time define as the estimated time to 50% degradationof initial luminous.3. Optical Specifications3.1OverviewThe test of Optical specifications shall be measured in a dark room (ambient luminance ≤1lux and temperature = 25±2℃) with the equipment of Luminance meter system (Goniometer system and TOPCON BM-5) and test unit shall be located at an approximate distance50cm from the LCD surface at a viewing angle of θand Φequal to 0°. While scanning θand/or Ø, the center of the measuring spot on the Display surface shall stay fixed. The backlight should be operating for 30 minutes prior to measurement. VDD shall be 3.3+/-0.3V at 25°C.Optimum viewing angle direction is 6 ’clock.3.2 Optical Specifications<Table 5. Optical Specifications>1. Viewing angle is the angle at which the contrast ratio is greater than 10. The viewing angles are determined for the horizontal or 3, 9 o’clock direction and the vertical or 6, 12 o’clock direction with respect to the optical axis which is normal to the LCD surface (see FIGURE 1).2. Contrast measurements shall be made at viewing angle of Θ= 0 and at the center of the LCD surface. Luminance shall be measured with all pixels in the view field set first to white, then to the dark (black) state . (see FIGURE 1) Luminance Contrast Ratio (CR) is defined mathematically. Contrast Ratio =pixelsblack all with Luminance Surface pixelswhite all with Luminance Surface3. Center Luminance of white is defined as luminance values of 9point average across the LCD surface. Luminance shall be measured with all pixels in the view field set first to white. This measurement shall be taken at the locations shown in FIGURE 2 for a total of the measurements per display. the LED current is setting at 18mA.4. The White luminance uniformity on LCD surface is then expressed as : ΔY =Minimum Luminance of 13 points / Maximum Luminance of 13points (see FIGURE 2).5. The color chromaticity coordinates specified in Table 5 shall be calculated from the spectral data measured with all pixels first in red, green, blue and white. Measurements shall be made at the center of the panel.6. The electro-optical response time measurements shall be made as FIGURE3by switching the “data” input signal ON and OFF. The times needed for the luminance to change from 10% to 90% is Tr, and 90% to 10% is Td.7. Cross-Talk of one area of the LCD surface by another shall be measured by comparing the luminance (YA) of a 25mm diameter area, with all display pixels set to a gray level, to the luminance (YB) of that same area when any adjacent area is driven dark. (See FIGURE 4).3.3 Optical measurementsCenter Luminance of white is defined as luminance values of center 13points across the LCD surface. Luminance shall be measured with all pixels in the view field set first to white. This measurement shall be taken at the locations shown in FIGURE 2 for a total of the measurements per display. The White luminance uniformity on LCD surface is then expressed as :ΔY13= Minimum Luminance of five points / Maximum Luminance of nine points (see FIGURE 2).The White luminance uniformity on LCD surface is then expressed as :∆Y5 =Minimum Luminance of 5 points / Maximum Luminance of 5points (see FIGURE 2).The electro-optical response time measurements shall be made as shown in FIGURE 3 by switching the “data” input signal ON and OFF. The times needed for the luminance to change from 10% to 90% is Tr and 90% to 10% is Td.Where:YA= Initial luminance of measured area (cd/m2)YB= Subsequent luminance of measured area (cd/m2)The location measured will be exactly the same in both patternsCross-Talk of one area of the LCD surface by another shall be measured by comparing the luminance (YA) of a 25mm diameter area, with all display pixels set to a gray level, to the luminance (YB) of that same area when any adjacent area is driven dark (Refer to FIGURE 4).4. Interface Connection4.1 Electrical Interface ConnectionThe electronics interface connector is FF12-31A-R11B.The connector interface pin assignments are listed in Table 6.<Table 6. Pin Assignments for the Interface Connector>1.Pins 23 and 26 allow access to internal settings. Connect to GPIO and set as Hi-Z during Normal operation. Failure to do so will result in damage to the display.2.Leave NC pins as open3.Connector shield case needs to be connected with signal GND4.Do not share VDD power supply with camera.4.2. Block Diagram of Display5. Input Signal Timing 5.1.LVDS Input signal5.2 Data Input Format5.3Signal Timing Specifications5.3.1 The BP101WX1-100 is operated by the DE only.5.3.2 LVDS Rx Interface Timing ParameterThe specification of the LVDS Rx interface timing parameter is shown in Table 8.<Table 8. LVDS Rx Interface Timing Specification>5.4Signal Timing Waveforms Of Interface Signal6. Outline Dimension6.1Mechanical Outline DimensionFigure 6 TFT LCD Module Outline Dimension (Front View)Figure 7. TFT-LCD Module Outline Dimensions (Rear view)7. Handling Precautions(1) SafetyThe liquid crystal in the LCD is poisonous. Don’t put it in your mouth. If the liquid crystal touches your skin or clothes, wash it off immediately using soap and water.(2)HandlingA. The LCD is made of plate glass. Don’t subject the panel to mechanical shock or to excessive force on its surface.B. Don’t handle the product by holding the flexible pattern portion on order to assure the reliabilityC. Transparency is an important factor for the touch panel. Please wear clear finger sacks, gloves and mask to protect the touch panel from finger print or stain and also hold the portion outside the view area when handling the touch panel.D. Provide a space so that the panel doesn’t come into contact with other components.E. To protect the product from external force, put a covering lens ( acrylic board or similar board) and keep an appropriate gap between them.F. Transparent electrodes may be disconnected if the panel is used under environmental conditions where dew condensation occurs.G. Property of semiconductor devices may be affected when they’re exposed to light, possibly resulting in IC malfunctions.H. To prevent such IC malfunctions, you design and mounting layout shall be done in the way that the IC is not exposed to light in actual use.(3) Static ElectricityA. Ground soldering iron tips, tools and testers when they are in operation.B. Ground your body when handling the productsC. Power on the LCD module before applying the voltage to the input terminals.D. Don’t apply voltage which exceeds the absolute maximum ratingE. Store the products in an anti-electrostatic bag or container.(4) StorageA. Store the products in a dark place at 25℃+ 10℃ with low humidity (40% RH to 60% RH). Don’t expose to sunlight or fluorescent light.B. Storage in a clean environment, free from dust, active gas and solvent.(5) CleaningA. Don’t wipe the panel with dry cloth, as it may cause scratch.B. Wipe off the stain on the product by using soft cloth moistened with ethanol. Don’t allow ethanol to get in between the upper film and the bottom glass. It may cause peeling issue or defective operation. Don’t use any organic solvent or detergent other than ethanol.8. Packaging TBD。

LCM成品检验标准

目视
2-10(MA)
无封口胶/胶异色
无封口胶/胶发白/脱落
NG（免封口工艺LCD除外）
目视
2-11(MI)
LCD框胶不良
LCD框胶有粗细、杂质气泡、断开、歪斜等不良现象。
1、偏移不进入可视区允收。
2、1/2平均宽度＜宽度＜4/3平均宽度允收。
3、框胶气泡＜1/2框胶宽度允收。
4、色泽相同允收。
目视
必要时在显微镜
www55topcom好好学习社区318mabl发光不均匀个或若干个灯芯不亮导致显示画面发光不均匀黑影ng319mibl个或若干个灯芯发光与其他不一致ng320mibl白点电测时可见白点参照点状缺陷标准判定321micell内亮点电测时可见亮点322micell内暗点电测时可见暗点323micell内密集亮点电测时黑色画面可见其它画面不可02mm允许324matp不良触摸屏点不动飘ng其它41ma尺寸不符每批次抽检5pcs组装成成品后尺寸与工程图纸不符ng用游标卡尺测42ma结构方面实物结构与图纸外型样品不符ng目视43ma包装材料包装材料与要求不ng44ma产品型号错型号填写错误或填写不完整ng45ma无错盘traytray之间有无错盘ng46ma数量包装数量与要求不ng多数少数实物数量与送检单上数量不符ng47ma包装方向错产品包装摆放方向与要求不符ng48mi纸箱不良纸箱是否破损变ng49ma标签贴符不良1内外包装箱上无标签2标签上内容填写不完整型号日期等ng德信诚培训网更多免费资料下载请进
目视，必要时对照工程图纸检验
2、两部份破损(左、右)之和大于1/5WNG（W表示元器件的整个长度）且不影响功能
2-34(MI)
FPC划/刮伤
表面刮伤
不伤及线路，无破裂，不影响功能OK

4.3寸40PIN高亮显示屏规格书

SPECIFICATION NO.:CXT430C10H29-1200P40NACCEPTEDBYCUSTOMERProduct: 4.3” TFT 480(RGB)*272 PixelsVerson: V00Date: 2013/11/23APPROVED CHECKED PREPARED—————————————————————————————————1Catalog：N0. ContentsPage 1 History Verson1 2 Mechanical Description 2 3 Mechanical Drawing 3 4 Interface Definition 4 5 Interface Timing5-6 6 Absolute Maximum Ratings 7 7 DC Characteristics 7 8 Blacklight7-8 9 Optical Specification 8-9 10 Reliability testing 10 11 Inspection Standard 11-12 12 Precaution 12-131. History VersonSample versonDoc.versonDate Discription ModifyV00 V00 2013-11-23 First issue Ljj—————————————————————————————————12．Mechanical DescriptionName Content Unit Outline Size 105.50 (W) * 67.20 (H) * 2.90(T) mmModule size 4.3 (V.A) inchResolution 480(RGB)* 272 Pixels -Viewing size 95.04(W) * 53.86(H) mmPixel size 0.198 * 0.198 mmLCD Type TFT (262K)/ Transmissive / Positive - Viewing Angle 6 H - Driver IC OTA5180A - Backlight Type 6 Serial 2 Paralle LEDs - Interface Type 24 Bit RGB -—————————————————————————————————23.Mechanical Drawing—————————————————————————————————3PIN NO. PIN Name Funtion Description1 LEDK back light power supply negative2 LEDA back light power supply positive3 GND Ground4 VCC Power supply5-12 R0-R7 Red Data13-20 G0-G7 Green Data21-28 B0-B7 Blue Data29 GND Ground30 CLK Colock signal31 DISP Display on/off32 HSYNC Horizontal sync input in RGB mode33 VSYNC Vertical sync input in RGB mode34 DE Data enable35 NC No Connection36 GND Ground37 NC(YU) NC(touch panel Y-up)38 NC(XL) NC(touch panel X-left)39 NC(YD) NC(touch panel Y-bottom)40 NC(XR) NC(touch panel X-right) —————————————————————————————————4—————————————————————————————————55.1 Reset Timing5.2 RGB Interface Timing5.3 AC Timing Diagram—————————————————————————————————66. Absolute Maximum Ratings：Name symbol Min Type Max Unit Operation Temperature T OP-20 - 70 ℃ Storage Temperature T ST-30 - 80 ℃7. DC CharacteristicsName Symbol Min Type Max Unit Logical Voltage VDD 3.0 3.3 3.6 V Input High Voltage V IH0.8IOVCC - IOVCC V Input Low Voltage V IL-0.3 - 0.2IOVCC V Output High Voltage V OH0.8IOVCC - - V Output Low Voltage V OL- - 0.2IOVCC V Current Consumption IDD 4 10 - mA 8.Blacklight：Name Min Type Max Unit Current -40 50 mA Voltage -19.2 21 VPowerConsumption-768 - mWluminance 1000 1200 - CD/M2 (Note1)Luminanceuniformity75% 80% - (Note2) X ColorCoordinates0.27 0.28 0.31 -Y ColorCoordinates0.27 0.28 0.31 - Note1：This luminance is tested with assembling the LCD.Note2：Definition of Luminance Uniformity.—————————————————————————————————7—————————————————————————————————89. Optical SpecificationNameSymbol Min Type Max Unit Transmittance rate T(%) - 4.6 - % Contrast ratio C/R 250 350 - - Response timeTr+Tf- 45 - msViewing AngleθU50 60 - degree （C/R>10）θD 60 70 - θL 60 70 - θR6070-*Viewing angle descriptin：—————————————————————————————————9*Contrast rate description(CR) :Tested in the center of the LCM panel*Response time description : Sum of TR and TF—————————————————————————————————1010．Reliability testing ：*One single product test for only one item. * Judgment after test: keep in room temperature for more than 2 hours. - Current consumption < 2 times of initial value - Contrast > 1/2 initial value - Function: work normallyItemNo Name Condition Remark 1 High temperature Operating 70°C , 168Hours Finish product (With polarizer) 2 Low temperature Operating -20°C , 168 Hours Finish product (With polarizer) 3 High temperature Storage80°C , 168 Hours Finish product (With polarizer) 4 Low temperature Storage-30°C , 168 Hours Finish product (With polarizer) 5High temperature & humidity Storage60°C , 90%RH, 168 HoursFinish product (With polarizer) 6 Thermal Shock Storage(Nooperation) -20°C , 30min.<=> 70°C , 30min.10 CyclesFinish product (With polarizer) 7 ESD testVoltage:+8KV R:330 ohm,C:150pF Air discharge,10 times Finish product (With polarizer) 8 Vibration test10 => 55 =>10 => 55 => 10 Hz, within 1 minute;Amplitude:1.5mm.15 minutes for each Direction( X,Y,Z )Finish product (With polarizer) 9 Drop testPacked, 100CM free fall 6 sides, 1 corner, 3edgesFinish product (With polarizer)—————————————————————————————————1111．Inspection Standard11.1 Defect Defination11.2 StandardNo. D efect ClassDefinationContent1重缺陷（MA ）影响显示的功能缺陷短路、断路、缺划、大电流、视角错、漏液、显示不清等严重外观缺陷产品尺寸不符、漏部品等 2 轻缺陷（MI ）不影响产品功能，但对产品外观有影响反黑／反白点、偏光片缺陷、针孔、污点No. Item Inspection StandardClassification of defects1 显示状态不显、显示乱码、多划、少划、少画面、视角错、闪烁等均不允许重缺陷无法用文字描述的现象，必要时制定限度样板进行参考。

NCP1422MNR2G,NCP1422MNR2G,NCP1422MNR2,NCP1422MNR2,NCP1422EVB,NCP1422LEDGEVB, 规格书,Datasheet 资料

NCP1422800 mA Sync−Rect PFMStep−Up DC−DC Converter with True−Cutoff andRing−KillerNCP1422 is a monolithic micropower high−frequency step−up switching converter IC specially designed for battery−operated hand−held electronic products up to 800 mA loading. It integrates Sync−Rect to improve efficiency and to eliminate the external Schottky Diode. High switching frequency (up to 1.2 MHz) allows for a low profile, small−sized inductor and output capacitor to be used. When the device is disabled, the internal conduction path from LX or BA T to OUT is fully blocked and the OUT pin is isolated from the battery. This True−Cutoff function reduces the shutdown currentto typically only 50 nA. Ring−Killer is also integrated to eliminate the high−frequency ringing in discontinuous conduction mode. In addition to the above, Low−Battery Detector, Logic−Controlled Shutdown, Cycle−by−Cycle Current Limit and Thermal Shutdown provide value−added features for various battery−operated applications. With all these functions on, the quiescent supply current is typically only 8.5 m A. This device is available in the compact and low profile DFN−10 package.Features•Pb−Free Package is Available*•High Efficiency:94% for 3.3 V Output at 200 mA from 2.5 V Input88% for 3.3 V Output at 500 mA from 2.5 V Input •High Switching Frequency, up to 1.2 MHz (not hitting current limit)•Output Current up to 800 mA at V IN = 2.5 V and V OUT = 3.3 V •True−Cutoff Function Reduces Device Shutdown Current to typically 50 nA•Anti−Ringing Ring−Killer for Discontinuous Conduction Mode •High Accuracy Reference Output, 1.20 V $1.5% @ 25°C, can Supply 2.5 mA Loading Current when V OUT > 3.3 V•Low Quiescent Current of 8.5 m A•Integrated Low−Battery Detector•Open Drain Low−Battery Detector Output•1.0 V Startup at No Load Guaranteed•Output V oltage from 1.5 V to 5.0 V Adjustable•1.5 A Cycle−by−Cycle Current Limit•Multi−Function Logic−Controlled Shutdown Pin•On Chip Thermal Shutdown with HysteresisTypical Applications•Personal Digital Assistants (PDA)•Handheld Digital Audio Products•Camcorders and Digital Still Cameras•Hand−held Instruments•Conversion from one to two Alkaline, NiMH, NiCd Battery Cells to 3.0−5.0 V or one Lithium−ion cells to 5.0 V•White LED Flash for Digital CamerasDevice Package Shipping†ORDERING INFORMATIONNCP1422MNR2DFN−103000 T ape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our T ape and Reel Packaging Specifications Brochure, BRD8011/D.*For additional information on our Pb−Free strategy and soldering details, please download theON Semiconductor Soldering and MountingT echniques Reference Manual, SOLDERRM/D. NCP1422MNR2G DFN−10(Pb−Free)3000 T ape & ReelFigure 1. Detailed Block DiagramPIN FUNCTION DESCRIPTIONSPin Symbol Description1FB Output Voltage Feedback Input.2LBI/EN Low−Battery Detector Input and IC Enable. With this pin pulled down below 0.5 V, the device is disabled and enters the shutdown mode.3LBO Open−Drain Low−Battery Detector Output. Output is LOW when V LBI is < 1.20 V. LBO is high impedance in shutdown mode.4NC No Connect Pin5REF 1.20 V Reference Voltage Output, bypass with 300 nF capacitor. If this pin is loaded, bypass with 1.0 m F capacitor; this pin can be loaded up to 2.5 mA @ V OUT = 3.3 V.6BAT Battery input connection for internal ring−killer.7GND Ground.8LX N−Channel and P−Channel Power MOSFET drain connection.9NC No Connect Pin10OUT Power Output. OUT also provides bootstrap power to the device.MAXIMUM RATINGS (T A = 25°C unless otherwise noted.)Rating Symbol Value Unit Power Supply (Pin 10)V OUT−0.3, 5.5V Input/Output Pins (Pin 1−3, Pin 5−8)V IO−0.3, 5.5V Thermal CharacteristicsDFN−10 Plastic PackageThermal Resistance Junction−to−Air (Note 5)P DR JA182468.5mW_C/WOperating Junction T emperature Range T J−40 to +150_C Operating Ambient T emperature Range T A−40 to +85_C Storage T emperature Range T stg−55 to +150_C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.1.This device contains ESD protection and exceeds the following tests:Human Body Model (HBM) ±2.0 kV per JEDEC standard: JESD22−A114. *Except OUT pin, which is 1k V.Machine Model (MM) ±200 V per JEDEC standard: JESD22−A115. *Except OUT pin, which is 100 V.2.The maximum package power dissipation limit must not be exceeded.P D+T J(max)*T AR q JAtchup Current Maximum Rating: ±150 mA per JEDEC standard: JESD78.4.Moisture Sensitivity Level: MSL 1 per IPC/JEDEC standard: J−STD−020A.5.Measured on approximately 1x1 inch sq. of 1 oz. Copper.ELECTRICAL CHARACTERISTICS (V OUT = 3.3 V, T A = 25°C for typical value, −40°C v T A v 85°C for min/max values unless otherwise noted.)Characteristic Symbol Min Typ Max Unit Operating Voltage V IN 1.0− 5.0V Output Voltage Range V OUT 1.5− 5.0VV REF_NL 1.183 1.200 1.217V Reference Voltage(V OUT= 3.3 V, I LOAD = 0m A, C REF= 200 nF, T A = 25°C)V REF_NL 1.174− 1.220V Reference Voltage(V OUT= 3.3 V, I LOAD = 0m A, C REF= 200 nF, T A = −40°C to 85°C)Reference Voltage T emperature Coefficient TC VREF−0.03−mV/°C Reference Voltage Load CurrentI REF− 2.5−mA(V OUT= 3.3 V, V REF = V REF_NL"1.5% C REF= 1.0 m F) (Note 6)V REF_LOAD−0.05 1.0mV Reference Voltage Load Regulation(V OUT= 3.3 V, I LOAD= 0 to 100 m A, C REF= 1.0 m F)Reference Voltage Line RegulationV REF_LINE−0.05 1.0mV/V (V OUT from 1.5 V to 5.0 V, C REF= 1.0 m F)FB Input Threshold (I LOAD= 0 mA, T A = 25°C)V FB 1.192 1.200 1.208V FB Input Threshold (I LOAD= 0 mA, T A = −40°C to 85°C)V FB 1.184− 1.210V LBI Input Threshold (I LOAD= 0 mA, T A = 25_C)V LBI 1.182 1.200 1.218V LBI Input Threshold (I LOAD= 0 mA, T A= −40_C to 85_C)V LBI 1.162 1.230V Internal N−FET ON−Resistance R DS(ON)_N−0.3−Internal P−FET ON−Resistance R DS(ON)_P−0.3−LX Switch Current Limit (N−FET) (Note 8)I LIM− 1.5−AI QBAT− 1.3 3.0m A Operating Current into BAT(V BAT= 1.8 V, V FB= 1.8 V, V LX= 1.8 V, V OUT= 3.3 V)Operating Current into OUT (V FB= 1.4 V, V OUT= 3.3 V)I Q−8.514m A LX Switch MAX. ON−Time (V FB = 1.0 V, V OUT= 3.3 V, T A = 25_C)t ON0.460.72 1.15m s LX Switch MIN. OFF−Time (V FB = 1.0 V, V OUT= 3.3 V, T A = 25_C)t OFF−0.120.22m s FB Input Current I FB− 1.050nAI BAT_SD−50−nA True−Cutof f Current into BAT(LBI/EN = GND, V OUT= 0 V, V IN= 3.3 V, LX = 3.3 V)BAT−to−LX Resistance (V FB= 1.4 V, V OUT= 3.3 V) (Note 8)R BAT_LX−100−LBI/EN Input Current I LBI− 1.550nA LBO Low Output Voltage (V LBI= 0 V, I SINK = 1.0 mA)V LBO_L−−0.2V Soft−Start Time (V IN= 2.5 V, V OUT= 5.0 V, C REF= 200 nF) (Note 7)T SS− 1.520ms EN Pin Shutdown Threshold (T A = 25°C)V SHDN0.350.50.67V Thermal Shutdown T emperature (Note 8)T SHDN−−145°C Thermal Shutdown Hysteresis (Note 8)T SDHYS−30−°C6.Loading capability increases with V OUT.7.Design guarantee, value depends on voltage at V OUT.8.Values are design guaranteed.AMBIENT TEMPERATURE, T A /°CS W I T C H O N R E S I S T A N C E , R D S (O N )/W20406080100AMBIENT TEMPERATURE, T A /°CR E F E R E N C E V O L T A G E , V R E F /V0.50.60.70.80.91.0−40−20020406080100OUTPUT LOADING CURRENT , I LOAD /mAM I N I M U M S T A R T U P B A T T E R Y V O L T A G E , V B A T T /VFigure 3. Reference Voltage vs. Voltage at OUT PinFigure 4. Reference Voltage vs. TemperatureFigure 5. Switch ON Resistance vs. TemperatureFigure 6. L X Switch Max. ON Time vs. TemperatureFigure 7. Minimum Startup Battery Voltage vs.Loading CurrentAMBIENT TEMPERATURE, T A /°C L X S W I T C H M A X I M U M , O N T I M E , t O N /m SR E F E R E N C E V O L T A G E , V R E F /V1.1801.1901.2101.220VOLTAGE AT OUT PIN, V OUT /VR E F E R E N C E V O L T A G E , V R E F /V1.20010Figure 9. Output Voltage Change vs. Load CurrenFigure 11. Low Battery DetectFigure 12. No Load Operating Current vs. InputVoltage at OUT PinO U T P U T V O L T A G E C H A N G E /%−551011001000OUTPUT LOADING CURRENT , I LOAD /mAO U T P U T V O L T A G E C H A N G E /%R I P P L E V O L T A G E , V R I P P L E /m V p −pUpper Trace: Input Voltage Waveform, 1.0 V/Division Lower Trace: Output Voltage Waveform, 2.0 V/DivisionFigure 13. Startup Transient Response1.52.02.53.03.55.0INPUT VOLTAGE AT OUT PIN, V OUT /VN O L O A D O P E R A T I N G C U R R E N T , I B A T T /m A4.04.5Upper Trace: Voltage at LBI Pin, 1.0 V/Division Lower Trace: Voltage at LBO Pin, 1.0 V/DivisionV IN = 2.5 V V OUT = 5.0 V I LOAD = 10 mA10(V IN = 2.5 V, V OUT = 3.3 V, I LOAD = 50 mA; L = 5.6 m H)Upper Trace: Output Voltage Ripple, 20 mV/Division Lower Trace: Voltage at Lx pin, 1.0 V/Division Figure 14. Discontinuous Conduction ModeSwitching Waveform (V IN = 2.5 V, V OUT = 3.3 V, I LOAD = 500 mA; L = 5.6 m H)Upper Trace: Output Voltage Ripple, 20 mV/Division Lower Trace: Voltage at LX pin, 1.0 V/DivisionFigure 15. Continuous Conduction ModeSwitching WaveformFigure 16. Line Transient Response for V OUT = 3.3 V Figure 17. Line Transient Response For V OUT = 5.0 V(V IN = 1.5 V to 2.5 V; L = 5.6 m H, C OUT = 22m F, I LOAD = 100 mA)Upper Trace: Output Voltage Ripple, 100 mV/Division Lower Trace: Battery Voltage, V IN, 1.0 V/Division (V IN = 1.5 V to 2.5 V; L = 5.6 m H, C OUT = 22m F, I LOAD = 100 mA)Upper Trace: Output Voltage Ripple, 100 mV/Division Lower Trace: Battery Voltage, V IN, 1.0 V/DivisionFigure 18. Load Transient Response For V IN = 2.5 V Figure 19. Load Transient Response For V IN = 3.0 V(V OUT = 5.0 V, I LOAD = 100 mA to 800 mA; L = 5.6 m H, C OUT = 22 m F)Upper Trace: Output Voltage Ripple, 500 mV/Division Lower Trace: Load Current, I LOAD , 500 mA/Division(V OUT = 3.3 V, I LOAD = 100 mA to 800 mA; L = 5.6 m H, C OUT = 22 m F)Upper Trace: Output Voltage Ripple, 200 mV/Division Lower Trace: Load Current, I LOAD, 500 mA/DivisionOUTPUT LOADING CURRENT , I OUT /mAE F F I C I E N C Y /%OUTPUT LOADING CURRENT , I OUT /mAE F F I C I E N C Y /%Figure 20. Efficiency vs. Load CurrentFigure 21. Efficiency vs. Load CurrentFigure 22. Efficiency vs. Load CurrentOUTPUT LOADING CURRENT , I OUT /mA E F F I C I E N C Y /%DETAILED OPERATION DESCRIPTIONNCP1422 is a monolithic micropower high−frequency step−up voltage switching converter IC specially designed for battery operated hand−held electronic products up to 800 mA loading. It integrates a Synchronous Rectifier to improve efficiency as well as to eliminate the external Schottky diode. High switching frequency (up to 1.2 MHz)allows for a low profile inductor and output capacitor to be used. Low−Battery Detector, Logic−Controlled Shutdown,and Cycle−by−Cycle Current Limit provide value−added features for various battery−operated applications. With all these functions ON, the quiescent supply current is typically only 8.5 m A. This device is available in a compact DFN−10 package.PFM Regulation SchemeFrom the simplified functional diagram (Figure 1), the output voltage is divided down and fed back to pin 1 (FB).This voltage goes to the non−inverting input of the PFM comparator whereas the comparator’s inverting input is connected to the internal voltage reference, REF. A switching cycle is initiated by the falling edge of the comparator, at the moment the main switch (M1) is turned ON. After the maximum ON−time (typically 0.72 m S)elapses or the current limit is reached, M1 is turned OFF and the synchronous switch (M2) is turned ON. The M1OFF time is not less than the minimum OFF−time (typically 0.12 m S), which ensures complete energytransfer from the inductor to the output capacitor. If the regulator is operating in Continuous Conduction Mode (CCM), M2 is turned OFF just before M1 is supposed to be ON again. If the regulator is operating in Discontinuous Conduction Mode (DCM), which means the coil current will decrease to zero before the new cycle starts, M1 is turned OFF as the coil current is almost reaching zero. The comparator (ZLC) with fixed offset is dedicated to sense the voltage drop across M2 as it is conducting; when the voltage drop is below the offset, the ZLC comparator output goes HIGH and M2 is turned OFF. Negative feedback of closed−loop operation regulates voltage at pin1 (FB) equal to the internal reference voltage (1.20 V). Synchronous RectificationThe Synchronous Rectifier is used to replace the Schottky Diode to reduce the conduction loss contributed by the forward voltage of the Schottky Diode. The Synchronous Rectifier is normally realized by powerFET with gate control circuitry that incorporates relatively complicated timing concerns.As the main switch (M1) is being turned OFF and the synchronous switch M2 is just turned ON with M1 not being completely turned OFF, current is shunt from the output bulk capacitor through M2 and M1 to ground. This power loss lowers overall efficiency and possibly damages the switching FETs. As a general practice, a certain amount of dead time is introduced to make sure M1 is completely turned OFF before M2 is turned ON.The previously mentioned situation occurs when the regulator is operating in CCM, M2 is turned OFF, M1 is just turned ON, and M2 is not completely turned OFF. A dead time is also needed to make sure M2 is completely turned OFF before M1 is turned ON.As coil current is dropped to zero when the regulator is operating in DCM, M2 should be OFF. If this does not occur, the reverse current flows from the output bulk capacitor through M2 and the inductor to the battery input, causing damage to the battery. The ZLC comparator comes with fixed offset voltage to switch M2 OFF before any reverse current builds up. However, if M2 is switched OFF too early, large residue coil current flows through the body diode of M2 and increases conduction loss. Therefore, determination of the offset voltage is essential for optimum performance. With the implementation of the synchronous rectification scheme, efficiency can be as high as 94% with this device.Cycle−by−Cycle Current LimitIn Figure 1, a SENSEFET is used to sample the coil current as M1 is ON. With that sample current flowing through a sense resistor, a sense−voltage is developed. The threshold detector (I LIM) detects whether the sense−voltage is higher than the preset level. If the sense voltage is higher than the present level, the detector output notifies the Control Logic to switch OFF M1, and M1 can only be switched ON when the next cycle starts after the minimum OFF−time (typically 0.12 m S). With proper sizing of the SENSEFET and sense resistor, the peak coil current limit is typically set at 1.5 A.Voltage ReferenceThe voltage at REF is typically set at 1.20 V and can output up to 2.5 mA with load regulation ±2% at V OUT equal to 3.3 V. If V OUT is increased, the REF load capability can also be increased. A bypass capacitor of 200 nF is required for proper operation when REF is not loaded. If REF is loaded, a 1.0 m F capacitor at the REF pin is needed.True−CutoffThe NCP1422 has a True−Cutoff function controlled by the multi−function pin LBI/EN (pin 2). Internal circuitry can isolate the current through the body diode of switch M2 to load. Thus, it can eliminate leakage current from the battery to load in shutdown mode and significantly reduce battery current consumption during shutdown. The shutdown function is controlled by the voltage at pin 2 (LBI/EN). When pin 2 is pulled to lower than 0.3 V, the controller enters shutdown mode. In shutdown mode, when switches M1 and M2 are both switched OFF, the internal reference voltage of the controller is disabled and the controller typically consumes only 50 nA of current. If the pin 2 voltage is raised to higher than 0.5 V (for example, by a resistor connected to V IN), the IC is enabled again, and the internal circuit typically consumes 8.5 m A of current from the OUT pin during normal operation.Low−Battery DetectionA comparator with 30 mV hysteresis is applied to perform the low−battery detection function. When pin 2 (LBI/EN) is at a voltage (defined by a resistor divider from the battery voltage) lower than the internal reference voltage of 1.20 V, the comparator output turns on a 50 W low side switch. It pulls down the voltage at pin 3 (LBO) which has hundreds of k W of pull−high resistance. If the pin 2 voltage is higher than 1.20 V + 30 mV, the comparator output turns off the 50 W low side switch. When this occurs, pin 3 becomes high impedance and its voltage is pulled high again.APPLICATIONS INFORMATIONOutput Voltage SettingA typical application circuit is shown in Figure 23. The output voltage of the converter is determined by the external feedback network comprised of R1 and R2. The relationship is given by:V OUT+1.20Vǒ1)R1R2Ǔwhere R1and R2 are the upper and lower feedback resistors, respectively.Low Battery Detect Level SettingThe Low Battery Detect V oltage of the converter is determined by the external divider network that is comprised of R3 and R4. The relationship is given by:V LB+1.20Vǒ1)R3Ǔwhere R3and R4 are the upper and lower divider resistors respectively.Inductor SelectionThe NCP1422 is tested to produce optimum performance with a 5.6 m H inductor at V IN = 2.5 V and V OUT = 3.3 V, supplying an output current up to 800 mA. For other input/output requirements, inductance in the range 3 m H to 10m H can be used according to end application specifications. Selecting an inductor is a compromise between output current capability, inductor saturation limit, and tolerable output voltage ripple. Low inductance values can supply higher output current but also increase the ripple at output and reduce efficiency. On the other hand, high inductance values can improve output ripple and efficiency; however, it is also limited to the output current capability at the same time.Another parameter of the inductor is its DC resistance. This resistance can introduce unwanted power loss and reduce overall efficiency. The basic rule is to select an inductor with the lowest DC resistance within the board space limitation of the end application. In order to help with the inductor selection, reference charts are shown in Figures 24 and 25.Capacitors SelectionIn all switching mode boost converter applications, both the input and output terminals see impulsive voltage/current waveforms. The currents flowing into and out of the capacitors multiply with the Equivalent Series Resistance (ESR) of the capacitor to produce ripple voltage at the terminals. During the Syn−Rect switch−off cycle, the charges stored in the output capacitor are used to sustain the output load current. Load current at this period and the ESR combine and reflect as ripple at the output terminals. For all cases, the lower the capacitor ESR, the lower the ripple voltage at output. As a general guideline, low ESR capacitors should be used. Ceramic capacitors have the lowest ESR, but low ESR tantalum capacitors can also be used as an alternative.PCB Layout RecommendationsGood PCB layout plays an important role in switching mode power conversion. Careful PCB layout can help to minimize ground bounce, EMI noise, and unwanted feedback that can affect the performance of the converter. Hints suggested below can be used as a guideline in most situations.GroundingA star−ground connection should be used to connect the output power return ground, the input power return ground, and the device power ground together at one point. All high−current paths must be as short as possible and thick enough to allow current to flow through and produce insignificant voltage drop along the path. The feedback signal path must be separated from the main current path and sense directly at the anode of the output capacitor. Components PlacementPower components (i.e., input capacitor, inductor and output capacitor) must be placed as close together as possible. All connecting traces must be short, direct, and thick. High current flowing and switching paths must be kept away from the feedback (FB, pin 1) terminal to avoid unwanted injection of noise into the feedback path. Feedback NetworkFeedback of the output voltage must be a separate trace detached from the power path. The external feedback network must be placed very close to the feedback (FB, pin 1) pin and sense the output voltage directly at the anode of the output capacitor.TYPICAL APPLICATION CIRCUITShutdown Open DrainInput Low Battery Open DrainOutputV OUT = 3.3 V800 mA Figure 23. Typical Application Schematic for 2 Alkaline Cells Supply*OptionalGENERAL DESIGN PROCEDURESSwitching mode converter design is considered a complicated process. Selecting the right inductor and capacitor values can allow the converter to provide optimum performance. The following is a simple method based on the basic first−order equations to estimate the inductor and capacitor values for NCP1422 to operate in Continuous Conduction Mode (CCM). The set component values can be used as a starting point to fine tune the application circuit performance. Detailed bench testing is still necessary to get the best performance out of the circuit. Design Parameters:V IN = 1.8 V to 3.0 V, Typical 2.4 VV OUT = 3.3 VI OUT = 500 mAV LB = 2.0 VV OUT−RIPPLE= 40 mV p−p at I OUT = 500 mA Calculate the feedback network:Select R2 = 200 kR1+R2ǒV OUTV REF*1ǓR1+200kǒ3.3V1.20V*1Ǔ+350kCalculate the Low Battery Detect divider:V LB = 2.0 VSelect R4 = 330 kR3+R4ǒV LBV REF*1ǓR3+300kǒ2.0V1.20V *1Ǔ+220kDetermine the Steady State Duty Ratio, D, for typicalV IN. The operation is optimized around this point:V OUTV IN+11*DD+1*V INV OUT+1*2.4V3.3V+0.273Determine the average inductor current, I LA VG, atmaximum I OUT:I LAVG+I OUT1*D+500mA1*0.273+688mADetermine the peak inductor ripple current, I RIPPLE−P,and calculate the inductor value:Assume I RIPPLE−P is 20% of I LA VG. The inductance of thepower inductor can be calculated as follows:L+V IN t ON2I RIPPLE*P+2.4V0.75m S2(137.6mA)+6.5m HA standard value of 6.5 m H is selected for initial trial.Determine the output voltage ripple, V OUT−RIPPLE,andcalculate the output capacitor value:V OUT−RIPPLE= 40 mV P−P at I OUT = 500 mAC OUT uI OUT t ONV OUT*RIPPLE*I OUT ESR COUTwhere t ON = 0.75 m S and ESR COUT = 0.05 ,C OUT u500mA0.75m S45mV*500mA0.05W+18.75m FFrom the previous calculations, you need at least 18.75m F in order to achieve the specified ripple level at the conditions stated. Practically, a capacitor that is one level larger is used to accommodate factors not taken into account in the calculations. Therefore, a capacitor value of 22 m F is selected. The NCP1422 is internally compensated for most applications, but in case additional compensationis required, the capacitor C4 can be used as external compensation adjustment to improve system dynamics.In order to provide an easy way for customers to select external parts for NCP1422 in different input voltage and output current conditions, values of inductance and capacitance are suggested in Figures 24, 25 and 26.024681012Figure 24. Suggested Inductance of VOUT = 3.3 V Figure 25. Suggested Inductance of V OUT = 5.0 VFigure 26. Suggested Capacitance for Output CapacitorINPUT VOLTAGE (V)I N D U C T O R V A L U E (m H )INPUT VOLTAGE (V)OUTPUT CURRENT (mA)C A P A C I T O R V A L U E (m F )4035302520151050100200300400500600700800253350100CAPACITOR ESR (m W )Table 1. Suggestions for Passive ComponentsOutput CurrentInductorsCapacitors 800 mA Sumida CR43, CR54,CDRH6D28 seriesPanasonic ECJ series Kemet TL494 series 250 mASumida CR32 seriesPanasonic ECJ series Kemet TL494 seriesPACKAGE DIMENSIONSDFN10, 3 x 3mm, 0.5mm PitchCASE 485C−01ISSUE ADIMENSIONS: MILLIMETERS*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting T echniques Reference Manual, SOLDERRM/D.SENSEFET is a trademark of Semiconductor Components Industries, LLC.ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION。

3535 N302B7 产品规格书说明书

产品规格书 Product Specification文件编号 Document number WE-WI-RD-962 版本版次Version editionA/0产品名称 Product name 3535内封ICN302B7产品规格Product specificationWE-3535AY0203Z-001文件编制 Documentation 马明海批准发行Approved issue马小其客户服务 Custormer Service 联系电话 Contact number客户名称 Customer name 样品编号 Sample number产品验证 Product verification批准承认 Recognition approval注： 1.此规格书以中英文方式书写，若有冲突以中文版文本为准。

/This specification is written in both Chinese and English. In case of conflict, the Chinese version shall prevail.2.此规格书的最终解释权归由本公司。

/The final interpretation of this specification shall be vested in the company.目录Catalog0.0、封面/co ver ..........................................................................第1页page 10.1、目录/Catalog ......................................................................... 第2页page 21、产品概述/Product Overview ..............................................................第3页page 32、功能特点/Functional characteristics.....................................................第3页page 33、应用领域/Application area ..............................................................第3页page 34、外观描述 /Appearance description ......................................................第4页page 45、封装尺寸/Size .........................................................................第4页page 46、脚位图/Foot map .........................................................................第5页page 5第5页page 5 7、最大额定值/MaximumRating ............................................................第6页page 6 8、推荐工作范围/Recommended scope ofwork .................................................9、电气参数/Electrical parameters..........................................................第6页page 610、开关特性/Switching第7页page 7 characteristics.....................................................11、内置LED参数/Built-in LED parameters..................................................第7页page 712、功能说明/Description of functions......................................................第7页page 713、恒流曲线/Constant-current第10页page 10 curve........................................................14、应用线路图/Application Route Diagram..................................................第10页page 1015、使用注意事项/Precautions ............................................................第11页page 111、产品概述/Product Overview：N302B7-3535RGB是一款集成高质量单线级联恒流驱动IC N302B7和高质量RGB LED芯片的外控恒流3535集成灯珠。

飞利浦宽屏幕平板电视 37PFL7422 说明书

行扫描。它符合 EICTA 的限制标准，所提供的 HD 屏幕展现了高清晰度信号在解析度和画质方面的优势。它还可以连接模拟
YPbPr 以及 DVI 或 HDMI 无压缩数字连接，支持 HDCP。它可以显示 50 和 60Hz 的 720p 和 1080i 信号。
动态对比度增强器您是否希望液晶显示屏可以呈现最高的对比度和最明艳的图像，即使从侧面斜看也毫不失色？飞利浦动态对比度增强器采用视频处理和独一无二的背光调变技术，改善黑电平，提高对比度，让细节更加丰富。背光调变技术使对比度增强达 5 倍 * 之巨，同时还拓宽了观看角度。它将以对比分明，鲜艳亮丽的颜色为您展现幸福欢乐的生活画面，（* 取决于屏幕类型和图片内容，增强度在 2 倍到 5 倍之间）。
VHF • 调谐器显示 : PLL
连接
• AV 1: 音频 L/R 输入 , YPbPr • AV 2: 音频 L/R 输入 , YPbPr • AV 3: 音频 L/R 输入 , CVBS 输入 , S-video 输入 • AV 4: HDMI
• AV 5: HDMI • 前接 / 侧接 : 音频 L/R 输入 , CVBS 输入 , 耳机输
超宽环绕声 ™ 超宽环绕声是飞利浦的音响技术，可显著放大声场，使您沉浸在音响世界。超宽环绕声采用先进的电子相移技术，混合来自左右两侧的声音，从而扩展两个扬声器之
2 路 HDMI 输入 HDMI 可建立从信号源到屏幕的无压缩数字 RGB 连接。由于不需要转换为任何模拟信号，因此它可提供完美的图像。鉴于其信号质量并未降低，其画面也将更加清晰、闪烁更少。HDMI 智能地与信号源设备互通最高的输出分辨率。HDMI 输入与 DVI 信号源完全向后兼容，而不仅限于数字音频。 HDMI 使用 HDCP 复制保护。使用 2 HDMI 输入，可连接多个 HD 源（例如 HD 机顶盒和 Blu-ray 播放机。为您的电视充分做好迎接 HD 未来的准备。

LM3743MMX-1000资料

LM3743N-Channel FET Synchronous Buck Controller for Low Output VoltagesGeneral DescriptionThe LM3743is a voltage mode PWM buck controller which implements synchronous rectification.It provides a low cost,fault tolerant,and efficient point of load solution.To reduce component count several parameters are fixed,such as switching frequency and the short circuit protection level.For example the LM3743has an operating switching frequency of 300kHz or 1MHz and a fixed 500mV high side current limit for switch node short-circuit protection.LM3743is a very fault tolerant IC with switch node short-circuit,output undervoltage protection,and the ability to self recover after the removal of the fault.It avoids the need to over design components due to thermal runaway during a fault condition,thus resulting in a lower cost solution.It employs a propri-etary monotonic glitch free pre-bias start-up method suited for FPGAs and ASIC logic devices.A 0.8V internal reference with ±1.75%accuracy is ideal for sub-volt conversion.An external programmable soft-start allows for tracking and tim-ing flexibility.The driver features 1.6Ωof pull-up resistance and 1Ωof pull-down drive resistance for high power density and very efficient power processing.Featuresn Input voltage from 3.0V to 5.5Vn Output voltage adjustable down to 0.8Vn Reference accuracy:±1.75%,over full temperature and input voltage rangen Low-side sensing programmable current limitn Fixed high-side sensing for supplemental short-circuit protectionn Undervoltage protectionn Hiccup mode protection eliminates thermal runaway during fault conditionsn Externally programmable soft-start with tracking capabilityn Switching frequency options of 1MHz or 300kHz n Pre-bias start-up capability n MSOP-10packageApplicationsn ASIC/FPGA/DSP core power n Broadband Communications n Multi-media Set Top Boxes n Networking Equipment n Printers/Scanners n ServersnLow Voltage Distributed PowerTypical Application20177401September 2006LM3743N-Channel FET Synchronous Buck Controller for Low Output Voltages©2006National Semiconductor Corporation Connection Diagram2017740210-Lead Plastic MSOP NS Package Number MUB10ATop ViewOrdering InformationOrder Number Frequency OptionTop Mark NSC Package DrawingSupplied AsLM3743MM-300300kHz SKPB MUB10A 1000units in Tape and Reel LM3743MMX-300300kHz SKPB MUB10A 3500units in Tape and Reel LM3743MM-10001MHz SKNB MUB10A 1000units in Tape and Reel LM3743MMX-10001MHzSKNBMUB10A3500units in Tape and ReelPin DescriptionsVCC (Pin 1)Supply rail for the controller section of the IC.A minimum capacitance of 1µF,preferably a multi-layer ce-ramic capacitor type (MLCC),must be connected as close as possible to the V CC and GND pin and a 1to 4.99Ωresistance must be connected in series from the supply rail to the Vcc pin.See VCC FILTERING in the Design Consid-eration section for further details.LGATE (Pin 2)Gate drive for the low-side N-channel MOS-FET.This signal is interlocked with HGATE to avoid a shoot-through problem.GND (Pin 3)Power ground (PGND)and signal ground (SGND).Connect the bottom feedback resistor between this pin and the feedback pin.ILIM (Pin 4)Low side current limit threshold setting pin.This pin sources a fixed 50µA current.A resistor of appropriate value should be connected between this pin and the drain of the low-side N-FET.FB (Pin 5)Feedback pin.This is the inverting input of the error amplifier used for sensing the output voltage and com-pensating the control loop.COMP/EN (Pin 6)Output of the error amplifier and enable pin.The voltage level on this pin is compared with an inter-nally generated ramp signal to determine the duty cycle.This pin is necessary for compensating the control loop.Forcing this pin to ground will shut down the IC.SS/TRACK (Pin 7)Soft-start and tracking pin.This pin is connected to the non-inverting input of the error amplifier during initial soft-start,or any time the voltage is below the reference.To track the rising ramp of another power supply’s output,connect a resistor divider from the output of that supply to this pin as described in Application Information.SW (Pin 8)Switch pin.The lower rail of the high-side N-FET driver.Also used for the high side current limit sensing.HGATE (Pin 9)Gate drive for the high-side N-channel MOS-FET.This signal is interlocked with LGATE to avoid a shoot-through problem.BOOT (Pin 10)Supply rail for the N-channel MOSFET high gate drive.The voltage should be at least one gate threshold above the regulator input voltage to properly turn on the high-side N-FET.See MOSFET Gate Drivers in the Applica-tion Information section for more details on how to select MOSFETs.L M 3743 2Absolute Maximum Ratings(Note1)If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.V CC-0.3V to6V SW to GND-0.3V to6V Boot to GND-0.3V to12V Boot to SW-0.3V to6V SS/TRACK,ILIM,COMP/EN,FB to GND-0.3V to V CC Junction Temperature150˚C Storage Temperature−65˚C to150˚CSoldering InformationLead Temperature(soldering,10sec)260˚C Infrared or Convection(20sec)235˚C ESD Rating(Note3)+/–2kVOperating RatingsSupply Voltage Range,V CC(Note2) 3.0V to5.5V Junction Temperature Range(T J)−40˚C to+125˚CElectrical Characteristics VCC=3.3V,COMP/EN floating unless otherwise indicated in the conditions col-umn.Limits in standard type are for T J=25˚C only;limits in boldface type apply over the junction temperature(T J)range of-40˚C to+125˚C.Minimum and Maximum limits are guaranteed through test,design,or statistical correlation.Typical values represent the most likely parametric norm at T J=25˚C,and are provided for reference purposes only.Symbol Parameter Conditions Min Typ Max Units SYSTEM PARAMETERSV FB FB pin voltage in regulation 3.0V≤V CC≤5.5V0.7860.80.814VV UVLO UVLO thresholds Input voltage rising 2.84 3.0VInput voltage falling 2.45 2.66I VCC Operating V CC current f SW=300kHz,LM3743-300 1.5 2.5mAOperating V CC current f SW=1MHz,LM3743-1000 1.8 3.0mAShutdown V CC current COMP/EN=0V650µA I SS/TRACK SS/TRACK pin source current V SS/TRACK=0V810.212.5µAI ILIM ILIM pin source current V ILIM=0V42.55057.5µAV ILIM Current Limit Trip Level–25025mV I COMP/EN COMP/EN pin pull-up current V COMP/EN=0V4µA V HS-CLIM High-side current limit threshold Measured at V CC pin with respect toSW500mV ERROR AMPLIFERGBW Error Amplifier Unity Gain Bandwidth30MHzG Error Amplifier DC Gain90dBSR Error Amplifier Slew Rate6V/msI FB FB pin Bias Current10200nAI EAO EAO pin sourcing/sinking currentcapability V COMP/EN=1.5,V FB=0.75V 1.7mA V COMP/EN=1.5,V FB=0.85V-1GATE DRIVEI SHDN-BOOT BOOT Pin Shutdown Current V BOOT-V SW=3.3V,V COMP/EN=0V2550µAR HG-UP High Side MOSFET Driver Pull-up ON resistance V BOOT-V SW=3.3V,I HGATE=350mA(sourcing)1.6ΩR HG-DN High Side MOSFET Driver Pull-down ON resistance V BOOT-V SW=3.3V,I HGATE=350mA(sinking)1ΩR LG-UP Low Side MOSFET Driver Pull-up ON resistance V CC=3.3V,I LGATE=350mA(sourcing)1.6ΩR LG-DN Low Side MOSFET Driver Pull-down ONresistanceV CC=3.3V,I LGATE=350mA(sinking)1ΩOSCILLATORf SW Oscillator Frequency 3.0V≤V CC≤5.5V,LM3743-300255300345kHz3.0V≤V CC≤5.5V,LM3743-100085010001150D MAX Max Duty Cycle f SW=300kHz,LM3743-3008591%f SW=1MHz,LM3743-10006976LM37433Electrical Characteristics V CC =3.3V,COMP/EN floating unless otherwise indicated in the conditionscolumn.Limits in standard type are for T J =25˚C only;limits in boldface type apply over the junction temperature (T J )range of -40˚C to +125˚C.Minimum and Maximum limits are guaranteed through test,design,or statistical correlation.Typical values represent the most likely parametric norm at T J =25˚C,and are provided for reference purposes only.(Continued)Symbol ParameterConditionsMinTyp MaxUnits V RAMPPWM Ramp Amplitude1.0V LOGIC INPUTS AND OUTPUTSV COMP/EN-HI COMP/EN pin logic high trip-point 0.650.9V V COMP/EN-LO COMP/EN pin logic low trip-point 0.10.45V HICCUP MODEN LSCYCLES Low-side sensing cycles before hiccupmode 15Cycles N LSRESET Low-side sensing cycles reset withoutactivating current limit 32Cycles V UVPUnder Voltage Protection comparator threshold400mV t GLICH-UVP Under Voltage Protection fault time beforehiccup mode 7µs t HICCUPHiccup timeout5.5ms t SS Soft-start time coming out of hiccup mode 3.6ms THERMAL RESISTANCEθJAJunction to Ambient Thermal Resistance235˚C/WNote 1:Absolute maximum ratings indicate limits beyond which damage to the device may occur.Operating ratings indicate conditions for which the device operates correctly.Operating Ratings do not imply guaranteed performance limits.Note 2:Practical lower limit of V CC depends on selection of the external MOSFET.See the MOSFET GATE DRIVERS section under Application Information for further details.Note 3:ESD using the human body model which is a 100pF capacitor discharged through a 1.5k Ωresistor into each pin.Test method is per JESD22–A114.L M 3743 4LM3743 Block Diagram5Typical Performance CharacteristicsV IN =3.3,T J =25˚C,I LOAD =1A unless otherwise specified.D Max vs Temperaturef SW =1MHZD Max vs Temperaturef SW =300kHz2017745520177456FB vs Temperaturef SW =1MHZ FB vs Temperature f SW =300kHz2017745720177458Frequency vs Temperaturef SW =1MHz Frequency vs Temperaturef SW =300kHz20177459201774A2L M 3743 6Typical Performance Characteristics VIN=3.3,T J=25˚C,I LOAD=1A unless otherwise specified.(Continued)Frequency vs V CCf SW=1MHzFrequency vs V CCf SW=300kHz2017746120177462I SHDN_BOOT vs Temperaturef SW=1MHzI SHDN_BOOT vs Temperaturef SW=300kHz2017746320177464I LIM vs Temperaturef SW=1MHzI LIM vs Temperaturef SW=300kHz2017746520177466LM3743 7Typical Performance Characteristics V IN =3.3,T J =25˚C,I LOAD =1A unless otherwisespecified.(Continued)I VCC vs Temperaturef SW =1MHzI VCC vs Temperaturef SW =300kHz2017746720177468Line RegulationV OUT=1.2V,I OUT =1A,f SW =300kHzLine RegulationV OUT=1.5V,I OUT =1A,f SW =1MHz2017746920177470Load Regulation V IN =3.3V,f SW =1MHzLoad RegulationV IN=3.3V,f SW =300kHz2017747120177472L M 3743 8Typical Performance Characteristics VIN=3.3,T J=25˚C,I LOAD=1A unless otherwise specified.(Continued)Efficiency vs Loadf SW=1MHz,V OUT=2.5VEfficiency vs Loadf SW=1MHz,V OUT=1.8V 2017748920177488Efficiency vs Loadf SW=1MHz,V OUT=1.5VEfficiency vs Loadf SW=1MHz,V OUT=1.2V 2017748720177474Efficiency vs Loadf SW=1MHz,V OUT=1.0VEfficiency vs Loadf SW=1MHz,V OUT=0.8V2017747320177490LM3743 9Typical Performance Characteristics V IN =3.3,T J =25˚C,I LOAD =1A unless otherwisespecified.(Continued)Efficiency vs Load f SW =300kHz,V OUT =2.5VEfficiency vs Load f SW=300kHz,V OUT =1.8V2017749520177494Efficiency vs Load f SW=300kHz,V OUT =1.5VEfficiency vs Load f SW=300kHz,V OUT =1.2V2017749320177492Efficiency vs Load f SW=300kHz,V OUT =1.0VEfficiency vs Load f SW=300kHz,V OUT =0.8V2017749120177496L M 3743 10Typical Performance Characteristics V IN =3.3,T J =25˚C,I LOAD =1A unless otherwisespecified.(Continued)Load Transient Responsef SW =1MHz,V IN =3.3V,I LOAD =100mA to 3.5A(Refer to AN-1450for BOM)Load Transient Responsef SW=300kHz,V IN =3.3V,I LOAD =100mA to 3.5A(Refer to AN-1450for BOM)2017749720177498ShutdownR LOAD =1Ω,V IN =5VPre Bias Startup20177499201774A0LM374311Application InformationTHEORY OF OPERATIONThe LM3743is a voltage mode PWM buck controller featur-ing synchronous rectification at 300kHz or 1MHz.In steady state operation the LM3743is always synchronous even at no load,thus simplifying the compensation design.The LM3743ensures a smooth and controlled start-up to support pre-biased outputs.Two levels of current limit protection enhance the robustness of the power supply and requires no current sense resistor in the power path.The primary level of protection is the low side current limit and is achieved by sensing the voltage V DS across the low side MOSFET.The second level of protection is the high side current limit,which protects power components from extremely high currents,caused by switch node short to ground.NORMAL OPERATIONWhile in normal operation,the LM3743IC controls the output voltage by controlling the duty cycle of the power FETs.The DC level of the output voltage is determined by a pair of feedback resistors using the following equation:(Designators refer to the Typical Application Circuit in the front page)For synchronous buck regulators,the duty ratio D is approxi-mately equal to:START UPThe LM3743IC begins to operate when the COMP/EN pin is released from a clamped condition and the voltage at the V CC pin has exceeded 2.84V.Once these two conditions have been met the internal 10µA current source begins to charge the soft-start capacitor connected at the SS/TRACK pin.During soft-start the voltage on the soft-start capacitor is connected internally to the non-inverting input of the error amplifier.The soft-start period lasts until the voltage on the soft-start capacitor exceeds the LM3743reference voltage of 0.8V.At this point the reference voltage takes over at the non-inverting error amplifier input.The capacitance deter-mines the length of the soft-start period,and can be approxi-mated by:C4=(t SS x 10µA)/0.8VWhere t SS is the desired soft-start time.In the event of either V CC falling below UVLO or COMP/EN pin being pulled below 0.45V,the soft-start pin will discharge C4to allow the output voltage to recover smoothly.START UP WITH PRE-BIASA pre-bias output is a condition in which current from another source has charged up the output capacitor of the switching regulator before it has been turned on.The LM3743features a proprietary glitch free monotonic pre-bias start-up method designed to ramp the output voltage from a pre-biased rail to the target nominal output voltage.The IC limits the on time of the low-side FET to 150ns (typ)during soft-start,whileallowing the high-side FET to adjust it’s time according to soft-start voltage,V OUT ,and the internal voltage ramp.Any further commutation of the load current is carried by the body diode of the low-side FET or an external Schottky diode,if used.The low side current limit is active during soft-start while allowing the asynchronous switching.When soft-start is completed,the on-time of the low-side FET is allowed to increase in a controlled fashion up to the steady state duty cycle determined by the control loop.A plot of the LM3743starting up into a pre-biased condition is shown in the Typical Performance Characteristics section.Note that the pre-bias voltage must not be greater than the target output voltage of the LM3743,otherwise the LM3743will pull the pre-bias supply down during steady state opera-tion.TRACKING WITH EQUAL SOFT-START TIMEThe LM3743can track the output of a master power supply during soft-start by connecting a resistor divider to the SS/TRACK pin.In this way,the output voltage slew rate of the LM3743will be controlled by the master supply for loads that require precise sequencing.When the tracking function is used,no soft-start capacitor should be connected to the SS/TRACK pin.However in all other cases,a capacitor value (C4)of at least 560pF should be connected between the soft-start pin and ground.One way to use the tracking feature is to design the tracking resistor divider so that the master supply’s output voltage (V OUT1)and the LM3743’s output voltage (represented sym-bolically in Figure 1as V OUT2,i.e.without explicitly showing the power components)both rise together and reach their target values at the same time.For this case,the equation governing the values of the tracking divider resistors R T1and R T2is:The top resistance R T2must be set to 1k Ωin order to limit current into the LM3743during UVLO or shutdown.The final voltage of the SS/TRACK pin should be slightly higher than the feedback voltage of 0.8V,say about 0.85V as in the above equation.The 50mV difference will ensure the LM3743to reach regulation slightly before the master sup-ply.If the master supply voltage was 5V and the LM374320177430FIGURE 1.Tracking CircuitL M 374312Application Information(Continued)output voltage was 1.8V,for example,then the value of R T1needed to give the two supplies identical soft-start times would be 205Ω.A timing diagram for the equal soft-start time case is shown in Figure 2.TRACKING WITH EQUAL SLEW RATESThe tracking feature can alternatively be used not to make both rails reach regulation at the same time but rather to have similar rise rates (in terms of output dV/dt).In this case,the tracking resistors can be determined based on the fol-lowing equation:For the example case of V OUT1=5V and V OUT2=1.8V,with R T2set to 1k Ωas before,R T1is calculated from the above equation to be 887Ω.A timing diagram for the case of equal slew rates is shown in Figure 3.TRACKING AND SHUTDOWN SEQUENCINGLM3743is designed to track the output of a master power supply during start-up,but when the master supply powers down the output capacitor of the LM3743will discharge cycle by cycle through the low-side FET.The off-time will reach100%when the voltage at the track pin reaches zero volts.This condition will persist as long as the master output voltage is zero volts and the drivers of the LM3743are still on.For example if the load is required to not be discharged,the drivers must be shut-off before the master powers down.This is achieved by shutting down the LM3743or bring V CC below UVLO falling threshold.In this case the load will not be discharged.SHUTDOWNThe LM3743IC can be put into shutdown mode by bringing the voltage at the COMP/EN pin below 0.45V (typ).The quiescent current during shutdown is approximately 6µA (typ).During shutdown both the high-side and low-side FETs are disabled.The soft-start capacitor is discharged through an internal FET so that the output voltage rises in a con-trolled fashion when the part is enabled again.When en-abled a 4µA pull-up current increases the charge of the compensation capacitors.UNDER VOLTAGE LOCK-OUT (UVLO)If V CC drops below 2.66V (typ),the chip enters UVLO mode.UVLO consists of turning off the top and bottom FETs and remaining in that condition until V CC rises above 2.84V (typ).As with shutdown,the soft-start capacitor is discharged through an internal FET,ensuring that the next start-up will be controlled by the soft-start circuitry.MOSFET GATE DRIVEThe LM3743has two gate drivers designed for driving N-channel MOSFETs in synchronous mode.Power for the high gate driver is supplied through the BOOT pin,while driving power for the low gate is provided through the V CC pin.The BOOT voltage is supplied from a local charge pump structure which consists of a Schottky diode and 0.1µF capacitor,shown in Figure 4.Since the bootstrap capacitor (C10)is connected to the SW node,the peak voltage im-pressed on the BOOT pin is the sum of the input voltage (V IN )plus the voltage across the bootstrap capacitor (ignor-ing any forward drop across the bootstrap diode).The boot-strap capacitor is charged up by V IN (called V BOOT_DC here)whenever the upper MOSFET turns off.20177431FIGURE 2.Tracking with Equal Soft-Start Time 20177433FIGURE 3.Tracking with Equal Slew Rate20177434FIGURE 4.Charge Pump Circuit and Driver CircuitryLM374313Application Information(Continued)The output of the low-side driver swings between V CC and ground,whereas the output of the high-side driver swings between V IN +V BOOT_DC and V IN .To keep the high-side MOSFET fully on,the Gate pin voltage of the MOSFET must be higher than its instantaneous Source pin voltage by an amount equal to the ’Miller plateau’.It can be shown that this plateau is equal to the threshold voltage of the chosen MOSFET plus a small amount equal to I OUT /g.Here I OUT is the maximum load current of the application,and g is the transconductance of this MOSFET (typically about 100for logic-level devices).That means we must choose V BOOT_DC to at least exceed the Miller plateau level.This may therefore affect the choice of the threshold voltage of the external MOSFETs,and that in turn may depend on the chosen V IN rail.So far in the discussion above,the forward drop across the bootstrap diode has been ignored.But since that does affect the output of the driver,it is a good idea to include this drop in the following examples.Looking at the Typical Application schematic,this means that the difference voltage V IN -V D1,which is the voltage the bootstrap capacitor charges up to,must always be greater than the maximum tolerance limit of the threshold voltage of the upper MOSFET.Here V D1is the forward voltage drop across the bootstrap diode D1.This voltage drop may place restrictions on the type of MOSFET selected.The capacitor C10serves to maintain enough voltage be-tween the top MOSFET gate and source to control the device even when the top MOSFET is on and its source has risen up to the input voltage level.The charge pump circuitry is fed from V IN ,which can operate over a range from 3.0V to ing this basic method the voltage applied to the high side gate V IN -V D1.This method works well when V IN is 5V ±10%,because the gate drives will get at least 4.0V of drive voltage during the worst case of V IN-MIN =4.5V and V D1-MAX =0.5V.Logic level MOSFETs generally specify their on-resistance at V GS =4.5V.When V CC =3.3V ±10%,the gate drive at worst case could go as low as 2.5V.Logic level MOSFETs are not guaranteed to turn on,or may have much higher on-resistance at 2.5V.Sub-logic level MOSFETs,usu-ally specified at V GS =2.5V,will work,but are more expen-sive and tend to have higher on-resistance.LOW-SIDE CURRENT LIMITThe main current limit of the LM3743is realized by sensing the voltage drop across the low-side FET as the load current passes through it.The R DSON of the MOSFET is a known value;hence the voltage across the MOSFET can be deter-mined as:V DS =I OUT x R DSONThe current flowing through the low-side MOSFET while it is on is the falling portion of the inductor current.The current limit threshold is determined by an external resistor,R1,connected between the switching node and the ILIM pin.A constant current (I ILIM )of 50µA typical is forced through R1,causing a fixed voltage drop.This fixed voltage is compared against V DS and if the latter is higher,the current limit of the chip has been reached.To obtain a more accurate value for R1you must consider the operating values of R DSON and I ILIM at their operating temperatures in your application and the effect of slight parameter variations from part to part.R1can be found by using the following equation using theR DSON value of the low side MOSFET at it’s expected hot temperature and the absolute minimum value expected over the full temperature range for the I ILIM which is 42.5µA:R1=R DSON-HOT x I CLIM /I ILIMFor example,a conservative 15A current limit (I CLIM )in a 10A design with a R DSON-HOT of 10m Ωwould require a 3.83k Ωresistor.The LM3743enters current limit mode if the inductor current exceeds the set current limit threshold.The inductor current is first sampled 50ns after the low-side MOSFET turns on.Note that in normal operation mode the high-side MOSFET always turns on at the beginning of a clock cycle.In current limit mode,by contrast,the high-side MOSFET on-pulse is skipped.This causes inductor current to fall.Unlike a normal operation switching cycle,however,in a current limit mode switching cycle the high-side MOSFET will turn on as soon as inductor current has fallen to the current limit threshold.The low-side current sensing scheme can only limit the current during the converter off-time,when inductor current is falling.Therefore in a typical current limit plot the valleys are normally well defined,but the peaks are variable,ac-cording to the duty cycle,see Figure 5.The PWM error amplifier and comparator control the pulse of the high-side MOSFET,even during current limit mode,meaning that peak inductor current can exceed the current limit threshold.For example,during an output short-circuit to ground,and as-suming that the output inductor does not saturate,the maxi-mum peak inductor current during current limit mode can be calculated with the following equation:Where T SW is the inverse of switching frequency f SW .The 200ns term represents the minimum off-time of the duty cycle,which ensures enough time for correct operation of the current sensing circuitry.In order to minimize the temperature effects of the peak inductor currents,the IC enters hiccup mode after 15over current events,or a long current limit event that lasts 15switching cycles (the counter is reset when 32non-current20177444FIGURE 5.Current Limit ThresholdL M 374314Application Information(Continued)limit cycles occur in between two current limit events).Hic-cup mode will be discussed in further detail in the“Hiccup Mode and Internal Soft-Start”section.HIGH-SIDE COARSE CURRENT LIMITThe LM3743employs a comparator to monitor the voltage across the high-side MOSFET when it is on.This provides protection for short circuits from switch node to ground or the case when the inductor is shorted,which the low side current limit cannot detect.A200ns blanking time period after the high-side FET turns on is used to prevent switching transient voltages from tripping the high-side current limit without cause.If the difference between V CC pin and SW pin voltage exceeds500mV,the LM3743will immediately enter hiccup mode(see Hiccup Mode section).OUTPUT UNDER-VOLTAGE PROTECTION(UVP)After the end of soft-start the output UVP comparator is activated.The threshold is50%of the feedback voltage. Once the comparator indicates UVP for more than7µs typ. (glitch filter time),the IC goes into hiccup mode.HICCUP MODE AND INTERNAL SOFT-STARTHiccup protection mode is designed to protect the external components of the circuit(output inductor,FETs,and input voltage source)from thermal stress.During hiccup mode, the LM3743disables both the high-side and low-side FETs and begins a cool down period of5.5ms.At the conclusion of this cool down period,the regulator performs an internal 3.6ms soft-start.There are three distinct conditions under which the IC will enter the hiccup protection mode:1.The low-side current sensing threshold has exceededthe current limit threshold for fifteen sampled cycles,see Figure6.Each cycle is sampled at the start of each off time(t OFF).The low-side current limit counter is reset when32consecutive non-current limit cycles occur in between two current limit events.2.The high-side current limit comparator has sensed adifferential voltage larger than500mV.3.The voltage at the FB pin has fallen below0.4V,and theUVP comparator has sensed this condition for7µs (during steady state operation).The band gap reference,the external soft-start,and internal hiccup soft-start of3.6ms(typ)connect to the non-inverting input of the error amplifier through a multiplexer.The lowest voltage of the three connects directly to the non-inverting input.Hiccup mode will not discharge the external soft-start, only UVLO or shut-down will.When in hiccup mode the internal5.5ms timer is set,and the internal soft-start capaci-tor is discharged.After the5.5ms timeout,the internal3.6 ms soft-start begins,see Figure7.During soft-start,only low-side current limit and high side current limit can put the LM3743into hiccup mode.For example,if the low-side current limit is10A,then once inoverload the low-side current limit controls the valley currentand only allows an average amount of10A plus the ripplecurrent to pass through the inductor and FETs for15switch-ing cycles.In such an amount of time,the temperature rise isvery small.Once in hiccup mode,the average currentthrough the high-side FET is:I HSF-AVE=(I CLIM+∆I)x[D(15cycles x T SW)]/5.5msequals71mA.With an arbitrary D=60%,ripple current of3A,and a300kHz switching frequency.The average current through the low-side FET is:I LSF-AVE=(I CLIM+∆I)x[(1–D)x(15cycles x T SW)]/5.5msequals47mA,And the average current through the inductor is:I L-AVE=(I CLIM+∆I)x[(15cycles x T SW)]/5.5msequals118mA.DESIGN CONSIDERATIONSThe following is a design procedure for selecting all thecomponents in the Typical Application circuit on the frontpage.This design converts5V(V IN)to1.8V(V OUT)at amaximum load of10A with an efficiency of90%and aswitching frequency of300kHz.The same procedures can20177452FIGURE6.Entering Hiccup Mode20177406FIGURE7.Hiccup Time-Out and Internal Soft-StartLM374315。

SANYO Electric LC372100PP, PM, PT-10 20LV 数据手册

OverviewThe LC372100PP, LC372100PM and LC372100PT are 262,144-word ×8-bit organization (2,097,152-bit) mask programmable read only memories.The LC372100PP-10, LC372100PM-10 and LC372100PT-10 feature an access time of 100 ns, an OE access time of 40 ns, and a standby current of 30 µA, and are optimal for use in 5-V systems that require high-speed access.The LC372100PP-20LV, LC372100PM-20LV and LC372100PT-20LV feature an access time of 200 ns, an OE access time of 80 ns, and a standby current of 4 µA,and thus are optimal for use in 3-V systems that use batteries. Additionally, they provide high-speed access in 3.3-V systems (3.0 to 3.6 V) with a 150-ns access time and a 60-ns OE access time.These ROMs adopt the JEDEC standard pin assignment which allows them to replace EPROM easily. To prevent bus line collisions in multi-bus microcontroller systems,pin 24 can be mask programmed to be either active high or active low.Features•262144 words ×8 bits organization •Power supplyLC372100PP, PM, PT-10: 5.0 V ±10%LC372100PP, PM, PT-20LV: 2.7 to 3.6 V •Fast access time (t AA , t CA )LC372100PP, PM, PT-10:100 ns (max.)LC372100PP, PM, PT-20LV:200 ns (max.)150 nsPackage Dimensionsunit: mm 3192-DIP32unit: mm3205-SOP32unit: mm3224-TSOP32CMOS ICPreliminary SANYO Electric Co.,Ltd. Semiconductor Bussiness HeadquartersTOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPANOrdering number : EN *5088CSANYO: DIP32SANYO: TSOP32 (type-I)[LC372100PT]SANYO: SOP32[LC372100PM]查询LC372100PM供应商Pin AssignmentsBlock DiagramTruth TableParameterSymbol ConditionsRatings Unit Maximum supply voltage V CC max –0.3 to +7.0V Supply input voltage V IN –0.3*2to V CC + 0.3V Supply output voltage V OUT –0.3 to V CC + 0.3V Allowable power dissipation Pd max Ta = 25°C; Reference values for the SANYO DIP package1.0W Operating temperature Topr 0 to +70°C Storage temperatureTstg–55 to +125°CSpecificationsAbsolute Maximum Ratings *1Note: 1.Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation should be restricted to RecommendedOperating Conditions.2.V IN (min) = –3.0 V (pulse width ≤30 ns)OD This parameter is periodically sampled and not 100% tested.2.Guaranteed at V CC = 3.0 to 3.6 VNote:*This parameter is periodically sampled and not 100% tested.Note:*Guaranteed at Ta = 25°CInput/Output Capacitance *at Ta = 25°C, f = 1.0 MHz3 V OperationParameterSymbol ConditionsRatingsUnit min typ max Supply voltage V CC max 2.7 3.03.6V Input high level voltage V IH 0.8 V CCV CC + 0.3V Input low level voltageV IL–0.3+0.4VDC Recommended Operating Ranges at Ta = 0 to +70°CParameterSymbol ConditionsRatingsUnit mintypmaxOperating supply current I CCA1CE = 0.2 V (CE = V CC – 0.2 V), V I = V CC – 0.2 V/0.2 V 15mA I CCA2CE = V IL (CE = V IH ), I O = 0 mA, V I = V IH /V IL , f = 5 MHz 20mA Standby supply current I CCS1CE = V CC – 0.2 V (CE = 0.2 V) 5 (0.5*)µA I CCS2CE = V IH (CE = V IL )50 (10*)µA Input leakage current I LI V IN = 0 to V CC±1.0µA Output leakage current I LO CE or OE = V IH (CE or OE = V IL ), V OUT = 0 to V CC ±1.0µA Output high level voltage V OH I OH = –0.5 mA V CC – 0.2V Output low level voltageV OLI OL = 0.5 mA0.2VDC Electrical Characteristics at Ta = 0 to +70°C, V CC = 2.7 to 3.6 VAC Characteristics at Ta = 0 to +70°C, V CC = 2.7 to 3.6 V5 V OperationParameterSymbol ConditionsRatingsUnit min typ max Supply voltage V CC max 4.5 5.05.5V Input high level voltage V IH 2.2V CC + 0.3V Input low level voltageV IL–0.3+0.6VDC Recommended Operating Ranges at Ta = 0 to +70°CParameterSymbol ConditionsRatingsUnit mintypmaxOperating supply current I CCA1CE = 0.2 V (CE = V CC – 0.2 V), V I = V CC – 0.2 V/0.2 V 30mA I CCA2CE = V IL (CE = V IH ), I O = 0 mA, V I = V IH /V IL , f = 10 MHz 70mA Standby supply current I CCS1CE = V CC – 0.2 V (CE = 0.2 V)30 (1.0*)µA I CCS2CE = V IH (CE = V IL ) 1.0 (300*)mA (µA)Input leakage current I LIV IN = 0 to V CC±1.0µA Output leakage current I LO CE or OE = V IH (CE or OE = V IL ), V OUT = 0 to V CC ±1.0µA Output high level voltage V OH I OH = –1.0 mA 2.4V Output low level voltageVOLI OL = 2.0 mA0.4VDC Electrical Characteristics at Ta = 0 to +70°C, V CC = 5.0 V ±10%Note:*Guaranteed at Ta = 25°CAC Characteristics at Ta = 0 to +70°C, V CC = 5.0 V ±10%AC Test ConditionsOutput Load (5 V measurement)Note:*t OD is measured from the earlier edge of the CE (CE) or OE(OE)’s going high impedance.This parameter is periodically sampled and not 100% tested.This catalog provides information as of May, 1998. Specifications and information herein are subject to change without notice.s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss.s Anyone purchasing any products described or contained herein for an above-mentioned use shall:Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use:Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally.s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.Timing ChartSystem Design NotesThese LSIs adopt an internal synchronization technique in which operation is started by detecting changes in either the CE input or the address inputs. As a result, the output data immediately after power on is invalid. Once power has been applied, valid data is output after the application changes the value of either the CE input or at least one of the address inputs.Another point due to the use of the ATD technique is that these LSIs are extremely sensitive to input noise. Applications must take precautions to provide stable input signals, both for the CE input and the address inputs, to prevent incorrect operation.。

37寸广告机说明1

37寸落地式广告机
显示屏：37寸 TFT 液晶显示屏
显示比例：10：16
显示区域：983.0( 水平)×576.0垂直）mm
点距：0.4845（水平）×0.4845（垂直）mm
分辨率：1920(H)xRGBx1080(V)
水平频率：30－80KHZ
垂直频率：60/75HZ
颜色数：16.77M
灯管寿命：50000 小时
平均亮度：550cd/m2
对比度：1000:01 机器尺寸：1800x750x130mm
视角:80°/80°—85°/85°音响喇叭：立体声（10W+10W ）
色饱和度：64灰阶 Display Colors:16.2M
输入电压：AC 100-240V 1.5A 50/60HZ
电源管理：符合 VESA DPMS 标准
消耗功率：≤180W工作环境温度： -20 － 40 ℃
1、钢化玻璃面板（有机玻璃）黑色。

合金外壳。

2、支持MP
3、WMA、JPEG、MPEG1、MPEG2、MP3、MPEG4（DIVX或XVID）格式兼容VCD、SVCD等格式。

自动循环播放，可以定时插播广告。

3、CF卡SD卡U盘接口。

4、个性化的开关机功能：可以根据自己的实际需要设定多种定时自动开关机，包括节假日自动开关机，双休日自动开关机，每天不同时段的自动开关机。

5、遥控器控制参数调节，保密性好。

使用遥控器即可轻松方便的设置本机的OSD 电视屏幕菜单、解码设置菜单、广告机的控制菜单等所有功能菜单。

6、拥有防盗锁功能，防止机器或内存卡被盗，并且可以设置读卡密码。

37英寸液晶电视技术规格书

版本日期修改记录1.0 2011-09-05 中文版初始发布中视同创交互智能平板产品37寸技术规格书一、显示屏参数屏类型：TFT LCD分辨率：1920 x1080亮度：500 cd/㎡对比度：800：1色彩总数：16.7 M colors寿命：> 50000小时二、触摸书写系统触摸原理：两点触摸屏（两点以上）响应时间：11毫秒触摸有效识别：>5毫米坐标输出：4096×4096通信方式：全速USB ,无驱，无需校准三、PC系统主芯片：INTEL G41 E5800双核显卡：X4500集成显卡声卡：集成声卡网卡：集成10/100/1000M自适应内存：4G DDRIII硬盘：320G SATAWIFI：802.11 a/b/g操作系统：Windows 7USB（A口）： 4USB（B口）： 2网际接口RJ45： 1VGA输出： 1耳机： 1麦克风： 1四、电视系统彩色制式：PAL/SECAM频道数：199高频接口： 1A V（黄）： 2色差(4pin DIN) ：1YPBPR（绿蓝红）： 2VGA输入(15针D-Sub)： 1 高清多媒体接口（HDMI）： 1 同轴输出（橙）： 1耳机输出： 1声音输出功率：2*15W扬声器数： 4环绕声：有五、电源参数输入电源：100-240V AC 50/60HZ 整机功耗：﹤400W待机功耗：﹤1W六、随机附件AC电源线/说明书/遥控器/光盘七、工作环境工作温度：41°F - 95°F工作湿度：10% - 95%贮存温度：41°F - 95°F贮存湿度：10% - 95%八、外观图CTV5520中视同创科技致力于：视频设备的产品研发、生产、销售、服务等业务，产品涵盖：15寸～65寸液晶及等离子广告机（有单机版和网络版广告机，壁挂式、落地式、坚屏、横屏等或客户定制广告机）、19～80寸电脑电视一体机、液晶电子白板、多媒体教学一体机、触摸液晶电子白板、触摸液晶广告机等等！我们的专业液晶电子白板厂家的优势。

37英寸液晶电视对比评测

37 英寸液晶电视对比评测夏新LC-37HWTUP价格：13999 元清晰度：★★★★★色彩还原：★★★★☆运动画面：★★★★☆画面层次：★★★★★音响效果：★★★★★功能设置：★★★★☆基本参数分辨率1920 X 1080对比度5000：1亮度900nits响应时间4ms夏新以出色的工业设计崛起于国内电视业，在平板电视浪潮到来之际，他们抓住机会，及时地将彩电生产重心转移到了以液晶电视为主的平板电视领域，并且取得了不错的市场业绩。

LC-37HWTUP 属于夏新“ Hi-Fi 丽音”系列液晶电视，采用物理分辨率达到全高清1920X 1080的液晶电视专用屏，动态对比度高达5000：1 ，亮度也很惊人，达到了900nits，响应时间则为4ms,性能指标相当强劲。

不单是采用了高性能的液晶显示屏，夏新还在处理芯片、音响系统、功能应用方面下足了工夫，不但内置夏新专有的“双核芯”高清影像技术，还在夏新专利技术“低音锤高保真音响系统” 基础上，借鉴B&W 著名的鹦鹉螺音箱腔体设计，提升了电视音响系统的综合素质。

内置的数字调频收音机可预存20 个数字收音频道，支持“闭画听音”功能，节能又方便。

秉承夏新工业设计的强项，这款液晶电视外观给人一种朴实而不落俗套的现代感，线条过渡平缓，整体以黑色调为主，底边框和两侧辅侧面采用银色圆弧型边框。

与一般的显示产品追求窄边框的风格相反，它的边框相当宽大，这在视觉上给人造成了屏幕大于实际尺寸的错觉。

采用机身与底座分离的安装形式，整个机身通过4 个螺丝安装在椭圆形底座的厚钢板上，安装过程不算复杂，只是比起其他多数品牌出厂时就安装好的底座来说，还是显得有点繁琐。

整机安装好以后无法进行观赏角度的左右调节，只能整体移动电视机来转角度，略微有点不方便。

输入接口设置得相当齐全，具备两组Video 信号输入，一组Video 信号输出、一组电视射频信号输入，两组S-Video 输入、两组DVD 分量输入、一个耳机插孔、一组D-Sub 15 针输入、RS-232软件升级接口，HDMI数字输入（支持HDCP 解码保护功能）、光纤数字音频输出。