第二讲 表面微机械加工技术应用
- 1、下载文档前请自行甄别文档内容的完整性,平台不提供额外的编辑、内容补充、找答案等附加服务。
- 2、"仅部分预览"的文档,不可在线预览部分如存在完整性等问题,可反馈申请退款(可完整预览的文档不适用该条件!)。
- 3、如文档侵犯您的权益,请联系客服反馈,我们会尽快为您处理(人工客服工作时间:9:00-18:30)。
牺牲层技术
刻蚀与选择性
etch:To cut into the surface of (glass, for example) by the action of acid.
Etching:The art of preparing etched plates, especially metal plates, from which designs and pictures are printed. Corrode:To destroy a metal or alloy gradually, especially by oxidation or chemical action
其实刻蚀还包含分解、转化、溶解等一系列含义。
半导体技术的刻蚀并不仅仅局限于金属材料,半导体、化合物、包括有机物薄膜才是刻蚀研究的重点。
Etching还有一个特征:选择性或者局部队有控制刻蚀。
干法刻蚀也是半导体技术赋予Etching的新内涵。
选择性源于化学反应的热力学选择性和刻蚀过程度动力学因素控制。
下面这张表格概括了一些简单物质与常用反应物之间相互作用的规律,其中既有热力学因素控制的结果,也有动力学因素促成。它们都是湿法反应机制度结果
MUMPS工艺概况
The MUMPS process is a three-layer polysilicon surface micromachining process derived from work performed at the Berkeley Sensors and Actuators Center (BSAC) at the University of California.Several modifications and enhancements have been made to increase the flexibility and versatility of the process for the multi-user environment. The process flow described below is designed to introduce inexperienced users to polysilicon micromachining. The text is supplemented by detailed drawings that show the process flow in the context of building a typical micromotor.
工艺流程详解
衬底:100 mm n-type (100) silicon wafers of 1-2 ohm-cm resistivity.
低阻硅片
1. The surface of the wafers are first heavily doped with phosphorus in a standard diffusion furnace using POCl3 as the dopant source.
This helps to reduce or prevent charge feed through to the substrate from electrostatic devices on the surface.
2. 600 nm low-stress LPCVD(low pressure chemical vapor deposition) silicon nitride layer is deposited on the wafers as an electrical isolation layer.
3. deposition of a 500 nm LPCVD polysilicon film-Poly 0.
4. the coating of the wafers with photoresist
5. Exposure of the photoresist with the appropriate mask
6. Developing the exposed photoresist to create the desired etch mask for subsequent pattern
7. Transfer into the underlying layer -The Poly 0 layer is then etched in an RIE system
只刻蚀多晶硅而不刻蚀硅,需要细致选择刻蚀剂和刻蚀工艺8. After etch, the photoresist is chemically stripped in a solvent bath.
9. A 2.0 µm phosphosilicate glass (PSG) sacrificial layer is then deposited by LPCVD
10. coating of the wafers with photoresist
11 Exposure of the photoresist with the DIMPLES mask
12. Developing the exposed photoresist to create the desired etch mask for subsequent pattern
13. the 1st oxide layer is then etched in an RIE system to form dimples
14. After etch, the photoresist is chemically stripped in a solvent bath.
The depth of the dimples is 750 nm
上述五步重复了前一次的过程,是表面微机械加工最典型的工艺循环
15.-19 The wafers are then patterned with the third mask layer, ANCHOR1, and reactive ion etched. This step provides anchor holes that will be filled by the Poly 1 layer.