计算机专业外文翻译---AT89S52外文资料翻译
单片机温度控制系统毕业论文中英文资料外文翻译文献
单片机温度控制系统中英文资料外文翻译文献英文原文DescriptionThe at89s52 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash Programmable and Erasable Read Only Memory (PEROM) and 128 bytes RAM. The device is manufactured using Atmel’s h igh density nonvolatile memory technology and is compatible with the industry standard MCS-51™ instruction set and pinout. The chip combines a versatile 8-bit CPU with Flash on a monolithic chip, the Atmelat89s52 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications.Features:• Compatible with MCS-51™ Products• 4K Bytes of In-System Reprogrammable Flash Memory• Endurance: 1,000 Write/Erase Cycles• Fully Static Operation: 0 Hz to 24 MHz• Three-Level Program Memory Lock• 128 x 8-Bit Internal RAM• 32 Programmable I/O Lines• Two 16-Bit Timer/Counters• Six Interrupt Sources• Programmable Serial Channel• Low Power Idle and Power Down ModesThe at89s52 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vectortwo-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the at89s52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power Down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.Pin Description:VCC Supply voltage.GND Ground.Port 0Port 0 is an 8-bit open drain bidirectional I/O port. As an output port each pin can sink eight TTL inputs. When is are written to port 0 pins, the pins can be used as high impedance inputs.Port 0 may also be configured to be the multiplexed loworderaddress/data bus during accesses to external program and data memory. In this mode P0 has internal pullups.Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pullups are required during program verification.Port 1Port 1 is an 8-bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2Port 2 is an 8-bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this application it uses strong internalpull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8-bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.Port 3 also serves the functions of various special features of theat89s52 as listed below:Port 3 also receives some control signals for Flash programming andverification.RSTReset input. A high on this pin for two machine cycles while theoscillator is running resets the device.ALE/PROGAddress Latch Enable output pulse for latching the low byte of theaddress during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.In normal operation ALE is emitted at a constant rate of 1/6 theoscillator frequency, and may be used for external timing or clockingpurposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory.If desired, ALE operation can be disabled by setting bit 0 of SFRlocation 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable is the read strobe to external program memory. When the at89s52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSENactivations are skipped during each access to external data memory.EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. Port pinalternate functions P3.0rxd (serial input port) P3.1txd (serial output port) P3.2^int0 (external interrupt0) P3.3^int1 (external interrupt1) P3.4t0 (timer0 external input) P3.5t1 (timer1 external input) P3.6^WR (external data memory write strobe) P3.7 ^rd (external data memory read strobe)EA should be strapped to VCC for internal program executions.This pin also receives the 12-volt programming enable voltage(VPP) during Flash programming, for parts that require 12-volt VPP.XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2Output from the inverting oscillator amplifier.Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.Idle ModeIn idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset.It should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.Status of External Pins During Idle and Power Down Modesmode Program memory ALE ^psen Port0 Port1Port2Port3idle internal 1 1 data data data Data Idle External 1 1 float Data data Data Power down Internal 0 0 Data Data Data Data Power down External 0 0 float data Data data Power Down ModeIn the power down mode the oscillator is stopped, and the instructionthat invokes power down is the last instruction executed. The on-chip RAMand Special Function Registers retain their values until the power down modeis terminated. The only exit from power down is a hardware reset. Resetredefines the SFRs but does not change the on-chip RAM. The reset shouldnot be activated before VCC is restored to its normal operating level andmust be held active long enough to allow the oscillator to restart andstabilize.Program Memory Lock BitsOn the chip are three lock bits which can be left unprogrammed (U) orcan be programmed (P) to obtain the additional features listed in the tablebelow:Lock Bit Protection ModesWhen lock bit 1 is programmed, the logic level at the EA pin issampled and latched during reset. If the device is powered up without a reset,the latch initializes to a random value, and holds that value until reset isactivated. It is necessary that the latched value of EA be in agreement with the current logic level at that pin in order for the device to function properly. Programming the Flash：The at89s52 is normally shipped with the on-chip Flash memory array in the erased state (that is, contents = FFH) and ready to be programmed.The programming interface accepts either a high-voltage (12-volt) or alow-voltage (VCC) program enable signal.The low voltage programming mode provides a convenient way to program the at89s52 inside the user’s system, while the high-voltage programming mode is compatible with conventional third party Flash or EPROM programmers.The at89s52 is shipped with either the high-voltage or low-voltage programming mode enabled. The respective top-side marking and device signature codes are listed in the following table.Vpp=12v Vpp=5vTop-side mark at89s52xxxxyywwat89s52xxxx-5yywwsignature (030H)=1EH(031H)=51H(032H)=FFH (030H)=1EH (031H)=51H (032H)=05HThe at89s52 code memory array is programmed byte-bybyte in either programming mode. To program any nonblank byte in the on-chip Flash Programmable and Erasable Read Only Memory, the entire memory must be erased using the Chip Erase Mode.Programming Algorithm:Before programming the at89s52, the address, data and control signals should be set up according to the Flash programming mode table and Figures 3 and 4. To program the at89s52, take the following steps.1. Input the desired memory location on the address lines.2. Input the appropriate data byte on the data lines.3. Activate the correct combination of control signals.4. Raise EA/VPP to 12V for the high-voltage programming mode.5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write cycle is self-timed and typically takes no more than 1.5 ms. Repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object file is reached.Data Polling: The at89s52 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written datum on PO.7. Once the write cycle has been completed, true data are valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated.Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY.Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled.Chip Erase: T he entire Flash Programmable and Erasable Read Only Memory array is erased electrically by using the proper combination of control signals and by holding ALE/PROG low for 10 ms. The code array is written with all “1”s. The chip erase operation must be executed before the code memory can be re-programmed.Reading the Signature Bytes: The signature bytes are read by the same procedure as a normal verification of locations 030H, 031H, and 032H, except that P3.6 and P3.7 must be pulled to a logic low. The values returned are as follows.(030H) = 1EH indicates manufactured by Atmel(031H) = 51H indicates 89C51(032H) = FFH indicates 12V programming(032H) = 05H indicates 5V programmingProgramming InterfaceEvery code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation cycle is selftimed and once initiated, will automatically time itself to completion.中文翻译描述at89s52是美国ATMEL公司生产的低电压，高性能CMOS8位单片机，片内含4Kbytes的快速可擦写的只读程序存储器（PEROM）和128 bytes 的随机存取数据存储器（RAM），器件采用ATMEL公司的高密度、非易失性存储技术生产，兼容标准MCS-51产品指令系统，片内置通用8位中央处理器（CPU）和flish存储单元，功能强大at89s52单片机可为您提供许多高性价比的应用场合，可灵活应用于各种控制领域。
at89c52单片机简介中英文对照外文翻译文献
at89c52单片机简介中英文对照外文翻译文献中英文资料对照外文翻译A T89C52 Single-chip microprocessor introductionSelection of Single-chip microprocessor1. Development of Single-chip microprocessorThe main component part of Single-chip microprocessor as a result of by such centralize to be living to obtain on the chip，In immediate future middle processor CPU。
Storage RAM immediately﹑memoy read ROM﹑Interrupt system、Timer /'s counter along with I/O's rim electric circuit awaits the main microcomputer section，The lumping is living on the chip。
Although the Single-chip microprocessor r is only a chip，Yet through makes up and the meritorous service be able to on sees，It had haveed the calculating machine system property，calling it for this reason act as Single-chip microprocessor r minisize calculating machine SCMS and abbreviate the Single-chip microprocessor。
计算机专业外文文献及翻译
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外文资料翻译 --AT89S52单片机简介
外文文献及翻译A brief introduction of AT89S522.Pin Description2.1 VCC: Supply voltage.2.2 GND: Ground.2.3 Port 0: Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs. Port 0 can also be configured to be the multiplexed low-order address/data bus during accesses to external program and data memory. In this mode, P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pull-ups are required during program verification.2.4 Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pulled-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in the following table.Port 1 also receives the low-order address bytes during Flash programming andoutput buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (I IL) Because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOBX@DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX@RI),Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.2.6 Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port3 pins that are externally being pulled low will source current (IIL) because of the pull-ups. Port 3 receives some control signals for Flash programming and verification. Port 3 also serves the functions of various special features of the AT89S52, as shownrunning resets the device. This pin drives high for 98 oscillator periods after the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled.2.8 ALE/PROG: Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the programpulse input (PROG) during Flash programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external data memory. If desired, ALE operation can be disabled by setting bit 0 or SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.2.9 PSEN: Program Store Enable (PSEN) is the read strobe to external program memory. When the AT89S52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.2.10 EA/VPP: External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will beinternally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming.2.11 XTAL1: Input to the inverting oscillator amplifier and input to the internal clock operating circuit.2.12 XTAL2: Output from the inverting oscillator amplifier.3.Memory OrganizationMCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes each of external Program and Data Memory can be addressed.3.1 Program MemoryIf the EA pin is connected to GND, all program fetches are directed to external memory. On the AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through 1FFFH are directed to internal memory and fetches to addresses 2000H through FFFFH are to external memory.3.2 Data MemoryThe AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers. This means that the upper 128 bytes have the same addresses as the SFR space but are physically separate from SFR space. When an instruction accesses an internal location above address 7FH, the address mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of RAM or the SFR space. Instructions which use direct addressing access the SFR space. For example, the following direct addressing instruction accesses the SFR at location 0A0H (which is P2).MOV 0A0H, #dataInstructions that use indirect addressing access the upper 128 bytes of RAM. For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H).MOV @R0, #dataNote that stack operations are examples of indirect addressing, so the upper 128 bytes of data RAM are available as stack space.4.Watchdog Timer (One-time Enabled with Reset-out)The WDT is intended as a recovery method in situations where the CPU may be subjected to software upsets. The WDT consists of a 14-bit counter and the Watchdog Timer Reset (WDTRST) SFR. The WDT is defaulted to disable from exiting reset. To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H). When the WDT is enabled, it will increment every machine cycle while the oscillator is running. The WDT timeout period is dependent on the external clock frequency. There is no way to disable the WDT except though reset (either hardware reset or WDT overflow reset). When WDT overflows, it will drive an output RESET HIGH pulse at the RST pin.5.UARTThe UART in the AT89S52 operates the same way as the UART in the AT89C51and AT89C52. For further information on the UART operation, please click on the document link below:/dyn/resources/prod_documents/DOC4316.PDF6.Timer 0 and 1Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and Timer 1 in the AT89C51 and AT89C52. For further information on the timers’operation, please click on the document link below:/dyn/resources/prod_documents/DOC4316.PDF7.Timer 2Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type of operation is selected by bit C/T2in the SFR T2CON. Timer 2 has three operating modes: capture, auto-reload (up or down counting), and baud rate generator. The modes are selected by bits in T2CON, as shown in Table 6-1. Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency.transition at its corresponding external input pin, T2. In this function, the external input is sampled during S5P2 of every machine cycle. When the samples show a high in one cycle and a low in the next cycle, the count is incremented. The new count value appears in the register during S3P1 of the cycle following the one in which the transition was detected. Since two machine cycles (24 oscillator periods) are required to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure that a given level is sampled at least once before it changes, the level should be held for at least one full machine cycle.7.1 Capture ModeIn the capture mode, two options are selected by bit EXEN2 in T2CON. If EXEN2=0, Timer 2 is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON. This bit can then be used to generate an interrupt. If EXEN2=1, Timer 2 performs the same operation, but a 1-to-0 transition at external input T2EX also causes the current value in TH2 and TL2 to be captured into RCAP2H and RCAP2L, respectively. In addition, the transition at T2EX causes bit EXF2 in T2CON to be set. The EXF2 bit, like TF2, can generate an interrupt.7.2 Auto-reload (Up or Down Counter)Timer 2 can be programmed to count up or down when configured in its 16-bit auto-reload mode. This feature is invoked by the DCEN (Down Counter Enable) bitlocated in the SFR T2MOD. Upon reset, the DCEN bit is set to 0 so that timer 2 will default to count up. When DCEN is set, Timer 2 can count up or down, depending on the value of the T2EX pin. Timer 2 automatically counting up when DCEN=0. In this mode, two options are selected by bit EXEN2 in T2CON. If EXEN2=0, Timer 2 counts up to 0FFFFH and then sets the TF2 bit upon overflow. The overflow also causes the timer registers to be reloaded with the 16-bit value in RCAP2H and RCAP2L. The values in Timer in Capture Mode RCAP2H and RCAP2L are preset by software. If EXEN2=1, a 16-bit reload can be triggered either by an overflow or by a 1-to-0 transition at external input T2EX. This transition also sets the EXF2 bit. Both the TF2 and EXF2 bits can generate an interrupt if enabled. Setting the DCEN bit enables Timer 2 to count up or down, as shown in Figure 10-2. In this mode, the T2EX pin controls the direction of the count. A logic 1 at T2EX makes Timer 2 count up. The timer will overflow at 0FFFFH and set the TF2 bit. This overflow also causes the 16-bit value in RCAP2H and RCAP2L to be reloaded into the timer registers, TH2 and TL2, respectively. A logic 0 at T2EX makes Timer 2 count down. The timer underflows when TH2 and TL2 equal the values stored in RCAP2H and RCAP2L. The underflow sets the TF2 bit and causes 0FFFFH to be reloaded into the timer registers. The EXF2 bit toggles whenever Timer 2 overflows or underflows and can be used as a 17th bit of resolution. In the operating mode, EXF2 does not flag an interrupt.8.Baud Rate GeneratorTimer 2 is selected as the baud rate generator by setting TCLK and/or RCLK in T2CON. Note that the baud rates for transmit and receive can be different if Timer 2 is used for the receiver or transmitter and Timer 1 is used for the other function. Setting RCLK and/or TCLK puts Timer 2 into its baud rate generator mode. The baud rate generator mode is similar to the auto-reload mode, in that a rollover in TH2 causes the Timer 2 registers to be reloaded with the 16-bit value in registers RCAP2H and RCAP2L, which are preset by software. The baud rates in Modes 1 and 3 are determined by Timer 2’s overflow rate according to the following equation. Modes 1 and 3 Baud Rates=Timer 2 Overflow Rate 16The Timer can be configured for either timer or counter operation. In most applications, it is configured for timer operation (CP/T2=0). The timer operation is different for Timer 2 when it is used as a baud rate generator. Normally, as a timer, it increments every machine cycle (at 1/12 the oscillator frequency). As a baud rate generator, however, it increments every state time (at 1/2 the oscillator frequency). The baud rate formula is given below.[]Modes 1 and 3Oscillator Frequency Baud Rate 3265536RCAP2H,RCAP2L =⨯- Where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L taken as a 16-bit unsigned integer.This figure is valid only if RCLK or TCLK=1 in T2CON. Note that a rollover inTH2 does not set TF2 and will not generate an interrupt. Note too, that if EXEN2 is set, a 1-to-0 transition in T2EX will set EXF2 but will not cause a reload from (RCAP2H, RCAP2L) to (TH2, TL2). Thus, when Timer 2 is in use as a baud rate generator, T2EX can be used as an extra external interrupt. Note that when Timer 2 is running (TR2=1) as a timer in the baud rate generator mode, TH2 and TL2 should not be read from or written to. Under these conditions, the Timer is incremented every state time, and the results of a read or write may not be accurate. The RCAP2 registers may be read but should not be written to, because a write might overlap a reload and cause write and/or reload errors. The timer should be turned off (clear TR2) before accessing the Timer 2 or RCAP2 registers.9.InterruptsThe AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three timer interrupts (Timers 0,1 and 2), and the serial port interrupt. Each of these interrupt sources can be individually enabled or disabled by setting or clearing a bit in Special Function Register IE. IE also contains a global disable bit, EA, which disables all interrupts at once. Note that bit position IE.6 is unimplemented. User software should not write a 1 to this bit position, since it may be used in future AT89 products. Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register T2CON. Neither of these flags is cleared by hardware when the service routine is vectored to. In fact, the service routine may have to determine whether it was TF2 or EXF2 that generated the interrupt, and that bit will have to be cleared in software. The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow. The values are then polled by the circuitry in the next cycle. However, the Timer 2 flag, TF2, is set at S2P2 and is polled in the same cycle in which the timer overflows.10.Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that can be configured for use as an on-chip oscillator. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.AT89S52单片机简介2.引脚功能2.1 VCC：电源2.2 GND：接地2.3 P0：P0口是一个8位开路漏极双向I/O口。
计算机专业中英文翻译(外文翻译、文献翻译)
英文参考文献及翻译Linux - Operating system of cybertimesThough for a lot of people , regard Linux as the main operating system to make up huge work station group, finish special effects of " Titanic " make , already can be regarded as and show talent fully. But for Linux, this only numerous news one of. Recently, the manufacturers concerned have announced that support the news of Linux to increase day by day, users' enthusiasm to Linux runs high unprecedentedly too. Then, Linux only have operating system not free more than on earth on 7 year this piece what glamour, get the favors of such numerous important software and hardware manufacturers as the masses of users and Orac le , Informix , HP , Sybase , Corel , Intel , Netscape , Dell ,etc. , OK?1.The background of Linux and characteristicLinux is a kind of " free (Free ) software ": What is called free,mean users can obtain the procedure and source code freely , and can use them freely , including revise or copy etc.. It is a result of cybertimes, numerous technical staff finish its research and development together through Inte rnet, countless user is it test and except fault , can add user expansion function that oneself make conveniently to participate in. As the most outstanding one in free software, Linux has characteristic of the following:(1)Totally follow POSLX standard, expand the network operatingsystem of supporting all AT&T and BSD Unix characteristic. Because of inheritting Unix outstanding design philosophy , and there are clean , stalwart , high-efficient and steady kernels, their all key codes are finished by Li nus Torvalds and other outstanding programmers, without any Unix code of AT&T or Berkeley, so Linu x is not Unix, but Linux and Unix are totally compatible.(2)Real many tasks, multi-user's system, the built-in networksupports, can be with such seamless links as NetWare , Windows NT , OS/2 , Unix ,etc.. Network in various kinds of Unix it tests to be fastest in comparing and assess efficiency. Support such many kinds of files systems as FAT16 , FAT32 , NTFS , Ex t2FS , ISO9600 ,etc. at the same time .(3) Can operate it in many kinds of hardwares platform , including such processors as Alpha , SunSparc , PowerPC , MIPS ,etc., to various kinds of new-type peripheral hardwares, can from distribute on global numerous programmer there getting support rapidly too.(4) To that the hardware requires lower, can obtain very good performance on more low-grade machine , what deserves particular mention is Linux outstanding stability , permitted " year " count often its running times.2.Main application of Linux At present,Now, the application of Linux mainly includes:(1) Internet/Intranet: This is one that Linux was used most at present, it can offer and include Web server , all such Inter net services as Ftp server , Gopher server , SMTP/POP3 mail server , Proxy/Cache server , DNS server ,etc.. Linux kernel supports IPalias , PPP and IPtunneling, these functions can be used for setting up fictitious host computer , fictitious service , VPN (fictitious special-purpose network ) ,etc.. Operating Apache Web server on Linux mainly, the occupation rate of market in 1998 is 49%, far exceeds the sum of such several big companies as Microsoft , Netscape ,etc..(2) Because Linux has outstanding networking ability , it can be usedin calculating distributedly large-scaly, for instance cartoon making , scientific caculation , database and file server ,etc..(3) As realization that is can under low platform fullness of Unix that operate , apply at all levels teaching and research work of universities and colleges extensively, if Mexico government announce middle and primary schools in the whole country dispose Linux and offer Internet service for student already.(4) Tabletop and handling official business appliedly. Application number of people of in this respect at present not so good as Windows of Microsoft far also, reason its lie in Lin ux quantity , desk-top of application software not so good as Windows application far not merely,because the characteristic of the freedom software makes it not almost have advertisement that support (though the function of Star Office is not second to MS Office at the same time, but there are actually few people knowing).3.Can Linux become a kind of major operating system?In the face of the pressure of coming from users that is strengthened day by day, more and more commercial companies transplant its application to Linux platform, comparatively important incident was as follows, in 1998 ①Compaq and HP determine to put forward user of requirement truss up Linux at their servers , IBM and Dell promise to offer customized Linux system to user too. ②Lotus announce, Notes the next edition include one special-purpose edition in Linux. ③Corel Company transplants its famous WordPerfect to on Linux, and free issue. Corel also plans to move the other figure pattern process products to Linux platform completely.④Main database producer: Sybase , Informix , Oracle , CA , IBM have already been transplanted one's own database products to on Linux, or has finished Beta edition, among them Oracle and Informix also offer technical support to their products.4.The gratifying one is, some farsighted domestic corporations have begun to try hard to change this kind of current situation already. Stone Co. not long ago is it invest a huge sum of money to claim , regard Linux as platform develop a Internet/Intranet solution, regard this as the core and launch Stone's system integration business , plan to set up nationwide Linux technical support organization at the same time , take the lead to promote the freedom software application and development in China. In addition domestic computer Company , person who win of China , devoted to Linux relevant software and hardware application of system popularize too. Is it to intensification that Linux know , will have more and more enterprises accede to the ranks that Linux will be used with domestic every enterprise to believe, more software will be planted in Linux platform. Meanwhile, the domestic university should regard Linux as the original version and upgrade already existing Unix content of courses , start with analysing the source code and revising the kernel and train a large number of senior Linux talents, improve our country's own operating system. Having only really grasped the operating system, the software industry of our country could be got rid of and aped sedulously at present, the passive state led by the nose byothers, create conditions for revitalizing the software industry of our country fundamentally.中文翻译Linux—网络时代的操作系统虽然对许多人来说，以Linux作为主要的操作系统组成庞大的工作站群，完成了《泰坦尼克号》的特技制作，已经算是出尽了风头。
计算机专业毕业外文翻译原文+封面+中文翻译
本科毕业论文外文翻译外文译文题目（中文）：具体数学：汉诺塔问题学院: 计算机科学与技术专业: 计算机科学与技术学号:学生姓名:指导教师:日期: 二○一二年六月1 Recurrent ProblemsTHIS CHAPTER EXPLORES three sample problems that give a feel for what’s to c ome. They have two traits in common: They’ve all been investigated repeatedly by mathe maticians; and their solutions all use the idea of recurrence, in which the solution to eac h problem depends on the solutions to smaller instances of the same problem.1.1 THE TOWER OF HANOILet’s look first at a neat little puzzle called the Tower of Hanoi,invented by the Fr ench mathematician Edouard Lucas in 1883. We are given a tower of eight disks, initiall y stacked in decreasing size on one of three pegs:The objective is to transfer the entire tower to one of the other pegs, movingonly one disk at a time and never moving a larger one onto a smaller.Lucas furnished his toy with a romantic legend about a much larger Tower of Brah ma, which supposedly has 64 disks of pure gold resting on three diamond needles. At th e beginning of time, he said, God placed these golden disks on the first needle and orda ined that a group of priests should transfer them to the third, according to the rules abov e. The priests reportedly work day and night at their task. When they finish, the Tower will crumble and the world will end.It's not immediately obvious that the puzzle has a solution, but a little thought (or h aving seen the problem before) convinces us that it does. Now the question arises：What' s the best we can do？That is，how many moves are necessary and suff i cient to perfor m the task?The best way to tackle a question like this is to generalize it a bit. The Tower of Brahma has 64 disks and the Tower of Hanoi has 8；let's consider what happens if ther e are TL disks.One advantage of this generalization is that we can scale the problem down even m ore. In fact, we'll see repeatedly in this book that it's advantageous to LOOK AT SMAL L CASES first. It's easy to see how to transfer a tower that contains only one or two di sks. And a small amount of experimentation shows how to transfer a tower of three.The next step in solving the problem is to introduce appropriate notation：NAME ANO CONQUER. Let's say that T n is the minimum number of moves that will t ransfer n disks from one peg to another under Lucas's rules. Then T1is obviously 1 , an d T2= 3.We can also get another piece of data for free, by considering the smallest case of all：Clearly T0= 0，because no moves at all are needed to transfer a tower of n = 0 disks! Smart mathematicians are not ashamed to think small,because general patterns are easier to perceive when the extreme cases are well understood(even when they are trivial).But now let's change our perspective and try to think big；how can we transfer a la rge tower? Experiments with three disks show that the winning idea is to transfer the top two disks to the middle peg, then move the third, then bring the other two onto it. Thi s gives us a clue for transferring n disks in general：We first transfer the n−1 smallest t o a different peg (requiring T n-1moves), then move the largest (requiring one move), and finally transfer the n−1 smallest back onto the largest (req uiring another T n-1moves). Th us we can transfer n disks (for n > 0)in at most 2T n-1+1 moves：T n≤2T n—1+1，for n > 0.This formula uses '≤' instead of '=' because our construction proves only that 2T n—1+1 mo ves suffice; we haven't shown that 2T n—1+1 moves are necessary. A clever person might be able to think of a shortcut.But is there a better way? Actually no. At some point we must move the largest d isk. When we do, the n−1 smallest must be on a single peg, and it has taken at least T moves to put them there. We might move the largest disk more than once, if we're n n−1ot too alert. But after moving the largest disk for the last time, we must trans fr the n−1 smallest disks (which must again be on a single peg)back onto the largest；this too re quires T n−1moves. HenceT n≥ 2T n—1+1，for n > 0.These two inequalities, together with the trivial solution for n = 0, yieldT0=0；T n=2T n—1+1 , for n > 0. (1.1)(Notice that these formulas are consistent with the known values T1= 1 and T2= 3. Our experience with small cases has not only helped us to discover a general formula, it has also provided a convenient way to check that we haven't made a foolish error. Such che cks will be especially valuable when we get into more complicated maneuvers in later ch apters.)A set of equalities like (1.1) is called a recurrence (a. k. a. recurrence relation or r ecursion relation). It gives a boundary value and an equation for the general value in ter ms of earlier ones. Sometimes we refer to the general equation alone as a recurrence, alt hough technically it needs a boundary value to be complete.The recurrence allows us to compute T n for any n we like. But nobody really like to co m pute fro m a recurrence，when n is large；it takes too long. The recurrence only gives indirect, "local" information. A solution to the recurrence would make us much h appier. That is, we'd like a nice, neat, "closed form" for Tn that lets us compute it quic kly，even for large n. With a closed form, we can understand what T n really is.So how do we solve a recurrence? One way is to guess the correct solution,then to prove that our guess is correct. And our best hope for guessing the solution is t o look (again) at small cases. So we compute, successively,T3= 2×3+1= 7; T4= 2×7+1= 15; T5= 2×15+1= 31; T6= 2×31+1= 63.Aha! It certainly looks as ifTn = 2n−1，for n≥0. (1.2)At least this works for n≤6.Mathematical induction is a general way to prove that some statement aboutthe integer n is true for all n≥n0. First we prove the statement when n has its smallest v alue,no; this is called the basis. Then we prove the statement for n > n0,assuming that it has already been proved for all values between n0and n−1, inclusive; this is called th e induction. Such a proof gives infinitely many results with only a finite amount of wo rk.Recurrences are ideally set up for mathematical induction. In our case, for exampl e，(1.2) follows easily from (1.1)：The basis is trivial，since T0 = 20−1= 0.And the indu ction follows for n > 0 if we assume that (1.2) holds when n is replaced by n−1：T n= 2T n+1= 2(2n−1−1)+1=2n−1.Hence (1.2) holds for n as well. Good! Our quest for T n has ended successfully.Of course the priests' task hasn't ended；they're still dutifully moving disks,and wil l be for a while, because for n = 64 there are 264−1 moves (about 18 quintillion). Even at the impossible rate of one move per microsecond, they will need more than 5000 cent uries to transfer the Tower of Brahma. Lucas's original puzzle is a bit more practical, It requires 28−1 = 255 moves, which takes about four minutes for the quick of hand.The Tower of Hanoi recurrence is typical of many that arise in applications of all kinds. In finding a closed-form expression for some quantity of interest like T n we go t hrough three stages：1 Look at small cases. This gives us insight into the problem and helps us in stages2 and 3.2 Find and prove a mathematical expression for the quantity of interest.For the Tower of Hanoi, this is the recurrence (1.1) that allows us, given the inc lination，to compute T n for any n.3 Find and prove a closed form for our mathematical expression.For the Tower of Hanoi, this is the recurrence solution (1.2).The third stage is the one we will concentrate on throughout this book. In fact, we'll fre quently skip stages I and 2 entirely, because a mathematical expression will be given tous as a starting point. But even then, we'll be getting into subproblems whose solutions will take us through all three stages.Our analysis of the Tower of Hanoi led to the correct answer, but it r equired an“i nductive leap”；we relied on a lucky guess about the answer. One of the main objectives of this book is to explain how a person can solve recurrences without being clairvoyant. For example, we'll see that recurrence (1.1) can be simplified by adding 1 to both sides of the equations：T0+ 1= 1;T n + 1= 2T n-1+ 2, for n >0.Now if we let U n= T n+1，we haveU0 =1；U n= 2U n-1，for n > 0. (1.3)It doesn't take genius to discover that the solution to this recurrence is just U n= 2n；he nce T n= 2n −1. Even a computer could discover this.Concrete MathematicsR. L. Graham, D. E. Knuth, O. Patashnik《Concrete Mathematics》，1.1 ，The Tower Of HanoiR. L. Graham, D. E. Knuth, O. PatashnikSixth printing, Printed in the United States of America1989 by Addison-Wesley Publishing Company，Reference 1-4 pages具体数学R.L.格雷厄姆，D.E.克努特，O.帕塔希尼克《具体数学》，1.1，汉诺塔R.L.格雷厄姆，D.E.克努特，O.帕塔希尼克第一版第六次印刷于美国，韦斯利出版公司，1989年，引用1-4页1 递归问题本章将通过对三个样本问题的分析来探讨递归的思想。
可燃气体报警器中英文对照外文翻译文献
可燃气体报警器中英文对照外文翻译文献(文档含英文原文和中文翻译)原文：Design of Combustible Gas Detection system using WirelessKeywords:TGS813, AT89S52, DS18B20, nRF905, TC35iAbstract.The detection device of combustible gas are designed in the presented work,using wireless transceiver and GSM network.The system realize the wireless transmission of the gas concentration,and also can send alarm information to user’s mobile when an exception occurs.The system consists of two parts: a master and slave. The function of the slave is to collect data, process data and transffer the data to the master.The taskof the master is to receive data and display it by LED.The signal acquisition is completed by sensor TGS813 and A/D converter TLC2543. Thewireless transmission is achieved through wireless transceiver nRF905. Since the accuracy of thesensor is affected by the environment,using DS18B20 to achieve temperature compensation.And with wireless communication module TC35i and GSM network platform, we can send thealarm information to use r’s mobile promptly.IntroductionGas detection is widely used in petroleum, chemical, metallurgy, family, shopping malls,gas stations and other places. Currently, how to monitor the hazardous gas fast and accuratelyare the important issues. Although the gas detection technology is relatively mature, but mostproducts has many shortcomings, such as single function, operating complex, bulky, expensiveand low sensitivity. Wireless communication technology applied to the gas monitoring field, canresolve the problem of remote monitoring in special environment, such as high temperature, low temperature, toxic gas.and unable to wiring .In the presented work, the combustible gas detectoris fully functional (with wireless transceiver), simple, small size, low cost, and has high sensitivity. The equipment can greatlyimprove the system's detection capability and accuracy with temperature compensation algorithm, and also can send alarm information to the user's mobile phone promptly through theGSM network.System designThe system consists of two parts as shown in Figure 1.Fig. 1 Overall system block diagramThe slave part mainly complete data collection and wireless transmission. The master part mainly complete receiving data, displaying and sending alarm message.The signal of gas concentration is collected by combustible gas sensor which generates a weak electrical signal. The signal can be amplified and stabilized by conditioning circuit. And then A/D circuit converts the analog signal to digital signal which microcontroller can process. In order to improve the measurement accuracy, and reduce the impact of temperature, design a temperature compensation circuit to collect tempreture data. AT89S52 process the collected data and send data to the master by wireless transceiver.The master receives the data and displays it by LED. And if the gas concentration being abnormal,the system will drive speaker for an alarm signal and use TC35i module to send alarm information to user’s mobile.Hardware designSignal acquisition and conditioning circuit. Figure 2 shows data acquisition circuit. TGS813 is a Gas sensing resistive sensor. The conductivity of TGS813 is influenced by the concentration of combustible gases in air, the greater the concentration, the higher conductivity. In system R0, R9, R10 and RS (inTGS813) form a bridge circuit to convert resistance to voltage signal. Operational amplifier A connected as a voltage follower with resistors R7 and regulator D1 make up the voltage regulator circuit to supply power for the bridge. In order to the voltage adapt to the A/D converter, the voltage is amplified by opamp B, and the magnification can be adjusted through resistor R11.Fig. 2 Gas concentration signal acquisition circuitFig. 3 Temperature compensation circuitTemperature compensation circuit. The resistance of Rs is greatly affected by temperature. In order to improve system accuracy, the results must be temperature compensated or temperature correction.In system, using temperature sensor DS1820 to collect temperature signal, and using software method for temperature correction.Wireless transmission module. Wireless transceiver is achieved by a single-chip RF transceiver nRF905. MCU and nRF905 realize data and commands interaction through the SPI interface.The typical application schematic is shown in Figure 4. The antenna part is 50Ω single-ended antenna.The communication frequency is 433MHz, and operating voltage is3.3V. The value of resistors,capacitors and inductor is determined by the datasheet of nRF905. GSM short message unit. The interface circuit of TC35i and MCU is shown in Figure 5. The communication between MCU and TC35i is via serial, and the rate is 9600bps. Communicationsmode is 8-bit asynchronous with a start bit, 8 data bits, and 1 stop bit. But the serial input of TC35i requires CMOS level, and serial output of 89C52 requires TTL level. In order to achieve the voltage conversion the system use the way of resistors sharing voltage. Fig. 4 nRF905 Application SchematicFig. 5 TC35i and MCU interface circuitSoftware DesignThe software system includes data acquisition module, temperature compensation module, and wireless transceiver moduleWireless sending program. NRF905 data sending process is as follows:1) When having data to send, the microcontroller send the receiver's address and the data to nRF905 chronologically by the SPI interface.Then placed the data to be transmitted into TxBuf register, send WTP command to write the data to TX-Payload register, and send WTA command to write TX address to the TX-Address register.2) The microcontroller set TRX_CE=1 and TX_EN=1 to stimulate nRF905 ShockBurstTM sending mode. When data transmission completed, the data ready pin is set high;3) Beacause of AUTO_RETRAN being high, the data of nRF905 is constantly re-issued untilTRX_CE=0.4) when TRX_CE pin is set low, means the data transmission completed and nRF905 enter idlemode.Wireless receiving program. NRF905 data receiving process is as follows:1)When TRX_CE = 1 and TX_EN = 0, nRF905 enters ShockBurstTM receive modechecking constantly and waiting for receiving data.2)When nRF905 detect the carrier having same frequency band, the carrier detect pin will beset high.3)When nRF905 receive a matched address, the address matches pin will be set high.4) When packet correctly received, the word head, address and CRC bits will automatically be removed, and the data ready pin will be set high.5) MCU set TRX_CE to "0", and nRF905 enter to idle mode.6) When all the data received, nRF905 set data ready pin and address matching pin to "0", and nRF905 turn to shutdown mode or ShockBurstTM transmitmode and receive mode.Fig.6 Wireless data transmission flow chartFig.7 Wireless data receiving flow chartSummaryDesigned an equipment to detect the concentration of combustible gas, which has wireless transceiver functions and can send the alarm information to user’s mobile promptly through GSM.Experimental results show that the devices have high precision, stability and reliability. It can meet most applications which need real-time monitoring of combustible gas concentration.References[1] Liu S, Chen Q, Wang H G, eat. Electrical capacitance tomography for gas solids flow measurement for circulating fluidized beds [J].Flow Measurement and Instrumentation，2005，16(2-3):135-144.[2] TGS 813-for the Detection of Combustible Gases [DB/OL].2009-08-12.[3] Liu Wei, Chen HeXin，Zhang JunWei，etc. Intelligent control and alarm system based on TC35i. IEEE.2008 International Symposium on Computer Science and Computational Technology(ISCSCT), Shanghai, 2008:80-83译文:使用无线的可燃气体检测系统的设计关键词：TGS813，AT89S52单片机，DS18B20，nRF905，TC35i摘要；可燃气体检测装置是在所提出的工作设计，使用无线收发器和GSM网络。
计算机科学与技术 外文翻译 英文文献 中英对照
附件1：外文资料翻译译文大容量存储器由于计算机主存储器的易失性和容量的限制, 大多数的计算机都有附加的称为大容量存储系统的存储设备, 包括有磁盘、CD 和磁带。
相对于主存储器，大的容量储存系统的优点是易失性小，容量大，低成本, 并且在许多情况下, 为了归档的需要可以把储存介质从计算机上移开。
术语联机和脱机通常分别用于描述连接于和没有连接于计算机的设备。
联机意味着，设备或信息已经与计算机连接，计算机不需要人的干预，脱机意味着设备或信息与机器相连前需要人的干预，或许需要将这个设备接通电源，或许包含有该信息的介质需要插到某机械装置里。
大量储存器系统的主要缺点是他们典型地需要机械的运动因此需要较多的时间，因为主存储器的所有工作都由电子器件实现。
1. 磁盘今天，我们使用得最多的一种大量存储器是磁盘，在那里有薄的可以旋转的盘片，盘片上有磁介质以储存数据。
盘片的上面和（或）下面安装有读/写磁头，当盘片旋转时，每个磁头都遍历一圈，它被叫作磁道，围绕着磁盘的上下两个表面。
通过重新定位的读/写磁头，不同的同心圆磁道可以被访问。
通常，一个磁盘存储系统由若干个安装在同一根轴上的盘片组成，盘片之间有足够的距离，使得磁头可以在盘片之间滑动。
在一个磁盘中，所有的磁头是一起移动的。
因此，当磁头移动到新的位置时，新的一组磁道可以存取了。
每一组磁道称为一个柱面。
因为一个磁道能包含的信息可能比我们一次操作所需要得多，所以每个磁道划分成若干个弧区，称为扇区，记录在每个扇区上的信息是连续的二进制位串。
传统的磁盘上每个磁道分为同样数目的扇区，而每个扇区也包含同样数目的二进制位。
（所以，盘片中心的储存的二进制位的密度要比靠近盘片边缘的大）。
因此，一个磁盘存储器系统有许多个别的磁区, 每个扇区都可以作为独立的二进制位串存取，盘片表面上的磁道数目和每个磁道上的扇区数目对于不同的磁盘系统可能都不相同。
磁区大小一般是不超过几个KB; 512 个字节或1024 个字节。
AT89S52单片机中英文对照外文翻译文献
(文档含英文原文和中文翻译)中英文资料对照外文翻译英文原文：The Description of MCUMCU DescriptionSCM is also known as micro-controller (Microcontroller Unit), commonly used letters of the acronym MCU MCU that it was first used in industrial control. Only a single chip by the CPU chip developed from a dedicated processor. The first design is by a large number of peripherals and CPU on a chip in the computer system, smaller, more easily integrated into a complex and demanding on the volume control device which. INTEL's Z80 is the first designed in accordance with this idea processor, then on the development of microcontroller and dedicated processors have parted ways.Are 8-bit microcontroller early or 4 bits. One of the most successful is the INTEL 8031, for a simple, reliable and good performance was a lot of praise. Then developed in 8031 out of MCS51 MCU Systems. SCM systems based on this system until now is still widely used. With the increased requirements of industrial control field, began a 16-bit microcontroller, because the cost is not satisfactory but have not been very widely used. After 90 years with the great development of consumer electronics, microcontroller technology has been a huge increase. With INTEL i960 series, especially the later series of widely used ARM, 32-bit microcontroller quickly replace high-end 16-bit MCU status and enter the mainstream market. The traditional 8-bit microcontroller performance have been the rapid increase capacity increase compared to 80 the number of times. Currently, high-end 32-bit microcontroller clocked over 300MHz, the performance catching the mid-90's dedicated processor, while the average model prices fall to one U.S. dollars, the most high-end [1] model only 10 dollars. Modern SCM systems are no longer only in the development and use of bare metal environment, a large number of proprietary embedded operating system is widely used in the full range of SCM. The handheld computers and cell phones as the core processing of high-end microcontroller can even use a dedicated Windows and Linux operating systems.SCM is more suitable than the specific processor used in embedded systems, so it was up to the application. In fact the number of SCM is the world's largest computer. Modern human life used in almost every piece of electronic and mechanical products will be integrated single chip. Phone, telephone, calculator, home appliances, electronic toys, handheld computers and computer accessories such as a mouse with a 1-2 in both the Department of SCM. Personal computer will have a large number of SCM in the work. General car with more than 40 SCM, complex industrial control systems may even have hundreds of SCM in the same time work! SCM is not only far exceeds the number of PC and other computing the sum, or even more than the number of human beingsSingle chip, also known as single-chip microcontroller, it is not complete a certain logic chips, but to a computer system integrated into a chip. Equivalent to a micro-computer, and computer than just the lack of a microcontroller I / O devices. General talk: a chip becomes a computer. Its small size, light weight, cheap, for the study, application and development of facilities provided. At the same time, learning to use the MCU is to understand the principle and structure of the computer the best choice.SCM and the computer functions internally with similar modules, such as CPU, memory, parallel bus, the same effect as well, and hard disk memory devices, and different is its performance of these components were relatively weak many of our home computer, but the price is low , usually not more than 10 yuan you can do with it ...... some control for a class is not very complicated electrical work is enough of. We are using automatic drum washing machine, smoke hood, VCD and so on appliances which could see its shadow! ...... It is primarily as a control section of the core componentsIt is an online real-time control computer, control-line is that the scene is needed is a stronger anti-jamming ability, low cost, and this is, and off-line computer (such as home PC), the main difference.Single chipMCU is through running, and can be modified. Through different procedures to achieve different functions, in particular special unique features, this is another device much effort needs to be done, some great efforts are very difficult to do. A not very complex functions if the 50's with the United States developed 74 series, or the 60's CD4000 series of these pure hardware buttoned, then the circuit must be a large PCB board! But if the United States if the 70's with a series of successful SCM market, the result will be a drastic change! Just because you are prepared by microcomputer programs can achieve high intelligence, high efficiency and high reliability!As the microcontroller on the cost-sensitive, so now the dominant software or the lowest level assembly language, which is the lowest level in addition to more than binary machine code language, and as so low why is the use? Many high-level language has reached the level of visual programming Why is not it? The reason is simply that there is no home computer as a single chip CPU, not as hard as a mass storage device. A visualization of small high-level language program which even if only one button, will reach tens of K of size! For the home PC's hard drive in terms of nothing, but in terms of the MCU is not acceptable. SCM in the utilization of hardware resources to be very high for the job so although the original is still in the compilation of a lot of use. The same token, if the giant computer operating system and applications run up to get home PC, home PC, also can not afford to.Can be said that the twentieth century across the three "power" era, that is, the age of electricity, the electronic age and has entered into the computer age. However, this computer, usually refers to the personal computer, referred to as PC. It consists of thehost, keyboard, monitor and other components. Another type of computer, most people do not know how. This computer is to give all kinds of intelligent machines single chip (also known as micro-controller). As the name suggests, this computer system took only a minimal integrated circuit, can be a simple operation and control. Because it is small, usually hidden in the charged mechanical "stomach" in. It is in the device, like the human brain plays a role, it goes wrong, the whole plant was paralyzed. Now, this microcontroller has a very broad field of use, such as smart meters, real-time industrial control, communications equipment, navigation systems, and household appliances. Once all kinds of products were using SCM, can serve to upgrade the effectiveness of products, often in the product name preceded by the adjective - "intelligent," such as intelligent washing machines. Now some technical personnel of factories or other amateur electronics developers to engage in out of certain products, not the circuit is too complicated, that function is too simple and can easily be copied. The reason may be stuck in the product did not use a microcontroller or other programmable logic device.SCM historySCM was born in the late 20th century, 70, experienced SCM, MCU, SoC three stages.First model1.SCM the single chip microcomputer (Single Chip Microcomputer) stage, mainly seeking the best of the best single form of embedded systems architecture. "Innovation model" success, laying the SCM and general computer completely different path of development. In the open road of independent development of embedded systems, Intel Corporation contributed.2.MCU the micro-controller (Micro Controller Unit) stage, the main direction of technology development: expanding to meet the embedded applications, the target system requirements for the various peripheral circuits and interface circuits, highlight the object of intelligent control. It involves the areas associated with the object system, therefore, the development of MCU's responsibility inevitably falls on electrical, electronics manufacturers. From this point of view, Intel faded MCU development has its objective factors. In the development of MCU, the most famous manufacturers as the number of Philips Corporation.Philips company in embedded applications, its great advantage, the MCS-51 single-chip micro-computer from the rapid development of the micro-controller. Therefore, when we look back at the path of development of embedded systems, do notforget Intel and Philips in History.Embedded SystemsEmbedded system microcontroller is an independent development path, the MCU important factor in the development stage, is seeking applications to maximize the solution on the chip; Therefore, the development of dedicated single chip SoC trend of the natural form. As the microelectronics, IC design, EDA tools development, application system based on MCU SoC design have greater development. Therefore, the understanding of the microcontroller chip microcomputer can be, extended to the single-chip micro-controller applications.MCU applicationsSCM now permeate all areas of our lives, which is almost difficult to find traces of the field without SCM. Missile navigation equipment, aircraft, all types of instrument control, computer network communications and data transmission, industrial automation, real-time process control and data processing, extensive use of various smart IC card, civilian luxury car security system, video recorder, camera, fully automatic washing machine control, and program-controlled toys, electronic pet, etc., which are inseparable from the microcontroller. Not to mention the area of robot control, intelligent instruments, medical equipment was. Therefore, the MCU learning, development and application of the large number of computer applications and intelligent control of the scientists, engineers.The single-chip microcomputer AT89S52 MCU as an example, the pair for further description:AT89S52 MCUFeatures• Compatible with MCS-51 Products• 8K Bytes of In-System Programmable (ISP) Flash Memory – Endurance: 10,000 Write/Erase Cycles• 4.0V to 5.5V Operating Range• Fully Static Operation: 0 Hz to 33 MHz• Three-level Program Memory Lock• 256 x 8-bit Internal RAM• 32 Programmable I/O Lines• Three 16-bit Timer/Counters• Eight Interrupt Sources• Full Duplex UART Serial Channel• Low-power Idle and Power-down Modes• Interrupt Recov ery from Power-down Mode• Watchdog Timer • Dual Data Pointer• Power-off Flag • Fast Programming Time• Flexible ISP Programming (Byte and Page Mode)• Green (Pb/Halide-free) Packaging Option1.DescriptionThe AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K bytes of in-system programmable Flash memory. The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the indus-try-standard 80C51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory pro-grammer. By combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications.The AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM con-tents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset.2.Pin DescriptionVCC ：Supply voltage.GND ：Ground.Port 0：Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, eachpin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs. Port 0 can also be configured to be the multiplexed low-order address/data bus during accesses to external program and data memory. In this mode, P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes dur-ing program verification. External pull-ups are required during program verification.Port 1：Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the inter-nal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in the follow-ing table.Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2：Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the inter-nal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and dur-ing accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX@ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash program-ming and verification.Port 3：Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the inter-nal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups. Port 3 receives some control signals for Flash programming and verification. Port 3 also serves the functions of various special features of the AT89S52, as shown in the fol-lowing table.RST：Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives high for 98 oscillator periods after the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled.ALE/PROG：Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing orclocking purposes. Note, however, that one ALE pulse is skipped dur-ing each access to external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSEN：Program Store Enable (PSEN) is the read strobe to external program memory. When the AT89S52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to exter-nal data memory.EA/VPP：External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming.XTAL1：Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2：Output from the inverting oscillator amplifier.3.Memory OrganizationMCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes each of external Program and Data Memory can be addressed.3.1 Program MemoryIf the EA pin is connected to GND, all program fetches are directed to external memory. On the AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through 1FFFH are directed to internal memory and fetches to addresses 2000H through FFFFH are to external memory.3.2 Data MemoryThe AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers. This means that the upper 128 bytes have the same addresses as the SFR space but are physically separate from SFR space. When an instruction accesses an internal location above address 7FH, the address mode used in the instruction specifies whether the CPU accesses the upper 128bytes of RAM or the SFR space. Instructions which use direct addressing access the SFR space. For example, the following direct addressing instruction accesses the SFR at location 0A0H (which is P2).MOV 0A0H, #dataInstructions that use indirect addressing access the upper 128 bytes of RAM. For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H).MOV @R0, #dataNote that stack operations are examples of indirect addressing, so the upper 128 bytes of data RAM are available as stack space.4.Watchdog Timer (One-time Enabled with Reset-out)The WDT is intended as a recovery method in situations where the CPU may be subjected to software upsets. The WDT consists of a 14-bit counter and the Watchdog Timer Reset (WDTRST) SFR. The WDT is defaulted to disable from exiting reset. To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H). When the WDT is enabled, it will increment every machine cycle while the oscillator is running. The WDT timeout period is dependent on the external clock frequency. There is no way to disable the WDT except through reset (either hardware reset or WDT overflow reset). When WDT over-flows, it will drive an output RESET HIGH pulse at the RST pin.4.1 Using the WDTTo enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H). When the WDT is enabled, the user needs to service it by writing 01EH and 0E1H to WDTRST to avoid a WDT overflow. The 14-bit counter overflows when it reaches 16383 (3FFFH), and this will reset the device. When the WDT is enabled, it will increment every machine cycle while the oscillator is running. This means the user must reset the WDT at least every 16383 machine cycles. To reset the WDT the user must write 01EH and 0E1H to WDTRST. WDTRST is a write-only register. The WDT counter cannot be read or written. When WDT overflows, it will generate an output RESET pulse at the RST pin. The RESET pulse dura-tion is 98xTOSC, where TOSC = 1/FOSC. To make the best use of the WDT, it should be serviced in those sections of code that will periodically be executed within the time required to prevent a WDT reset.4.2 WDT During Power-down and IdleIn Power-down mode the oscillator stops, which means the WDT also stops. While in Power-down mode, the user does not need to service the WDT. There are two methods of exiting Power-down mode: by a hardware reset or via a level-activated external interrupt which is enabled prior to entering Power-down mode. When Power-down is exited with hardware reset, servicing the WDT should occur as it normally does whenever the AT89S52 is reset. Exiting Power-down with an interrupt is significantly different. The interrupt is held low long enough for the oscillator to stabilize. When the interrupt is brought high, the interrupt is serviced. To prevent the WDT from resetting the device while the interrupt pin is held low, the WDT is not started until the interrupt is pulled high. It is suggested that the WDT be reset during the interrupt service for the interrupt used to exit Power-down mode. To ensure that the WDT does not overflow within a few states of exiting Power-down, it is best to reset the WDT just before entering Power-down mode. Before going into the IDLE mode, the WDIDLE bit in SFR AUXR is used to determine whether the WDT continues to count if enabled. The WDT keeps counting during IDLE (WDIDLE bit = 0) as the default state. To prevent the WDT from resetting the AT89S52 while in IDLE mode, the user should always set up a timer that will periodically exit IDLE, service the WDT, and reenter IDLE mode. With WDIDLE bit enabled, the WDT will stop to count in IDLE mode and resumes the count upon exit from IDLE.5. UARTThe UART in the AT89S52 operates the same way as the UART in the AT89C51 and AT89C52. For further information on the UART operation, please click on the document link below:/dyn/resources/prod_documents/DOC4316.PDF6. Timer 0 and 1Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and Timer 1 in the AT89C51 and AT89C52. For further information on the timers’ operation, please click on the document link below:/dyn/resources/prod_documents/DOC4316.PDF7. Timer 2Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type of operation is selected by bit C/T2in the SFR T2CON. Timer 2 has three operating modes: capture, auto-reload (up or down counting), and baud rate generator. The modes are selected by bits in T2CON, as shown in Table 6-1. Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscil-lator frequency.In the Counter function, the register is incremented in response to a 1-to-0 transition at its corre-sponding external input pin, T2. In this function, the external input is sampled during S5P2 of every machine cycle. When the samples show a high in one cycle and a low in the next cycle, the count is incremented. The new count value appears in the register during S3P1 of the cycle following the one in which the transition was detected. Since two machine cycles (24 oscillator periods) are required to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure that a given level is sampled at least once before it changes, the level should be held for at least one full machine cycle.7.1 Capture ModeIn the capture mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON. This bit can then be used to generate an interrupt. If EXEN2 = 1, Timer 2 performs the same operation, but a 1-to-0 transi-tion at external input T2EX also causes the current value in TH2 and TL2 to be captured into RCAP2H and RCAP2L, respectively. In addition, the transition at T2EX causes bit EXF2 in T2CON to be set. The EXF2 bit, like TF2, can generate an interrupt.7.2 Auto-reload (Up or Down Counter)Timer 2 can be programmed to count up or down when configured in its 16-bit auto-reload mode. This feature is invoked by the DCEN (Down Counter Enable) bit located in the SFR T2MOD . Upon reset, the DCEN bit is set to 0 so that timer 2 will default to count up. When DCEN is set, Timer 2 can count up or down, depending on the value of the T2EX pin. Timer 2 automatically counting up when DCEN = 0. In this mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to 0FFFFH and then sets the TF2 bit upon overflow. The overflow also causes the timer registers to be reloaded with the 16-bit value in RCAP2H and RCAP2L. The values in Timer in Capture ModeRCAP2H and RCAP2L are preset by software. If EXEN2 = 1, a 16-bit reload can be triggered either by an overflow or by a 1-to-0 transition at external input T2EX. This transition also sets the EXF2 bit. Both the TF2 and EXF2 bits can generate an interrupt if enabled. Setting the DCEN bit enables Timer 2 to count up or down, as shown in Figure 10-2. In this mode, the T2EX pin controls the direction of the count. A logic 1 at T2EX makes Timer 2 count up. The timer will overflow at 0FFFFH and set the TF2 bit. This overflow also causes the 16-bit value in RCAP2H and RCAP2L to be reloaded into the timer registers, TH2 and TL2, respectively. A logic 0 at T2EX makes Timer 2 count down. The timer underflows when TH2 and TL2 equal the values stored in RCAP2H and RCAP2L. The underflow sets the TF2 bit and causes 0FFFFH to be reloaded into the timer registers. The EXF2 bit toggles whenever Timer 2 overflows or underflows and can be used as a 17th bit of resolution. In this operating mode, EXF2 does not flag an interrupt.8. Baud Rate GeneratorTimer 2 is selected as the baud rate generator by setting TCLK and/or RCLK in T2CON. Note that the baud rates for transmit and receive can be different if Timer 2 is used for the receiver or transmitter and Timer 1 is used for the other function. Setting RCLK and/or TCLK puts Timer 2 into its baud rate generator mode. The baud rate generator mode is similar to the auto-reload mode, in that a rollover in TH2 causes the Timer 2 registers to be reloaded with the 16-bit value in registers RCAP2H and RCAP2L, which are preset by software. The baud rates in Modes 1 and 3 are determined by Timer 2’s overflow rate according to the fol -lowing equation.The Timer can be configured for either timer or counter operation. In most applications, it is con-figured for timer operation (CP/T2 = 0). The timer operation is Timer 2 Overflow Rate Modes 1 and 3 Baud Rates = 16different for Timer 2 when it is used as a baud rate generator. Normally, as a timer, it increments every machine cycle (at 1/12 the oscillator frequency). As a baud rate generator, however, it increments every state time (at 1/2 the oscillator frequency). The baud rate formula is given below.where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L taken as a 16-bit unsigned integer.This figure is valid only if RCLK or TCLK = 1 in T2CON. Note that a rollover in TH2 does not set TF2 and will not generate an inter-rupt. Note too, that if EXEN2 is set, a 1-to-0 transition in T2EX will set EXF2 but will not cause a reload from (RCAP2H, RCAP2L) to (TH2, TL2). Thus, when Timer 2 is in use as a baud rate generator, T2EX can be used as an extra external interrupt. Note that when Timer 2 is running (TR2 = 1) as a timer in the baud rate generator mode, TH2 or TL2 should not be read from or written to. Under these conditions, the Timer is incremented every state time, and the results of a read or write may not be accurate. The RCAP2 registers may be read but should not be written to, because a write might overlap a reload and cause write and/or reload errors. The timer should be turned off (clear TR2) before accessing the Timer 2 or RCAP2 registers.9. Programmable Clock OutA 50% duty cycle clock can be programmed to come out on P1.0. This pin, besides being a regular I/O pin, has two alternate functions. It can be programmed to input the external clock for Timer/Counter 2 or to output a 50% duty cycle clock ranging from 61 Hz to 4 MHz (for a 16-MHz operating frequency). To configure the Timer/Counter 2 as a clock generator, bit C/T2 (T2CON.1) must be cleared and bit T2OE (T2MOD.1) must be set. Bit TR2 (T2CON.2) starts and stops the timer. The clock-out frequency depends on the oscillator frequency and the reload value of Timer 2 capture registers (RCAP2H, RCAP2L), as shown in the following equation.In the clock-out mode, Timer 2 roll-overs will not generate an interrupt. This behavior is similar to when Timer 2 is used as a baud-rate generator. It is possible to use Timer 2 as a baud-rate gen-erator and a clock generator simultaneously. Note, however, Modes 1 and 3Oscillator Frequency Baud Rate 32[65536-RCAP2H,RCAP2L]=⨯Oscilator Frequency Clock-Out Frequency=4[65536-(RCAP2H,RCAP2L)]⨯。
计算机外文翻译（完整）
计算机外⽂翻译（完整）毕业设计(论⽂)外⽂资料翻译专业：计算机科学与技术姓名：王成明学号：06120186外⽂出处：The History of the Internet附件： 1.外⽂原⽂ 2.外⽂资料翻译译⽂；附件1：外⽂原⽂The History of the InternetThe Beginning - ARPAnetThe Internet started as a project by the US government. The object of the project was to create a means of communications between long distance points, in the event of a nation wide emergency or, more specifically, nuclear war. The project was called ARPAnet, and it is what the Internet started as. Funded specifically for military communication, the engineers responsible for ARPANet had no idea of the possibilities of an "Internet."By definition, an 'Internet' is four or more computers connected by a network.ARPAnet achieved its network by using a protocol called TCP/IP. The basics around this protocol was that if information sent over a network failed to get through on one route, it would find another route to work with, as well as establishing a means for one computer to "talk" to another computer, regardless of whether it was a PC or a Macintosh.By the 80's ARPAnet, just years away from becoming the more well known Internet, had 200 computers. The Defense Department, satisfied with ARPAnets results, decided to fully adopt it into service, and connected many military computers and resources into the network. ARPAnet then had 562 computers on its network. By the year 1984, it had over 1000 computers on its network.In 1986 ARPAnet (supposedly) shut down, but only the organization shut down, and the existing networks still existed between the more than 1000 computers. It shut down due to a failied link up with NSF, who wanted to connect its 5 countywide super computers into ARPAnet.With the funding of NSF, new high speed lines were successfully installed at line speeds of 56k (a normal modem nowadays) through telephone lines in 1988. By that time, there were 28,174 computers on the (by then decided) Internet. In 1989 there were 80,000 computers on it. By 1989, there were290,000.Another network was built to support the incredible number of people joining. It was constructed in 1992.Today - The InternetToday, the Internet has become one of the most important technological advancements in the history of humanity. Everyone wants to get 'on line' to experience the wealth of information of the Internet. Millions of people now use the Internet, and it's predicted that by the year 2003 every single person on the planet will have Internet access. The Internet has truly become a way of life in our time and era, and is evolving so quickly its hard to determine where it will go next, as computer and network technology improve every day.HOW IT WORKS:It's a standard thing. People using the Internet. Shopping, playing games,conversing in virtual Internet environments.The Internet is not a 'thing' itself. The Internet cannot just "crash." It functions the same way as the telephone system, only there is no Internet company that runs the Internet.The Internet is a collection of millioins of computers that are all connected to each other, or have the means to connect to each other. The Internet is just like an office network, only it has millions of computers connected to it.The main thing about how the Internet works is communication. How does a computer in Houston know how to access data on a computer in Tokyo to view a webpage?Internet communication, communication among computers connected to the Internet, is based on a language. This language is called TCP/IP. TCP/IP establishes a language for a computer to access and transmit data over the Internet system.But TCP/IP assumes that there is a physical connecetion between onecomputer and another. This is not usually the case. There would have to be a network wire that went to every computer connected to the Internet, but that would make the Internet impossible to access.The physical connection that is requireed is established by way of modems,phonelines, and other modem cable connections (like cable modems or DSL). Modems on computers read and transmit data over established lines,which could be phonelines or data lines. The actual hard core connections are established among computers called routers.A router is a computer that serves as a traffic controller for information.To explain this better, let's look at how a standard computer might viewa webpage.1. The user's computer dials into an Internet Service Provider (ISP). The ISP might in turn be connected to another ISP, or a straight connection into the Internet backbone.2. The user launches a web browser like Netscape or Internet Explorer and types in an internet location to go to.3. Here's where the tricky part comes in. First, the computer sends data about it's data request to a router. A router is a very high speed powerful computer running special software. The collection of routers in the world make what is called a "backbone," on which all the data on the Internet is transferred. The backbone presently operates at a speed of several gigabytes per-second. Such a speed compared to a normal modem is like comparing the heat of the sun to the heat of an ice-cube.Routers handle data that is going back and forth. A router puts small chunks of data into packages called packets, which function similarly to envelopes. So, when the request for the webpage goes through, it uses TCP/IP protocols to tell the router what to do with the data, where it's going, and overall where the user wants to go.4. The router sends these packets to other routers, eventually leadingto the target computer. It's like whisper down the lane (only the information remains intact).5. When the information reaches the target web server, the webserver then begins to send the web page back. A webserver is the computer where the webpage is stored that is running a program that handles requests for the webpage and sends the webpage to whoever wants to see it.6. The webpage is put in packets, sent through routers, and arrive at the users computer where the user can view the webpage once it is assembled.The packets which contain the data also contain special information that lets routers and other computers know how to reassemble the data in the right order.With millions of web pages, and millions of users, using the Internet is not always easy for a beginning user, especially for someone who is not entirely comfortale with using computers. Below you can find tips tricks and help on how to use main services of the Internet.Before you access webpages, you must have a web browser to actually be able to view the webpages. Most Internet Access Providers provide you with a web browser in the software they usually give to customers; you. The fact that you are viewing this page means that you have a web browser. The top two use browsers are Netscape Communicator and Microsoft Internet Explorer. Netscape can be found at /doc/bedc387343323968011c9268.html and MSIE can be found at /doc/bedc387343323968011c9268.html /ie.The fact that you're reading this right now means that you have a web browser.Next you must be familiar with actually using webpages. A webpage is a collection of hyperlinks, images, text, forms, menus, and multimedia. To "navigate" a webpage, simply click the links it provides or follow it's own instructions (like if it has a form you need to use, it will probably instruct you how to use it). Basically, everything about a webpage is made to be self-explanetory. That is the nature of a webpage, to be easily navigatable."Oh no! a 404 error! 'Cannot find web page?'" is a common remark made by new web-users.Sometimes websites have errors. But an error on a website is not the user's fault, of course.A 404 error means that the page you tried to go to does not exist. This could be because the site is still being constructed and the page hasn't been created yet, or because the site author made a typo in the page. There's nothing much to do about a 404 error except for e-mailing the site administrator (of the page you wanted to go to) an telling him/her about the error.A Javascript error is the result of a programming error in the Javascript code of a website. Not all websites utilize Javascript, but many do. Javascript is different from Java, and most browsers now support Javascript. If you are using an old version of a web browser (Netscape 3.0 for example), you might get Javascript errors because sites utilize Javascript versions that your browser does not support. So, you can try getting a newer version of your web browser.E-mail stands for Electronic Mail, and that's what it is. E-mail enables people to send letters, and even files and pictures to each other.To use e-mail, you must have an e-mail client, which is just like a personal post office, since it retrieves and stores e-mail. Secondly, you must have an e-mail account. Most Internet Service Providers provide free e-mail account(s) for free. Some services offer free e-mail, like Hotmail, and Geocities.After configuring your e-mail client with your POP3 and SMTP server address (your e-mail provider will give you that information), you are ready to receive mail.An attachment is a file sent in a letter. If someone sends you an attachment and you don't know who it is, don't run the file, ever. It could be a virus or some other kind of nasty programs. You can't get a virus justby reading e-mail, you'll have to physically execute some form of program for a virus to strike.A signature is a feature of many e-mail programs. A signature is added to the end of every e-mail you send out. You can put a text graphic, your business information, anything you want.Imagine that a computer on the Internet is an island in the sea. The sea is filled with millions of islands. This is the Internet. Imagine an island communicates with other island by sending ships to other islands and receiving ships. The island has ports to accept and send out ships.A computer on the Internet has access nodes called ports. A port is just a symbolic object that allows the computer to operate on a network (or the Internet). This method is similar to the island/ocean symbolism above.Telnet refers to accessing ports on a server directly with a text connection. Almost every kind of Internet function, like accessing web pages,"chatting," and e-mailing is done over a Telnet connection.Telnetting requires a Telnet client. A telnet program comes with the Windows system, so Windows users can access telnet by typing in "telnet" (without the "'s) in the run dialog. Linux has it built into the command line; telnet. A popular telnet program for Macintosh is NCSA telnet.Any server software (web page daemon, chat daemon) can be accessed via telnet, although they are not usually meant to be accessed in such a manner. For instance, it is possible to connect directly to a mail server and check your mail by interfacing with the e-mail server software, but it's easier to use an e-mail client (of course).There are millions of WebPages that come from all over the world, yet how will you know what the address of a page you want is?Search engines save the day. A search engine is a very large website that allows you to search it's own database of websites. For instance, if you wanted to find a website on dogs, you'd search for "dog" or "dogs" or "dog information." Here are a few search-engines.1. Altavista (/doc/bedc387343323968011c9268.html ) - Web spider & Indexed2. Yahoo (/doc/bedc387343323968011c9268.html ) - Web spider & Indexed Collection3. Excite (/doc/bedc387343323968011c9268.html ) - Web spider & Indexed4. Lycos (/doc/bedc387343323968011c9268.html ) - Web spider & Indexed5. Metasearch (/doc/bedc387343323968011c9268.html ) - Multiple searchA web spider is a program used by search engines that goes from page to page, following any link it can possibly find. This means that a search engine can literally map out as much of the Internet as it's own time and speed allows for.An indexed collection uses hand-added links. For instance, on Yahoo's site. You can click on Computers & the Internet. Then you can click on Hardware. Then you can click on Modems, etc., and along the way through sections, there are sites available which relate to what section you're in.Metasearch searches many search engines at the same time, finding the top choices from about 10 search engines, making searching a lot more effective.Once you are able to use search engines, you can effectively find the pages you want.With the arrival of networking and multi user systems, security has always been on the mind of system developers and system operators. Since the dawn of AT&T and its phone network, hackers have been known by many, hackers who find ways all the time of breaking into systems. It used to not be that big of a problem, since networking was limited to big corporate companies or government computers who could afford the necessary computer security.The biggest problem now-a-days is personal information. Why should you be careful while making purchases via a website? Let's look at how the internet works, quickly.The user is transferring credit card information to a webpage. Looks safe, right? Not necessarily. As the user submits the information, it is being streamed through a series of computers that make up the Internet backbone.The information is in little chunks, in packages called packets. Here's the problem: While the information is being transferred through this big backbone, what is preventing a "hacker" from intercepting this data stream at one of the backbone points?Big-brother is not watching you if you access a web site, but users should be aware of potential threats while transmitting private information. There are methods of enforcing security, like password protection, an most importantly, encryption.Encryption means scrambling data into a code that can only be unscrambled on the "other end." Browser's like Netscape Communicator and Internet Explorer feature encryption support for making on-line transfers. Some encryptions work better than others. The most advanced encryption system is called DES (Data Encryption Standard), and it was adopted by the US Defense Department because it was deemed so difficult to 'crack' that they considered it a security risk if it would fall into another countries hands.A DES uses a single key of information to unlock an entire document. The problem is, there are 75 trillion possible keys to use, so it is a highly difficult system to break. One document was cracked and decoded, but it was a combined effort of14,000 computers networked over the Internet that took a while to do it, so most hackers don't have that many resources available.附件2：外⽂资料翻译译⽂Internet的历史起源——ARPAnetInternet是被美国政府作为⼀项⼯程进⾏开发的。
AT89S52英文资料及中文翻译
AT89S52英文资料及中文翻译AT89S52FeaturesCompatible with MCS-51 Products8K Bytes of In-System Programmable (ISP) Flash Memory –Endurance: 10,000 Write/Erase Cycles4.0V to5.5V Operating RangeFully Static Operation: 0 Hz to 33 MHzThree-level Program Memory Lock256 x 8-bit Internal RAM32 Programmable I/O LinesThree 16-bit Timer/CountersEight Interrupt SourcesFull Duplex UART Serial ChannelLow-power Idle and Power-down ModesInterrupt Recovery from Power-down ModeWatchdog Timer、 Dual Data PointerPower-off Flag、 Fast Programming TimeFlexible ISP Programming (Byte and Page Mode)Green (Pb/Halide-free) Packaging Option1、DescriptionThe AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K bytes of in-system programmable Flash memory. The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the indus-try-standard 80C51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory pro-grammer. By combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications.The AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM con-tents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset.2、Memory OrganizationMCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes each of external Program and Data Memory can be addressed.2.1、Program MemoryIf the EA pin is connected to GND, all program fetches are directed to external memory. On the AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through 1FFFH are directed to internal memory and fetches to addresses 2000H through FFFFH are to external memory.2.2、 Data MemoryThe AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers. This means that the upper 128 bytes have the same addresses as the SFR space but are physically separate from SFR space. When an instruction accesses an internal location above address 7FH, the address mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of RAM or the SFR space. Instructions which use direct addressing access the SFR space. For example, the following direct addressing instruction accesses the SFR at location 0A0H (which is P2).MOV 0A0H, #dataInstructions that use indirect addressing access the upper 128 bytes of RAM. For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H).MOV @R0, #dataNote that stack operations are examples of indirect addressing, so the upper 128 bytes of data RAM are available as stack space.3、Watchdog Timer (One-time Enabled with Reset-out)The WDT is intended as a recovery method in situations where the CPU may be subjected to software upsets. The WDT consists of a 14-bit counter and the Watchdog Timer Reset (WDTRST) SFR. The WDT is defaulted to disable from exiting reset. To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H). When the WDT is enabled, it will increment every machine cycle while the oscillator is running. The WDT timeout period is dependent on the external clock frequency. There is no way to disable the WDT except through reset (either hardware reset or WDT overflow reset). When WDT over-flows, it will drive an output RESET HIGH pulse at the RST pin.3.1 、Using the WDTTo enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H). When the WDT is enabled, the user needs toservice it by writing 01EH and 0E1H to WDTRST to avoid a WDT overflow. The 14-bit counter overflows when it reaches 16383 (3FFFH), and this will reset the device. When the WDT is enabled, it will increment every machine cycle while the oscillator is running. This means the user must reset the WDT at least every 16383 machine cycles. To reset the WDT the user must write 01EH and 0E1H to WDTRST. WDTRST is a write-only register. The WDT counter cannot be read or written. When WDT overflows, it will generate an output RESET pulse at the RST pin. The RESET pulse dura-tion is 98xTOSC, where TOSC = 1/FOSC. To make the best use of the WDT, it should be serviced in those sections of code that will periodically be executed within the time required to prevent a WDT reset.3.2、 WDT During Power-down and IdleIn Power-down mode the oscillator stops, which means the WDT also stops.While in Power-down mode, the user does not need to service the WDT. There are two methods of exiting Power-down mode: by a hardware reset or via a level-activated external interrupt which is enabled prior to entering Power-down mode. When Power-down is exited with hardware reset, servicing the WDT should occur as it normally does whenever the AT89S52 is reset. Exiting Power-down with an interrupt is significantly different. The interrupt is held low long enough for the oscillator to stabilize. When the interrupt is brought high, the interrupt is serviced. To prevent the WDT from resetting the device while the interrupt pin is held low, the WDT is not started until the interrupt is pulled high. It is suggested that the WDT be reset during the interrupt service for the interrupt used to exit Power-down mode. To ensure that the WDT does not overflow within a few states of exiting Power-down, it is best to reset the WDT just before entering Power-down mode. Before going into the IDLE mode, the WDIDLE bit in SFR AUXR is used to determine whether the WDT continues to count if enabled. The WDT keeps counting during IDLE (WDIDLE bit = 0) as the default state. To prevent the WDT from resetting the AT89S52 while in IDLE mode, the user should always set up a timer that will periodically exit IDLE, service the WDT, and reenter IDLE mode. With WDIDLE bit enabled, the WDT will stop to count in IDLE mode and resumes the count upon exit from IDLE.4、 Baud Rate GeneratorTimer 2 is selected as the baud rate generator by setting TCLK and/or RCLK in T2CON. Note that the baud rates for transmit and receive can be different if Timer 2 is used for the receiver or transmitter and Timer 1 is used for the other function. Setting RCLK and/or TCLK puts Timer 2 into its baud rate generator mode. The baud rate generator mode is similar to the auto-reload mode, in that a rollover in TH2 causes the Timer 2 registers to be reloaded with the 16-bit value in registers RCAP2H and RCAP2L, which are preset by software. The baud rates in Modes 1 and 3 are determined by Timer 2’s overflow rate according to the fol-lowing equation.The Timer can be configured for either timer or counter operation. In most applications, it is con-figured for timer operation (CP/T2 = 0). The timer operation is different for Timer 2 when it is used as a baud rate generator. Normally, as a timer, it increments every machine cycle (at 1/12 the oscillator frequency). As a baud rate generator, however, it increments every state time (at 1/2 the oscillator frequency).The baud=where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L taken as a 16-bit unsigned integer.This figure is valid only if RCLK or TCLK = 1 in T2CON. Note that a rollover in TH2 does not set TF2 and will not generate an inter-rupt. Note too, that if EXEN2 is set, a 1-to-0 transition in T2EX will set EXF2 but will not cause a reload from (RCAP2H, RCAP2L) to (TH2, TL2). Thus, when Timer 2 is in use as a baud rate generator, T2EX can be used as an extra external interrupt. Note that when Timer 2 is running (TR2 = 1) as a timer in the baud rate generator mode, TH2 or TL2 should not be read from or written to. Under these conditions, the Timer is incremented every state time, and the results of a read or write may not be accurate. The RCAP2 registers may be read but should not be written to, because a write might overlap a reload and cause write and/or reload errors. The timer should be turned off (clear TR2) before accessing the Timer 2 or RCAP2 registers.5、 Programmable Clock OutA 50% duty cycle clock can be programmed to come out on P1.0. This pin, besides being a regular I/O pin, has two alternate functions. It can be programmed to input the external clock for Timer/Counter 2 or to output a 50% duty cycle clock ranging from 61 Hz to 4 MHz (for a 16-MHz operating frequency). To configure the Timer/Counter 2 as a clock generator, bit C/T2 (T2CON.1) must be cleared and bit T2OE (T2MOD.1) must be set. Bit TR2 (T2CON.2) starts and stops the timer. The clock-out frequency depends on the oscillator frequency and the reload value of Timer 2 capture registers (RCAP2H, RCAP2L), as shown in the following equation.Clock-Out Frequency=In the clock-out mode, Timer 2 roll-overs will not generate an interrupt. This behavior is similar to when Timer 2 is used as a baud-rate generator. It is possible to use Timer 2 as a baud-rate gen-erator and a clock generator simultaneously. Note, however, that the baud-rate and clock-out frequencies cannot be determined independently from one another since they both use RCAP2H and RCAP2L.6、InterruptsThe AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. Each of these interrupt sources can be individually enabled or disabled by setting or clearing a bit in Special Function Register IE. IE also contains a global disable bit, EA, which disables all interrupts at once. Note that bit position IE.6 is unimplemented. User software should not write a 1 to this bit position, since it may be used in future AT89 products. Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register T2CON. Nei-ther of these flags is cleared by hardware when the service routine is vectored to. In fact, the service routine may have to determine whether it was TF2 or EXF2 that generated the interrupt, and that bit will have to be cleared in software. The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow. The values are then polled by the circuitry in the next cycle. However, the Timer 2 flag, TF2, is set at S2P2 and is polled in the same cycle in which the timer overflows.7、Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that can be configured for use as an on-chip oscillator. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven,. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clock-ing circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.8、Idle ModeIn idle mode, the CPU puts itself to sleep while all the on-chip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions regis-ters remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. Note that when idle mode is terminated by a hardware reset, the device normally resumes pro-gram execution from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when idle mode is terminated by a reset, the instruction following the one that invokes idle mode should not write to a port pin or to external memory.9、Power-down ModeIn the Power-down mode, the oscillator is stopped, and the instruction that invokes Power-down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the Power-down mode is terminated. Exit from Power-down mode can be initiated either by a hardware reset or by an enabled external interrupt. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.中文翻译AT89S52单片机主要性能：与MCS-51单片机产品兼容8K字节在系统可编程Flash存储器1000次擦写周期全静态操作：0Hz～33Hz三级加密程序存储器32个可编程I/O口线三个16位定时器/计数器八个中断源全双工UART串行通道低功耗空闲和掉电模式掉电后中断可唤醒看门狗定时器双数据指针掉电标识符1、功能特征描述AT89S52是一种低功耗、高性能CMOS8位微控制器，具有8K 在系统可编程Flash 存储器。
外文翻译--AT89S52单片机
外文原文AT89S52DescriptionThe AT89s52 is a low-power, high-performance CMOS 8-bit microcomputer with 8K bytes of Flash programmable and erasable read only memory(PEROM). The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard 80C51 and 80C52 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89s52 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications.Pin Configurations: The AT89s52 provides the following standard features: 8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, three 16-bittimer/counters, a six-vector two-level interrupt architecture, a full-duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89s52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next hardware reset.Pin Description·VCC: Supply voltage.·GND: Ground.·Port 0: Port 0 is an 8-bit open drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs.Port 0 can also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode, P0 has internalpullups.Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pullups are required during program verification.·Port 1: Port 1 is an 8-bit bi-directional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins)because of the internal that are externally being pulled low will source current (IILpullups.In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input(P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in the following table.Port 1 also receives the low-order address bytes during Flash programming and verification.Port Pin Alternate FunctionP1.0 T2(external count input to Timer／Counter2)，clock-outP1.1 T2EX(Time／Counter2 capture／reload triggerand direction control)·Port 2: Port 2 is an 8-bit bi-directional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins)because of the internal that are externally being pulled low will source current (IILpullups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @DPTR). In this application, Port 2 uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the high-order address bits and some control signals duringFlash programming and verification.·Port 3: Port 3 is an 8-bit bi-directional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (I) because of the pullups.ILPort 3 also serves the functions of various special features of the AT89C51, as shown in the following table.Port 3 also receives some control signals for Flash programming and verification.Port Pin Alternate FunctionP3.0 RXD (serial input port)P3.1 TXD（serial output port）P3.2 external interrupt 0P3.3 external interrupt 1P3.4 T0(timer 0 external input)P3.5 T1(timer 1 external input）P3.6 external data memory write strobeP3.7 external data memory read strobe ·RST: Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.·ALE/PROG: Address Latch Enable is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external data memory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.·PSEN: Program Store Enable is the read strobe to external program memory.When the AT89s52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.·EA/VPP: External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH.Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.EA should be strapped to V CC for internal program executions.This pin also receives the 12-volt programming enable voltage (V PP) during Flash programming when 12-volt programming is selected.·XTAL1I: nput to the inverting oscillator amplifier and input to the internal clock operating circuit.·XTAL2: Output from the inverting oscillator amplifier.Oscillator Characteristics: XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.Idle Mode: In idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset.It should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access tointernal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.Status of External Pins During Idle and Power Down Modes:Power Down Mode: In the power down mode the oscillator is stopped, and the instruction that invokes power down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power down mode is terminated. The only exit from power down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.Program Memory Lock Bits: On the chip are three lock bits which can be left unprogrammed (U) or can be programmed (P) to obtain the additional features listed in the table below:Lock Bit Protection ModesWhen lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is necessary that the latched value of EA be in agreement with the current logic level at that pin in order for the device to function properly.Programming the Flash: The at89s52 is normally shipped with the on-chip Flash memory array in the erased state (that is, contents = FFH) and ready to be programmed. The programming interface accepts either a high-voltage (12-volt) or a low-voltage(VCC) program enable signal.The low voltage programming mode provides a convenient way to program the at89s52 inside the user’s system, while the high-voltage programming mode is compatible with conventional third party Flash or EPROM programmers.The at89s52 is shipped with either the high-voltage or low-voltage programming mode enabled. The respective top-side marking and device signature codes are listed in the following table.The at89s52 code memory array is programmed byte-bybyte in either programming mode. To program any nonblank byte in the on-chip Flash Programmable and Erasable Read Only Memory, the entire memory must be erased using the Chip Erase Mode.Programming Algorithm: Before programming the at89s52, the address, data and control signals should be set up according to the Flash programming mode table and Figures 3 and 4. To program the at89s52, take the following steps.1. Input the desired memory location on the address lines.2. Input the appropriate data byte on the data lines.3. Activate the correct combination of control signals.4. Raise EA/VPP to 12V for the high-voltage programming mode.5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write cycle is self-timed and typically takes no more than 1.5 ms. Repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object file is reached.Data Polling: The at89s52 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written datum on PO.7. Once the write cycle has been completed, true data are valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated.Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY.Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled.Chip Erase:The entire Flash Programmable and Erasable Read Only Memory array is erased electrically by using the proper combination of control signals and by holding ALE/PROG low for 10 ms. The code array is written with all “1”s. The chip erase operation must be executed before the code memory can be re-programmed.Reading the Signature Bytes: The signature bytes are read by the same procedure as a normal verification of locations 030H, 031H, and 032H, except that P3.6 and P3.7 must be pulled to a logic low. The values returned are as follows.(030H) = 1EH indicates manufactured by Atmel(031H) = 51H indicates 89C51(032H) = FFH indicates 12V programming(032H) = 05H indicates 5V programmingProgramming Interface: Every code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation cycle is selftimed and once initiated, will automatically time itself to completion.中文翻译AT89S52AT89s52是美国ATMEL公司生产的低功耗，高性能COMS 8位单片机，片内含8K bytes的可反复擦写的Flash只读程序存储器和256 bytes的随机存取数据存储器(RAM)，器件采用ATMEL公司的高密度、非易是失性存储技术生产，与标准MCS－51指令系统及8052产品引脚兼容，片内置通用8位中央处理器(CPU)和Flash存储单元，功能强大AT89s52单片机适用许多较为复杂控制应用场合。
计算机专业毕业设计外文翻译
外文翻译Birth of the NetThe Internet has had a relatively brief, but explosive history so far. It grew out of an experiment begun in the 1960's by the U.S. Department of Defense. The DoD wanted to create a computer network that would continue to function in the event of a disaster, such as a nuclear war. If part of the network were damaged or destroyed, the rest of the system still had to work. That network was ARPANET, which linked U.S. scientific and academic researchers. It was the forerunner of today's Internet.In 1985, the National Science Foundation (NSF) created NSFNET, a series of networks for research and education communication. Based on ARPANET protocols, the NSFNET created a national backbone service, provided free to any U.S. research and educational institution. At the same time, regional networks were created to link individual institutions with the national backbone service.NSFNET grew rapidly as people discovered its potential, and as new software applications were created to make access easier. Corporations such as Sprint and MCI began to build their own networks, which they linked to NSFNET. As commercial firms and other regional network providers have taken over the operation of the major Internet arteries, NSF has withdrawn from the backbone business.NSF also coordinated a service called InterNIC, which registered all addresses on the Internet so that data could be routed to the right system. This service has now been taken over by Network Solutions, Inc., in cooperation with NSF.How the Web WorksThe World Wide Web, the graphical portion of the Internet, is the most popular part of the Internet by far. Once you spend time on the Web,you will begin to feel like there is no limit to what you can discover. The Web allows rich and diverse communication by displaying text, graphics, animation, photos, sound and video.So just what is this miraculous creation? The Web physically consists of your personal computer, web browser software, a connection to an Internet service provider, computers called servers that host digital data and routers and switches to direct the flow of information.The Web is known as a client-server system. Your computer is the client; the remote computers that store electronic files are the servers. Here's how it works:Let's say you want to pay a visit to the the Louvre museum website. First you enter the address or URL of the website in your web browser (more about this shortly). Then your browser requests the web page from the web server that hosts the Louvre's site. The Louvre's server sends the data over the Internet to your computer. Your web browser interprets the data, displaying it on your computer screen.The Louvre's website also has links to the sites of other museums, such as the Vatican Museum. When you click your mouse on a link, you access the web server for the Vatican Museum.The "glue" that holds the Web together is called hypertext and hyperlinks. This feature allow electronic files on the Web to be linked so you can easily jump between them. On the Web, you navigate through pages of information based on what interests you at that particular moment, commonly known as browsing or surfing the Net.To access the Web you need web browser software, such as Netscape Navigator or Microsoft Internet Explorer. How does your web browser distinguish between web pages and other files on the Internet? Web pages are written in a computer language called Hypertext Markup Language or HTML.Some Web HistoryThe World Wide Web (WWW) was originally developed in 1990 at CERN, the European Laboratory for Particle Physics. It is now managed by The World Wide Web Consortium, also known as the World Wide Web Initiative.The WWW Consortium is funded by a large number of corporate members, including AT&T, Adobe Systems, Inc., Microsoft Corporation and Sun Microsystems, Inc. Its purpose is to promote the growth of the Web by developing technical specifications and reference software that will be freely available to everyone. The Consortium is run by MIT with INRIA (The French National Institute for Research in Computer Science) acting as European host, in collaboration with CERN.The National Center for Supercomputing Applications (NCSA) at the University of Illinois at Urbana-Champaign, was instrumental in the development of early graphical software utilizing the World Wide Web features created by CERN. NCSA focuses on improving the productivity of researchers by providing software for scientific modeling, analysis, and visualization. The World Wide Web was an obvious way to fulfill that mission. NCSA Mosaic, one of the earliest web browsers, was distributed free to the public. It led directly to the phenomenal growth of the World Wide Web.Understanding Web AddressesYou can think of the World Wide Web as a network of electronic files stored on computers all around the world. Hypertext links these resources together. Uniform Resource Locators or URLs are the addresses used to locate thesefiles. The information contained in a URL gives you the ability to jump from one web page to another with just a click of your mouse. When you type a URL into your browser or click on a hypertext link, your browser is sending a request to a remote computer to download a file.What does a typical URL look like? Here are some examples:/The home page for study english.ftp:///pub/A directory of files at MIT* available for downloading.news:rec.gardens.rosesA newsgroup on rose gardening.The first part of a URL (before the two slashes* tells you the type of resource or method of access at that address. For example:•http - a hypertext document or directory•gopher - a gopher document or menu•ftp - a file available for downloading or a directory of such files•news - a newsgroup•telnet - a computer system that you can log into over the Internet•WAIS* - a database or document in a Wide Area Information Search database•file - a file located on a local drive (your hard drive)The second part is typically the address of the computer where the data or service is located. Additional parts may specify the names of files, the port to connect to, or the text to search for in a database.You can enter the URL of a site by typing it into the Location bar of your web browser, just under the toolbar.Most browsers record URLs that you want to use again, by adding them to a special menu. In Netscape Navigator, it's called Bookmarks. In Microsoft Explorer, it's called Favorites. Once you add a URL to your list, you can return to that web page simply by clicking on the name in your list, instead of retyping the entire URL.Most of the URLs you will be using start with http which stands for Hypertext Transfer Protocol*. http is the method by which HTML files are transferred over the Web. Here are some other important things to know about URLs:• A URL usually has no spaces.• A URL always uses forward slashes (//).If you enter a URL incorrectly, your browser will not be able to locate the site or resource you want. Should you get an error message or the wrong site, make sure you typed the address correctly.You can find the URL behind any link by passing your mouse cursor over the link. The pointer will turn into a hand and the URL will appear in the browser's status ba r, usually located at the bottom of your screen.Domain NamesWhen you think of the Internet, you probably think of ".com." Just what do those three letters at the end of a World Wide Web address mean?Every computer that hosts data on the Internet has a unique numerical address. For example, the numerical address for the White House is198.137.240.100. But since few people want to remember long strings of numbers, the Domain Name System (DNS)* was developed. DNS, a critical part of the Internet's technical infrastructure*, correlates* a numerical address to a word. To access the White House website, you could type its number into the address box of your web browser. But most people prefer to use "." In this case, the domain name is . In general, the three-letter domain name suffix* is known as a generictop-level domai n and describes the type of organization. In the last few years, the lines have somewhat blurred* between these categories..com - business (commercial).edu - educational.org - non-profit.mil - military.net - network provider.gov - governmentA domain name always has two or more parts separated by dots and typically consists of some form of an organization's name and the three-letter suffix. For example, the domain name for IBM is ""; the United Nations is "."If a domain name is available, and provided it does not infringe* on an existing trademark, anyone can register the name for $35 a year through Network Solutions, Inc., which is authorized to register .com, .net and .org domains. You can use the box below to see if a name is a available. Don't be surprised ifthe .com name you want is already taken, however. Of the over 8 million domain names, 85% are .com domains.ICANN, the Internet Corporation for Assigned Names and Numbers, manages the Domain Name System. As of this writing, there are plans to add additional top-level domains, such as .web and .store. When that will actually happen is anybody's guess.To check for, or register a domain name, type it into the search box.It should take this form: In addition to the generic top-level domains, 244 national top-level domains were established for countries and territories*, for example:.au - Australia.ca - Canada.fr - France.de - Germany.uk - United KingdomFor US $275 per name, you can also register an international domain name with Net Names. Be aware that some countries have restrictions for registering names.If you plan to register your own domain name, whether it's a .com or not, keep these tips in mind:The shorter the name, the better. (But it should reflect your family name, interest or business.)The name should be easy to remember.It should be easy to type without making mistakes.Remember, the Internet is global. Ideally, a domain name will "read" in a language other than English.Telephone lines were designed to carry the human voice, not electronic data from a computer. Modems were invented to convert digital computer signals into a form that allows them to travel over the phone lines. Those are the scratchy sounds you hear from a modem's speaker. A modem on theother end of the line can understand it and convert the sounds back into digital information that the computer can understand. By the way, the word modem stands for MOdulator/DEModulator.Buying and using a modem used to be relatively easy. Not too long ago, almost all modems transferred data at a rate of 2400 Bps (bits per second). Today, modems not only run faster, they are also loaded with features like error control and data compression. So, in addition to converting and interpreting signals, modems also act like traffic cops, monitoring and regulating the flow of information. That way, one computer doesn't send information until the receiving computer is ready for it. Each of these features, modulation, error control, and data compression, requires a separate kind of protocol and that's what some of those terms you see like V.32, V.32bis, V.42bis and MNP5 refer to.If your computer didn't come with an internal modem, consider buying an external one, because it is much easier to install and operate. For example, when your modem gets stuck (not an unusual occurrence), you need to turn it off and on to get it working properly. With an internal modem, that means restarting your computer--a waste of time. With an external modem it's as easy as flipping a switch.Here's a tip for you: in most areas, if you have Call Waiting, you can disable it by inserting *70 in front of the number you dial to connect to the Internet (or any online service). This will prevent an incoming call from accidentally kicking you off the line.This table illustrates the relative difference in data transmission speeds for different types of files. A modem's speed is measured in bits per second (bps). A 14.4 modem sends data at 14,400 bits per second. A 28.8 modem is twice as fast, sending and receiving data at a rate of 28,800 bits per second.Until nearly the end of 1995, the conventional wisdom was that 28.8 Kbps was about the fastest speed you could squeeze out of a regular copper telephoneline. Today, you can buy 33.6 Kbps modems, and modems that are capable of 56 Kbps. The key question for you, is knowing what speed modems your Internet service provider (ISP) has. If your ISP has only 28.8 Kbps modems on its end of the line, you could have the fastest modem in the world, and only be able to connect at 28.8 Kbps. Before you invest in a 33.6 Kbps or a 56 Kbps modem, make sure your ISP supports them.Speed It UpThere are faster ways to transmit data by using an ISDN or leased line. In many parts of the U.S., phone companies are offering home ISDN at less than $30 a month. ISDN requires a so-called ISDN adapter instead of a modem, and a phone line with a special connection that allows it to send and receive digital signals. You have to arrange with your phone company to have this equipment installed. For more about ISDN, visit Dan Kegel's ISDN Page.An ISDN line has a data transfer rate of between 57,600 bits per second and 128,000 bits per second, which is at least double the rate of a 28.8 Kbps modem. Leased lines come in two configurations: T1 and T3. A T1 line offers a data transfer rate of 1.54 million bits per second. Unlike ISDN, a T-1 line is a dedicated connection, meaning that it is permanently connected to the Internet. This is useful for web servers or other computers that need to be connected to the Internet all the time. It is possible to lease only a portion of a T-1 line using one of two systems: fractional T-1 or Frame Relay. You can lease them in blocks ranging from 128 Kbps to 1.5 Mbps. The differences are not worth going into in detail, but fractional T-1 will be more expensive at the slower available speeds and Frame Relay will be slightly more expensive as you approach the full T-1 speed of 1.5 Mbps. A T-3 line is significantly faster, at 45 million bits per second. The backbone of the Internet consists of T-3 lines. Leased lines are very expensive and are generally only used by companies whose business is built around the Internet or need to transfer massiveamounts of data. ISDN, on the other hand, is available in some cities for a very reasonable price. Not all phone companies offer residential ISDN service. Check with your local phone company for availability in your area.Cable ModemsA relatively new development is a device that provides high-speed Internet access via a cable TV network. With speeds of up to 36 Mbps, cable modems can download data in seconds that might take fifty times longer with a dial-up connection. Because it works with your TV cable, it doesn't tie up a telephone line. Best of all, it's always on, so there is no need to connect--no more busy signals! This service is now available in some cities in the United States and Europe.The download times in the table above are relative and are meant to give you a general idea of how long it would take to download different sized files at different connection speeds, under the best of circumstances. Many things can interfere with the speed of your file transfer. These can range from excessive line noise on your telephone line and the speed of the web server from which you are downloading files, to the number of other people who are simultaneously trying to access the same file or other files in the same directory.DSLDSL (Digital Subscriber Line) is another high-speed technology that is becoming increasingly popular. DSL lines are always connected to the Internet, so you don't need to dial-up. Typically, data can be transferred at rates up to 1.544 Mbps downstream and about 128 Kbps upstream over ordinary telephone lines. Since a DSL line carries both voice and data, you don't have to install another phone line. You can use your existing line to establish DSLservice, provided service is available in your area and you are within the specified distance from the telephone company's central switching office.DSL service requires a special modem. Prices for equipment, DSL installation and monthly service can vary considerably, so check with your local phone company and Internet service provider. The good news is that prices are coming down as competition heats up.Anatomy of a Web PageA web page is an electronic document written in a computer language called HTML, short for Hypertext Markup Language. Each web page has a unique address, called a URL* or Uniform Resource Locator, which identifies its location on the network.A website has one or more related web pages, depending on how it's designed. Web pages on a site are linked together through a system of hyperlinks* , enabling you to jump between them by clicking on a link. On the Web, you navigate through pages of information according to your interests.Home Sweet Home PageWhen you browse the World Wide Web you'll see the term home page often. Think of a home page as the starting point of a website. Like the table of contents of a book or magazine, the home page usually provides an overview of what you'll find at the website. A site can have one page, many pages or a few long ones, depending on how it's designed. If there isn't a lot of information, the home page may be the only page. But usually you will find at least a few other pages.Web pages vary wildly in design and content, but most use a traditional magazine format. At the top of the page is a masthead* or banner graphic*, then a list of items, such as articles, often with a brief description. The items in the list usually link to other pages on the website, or to other sites. Sometimes these links are highlighted* words in the body of the text, or are arranged in a list, like an index. They can also be a combination* of both. A web page can also have images that link to other content.How can you tell which text are links? Text links appear in a different color from the rest of the text--typically in blue and underlined. When you move yourcursor over a text link or over a graphic link, it will change from an arrow to a hand. The hypertext words often hint* at what you will link to.When you return to a page with a link you've already visited, the hypertext words will often be in a different color, so you know you've already been there. But you can certainly go there again. Don't be surprised though, if the next time you visit a site, the page looks different and the information has changed. The Web is a dynamic* medium. To encourage visitors to return to a site, some web publishers change pages often. That's what makes browsing the Web so excitingA Home (Page) of Your OwnIn the 60s, people asked about your astrological* sign. In the 90s, they want to know your URL. These days, having a web address is almost as important as a street address. Your website is an electronic meeting place for your family, friends and potentially*, millions of people around the world. Building your digital domain can be easier than you may think. Best of all, you may not have to spend a cent. The Web brims with all kinds of free services, from tools to help you build your site, to free graphics, animation and site hosting. All it takes is some time and creativity.Think of your home page as the starting point of your website. Like the table of contents of a book or magazine, the home page is the front door. Your site can have one or more pages, depending on how you design it. If there isn't a lot of information just yet, your site will most likely have only a home page. But the site is sure to grow over time.While web pages vary dramatically* in their design and content, most use a traditional magazine layout. At the top of the page is a banner graphic. Next comes a greeting and a short description of the site. Pictures, text, and links to other websites follow.If the site has more than one page, there's typically a list of items--similar to an index--often with a brief description. The items in the list link to other pages on the website. Sometimes these links are highlighted words in the body of the text. It can also be a combination of both. Additionally, a web page may have images that link to other content.Before you start building your site, do some planning. Think about whom the site is for and what you want to say. Next, gather up the material that you wantto put on the site: write the copy, scan the photos, design or find the graphics. Draw a rough layout on a sheet of paper.While there are no rules you have to follow, there are a few things to keep in mind:•Start simply. If you are too ambitious at the beginning, you may never get the site off the ground. You can always add to your site.•Less is better. Most people don't like to read a lot of text online. Break it into small chunks.•Use restraint. Although you can use wild colors and images for the background of your pages, make sure your visitors will be able to readthe text easily.•Smaller is better. Most people connect to the Internet with a modem.Since it can take a long time to download large image files, keep the file sizes small.•Have the rights. Don't put any material on your site unless you are sure you can do it legally. Read Learn the Net's copyright article for moreabout this.Stake Your ClaimNow it's time to roll up your sleeves and start building. Learn the Net Communities provides tools to help you build your site, free web hosting, and a community of other homesteaders.Your Internet service provider may include free web hosting services with an account, one alternative to consider.Decoding Error MessagesAs you surf the Net, you will undoubtedly find that at times you can't access certain websites. Why, you make wonder? Error messages attempt to explain the reason. Unfortunately, these cryptic* messages baffle* most people.We've deciphered* the most common ones you may encounter.400 - Bad RequestProblem: There's something wrong with the address you entered. You may not be authorized* to access the web page, or maybe it no longer exists.Solution: Check the address carefully, especially if the address is long. Make sure that the slashes are correct (they should be forward slashes) and that all the names are properly spelled. Web addresses are case sensitive, socheck that the names are capitalized in your entry as they are in the original reference to the website.401 - UnauthorizedProblem: You can't access a website, because you're not on the guest list, your password is invalid or you have entered your password incorrectly.Solution: If you think you have authorization, try typing your password again. Remember that passwords are case sensitive.403 - ForbiddenProblem: Essentially the same as a 401.Solution: Try entering your password again or move on to another site.404 - Not FoundProblem: Either the web page no longer exists on the server or it is nowhere to be found.Solution: Check the address carefully and try entering it again. You might also see if the site has a search engine and if so, use it to hunt for the document. (It's not uncommon for pages to change their addresses when a website is redesigned.) To get to the home page of the site, delete everything after the domain name and hit the Enter or Return key.503 - Service unavailableProblem: Your Internet service provider (ISP) or your company's Internet connection may be down.Solution: Take a stretch, wait a few minutes and try again. If you still have no luck, phone your ISP or system administrator.Bad file requestProblem: Your web browser may not be able to decipher the online form you want to access. There may also be a technical error in the form.Solution: Consider sending a message to the site's webmaster, providing any technical information you can, such as the browser and version you use.Connection refused by hostProblem: You don't have permission to access the page or your password is incorrect.Solution: Try typing your password again if you think you should have access.Failed DNS lookupProblem: DNS stands for the Domain Name System, which is the system that looks up the name of a website, finds a corresponding number (similar to a phone number), then directs your request to the appropriate web server on theInternet. When the lookup fails, the host server can't be located.Solution: Try clicking on the Reload or Refresh button on your browser toolbar. If this doesn't work, check the address and enter it again. If all else fails, try again later.File contains no dataProblem: The site has no web pages on it.Solution: Check the address and enter it again. If you get the same error message, try again later.Host unavailableProblem: The web server is down.Solution: Try clicking on the Reload or Refresh button. If this doesn't work, try again later.Host unknownProblem: The web server is down, the site may have moved, or you've been disconnected from the Net.Solution: Try clicking on the Reload or Refresh button and check to see that you are still online. If this fails, try using a search engine to find the site. It may have a new address.Network connection refused by the serverProblem: The web server is busy.Solution: Try again in a while.Unable to locate hostProblem: The web server is down or you've been disconnected from the Net.Solution: Try clicking on the Reload or Refresh button and check to see that you are still online.Unable to locate serverProblem: The web server is out-of-business or you may have entered the address incorrectly.Solution: Check the address and try typing it again.Web BrowsersA web browser is the software program you use to access the World Wide Web, the graphical portion of the Internet. The first browser, called NCSA Mosaic, was developed at the National Center for Supercomputing Applications in the early '90s. The easy-to-use point-and-click interface*helped popularize the Web, although few then could imagine the explosive growth that would soon occur.Although many different browsers are available, Microsoft Internet Explorer* and Netscape Navigator* are the two most popular ones. Netscape and Microsoft have put so much money into their browsers that the competition can't keep up. The pitched battle* between the two companies to dominate* the market has lead to continual improvements to the software. Version 4.0 and later releases of either browser are excellent choices. (By the way, both are based on NCSA Mosaic.) You can download Explorer and Navigator for free from each company's website. If you have one browser already, you can test out the other. Also note that there are slight differences between the Windows and MacIntosh* versions.You can surf to your heart's content, but it's easy to get lost in this electronic web. That's where your browser can really help. Browsers come loaded with all sorts of handy features. Fortunately, you can learn the basics in just a few minutes, then take the time to explore the advanced functions.Both Explorer and Navigator have more similarities than differences, so we'll primarily cover those. For the most up-to-date information about the browsers, and a complete tutorial, check the online handbook under the Help menu or go to the websites of the respective* software companies.Browser AnatomyWhen you first launch your web browser, usually by double-clicking on the icon on your desktop, a predefined web page, your home page, will appear. With Netscape Navigator for instance, you will be taken to Netscape's NetCenter.•The Toolbar （工具栏）The row of buttons at the top of your web browser, known as the toolbar, helps you travel through the web of possibilities, even keeping track ofwhere you've been. Since the toolbars for Navigator and Explorer differ slightly, we'll first describe what the buttons in common do:o The Back button returns you the previous page you've visited.o Use the Forward button to return to the page you just came from.o Home takes you to whichever home page you've chosen. (If you haven't selected one, it will return you to the default home page,usually the Microsoft or Netscape website.)。
计算机语言中英双语对照（doc）
2 pages 双页a drive A驱abnormal execution 异常运行abnormal termination 异常终止abort function 中止函式absolute coordinates 绝对座标absolute path 绝对路径absolute position 绝对地址absolute positioning 绝对位置absolute value 绝对值abstract base class 抽象基底类abstract class 抽象类abstract data type 抽象数据类型abstract declarator 抽象宣告符abstraction 抽象性accelerator editor 加速键编辑器accelerator key 加速键accelerator mapping 加速键映射accelerator resource 对应键资源accelerator table 对应键镜像表accent sensitive 区分腔调字access control 访问控制access date 访问时间access function 访问函式access key 便捷键access mask 访问掩码access mode 访问模式access permission 访问权限access permition 访问权限access privileges 访问权限access right 访问权限access specifier 访问规范access time 访问时间access will be granted 授权访问access 访问access-control entry 访问控件(ACE) accessiblity domain 访问范围定义域accessiblity 可访问性accessor function 访问子函式accessor type 访问子类别accessories 附件accessories 附件according file 根据文件account policy 帐号政策account type 帐号类型accumulator 累加器acquire printer ports 捕获打印机端口action provider component 动作供应商组件action query 操作型查询action table 操作表activate object 激活对象activate request 激活要求activate task list 激活任务列表activate this window 激活这个窗口activation Key 激活金钥activation 激活activator 激活符active Document 主动式文档active HTML Documents 主动式HTML 文档active Title Bar Text 活动窗口的标题列文本active Title Bar 活动窗口的标题列active break point 作用断开点active cell 作用单元格active components 活动组件active content 主动式内容active context handle 主动式内容控制句柄active document applications 主动式文件应用程序active document server 主动式文件伺服程序active document support 主动式文件支持active document 活动文档active screen buffer 作用中屏幕缓冲区active state 活动状态active window caption color 活动窗口的标题颜色active window 活动窗口active 活动actual argument 实质参量actual parameter list 实质参数列表acyclic graph 非循环图ad banner 广告标志adapter 适配器add Existing Item 添加现有项目add Existing Project 添加现有项目add Folder 添加文件夹add Item 添加项目add as 添加为add device driver 添加驱动程序add new Item 添加新项目add new Project 添加新的项目add new Solution Item 添加新的方案项目add new hardware 添加新硬件add new 添加新的add personal mailbox 增添个人信箱add to Output 添加至输出add to Solution 添加至解决方案add-In 加载功能add-ins 加载项add/Remove 增添/移除add/remove program 增添/移除程序add/remove 添加/移除addition operator 加法运算符additional 附加的additive operator 加法类运算符address book 地址簿address conflict 地址冲突address mode 地址模式address restriction 地址限制address space 编址空间address space 地址空间address 地址address 编址address-of operator 取地址运算符addressing mode 编址模式addressing 编址adjust column 调整列宽administration console 管理主控台administrator account 系统管理人帐户administrator 管理人advanced 高级after service 跟踪服务agent 代理程序aggregate Field 汇总数据区域aggregate function 汇总函式aggregate object 汇总对象aggregate query 汇总查询aggregate type 汇总类型aggregate 汇总aggregation 汇总alarm 警报album 相簿alert boxes 警报框algorithm 算法alias 别名aliasing 别名aliasing 锯齿align center 居中对齐align left 左对齐align right 右对齐align text 对齐文字align to grid 均匀排列all files 全部文件all types 全部类型allocator 分派器allow 允许alphabetic 字母顺序already removed 已被删除alternate text 替代文字alternative text 替代文本ambiguity 模棱两可ambiguous expression 模棱两可的表达式analog 模拟analog-digital 模拟数字analyzer 分析器anchor 锚定angle bracket 角括弧animated button 动画按钮animated cursor 动画光标animation control 动画控件annotation 附注anonymous Logins 匿名登录anonymous class 匿名类anonymous structure 匿名结构anonymous union 匿名等位ansi C Compliance 符合ANSI C 的规范ansi string ANSI 字符串answer failed 应答失败answer mode 应答方式answer now 开始应答answer timeout 应答超时antilogarithm 反对数appearance scheme 外观方案appearance 外观application Workspace 应用程序工作区application class 应用程序类application framework 应用程序框架application queue 应用程序队列application walkthrough 应用程序逐步解说application 应用程序archive file 压缩文件are you sure you want to change 确实要更改are you sure 确实要argument constant 参量常量argument macros 参量宏argument type 参量类型argument types 参量类型argument 参量arithmetic shift 算术移位arrange Tables 排列数据表arrange buttons 排列按钮arrange icons 排列图标arrange selection 排列选定范围array covariance 数组共异变量array pointer 数组指标array type 数组类型array 数组组织array 数组arrow key 箭头键artificial intelligence 人工智能artist 艺术家名ascii character ASCII 字符aspect ratio 外观比例assembly language 汇编语言assert 判断提示assertion 判断提示assignment operator 分配运算符assignment operator 分配运算符assignment statement 分配陈述式assignment 分配associated file extension 相关扩展名associated 关联的associativity 顺序关联性asynchable abort 非同步中止asynchable commit 非同步认可asynchronous call 非同步调用asynchronous notification 非同步告知asynchronous operation 非同步作业asynchronous processing 非同步处理asynchronous query 非同步查询asynchronous 非同步attribute 属性audio compressors 音频压缩器audio file 音频文件audio format 音频格式audio 音频audio-video interleaved 音频视频交错(A VI) audit 稽核authenticate 证实authenticated 已证实authenticating 正在证实authentication scheme 证实方案authentication 证实author 作者author 撰写authority 授权auto data tips 自动显示数据提示auto increment 自动增量auto indent 自动缩排auto list Members 自动列出成员automatic configuration 自动配置automatic object 自动对象automatic storage class 自动保存类automatic variable 自动变量automatic 自动automatically assign 自动分配automatically connect 自动连接automatically execute 自动运行autorollback 自动撤销auxiliary carry flag 辅助进制旗标auxiliary file 辅助文件available Add-Ins 可用的加载项available button 可用按钮average value 均值b drive B 驱back end 后端backbone 网络骨干background color 背景颜色background mode 背景模式background music 背景音乐background 背景backing windows 后备窗口backspace character 退格键backup file 备份文件backward compatibility 回溯兼容性backward one frame 退一帧backward referencing 反向引用balance 平衡balloon 汽球bandwidth 带宽banner frame 横幅框架banner 横幅bar chart 条状图barcode reader 条码读出器base address 基地址base class 基类base line 基线base type 基底类型basic configuration 基本配置basic events 基本事件basic object Events 基本对象事件basic web Events 基本Web 事件batch capture 批量采集batch file 批文件batch update 批次更新batch 批次baud rate 波特beep 蜂鸣behavior 行为best quality 最好质量best viable function 最佳可行函式best 最好beta version 测试版beta 测试版better quality 较好质量better 较好bevel 斜面beveled In 斜入beveled Out 斜出bidirectional system 双向系统bidirectional 双向bilingual 双语言binary operator 二元运算符binary search 二分查找binary tree 二叉树binary 二进制bind context 绑定内容binder 绑定器binding 绑定bit field 位区域bit 位bit-wise operators 位运算符bitmap file 位图文件bitmap resource 位图资源bitmap 位图bitmask 位掩码bitrate 比特率bitwise copy 逐位复制bitwise operator 位运算符bitwise 逐位blended 混色blending 混色block 列块blur 模糊boarding pass 登机牌boilerplate 未定案bookmark Text 书签文字bookmark 书签boolean 布尔值bootstrap program 启动载入程序bootstrapper 启动载入器border above 上方框线border style 边缘样式border 边界bottom margin 下方边界bound column 系结区域box In 盒状收缩box Out 盒状放射brace Matching 括号对称bracket 括号bracketed expression 有括号的表达式break user connection 断开用户连接breakpoint Text 断开点文字breakpoint 断开点bridge 网桥brief 简洁briefcase 公文包brightness 亮度bring Forward 上移一层bring to Front 提到最上层broadband 宽带broadcast address 广播地址broken link 断开的链接brouter 网桥路由器browse With 浏览方式browse buttons 浏览按钮组browse information file 浏览信息文件browse looks 浏览外观browse typefaces 浏览字体browser 浏览器brush 笔刷buddy Control 协同控件buffer 缓冲buffer 缓冲区build Info 构建信息build configuration 构建配置build tag 构建标签build 构建build-in type 内置数据类型build-in 内置builder 生成器building Block 建置列块built-in Menus 内置菜单built-in button 内置按钮bulk Copy Program 大量复制工具程序bulk RFX 大量数据录区域交换bulk record field exchange 大量数据录区域交换bulk row fetching 大量数据列采集burn CD-ROM 刻录bus 总线business Logic Layer 商务逻辑层business object 商务对象business process 商务处理流程business rule 商务规则business 商务区busy 正忙button Constants 按钮常量button Dark Shadow 按钮阴影较深部分button Face 按钮表面button Highlight 按钮反白显示button Light Shadow 按钮阴影较浅部分button Shadow 按钮的阴影button Text 按钮文字button control 按钮控件button 按钮by attach 按附件by attachment 按附件by city 按城市by company 按公司by date 按日期by description 按描述by discuss 按讨论by drive 按驱动器名by email 按电邮by flag 按旗标by folder 按文件夹by free space 按可用空间by location 按位置by mail 按信件by mailer 邮件程序by name 按名称by nickname 按昵称by origin 按源位置by priorities 按优先by properties 按特性by received 按收信by sender 按寄信人by sender 按发信人by sent 按寄信by server 按服务器by service 按服务by size 按大小by size 按从小到大by status 按状态by subject 按主题by taxi 打的by telephone 按电话by type 按类型by unread 按未读byte array 字节数组byte 字节bytecode Bytecodec calling convention C 调用惯例c linkage specifier C 连系规范cab Project Node 数据包项目节点cabinet Builder 数据包文件生成器cabinet 数据包cache 缓存cache 缓存区calculator 计算器calendar 日历call Stack 调用栈call Tree 调用树状图call level interface 调用级别介面call operator 调用运算符call return 调用返回callback field 回调区域callback function 回调函式calling convention 调用惯例calling external procedures 调用外部程序calling sequence 调用顺序camcoder 摄像机cancel key 取消键candidate function 候选函数cannot access 不能访问cannot open 不能打开canvas 画布caption 标题capture file 捕捉文件captured video 已采集视频caret 插入号carriage return character 回车符carriage return 回车符carriage return-linefeed 复位换行组(CRLF) cascade Menus 层叠式菜单cascade display window 层叠窗口cascade window 层叠窗口cascade 串联cascade 重叠窗口cascading Style Sheets 阶层式样式表case sensitive 全字匹配case 实例casette 盒式录音带casting 转型catch block Catch 列块categorized 分类causality ID 因果IDcd audio properties CD 音频特性cd audio CD 音频cd-rom drive 光驱cd-rom generation CD-ROM 压制cd-rom recorder 刻录机cd-rom 光盘cell 单元格center Horizontally 水平居中center Screen 屏幕中央center V ertically 垂直居中center in Form 对齐表单中央center justify 居中certificate authority 凭证授权certificate manager 凭证管理器certificate of Authenticity 真品凭证certificate properties 凭证特性certificate 凭证certification 凭证certify 认证chain 链change case 大小写转换change icon 更改图标change international options 更改国别设置change port 更改端口change region options 更改区域设置change scheme 更改方案change script 更改脚本change setting 更改设置数值change the position of window 改变窗口位置change the size of window 改变窗口大小channel Definition Format 频道定义格式(CDF) channel 频道char 字符character code 字符码character constant 字符常量character device names 驱动器的字母代号character index 字符索引character literal 字符常值character offset 字符位移character set 字符集character 字符character-mode application 文字模式应用程序charactor set 字符集charactor 字符chart sheet 图表工作表chart 图表check box 复选框check constraint 检查条件约束check mark 勾选标志check user name 验证用户名check 勾选check 检查checkbox 复选框checked 已选定checkerboard Across 横向棋盘式checkerboard Down 纵向棋盘式checkout local version 签出本机版本checksum 总和检查码child code 子程序代码child control 子控件child forms 子表单child process 子进程child window 子窗口children 子系chinese chractor 汉字chip 芯片chiseled In 凹刻chiseled Out 凸刻choose Class 选择类choose connection 链接选择chord 套索chunk wrapper 列块包装函式chunk 列块circle in 圆形收缩circle out 圆形放射circular dependencies 循环相依circular reference 循环参考cl environment variable CL 环境变量class ID 类标识项(CLSID)class Modules 类模块class View 类查看class body 类本体class browser 类浏览器class builder utility 类生成器工具class declaration 类定义class declaration 类声明class derivation list 类继承列表class factory 类工厂class files 类文件class header 类标头class hierarchy 类阶层class identifier 类标识项class initializer 类初始设置式class instance 类实例class library 类库class method 类方法程序class scope 类范围class template partial specializations 类模板偏特化class template specializations 类模板特化class template 类模板class variable 类变量class 类clause 子句clean machine 初始状态的计算机clear all 全部清除client application 客户端应用程序client area 客户端工作区client batch cursor library 客户端批量数据指标库client certificate 客户端验证client computer 客户端计算机client coordinates 客户端座标client extension 客户端扩充功能client item 客户端项client object 客户端对象client script 客户端脚本client site 客户端站点client tier 客户端层client 客户端client/server 主从架构client/server 客户端/服务器clip file 碎片文件clip path 裁剪路径clip 素材clipboard Ring 剪贴环clipboard format 剪贴板文件格式clipboard owner 剪贴板拥有人clipboard viewer 剪贴板查看器clipboard 剪贴板clipboard-viewer chain 剪贴板查看器链clipping precision 裁剪精确值clipping region 裁剪区域clipping 裁剪clone 克隆clone 克隆close and return 关闭并返回close region 临近工作区close the active document 关闭当前文档closing tag 结尾标志cls-compliant CLS 兼容cluster 丛集clustered index 丛集索引co-branded 联名coarse 粗略coclass coclasscode Librarian Explorer 代码管理器资源管理器code Librarian V iewer 代码管理器查看器code Librarian 代码管理器code Settings 代码撰写设置数值code V iew 代码查看code V iewer 代码查看器code Window Text 代码窗口文本code Window 代码窗口code base 代码基底code commenter 代码注解code components 代码组件code item 代码项目code library 代码库code manipulation objects 代码管理对象code page 代码页code panes 代码窗格code resource 代码资源code 代码code-Base 代码基底code-behind file 代码后置的文件code-behind 代码后置codec 编码解码器coercion 强制型转collaboration 共同作业collapse Parent 缩回上层collapsed item 摺叠项目collation 定序collection class 集合类collection editor 集合编辑器collection object 集合对象collection 集合collection 集合对象collection 群集color constants 颜色常量color gradient 颜色渐层color palette 色板color scheme 颜色方案color 颜色column headers 数据列标题column 数据列column 纵列column 区域combine clips 组合素材combine scenes 组合情景combo Box 组合框combo-box control 组合框控件command Button 命令按钮command Line Arguments 命令行的参量command Line Options 命令行参量的选项command Line 由命令行载入command Line 命令行command file 命令文件command handler 命令处理常式command identifiers 命令标识项command message 命令消息comment Text 备注文字comment delimiter 备注分隔符号comment 注释commit size 认可大小common Dialog 通用型对话框common Gateway Interface 通用闸道介面(CGI)common Object File Format 通用对象文件格式(COFF) common controls 通用控件common data record 通用数据录common dialog box 通用对话框compact executable file 压缩型态的可程序文件comparand 比较元compare file 比较文件comparer 比对符comparison operator 比较运算符compatible OLE Server 兼容的OLE 伺服程序compatible Object Application 兼容的对象应用程序compatible 兼容compatible 兼容的compilation unit 编译单位compilation 编译compile time 编译时间compile-time error 编译时期错误compiled resource file 编译资源文件compiler Defect Report 编译器缺失报告compiler 编译器complete object 终衍对象complex Instruction Set Computer 复杂命令集计算机(CISC) complex script 复杂脚本complex-Bound 复杂系结compliant 兼容component Gallery 组件展示廊component Load Balancing 组件负载平衡component Name 组件名称component Object Model 组件对象模型(COM) component Registrar 组件登录器component Services Explorer 组件服务总管component Tray 组件匣component Wizard 组件向导component code generator 组件代码生成器component object 组件对象component project 组件项目component selector 组件选定器component site 组件站点component software 组件软件component 组件compose buffer 撰写缓冲区composite control 复合控件composite moniker 复合型composite video input 复合视频输入composite video 复合视频compositing 复合compound document files 复合文件文件compound document 复合文件compound file 复合文件compound-assignment operator 复合设置运算符compressed SLIP 压缩SLIPcompression format 压缩格式compression scheme 压缩方法compression 压缩方式computer assisted translation 计算机辅助翻译computer name 计算机名computer 计算机concatenated key 串连索引键concatenation operator 串连运算符concrete 实在的concurrent connections 同时连接concurrent/concurrency 并行condition 条件conditional Compilation Arguments: 条件式编译的参量: conditional Section 条件区段conditional branching 条件分支conditional breakpoint 条件断开点conditional expression 条件表达式conditional watch 条件式监看conditional-expression operator 条件表达运算符condom 避孕套configuration completed 配置完成configuration data 配置数据configuration database 配置数据库configuration error 配置错误configuration file 配置文件configuration info 配置信息configuration manager 配置管理器configuration manager 配置管理器configuration parameters 配置参数configuration setting 配置设置数值configuration wizard 配置向导configuration 配置configured 配置的configuring new devices 配置新设备confirm folder replace 确认文件夹替换conflict ID 冲突IDconflict resolution 冲突的解决方式connect string 连接字符串connect to All 全部连接connectable object 可连接对象connected 连接上connecting to 连接到connecting 正在连接connection break 连接断开connection in use 使用中的连接connection lost 链接可能被断开connection oriented 连接导向connection point 连接点connection pooling 连接共用connection string 连接字符串connection 连接console 主控台const 常量constance 常量constant declarations 常量宣告constant expression 常量表达式constant propagation 常量传用constant 常量constraint 条件约束construction 建构construction 语法结构constructor 构造函数constructor 建构函式consult 谘询consultant company 谘询公司contained control 被收纳的控件container application 容器应用程序container program 容器程序container 容器container 集装箱containing type 包含类型contains invalid characters 内嵌无效的字符context help 内容帮助context identifier 内容标识码context menu 快捷菜单context menus 快显菜单context number 内容编号context operator 内容运算符context string 内容字符串context 上下文contrast 对比度control Library 控件库control Wizards 控件向导control bar 控制列control class 控件类control container 控件容器control device 控制设备control identifier 控制标识码control panel 控制面板control project 控件项目control property 控件特性control templates 控件模板control variable 控件变量control visual appearance 控件视觉外观control 控件controls toolbar 控件工具栏controls 控件convential memory 常规内存conversion function 转换函式conversion macros 转换宏conversion 转换convert object 转换对象cookie cookiecoordinate space 座标空间copy constructor 复制建构函式copy disk 复制磁盘copy propagation 复制传用copy 复本copyright 版权corner handle 角控点correlation ID 相互关联IDcpatch 中文化软体联盟crash machine 死机crawl 爬行create new document 创建新文档create storage elements 开辟存储区create title 创建字幕creating date 创建时间credits 开发小组critical section 关键区段cross compilation 交互编辑cross hair 十字光标cross-thread 跨线程crosstab query 交叉数据表查询crypto 加密currency 货币current Path 当前的路径current Setting 当前的设置数值current document 当前文档current icon 当前图标current position 当前位置current 当前cursor 光标custom control 自定义控件custom interface 自定义介面custom magnification 自定义放大custom resource template 自定义资源模板custom resource 自定义资源custom 自定义customize toolbox 自定义工具箱customize 自定义customized class 自定义类customized document 自定义文件cyclic Redundancy Check 循环冗余核对(CRC) cyclic reference 循环参考dao 数据访问对象(DAO)dashboard 仪表板data Access Object 数据访问对象(DAO)data Class 数据类data Control 数据控件data Member 数据成员data Object Wizard 数据对象向导data Report designer 数据报表设计工具data Source Locator 数据源定位器data Source 数据源data Type 数据类型data View 数据查看data adapter 数据配接器data binding agents 数据绑定代理程序data binding 数据绑定data breakpoint 数据断开点data command 数据命令data connection 数据连接data declaration 数据声明data entry page 数据键入页data field 数据区域data file 数据文件data grid 数据格data handle 数据句柄data link 数据链接data member string 数据成员字符串data point 数据点data provider 数据供应商data rate 数据传输速度data rate 数据传输率data segment 数据区段data source name 数据源名称data source tier 数据源层data store 数据存放区data stream 数据流data structure 数据结构data symbol 数据符号data table 数据数据表data transfer object 数据传输对象data 数据data-bound 数据系结data-definition query 数据定义查询database Diagrams 数据库图表database Registration wizard 数据库注册向导database Splitter Wizard 数据库拆分向导database class 数据库类database form 数据库表单database management system 数据库管理系统database object 数据库对象database project 数据库项目database role 数据库角色database schema 数据库结构描述database template 数据库模板database user 数据库用户database 数据库datagram socket 数据包套接字datagram 数据包dataset 数据集datasheet 数据工作表date and time picker 日期时间选择器date data type 日期数据类型date fomat 日期格式date 日期db project 数据库项目dbo DBOdde conversation information DDE 对谈信息dde conversation DDE 对谈dde link DDE 链接dde message DDE 消息dde method DDE 方法dde operation DDE 作业dde response DDE 响应ddi initiate DDI 初始ddl 数据定义语言dead code 无作用程序代码dead key 废键dead store 无作用保存体deadlock 锁死debug heap 调试堆积debug memory allocator 调试内存分派器debug monitor 调试监视器debug object Debug 对象debug register 调试暂存器debug terminal 调试终端debug version 调试版本debugger 调试工具debugging Integration 调试集成debugging event 调试事件debugging information 调试信息decimal 10 进制declaration statement 声明陈述式declaration type 声明类型declarations 声明declarator 声明符decode 解码decoder 解码器decorated name 装饰名称decrement 降序decrypt 解密deduction 推导deep copy configuration 深层复制配置deep copy 深层复制default access permissions 默认访问权限default argument 默认参量default constructor 默认建构函式default hash code provider 默认杂凑代码供应商default message processing 默认消息处理default object handler 默认对象处理常式default security 默认安全性default value 默认值default window procedure 默认窗口程序default 默认defaults for Double-clicking 双击的默认definition 定义deformatter 变形项defrag status 碎片整理状态defrag 磁盘清理程序defragment now 开始整理delay-loaded 延迟载入delayed rendering 延迟渲染delayed send 发送延迟delegate type 委派类型delegate 委派delete query 删除查询delimiter 分隔符号dependency File 相依文件dependency 相依性dependent file 相依文件dependent object 相依对象dependent project 相关项目deployment subwizard 部署子向导deployment wizard 部署向导dereference operator 解参考算符dereference 解参考dereferencing operator 取值运算符dereferencing 取值derived class 子类derived class 派生类derived class 衍生类derived type 衍生类型descendant window 子代窗口descendant 子代descending 降序descending 递减排序description block 描述列块description 描述descriptor 描述项deserialization 还原序列化design Element 设计项目design Master 设计主复本design Surface 设计介面design by contractdesign mode 设计模式design pattern 设计模式design time 设计时期design-Time-Only 仅限设计时期design-time control 设计时期控件(DTC) design-time object 设计时期对象designator 指示项designer host 设计工具主应用程序designer 设计工具desktop Management Interface 桌面管理介面desktop computer 台式计算机desktop window 桌面窗口desktop 台式机desktop 桌面destination Language 目标语系destination applications 接收端应用程序destination disk drive is full 目标盘已满destination label 目标端标签destination rectangle 目标矩形destination 目标destination 目标端destruction 析构destructor 析构器detail information 详细信息detail table 详细数据表details View 明细查看detected 检测到developer 开发人development environment 开发环境development server 程序开发服务器device Control Block 控制列块数据(DCB)device context 设备内容device driver 设备驱动程序device manager 设备管理程序device name 设备名device offline 设备离线device ready 设备就绪device 设备device-dependent bitmap 与设备相关位图device-independent bitmap file 与设备无关位图文件device-independent bitmap 与设备无关位图device-independent 与设备无关device-mode setting 设备模式设置diacritic 变音符diagnostic services 诊断服务diagram 图表dial on demand 视需要拨号dialing rules 区号规则dialog Bar 对话框列dialog Data Exchange 对话数据交换(DDX)dialog Data V alidation 对话数据验证(DDV)dialog box 对话框dialog containers 对话框容器dialog editor 对话框编辑器dialog file 对话框原始文件dialog template 对话框模板dialog unit 对话框单位(DLU)dialog-based application 对话框架构应用程序dialog-based architecture 对话框程序架构dialog-based 对话框架构dialup network adapter 拨号网络适配器dialup networking connection 拨接网路连接dialup server 拨号服务器dib 与设备无关的位图(DIB)diff-Merge Custom Marker Service 差异合并自定义标志服务diff-Merge Editor 差异合并编辑器diff-Merge UI Broker Service 差异合并UI 仲介服务diff/Merge Undo Unit 差异/合并撤销单位diff/Merge 差异/合并difference V iewer 差异查看器different project 不同的项目digital Dashboard 点限定表达式digital camera 数字相机digital clock 数字时钟digital signature 数位签章digital 数字digits 数字digraph 双并词dimension 维度dimensions 尺度dimmed text 无效文本dimmed 暗灰色的dinosaur 恐龙diode 二极管direct acyclic graphic 有向非循环图direct cable connection 直接电缆连接direct connect 直接连接direct mode 直接访问模式direction flag 方向旗标direction 方向directive 指示符directories 目录directory Types 目录类型directory 目录dirlistBox 目录列表方块disabled Text 禁用的文本disassembler 反组译工具disassembly Window 反组译码窗口disclaimer 免责声明disconnect from All 全部断开连接disconnect 断开discovery 探索discussion server 讨论服务器disjoint figure 断续图形disk drive 驱动器disk volumn 磁盘卷标disk 磁盘dispatch identifier 分派标识符dispatch interface 分派介面dispatch map 分派映射dispersed 分布式dispinterface 分配介面display adapter 显示适配器display card 显卡display device context 显示设备内容display file 显示文件display full pages 显示整个页面display help 显示帮助display setting 显示设置数值dispose event 处置事件distributed Component Object Model 分布式组件对象模型(DCOM) distributed Computing Environment 分布式生成环境(DCE) distributed Management Environment 分布式管理环境distributed Transaction Coordinator 分布式交易协调器(DTC) distributed application 分布式应用程序distribution 分配divider style 拆分线样式division 内文列块dll DLLdll 动态链接库dockable toolbar 可停驻工具栏dockable 可停驻docked Window 停驻窗口docked toolbar 停驻工具栏docked 停驻document Routing Wizard 文档传阅向导document Template Strings 文档模板字符串document item 文档项目document length 文档长度document menu 文档菜单document name 文档名document object 文档对象document template 文档模板document window 文档窗口document 文档documents collection 文档集合documents property 文档特性domain management 域管理domain name 域名称domain surfix 域后缀domain 域dominant control 主控件don't delete 不删除don't show me this dialog again 不要再显示此对话框dos command line DOS 命令行dot operator 点运算符double-byte character set 双字节字符集(DBCS)double-precision 双精度double-sided horizontal printing 双面水平打印double-sided vertical printing 双面垂直打印down Arrow 向下键down key 向下键draft print quality 草稿般的打印质量draft 草稿drag and drop 拖放drag mode 拖放模式drag-and-drop 拖放draw Opaque 不透明处理draw object 绘制对象drive bar 磁盘栏drive configuration 驱动器配置drive 磁盘driveListBox 磁盘列表方块driver development kits 驱动程序开发套件(DDK) driver disk 驱动盘driver letter 驱动器号driver license 车照driver 驱动程序drop Down 下拉drop publications 卸除发行物drop source 置放源drop target 置放目标drop-down combo box 下拉式组合方块drop-down list 下拉式列表drop-down menu 下拉式菜单dropped frame 失帧dsn 数据源名称(DSN)dsn-less connection 无DSN 连线dual interface 双重介面dummy 空的dump device 倾印设备dump movie 输出电影duplicate definition 重复定义duplicate procedure name 程序名称重复duplicated file 重复文件duration 持续时间dynamic Data Exchange 动态数据交换(DDE) dynamic HTML 动态超文本标志语言dynamic binding 动态绑定dynamic creation 动态创建dynamic cursor 动态数据指标dynamic link 动态链接dynamic linking library 动态链接库dynamic priority 动态优先权dynamic property 动态特性dynamic splitter window 动态分隔窗口dynamic type information 动态类型信息dynamic-link library file 动态链接库文件dynamic-link library 动态链接库dynamic-type 动态类型dynaset type recordset 动态集类型的数据录集dynaset-type recordset 动态集类型的数据录集dynaset-type 动态集类型early-binding 早期绑定ease of Use 简易操作easyupdate 易用更新eclipse 椭圆edit Project Configurations 编辑项目配置edit and Continue 编辑后继续edit buffer 编辑缓冲区edit control 编辑控件edit file 编辑文件edit link 编辑链接edit point 编辑点editor Format 撰写风格editor 编辑器eekday 非假日effect 特技effective address 有效地址element 元素email program 信件程序embedded item 内嵌项目embedded object 内嵌对象emboss 浮雕empty recycle Bin 清空回收站enable single-click URL navigation 启用单击方式的URL 巡览enabled 启用状态encapsulate 封装encapsulated interface pointer 封装的介面指标encapsulation 封装enclosed class 被封入类enclosing classenclosing class 封入类enclosing tag 封入标志enclosing type 封入类型encode 编码encoding 编码方式encompassed type 被包括类型encompassing type 包括类型。
89S52系列微控制器中英文对照外文翻译文献
中英文对照外文翻译文献(文档含英文原文和中文翻译)89S52 series microcontrollerThe 89S52 family of micro controllers is based on an architecture which is highly optimized for embedded control systems. It is used in a wide variety of applications from military equipment to automobiles to the keyboard on your PC. Second only to the Motorola 68HC11 in eight bit processors sales, the 89S52 family of microcontrollers is available in a wide array of variations from manufacturers such as Intel, Philips, and Siemens. These manufacturers have added numerous features and peripherals to the 89S52 such as I2C interfaces, analog to digital converters, watchdog timers, and pulse width modulated outputs. Variations of the 89S52 with clock speeds up to 40MHz and voltage requirements down to 1.5 volts are available. This wide range of parts based on one core makes the 89S52 family an excellent choice as the base architecture for a company's entire line of products since it can perform many functions and developers will only have to learn this one platform.The basic architecture consists of the following features:1.an eight bit ALU2.32 descrete I/O pins (4 groups of 8) which can be individually accessed3.two 16 bit timer/counters4.full duplex UART5.6 interrupt sources with 2 priority levels6.128 bytes of on board RAM7.separate 64K byte address spaces for DATA and CODE memoryOne 89S52 processor cycle consists of twelve oscillator periods. Each of the twelve oscillator periods is used for a special function by the 89S52 core such as op code fetches and samples of the interrupt daisy chain for pending interrupts. The time required for any 89S52 instruction can be computed by dividing the clock frequency by 12, inverting that result and multiplying it by the number of processor cycles required by the instruction in question. Therefore, if you have a system which is using an 11.059MHz clock, you can compute the number of instructions per second by dividing this value by 12. This gives an instruction frequency of 921583 instructions per second. Inverting this will provide the amount of time taken by each instruction cycle (1.085 microseconds).1.Memory OrganizationThe 89S52 architecture provides the user with three physically distinct memory spaces which can be seen in Figure A - 1. Each memory space consists of contiguous addresses from 0 to the maximum size, in bytes, of the memory space. Address overlaps are resolved by utilizing instructions which refer specifically to a given address space. The three memory spaces function as described below.2.The CODE SpaceThe first memory space is the CODE segment in which the executable program resides. This segment can be up to 64K (since it is addressed by 16 address lines) . The processor treats this segment as read only and will generate signals appropriate to access a memory device such as an EPROM. However, this does not mean that the CODE segment must be implemented using an EPROM. Many embedded systems these days are using EEPROM which allows the memory to be overwritten either by the 89S52 itself or by an external device. This makes upgrades to the product easy to do since new software can be downloaded into the EEPROM rather than having to disassemble it and install a new EPROM. Additionally, battery backed SRAM can be used in place of an EPROM. This method offers the same capability to upload new software to the unit as does an EEPROM, and does not have any sort of read/write cycle limitations such as an EEPROM has. However, when the battery supplying the RAM eventually dies, so does the software in it.Using an SRAM in place of an EPROM in development systems allows for rapid downloading of new code into the target system. When this can be done, it helps avoid the cycle of programming/testing/erasing with EPROM, and can also help avoid hassles over an in circuit emulator which is usually a rare commodity.In addition to executable code, it is common practice with the 89S52 to store fixed lookup tables in the CODE segment. To facilitate this, the 89S52 provides instructions which allow rapid access to tables via the data pointer (DPTR) or the program counter with an offset into the table optionally provided by the accumulator. This means that oftentimes, a table's base address can be loaded in DPTR and the element of the table to access can be held in the accumulator. The addition is performed by the 89S52 during the execution of the instruction which can save many cycles depending on the situation. An example of this is shown later in this chapter in.3.The DATA SpaceThe second memory space is the 128 bytes of internal RAM on the 89S52, or the first 128 bytes of internal RAM on the 89S52. This segment is typically referred to as the DATA segment. The RAM locations in this segment are accessed in one or two cycles depending on the instruction. This access time is much quicker than access to the XDATA segment because memory is addressed directly rather than via a memory pointer such as DPTR which must first be initialized. Therefore, frequently used variables and temporary scratch variables are usually assigned to the DATA segment. Such allocation must be done with care, however, due to the limited amount of memory in this segment.Variables stored in the DATA segment can also be accessed indirectly via R0 or R1. The register being used as the memory pointer must contain the address of the byte to be retrieved or altered. These instructions can take one or two processor cycles depending on the source/destination data byte.The DATA segment contains two smaller segments of interest. The first sub segment consists of the four sets of register banks which compose the first 32 bytes of RAM. The 89S52 can use any of these four groups of eight bytes as its default register bank. The selection of register banks is changeable at any time via the RS1 and the RS0 bits in the Processor Status Word (PSW). These two bits combine into a number from 0 to 3 (with RS1 being the most significant bit) which indicates the register bank to be used. Registerbank switching allows not only for quick parameter passing, but also opens the door for simplifying task switching on the 89S52The second sub-segment in the DATA space is a bit addressable segment in which each bit can be individually accessed. This segment is referred to as the BDATA segment. The bit addressable segment consists of 16 bytes (128 bits) above the four register banks in memory. The 89S52 contains several single bit instructions which are often very useful in control applications and aid in replacing external combinatorial logic with software in the 89S52 thus reducing parts count on the target system. It should be noted that these 16 bytes can also be accessed on a "byte-wide" basis just like any other byte in the DATA space. 4.Special Function RegistersControl registers for the interrupt system and the peripherals on the 89S52 are contained in internal RAM at locations 80 hex and above. These registers are referred to as special function.Registers (or SFR for short). Many of them are bit addressable. The bits in the bit addressable SFR can either be accessed by name, index or bit address. Thus, you can refer to the EA bit of the Interrupt Enable SFR as EA, IE.7, or 0AFH. The SFR control things such as the function of the timer/counters, the UART, and the interrupt sources as well as their priorities. These registers are accessed by the same set of instructions as the bytes and bits in the DATA segment. A memory map of the SFRS indicating the registers.5.The IDATA Spac eCertain 89S52 family members such as the 89S52 contain an additional 128 bytes of internal RAM which reside at RAM locations 80 hex and above. This segment of RAM is typically referred to as the IDATA segment. Because the IDATA addresses and the SFR addresses overlap, address conflicts between IDATA RAM and the SFRs are resolved by the type of memory access being performed, since the IDATA segment can only be accessed via indirect addressing modes.6.The XDATA Space.The final 89S52 memory space is 64K in length and is addressed by the same 16 address lines as the CODE segment. This space is typically referred to as the external data memory space (or the XDATA segment for short). This segment usually consists of some sort of RAM (usually an SRAM) and the I/O devices or external peripherals to which the89S52 must interface via its bus. Read or write operations to this segment take a minimum of two processor cycles and are performed using either DPTR, R0, or R1. In the case of DPTR, it usually takes two processor cycles or more to load the desired address in addition to the two cycles required to perform the read or write operation. Similarly, loading R0 or R1 will take minimum of one cycle in addition to the two cycles imposed by the memory access itself. Therefore, it is easy to see that a typical operation with the XDATA segment will, in general, take a minimum of three processor cycles. Because of this, the DATA segment is a very attractive place to store any frequently.It is possible to fill this segment entirely with 64K of RAM if the 89S52 does not need to perform any I/O with devices in its bus or if the designer wishes to cycle the RAM on and off when I/O devices are being accessed via the bus. Methods for performing this technique will be discussed in chapters later in this book.7.On-Board Timer/CountersThe standard 89S52 has two timer/counters (other 89S52 family members have varying amounts), each of which is a full 16 bits. Each timer/counter can be function as a free running timer (in which case they count processor cycles) or can be used to count falling edges on the signal applied to their respective I/O pin (either T0 or T1). When used as a counter, the input signal must have a frequency equal to or lower than the instruction cycle frequency divided by 2 (ie: the oscillator frequency /24) since the incoming signal is sampled every instruction cycle, and the counter is incremented only when a 1 to 0 transition is detected (which will require two samples). If desired, the timer/counters can force a software interrupt when they overflow.The TCON (Timer Control) SFR is used to start or stop the timers as well as hold the overflow flags of the timers. The TCON SFR is detailed below in Table A-7. The timer/counters are started or stopped by changing the timer run bits (TR0 and TR1) in TCON. The software can freeze the operation of either timer as well as restart the timers simply by changing the Trx bit in the TCON register. The TCON register also contains the overflow flags for the timers. When the timers overflow, they set their respective flag (TF0 or TF1) in this register. When the processor detects a 0 to 1 transition in the flag, an interrupt occurs if it is enabled. It should be noted that the software can set or clear this flag at any time. Therefore, an interrupt can be prevented as well as forced by the software.8.Microcomputer interfaceA microcomputer interface converts information between two forms .Outside themicrocomputer the information handled by an electronic system exists as a physical signals, but within the program , it is represented numerically . The function of any interface can be broken down into a number of operations which modify the data in some way ,so than the process of conversion between the external and internal forms is carried out in a number or steps.This can be illustrated by means of an example such as than or Fig 10-1,which shows an interface between a microcomputer and a transducer producing a continuously variable analog signal. transducers often produce very small out requiring amply frication, or they may generate signals .in a form that needs to be converted again before being handled by the rest of the system .For example ,many transducers these variable resistance which must be converted to a voltage by a special circuit. This process of converting the transducer output into a voltage4 signal which can be connected to the rest of the system is called signal conditioning .In the example of Figure 10-1, the sigma conditioning section translates the range lf voltage or current signals from the transducer to one which can be converted to digital forum by an analog-to-digital converter.Fig 10-1 output InterfaceAnalog-to-digital –digital converter (ADC) is used to convert a continuously variable signal to a corresponding digital forum which can take any one of a fixed number of possible binary values .If the output lf the transducer does not vary continuously ,no ADC is necessary. In this case the signal conditioning section must convert the incoming signal to a form which can be connected directly to the next part of the interface, the input/output section lf the microcomputer itself.The I/O section converts digital “on/off” voltage signals to a form which can be presented to the processor via the via the system buses .Here the state of each input line whether i t is “on” or “off”, is indicated by a corresponding “1” or “0”.In the line inputs which have been converted to digital form, the patterns of ones and zeros in the internal representation will form binary numbers corresponding to the quantity being converted.The “raw” numbers from the interface are limited by the design of the interface circuitry and they often require linearization and scaling to produce values suitable for use in the main program. For example ,the interface night be rise to convert temperatures in theTransducer Signal conditioning ADC I/O Sectionrange –20 to – +50 dress, buy the numbers produced by an 8-bit converter will lie in the range 0 to 255.Obviously it is easier , the programmer…s point of view to deal directly with temperature rather than to work out the equivalent of any given temperature in terms of the numbers produced by the ADC .Every time the interface is used to read a transducer ,the same operations must be carried out to convert the input number into a more convenient form .Addtionarly ,the operation of some interfaces requires control signals to be passed between the microcomputer and components of the interface ,For these reasons it is normal to use a subroutine to loot after the detailed operation of the interface and carry out any scaling and /or linearization which might be needed.Output interfaces take a similar form (Fig.10-2), the biopic difference being that here the flow of information is in the opposite direction; it is passed from the program to the outside world. In this case the program may call an output subroutine which supervises the operation of the interface and performs the scaling numbers which may be needed for a digital-to-analog converter (DAC) .This subroutine passes information in term to an out analog form using a DAC .Finally the signal is conditioned (usually amplified ) to a form suitable for operating an actuator.Fig 10-2 output InterfaceThe signals used within microcomputer circuits are almost always too small to be connected directly to the “outside world ”and some king of interface must be used to translate them to a more appropriate form .The design of section of interface circuits is one of the most important tasks facing the engineer wishing to apply microcomputers. We have seen that in microcomputers information is represented as discrete patterns of bits ;this digital form is most useful when the microcomputer is to be connected to equipment which can only be switched on or off, where each bit might represent the state of a switch or actuator.Care must be taken when connecting logic circuits to ensure that their logic levels and current ratings are compatible .The output voltages produced by a logic circuit are normally specified in terms of worst case values when sourcing or sinking the maximum rated currents .Thus V OH is the guaranteed minimum “high ” voltage when sourcing themaximum rate “high” output current I OH,while V OL is the guaranteed “low” output voltage when sinking the maximum rated “low ”output current I OL.There are corresponding specifications for logic inputs which specify the minimum input voltage which will be recognized as a logic “high” state V IH,and the maximum input voltage which will be regarded as a logic “low” state V IL.For input interface, perhaps the main problem facing the designer is that of electrical nois e .Small noise signal may cause the system to malfunction, while larger amounts of moist can permanently damage it. The designer must be aware of these dangers from the outset. There are many methods to protect interface circuits and microcomputer from various kinds of noise .Following is some examples:1. Input and output electrical isolating between the microcomputer system and external devices using an opt-isolator or a transformer.2. Removing high frequency noise pulses by a low-pea filter and Schmitt-trigger.3. Protecting against excessive input voltages using a pair of diodes to power supply reversibly biased in normal direction.For output interface, parameters V OH, V OL, I OH and I OL of a logic device are usually much to low to allow loads to be connected directly, and in practice an external circuit must be connected to amplify the current and voltage to drive a load. Although several types of semiconductor devices are now available for controlling DC and AC powers up to many kilowatts, there are two basic ways in which a switch can be connected to a load to control it : series connection and shunt connection as shown in Figure 10-3.Fig 10-3 Series and Shunt ConnectionWith series connection, the switch allows current to flow through the load when closed, while with shunt connection closing the switch allows current to bypass the load.Both connections are useful in low-power circuits, but only the series connection can be used in high-power circuits because of the power wasted in the series resistor R.THE INTRODUCTION OF AT89S52Features of the AT89S52• Compatible with MCS-51™ Products• 8K Bytes of In-System Reprogrammable Flash Memory• Endurance: 1,000 Write/Erase Cycles• Fully Static Operation: 0 Hz to 24 MHz• Three-level Program Memory Lock• 256 x 8-Bit Internal RAM• 32 Programmable I/O Lines• Three 16-bit Timer/Counters• Eight Interrupt Sources• Programmable Serial Channel• Low Power Idle and Power Down ModesDescriptionThe AT89S52 is a low-power, high-performance CMOS 8-bit microcomputer with 8K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel‟s high density nonvolatile memory technology and is compatible with the industry standard 80S51 and 80S52 instruction set and pin out. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications.The AT89S52 provides the following standard features: 8Kbytes of Flash, 256 bytes of RAM, 32 I/O lines, three 16-bit timer/counters, a six-vector two-level interrupt architecture a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM timer/counters, serial port, and interrupt system to continue functioning. The Power Down Mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next hardware reset.Pin DescriptionVCC Supply voltage.GND Ground.Port 0 Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, eachpin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs.Port 0 can also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory. In this mode, P0 has internal pullups.Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pullups are required during program verification.Port 1 Port 1 is an 8-bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by.The internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.In addition, P1.0 and P1.1 can be configured to be thetimer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in the following table.Port 1 also receives the low-order address bytes during Flash programming and verification.TABLE 1 -- Port Pin functionPort pin Alternate FunctionsP1.0 T2(external count input to Timer/Counter2),clock-outP1.1T2EX(Timer/Counter 2 capture/reload trigger and direction control)Port 2 Port 2 is an 8-bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX@DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the high-order address bits and some control signals during Flashprogramming and verification.Port 3 Port 3 is an 8-bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.89S52系列微控制器89S52系列微控制器是基于高度完善的嵌入式控制系统的体系结构。
计算机专业中英文翻译外文翻译文献翻译
计算机专业中英文翻译外文翻译文献翻译英文Unix ,etc.. Network in various kinds of Unix it tests to be fastest in comparing and assess efficiency. Support such many kinds of files systems as FAT16 , FAT32 , NTFS , Ex t2FS , ISO9600 ,etc. at the same time .(3) Can operate it in many kinds of hardwares platform , including such processors as Alpha , SunSparc , PowerPC , MIPS ,etc., to various kinds of new-type peripheral hardwares, can from distribute on global numerous programmer there getting support rapidly too.(4) To that the hardware requires lower, can obtain very good performance on more low-grade machine , what deserves particular mention is Linux outstanding stability , permitted " year " count often its running times.2.Main application of Linux At present,Now, the application of Linux mainly includes: (1) Internet/Intranet: This is one that Linux was used most at present, it can offer and include Web server , all such Inter net services as Ftp server , Gopher server , SMTP/POP3 mail server , Proxy/Cache server , DNS server ,etc.. Linux kernel supports IPalias , PPP and IPtunneling, these functions can be used for setting up fictitious host computer , fictitious service , VPN (fictitious special-purpose network ) ,etc.. Operating Apache Web server on Linux mainly, the occupation rate of market in 1998 is 49%, far exceeds the sum of such several big companies as Microsoft , Netscape ,etc..(2) Because Linux has outstanding networking ability , it can be usedin calculating distributedly large-scaly, for instance cartoon making , scientific caculation , database and file server ,etc..(3) As realization that is can under low platform fullness of Unix that operate , apply at all levels teaching and research work of universities and colleges extensively, if Mexico government announce middle and primary schools in the wholecountry dispose Linux and offer Internet service for student already.(4) Tabletop and handling official business appliedly. Application number of people of in this respect at present not so good as Windows of Microsoft far also, reason its lie in Lin ux quantity , desk-top of application software not so good as Windows application far not merely, because the characteristic of the freedom software makes it not almost have advertisement thatsupport (though the function of Star Office is not second to MS Office at the same time, but there are actually few people knowing).3.Can Linux become a kind of major operating system?In the face of the pressure of coming from users that is strengthened day by day, more and more commercial companies transplant its application to Linux platform, comparatively important incident was as follows, in 1998 ①Compaq and HP determine to put forward user of requirement truss up Linux at their servers , IBM and Dell promise to offer customized Linux system to user too. ②Lotus announce, Notes the next edition include one special-purpose edition in Linux. ③Corel Company transplants its famous WordPerfect to on Linux, and free issue. Corel also plans to move the other figure pattern process products to Linux platform completely.④Main database producer: Sybase , Informix , Oracle , CA , IBM have already been transplanted one's own database products to on Linux, or has finished Beta edition, among them Oracle and Informix also offer technical support to their products.4.The gratifying one is, some farsighted domestic corporations have begun to try hard to change this kind of current situation already. Stone Co. not long ago is it invest a huge sum of money to claim , regard Linux as platform develop aInternet/Intranet solution, regard this as the core and launch Stone's system integration business , plan to set up nationwide Linux technical support organization at the same time , take the lead to promote the freedom software application and development in China. In addition domestic computer Company , person who win of China , devoted to Linux relevant software and hardware application of system popularize too.Is it to intensification that Linux know , will have more and more enterprises accede to the ranks that Linux will be used with domestic every enterprise to believe, more software will be planted in Linux platform. Meanwhile, the domestic university should regard Linux as the original version and upgrade already existing Unix content of courses , start with analysing the source code and revising the kernel and train a large number of senior Linux talents, improve our country's own operating system. Having only really grasped the operating system, the software industry of our country could be got rid of and aped sedulously at present, the passive state led by the nose by others, create conditions for revitalizing the software industry of our country fundamentally.。
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XXXXX学院毕业设计(论文)外文资料翻译学院(系)：电子电气工程学院专业：电气工程及其自动化姓名： XXXXX学号： XXXXXXXXXX外文出处：(用外文写)附件： 1.外文资料翻译译文；2.外文原文。
指导教师评语：签名：年月日附件1：外文资料翻译译文AT89S52功能特性描述AT89S52是一种低功耗、高性能CMOS8位微控制器，具有8K 在系统可编程Flash 存储器。
使用 Atmel 公司高密度非易失性存储器技术制造，与工业 80C51 产品指令和引脚完全兼容。
片上Flash允许程序存储器在系统可编程，亦适于常规编程器。
在单芯片上，拥有灵巧的8位 CPU 和在系统可编程Flash，使得 AT89S52为众多嵌入式控制应用系统提供高灵活、超有效的解决方案。
AT89S52具有以下标准功能：8k字节Flash， 256字节RAM，32 位 I/O 口线，看门狗定时器，2 个数据指针，三个 16 位定时器/计数器，一个6向量 2级中断结构，全双工串行口，片内晶振及时钟电路。
另外，AT89S52 可降至 0Hz 静态逻辑操作，支持2种软件可选择节电模式。
空闲模式下，CPU停止工作，允许RAM、定时器/计数器、串口、中断继续工作。
断电保护方式下，RAM内容被保存，振荡器被冻结，单片机一切工作停止，直到下一个中断或硬件复位为止。
VCC:电源GND:接地P0 口：P0口是一个8位漏极开路的双向I/O口。
作为输出口，每位能驱动8个TTL 逻辑电平。
对P0端口写“1”时，引脚用作高阻抗输入。
当访问外部程序和数据存储器时，P0口也被作为低8位地址/数据复用。
在这种模式下，P0具有内部上拉电阻。
在 flash编程时，P0口也用来接收指令字节；在程序校验时，输出指令字节。
程序校验时，需要外部上拉电阻。
P1口：P1口是一个具有内部上拉电阻的8位双向I/O口，p1输出缓冲器能驱动4个TTL 逻辑电平。
对 P1 端口写“1”时，内部上拉电阻把端口拉高，此时可以作为输入口使用。
作为输入使用时，被外部拉低的引脚由于内部电阻的原因，将输出电流（IIL）。
此外，P1.0和P1.2分别作定时器/计数器2的外部计数输入（P1.0/T2）和时器/计数器2的触发输入（P1.1/T2EX），具体如下表所示。
在flash编程和校验时，P1口接收低8位地址字节。
引脚号次要功能P1.0 T2（定时器/计数器T2的外部计数输入），时钟输出P1.1 T2EX（定时器/计数器T2的捕捉/重载触发信号和方向控制）P1.5 MOSI（在系统编程用）P1.6 MISO（在系统编程用）P1.7 SCK（在系统编程用）P2口：P2口是一个具有内部上拉电阻的8位双向I/O口，P2输出缓冲器能驱动4个TTL 逻辑电平。
对P2端口写“1”时，内部上拉电阻把端口拉高，此时可以作为输入口使用。
作为输入使用时，被外部拉低的引脚由于内部电阻的原因，将输出电流（IIL）。
在访问外部程序存储器或用16位地址读取外部数据存储器（例如执行MOVX @DPTR）时，P2口送出高八位地址。
在这种应用中，P2口使用很强的内部上拉发送1。
在使用8位地址（如MOVX @RI）访问外部数据存储器时，P2口输出P2锁存器的内容。
在flash编程和校验时，P2口也接收高8位地址字节和一些控制信号。
P3口：P3口是一个具有内部上拉电阻的8位双向I/O口，p2输出缓冲器能驱动4个TTL逻辑电平。
对P3端口写“1”时，内部上拉电阻把端口拉高，此时可以作为输入口使用。
作为输入使用时，被外部拉低的引脚由于内部电阻的原因，将输出电流（IIL）。
P3口亦作为AT89S52特殊功能（次要功能）使用，如下表所示。
在flash编程和校验时，P3口也接收一些控制信号。
引脚号次要功能P3.0 RXD（串行输入）P3.1 TXD（串行输出）P3.2 0INT(外部中断 0)P3.3 0INT(外部中断 0)P3.4 T0（定时器0外部输入）P3.5 T1（定时器1外部输入）P3.6 WR(外部数据存储器写选通)P3.7 RD(外部数据存储器写选通)RST:复位输入。
晶振工作时，RST脚持续2个机器周期高电平将使单片机复位。
看门狗计时完成后，RST脚输出96个晶振周期的高电平。
特殊寄存器AUXR(地址8EH)上的DISRTO位可以使此功能无效。
DISRTO默认状态下，复位高电平有效。
ALE/PROG：地址锁存控制信号（ALE）是访问外部程序存储器时，锁存低 8 位地址的输出脉冲。
在flash编程时，此引脚（PROG）也用作编程输入脉冲。
在一般情况下，ALE以晶振六分之一的固定频率输出脉冲，可用来作为外部定时器或时钟使用。
然而，特别强调，在每次访问外部数据存储器时，ALE脉冲将会跳过。
如果需要，通过将地址为8EH的SFR的第0位置“1”，ALE操作将无效。
这一位置“1”，ALE仅在执行MOVX或MOVC指令时有效。
否则，ALE将被微弱拉高。
这个ALE 使能标志（地址为8EH的SFR的第0位）的设置对微控制器处于外部执行模式下无效。
PSEN:外部程序存储器选通信号（PSEN）是外部程序存储器选通信号。
当AT89S52从外部程序存储器执行外部代码时，PSEN在每个机器周期被激活两次，而在访问外部数据存储器时，PSEN将不被激活。
EA/VPP:访问外部程序存储器控制信号。
为使能从0000H到FFFFH的外部程序存储器读取指令，EA必须接GND。
为了执行内部程序指令，EA应该接VCC。
在flash编程期间，EA也接收12伏VPP电压。
XTAL1:振荡器反相放大器和内部时钟发生电路的输入端。
XTAL2:振荡器反相放大器的输出端。
表 1 AT89S52特殊寄存器映象及复位值特殊功能寄存器特殊功能寄存器(SFR)的地址空间映象如表1所示。
并不是所有的地址都被定义了。
片上没有定义的地址是不能用的。
读这些地址，一般将得到一个随机数据；写入的数据将会无效。
用户不应该给这些未定义的地址写入数据“1”。
由于这些寄存器在将来可能被赋予新的功能，复位后，这些位都为“0”。
定时器2寄存器：寄存器T2CON和T2MOD包含定时器2的控制位和状态位（如表2和表3所示），寄存器对RCAP2H和RCAP2L是定时器2的捕捉/自动重载寄存器。
中断寄存器：各中断允许位在IE寄存器中，六个中断源的两个优先级也可在IE中设置。
表 2 T2CON：定时器/计数器2控制寄存器T2CON 地址为0C8H 复位值：0000 0000B位可寻址符号功能 TF2 定时器2溢出标志位。
必须软件清“0”。
RCLK=1或TCLK=1时,TF2不用置位。
EXF2 定时器2外部标志位。
EXEN2=1时，T2EX 上的负跳变而出现捕捉或重载时，EXF2会被硬件置位。
定时器2打开，EXF2=1时，将引导 CPU 执行定时器2中断程序。
EXF2必须如见清“0”。
在向下/向上技术模式（DCEN=1）下EXF2不能引起中断。
RCLK 串行口接收数据时钟标志位。
若 RCLK=1，串行口将使用定时器2溢出脉冲作为串行口工作模式1和3的串口接收时钟；RCLK ＝0，将使用定时器1计数溢出作为串口接收时钟。
TCLK 串行口发送数据时钟标志位。
若TCLK=1，串行口将使用定时器2溢出脉冲作为串行口工作模式1和3的串口发送时钟；TCLK ＝0，将使用定时器1计数溢出作为串口发送时钟。
EXEN2 定时器2外部允许标志位。
当EXEN2=1时，如果定时器2没有用作串行时钟，T2EX （P1.1）的负跳变见引起定时器2捕捉和重载。
若 EXEN2＝0，定时器2将视T2EX 端的信号无效TR2开始/停止控制定时器2。
TR2=1，定时器2开始工作 C/2T 定时器2定时/计数选择标志位。
C/2T ＝0，定时；C/2T ＝1，外部事件计数（下降沿触发）CP/2RL 捕捉/重载选择标志位。
当EXEN2=1时，CP/2RL ＝1，T2EX出现负脉冲，会引起捕捉操作；当定时器2溢出或EXEN2=1时T2EX 出现负跳变，都会出现自动重载操作。
CP/2RL ＝0将引起T2EX 的负脉冲。
当RCKL=1或TCKL ＝1时，此标志位无效，定时器2溢出时，强制做自动重载操作。
双数据指针寄存器：为了更有利于访问内部和外部数据存储器，系统提供了两路16位数据指针寄存器：位于SFR中82H~83H的DP0和位于84H～85。
特殊寄存器AUXR1中DPS＝0选择DP0；DPS=1选择DP1。
用户应该在访问数据指针寄存器前先初始化DPS至合理的值。
表3a AUXR：辅助寄存器AUXR 地址：8EH 复位值：XXX00XX0B不可位寻址- - - WDIDLE DISRTO - - DISALE7 6 5 4 3 2 1 0- 预留扩展用DISALE ALE使能标志位DISALE 操作方式0 ALE以1/6晶振频率输出信号1 ALE只有在执行MOVX 或MOVC指令时激活DISRTO 复位输出标志位DISRTO0 看门狗（WDT）定时结束，Reset 输出高电平1 Reset 只有输入WDIDLE 空闲模式下WDT使能标志位WDIDLE0 空闲模式下，WDT继续计数1 空闲模式下，WDT停止计数断电标志位：掉电标志位（POF）位于特殊寄存器PCON的第四位（PCON.4）。
上电期间POF置“1”。
POF可以软件控制使用与否，但不受复位影响。
表 3b AUXR1：辅助寄存器1AUXR1 地址：A2H 复位值：XXXXXXX0B不可位寻址- - - - - - - DPS7 6 5 4 3 2 1 0- 预留扩展用DPS 数据指针选择位DPS0 选择DPTR寄存器DP0L和DP0H1 选择DPTR寄存器DP1L和DP1H存储器结构MCS-51器件有单独的程序存储器和数据存储器。
外部程序存储器和数据存储器都可以64K寻址。
程序存储器：如果EA引脚接地，程序读取只从外部存储器开始。
对于89S52，如果EA接VCC，程序读写先从内部存储器（地址为0000H～1FFFH）开始，接着从外部寻址，寻址地址为：2000H~FFFFH。
数据存储器：AT89S52有256字节片内数据存储器。
高128字节与特殊功能寄存器重叠。
也就是说高128字节与特殊功能寄存器有相同的地址，而物理上是分开的。
当一条指令访问高于7FH的地址时，寻址方式决定CPU访问高128字节RAM还是特殊功能寄存器空间。
直接寻址方式访问特殊功能寄存器（SFR）。
例如，下面的直接寻址指令访问0A0H（P2口）存储单元MOV 0A0H , #data使用间接寻址方式访问高128字节RAM。
例如，下面的间接寻址方式中，R0内容为0A0H，访问的是地址0A0H的寄存器，而不是P2口（它的地址也是0A0H）。