状态机实例 —— 自动门

LIBRARY ieee; ieee.std_logic_1164.ALL ALL; USE ieee.std_logic_1164.ALL; ENTITY door_contr IS PORT ( clk,reset,coin,pass: IN std_logic; door,alarm,thank: OUT std_logic); END door_contr; ARCHITECTURE behavior OF door_contr IS TYPE states IS (lock,unlock); SIGNAL next_state: states; BEGIN PROCESS (clk) BEGIN IF (reset = '1') THEN next_state <= lock; alarm <= '0'; thank <= '0'; door <= '0'; (clk'EVENT ELSIF (clk'EVENT AND clk = '1') THEN CASE next_state IS
自动门的基本状态
初始状态 Φ / 加锁 投币 / 开锁
加 锁
开 锁
通过 / 加锁
状态机实例
异常处理
初始状态 Φ / 加锁 通过 / 报警 投币 / 开锁 投币 / 谢谢
加 锁
开 锁
通过 / 加锁
状态机实例
自动门的结构简图
通过传感器 锁执行
控 制
投币传感器 加锁执行
器
“
CLK
LIBRARY ieee; ieee.std_logic_1164.ALL ALL; USE ieee.std_logic_1164.ALL; ENTITY door_contr IS PORT ( clk,reset,coin,pass: IN std_logic; door,alarm,thank: OUT std_logic); END door_contr; ARCHITECTURE behavior OF door_contr IS TYPE states IS (lock,unlock); SIGNAL next_state: states; BEGIN PROCESS (clk) BEGIN IF (reset = '1') THEN next_state <= lock; alarm <= '0'; thank <= '0'; door <= '0'; (clk'EVENT ELSIF (clk'EVENT AND clk = '1') THEN CASE next_state IS
FSM: s_machine
【例8-1】 】 二进程一般 状态机的描述
clk reset state_inputs
PROCESБайду номын сангаас REG
current_state
PROCESS COM comb_outputs
next_state
LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY s_machine IS PORT ( clk,reset : IN STD_LOGIC; state_inputs : IN STD_LOGIC_VECTOR (0 TO 1); comb_outputs : OUT INTEGER RANGE 0 TO 15 ); END s_machine; ARCHITECTURE behv OF s_machine IS TYPE FSM_ST IS (s0, s1, s2, s3); --数据类型定义，状态符号化 数据类型定义， 数据类型定义 SIGNAL current_state, next_state: FSM_ST;--将现态和次态定义为新的数据类型 BEGIN REG: PROCESS (reset,clk) --主控时序进程 主控时序进程 BEGIN IF reset = '1' THEN current_state <= s0;--检测异步复位信号 检测异步复位信号 ELSIF clk='1' AND clk'EVENT THEN current_state <= next_state; END IF; END PROCESS;
WHEN lock => IF (coin = '1') THEN next_state <= unlock; door <= '1'; ELSIF (pass = '1') THEN next_state <= lock ; alarm <= '1'; door <= '0'; IF; END IF; WHEN unlock => IF (coin = '1') THEN next_state <= unlock; thank <= '1'; door <= '1'; ELSIF (pass = '1') THEN next_state <= lock; door <= '0'; IF; END IF; CASE; END CASE; IF; END IF; END PROCESS; PROCESS; END behavior;
WHEN lock => IF (coin = '1') THEN next_state <= unlock; door <= '1'; ELSIF (pass = '1') THEN next_state <= lock ; alarm <= '1'; door <= '0'; IF; END IF; WHEN unlock => IF (coin = '1') THEN next_state <= unlock; thank <= '1'; door <= '1'; ELSIF (pass = '1') THEN next_state <= lock; door <= '0'; IF; END IF; CASE; END CASE; IF; END IF; END PROCESS; PROCESS; END behavior;
LIBRARY ieee; ieee.std_logic_1164.ALL ALL; USE ieee.std_logic_1164.ALL; ENTITY door_contr IS PORT ( clk,reset,coin,pass: IN std_logic; door,alarm,thank: OUT std_logic); END door_contr; ARCHITECTURE behavior OF door_contr IS TYPE states IS (lock,unlock); SIGNAL next_state: states; BEGIN PROCESS (clk) BEGIN IF (reset = '1') THEN next_state <= lock; alarm <= '0'; thank <= '0'; door <= '0'; (clk'EVENT ELSIF (clk'EVENT AND clk = '1') THEN CASE next_state IS
状态机实例 —— 自动门
有一自动门，它可以被锁上，也可以开 有一自动门，它可以被锁上， 当门锁上时， 锁。当门锁上时，某人可以在它的槽中塞进 一枚硬币。这样，门就会自动开锁， 一枚硬币。这样，门就会自动开锁，转变到 开锁的状态；人通过后，门就会自动锁上。 开锁的状态；人通过后，门就会自动锁上。 希望把自动门交给一个简单的 FSM管理。 FSM管理。 管理 的分析， 了解FSM 通过对这个简单 FSM 的分析， 了解FSM 的 设计过程。 设计过程。
WHEN lock => IF (coin = '1') THEN next_state <= unlock; door <= '1'; ELSIF (pass = '1') THEN next_state <= lock ; alarm <= '1'; door <= '0'; IF; END IF; WHEN unlock => IF (coin = '1') THEN next_state <= unlock; thank <= '1'; door <= '1'; ELSIF (pass = '1') THEN next_state <= lock; door <= '0'; IF; END IF; CASE; END CASE; IF; END IF; END PROCESS; PROCESS; END behavior;
COM:PROCESS(current_state) CASE current_state IS
WHEN lock => IF (coin = '1') THEN next_state <= unlock; door <= '1'; ELSIF (pass = '1') THEN next_state <= lock ; alarm <= '1'; door <= '0'; END IF; IF; WHEN unlock => IF (coin = '1') THEN next_state <= unlock; thank <= '1'; door <= '1'; ELSIF (pass = '1') THEN next_state <= lock; door <= '0'; IF; END IF; END CASE; CASE; IF; END IF; PROCESS; END PROCESS; END behavior;