台湾半导体封装工艺

Flip Chip BGA Structure
Underfill
(Epoxy)
Solder Bump
Chip
Solder Ball
(63Sn/37Pb)
Build-up PWB
Preconditioning Test
To know the workability of Semiconductor devices after environmental stresses and soldering
Dry Bake(125’C, 24HRS) Temp & Humidity Test(Level 1,2,3,4,5,6) VPS or IR Reflow(220 deg.C,3X) EXT. Visual INSP & O/S Test SAM Inspection
Simulate Drying Process Simulate Moisture Absorption in Floor Simulate Soldering Process Electrical Test NDT using SAM
1. Moisture Exist Inside Underfill Material
Liquid to Gas : Volume Expansion 1244X
2. Flux Residue on Die Surface after Flip Chip attach
Improvement Suggestions Improvement Suggestions
CAE
IC
– C-MOLD Reactive Molding – – –
–
(multiplicity factor)
Connector
–
α gel η 0 (T ) η (T , γ&α ) = , (1 n ) α gel α η 0 (T )γ& 1+ * τ
1. Delamination 2. Die Crack 3. Bump Crack 4. Underfill Crack 5. Electrical Open/Short
Die
Bump
Underfill Substrate
Defects after Precon Test Defects after Precon Test
Identification of materials-related defects. Solving manufacturing problems. Solving service-related problems. Providing corrective or prevention measures. Provide manufacturers’ insurance or legal defense/claim cases. Improve product design, enhance yield & improve product reliability.
Die
Bump
Underfill Substrate
Bump Crack after T/C Test Bump Crack after T/C Test
Crack
Die
Underfill
Bump
Bump Crack by Solder Bump Fatigue
Bump Crack ing C-Scan & B-Scan 1
Potential Risk sites & Failure Modes
Mechanics Issues in IC package Design and Reliability
Failure Analysis of BGA
Failure analysis can be used for ;
Section 2
Section 3
SF = 1 +
π * Wn * Wd
2 * SL
Wh + Ct
Wn : The cross-section wire number of the wire region Wd : The wire diameter
S L : The cross-section length of the wire region Wh : The cross-section wire height in the cavity Ct : The gap thickness of the cavity
125 C Air
Expansion
-55 C Air
Shrinkage
Failures after T/C Test Failures after T/C Test
1) Open Failure due to Bump Crack 2) Short Failure due to Die Crack
1) Use High Moisture Resistant Underfill 2) Clean a Surface of Die after Flip Chip attach
– (remove a Flux residue)
II. Reliability Test II. Reliability Test
Flip Chip
PCB
Check the workability just after soldering
Procedures of Precon Test
EXT. Visual INSP & O/S Test SAM Inspection
Electrical Test Non-Destructive Test using SAM TEMP Cycle Test(-55’C/125’C, 5X) Simulate Temp Cha
1
4 (Gate)
3 (Board)
(Card)
IC
IC IC
IC
IC
(Wafer Sawing) (Die Attaching) (Wire Bonding) (Molding) (Trimming / Forming) (Marking) (Inspecting)
1 2 3 Crack
2
3
Die
Underfill
2~3 mil
Die Underfill
1
2
PCB
Underfill
3
Improvement Plan of T/C Failures Improvement Plan of T/C Failures
125 C Air
Test Conditions 1) Temp : +125 / -55 deg.C 2) Time : 15 min/ zone 3) Read-out Point : 1000 cycle
-55 C Air
Measurement Open/Short Test
Effects of T/C Test Effects of T/C Test
To know the workability of Semiconductor devices after Board Mounting in real situations which can be induced by actual users
Flip Chip
PCB
Precon Test
Rel. Test
To know the durability of Semiconductor package resisting expansion and shrinkage by high and low temperature.
Temperature Cycle Test Temperature Cycle Test
Decision
Moisture Sensitivity Levels Moisture Sensitivity Levels
Level
1 2 3 4 5 6
T&H Cond. ( C/ %RH)
85/85, 168 HRS 85/60, 168 HRS 30/60, 192 HRS 30/60, 96 HRS 30/60, 72 HRS 30/60, 6 HRS
1) 2) 3) 4) Why it failed ? How it failed ? What should be done now ? How do we improve better ?
Failure Analysis of Flip Chip by Stress Tests
Kinds of Stress Tests 1) Precon Test(Preconditioning Test) 2) T/C Test(Temperature Cycling Test) 3) HTST(High Temperature Storage Test) 4) T&H Test (Temperature & Humidity Test) 5) PCT(Pressure Cooker Test)
– –
4
17
5
16
6
15
14 13 12 10 11
7
– Lamb’s Model 2 CD ρUn Dw P= ×S 2 8π CD = Re[2.002 ln(Re)]
8 9
r =a
uθ ur
θ
U
r
Thermal Stresses in an Electronic Package
Nguyen's Formula
δ=
+
Circular Arch Formula
Region 3 Region 2 Region 1
Region 1 Region 2 Re gion 3
Section 0
S ection 0 S ection 1 S ection 2 S ection 3
Section 1
Procedure of Reliability Test Procedure of Reliability Test
PRECON TEST
T/C
HTS
T&H
PCT
1. Temperature Cycling test 1. Temperature Cycling test
Purpose of T/C test
Role of F/A - Problem Identification
1. Failure analysis is not just to confirm the failures, it is to locate the root causes. 2. The right attitude should be :
Die
Crack
Die
Bump Crack
Underfill
Bump
Underfill
Delamination
Die Crack & Delamination
Bump Crack by Delamination
Defects after Precon Test
Causes of Defects after Precon Test Causes of Defects after Precon Test
(C1 + C2α )
η0 (T ) = B exp
Tb T
–
& α = K1 + K 2α m1 (1 α )m2
(
)
E1 K1 = A1 exp T E2 K 2 = A2 exp T
CAE
1
N101
20
N106
2
E664 E665
19
3
18
N108 N111
Floor Life Time after Unpack
Unlimited 1 Year 168 HRS (1 Week) 72 HRS (3 Days) 48 HRS (2 Days) 6 HRS
Scanning Acoustic Microscope
Defects after Precon Test Defects after Precon Test
IC
– – – – IC – – – – – –
(Popcorn) (Void) (Delaminating)
Global-Flow Analysis C-MOLD
=
ρ π
Local-Flow Analysis
Lamb's Equation
= =
ρ η
WireDeformation Analysis ANSYS's Formula