FPC Design Guideline_20120215

Drive for better visionFPC Design GuidelineFeb., 2012Himax Technologies, Inc.奇景光電股份有限公司FPC Design GuidelineHimax Proprietary & ConfidentialFPC Design Guideline - IMinimize trace length while maintaining controlled impedance. Use a solid (image) plane preferred ground plane than voltage plane adjacent to the clock trace. Avoid discontinuous impedance design (via) at high speed signal trace Avoid high speed signal traces and other traces overlapping. High speed/critical signal tracesUse guarding trace to clocks, period signals, differential pairs and critical (high-treat and high-speed) signals. If guarding trace is not available, use wider space between critical signals and other routings. (3-W Rule)High Speed and Critical Signals: Worse design – Vias and overlapped:Himax Proprietary & ConfidentialFPC Design Guideline - IITo prevent serious crosstalk, 3-W rule on signal trace is suggested.W 2WTrace 1 Trace 2 Trace 33W3WLayer Top ViewHigh speed differential signalMultiple connections between guarding trace and any ground planes by via are required, and the distance between via is about 5mm on twolayer board.Himax Proprietary & ConfidentialDifferential Pair Layout (1/2)Pin assignment is matching (P/N could not be cross.)P/N traces should be symmetricCN Pair layout G P N G Symmetric Driver IC Ground traceMultiple connections between guarding trace and any ground planes by via are required, and the distance between via is about 5mm on twolayer board.Himax Proprietary & ConfidentialDifferential Pair Layout (2/2)Pin assignment is not matching (P/N could be crossing.)P/N traces should be symmetric. The cross point position should be near connector or driver IC as possible and it would have less reflection effect. P/N traces crossing should have worse signal integrity than P/N trace not crossing. Guarding trace should also have ground vias.cross point CNP N P N Not Suggestion P NDriver IC (with terminal resistor)Lc Lc Total lengthLc <1 ⋅ total − length 10Himax Proprietary & ConfidentialFPC Design Guideline – III (1/2)Differential Pair -Impedance Matching2.1.4.3.Mismatch is a phenomena due to the discontinuity of traces. It causes energy propagated inside back to source and distorts the transmitted signal. ParameterH: Base film thickness -- 1 H1: Coverly thickness W: trace width -- 2 S: spacing -- 4 T: copper thickness Er: Dielectric Constant -- 3 Z: differential impedanceHimax Proprietary & ConfidentialFPC Design Guideline – III (2/2)Contour of Differential Pair Impedance (W/H:S/H)RangeW: 50um~100um S: 100um~200um H: 25um~35umParameterW/H (1.5~4.0) S/H (3~8) Er: 2.5 3.0 3.5SPEC for Differential pair impedance on FPC is between 90ohm and 110ohm.Himax Proprietary & ConfidentialFPC Design Guideline - IVPower and Ground arrangement2-layer board: Power and ground have to be overlapped.Avoiding incomplete ground plane 20-H is a rule to bound the fringing interference by extra regionAt 10-H, impedance obviously change with the plane. At 20-H, almost 70% flux is bounded.Power plane Base film Ground plane Power plane Ground plane 10-H 20-H 100-H Flux fringingCross-section View (2-layer)1-layer board: Power and ground have to be paralleledPower trace Ground traceTop View (1-layer)Himax Proprietary & ConfidentialFPC Design Guideline - VWiden power traceRoute power trace as the twice or triple width of the normal rule. Add decoupling capacitors close to IC power terminals and I/O connectors.Minimum inductive lead length, including via and escape trace lengths. (Minimum ESL&ESR) More stable the dielectric material, the better the performance of capacitor.Critical Power/Ground Domain:Himax Proprietary & ConfidentialFPC Design Guideline - VIGround Path of CapacitorWhen placing decoupling capacitors, ground loop between capacitor and device contributes to the overall common mode voltage. This path of ground loop will induce noise into the ground plane. To degrade this phenomena, components with pins located in the center is recommended.Himax Proprietary & ConfidentialDrive for better vision。