CC2500-中文datasheet
CC2500程序
#include "PowerMan.h"#include "CC2500.h"uint8 CC2500_TxRxBuf[1+CC2500_DATA_LEN ];//地址+数据uint8 CC2500_TxAddr = 0x01;uint8 CC2500_RxAddr = 0x01;const uint8 PaTabel[8] = {0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60};//--------------------------CC2500 寄存器配置---------------------------------const CC2500_RF_SETTINGS CC2500_Config ={0x0B, // IOCFG2 GDO2 output pin configuration.0x06, //IOCFG10x06, // IOCFG0 GDO0 output pin configuration.0x07, //FIFOTHR0xD3, //SYNC1 MSB0x91, //SYNC0 LSB1+CC2500_DATA_LEN, // PKTLEN Packet length.0x02, // PKTCTRL1 Packet automation control.0x04, // PKTCTRL0 Packet automation control.0x01, // ADDR Device address.0x00, // CHANNR Channel number.0x07, // FSCTRL1 Frequency synthesizer control.0x00, // FSCTRL0 Frequency synthesizer control.0x5D, // FREQ2 Frequency control word, high byte.0x93, // FREQ1 Frequency control word, middle byte.0xB1, // FREQ0 Frequency control word, low byte.0x2D, // MDMCFG4 Modem configuration.0x3B, // MDMCFG3 Modem configuration.0x73, // MDMCFG2 Modem configuration.0x22, // MDMCFG1 Modem configuration.0xF8, // MDMCFG0 Modem configuration.0x47, // DEVIATN Modem deviation setting (when FSK modulation is enabled).0x00, // MCSM2 Main Radio Control State Machine configuration.0x02, // MCSM1 Main Radio Control State Machine configuration.0x18, // MCSM0 Main Radio Control State Machine configuration.0x1D, // FOCCFG Frequency Offset Compensation Configuration.0x1C, // BSCFG Bit synchronization Configuration.0xC7, // AGCCTRL2 AGC control.0x00, // AGCCTRL1 AGC control.0xB2, // AGCCTRL0 AGC control.0x00, // WOREVT10x00, // WOREVT00x00, // WORCTRL0xB6, // FREND1 Front end RX configuration.0x10, // FREND0 Front end RX configuration.0xEA, // FSCAL3 Frequency synthesizer calibration.0x0A, // FSCAL2 Frequency synthesizer calibration.0x00, // FSCAL1 Frequency synthesizer calibration.0x11, // FSCAL0 Frequency synthesizer calibration.0x00, //RCCTRL10x00, //RCCTRL00x59, // FSTEST Frequency synthesizer calibration.0x00, //PTEST0x00, //AGCTEST0x88, // TEST2 Various test settings.0x31, // TEST1 Various test settings.0x0B, // TEST0 Various test settings.};//---------------------------CC2500射频芯片初始化函数-------------------------------------- void CC2500_Init(void){CSN_ON();delay_ms(1);CSN_OFF();delay_ms(1);CSN_ON();delay_ms(1);CSN_OFF();SPI_Write(CCxxx0_SRES); //写入复位命令CSN_ON();CC2500_WriteReg(CCxxx0_FSCTRL1, CC2500_Config.FSCTRL1);CC2500_WriteReg(CCxxx0_FSCTRL0, CC2500_Config.FSCTRL0);CC2500_WriteReg(CCxxx0_FREQ2, CC2500_Config.FREQ2);CC2500_WriteReg(CCxxx0_FREQ1, CC2500_Config.FREQ1);CC2500_WriteReg(CCxxx0_FREQ0, CC2500_Config.FREQ0);CC2500_WriteReg(CCxxx0_MDMCFG4, CC2500_Config.MDMCFG4);CC2500_WriteReg(CCxxx0_MDMCFG3, CC2500_Config.MDMCFG3);CC2500_WriteReg(CCxxx0_MDMCFG2, CC2500_Config.MDMCFG2);CC2500_WriteReg(CCxxx0_MDMCFG1, CC2500_Config.MDMCFG1);CC2500_WriteReg(CCxxx0_MDMCFG0, CC2500_Config.MDMCFG0);CC2500_WriteReg(CCxxx0_CHANNR, CC2500_Config.CHANNR);CC2500_WriteReg(CCxxx0_DEVIATN, CC2500_Config.DEVIATN);CC2500_WriteReg(CCxxx0_FREND1, CC2500_Config.FREND1);CC2500_WriteReg(CCxxx0_FREND0, CC2500_Config.FREND0);CC2500_WriteReg(CCxxx0_MCSM0 , CC2500_Config.MCSM0 );CC2500_WriteReg(CCxxx0_FOCCFG, CC2500_Config.FOCCFG);CC2500_WriteReg(CCxxx0_BSCFG, CC2500_Config.BSCFG);CC2500_WriteReg(CCxxx0_AGCCTRL2, CC2500_Config.AGCCTRL2);CC2500_WriteReg(CCxxx0_AGCCTRL1, CC2500_Config.AGCCTRL1);CC2500_WriteReg(CCxxx0_AGCCTRL0, CC2500_Config.AGCCTRL0);CC2500_WriteReg(CCxxx0_FSCAL3, CC2500_Config.FSCAL3);CC2500_WriteReg(CCxxx0_FSCAL2, CC2500_Config.FSCAL2);CC2500_WriteReg(CCxxx0_FSCAL1, CC2500_Config.FSCAL1);CC2500_WriteReg(CCxxx0_FSCAL0, CC2500_Config.FSCAL0);CC2500_WriteReg(CCxxx0_FSTEST, CC2500_Config.FSTEST);CC2500_WriteReg(CCxxx0_TEST2, CC2500_Config.TEST2);CC2500_WriteReg(CCxxx0_TEST1, CC2500_Config.TEST1);CC2500_WriteReg(CCxxx0_TEST0, CC2500_Config.TEST0);CC2500_WriteReg(CCxxx0_IOCFG2, CC2500_Config.IOCFG2);CC2500_WriteReg(CCxxx0_IOCFG0, CC2500_Config.IOCFG0);CC2500_WriteReg(CCxxx0_PKTCTRL1, CC2500_Config.PKTCTRL1);CC2500_WriteReg(CCxxx0_PKTCTRL0, CC2500_Config.PKTCTRL0);CC2500_WriteReg(CCxxx0_ADDR, CC2500_Config.ADDR);CC2500_WriteReg(CCxxx0_PKTLEN, CC2500_Config.PKTLEN);//CC2500_WriteBurstReg(CCxxx0_PATABLE, PaTabel, 8);CC2500_Command(CCxxx0_SFRX);CC2500_Command(CCxxx0_SFTX);CC2500_Command(CCxxx0_SIDLE);}//---------------------------CC2500设置接收模式函数-------------------------------------- void CC2500_SetRxMode(void){CC2500_Command(CCxxx0_SRX);}//---------------------------CC2500数据包接收函数-------------------------------------- uint8 CC2500_RxPacket(void){if(GDO0_IN){if((1+CC2500_DATA_LEN) == CC2500_ReadReg(CCxxx0_RXBYTES|READ_BURST)){return TRUE;}}return FALSE;}//---------------------------CC2500数据包发送函数--------------------------------------void CC2500_TxPacket(void){//CC2500_WriteReg(CCxxx0_TXFIFO,1+CC2500_DATA_LEN);CC2500_WriteBurstReg(CCxxx0_TXFIFO, CC2500_TxRxBuf,1+CC2500_DATA_LEN); //写入要发送的数据CC2500_Command(CCxxx0_STX); //进入发送模式发送数据while (!GDO0_IN);// Wait for GDO0 to be set -> sync transmittedwhile (GDO0_IN);// Wait for GDO0 to be cleared -> end of packetCC2500_Command(CCxxx0_SFTX); //刷新发送缓冲区CC2500_Command(CCxxx0_SIDLE);}//---------------------------CC2500寄存器写入函数--------------------------------------void CC2500_WriteReg(uint8 addr, uint8 value){CSN_OFF();while (MISO_IN);SPI_Write(addr|WRITE_SINGLE); //写地址SPI_Write(value); //写入配置CSN_ON();}//---------------------------CC2500寄存器读取函数--------------------------------------uint8 CC2500_ReadReg(uint8 addr){uint8 value;CSN_OFF();while (MISO_IN);SPI_Write(addr|READ_SINGLE);value = SPI_Read();CSN_ON();return value;}void CC2500_WriteBurstReg(uint8 addr, uint8 *buffer, uint8 count){uint8 i;CSN_OFF();while (MISO_IN);SPI_Write(addr | WRITE_BURST);for (i = 0; i < count; i++){SPI_Write(buffer[i]);}CSN_ON();}//---------------------------CC2500寄存器连续读取函数-------------------------------------- void CC2500_ReadBurstReg(uint8 addr, uint8 *buffer, uint8 count){uint8 i;CSN_OFF();while (MISO_IN);SPI_Write(addr | READ_BURST);for (i = 0; i < count; i++){buffer[i] = SPI_Read();}CSN_ON();}//----------------------------CC2500命令函数------------------------------void CC2500_Command(uint8 cmd){CSN_OFF();while (MISO_IN);SPI_Write(cmd); //写入命令CSN_ON();}//---------------------------CC2500接收地址设置函数-------------------------------------- void CC2500_Write_RxADDR(void){CC2500_WriteReg(CCxxx0_ADDR,CC2500_RxAddr);}void CC2500_Write_TxADDR(void){CC2500_TxRxBuf[0] = CC2500_TxAddr;}//--------------------------SPI初始化函数---------------------------void SPI_Init(void){CSN_ON();SCK_OFF();}//--------------------------SPI单字节读取函数---------------------------uint8 SPI_Read(void){uint8 i,rxdata;rxdata = 0x00;for (i = 0;i < 8;i++){rxdata = rxdata<<1;SCK_ON();if (MISO_IN) //读取最高位，保存至最末尾，通过左移位完成整个字节{rxdata |= 0x01;}else{rxdata &= ~0x01;}__no_operation();__no_operation();SCK_OFF();__no_operation();__no_operation();}return rxdata;}//----------------------------SPI单字节写入函数---------------------------void SPI_Write(uint8 txdata){uint8 i;for (i = 0;i < 8;i++){if (txdata&0x80) //总是发送最高位{MOSI_ON();}else{MOSI_OFF();}SCK_ON();__no_operation();__no_operation();txdata = txdata<<1;SCK_OFF();__no_operation();__no_operation();}}。
AMS2500 datasheet
D A T A S HE E THitachi Data SystemsFor large and enterprise businesses, Hitachi Adaptable Modular Storage 2500 is a highly reliable, flexible and scalable storage system for Microsoft ®Exchange Server, VMware, databases and other business applications. It also provides an optimal choice for tiered and standalone storage, consolidation, business continuity, data replication, backup and archiving.Hitachi Adaptable Modular Storage 2500Resilient, Enterprise-class Storage at a Modular PriceBurgeoning data growth and complex storage infrastructures are prevalent challenges facing most organizations today, along with the need for high availability, performance, scalability and data protection — usually all at once. Hitachi Data Systems understands these chal-lenges and has developed a Services Oriented Storage approach to match application and business requirements to storage attributes. Now Hitachi Data Systems brings large and enterprise customers these proven solutions in modular, cost-effective packaging — the Hitachi Adaptable Modular Storage 2500.Business BenefitsCost-effective PerformanceConsolidate multiple storage systems into ■■one; supports iSCSI, Fibre Channel and NAS on the same system.Hitachi Dynamic Load Balancing Controller ■■delivers outstanding performance and non-disruptive operations; it is ideal for VMware environments.Reduce utility charges with Power ■■Simplified, Reliable, Integrated StorageRely on 99.999 percent data availability.■■Minimize disruption and risk with no single ■■point of failure and mirrored cache with battery backup.Improve administrative efficiencies with ■■wizard-based installation and configuration.Centralize and manage multiple systems ■■and automate data replication — all from a single pane of glass.Reduce time spent on configuration with ■■Hitachi Data Systems solution-ready platforms that are certified and tested with the leading business applications. Detailed technical guides assist in getting the best performance and highest scalability possible.Flexible, Scalable Business GrowthProtect investments to meet the data ■■storage growth requirements of any busi-ness with the ability to scale capacity to 472TB, performance to 900K IOPS and connectivity to 2048 virtual server ports.Expand as business grows with easy ■■data-in-place upgrades.Business SolutionsHitachi Data Systems and its HitachiTrueNorth Channel Partners offer industry leading technology to help organizations of all sizes meet their unique require-ments for business continuity, regulatory compliance and data recovery. T ogether, we provide cost-effective storage prod-ucts and solutions that leverage world renowned Hitachi global R&D resources to deliver performance, availability and scalability — supporting business critical applications and strengthening competi-tive advantage.Modular Storage for Midsized OrganizationsHitachi Adaptable Modular Storage 2500■■Hitachi Adaptable Modular Storage 2300■■Hitachi Adaptable Modular Storage 2100■■Hitachi Adaptable Modular Storage 1000■■Hitachi Adaptable Modular Storage 500■■Hitachi Adaptable Modular Storage 200■■Hitachi Workgroup Modular Storage 100■■Corporate Headquarters 750 Central Expressway, Santa Clara, California 95050-2627 USA Contact Information: + 1 408 970 1000 / info@Asia Pacific and Americas 750 Central Expressway, Santa Clara, California 95050-2627 USA Contact Information: + 1 408 970 1000 / info@Europe Headquarters Sefton Park, Stoke Poges, Buckinghamshire SL2 4HD United Kingdom Contact Information: + 44 (0) 1753 618000 / info.emea@Hitachi is a registered trademark of Hitachi, Ltd., and/or its affiliates in the United States and other countries. Hitachi Data Systems is a registered trademark and service mark of Hitachi, Ltd., in the United States and other countries. ShadowImage and Hi-Track are registered trademarks of Hitachi Data Systems Corporation.Microsoft is a registered trademark of Microsoft Corporation. CommVault is a registered trademark of CommVault Systems, Inc. IBM, AIX and z/OS are registered trademarks of International Business Machines Corporation.All other trademarks, service marks and company names are properties of their respective owners.Notice: This document is for informational purposes only, and does not set forth any warranty, express or implied,concerning any equipment or service offered or to be offered by Hitachi Data Systems. This document describes some capabilities that are conditioned on a maintenance contract with Hitachi Data Systems being in effect, and that may be configuration-dependent and features that may not be currently available. Contact your local Hitachi Data Systems sales office for information on feature and product availability.Hitachi Data Systems sells and licenses its products subject to certain terms and conditions, including limited warranties. To see a copy of these terms and conditions prior to purchase or license, please go to /corporate/legal/index.html or call your local sales representative to obtain a printed copy. If you purchase or license the product, you are deemed to have accepted these terms and conditions.© Hitachi Data Systems Corporation 2008. All Rights Reserved. DS-072-A DG September 2008Compliance and Data ProtectionRAID-6 ensures high availability and ■■protection — any two drives can fail without the loss of any data.Hi-Track ■■® Monitor for 24/7 diagnostics keeps potential issues from becoming problems.Within-system volume replication or incre-■■mental copies enable frequent backups.Flexible sparing eliminates the need to ■■copy back after a RAID group rebuild.Audit logging tracks all system changes.■■Hitachi Data Retention Utility software ■■protects data from overwrites or erasures for long periods of time.Hi-Track MonitorYESn I BM ® AIX ®n A pple MAC OSn Sun SolarisNote: All capacities are based on 1GB = 1,000,000,000 bytes; 1TB = 1000GB。
UDC2500通用数字控制器产品说明书(中文)
初级版本－不作为出版物51-52-03-36UDC25003/04 Page 1 of 14通用数字控制器Specification概述UDC2500通用数字控制器是霍尼韦尔控制器家族新增的一种新型低价产品。
这种控制器以受欢迎的低价1/4DIN尺寸提供了新的特性，同时也保留了霍尼韦尔UDC2300中所有的可靠性，低成本，简易性和受欢迎的HMI。
UDC2500监测并控制应用的温度和其他参数，如：•熔炉和烤炉•环境舱•包装机械•塑料加工机器特性•1个通用输入+1个高阶输入•0.25%精度•快速扫描率(166毫秒)•多达5个模拟或数字输出•2个数字输入•以太网和Modbus通讯•红外PC & 袖珍PC组态•NEMA4X/IP56面板防护•多种语言提示•1/4DIN尺寸•无跳线组态•简便的现场更新•与现有UDC2300应用的向下兼容•有限型号标准特性包括Accutune II™和普及的单排显示，自动模式型号。
可选择带有自动/手动控制模式的双排显示型号。
也可用限位控制型号。
UDC2500为很多应用提供不同的1/4DIN尺寸。
其特性包括：通用AC电源供应，可选RS422/485Modbus®RTU或以太网10Base-T TCP/IP通讯协议，输入/输出隔离，隔离辅助电流输出。
由于这些特性结合了AccutuneII™的调整技术和模糊逻辑的超调抑制，使该产品占据了性/价比的领先地位。
使用PC通过通讯方式，或使用袖珍PC通过内置的红外通讯端口，可以很容易地组态。
无需进入控制器的背面来下载或上传一种全新的组态！那些成百上千对UDC2300满意的用户，UDC2500与现有的UDC2300应用可以向下兼容。
第2个输入是高阶型，能用作远程设定点，来进行数据采集或作为报警参数。
这种输入接受0-5V, 1-5V, 0-2V, 0-20mA或 4-20mA的输入范围。
冷接点补偿提供给热电偶类型输入。
上限或下限传感器断电保护可以通过键盘组态。
CC2500经验
单片机 程序下载
/search.php?key=CC2500&format=
可以把GDO2引脚配置成每发射或接收一个包申明(GDO2_CFG写0x06)，
这样，若发射或接收了数据，就会在GDO2引脚出现方波。
例如，在接收过程中，用示波器测试GDO2引脚出现了方波，
但是程序里没有接收到数据。此时可以认为CC2500接收到了数据包，此时可以从晶振时钟及数据包格式考虑可能出现的问题
4. CC2500引脚配置不正确。在用MCU控制CC2500芯片的工作时，用来连接GDO0、GDO2、MISO的MCU引脚应该配置为漏极开路。若配置成推挽输出，
则电路无法进行收发。
CSN, MOSI, SCK最好配置成推挽输出。
在调试中，可以结合程序，对CC2500出现的问题进行判断
。例如引脚的调试经验。若CC2500不能正常工作，常见的原因有以下几种：
1. CC2500芯片引脚虚焊。CC2500是QFN封装的，引脚在芯片背面，在手工吹焊时常容易出现虚焊，而不能正常工作。
2. CC2500天线接口的电感，电容取值不正确。CC2500的天线接口由∏型阻抗匹配网络和平衡滤波网络组成。
在实际使用中，虽然电感、电容取值是按照Datasheet的参考值选取的，
但是经常会出现电感、电容的真实值和标定值相差过大，
从而导致CC2500电路无法正常发射和接收。我就有一次，买了1.5pF的电容，
结果对方给了我220pF的电容。所以，在焊接电感电容前需要核对。
3. 26MHz晶振。 遇到过晶振不振，CC2500无法工作的情况。还遇到过进行通讯的两块CC2500电路板使用了不同品牌的晶振，结果时钟不一致，导致无法进行收发。
CC2500芯片资料Errata.2007.02
ERRATA NOTESCC2500Table Of Contents1RC OSCILLATOR TOLERANCE (2)2RX FIFO (3)3CYCLIC REDUNDANCY CHECK (CRC) (4)4PLL LOCK DETECTOR OUTPUT (6)5SPI READ SYNCHRONIZATION ISSUE (7)6WOR TIMING LIMITATION ON SHORT TIMING INTERVALS (10)7RXFIFO_OVERFLOW ISSUE (11)8REDUCED LINK PERFORMANCE AT CERTAIN FREQUENCIES (13)9DOCUMENT HISTORY (14)10CONTACT INFORMATION (14)1 RC Oscillator Tolerance1.1 Description and Reason for the ProblemThe RC oscillator contains an error in the calibration routine that statistically occurs in 17.3% of all calibrations performed. When the calibration error occurs the RC oscillator tolerance is typically +8% (+10% expected worst case) to -0.3%. This means that the Wake-On-Radio (WOR) function will exhibit degraded performance in certain aspects or not be able to operate as intended. The following issue must be expected: •Increased average current consumption, since the necessary time needed in receive mode will increase due to the increased tolerance.1.2 Suggested WorkaroundThere is currently no workaround to this problem.1.3 Batches AffectedThis errata note applies to all batches and revisions of the chip.3 Cyclic Redundancy Check (CRC)3.1 Description and Reason for the ProblemFor certain conditions the CRC flag in PKTSTATUS, LQI and on the GDOx pins will always indicate “CRC not OK”, regardless of actual CRC status.If 2400_EN=0 and the second byte of the CRC value appended to a TX packet is zero, the CRC_OK flag available in the PKTSTATUS[7] register, in the LQI[7] status register, and on one of the general purpose control (GDO) pins (if outputs 7 (0x07) or 15 (0x0F) are selected), will always indicate “CRC not OK”, i.e. the CRC_OK flag=0, in the device receiving the packet.Note that a “CRC OK” indication can always be trusted. However, the “CRC not OK” indication from any of the three sources mentioned above can not be relied on when the second byte of the CRC value appended to a TX packet is zero. Then all packets will always result in a “CRC not OK” indication in the receiving device. Retransmission of identical packet(s) does not help, as the same situation will occur every time the same packet is received. For a packet that is affected, toggling any single bit in the packet (except for some bits in the last byte of the packet) before retransmission will cause CRC indication in RX to work properly.The probability of the CRC bug affecting a packet with random data is 1/256 (not dependent on packet length). As mentioned above, the CRC bug is completely deterministic, only dependent on packet data. If there is a lot of variation in packet data from one packet to the next, system performance may not be badly affected, but it is difficult to guarantee that long sequences of packets all affected by the bug can not occur.The bug does NOT affect the “CRC OK” indication, i.e. the CRC_OK flag, that can be appended to the packet in the RX FIFO (when PKTCTRL1.APPEND_STATUS=1).3.2 Suggested WorkaroundChecking the CRC flag by reading PKTSTATUS[7] register, LQI[7] status register, GDOx_CFG =0x07 and GDOx_CFG =0x15 should not be done if 2400_EN=0. If 2400_EN=0 a software workaround is needed in applications currently using one of these sources and relying on the respective CRC_OK flag. It is possible to check the CRC status in 2 different ways:1) Set PKTCTRL1.APPEND_STATUS=1 and read the CRC_OK flag in the MSB of the second byte appended to the RX FIFO after the packet data. This requires double buffering of the packet, i.e. the entire packet content of the RX FIFO must be completely read out before it is possible to check whether the CRC indication is OK or not.2) To avoid reading the whole RX FIFO, another solution is to use the PKTCTRL1.CRC_AUTOFLUSH feature. If this feature is enabled, the entire RX FIFO will be flushed if the CRC check fails. If GDOx_CFG=0x06 the GDOx pin will be asserted when a sync word is found. The GDOx pin will be de-asserted at the end of the packet. When the latter occurs the MCU should read the number of bytes in the RX FIFO. This can be read from the RXBYTES.NUM_RXBYTES status register or from the status byte returned on the MISO line when sending a byte on the SPI bus (FIFO_BYTES_AVAILABLE). If the number of bytes in RX FIFO is 0 the CRC checkfailed and the FIFO was flushed. If the number of bytes in RX FIFO > 0 the CRC check was OK and data can be read out of the FIFO.The CRC_OK flag available in the PKTSTATUS[7] register, in the LQI[7] status register, and on one of the general purpose control (GDO) pins (if outputs 7 (0x07) or 15 (0x0F) are selected), can always be trusted in the device receiving the packet if 2400_EN=1. Note that neither whitening nor autoflush can be used with 2400_EN=1. More details can be found in the CC2500 data sheet.3.3 Batches AffectedThis errata note applies to all batches and revisions of the chip.4 PLL Lock Detector Output4.1 Description and Reason for the ProblemThe PLL lock detector output is not 100% reliable and might toggle even if the PLL is in lock. The PLL is in lock if the lock detector output has a positive transition or is constantly logic high. The PLL is not in lock if the lock detector output is constantly logic low. It is not recommended to check for PLL lock by reading PKTSTATUS[0] with GDOx_CFG=0x0A or PKTSTATUS[2] register with GDOx_CFG=0x0A (x = 0 or 2).4.2 Suggested WorkaroundPLL lock can be checked reliably as follows:1) Program register IOCFGx.GDOx_CFG=0x0A and use the lock detector output available on the GDOx pin as an interrupt for the MCU. A positive transition on the GDOx pin means that the PLL is in lock.or2) Read register FSCAL1. The PLL is in lock if the register content is different from 0x3F.4.3 Batches AffectedThis errata note applies to all batches and revisions of the chip.5 SPI Read Synchronization IssueA bug affecting the synchronization mechanism between the SPI clock domain (using a user supplied SCLK) and the internal 26 MHz clock domain (XCLK in this document) will sometimes result in incorrect read values for register fields that are continuously updated. The frequency with which this occurs is very low and guidelines for application design to avoid this issue are given in this chapter. The issue does not affect the data read from the RX FIFO as it uses a different and more robust synchronization mechanism. Neither does the issue affect writes to registers or the TX FIFO at any time.5.1 SymptomsWhen reading multi-bit register fields that are updated by the radio hardware such as the MARCSTATE or TXBYTES registers over the SPI interface, occasionally nonsensical or erroneous values will be read.For example, in an application that sends packets longer than the 64 byte TX FIFO, the TX FIFO must be topped up with additional data during packet transmission. Assuming this is done by initially transferring 64 bytes to the TX FIFO, starting transmission, and then continuously polling TXBYTES to see when space for additional bytes is available, and then transferring the required number of bytes until the end of the packet. In this case the expected sequence of values read from TXBYTES would be:64, 64, …, 63, (write byte), 64, 64, …, 63, (write byte), 64, ...Due to the SPI synchronization issue the following might (infrequently) be seen instead: 64, 64, …, 63, (write byte), 64, 64, …, 64, 89, 63, …The erroneous value read is highlighted in red. The register read is changing from the value 64 (01000000b) to the value 63 (00111111b) on the XCLK clock at the same time that its value is latched into the SPI output shift register on the SCLK clock. If the two clock edges occur sufficiently close in time, the improper synchronization mechanism will latch some bit values from the previous register value and some bits from the next register value, resulting in the erroneous value 89 (01011001b).5.2 DescriptionDuring an SPI read transaction, the SPI output register latches the read value on the last falling edge of SCLK during an SPI address byte. For a burst read operation, subsequent register values are latched on the falling edge of SCLK in the last bit of each previous data byte.Due to this synchronization issue, if the register being read changes value (synchronously with XCLK) during a certain period of time after this falling edge of SCLK then some of the bits in the read value will come from the previous value and some from the next value. This so-called window of uncertainty is about 1.3 ns for typical conditions and increases to about 2.0 ns for worst-case conditions (1.8 V VDD, 85 °C).Figure 1 Window of uncertainty (drawing not to scale)Figure 1 shows a timing diagram of an SPI read that fails when reading a fictitious counter being updated internally each . Since the counter update from valueb) to b) within the window of uncertainty, the read value could be any one of000b) depending on exactly when the positive edge of XCLK falls within the window of uncertainty.probability that the two events overlap, and thus that the read value is potentially corrupted, is given by:c WU cWU corrupt f T T T P == In the example given in section 5.1, the probability of any single read from TXBYTES being corrupt, assuming the maximum datarate is used, is approximately ()ppm 80b 8kbps 500ns 3.1≈⋅== / f T P c WU corrupt or less than once every 10000 reads. In many situations the underlying received packet failure rate in the communication system is so much higher that any packet transmission/reception failure attributable to the issue described here will be negligible.5.3 Suggested WorkaroundIn a typical radio system a packet error rate of at least 1 % should be tolerated in order to ensure robustness. In light of this, the negligible contribution to the number of packets lost due to, for example, occasionally reading incorrect FIFO byte count values or the wrong radio state from MARCSTATE, can probably be ignored in most applications. However, care should be taken to ensure that reading an incorrect value does not jeopardize an application. Examples of commonsense things to do include:• For packets longer than the TX FIFO, configure the device to signal on a GDOpin when there is enough room to fill up with a new block of data (using the TXFIFO_THR threshold). If polling TXBYTES is necessary due to pin constraints, read TXBYTES repeatedly until the same value is returned twice in succession – such a value can always be trusted.• Always perform a length check on the number of bytes reported in the RX FIFOto avoid a buffer overrun when copying the data to your MCU. A buffer overrun could make your firmware behave erratically or become deadlocked.• Do not rely on the internal radio state machine through transient states (e.g.CALIBRATE – SETTLING – TX – IDLE). It is, however, perfectly safe to poll for the end of transmission by waiting for MARCSTATE=IDLE.• Always average RSSI and LQI values over several packets before using them indecision algorithms (e.g. for FH channel selection).• Avoid using the SPI status byte STATE and FIFO_BYTES_AVAILABLE fieldsduring packet transmission.If it is important to ensure that read values are not corrupted, reading of one of the affected registers should be done repeatedly until the same value is read twice in succession. If the rate at which the register is read is guaranteed to be at least twice as fast as the expected register update rate, then an upper bound on the number of required reads is four and the average number of reads slightly more than two.The same method can be used to ensure that the SPI status byte fields that provide simplified radio FSM state and saturated FIFO byte count are correct. This only makes sense when polling the status byte with SNOP as the address.5.4 Batches AffectedThis errata note applies to all chip batches and revisions of the chip.6 WOR Timing Limitation on Short Timing Intervals6.1 Description and Reason for the ProblemThe Wake on Radio (WOR) timer is a very low power timer. It uses an f xosc/750 kHz (34.7 kHz with f xosc = 26 MHz) clock source for the timer and compare logic. In power down mode this clock source is divided by 128 to achieve a 270.8 Hz clock frequency for the timer, given that f xosc is 26 MHz.The WOR timer runs on 270.8 Hz in power down to save power. Shortly before reaching the programmed timeout value the timer automatically resumes 34.7 kHz operation. This is achieved by pre-incrementing the actual timer value before entering power down mode, to allow match logic to resume 34.7 kHz timer operation.For timeouts less than approximately 11 ms (detailed timing is shown in application note AN047), the timeout period is too short to switch to the 270.8 Hz clocking scheme. Due to a design bug the timer is pre-incremented even if the device does not switch to the 270.8 Hz clocking scheme, effectively shortening the timeout by one 270.8 Hz clock period (~3.7 ms).6.2 Suggested WorkaroundWOR usage is described in application note AN047.6.3 Batches AffectedThis errata note applies to all batches and revisions of the chip.8 Reduced Link Performance at certain Frequencies8.1 Description and Reason for the ProblemThere will be spurious signals at n/2·crystal oscillator frequency (n is an integer number). In receive mode the CC2500 exhibits increased packet error rate and thereby reduced link performance at RF frequencies which are equal to n/2·crystal oscillator frequency(e.g. 2405, 2418, 2431, 2444, 2457, 2470 and 2483 MHz when using a 26 MHz crystal).8.2 Suggested WorkaroundThere is no workaround for this problem and these frequencies should be avoided.8.3 Batches AffectedThis errata note applies to all batches and revisions of the chip.。
CT2500中文资料
Features•Performs Source and Sink functions •Implements Type D & E protocols •Burst Mode Capability•Built in System Integrity Features •Double Buffered Communications •Low power CMOS•Available in a PGA Package•Operates over full Military temperature range -55°C to +125°CGeneral DescriptionThe CT2500 provides a complete interface between the MIL-STD-1397 transceiver chip set (CT1698) andmost microprocessor based systems. The unit is monolithic and fabricated in CMOS technology, thereby having very low power requirements. The unit handles all protocols of Type D & E interfaces including Burst Mode Data and forced EF functions. Screened per individual test methods of MIL-STD-883. Aeroflex Circuit Technology is an 80,000ft 2 MIL-PRF-38534 certified facility in Plainview, N.Y.CIRCUIT TECHNOLOGYCT2500MIL-STD-1397 Type D & E Low Level SerialF I E I DCER T A E R OFL EX L AB SI N C .ISO 9001Interface Protocol ChipI/O CONTROLThe CT2500 is very flexible in it’s I/O architecture. The unit can handle 16 bit and 32 bit data and command word loading. In addition, data words can be preloaded into an external FIFO and the unit will load data words from the FIFO directly without subsystem intervention. Similarly, data can be received and automatically loaded into a FIFO. This frees up the subsystem until the data transfer is complete. These options are desirable especially when operating under burst mode transmissions. Control frames are sent by strobing LDCNTRL and data is sent by strobing STR2.DATA TRANSFERSThe CT2500 is built to send and receive Type D and E Control frames. It can transmit and receive 32-bit command and data word. All 32-bit communications are double buffered for maximum flexibility. This allows the subsystem to respond with less critical timing constraints. Burst mode data transmission can be initiated by setting the "Burst Mode" pin high. Automatic FIFO operation is enabled by setting "FIFOEN" pin high. The serial data out is automatically formatted for the CT1698 to send out along the cable.SOURCE AND SINK MODESBoth Source and Sink Mode operations are available in the CT2500. Selection of modes is accomplished through the Source/Sink pin. In the Source Mode, the unit will transmit control frames, 32 bit command and data words including burst mode data. It will receive control frames only. In Sink Mode, the unit will transmit control frames only and receive control frames, 32 bit command and data words, and burst mode data.SYSTEM INTEGRITY FEATURESThe CT2500 has built in system integrity features. The unit can generate and send parity with all 32 bit transmissions. For reception of 32 bit words, the unit can check for parity, frame, overrun, sync, and bit count errors.ELECTRICAL CHARACTERISTICS (V DD = 5V ±10%, T C = -55 °C to +125°C, unless otherwise specified) SYMBOL PARAMETER LIMITI DD Quiescent current100uA maxP DS Power Dissipation200mW maxIin Input leakage10uA maxIoz Tri-state leakage10uA maxV IH Input high level 2.0V minV IL Input low level0.8V maxV OH Output high level 2.4V min @ I OH = -4mA V OL Output low level0.4V max @ I OL = 4mAI/O FUNCTION LISTINGNAME I/O DESCRIPTIONSO/SI I Source / Sink Mode SelectDetermines the overall Functioning Mode of the Device."1"= Source emulation. This mode enables the chip to send control frames, singlecommand and data words and burst data. It is able to receive control frames."0" = Sink emulation. In this mode, the chip can only send control frames. It canreceive control frames, command words, single data words and burst data.DO-D31I/O Parallel Bi-directional Data Bus (Internal Pullups)Source Mode: Input to 32 bit transmit data latchSink Mode: Tri-state output from 32 bit received data latchD/E I Type D / Type E Control Frame Length Select (Internal Pulldown)"1" = Three bit control frames are transmitted and the received control frame ischecked for a proper three bit length."0" = Four bit control frames are transmitted and the received control frame is checkedfor a proper four bit length.PAREN I Parity Enable (Internal Pullup)"1" = Parity bit is generated in Source mode and checked for in Sink mode."0" = No parity is generated or checked for.POE I Parity Odd or Even Select (Internal Pullup)"1" = Odd parity"0" = Even parityCLK I System Clock20 megahertz with 50% duty cycleBURST I Burst Mode Select"1" = Data transmission and Reception can be done in Burst mode"0" = Normal operationSource Mode: Data words loaded during the transmission of another will beconcatenated to the transmission without addition of SYNC or WI bits. The first wordwill have a SYNC bit of "1" and and a WI bit, which must be set to "0". The Burst linemust remain stable for the entire duration of the loading and transmission of the data.Sink Mode: During a Burst data reception, after the SYNC and WI bits, data words arepicked off at bit count multiples of 32, or 33 with parity enabled, and loaded into theoutput latch. The transmission is considered ended when a gap is detected. The linemust be stable during the entire reception.STR1 and STR2I Strobe One Bar and Strobe Two BarControl Strobes for Reading and Writing the Parallel I/O data LatchesSource Mode: STR1 loads data present on DO-D15 into the lower 16 bit input latch and STR2 loads data on D16-D31 into the upper 16 bit input latch. Upon completion of STR2, a sequence is initiated to load the entire 32 bits into a shift register and start a transmission. The lower 16 bits must be loaded prior to or during the load of the upper16 bits. For a 32 bit load, STR1 and STR2 can be tied together.Sink Mode: STR1 enables the lower 16 bits of a received word to be output onD0-D15. STR2 enables the upper 16 bits of a received word to be output on D16-D31.The entire 32 bits of data must be read before another data reception or it will beoverwritten. If this occurs, the overflow flag, OVRFLOW, will go high. The data isconsidered completely read upon the completion of STR2.CMDIN O Command InThird bit of the Received Control Frame. Valid during RCVCNTRL. DTAIN O Data InSecond bit of the Received Control Frame. Valid during RCVCNTRL.RCVCNTRL O Received Control BarPulses low upon reception of a Control Frame in both Sink and Source modes.RCVDTA O Received Data/Command Word BarPulses low upon reception of a Data or Command word ERR1, ERR2OError Bit One and Error Bit TwoOVRFLOW O Overflow Error"1" = Overflow occurred in the Received Data Latch. Data not read in time.RSTERR I Reset Error Flags Bar (Internal Pullup)A low pulse on this line resets the ERR1, ERR2 and OVRFLOW error flags.PORIPower on Reset BarA Master reset. A low pulse on this line resets the internal sequences and error flags. It does not reset the I/O Data latches.WIOUT IWord Identifier Bit OutThe value on this line is latched during STR2 for the WI bit position in the word to be transmitted. A "0" indicates a Data word and a "1" indicates a Command/Interrupt word.WIIN OWord Identifier Bit InThe WI bit of the received word is present on this line during RCVDTA and indicates whether the word is a Data word or a Command/Interrupt word. The value is latched at the first RCVDTA for an entire Burst Mode reception.CMDOUT I Command OutThird bit of the transmitted Control Frame.DTAOUT I Data OutSecond bit of the transmitted Control Frame.LDCNTRLILoad Control Frame BarThis loads the status of CMDOUT, DTAOUT and BIT4OUT into the Control Frame to be transmitted. Transmission will commence when the loading is completed. This applies to both Sink and Source modes.FIFOEN IFIFO EnableSource Mode : When FIFOEN is held high ("1"), FIFORD’s (FIFO Read Bars) will be generated when the input data latch is empty (RDYFORDTA = 1). During the FIFORD, data presented to the parallel bus will be loaded into the input data latch and transmitted when ready. In a non-burst (single word) condition, FIFOEN must be removed before RDYFORDTA comes back. A positive pulse of 100 ns duration satisfies this requirement.Sink Mode : The parallel data bus goes active during RCVDTA and will hold forapproximately 25 ns after its rising edge. With a FIFO directly connected to the data bus, RCVDTA can be used to load all received words into the FIFO. Gating RCVDTA with WIIN selects only the data words for loading.NAME I/O DESCRIPTIONERR1ERR200No Error01Bit Count Error in Received Data/Command word or Control Frame 10Parity Error in Received Data11Sync Error in Received Data/Command word or Control FrameNAME I/O DESCRIPTIONFIFORD O FIFO Read BarWhen the device is configured as a Source, this output pulses low during FIFOENmode enabling data from a FIFO to be loaded into the input data latch fortransmission.RDYFORDTA O Ready For DataThis signal is high when the input data latch is available for new data to be loaded in.When the data is loaded, RDYFORDTA goes low until the word is dumped into theoutput shift register.ENV O EnvelopeThis output envelopes the serial output data by being high during transmission. TXDMXD O Transmit Data / Manchester DataSerial NRZ data out or Manchester Data out depending on the TXSELECT mode. TXCMXD O Transmit Clock / Manchester Data BarOutput shift clock or Manchester Data Bar depending on the TXSELECT mode.G20MHZ O Gated 20 MhzA gated 20 Mhz clock used in conjunction with Transmit Data, Transmit Clock andEnvelope to generate Manchester data using other Aeroflex encoders such as theCT1698.TXSELECT I Transmit Mode Select. (Internal Pulldown)"1" = Serial output format is Manchester Data and Data Bar."0" = Output will be NRZ Data and Shift Clock.RXDATA I Received DataReceived serial NRZ Data in.RXCLOCK I Received ClockReceived Shift Clock In.TEST I Test Mode Bar (Internal Pullup)A low on this pin puts the device into an internal wrap-around test mode. T ransmit Dataand Transmit Clock are internally connected to Received Data and Received Clock.The circuit must be in Source mode and only 32 bit data loads and reads are allowed.In this mode, STR2 loads the full 32 bits for transmission. When this word is wrappedback, RCVDTA will pulse low indicating reception of a data or command word. STR1enables the received data latch to be read out. Transmission of control frames can alsobe tested in this mode using the regular LDCNTRL and RCVCNTRL signals.BIT4IN O Bit Four InFourth bit of received Type E control frame.BIT4OUT I Bit Four Out (Internal Pullup)Fourth bit of Type E control frame to be transmitted.SYNCIN O Sync InSync position of the Received Data Latch.CFRMSYNC O Control Frame Sync InSync position of the Received Control Frame LatchPRTYIN O Parity InParity bit position of the Received Data Latch.CLKLDCNTRLTXDMXDTXCMXDENVRXDATARXCLOCKRCVCNTRLFigure 4 – Control Frame Transfer DiagramCLKSTR1STR2RDYFORDTADATABUSTXDMXDTXCMXDENVFigure 5 – Source Data Frame Example DiagramCLKSTR1STR2DATABUSENVRXDATARXCLOCKRCVDTARCVCNTRLERR1ERR2OVERFLOWWIINSYNCINPRTYINPARENPOEFigure 6 – Sink Data Frame Example Diagram32 BitData Bus Internal Bus32 BitRegister32 BitFIFOCT2500 ProtocolAddress DecoderLogicSequencer FIFO & Reg.Protocol System InterruptsAddress Bits ControlsControlSignalsChip ManchesterEncodedDataCT1698TransceiverFigure 7 – Typical I/O Board Configuration (Source and Sink Mode)PIN OUTS – 84 PIN PGA (CT2500)Pin Signal Pin Signal B2BURST K10GNDC2CLK J10POEB1CMDOUT K11D15C1DTAOUT J11D14D2BIT4OUT H10D13D1RSTERR H11D12E3FIFOEN F10D11E2LDCNTRL G10D10E1POR G11D9F2GND G9GNDF3GND F9GNDG3SYNCIN F11D8G1RXCLOCK E11D7G2RXDA T A E10D6F1SO/SI E9D5H1STR1D11D4H2STR2D10D3J1TEST C11D2K1WIOUT B11D1J2D31C10PRTYINL1CFRMSYNC A11V DDK2V DD B10V DDK3PAREN B9D/EL2D30A10D0L3D29A9CMDINK4D28B8DTAINL4D27A8ENVJ5D26B6ERR1K5D25B7ERR2L5D24A7FIFORDK6BIT4IN C7V DDJ6V DD C6V DDJ7V DD A6TXSELECTL7D23A5OVRFLOWK7D22B5RCVCNTRLL6D21C5RCVDTAL8D20A4RDYFORDTAK8D19B4TXCMXDL9D18A3TXDMXDL10D17A2WIINK9D16B3G20MHZL11GND A1GNDC I R C U I T T E C H N O L O G YAeroflex Circuit Technology 35 South Service RoadPlainview New York 11830Telephone: (516) 694-6700FAX: (516) 694-6715Toll Free Inquiries: 1-(800)THE-1553Ordering InformationModel NumberPackageCT2500PGA Package.600 SQ REF LID1.120 1.080Pin #1 Designator (White)ø.018±.002TYP1234567891011FBCDEAGHJKL1.010 SQ MAXPackage Outline – 84 Pin PGA SQBottom ViewTop ViewSpecifications subject to change without notice.。
毕设：基于单片机的无线语音对讲系统设计【范本模板】
兰州理工大学本科毕业设计（2011届)题目基于单片机的无线语音对讲系统设计学院电信学院专业电子信息科学与技术班级电子二班学号学生姓名指导教师缑新科完成日期诚信承诺我谨在此承诺：本人所写的毕业论文《基于CC2500的语音对讲系统设计》均系本人独立完成，没有抄袭行为，凡涉及其他作者的观点和材料，均作了注释,若有不实，后果由本人承担。
承诺人（签名）：年月日杭州电子科技大学本科毕业设计摘要本毕业设计主要设计自主研发的基于CC2500的语音对讲系统，实现短距离的语音对讲。
在现代通信中，对讲机是一种近距离的、简单的无线传输通信工具，由于它不需要中转站和地面交换机站支持,就可以进行有效的移动通信，因此深受人们欢迎.目前,它广泛应用于生产、保安、野外工程等领域的小范围移动通信工程中。
考虑到研究的针对性,基于CC2500的无线对讲系统的原理是通过STC89C52单片机控制，读取存于FLASH里的PCM编码信号，进行处理后通过CC2500模块发送，接收机通过CC2500模块接收到信号后通过STC89C52模拟PWM波输出。
其音频放大电路是通过LM358跟4871放大送到3欧喇叭。
本文将具体介绍对讲系统的硬件设计及软件编程设计过程。
关键词:CC2500模块；单片机；语音对讲大学本科毕业设计ABSTRACTThe graduation design, the main design based on the independent research and development CC2500 speech talkback system, realize short speech the intercom.In the modern communication，intercom is a close，simple wireless transmission communication tools, because it does not require station and ground switch station，can effectively support the mobile communications，so it Welcome by people.At present, it is widely used in production, security，field engineering and other areas of small range of mobile communication engineering.Considering the pertinence, based on research CC2500 wireless talkback system principle is through STC89C52 MCU control, read stored in FLASH pulse code modulation （PCM）.the signal processing CC2500 module after sending by CC2500 module,receiver received by STC89C52 simulation PWM signal after through wavelet out put.The audio amplification circuit is amplified by LM358 and 4871 to 3Ω speakers.Key words：CC2500 module；MCU；V oice Intercom杭州电子科技大学本科毕业设计目录1 引言 (1)2 概述 (2)2。
nRF24L01与CC2500性能对比表
Comment
Radio
Range Max data rate Supply voltage Operating temperature Required passive count Crystal Spec Input pad tolerance
4X
Including antenna match Cheaper Crystal No lever shifter for USB
•
•
•
Total Power Saving = Time on-air saving × Active Current Saving
CC2500 burns aalot of power CC2500 burns lot of power
nRF24L01 vs CC2500
On-Chip Packet Handling
nRF24L01 vs CC2500
RSSI vs Packet Loss Counting • RSSI will not be able to pick up the disturbance from frequency hopping or ShockBurst enabled systems in a way that is useful to the system protocol Packet Loss Counting will always give the true indication of the channel quality
nRF24L01 vs CC2500
Physical Specifications
CC2500 20-pin 4x4mm QLP nRF24L01 20-pin 4x4mm QFN
CC2500-RTR1资料
CC2500Low-Cost Low-Power 2.4 GHz RF TransceiverApplications• 2400-2483.5 MHz ISM/SRD band systems • Consumer electronics • Wireless game controllers • Wireless audio• Wireless keyboard and mouse • RF enabled remote controlsProduct DescriptionThe CC2500 is a low-cost 2.4 GHz transceiver designed for very low-power wireless appli-cations. The circuit is intended for the 2400-2483.5 MHz ISM (Industrial, Scientific and Medical) and SRD (Short Range Device) frequency band.The RF transceiver is integrated with a highly configurable baseband modem. The modem supports various modulation formats and has a configurable data rate up to 500 kBaud.CC2500 provides extensive hardware support for packet handling, data buffering, burst transmissions, clear channel assessment, link quality indication, and wake-on-radio.The main operating parameters and the 64-byte transmit/receive FIFOs of CC2500 can be controlled via an SPI interface. In a typical system, the CC2500 will be used together with a microcontroller and a few additional passive components.Key Features RF Performance• High sensitivity (–104 dBm at 2.4 kBaud,1% packet error rate)• Low current consumption (13.3 mA in RX,250 kBaud, input well above sensitivity limit)• Programmable output power up to +1 dBm • Excellent receiver selectivity and blockingperformance• Programmable data rate from 1.2 to 500kBaud• Frequency range: 2400 – 2483.5 MHzAnalog Features• OOK, 2-FSK, GFSK, and MSK supported • Suitable for frequency hopping and multi-channel systems due to a fast settlingfrequency synthesizer with 90 us settling time• Automatic Frequency Compensation(AFC) can be used to align the frequency synthesizer to the received centre frequency• Integrated analog temperature sensorDigital Features• Flexible support for packet orientedsystems: On-chip support for sync word detection, address check, flexible packet length, and automatic CRC handling• Efficient SPI interface: All registers can beprogrammed with one “burst” transfer • Digital RSSI output• Programmable channel filter bandwidth• Programmable Carrier Sense (CS)indicator•Programmable Preamble Quality Indicator (PQI) for improved protection against falsesync word detection in random noise •Support for automatic Clear Channel Assessment (CCA) before transmitting (forlisten-before-talk systems)•Support for per-package Link Quality Indication (LQI)•Optional automatic whitening and de-whitening of dataLow-Power Features•400 nA SLEEP mode current consumption •Fast startup time: 240 us from SLEEP to RX or TX mode (measured on EM design) •Wake-on-radio functionality for automatic low-power RX polling•Separate 64-byte RX and TX data FIFOs (enables burst mode data transmission) General•Few external components: Complete on-chip frequency synthesizer, no externalfilters or RF switch needed•Green package: RoHS compliant and no antimony or bromine•Small size (QLP 4x4 mm package, 20 pins)•Suited for systems compliant with EN 300 328 and EN 300 440 class 2 (Europe),FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan)•Support for asynchronous and synchronous serial receive/transmit modefor backwards compatibility with existingradio communication protocolsAbbreviationsAbbreviations used in this data sheet are described below.ACP Adjacent Channel Power MSB Most Significant BitADC Analog to Digital Converter MSK Minimum Shift KeyingApplicableNotAFC Automatic Frequency Offset Compensation NAAGC Automatic Gain Control NRZ Non Return to Zero (Coding)AMR Automatic Meter Reading OOK On Off KeyingARIB Association of Radio Industries and Businesses PA Power AmplifierBER Bit Error Rate PCB Printed Circuit BoardDownBT Bandwidth-Timeproduct PD PowerCCA Clear Channel Assessment PER Packet Error RateCFR Code of Federal Regulations PLL Phase Locked LoopCRC Cyclic Redundancy Check POR Power-on ResetCS Carrier Sense PQI Preamble Quality IndicatorCW Continuous Wave (Unmodulated Carrier) PQT Preamble Quality ThresholdDC Direct Current RCOSC RC OscillatorDVGA Digital Variable Gain Amplifier QPSK Quadrature Phase Shift KeyingESR Equivalent Series Resistance QLP Quad Leadless PackageCommission RCResistor-Capacitor CommunicationsFCC FederalFEC Forward Error Correction RF Radio FrequencyFIFO First-In-First-Out RSSI Received Signal Strength IndicatorFHSS Frequency Hopping Spread Spectrum RX Receive, Receive Mode2-FSK Frequency Shift Keying SMD Surface Mount DeviceGFSK Gaussian shaped Frequency Shift Keying SNR Signal to Noise RatioIF Intermediate Frequency SPI Serial Peripheral InterfaceI/Q In-Phase/Quadrature SRD Short Range DeviceTransmit/Receive ISM Industrial, Scientific and Medical T/RLBT Listen Before Transmit TX Transmit, Transmit ModeLC Inductor-Capacitor VCO Voltage Controlled OscillatorLNA Low Noise Amplifier WLAN Wireless Local Area Networkson Radio, Low power pollingLO LocalOscillator WOR WakeLQI Link Quality Indicator XOSC Crystal OscillatorLSB LeastBit XTAL CrystalSignificantUnitMCU MicrocontrollerTable of ContentsAPPLICATIONS (1)PRODUCT DESCRIPTION (1)KEY FEATURES (1)RF P ERFORMANCE (1)A NALOG F EATURES (1)D IGITAL F EATURES (1)L OW-P OWER F EATURES (2)G ENERAL (2)ABBREVIATIONS (3)TABLE OF CONTENTS (4)1A BSOLUTE M AXIMUM R ATINGS (7)2O PERATING C ONDITIONS (7)3G ENERAL C HARACTERISTICS (7)4E LECTRICAL S PECIFICATIONS (8)4.1C URRENT C ONSUMPTION (8)4.2RF R ECEIVE S ECTION (10)4.3RF T RANSMIT S ECTION (12)4.4C RYSTAL O SCILLATOR (13)4.5L OW P OWER RC O SCILLATOR (13)4.6F REQUENCY S YNTHESIZER C HARACTERISTICS (14)4.7A NALOG T EMPERATURE S ENSOR (15)4.8DC C HARACTERISTICS (15)4.9P OWER-O N R ESET (15)5P IN C ONFIGURATION (16)6C IRCUIT D ESCRIPTION (18)7A PPLICATION C IRCUIT (18)8C ONFIGURATION O VERVIEW (20)9C ONFIGURATION S OFTWARE (21)104-WIRE S ERIAL C ONFIGURATION AND D ATA I NTERFACE (22)10.1C HIP S TATUS B YTE (23)10.2R EGISTER A CCESS (24)10.3SPI R EAD (24)10.4C OMMAND S TROBES (25)10.5FIFO A CCESS (25)10.6PATABLE A CCESS (25)11M ICROCONTROLLER I NTERFACE AND P IN C ONFIGURATION (26)11.1C ONFIGURATION I NTERFACE (26)11.2G ENERAL C ONTROL AND S TATUS P INS (26)11.3O PTIONAL R ADIO C ONTROL F EATURE (27)12D ATA R ATE P ROGRAMMING (27)13R ECEIVER C HANNEL F ILTER B ANDWIDTH (28)14D EMODULATOR,S YMBOL S YNCHRONIZER AND D ATA D ECISION (28)14.1F REQUENCY O FFSET C OMPENSATION (28)14.2B IT S YNCHRONIZATION (28)14.3B YTE S YNCHRONIZATION (29)15P ACKET H ANDLING H ARDWARE S UPPORT (29)15.1D ATA W HITENING (30)15.2P ACKET F ORMAT (30)15.3P ACKET F ILTERING IN R ECEIVE M ODE (32)15.4CRC C HECK (32)15.5P ACKET H ANDLING IN T RANSMIT M ODE (33)15.6P ACKET H ANDLING IN R ECEIVE M ODE (33)15.7P ACKET H ANDLING IN F IRMWARE (34)16M ODULATION F ORMATS (34)16.1F REQUENCY S HIFT K EYING (34)16.2M INIMUM S HIFT K EYING (34)16.3A MPLITUDE M ODULATION (35)17R ECEIVED S IGNAL Q UALIFIERS AND L INK Q UALITY I NFORMATION (35)17.1S YNC W ORD Q UALIFIER (35)17.2P REAMBLE Q UALITY T HRESHOLD (PQT) (35)17.3RSSI (35)17.4C ARRIER S ENSE (CS) (36)17.5C LEAR C HANNEL A SSESSMENT (CCA) (38)17.6L INK Q UALITY I NDICATOR (LQI) (38)18F ORWARD E RROR C ORRECTION WITH I NTERLEAVING (38)18.1F ORWARD E RROR C ORRECTION (FEC) (38)18.2I NTERLEAVING (39)19R ADIO C ONTROL (40)19.1P OWER-O N S TART-U P S EQUENCE (40)19.2C RYSTAL C ONTROL (41)19.3V OLTAGE R EGULATOR C ONTROL (41)19.4A CTIVE M ODES (42)19.5W AKE O N R ADIO (WOR) (42)19.6T IMING (43)19.7RX T ERMINATION T IMER (44)20D ATA FIFO (44)21F REQUENCY P ROGRAMMING (45)22VCO (46)22.1VCO AND PLL S ELF-C ALIBRATION (46)23V OLTAGE R EGULATORS (47)24O UTPUT P OWER P ROGRAMMING (47)25S ELECTIVITY (49)26C RYSTAL O SCILLATOR (51)26.1R EFERENCE S IGNAL (51)27E XTERNAL RF M ATCH (51)28PCB L AYOUT R ECOMMENDATIONS (52)29G ENERAL P URPOSE /T EST O UTPUT C ONTROL P INS (53)30A SYNCHRONOUS AND S YNCHRONOUS S ERIAL O PERATION (55)30.1A SYNCHRONOUS O PERATION (55)30.2S YNCHRONOUS S ERIAL O PERATION (55)31S YSTEM C ONSIDERATIONS AND G UIDELINES (55)31.1SRD R EGULATIONS (55)31.2F REQUENCY H OPPING AND M ULTI-C HANNEL S YSTEMS (56)31.3W IDEBAND M ODULATION NOT U SING S PREAD S PECTRUM (56)31.4D ATA B URST T RANSMISSIONS (56)31.5C ONTINUOUS T RANSMISSIONS (56)31.6C RYSTAL D RIFT C OMPENSATION (57)31.7S PECTRUM E FFICIENT M ODULATION (57)31.8L OW C OST S YSTEMS (57)31.9B ATTERY O PERATED S YSTEMS (57)31.10I NCREASING O UTPUT P OWER (57)32C ONFIGURATION R EGISTERS (58)32.1C ONFIGURATION R EGISTER D ETAILS –R EGISTERS WITH P RESERVED V ALUES IN SLEEP S TATE (62)32.2C ONFIGURATION R EGISTER D ETAILS –R EGISTERS THAT L OSE P ROGRAMMING IN SLEEP S TATE (81)32.3S TATUS R EGISTER D ETAILS (82)33P ACKAGE D ESCRIPTION (QLP20) (86)33.1R ECOMMENDED PCB L AYOUT FOR P ACKAGE (QLP20) (87)33.2S OLDERING I NFORMATION (87)33.3T RAY S PECIFICATION (87)33.4C ARRIER T APE AND R EEL S PECIFICATION (88)34O RDERING I NFORMATION (88)35R EFERENCES (88)36G ENERAL I NFORMATION (89)36.1D OCUMENT H ISTORY (89)36.2P RODUCT S TATUS D EFINITIONS (90)37A DDRESS I NFORMATION (91)38TI W ORLDWIDE T ECHNICAL S UPPORT (91)1 Absolute Maximum RatingsUnder no circumstances must the absolute maximum ratings given in Table 1 be violated. Stressexceeding one or more of the limiting values may cause permanent damage to the device.Caution! ESD sensitive device. Precaution should be used when handling the device in order to prevent permanent damage.Parameter Min Max Unit ConditionSupply voltage–0.3 3.9 VAll supply pins must have the same voltageVoltage on any digital pin –0.3VDD+0.3, max 3.9VVoltage on the pins RF_P, RF_N and DCOUPL –0.3 2.0 V Voltage ramp-up rate 120 kV/µs Input RF level+10 dBm Storage temperature range –50 150 °CSolder reflow temperature 260 °C According to IPC/JEDEC J-STD-020D ESD<500VAccording to JEDEC STD 22, method A114,Human Body ModelTable 1: Absolute Maximum Ratings2 Operating ConditionsThe CC2500 operating conditions are listed in Table 2 below.ParameterMin Max Unit Condition Operating temperature –40 85 °COperating supply voltage1.83.6VAll supply pins must have the same voltageTable 2: Operating Conditions3 General CharacteristicsParameter Min Typ Max Unit Condition/NoteFrequency range24002483.5MHzThere will be spurious signals at n/2·crystal oscillatorfrequency (n is an integer number). RF frequencies at n/2·crystal oscillator frequency should therefore be avoided (e.g. 2405, 2418, 2431, 2444, 2457, 2470 and 2483 MHz when using a 26 MHz crystal). Data rate 1.2 1.2 26500 250 500kBaudkBaud kBaud2-FSKGFSK and OOK(Shaped) MSK (also known as differential offset QPSK)Optional Manchester encoding (the data rate in kbps will be half the baud rate).Table 3: General Characteristics4 Electrical Specifications4.1 Current ConsumptionTc = 25°C, VDD = 3.0 V if nothing else stated. All measurement results obtained using the CC2500EM reference design ([4]). ParameterMin Typ Max Unit Condition400 nA Voltage regulator to digital part off, register values retained (SLEEP state). All GDO pins programmed to 0x2F (HW to 0)900nAVoltage regulator to digital part off, register values retained, low-power RC oscillator running (SLEEP state with WOR enabled) 92 µA Voltage regulator to digital part off, register values retained, XOSC running (SLEEP state with MCSM0.OSC_FORCE_ON set) Current consumption in power down modes160 µAVoltage regulator to digital part on, all other modules in power down (XOFF state)8.1 µAAutomatic RX polling once each second, using low-power RC oscillator, with 460 kHz filter bandwidth and 250 kBaud data rate,PLL calibration every 4thwakeup. Average current with signal in channel below carrier sense level (MCSM2.RX_TIME_RSS I=1). 35 µA Same as above, but with signal in channel above carrier sense level, 1.95 ms RX timeout, and no preamble/sync word found. 1.4 µAAutomatic RX polling every 15thsecond, using low-power RC oscillator, with 460 kHz filter bandwidth and 250 kBaud data rate,PLL calibration every 4thwakeup. Average current with signal in channel below carrier sense level (MCSM2.RX_TIME_RSSI =1). 34 µA Same as above, but with signal in channel above carrier sense level, 29.3 ms RX timeout, and no preamble/sync word found. 1.5 mA Only voltage regulator to digital part and crystal oscillator running (IDLE state)Current consumption7.4mAOnly the frequency synthesizer is running (FSTXON state). This currents consumption is also representative for the otherintermediate states when going from IDLE to RX or TX, including the calibration state.17.0 mA Receive mode, 2.4 kBaud, input at sensitivity limit, MDMCFG2.DEM_DCFILT_OFF =014.5 mA Receive mode, 2.4 kBaud, input well above sensitivity limit, MDMCFG2.DEM_DCFILT_OFF =017.3 mA Receive mode, 10 kBaud, input at sensitivity limit, MDMCFG2.DEM_DCFILT_OFF =014.9 mA Receive mode, 10 kBaud, input well above sensitivity limit, MDMCFG2.DEM_DCFILT_OFF =018.8 mA Receive mode, 250 kBaud, input at sensitivity limit, MDMCFG2.DEM_DCFILT_OFF =015.7 mA Receive mode, 250 kBaud, input well above sensitivity limit, MDMCFG2.DEM_DCFILT_OFF =016.6 mA Receive mode, 250 kBaud current optimized, input at sensitivity limit, MDMCFG2.DEM_DCFILT_OFF =113.3 mA Receive mode, 250 kBaud current optimized, input well above sensitivity limit, MDMCFG2.DEM_DCFILT_OFF =1 19.6 mA Receive mode, 500 kBaud, input at sensitivity limit, MDMCFG2.DEM_DCFILT_OFF =0Current consumption, RX states17.0mAReceive mode, 500 kBaud, input well above sensitivity limit, MDMCFG2.DEM_DCFILT_OFF =011.1 mA Transmit mode, –12 dBm output power 15.0 mA Transmit mode, -6 dBm output power 21.2 mA Transmit mode, 0 dBm output power Current consumption, TX states21.5mATransmit mode, +1 dBm output powerTable 4: Current Consumption4.2 RFReceiveSectionTc = 25°C, VDD = 3.0 V if nothing else stated. All measurement results obtained using the CC2500EM reference design ([4]).Parameter Min Typ Max Unit Condition/NoteDigital channel filter bandwidth 58 812 kHz User programmable. The bandwidth limits areproportional to crystal frequency (given values assumea 26.0 MHz crystal).2.4 kBaud data rate, sensitivity optimized,MDMCFG2.DEM_DCFILT_OFF=0(2-FSK, 1% packet error rate, 20 bytes packet length, 203 kHz digital channel filter bandwidth)Receiver sensitivity –104 dBm The RX current consumption can be reduced byapproximately 1.7 mA by settingMDMCFG2.DEM_DCFILT_OFF=1. The typical sensitivityis then -102 dBm and the temperature range is from 0o Cto +85o C.The sensitivity can be improved to typically –106 dBmwith MDMCFG2.DEM_DCFILT_OFF=0 by programmingregisters TEST2 and TEST1 (see page 82). Thetemperature range is then from 0o C to +85o C. Saturation–13 dBmAdjacent channel rejection 23 dB Desired channel 3 dB above the sensitivity limit. 250kHz channel spacingAlternate channel rejection 31 dB Desired channel 3 dB above the sensitivity limit. 250kHz channel spacingSee Figure 22 for plot of selectivity versus frequencyoffsetBlocking±10 MHz offset ±20 MHz offset ±50 MHz offset 647071dBmdBmdBmWanted signal 3 dB above sensitivity level.Compliant with ETSI EN 300 440 class 2 receiverrequirements.10 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0(2-FSK, 1% packet error rate, 20 bytes packet length, 232 kHz digital channel filter bandwidth)Receiver sensitivity –99 dBm The RX current consumption can be reduced byapproximately 1.7 mA by settingMDMCFG2.DEM_DCFILT_OFF=1. The typical sensitivityis then -97 dBmThe sensitivity can be improved to typically –101 dBmwith MDMCFG2.DEM_DCFILT_OFF=0 by programmingregisters TEST2 and TEST1 (see page 82). Thetemperature range is then from 0o C to +85o C. Saturation–9 dBmAdjacent channel rejection 18 dB Desired channel 3 dB above the sensitivity limit. 250kHz channel spacingAlternate channel rejection 25 dB Desired channel 3 dB above the sensitivity limit. 250kHz channel spacingSee Figure 23 for plot of selectivity versus frequencyoffsetBlocking±10 MHz offset ±20 MHz offset ±50 MHz offset 596566dBdBdBWanted signal 3 dB above sensitivity level.Compliant with ETSI EN 300 440 class 2 receiverrequirements.Parameter Min Typ Max Unit Condition/Note250 kBaud data rate, sensitivity optimized,MDMCFG2.DEM_DCFILT_OFF=0(MSK, 1% packet error rate, 20 bytes packet length, 540 kHz digital channel filter bandwidth)Receiver sensitivity –89 dBmSaturation –13 dBmAdjacent channel rejection 21 dB Desired channel 3 dB above the sensitivity limit. 750kHz channel spacingAlternate channel rejection 30 dB Desired channel 3 dB above the sensitivity limit. 750kHz channel spacingSee Figure 24 for plot of selectivity versus frequencyoffsetBlocking±10 MHz offset ±20 MHz offset ±50 MHz offset 465355dBdBdBWanted signal 3 dB above sensitivity level.Compliant with ETSI EN 300 440 class 2 receiverrequirements.250 kBaud data rate, current optimized,MDMCFG2.DEM_DCFILT_OFF=1(MSK, 1% packet error rate, 20 bytes packet length, 540 kHz digital channel filter bandwidth)Receiver sensitivity –87 dBmSaturation–12dBmAdjacent channel rejection 21 dB Desired channel 3 dB above the sensitivity limit. 750kHz channel spacingAlternate channel rejection 30 dB Desired channel 3 dB above the sensitivity limit. 750kHz channel spacingSee Figure 25 for plot of selectivity versus frequencyoffsetBlocking±10 MHz offset ±20 MHz offset ±50 MHz offset 465255dBdBdBWanted signal 3 dB above sensitivity level.Compliant with ETSI EN 300 440 class 2 receiverrequirements.500 kBaud data rate, MDMCFG2.DEM_DCFILT_OFF=0(MDMCFG2.DEM_DCFILT_OFF=1 cannot be used for data rates >250 kBaud)(MSK, 1% packet error rate, 20 bytes packet length, 812 kHz digital channel filter bandwidth)Receiver sensitivity –83 dBmSaturation–18dBmAdjacent channel rejection 14 dB Desired channel 3 dB above the sensitivity limit. 1 MHzchannel spacingAlternate channel rejection 25 dB Desired channel 3 dB above the sensitivity limit. 1 MHzchannel spacingSee Figure 26 for plot of selectivity versus frequencyoffsetBlocking±10 MHz offset ±20 MHz offset ±50 MHz offset 404850dBdBdBWanted signal 3 dB above sensitivity level.Compliant with ETSI EN 300 440 class 2 receiverrequirements.GeneralSpurious emissions25 MHz – 1 GHz Above 1 GHz –57–47dBmdBmRX latency 9 bit Serial operation. Time from start of reception until datais available on the receiver data output pin is equal to 9bit.Table 5: RF Receive Section4.3RF Transmit SectionTc = 25°C, VDD = 3.0 V, 0 dBm if nothing else stated. All measurement results obtained using the CC2500EM reference design ([4]). Parameter Min Typ Max Unit Condition/NoteDifferential load impedance80 + j74ΩDifferential impedance as seen from the RF-port (RF_P and RF_N ) towards the antenna. Follow the CC2500EM reference design ([4]) available from the TI website. Output power, highest setting+1dBmOutput power is programmable and full range is available across the entire frequency band.Delivered to a 50 Ω single-ended load via CC2500EM reference design ([4]) RF matching network.Output power, lowest setting–30dBmOutput power is programmable and full range is availableacross the entire frequency band.Delivered to a 50 Ω single-ended load via CC2500EM reference design ([4]) RF matching network.It is possible to program less than -30 dBm output power, but this is not recommended due to large variation in output power across operating conditions and processing corners for these settings.Occupied bandwidth (99%)91 117 296 489kHz kHz kHz kHz2.4 kBaud, 38.2 kHz deviation, 2-FSK10 kBaud, 38.2 kHz deviation, 2-FSK 250 kBaud, MSK 500 kBaud, MSKAdjacent channelpower (ACP)-28 -27 -22 -21dBcdBcdBc dBc 2.4 kBaud, 38.2 kHz deviation, 2-FSK, 250 kHz channel spacing10 kBaud, 38.2 kHz deviation, 2-FSK, 250 kHz channel spacing250 kBaud, MSK, 750 kHz channel spacing 500 kBaud, MSK, 1 MHz channel spacing Spurious emissions 25 MHz – 1 GHz 47-74, 87.5-118, 174-230, 470-862 MHz 1800-1900 MHz At 2·RF and 3·RF Otherwise above 1 GHz–36 –54 –47 –41 –30dBm dBmdBm dBm dBmRestricted band in Europe Restricted bands in USATX latency8bitSerial operation. Time from sampling the data on the transmitter data input pin until it is observed on the RF output ports.Table 6: RF Transmit Section4.4 CrystalOscillatorTc = 25°C, VDD = 3.0 V if nothing else stated.Parameter Min Typ Max Unit Condition/NoteCrystal frequency 26 26 27 MHzTolerance ±40 ppm This is the total tolerance including a) initial tolerance, b) crystalloading, c) aging, and d) temperature dependence.The acceptable crystal tolerance depends on RF frequency andchannel spacing / bandwidth.ESR100ΩStart-up time 150 µs Measured on CC2500EM reference design ([4]) using crystalAT-41CD2 from NDK.This parameter is to a large degree crystal dependent.Table 7: Crystal Oscillator Parameters4.5 Low Power RC OscillatorTc = 25°C, VDD = 3.0 V if nothing else stated. All measurement results obtained using the CC2500EM reference design ([4]).Parameter Min Typ Max Unit Condition/NoteCalibrated frequency 34.7 34.7 36 kHz Calibrated RC oscillator frequency is XTALfrequency divided by 750Frequency accuracy after calibration -1/+10% The RC oscillator contains an error in thecalibration routine that statistically occurs in17.3% of all calibrations performed. The givenmaximum accuracy figures account for thecalibration error. Refer also to the CC2500Errata Notes.Temperature coefficient +0.4 % / °C Frequency drift when temperature changesafter calibrationSupply voltage coefficient +3 % / V Frequency drift when supply voltage changesafter calibrationInitial calibration time 2 ms When the RC oscillator is enabled, calibrationis continuously done in the background as longas the crystal oscillator is running.Table 8: RC Oscillator Parameters4.6 Frequency Synthesizer CharacteristicsTc = 25°C, VDD = 3.0 V if nothing else stated. All measurement results obtained using the CC2500EM reference design ([4]). Min figures are given using a 27 MHz crystal. Typ and max figures are given using a 26 MHz crystal.Parameter Min Typ Max Unit Condition/NoteProgrammed frequency resolution 397 F XOSC/216412 Hz 26-27 MHz crystal.Synthesizer frequency tolerance±40 ppm Given by crystal used. Required accuracy (includingtemperature and aging) depends on frequency band andchannel bandwidth / spacing.–78 dBc/Hz @ 50 kHz offset from carrier–78 dBc/Hz @ 100 kHz offset from carrier–81 dBc/Hz @ 200 kHz offset from carrier–90 dBc/Hz @ 500 kHz offset from carrier–100 dBc/Hz @ 1 MHz offset from carrier–108 dBc/Hz @ 2 MHz offset from carrier–114 dBc/Hz @ 5 MHz offset from carrierRF carrier phase noise–118 dBc/Hz @ 10 MHz offset from carrierPLL turn-on / hop time 85.1 88.4 88.4 µs Time from leaving the IDLE state until arriving in the RX,FSTXON or TX state, when not performing calibration.Crystal oscillator running.PLL RX/TX settlingtime9.3 9.6 9.6 µs Settling time for the 1·IF frequency step from RX to TXPLL TX/RX settlingtime20.7 21.5 21.5 µs Settling time for the 1·IF frequency step from TX to RXPLL calibration time 694 721 721 µs Calibration can be initiated manually or automaticallybefore entering or after leaving RX/TX.Table 9: Frequency Synthesizer Parameters4.7 Analog Temperature SensorThe characteristics of the analog temperature sensor at 3.0 V supply voltage are listed in Table 10 below. Note that it is necessary to write 0xBF to the PTEST register to use the analog temperature sensor in the IDLE state.Parameter Min Typ Max Unit Condition/NoteOutput voltage at –40°C 0.654 VOutput voltage at 0°C 0.750 VOutput voltage at +40°C 0.848 VOutput voltage at +80°C 0.946 VTemperature coefficient 2.43 mV/°C Fitted from –20°C to +80°CError in calculated temperature, calibrated -2 *0 2* °C From–20°C to +80°C when using 2.43 mV / °C,after 1-point calibration at room temperature* The indicated minimum and maximum error with 1-point calibration is based on measured values fortypical process parametersCurrent consumptionincrease when enabled0.3 mATable 10: Analog Temperature Sensor Parameters4.8 DCCharacteristicsTc = 25°C if nothing else stated.Digital Inputs/Outputs Min Max Unit ConditionLogic "0" input voltage 0 0.7 VLogic "1" input voltage VDD-0.7 VDD VLogic "0" output voltage 0 0.5 V For up to 4 mA output currentLogic "1" output voltage VDD-0.3 VDD V For up to 4 mA output currentLogic "0" input current N/A –50 nA Input equals 0 VLogic "1" input current N/A 50 nA Input equals VDDTable 11: DC Characteristics4.9 Power-OnResetWhen the power supply complies with the requirements in Table 12 below, proper Power-On-Reset functionality is guaranteed. Otherwise, the chip should be assumed to have unknown state until transmitting an SRES strobe over the SPI interface. See Section 19.1 on page 40 for further details.Parameter Min Typ Max Unit Condition/NotePower ramp-up time 5 ms From 0 V until reaching 1.8 VPower off time 1 ms Minimum time between power-on and power-offTable 12: Power-on Reset Requirements5 Pin Configuration15432attach padSCLK SO (GDO1)GDO2DVDD DCOUPL GDO0 (ATEST)XOSC_Q1AVDD XOSC_Q2AVDDRF_P RF_N G N DAVDD R B I A SD G U A R DG N DS ICSnAVDDFigure 1: Pinout Top ViewNote: The exposed die attach pad must be connected to a solid ground plane as this is the main ground connection for the chip.Pin # Pin name Pin type Description1 SCLK Digital Input Serial configuration interface, clock input2 SO (GDO1) Digital Output Serial configuration interface, data output.Optional general output pin when CSn is high3 GDO2 Digital Output Digital output pin for general use:• Test signals•FIFO status signals•Clear Channel Indicator•Clock output, down-divided from XOSC•Serial output RX data4 DVDD Power (Digital) 1.8 - 3.6 V digital power supply for digital I/O’s and for the digital corevoltage regulator5 DCOUPL Power (Digital) 1.6 - 2.0 V digital power supply output for decoupling.NOTE: This pin is intended for use with the CC2500 only. It can not beused to provide supply voltage to other devices.6 GDO0(ATEST) Digital I/O Digital output pin for general use:• Test signals•FIFO status signals•Clear Channel Indicator•Clock output, down-divided from XOSC•Serial output RX data•Serial input TX dataAlso used as analog test I/O for prototype/production testing7 CSn Digital Input Serial configuration interface, chip select8 XOSC_Q1 Analog I/O Crystal oscillator pin 1, or external clock input9 AVDD Power (Analog) 1.8 - 3.6 V analog power supply connection10 XOSC_Q2 Analog I/O Crystal oscillator pin 211 AVDD Power (Analog) 1.8 - 3.6 V analog power supply connection12 RF_P RF I/O Positive RF input signal to LNA in receive modePositive RF output signal from PA in transmit mode 13 RF_N RF I/O Negative RF input signal to LNA in receive modeNegative RF output signal from PA in transmit mode14 AVDD Power (Analog) 1.8 - 3.6 V analog power supply connection15 AVDD Power (Analog) 1.8 - 3.6 V analog power supply connection16 GND Ground (Analog) Analog ground connection17 RBIAS Analog I/O External bias resistor for reference current18 DGUARD Power (Digital) Power supply connection for digital noise isolation19 GND Ground (Digital) Ground connection for digital noise isolation20 SI Digital Input Serial configuration interface, data inputTable 13: Pinout Overview。
CC2500 模块规格书
CC2500 模块规格书V1.0MO-CC25002.4GHz FSK/MSK/ASK/OOK 收发模块2.4GHz FSK/ASK/OOK/MSK 收发模块DescriptionCC2500 is a FSK/ASK/OOK/MSK Transceiver module.It provides extensive hardware support for packet handling ,data buffering ,burst transmissions ,clear channel assessment, link quality indication and wake on radio . It ‘s data stream can be manchester coded by the modulator and decoded by the demodulator .It has a high performance and easily to design your product .It can be used in 2400-2483.5MHz ISM/SRD band systems,Consumer Electronics, Wireless game controllers,Wireless audioand others wireless systems.we support the frequency have 2400-2483.5MHz ISM Band modules now,一般描述CC2500 是集FSK/ASK/OOK/MSK .调制方式于一体的收发模块。
它提供扩展硬件支持实现信息包处理、数据缓冲、群发射、空闲信道评估、链接质量指示和无线唤醒，可以采用曼彻斯特编码进行调制解调它的数据流。
性能优越并且易于应用到你的产品设计中，它可以应用在2400-2483.5MHz ISM/SRD 频段的系统中，比如消费类电子产品、无线游戏控制器、无线音频传输等等。
CC2500 无线模块 说明书
CC2500无线模块 用户手册目录产品介绍 (3)基本特点 (3)典型应用场合 (4)模块接口说明 (5)CC2500模块工作方式 (7)工作模式寄存器介绍 (7)命令寄存器介绍 (7)功能配置寄存器介绍 (8)状态寄存器介绍 (9)程序参考设计 (10)SPI时序示意图 (10)SPI接口时序规范 (10)参考例程 (11)SPI读写操作 (11)SPI写寄存器操作 (12)SPI读寄存器操作 (12)CC2500软件复位 (12)CC2500初始化设置 (13)数据接收流程操作 (14)数据发送流程操作 (15)无线应用注意事项 (15)我们的承诺 (16)产品介绍CC2500芯片，是TI（原Chipcon被TI收购）推出的一款超低功耗、低成本的无线收发模块，其载频范围在 2.400GHz～2.483GHz内可调，可用来实现多信道通信。
它支持多种调制方式，包括FSK、GFSK、OOK和MSK，数据传输速率最高可达500kb/s。
CC2500还为信息包处理、数据缓冲、脉冲传送、空闲信道评估、连接品质指示和电磁唤醒等功能提供了额外的硬件支持。
它有四种主要的状态：接收（RX）、发送（TX）、空闲（IDLE）和休眠（SLEEP）基本特点(1) 2400-2483.5 MHz的ISM和SRD频段(2) 最高工作速率500kbps，支持2-FSK、GFSK和MSK调制方式(3) 高灵敏度（-101dBm在10Kbps 1%）(4) 内置硬件CRC 检错和点对多点通信地址控制(5) 较低的电流消耗（RX中，13.3mA）(6) 可编程控制的输出功率，对所有的支持频率可达 1dBm(7) 支持低功率电磁波激活功能(8) 支持传输前自动清理信道访问（CCA），即载波侦听系统(9) 快速频率变动合成器带来的合适的频率跳跃系统(10) 模块可软件设地址，软件编程非常方便(11) 标准DIP间距接口，便于嵌入式应用(12) 单独的64字节RX和TX数据FIFOWOR功能：为了节约电能，射频芯片通常采用休眠模式。
2.4G射频无线芯片成熟方案cc2500
标准包装 家庭 包装 数据速率（最大值）
3,000 RF 收发器 带卷（TR） 500kBaud
类别 系列 频率 调制或协议
射频/IF 和 RFID
2.4GHz 2-FSK，ASK，GFSK，MSK，OOK
应用
ISM，SRD
功率-输出
1dBm
灵敏度 电流 - 接收 数据接口 天线连接器 工作温度
~ 85°C
请您及时更换请请请您正在使用的模版将于2周后被下线请您及时更换
2.4G射频无线芯片成熟方案 cc2500
厂 家 ：TI 标 准 包 装 ：带卷（TR） 封装/外壳：20-VFQFN 裸露焊盘
CC2500RGPR动能世纪电子元器件通过多种应力试验性能筛选，降低电子元器件的失效率，增加产品的可靠性。 代理： 136622419-小黄
电压-电源 电流-传输 存储容量
封装/外壳
1.8 V ~ 3.6 V 21.5mA
20-VFQFN 裸露焊盘
2500中文说明1
转译：BI7LAX注：本文是由翻译软件转制而成，个别内容未能贴题，请使用者自行理解，不便之处敬请原谅MotorolaASTRO卫星XTS 2500军用数字便携式收音机模型三用户指南,ASTRO卫星（R）的XTS 2500选择一个区域使用菜单发送无声紧急警报数字便携式收音机，Ⅲ型一按U，直到第一电台并按下紧急按钮。
你快速参考卡看不出有任何的LED，你听到没有声调。
产品安全和符合射频暴露2按D，E，或直接下区F。
2按对讲机。
注意！第一在使用本产品前，阅读区，直到你的愿望是显示的操作指令3按U。
！在产品安全和射频载三级安全使用继续进行，直到您退出：ç欧雄曝光小册子附上您的收音机。
4按H确认，或按对讲机传送。
*按住一个紧急按钮注意！第二这台收音机是受限制的职业，以满足或只使用FCC射频能量暴露要求。
在使用这个选择频道*按对讲机了。
产品，阅读意识信息和射频能量在产品的安全性和射频方法1使用说明：使用选择旋钮曝光小册子附上你的收音机（在选择所需的区域摩托罗拉，把16 -出版零件编号6881095C98），以确保遵守射频能量暴露限值。
位置旋钮来选择想要的频道。
3位方法1：使用菜单接电话16位旋转开关选择钮一按U，直到陈一电话般响起，绿色指示灯闪烁，开/关/最高的按钮电话，米显示。
音量旋钮2按D，E，或直接下文F陈。
2按下呼叫按钮的响应。
顶侧置喇叭/麦克风按钮3按U频道，直到你的愿望是显示。
3按下PTT按键通话，释放听。
PTT按键显示4按H确认，或按对讲机传送。
4按H挂断电话。
菜单选择一侧的按钮1按钮发送紧急报警电话呼叫发送2 1电台的按钮并按下紧急按钮。
你一按U直到喷看到红色的LED应用按钮，你听到的短期，中期高亢 _ _ _ _ _ _ _（TMS的按钮）音。
首页按钮2按D，E，或直接下文F喷。
4路2屏幕显示紧急情况。
3按U或V滚动到的电话号码。
导航按键的键盘3当收到确认，你听到4按对讲机（或快速访问按钮，如果写下你的电台的编程功能，在四个声调，报警结束，电台退出编程）说话，松开听。
DEMAG CC2500-1
CC 2500-12CC 2500-1www.12345678CC 2500-13Contents Inhalt ContenuSpecifications · T echnische Daten ·CaractéristiquesSpecifications ·Technische Daten ·Caractéristiques . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4Superlift configurations ·Superlift-Konfigurationen ·Combinaisons Superlift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6Specifications ·Technische Daten ·Caractéristiques . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7Boom combinations · Ausleger-Kombinationen ·Combinaisons de flèche . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10Erection /lowering · Aufrichten /Ablegen · Monter /déposer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12Main boom ·Hauptausleger · Flèche principaleWorking ranges · Arbeitsbereiche ·Portées (SH, SH /LH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13Lifting capacities ·Tragfähigkeiten ·Capacités de levage (SH, SH /LH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14Lifting capacities with Superlift ·Tragfähigkeiten mit Superlift ·Capacités de levage avec Superlift (SSL, SSL /LSL) . . . . . . . . . . . . . . . . .18Working ranges with Superlift · Arbeitsbereiche mit Superlift ·Portées avec Superlift (SSL, SSL /LSL) . . . . . . . . . . . . . . . . . . . . . . . . . . .25Fixed fly jib ·Starrer Hilfsausleger ·Fléchette fixeWorking ranges, 10°· Arbeitsbereiche, 10°·Portées, 10°(SH + LF , SH /LH + LF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26Lifting capacities ·Tragfähigkeiten ·Capacités de levage (SH + LF , SH /LH + LF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27Working ranges with Superlift, 10°· Arbeitsbereiche mit Superlift, 10°·Portées avec Superlift, 10°(SSL + LF , SSL /LSL + LF) . . . . . . . . .31Lifting capacities with Superlift ·Tragfähigkeiten mit Superlift ·Capacités de levage avec Superlift (SSL + LF , SSL /LSL + LF) . . . . . . . . .32Luffing fly jib ·Wippbarer Hilfsausleger ·Fléchette à volée variableWorking ranges, main boom 87°· Arbeitsbereiche, Hauptausleger 87°·Portées, flèche 87°(SW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39Lifting capacities ·Tragfähigkeiten ·Capacités de levage (SW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40Working ranges with SL, main boom 87°· Arbeitsbereiche mit SL, Hauptausleger 87°· Portées avec SL, flèche 87°(SWSL) . . . . . . . . . . . .48Lifting capacities with Superlift ·Tragfähigkeiten mit Superlift · Capacités de levage avec Superlift (SWSL) . . . . . . . . . . . . . . . . . . . . . . . . . .49Fixed fly jib ·Starrer Hilfsausleger ·Fléchette fixeWorking ranges with Superlift, 17.5°· Arbeitsbereiche mit Superlift, 17,5°·Portées avec Superlift, 17,5°(LFVL) . . . . . . . . . . . . . . . . . . .63Lifting capacities with Superlift, 17.5°·Tragfähigkeiten mit Superlift, 17,5°·Capacités de levage avec Superlift, 17,5°(LFVL) . . . . . . . .64Combinations for wind mill erections ·Windkraftkombinationen ·Combinaisons pour la montage d’éoliennesWorking ranges · Arbeitsbereiche ·Portées (SSL /LSL + LF - SGLmax) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66Lifting capacities ·Tragfähigkeiten ·Capacités de levage (SSL /LSL + LF - SGLmax) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67T echnical description ·T echnische Beschreibung ·Descriptif techniqueCrawler carrier · Superstructure ·Optional equipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68Boom configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69Raupenunterwagen · Oberwagen · Zusatzausrüstung . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .70Auslegervarianten . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71Châssis à chenilles · Partie tournante · Equipement optionnels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72Combinaisons de flèche . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73SpecificationsT echnische Daten CaractéristiquesSuperlift configurations Superlift-Konfigurationen Combinaisons SuperliftSpecificationsT echnische Daten CaractéristiquesKeyZeichenerklärungLégendeCC2500-19Boom combinationsAusleger-KombinationenCC 2500-1 10CC 2500-112Erection / lowering of the CC 2500-1 boom systems to the ground Aufrichten /Ablegen der CC 2500-1 AuslegersystemeMonter /déposer les systèmes de flèche de la CC 2500-1 sur solBoom combination Fly jib Auslegervariante Hilfsausleger Main boom · Hauptausleger · Flèche principaleCombinaison de flèche Fléchette (m)m SH SH/LH SW 85°24303642485460667224303642485460667278849096102108X X X X X X X X X (X)[X]–––––––X X X X X X X X X [X][X]O X X X X X X X X X X X X X X X X X X X X X X X X X X X XX X X X X X X X X X X X X X X X X [X][X](X)X X X X (X)(X)[X][X][X][X][X][X][X][X][X][X][X][X][X][X][X]O O O O O O O O O O O O ––––––––––––––––––––––––––––––––––––––––––––––––––––––SH + LF1210°/20°/30°2436X X X X X X X X X X X X X X X X X X X X X X X X (X)(X)(X)[X][X][X][X][X][X]––––––––––––SH/LH +LF 1210°/20°/30°2436–––––––––X X XX X XX X XX X XX X XX X XX X (X)[X][X][X][X][X][X]O [X]O––––––Remarks ·Bemerkungen ·RemarquesWorking ranges main boomCC2500-113CC 2500-114Lifting capacities main boom Tragfähigkeiten HauptauslegerCapacités de levage flèche principale360°Radius Main boom ·Hauptausleger ·Flèche principaleAusladung Portée m 1m 1617181910111214161820222426283034384246505458DIN/ISO24,0t ,0-,0317,0303,0291,0269,0234,0199,0156,5128,5108,594,182,6-,0-,0-,0-,0-,0-,0-,0-,0-,0-,0-30,0t ,0362,0344,0329,0317,0268,0232,8197,5155,5127,5107,592,681,071,964,458,3-,0-,0-,0-,0-,0-,0-,0-36,0t ,0-,0371,0356,0322,0267,0231,8196,5154,0126,0106,091,279,670,362,856,651,4-,0-,0-,0-,0-,0-,0-42,0t ,0-,0400,0366,0320,0266,0230,5195,0152,5124,5104,589,778,168,861,355,049,841,535,4-,0-,0-,0-,0-48,0t ,0-,0-,0365,0318,0265,0229,5194,0151,5123,5103,588,576,967,660,053,748,440,033,829,0-,0-,0-,0-54,0t ,0-,0-,0315,0315,0264,0228,8193,5151,0123,0103,087,976,266,959,353,047,739,232,827,923,9-,0-,0-60,0t ,0-,0-,0-,0265,0264,0228,5193,0150,5122,5102,087,275,566,158,552,246,838,331,826,722,519,116,4-66,0t ,0-,0-,0-,0-,0233,0212,8192,5150,0122,0101,586,674,965,557,851,546,137,531,025,621,417,915,012,772,0t ,0-,0-,0-,0-,0192,5192,5189,0149,5121,5101,086,174,465,057,350,945,536,930,324,820,416,914,011,578,0t ,0-,0-,0-,0-,0-,0163,0163,0149,5121,0100,585,673,964,456,850,344,936,329,524,019,616,013,110,684,0t ,0-,0-,0-,0-,0-,0140,0140,0137,5120,5100,085,073,263,756,049,644,235,528,623,118,615,012,09,5SH160t +40t ZB58-,0-,0-,0-,0-,0-,0-,08,0-,0-,0-,0CC 2500-1152360°Radius Main boom ·Hauptausleger ·Flèche principaleAusladung Portée m DIN/ISO24,0t ,0-,0250,0241,0234,0193,5167,8142,0111,591,176,665,857,5-,0-,0-,0-,0-,0-,0-,0-,0-,0-,0-,030,0t ,0288,0277,0268,0234,0192,5166,8141,0110,089,875,264,355,949,343,939,5-,0-,0-,0-,0-,0-,0-,0-,036,0t ,0-,0305,0295,0233,0191,5165,5139,5109,088,473,862,954,547,742,337,834,1-,0-,0-,0-,0-,0-,0-,042,0t ,0-,0332,0294,0232,0190,5164,5138,5107,587,172,461,553,046,240,836,232,426,522,1-,0-,0-,0-,0-,048,0t ,0-,0-,0294,0231,0189,5163,5137,5106,586,071,360,351,845,039,534,931,124,920,116,6-,0-,0-,0-,054,0t ,0-,0-,0289,0231,0189,0163,0137,0106,085,470,759,751,144,338,834,230,323,919,015,312,4-,0-,0-,060,0t ,0-,0-,0-,0229,0188,5162,5136,5105,584,870,059,050,443,638,033,329,422,817,914,011,08,77,3-,066,0t ,0-,0-,0-,0-,0188,0162,0136,0105,084,269,458,449,842,937,332,728,621,916,913,09,97,4-,0-,072,0t ,0-,0-,0-,0-,0184,0158,0135,5104,583,869,057,949,342,436,832,127,921,216,112,29,0-,0-,0-,078,0t ,0-,0-,0-,0-,0-,0154,5134,5104,083,468,557,448,841,936,231,427,220,515,411,48,2-,0-,0-,084,0t ,0-,0-,0-,0-,0-,0140,0131,5103,082,767,956,748,141,235,530,526,319,614,510,47,2-,0-,0-,0SHt360°DIN/ISO1m 1617181910111214161820222426283034384246505354Radius Main boom ·Hauptausleger ·Flèche principaleAusladung Portée m 1m 15,5161718191011121416182022242628303438424624,0t ,0309,0301,0288,0259,0204,0168,5145,8123,096,478,565,856,449,1-,0-,0-,0-,0-,0-,0-,0-,030,0t ,0-,0330,0315,0258,0203,0167,0144,5122,095,177,264,454,947,541,737,033,2-,0-,0-,0-,0-,036,0t ,0-,0-,0342,0257,0202,0166,0143,3120,593,875,863,053,546,140,235,431,528,3-,0-,0-,0-,042,0t ,0-,0-,0343,0256,0201,0165,0142,3119,592,574,561,652,044,638,733,929,926,621,317,3-,0-,048,0t ,0-,0-,0-,0256,0200,0164,0141,3118,591,473,460,550,843,437,432,628,625,119,515,412,4-,054,0t -,0-,0-,0250,0200,0163,5140,8118,090,972,859,950,242,736,831,927,824,218,514,311,18,660,0t -,0-,0-,0-,0198,0163,0140,3117,590,372,259,249,542,036,031,126,923,217,513,19,87,266,0t -,0-,0-,0-,0-,0161,5139,3117,089,971,658,648,941,435,430,426,022,416,612,28,8-,072,0t -,0-,0-,0-,0-,0158,0135,0116,589,571,258,248,540,934,829,725,421,715,811,47,9-,078,0t -,0-,0-,0-,0-,0-,0132,0114,589,070,857,747,940,434,329,124,721,015,110,77,2-,084,0t -,0-,0-,0-,0-,0-,0128,5111,587,170,057,147,339,733,528,223,820,114,29,7-,0-,0SHCC 2500-116Lifting capacities main boom Tragfähigkeiten HauptauslegerCapacités de levage flèche principale360°Radius Main boom ·Hauptausleger ·Flèche principaleAusladung Portée mDIN/ISO42,048,054,060,066,072,078,084,090,096,0102,0108,0t +40t ZB-,0-,0-,0-,0-,0-,0-,0-,0-,0-,0-,0-,078CC 2500-1172360°Radius Main boom ·Hauptausleger ·Flèche principaleAusladung Portée m DIN/ISO42,0t ,0225,0225,0225,0194,5165,0142,5127,0111,591,276,565,557,050,244,640,036,230,125,6-,0-,0-,0-,0-,0-,0-,0-,0-,048,0t ,0-,0225,0225,0194,0164,0142,0126,3110,590,275,564,555,949,143,538,935,028,924,320,7-,0-,0-,0-,0-,0-,0-,0-,054,0t ,0-,0225,0225,0193,5163,5141,5126,0110,589,875,064,055,448,542,938,334,428,223,519,816,8-,0-,0-,0-,0-,0-,0-,060,0t ,0-,0-,0225,0192,5163,0140,5124,8109,088,773,962,854,247,341,737,133,226,922,118,215,212,710,8-,0-,0-,0-,0-,066,0t ,0-,0-,0174,0174,0162,5140,0124,5109,088,473,662,553,947,041,436,732,826,521,617,714,512,010,08,3-,0-,0-,0-,072,0t ,0-,0-,0-,0154,5154,5139,5124,0108,587,772,961,853,146,240,635,932,025,620,516,613,410,88,76,95,5-,0-,0-,078,0t ,0-,0-,0-,0135,0135,0131,0119,5108,087,472,561,452,745,840,235,531,525,120,016,012,810,18,06,24,73,42,6-,084,0t ,0-,0-,0-,0-,0112,0112,0109,8107,586,972,160,952,245,339,735,031,024,419,315,212,09,47,25,33,8-,0-,0-,090,0t ,0-,0-,0-,0-,098,598,597,195,786,671,860,752,045,039,434,730,724,118,914,911,68,96,74,93,3-,0-,0-,096,0t ,0-,0-,0-,0-,0-,086,586,585,382,871,260,651,945,039,334,630,623,918,714,611,38,66,44,52,9-,0-,0-,0102,0t ,0-,0-,0-,0-,0-,072,372,372,369,867,359,250,944,238,734,030,023,618,414,311,08,36,04,1-,0-,0-,0-,0108,0t ,0-,0-,0-,0-,0-,0-,052,652,651,248,546,043,841,736,932,328,322,017,113,210,07,35,03,1-,0-,0-,0-,0SH /LH120t360°DIN/ISO100 t1m 171819101112131416182022242628303438424650545862666970Radius Main boom ·Hauptausleger ·Flèche principaleAusladung Portée m 1m 1718191011121314161820222426283034384246505458626642,0t ,0225,0225,0206,0169,0143,0123,5110,196,778,665,756,048,642,637,833,830,425,121,2-,0-,0-,0-,0-,0-,0-,048,0t ,0-,0225,0205,0168,5142,5123,0109,495,877,664,755,047,541,636,732,629,223,919,816,6-,0-,0-,0-,0-,0-,054,0t ,0-,0225,0205,0168,0142,0122,5108,995,377,264,254,547,041,036,132,028,623,218,915,613,0-,0-,0-,0-,0-,060,0t ,0-,0-,0202,0167,5141,0121,5107,994,376,063,153,345,839,834,930,827,421,817,414,011,39,27,6-,0-,0-,066,0t ,0-,0-,0174,0166,0141,0121,5107,894,175,862,853,145,539,534,530,427,021,316,913,410,78,56,75,3-,0-,072,0t ,0-,0-,0-,0154,5139,0120,5107,093,475,162,152,344,738,733,729,626,120,315,812,39,67,35,54,02,7-,078,0t ,0-,0-,0-,0135,0135,0119,0106,193,174,861,751,944,338,333,329,225,619,715,211,78,96,64,83,2-,0-,084,0t ,0-,0-,0-,0-,0112,0112,0101,891,674,361,351,543,837,832,828,725,019,114,611,08,25,93,9-,0-,0-,090,0t ,0-,0-,0-,0-,098,598,597,189,572,860,651,243,637,532,528,424,618,714,210,67,85,53,5-,0-,0-,096,0t ,0-,0-,0-,0-,0-,086,586,585,371,359,250,042,736,831,927,724,218,514,010,47,55,23,2-,0-,0-,0102,0t ,0-,0-,0-,0-,0-,072,372,372,369,557,748,741,535,730,826,823,317,713,410,07,24,82,8-,0-,0-,0108,0t ,0-,0-,0-,0-,0-,0-,052,652,651,248,546,039,533,829,125,121,716,211,98,65,93,6-,0-,0-,0-,0SH /LHCC 2500-118Lifting capacities main boom with Superlift Tragfähigkeiten Hauptausleger mit SuperliftCapacités de levage flèche principale avec SuperliftRadius Main boom ·Hauptausleger ·Flèche principaleAusladung Portée m 1m 891011121416182022242628303438424650545862666870SSL36,0t ,0-,0328,0284,0242,0210,0165,0135,5114,098,285,976,168,161,556,0-,0-,0-,0-,0-,0-,0-,0-,0-,0-,0-,042,0t ,0374,0326,0284,0241,0209,0164,0134,0112,596,884,474,666,659,954,345,539,0-,0-,0-,0-,0-,0-,0-,0-,0-,048,0t ,0372,0325,0283,0240,0208,0163,0133,0111,595,683,273,365,358,652,944,037,332,4-,0-,0-,0-,0-,0-,0-,0-,054,0t ,0340,0324,0283,0240,0207,0162,5132,0111,095,082,672,764,657,952,243,236,431,327,2-,0-,0-,0-,0-,0-,0-,060,0t ,0-,0297,0282,0239,0207,0161,5131,5110,094,381,971,963,857,051,342,335,430,225,822,2-,0-,0-,0-,0-,0-,066,0t ,0-,0-,0271,0239,0206,0161,0131,0109,593,781,271,363,156,350,641,534,629,224,721,017,9-,0-,0-,0-,0-,072,0t ,0-,0-,0234,0234,0206,0161,0130,5109,093,380,870,862,655,850,140,934,028,523,820,016,914,212,1-,0-,0-,078,0t ,0-,0-,0-,0203,0203,0160,5130,0108,592,880,270,262,155,249,540,333,327,723,019,216,013,311,09,28,3-,084,0t ,0-,0-,0-,0175,0175,0160,0129,5108,092,179,669,561,354,548,839,632,526,822,018,114,912,29,9-,0-,0-,0360°t +40t 9m0tDIN/ISORadius Main boom ·Hauptausleger ·Flèche principaleAusladung Portée m 1m 891011121416182022242628303438424650545862667072SSL36,0t -,0470,0466,0448,0411,0353,0309,0273,0240,0216,0195,0177,5162,5150,0-,0-,0-,0-,0-,0-,0-,0-,0-,0-,0-,042,0t 433,0433,0433,0432,0409,0351,0307,0272,0240,0214,0194,5176,5161,5149,0128,5112,5-,0-,0-,0-,0-,0-,0-,0-,0-,048,0t 391,0391,0391,0391,0391,0350,0305,0270,0240,0214,0192,5175,0161,0148,0127,5111,599,1-,0-,0-,0-,0-,0-,0-,0-,054,0t 346,0346,0346,0346,0346,0341,0304,0269,0239,0214,0192,5175,0160,0148,0127,0111,098,588,2-,0-,0-,0-,0-,0-,0-,060,0t -,0301,0301,0301,0301,0301,0296,0268,0238,0214,0193,0175,0159,5147,0127,0110,597,987,578,7-,0-,0-,0-,0-,0-,066,0t -,0-,0273,0273,0273,0273,0271,0266,0237,0213,0193,0175,0160,0146,5125,5110,097,686,978,070,6-,0-,0-,0-,0-,072,0t -,0-,0236,0236,0236,0236,0236,0234,0231,0212,0192,0175,0160,0147,0125,5110,097,286,577,670,163,758,2-,0-,0-,078,0t -,0-,0-,0205,0205,0205,0205,0204,0203,0202,0191,5174,5160,0147,0125,5109,096,686,277,269,663,257,652,8-,0-,084,0t -,0-,0-,0178,0178,0177,5177,0176,5174,0171,0168,0164,5159,0146,5125,5108,596,185,776,669,062,556,952,047,845,8360°t +40t 0-250tDIN/ISORemarks ·Bemerkungen ·RemarquesCC 2500-1192Radius Main boom ·Hauptausleger ·Flèche principaleAusladung Portée m 1m 891011121416182022242628303438424650545862667072SSL36,0t ,0-,0470,0470,0470,0444,0381,0334,0297,0264,0237,0214,0195,0178,5165,0-,0-,0-,0-,0-,0-,0-,0-,0--,0-,042,0t ,0434,0434,0434,0432,0425,0379,0332,0295,0263,0235,0213,0194,0177,5164,0141,5123,5-,0-,0-,0-,0-,0-,0--,0-,048,0t ,0402,0402,0402,0402,0402,0378,0330,0293,0262,0234,0211,0192,0177,0163,0140,5123,0109,5-,0-,0-,0-,0-,0--,0-,054,0t ,0354,0354,0354,0354,0354,0352,0329,0292,0261,0234,0211,0192,0176,0163,0140,0122,5108,897,6-,0-,0-,0-,0--,0-,060,0t ,0-,0308,0308,0308,0308,0308,0307,0291,0260,0233,0211,0192,0175,5161,5139,5122,0108,396,987,4-,0-,0-,0--,0-,066,0t ,0-,0-,0271,0271,0271,0271,0270,0268,0259,0232,0210,0192,0175,5161,5138,5121,5107,896,386,778,7-,0-,0--,0-,072,0t ,0-,0-,0234,0234,0234,0234,0234,0233,0233,0232,0210,0191,5176,0161,5138,5121,5107,595,986,378,171,165,2--,0-,078,0t ,0-,0-,0-,0203,0203,0203,0203,0203,0202,0202,0202,0191,0175,0161,5138,5120,5106,895,485,977,670,664,559,3-,0-,084,0t ,0-,0-,0-,0176,5176,5176,5176,0176,0174,0171,5168,5166,0161,0155,5138,0120,0106,595,185,276,969,863,758,553,951,7Radius Main boom ·Hauptausleger ·Flèche principaleAusladung Portée m 1m 891011121416182022242628303438424650545862667072SSL36,0t -,0470,0470,0470,0450,0410,0359,0319,0287,0258,0233,0207,0183,0162,0-,0-,0-,0-,0-,0-,0-,0-,0-,0-,0-,042,0t 450,0450,0450,0450,0448,0408,0357,0317,0285,0256,0232,0211,0194,0179,0147,5119,0-,0-,0-,0-,0-,0-,0-,0-,0-,048,0t 414,0414,0414,0414,0413,0406,0355,0315,0283,0255,0230,0209,0193,0178,0153,5133,5111,3-,0-,0-,0-,0-,0-,0-,0-,054,0t 364,0364,0364,0364,0364,0364,0354,0314,0282,0254,0230,0209,0191,5177,5153,0134,0119,0103,4-,0-,0-,0-,0-,0-,0-,060,0t -,0310,0310,0310,0310,0310,0310,0310,0281,0253,0229,0209,0191,5176,0152,5133,5118,8106,394,3-,0-,0-,0-,0-,0-,066,0t -,0-,0277,0277,0277,0277,0277,0277,0277,0252,0228,0209,0191,5176,0151,5133,0118,0105,595,386,1-,0-,0-,0-,0-,072,0t -,0-,0246,0246,0246,0246,0246,0246,0246,0246,0228,0208,0191,0176,5151,5133,0118,0105,394,986,178,670,5-,0-,0-,078,0t -,0-,0-,0211,0211,0211,0211,0211,0211,0211,0211,0204,0190,5176,0151,0132,0117,0104,994,485,678,071,564,9-,0-,084,0t -,0-,0-,0180,0180,0180,0180,0180,0178,5176,0173,5171,0166,0161,0151,0131,5116,8104,493,884,877,170,564,859,356,5360°t +40t 0-250tDIN/ISO360°t +40t 0-250tDIN/ISORemarks ·Bemerkungen ·RemarquesCC 2500-120Lifting capacities main boom with Superlift Tragfähigkeiten Hauptausleger mit SuperliftCapacités de levage flèche principale avec SuperliftRadius Main boom ·Hauptausleger ·Flèche principaleAusladung Portée m 1m 891011121416182022242628303438424650545862667072SSL36,0t ,0-,0500,0499,0497,0495,0438,0384,0341,0299,0261,0228,0201,0177,0156,5-,0-,0-,0-,0-,0-,0-,0-,0--,0-,042,0t ,0450,0450,0450,0450,0450,0436,0382,0339,0305,0276,0248,0220,0197,0176,5142,5114,0-,0-,0-,0-,0-,0-,0--,0-,048,0t ,0413,0413,0413,0413,0413,0413,0380,0337,0303,0274,0249,0227,0208,0189,0156,0129,5106,9-,0-,0-,0-,0-,0--,0-,054,0t ,0362,0362,0362,0362,0362,0362,0362,0336,0302,0273,0248,0226,0207,0192,5164,5139,0118,399,7-,0-,0-,0-,0--,0-,060,0t ,0-,0308,0308,0308,0308,0308,0308,0308,0301,0272,0247,0226,0207,0191,0165,5144,5124,8107,492,1-,0-,0-,0--,0-,066,0t ,0-,0-,0278,0278,0278,0278,0278,0278,0278,0271,0246,0225,0207,0191,0164,5144,5127,8111,897,584,9-,0-,0--,0-,072,0t ,0-,0-,0244,0244,0244,0244,0244,0244,0244,0244,0238,0224,0206,0190,5164,5144,5128,3114,3101,289,278,368,2--,0-,078,0t ,0-,0-,0-,0212,0212,0212,0212,0212,0211,0211,0211,0205,0197,5190,0164,0143,5127,5114,3102,491,481,271,963,3-,0-,084,0t ,0-,0-,0-,0178,5178,5178,5178,5178,5177,0174,5172,5170,0165,5161,0152,0143,0127,0113,8102,392,082,573,765,758,354,6360°t +40t 0-250tDIN/ISORemarks ·Bemerkungen ·RemarquesCC 2500-1212Radius Main boom ·Hauptausleger ·Flèche principaleAusladung Portée m 1m 101112131416182022242628303438424650545862667074788286SSL/LSL78,0t ,0196,0196,0196,0183,5163,0133,0111,095,182,672,564,357,551,742,535,530,025,321,518,315,613,311,59,9-,0-,0-,0-,084,0t ,0-,0171,5171,5171,0162,5132,0110,594,581,971,863,656,851,041,834,729,124,420,517,314,612,310,48,87,4-,0-,0-,090,0t ,0-,0143,0143,0143,0142,0132,0110,594,381,671,663,356,550,741,434,428,723,920,016,814,111,79,88,16,65,3-,0-,096,0t ,0-,0-,0113,5113,5113,0112,0110,594,381,771,663,356,550,741,434,328,623,819,916,613,911,59,57,76,24,93,7-,0102,0t ,0-,0-,091,591,591,591,591,591,581,571,463,156,250,441,134,128,223,519,516,213,411,19,07,25,64,33,1-,0108,0t ,0-,0-,0-,075,075,074,073,072,068,468,462,755,850,040,733,627,722,918,915,612,910,58,46,65,03,6-,0-,0114,0t ,0-,0-,0-,063,063,063,063,063,063,057,957,955,649,840,533,427,422,618,615,312,510,18,06,24,63,2-,0-,0120,0t ,0-,0-,0-,0-,054,054,054,054,054,054,049,043,042,840,333,127,122,318,315,012,29,87,75,84,22,8-,0-,0126,0t ,0-,0-,0-,0-,044,044,044,044,044,044,044,042,038,034,632,927,322,618,715,312,510,07,96,14,43,0-,0-,0360°t +40t 9m0tDIN/ISORadius Main boom ·Hauptausleger ·Flèche principaleAusladung Portée m 1m 101112131416182022242628303438424650545862667074788286909498102106110SSL/LSL78,0t ,0198,5198,5198,5198,5198,5198,5198,5198,0198,0194,0177,0162,0148,5127,5110,598,587,778,871,364,959,454,650,4-,0-,0-,0-,0-,0-,0-,0-,0-,0-,084,0t ,0-,0177,0177,0176,5176,0175,5174,5174,0174,0174,0174,0161,5148,0127,0110,097,287,278,270,664,258,753,949,746,0-,0-,0-,0-,0-,0-,0-,0-,0-,090,0t ,0-,0149,5149,5149,0148,5148,0147,0146,5146,0146,0145,5144,5139,5127,0110,597,286,478,170,564,058,453,649,345,642,2-,0-,0-,0-,0-,0-,0-,0-,096,0t ,0-,0-,0122,0122,0122,0121,0120,5120,0120,0120,0120,0120,0118,5112,5106,597,586,678,270,564,058,453,549,245,442,139,1-,0-,0-,0-,0-,0-,0-,0102,0t ,0-,0-,0102,5102,5102,5102,5102,5102,5102,5102,0101,5101,0100,596,692,087,482,877,770,263,658,053,148,845,041,738,736,033,5-,0-,0-,0-,0-,0108,0t ,0-,0-,0-,082,082,082,081,080,080,080,079,379,379,378,476,173,971,669,367,163,157,552,648,344,541,138,135,533,030,8-,0-,0-,0-,0114,0t ,0-,0-,0-,070,070,070,070,070,070,070,070,069,069,068,066,063,061,058,056,053,050,047,144,842,640,337,735,032,630,228,1-,0-,0-,0120,0t ,0-,0-,0-,0-,061,061,061,061,061,061,061,061,060,059,059,057,056,055,054,053,050,049,747,643,840,437,434,732,229,927,725,824,0-,0126,0t ,0-,0-,0-,0-,050,050,050,050,050,050,050,050,050,050,049,049,047,046,045,044,043,041,040,038,035,533,631,830,028,126,324,522,620,8360°t +40t 0-250tDIN/ISOCC 2500-122Radius Main boom ·Hauptausleger ·Flèche principaleAusladung Portée m 1m 101112131416182022242628303438424650545862667074788286909498102106110SSL/LSL78,0t ,0197,0197,0197,0197,0197,0197,0197,0197,0197,0197,0190,0177,5163,5140,0122,0108,597,187,479,272,366,361,156,6-,0-,0-,0-,0-,0-,0-,0-,0-,0-,084,0t ,0-,0176,5176,5176,5176,5176,5176,5176,5176,5176,5176,5169,5163,0139,5121,5107,596,586,878,671,665,660,455,851,8-,0-,0-,0-,0-,0-,0-,0-,0-,090,0t ,0-,0149,5149,5149,5149,0149,0149,0148,5148,0147,5147,0145,0140,5131,5121,5107,595,886,778,471,465,360,055,451,347,7-,0-,0-,0-,0-,0-,0-,0-,096,0t ,0-,0-,0127,5127,0127,0127,0126,5126,5125,0123,5122,0120,5118,0113,0107,5102,096,086,778,371,265,159,855,151,147,544,3-,0-,0-,0-,0-,0-,0-,0102,0t ,0-,0-,0107,5107,5107,0106,5105,5105,0104,0102,0100,098,596,692,488,283,979,775,471,267,063,559,454,750,647,043,740,838,2-,0-,0-,0-,0-,0108,0t ,0-,0-,0-,087,287,287,287,287,287,286,986,485,985,583,480,176,873,470,166,863,460,257,154,150,146,443,140,237,635,2-,0-,0-,0-,0114,0t ,0-,0-,0-,073,673,673,673,673,673,673,572,671,770,868,966,063,061,058,056,053,050,046,044,042,140,338,436,634,732,931,0-,0-,0-,0120,0t ,0-,0-,0-,0-,061,061,061,061,061,061,061,061,060,059,059,057,056,055,054,053,050,049,047,144,842,640,438,135,933,731,429,227,0-,0126,0t ,0-,0-,0-,0-,050,050,050,050,050,050,050,050,050,050,049,049,047,046,045,044,043,041,040,038,035,133,632,030,428,927,325,824,222,7360°t +40t 0-250tDIN/ISOLifting capacities main boom with Superlift Tragfähigkeiten Hauptausleger mit SuperliftCapacités de levage flèche principale avec SuperliftCC 2500-1232Radius Main boom ·Hauptausleger ·Flèche principaleAusladung Portée m 1m 101112131416182022242628303438424650545862667074788286909498102106110SSL/LSL78,0t ,0203,0203,0203,0203,0203,0203,0202,0200,0198,0196,0189,0181,5174,0153,0133,5119,0106,596,087,279,773,267,659,9-,0-,0-,0-,0-,0-,0-,0-,0-,0-,084,0t ,0-,0176,0176,0176,0176,0176,0176,0175,0174,0173,5171,5165,5160,0148,5133,0117,5105,595,486,579,072,566,861,955,6-,0-,0-,0-,0-,0-,0-,0-,0-,090,0t ,0-,0149,5149,5149,0149,0149,0148,5148,0146,5145,0144,0141,5137,5130,0122,5115,0105,095,286,378,672,066,361,357,052,0-,0-,0-,0-,0-,0-,0-,0-,096,0t ,0-,0-,0126,5126,0126,0125,0124,5124,0123,0123,0122,0122,0121,0116,0111,0102,598,594,386,178,471,866,161,056,652,748,9-,0-,0-,0-,0-,0-,0-,0102,0t ,0-,0-,0107,0107,0106,5105,5105,0105,0104,0102,0100,098,096,093,089,086,082,077,069,966,163,060,056,953,950,947,844,841,2-,0-,0-,0-,0-,0108,0t ,0-,0-,0-,090,390,290,190,089,889,788,587,185,784,381,278,174,971,768,565,362,259,256,653,951,348,646,043,440,738,1-,0-,0-,0-,0114,0t ,0-,0-,0-,077,077,077,076,076,075,075,074,074,073,072,069,067,064,060,057,054,050,049,045,042,240,739,237,736,234,633,1-,0-,0-,0120,0t ,0-,0-,0-,0-,066,066,066,066,066,066,066,065,064,063,062,061,059,058,057,056,055,051,047,044,542,640,738,836,934,933,031,129,2-,0126,0t ,0-,0-,0-,0-,056,056,056,056,056,056,056,055,055,054,052,051,050,049,047,046,045,044,042,040,038,036,033,031,129,828,527,225,924,5360°t +40t 0-250tDIN/ISOCC 2500-124Lifting capacities main boom with Superlift Tragfähigkeiten Hauptausleger mit SuperliftCapacités de levage flèche principale avec SuperliftRadius Main boom ·Hauptausleger ·Flèche principaleAusladung Portée m 1m 101112131416182022242628303438424650545862667074788286909498102106110SSL/LSL78,0t ,0210,0210,0210,0210,0210,0210,0209,0206,0204,0202,0192,0178,0171,0158,0145,0129,5115,5104,593,783,674,365,757,5-,0-,0-,0-,0-,0-,0-,0-,0-,0-,084,0t ,0-,0178,0178,0178,0178,0178,0178,0175,0173,0171,0169,0163,0158,0146,0136,5127,0115,0104,093,884,375,767,960,653,5-,0-,0-,0-,0-,0-,0-,0-,0-,090,0t ,0-,0150,0150,0149,0148,0146,0145,0143,5142,0140,5139,0136,5133,5127,5121,5115,5109,5103,594,185,277,069,662,756,350,2-,0-,0-,0-,0-,0-,0-,0-,096,0t ,0-,0-,0128,0128,0128,0128,0128,0128,0127,0127,0126,0126,0124,0120,0115,0106,096,092,388,583,578,171,064,458,452,747,3-,0-,0-,0-,0-,0-,0-,0102,0t ,0-,0-,0109,0109,0109,0109,0109,0109,0108,0105,0103,0101,099,095,092,088,085,081,076,069,063,059,957,354,752,049,244,339,6-,0-,0-,0-,0-,0108,0t ,0-,0-,0-,093,093,092,091,090,090,088,087,085,084,081,078,075,072,069,067,064,061,057,053,751,549,246,944,740,936,7-,0-,0-,0-,0114,0t ,0-,0-,0-,079,079,079,079,078,078,077,077,076,073,069,066,062,058,055,053,052,049,046,043,642,341,139,938,637,436,234,5-,0-,0-,0120,0t ,0-,0-,0-,0-,069,069,069,069,069,069,068,067,066,065,064,062,061,060,057,055,052,049,048,046,044,041,039,237,535,934,232,028,7-,0126,0t ,0-,0-,0-,0-,058,058,058,058,058,058,057,057,056,055,053,051,050,048,046,045,043,041,039,038,036,034,032,531,430,329,228,127,025,9360°t +40t 0-250tDIN/ISO。
【详解】SPI中的极性CPOL和相位CPHA是什么以及如何设置
【详解】SPI中的极性CPOL和相位CPHA是什么以及如何设置版本：2011-08-15作者：crifan联系方式：green-waste (at) 【背景】最近在看关于Silicon Labs的C8051F347的某个驱动中，关于SPI部分初始化的代码，看到其对于SPI的设置为CPOL=1，CPHA=0，对于CPOL及CPHA的含义不了解，想要搞懂，这两个参数到底是什么意思，以及为何要这么设置。
所以才去找了SPI的极性和相位的相关资料，整理如下。
【SPI基础知识简介】设备与设备之间通过某种硬件接口通讯，目前存在很多种接口，SPI接口是其中的一种。
SPI中分Master主设备和Slave从设备，数据发送都是由Master控制。
一个master可以接一个或多个slave。
常见用法是一个Master接一个slave，只需要4根线：SCLK：Serial Clock，（串行）时钟MISO：Master In Slave Out，主设备输入，从设备输出MOSI：Master Out Slave In，主设备输出，从设备输入SS: Slave Select，选中从设备，片选SPI由于接口相对简单（只需要4根线），用途算是比较广泛，主要应用在 EEPROM，FLASH，实时时钟，AD转换器，还有数字信号处理器和数字信号解码器之间。
即一个SPI的Master通过SPI与一个从设备，即上述的那些Flash，ADC等，进行通讯。
而主从设备之间通过SPI进行通讯，首先要保证两者之间时钟SCLK要一致，互相要商量好了，要匹配，否则，就没法正常通讯了，即保证时序上的一致才可正常讯。
而这里的SPI中的时钟和相位，指的就是SCLk时钟的特性，即保证主从设备两者的时钟的特性一致了，以保证两者可以正常实现SPI通讯。
【SPI相关的缩写或说法】先简单说一下，关于SPI中一些常见的说法：SPI的极性Polarity和相位Phase，最常见的写法是CPOL和CPHA，不过也有一些其他写法，简单总结如下：(1) CKPOL (Clock Polarity) = CPOL = POL = Polarity = （时钟）极性(2) CKPHA (Clock Phase) = CPHA = PHA = Phase = （时钟）相位(3) SCK=SCLK=SPI的时钟(4) Edge=边沿，即时钟电平变化的时刻，即上升沿(rising edge)或者下降沿(falling edge)对于一个时钟周期内，有两个edge，分别称为：Leading edge=前一个边沿=第一个边沿，对于开始电压是1，那么就是1变成0的时候，对于开始电压是0，那么就是0变成1的时候；Trailing edge=后一个边沿=第二个边沿，对于开始电压是1，那么就是0变成1的时候（即在第一次1变成0之后，才可能有后面的0变成1），对于开始电压是0，那么就是1变成0的时候；本文采用如下用法：极性=CPOL相位=CPHASCLK=时钟第一个边沿和第二个边沿【SPI的相位和极性】CPOL和CPHA单独看这张图，的确很难明白具体含义，所以下面会有更详细的解释。
cc2500大功率无线模块规格书说明
1：产品介绍
CC2500PATR2.4S 是 集 FSK/ASK/OOK/MSK. 调 制方式于一体的收发模块。 它提供扩展硬件支持实现信息包处 理、数据缓冲、群发射、空闲信道评估、链接 质量指示和无 线电波唤醒，可以采用曼彻斯特编码进行调制解调它的数据 流。 性能优越并且易于应用到你的产品设计中，它可以应用 于 2400-2483.5MHz ISM/SRD 频段的系统，消费类电子产 品、无线游戏控制器、无线音频传输和 其他的无线系统中。
ＣＣ２５００ＰＡ１无线模块
使用说明
第 1 页
产品目录
1： 产品介绍……………………………………………………………………...4 2：产品特征…………………………………………………………………….4 3：应用范围…………………………………………………………………….4 4：性能参数…………………………………………………………………….5 5：外形尺寸…………………………………………………………………….6 6：引脚定义…………………………………………………………………….7 7：应用电路简介……………………………………………………………….7
?testsignals?测试信号?fifostatussignals?先进先出堆栈状态信号?clearchannelindicator?空闲信道指示?clockoutputdowndividedfromxosc?时钟输出从xosc分频?serialoutputrxdata?serialconfigurationinterfacechipselect串行输出接收数据8csndigitalinput串行配置接口芯片选择9paendigitalinputwhentxstatusset1rxset0tx发射状态时设置为1rx接收设置为0whenrxstatusset1txset0rx接收状态时设置为1tx发射设置10lnaendigitalinput为07
CC2500控制输出功率
Programming Output Power on CC2500 and CC2550By Charlotte Seem Keywords•PATABLE Register Settings •Output Power Levels •Current Consumption •CC2500•CC25501 IntroductionThe CC2500 and CC2550 RF output power level is set by the PATABLE register setting. This register setting also influences the power levels at the different harmonics and the current consumption for the device. These parameters must therefore be considered when choosing the optimal register settings. This document gives complete CC2500 and CC2550 PA tables with typical output power, harmonics, and current consumption for the different register settings at 25 °C and 3.0 V supply voltage.Table of Contents KEYWORDS (1)1INTRODUCTION (1)2ABBREVIATIONS (2)3OUTPUT POWER FOR THE DIFFERENT PATABLE REGISTER SETTINGS (3)3.1CC2500 (3)3.2CC2550 (7)4GENERAL INFORMATION (12)4.1D OCUMENT H ISTORY (12)2 AbbreviationsfrequencyRadioRF3 Output Power for the Different PATABLE Register SettingsThe CC2500 and CC2550 RF output power level is decided by values set in the PATABLE register and the FREND0.PA_POWER value. The 8-byte PATABLE register will, as described in the CC2500 and CC2550 datasheets, set the PA power control settings while the 3-bit FREND0.PA_POWER value selects the PATABLE entry to be used.The typical CC2500 output power levels and current consumption for the different PATABLE register settings are given in Table 1. The equivalent parameters for CC2550 are given in Table 2. It is important to notice from these tables that the output power levels for the different register values are not linear. Also note that a decrease in output power level not necessarily means a decrease in the current consumption or in the harmonics power level.3.1 CC2500Power Table for CC2500 Power @2 440 MHz[dBm]Power @2nd harm4 880 MHz[dBm]Power @3rd harm7 320 MHz[dBm]Power @4th harm9 760 MHz[dBm]Power @5th harm12 200MHz [dBm]Current[mA]Register Value: FF 1,5 -45,5 -57,0 -52,5 -57,9 21,4 Register Value: EF 1,1 -43,1 -56,2 -54,0 -58,2 19,8 Register Value: FB 1,1 -45,8 -57,3 -54,3 -57,6 21,0 Register Value: EB 0,7 -43,5 -56,7 -54,2 -57,9 19,4 Register Value: FE 0,3 -54,2 -57,0 -58,4 -58,3 21,1 Register Value: EE 0,0 -49,5 -57,1 -58,7 -58,2 19,5 Register Value: FD -0,1 -55,3 -57,5 -58,8 -57,9 21,1 Register Value: FA -0,2 -53,3 -56,5 -58,7 -58,0 20,7 Register Value: ED -0,4 -52,3 -57,0 -58,5 -58,2 19,5 Register Value: EA -0,4 -50,3 -56,6 -57,5 -57,9 19,1 Register Value: F9 -0,6 -54,5 -56,7 -58,4 -58,3 20,7 Register Value: E9 -0,8 -51,9 -57,1 -57,8 -57,9 19,1 Register Value: BF -1,3 -45,8 -56,9 -56,5 -58,8 18,1 Register Value: BB -1,8 -46,3 -57,0 -57,1 -57,8 17,7 Register Value: AF -1,9 -43,7 -56,9 -57,7 -58,1 17,0 Register Value: AB -2,3 -44,5 -57,0 -56,8 -58,4 16,6 Register Value: BE -2,7 -54,1 -57,1 -58,7 -58,3 17,8 Register Value: BD -3,1 -55,0 -57,7 -58,1 -58,4 17,7 Register Value: AE -3,1 -49,9 -56,8 -58,2 -57,7 16,7 Register Value: BA -3,1 -53,5 -56,6 -58,6 -58,9 17,4 Register Value: AD -3,5 -51,9 -56,1 -57,9 -58,0 16,6 Register Value: B9 -3,5 -54,7 -57,1 -58,4 -58,2 17,3 Register Value: AA -3,5 -50,8 -56,8 -58,8 -58,0 16,3 Register Value: DF -3,7 -38,3 -57,0 -50,7 -57,9 15,1 Register Value: DB -3,8 -38,8 -55,7 -52,4 -57,3 14,8 Register Value: A9 -3,8 -52,7 -57,1 -58,2 -58,6 16,2 Register Value: DE -4,3 -40,7 -56,8 -54,4 -57,8 14,8 Register Value: DA -4,4 -41,3 -57,1 -57,5 -58,0 14,4 Register Value: DD -4,4 -41,4 -56,6 -56,4 -58,3 14,7 Register Value: D9 -4,6 -42,1 -57,4 -56,9 -58,1 14,4 Register Value: F7 -4,7 -45,1 -57,6 -58,8 -57,7 19,9 Register Value: E7 -4,7 -44,6 -57,8 -59,1 -58,5 18,2 Register Value: F6 -5,5 -48,0 -56,5 -58,7 -57,9 19,6 Register Value: E6 -5,5 -47,4 -57,1 -58,6 -58,4 17,9 Register Value: F5 -5,7 -48,6 -56,6 -58,8 -58,5 19,5Power Table for CC2500 Power @2 440 MHz[dBm]Power @2nd harm4 880 MHz[dBm]Power @3rd harm7 320 MHz[dBm]Power @4th harm9 760 MHz[dBm]Power @5th harm12 200MHz [dBm]Current[mA]Register Value: E5 -5,7 -48,0 -56,8 -58,5 -58,1 17,8 Register Value: 7F -6,1 -47,8 -56,9 -58,2 -58,2 15,0 Register Value: 7B -6,5 -48,4 -57,5 -58,6 -57,4 14,6 Register Value: D7 -6,8 -43,7 -56,8 -57,6 -58,4 13,5 Register Value: 6F -6,8 -45,5 -57,1 -58,9 -58,0 14,5 Register Value: 9F -7,0 -40,2 -57,0 -54,7 -58,4 13,9 Register Value: 6B -7,2 -47,3 -57,1 -58,5 -58,1 14,1 Register Value: 9B -7,2 -40,5 -57,3 -55,5 -57,9 13,5 Register Value: D6 -7,4 -46,4 -56,5 -58,4 -57,4 13,1 Register Value: 7E -7,5 -55,1 -56,9 -59,1 -58,2 14,7 Register Value: B7 -7,6 -46,3 -56,9 -58,5 -58,2 16,5 Register Value: D5 -7,6 -47,0 -56,8 -59,3 -58,2 13,1 Register Value: 9E -7,7 -42,6 -57,3 -56,2 -58,3 13,5 Register Value: A7 -7,7 -46,1 -56,1 -58,5 -58,4 15,4 Register Value: 7D -7,8 -56,3 -57,5 -58,2 -57,5 14,6 Register Value: 9A -7,8 -43,1 -57,3 -58,4 -58,3 13,2 Register Value: 9D -7,9 -43,4 -56,9 -57,4 -58,0 13,5 Register Value: 7A -7,9 -55,4 -57,0 -58,8 -58,5 14,3 Register Value: 6E -8,0 -51,9 -56,6 -58,0 -58,4 14,1 Register Value: 99 -8,0 -44,0 -56,8 -58,4 -58,5 13,1 Register Value: 79 -8,3 -56,4 -56,8 -58,4 -57,6 14,3 Register Value: 6D -8,3 -54,8 -56,6 -58,3 -58,2 14,1 Register Value: B6 -8,3 -49,6 -57,4 -58,6 -58,4 16,2 Register Value: 6A -8,4 -53,5 -56,7 -58,6 -58,1 13,7 Register Value: A6 -8,4 -48,7 -56,7 -58,7 -58,2 15,0 Register Value: B5 -8,5 -50,1 -57,1 -58,9 -58,0 16,1 Register Value: 69 -8,7 -53,4 -56,8 -58,2 -57,5 13,7 Register Value: A5 -8,7 -50,3 -56,4 -58,3 -58,0 15,0 Register Value: CF -9,7 -39,8 -56,6 -57,8 -56,3 13,1 Register Value: CB -9,8 -40,1 -57,4 -58,5 -58,1 12,7 Register Value: 97 -10,1 -46,2 -57,2 -58,9 -58,1 12,2 Register Value: CE -10,2 -40,8 -57,3 -57,6 -57,9 12,8 Register Value: CA -10,3 -41,2 -56,5 -57,4 -58,4 12,4 Register Value: CD -10,3 -41,4 -56,7 -56,5 -58,1 12,7 Register Value: C9 -10,4 -41,7 -57,0 -57,0 -57,7 12,3 Register Value: 96 -10,7 -49,1 -56,8 -57,9 -58,1 11,9 Register Value: 95 -10,9 -49,4 -57,4 -58,6 -57,8 11,8 Register Value: C7 -11,3 -43,9 -57,2 -56,6 -57,8 11,5 Register Value: C6 -11,8 -46,0 -57,2 -58,7 -58,3 11,1 Register Value: 5F -11,9 -42,8 -57,3 -58,2 -57,9 12,8 Register Value: C5 -12,0 -46,9 -56,6 -57,7 -58,5 11,1 Register Value: 5B -12,1 -43,7 -57,3 -58,1 -58,1 12,4 Register Value: 77 -12,2 -49,3 -57,3 -59,2 -57,7 13,4 Register Value: 67 -12,3 -49,4 -56,4 -58,7 -58,7 12,8 Register Value: FC -12,4 -54,9 -56,8 -58,4 -58,3 20,8 Register Value: EC -12,5 -55,1 -57,4 -58,6 -58,2 19,1 Register Value: 5E -12,7 -45,7 -57,5 -58,9 -58,5 12,5 Register Value: F8 -12,8 -55,3 -56,9 -58,3 -58,2 20,4 Register Value: E8 -12,8 -54,6 -56,8 -59,0 -58,5 18,7Power Table for CC2500 Power @2 440 MHz[dBm]Power @2nd harm4 880 MHz[dBm]Power @3rd harm7 320 MHz[dBm]Power @4th harm9 760 MHz[dBm]Power @5th harm12 200MHz [dBm]Current[mA]Register Value: 5A -12,9 -46,4 -56,8 -58,0 -58,6 12,1 Register Value: 5D -12,9 -46,4 -56,9 -57,8 -57,9 12,4 Register Value: 76 -13,0 -52,2 -57,2 -58,4 -58,6 13,0 Register Value: 59 -13,1 -47,2 -57,4 -58,7 -58,4 12,1 Register Value: 66 -13,2 -51,4 -57,2 -58,3 -58,0 12,5 Register Value: 8F -13,2 -42,0 -56,2 -58,5 -58,1 12,6 Register Value: 75 -13,2 -52,8 -56,6 -58,8 -58,7 13,0 Register Value: 8B -13,3 -42,7 -57,3 -58,6 -58,4 12,2 Register Value: 65 -13,4 -53,2 -57,0 -59,2 -58,9 12,4 Register Value: E3 -13,5 -49,5 -57,2 -58,4 -58,3 17,7 Register Value: F3 -13,5 -50,8 -56,6 -58,7 -57,7 19,5 Register Value: 8E -13,8 -43,3 -57,1 -58,4 -57,8 12,2 Register Value: 8A -13,9 -43,8 -56,8 -58,6 -57,8 11,8 Register Value: 8D -14,0 -43,7 -57,5 -57,5 -58,2 12,2 Register Value: DC -14,0 -56,2 -57,3 -58,3 -58,3 14,3 Register Value: F2 -14,0 -51,6 -56,4 -58,8 -58,0 19,1 Register Value: E2 -14,0 -51,4 -56,8 -58,1 -58,0 17,4 Register Value: 89 -14,1 -44,0 -57,6 -58,5 -58,5 11,8 Register Value: F1 -14,2 -51,8 -57,0 -59,2 -57,9 19,1 Register Value: E1 -14,2 -51,5 -57,8 -58,4 -58,5 17,4 Register Value: D8 -14,3 -55,8 -56,9 -58,2 -57,6 13,9 Register Value: D3 -14,8 -49,0 -57,1 -58,1 -58,5 12,9 Register Value: 87 -15,0 -47,5 -56,7 -58,4 -58,2 10,9 Register Value: 57 -15,0 -50,1 -56,7 -58,5 -58,3 11,1 Register Value: D2 -15,4 -50,2 -56,7 -58,4 -57,6 12,6 Register Value: 86 -15,5 -49,0 -57,4 -59,1 -57,9 10,5 Register Value: D1 -15,5 -51,6 -57,5 -59,3 -57,7 12,6 Register Value: BC -15,5 -55,6 -56,9 -57,9 -58,1 17,4 Register Value: 85 -15,6 -49,3 -57,2 -58,1 -58,6 10,5 Register Value: AC -15,7 -55,4 -56,4 -58,6 -58,0 16,3 Register Value: 56 -15,7 -52,2 -57,3 -58,4 -58,3 10,8 Register Value: 55 -15,8 -52,4 -57,6 -58,1 -57,9 10,8 Register Value: B8 -15,9 -55,9 -56,7 -59,0 -58,5 17,0 Register Value: A8 -16,0 -56,1 -57,0 -59,0 -58,1 15,9 Register Value: F4 -16,0 -56,0 -56,7 -59,4 -58,1 19,2 Register Value: E4 -16,0 -57,0 -57,4 -58,2 -58,4 17,5 Register Value: B3 -16,4 -51,4 -56,8 -58,8 -58,5 16,0 Register Value: A3 -16,5 -50,8 -56,4 -58,9 -58,3 14,9 Register Value: B2 -16,9 -52,4 -56,8 -58,7 -57,8 15,7 Register Value: A2 -17,0 -52,8 -56,8 -58,5 -57,9 14,5 Register Value: B1 -17,0 -53,1 -56,9 -58,4 -58,2 15,6 Register Value: A1 -17,1 -52,8 -56,7 -58,8 -58,8 14,5 Register Value: CC -17,3 -56,9 -57,0 -58,1 -58,0 12,3 Register Value: D4 -17,4 -56,6 -56,6 -58,1 -58,4 12,7 Register Value: 9C -17,4 -56,8 -57,4 -58,7 -58,4 13,1 Register Value: C8 -17,5 -57,1 -57,5 -59,0 -58,4 11,9 Register Value: C3 -17,7 -50,3 -57,1 -58,6 -58,2 10,9 Register Value: 98 -17,7 -56,2 -57,4 -58,7 -58,1 12,7 Register Value: 4F -17,8 -46,0 -57,0 -58,3 -58,2 12,1Power Table for CC2500 Power @2 440 MHz[dBm]Power @2nd harm4 880 MHz[dBm]Power @3rd harm7 320 MHz[dBm]Power @4th harm9 760 MHz[dBm]Power @5th harm12 200MHz [dBm]Current[mA]Register Value: 4B -17,9 -46,0 -57,1 -58,3 -57,7 11,7 Register Value: 93 -18,0 -51,3 -57,5 -58,3 -58,3 11,7 Register Value: C2 -18,2 -51,6 -57,2 -59,0 -58,0 10,6 Register Value: C1 -18,3 -51,7 -57,1 -58,1 -58,3 10,6 Register Value: 92 -18,5 -52,4 -56,6 -58,4 -58,3 11,4 Register Value: 4E -18,6 -47,5 -57,3 -58,6 -58,2 11,8 Register Value: 4A -18,7 -47,9 -56,9 -58,5 -58,5 11,4 Register Value: 91 -18,7 -52,9 -56,9 -58,6 -57,7 11,3 Register Value: 4D -18,7 -47,4 -57,3 -58,7 -58,5 11,7 Register Value: 49 -18,8 -47,8 -56,8 -58,6 -58,0 11,4 Register Value: B4 -18,9 -56,7 -56,6 -59,4 -58,1 15,7 Register Value: A4 -19,0 -56,6 -56,9 -58,7 -58,6 14,6 Register Value: 47 -19,7 -51,3 -56,7 -58,9 -58,6 10,5 Register Value: 46 -20,2 -53,1 -57,2 -58,9 -58,3 10,1 Register Value: C4 -20,3 -57,1 -56,8 -59,3 -58,0 10,7 Register Value: 7C -20,3 -56,4 -57,2 -58,6 -58,1 14,3 Register Value: 45 -20,4 -53,5 -57,2 -58,5 -58,6 10,1 Register Value: 6C -20,5 -56,1 -57,3 -58,4 -58,1 13,7 Register Value: 78 -20,6 -57,3 -56,4 -58,7 -58,7 13,9 Register Value: 94 -20,6 -56,8 -57,6 -59,1 -57,6 11,5 Register Value: 68 -20,8 -56,7 -57,1 -58,8 -58,4 13,3 Register Value: 8C -20,8 -57,0 -57,0 -59,0 -57,6 11,8 Register Value: 73 -21,0 -53,5 -57,2 -58,5 -58,5 12,9 Register Value: 83 -21,0 -52,2 -56,7 -58,7 -58,2 10,4 Register Value: 88 -21,1 -56,9 -57,0 -59,0 -57,5 11,4 Register Value: 63 -21,1 -53,5 -56,8 -58,7 -58,2 12,3 Register Value: 72 -21,5 -55,1 -57,2 -58,4 -58,3 12,6 Register Value: 82 -21,6 -54,3 -57,5 -58,1 -57,7 10,1 Register Value: 62 -21,6 -54,7 -56,9 -58,4 -58,4 12,0 Register Value: 71 -21,6 -55,0 -57,4 -58,5 -58,6 12,5 Register Value: 81 -21,7 -53,3 -56,9 -59,0 -58,7 10,0 Register Value: 61 -21,8 -54,8 -56,5 -58,9 -58,4 11,9 Register Value: F0 -21,9 -57,0 -56,9 -58,8 -58,4 18,7 Register Value: E0 -21,9 -57,2 -57,3 -58,8 -57,9 17,0 Register Value: 5C -22,2 -57,0 -57,0 -58,4 -58,7 12,1 Register Value: 58 -22,5 -56,8 -57,4 -58,5 -57,7 11,7 Register Value: 53 -22,7 -54,2 -57,1 -58,8 -58,9 10,7 Register Value: D0 -23,2 -56,9 -57,2 -58,6 -58,3 12,2 Register Value: 52 -23,2 -54,7 -57,4 -58,8 -57,9 10,3 Register Value: 51 -23,4 -54,9 -57,2 -58,9 -58,4 10,3 Register Value: 74 -23,6 -57,1 -56,7 -58,1 -57,7 12,6 Register Value: 64 -23,7 -57,3 -57,1 -58,3 -58,2 12,1 Register Value: 84 -23,7 -57,3 -57,1 -58,7 -58,2 10,1 Register Value: B0 -24,8 -56,8 -56,8 -58,1 -58,1 15,3 Register Value: A0 -24,9 -57,1 -57,0 -59,0 -58,7 14,1 Register Value: 54 -25,4 -57,1 -56,9 -58,9 -58,0 10,4 Register Value: 4C -25,6 -56,5 -57,2 -58,9 -58,3 11,4 Register Value: 43 -25,6 -55,4 -56,6 -58,5 -58,2 10,0 Register Value: 48 -25,8 -56,8 -56,7 -59,0 -58,3 11,0Power Table for CC2500 Power @2 440 MHz[dBm]Power @2nd harm4 880 MHz[dBm]Power @3rd harm7 320 MHz[dBm]Power @4th harm9 760 MHz[dBm]Power @5th harm12 200MHz [dBm]Current[mA]Register Value: C0 -25,9 -57,0 -57,5 -58,7 -58,3 10,2 Register Value: 42 -26,2 -55,4 -56,6 -58,6 -58,2 9,7 Register Value: 41 -26,3 -55,3 -56,9 -58,7 -58,1 9,6 Register Value: 90 -26,4 -57,1 -56,7 -58,4 -58,3 11,0 Register Value: 44 -28,4 -57,0 -56,7 -58,6 -57,9 9,7 Register Value: 80 -29,3 -57,5 -56,7 -58,9 -58,2 9,7 Register Value: 70 -29,4 -57,0 -57,0 -58,4 -58,1 12,2 Register Value: 60 -29,5 -57,0 -57,3 -59,2 -58,4 11,6 Register Value: 50 -31,1 -56,9 -57,5 -58,5 -58,4 9,9 Register Value: 40 -33,9 -56,8 -57,7 -58,4 -58,2 9,2 Register Value: 0 -65,4 -57,0 -57,3 -59,5 -58,4 8,4Table 1. Typical Power Table for CC2500 at 2440 MHz3.2 CC2550Power Table for CC2550 Power @2 440 MHz[dBm]Power @2nd harm4 880 MHz[dBm]Power @3rd harm7 320 MHz[dBm]Power @4th harm9 760 MHz[dBm]Power @5th harm12 200MHz[dBm]Current[mA]Register Value: FF 1,4 -44,0 -55,4 -45,8 -49,4 21,3 Register Value: EF 1,0 -40,3 -55,0 -47,0 -49,5 19,6 Register Value: FB 0,8 -44,7 -56,8 -46,5 -49,7 21,0 Register Value: EB 0,5 -41,3 -56,3 -47,3 -49,5 19,4 Register Value: FE 0,2 -51,1 -58,3 -51,1 -49,6 21,0 Register Value: EE -0,1 -46,2 -57,8 -51,1 -49,4 19,3 Register Value: FD -0,2 -52,9 -58,2 -50,8 -49,7 20,9 Register Value: FA -0,4 -51,5 -58,8 -50,5 -49,8 20,7 Register Value: ED -0,4 -48,0 -58,1 -51,3 -49,7 19,3 Register Value: EA -0,6 -46,8 -58,5 -50,3 -49,5 18,9 Register Value: F9 -0,7 -53,3 -58,6 -50,8 -49,6 20,7 Register Value: E9 -0,9 -48,6 -58,9 -51,0 -49,5 18,9 Register Value: BF -1,5 -42,9 -57,5 -49,6 -49,9 17,9 Register Value: AF -2,1 -39,7 -57,6 -51,1 -49,9 16,8 Register Value: BB -2,1 -43,7 -58,4 -50,5 -49,1 17,5 Register Value: AB -2,6 -41,1 -57,7 -50,8 -49,8 16,5 Register Value: BE -2,8 -50,2 -58,8 -51,4 -49,4 17,7 Register Value: BD -3,2 -52,0 -59,1 -51,2 -49,8 17,6 Register Value: AE -3,2 -46,3 -58,3 -51,1 -49,6 16,5 Register Value: BA -3,3 -50,9 -58,7 -51,1 -49,5 17,2 Register Value: AD -3,6 -47,7 -58,7 -51,1 -49,5 16,5 Register Value: B9 -3,7 -52,8 -58,7 -52,1 -49,5 17,2 Register Value: AA -3,7 -46,9 -58,6 -51,3 -49,9 16,1 Register Value: DF -4,0 -34,5 -58,7 -45,2 -47,9 14,9 Register Value: A9 -4,0 -49,0 -58,2 -51,7 -49,4 16,1 Register Value: DB -4,1 -35,0 -57,6 -47,2 -48,6 14,5 Register Value: DE -4,5 -36,3 -58,3 -47,7 -49,5 14,5 Register Value: DD -4,7 -37,0 -58,0 -49,1 -48,9 14,5 Register Value: DA -4,7 -37,1 -58,7 -49,9 -49,6 14,2Power Table for CC2550 Power @2 440 MHz[dBm]Power @2nd harm4 880 MHz[dBm]Power @3rd harm7 320 MHz[dBm]Power @4th harm9 760 MHz[dBm]Power @5th harm12 200MHz[dBm]Current[mA]Register Value: D9 -4,8 -37,7 -58,3 -50,1 -49,6 14,1 Register Value: F7 -5,4 -44,4 -58,5 -51,9 -49,6 19,9 Register Value: E7 -5,4 -43,4 -58,6 -51,8 -49,6 18,1 Register Value: F6 -6,1 -47,0 -58,6 -52,1 -49,6 19,5 Register Value: E6 -6,2 -46,1 -58,2 -52,1 -49,7 17,8 Register Value: F5 -6,3 -47,9 -58,6 -51,5 -49,8 19,5 Register Value: E5 -6,4 -47,0 -58,9 -51,6 -49,8 17,7 Register Value: 7F -6,6 -41,8 -58,6 -51,2 -49,5 14,6 Register Value: 7B -7,2 -43,4 -58,9 -51,4 -49,5 14,2 Register Value: 9F -7,4 -35,5 -58,4 -49,6 -49,3 13,6 Register Value: 6F -7,4 -39,9 -58,4 -51,2 -49,5 14,0 Register Value: D7 -7,4 -41,5 -58,4 -51,1 -49,7 13,2 Register Value: 9B -7,5 -36,1 -58,6 -49,9 -49,3 13,2 Register Value: 7E -7,9 -49,2 -58,8 -52,0 -49,9 14,3 Register Value: 6B -7,9 -41,4 -58,7 -52,1 -49,8 13,6 Register Value: 9E -8,0 -37,8 -58,6 -50,4 -49,2 13,3 Register Value: D6 -8,1 -44,0 -58,7 -51,7 -49,8 12,9 Register Value: 9A -8,1 -38,6 -58,1 -50,6 -49,4 12,9 Register Value: 9D -8,1 -38,5 -58,6 -50,8 -49,7 13,2 Register Value: 7D -8,2 -50,4 -59,0 -51,4 -49,7 14,2 Register Value: D5 -8,2 -44,8 -58,7 -51,8 -49,4 12,8 Register Value: 99 -8,3 -39,3 -58,7 -51,5 -49,2 12,8 Register Value: B7 -8,3 -45,2 -58,7 -51,8 -49,8 16,4 Register Value: 7A -8,4 -50,4 -58,4 -51,7 -49,4 13,9 Register Value: A7 -8,5 -44,6 -58,4 -51,4 -49,9 15,2 Register Value: 6E -8,5 -45,6 -58,3 -51,4 -49,7 13,7 Register Value: 79 -8,7 -52,2 -58,9 -51,7 -49,7 14,0 Register Value: 6D -8,8 -47,0 -58,4 -51,6 -49,4 13,6 Register Value: 6A -8,9 -47,3 -58,7 -51,7 -49,6 13,3 Register Value: B6 -9,0 -48,0 -58,7 -52,0 -49,7 16,0 Register Value: 69 -9,2 -48,9 -58,7 -52,1 -49,2 13,3 Register Value: A6 -9,2 -47,5 -58,6 -52,2 -49,3 14,9 Register Value: B5 -9,2 -49,1 -58,9 -51,8 -49,6 16,0 Register Value: A5 -9,4 -48,1 -58,3 -51,9 -49,9 14,9 Register Value: CF -10,2 -35,6 -57,7 -50,3 -47,7 12,8 Register Value: CB -10,2 -35,6 -58,1 -51,7 -48,4 12,4 Register Value: CE -10,6 -36,3 -58,4 -49,3 -49,1 12,5 Register Value: CA -10,6 -36,6 -58,8 -50,2 -49,5 12,0 Register Value: CD -10,7 -36,7 -58,6 -49,3 -49,3 12,4 Register Value: 97 -10,7 -43,4 -58,8 -51,7 -50,1 12,0 Register Value: C9 -10,8 -37,0 -58,6 -50,1 -49,7 12,1 Register Value: 96 -11,3 -46,2 -58,6 -51,4 -49,7 11,6 Register Value: 95 -11,5 -47,4 -58,3 -51,9 -49,5 11,7 Register Value: C7 -11,8 -40,8 -58,2 -50,8 -49,6 11,2 Register Value: C6 -12,3 -42,7 -58,8 -51,5 -49,8 10,8 Register Value: C5 -12,5 -43,3 -58,3 -51,0 -49,5 10,8 Register Value: FC -12,5 -54,9 -59,0 -51,6 -49,8 20,8 Register Value: EC -12,5 -54,7 -58,5 -51,9 -49,8 19,0Power Table for CC2550 Power @2 440 MHz[dBm]Power @2nd harm4 880 MHz[dBm]Power @3rd harm7 320 MHz[dBm]Power @4th harm9 760 MHz[dBm]Power @5th harm12 200MHz[dBm]Current[mA]Register Value: F8 -12,9 -55,3 -59,2 -51,8 -49,3 20,4 Register Value: 5F -12,9 -37,9 -58,2 -51,4 -49,5 12,4 Register Value: E8 -12,9 -54,6 -59,2 -52,1 -49,8 18,6 Register Value: 5B -13,1 -38,8 -58,3 -51,0 -49,8 12,1 Register Value: 77 -13,1 -47,1 -58,5 -52,3 -49,4 13,0 Register Value: 67 -13,4 -46,9 -58,8 -51,7 -49,6 12,4 Register Value: 8F -13,6 -37,3 -57,7 -51,9 -49,4 12,2 Register Value: 5E -13,6 -40,4 -58,7 -51,3 -49,4 12,1 Register Value: 8B -13,6 -37,7 -58,0 -51,5 -49,0 11,8 Register Value: 5A -13,8 -41,1 -58,9 -51,7 -49,6 11,8 Register Value: 5D -13,8 -40,9 -58,8 -51,7 -49,4 12,0 Register Value: 76 -13,8 -50,6 -59,1 -51,8 -49,6 12,7 Register Value: 59 -13,9 -41,7 -58,7 -51,6 -49,5 11,6 Register Value: 75 -14,0 -51,8 -59,1 -51,6 -49,7 12,6 Register Value: 66 -14,0 -50,4 -58,4 -51,9 -49,8 12,1 Register Value: DC -14,1 -54,7 -57,6 -51,9 -48,9 14,0 Register Value: 8E -14,1 -38,6 -58,4 -51,5 -49,4 12,0 Register Value: 8A -14,2 -39,0 -58,5 -51,3 -49,7 11,5 Register Value: 65 -14,2 -51,4 -58,4 -52,1 -49,5 12,0 Register Value: 8D -14,2 -38,9 -58,9 -51,1 -49,7 11,9 Register Value: 89 -14,3 -39,3 -58,5 -51,9 -49,6 11,4 Register Value: D8 -14,4 -54,8 -58,4 -51,8 -49,9 13,6 Register Value: F3 -14,5 -51,4 -58,4 -51,3 -49,8 19,5 Register Value: E3 -14,5 -50,9 -58,5 -52,0 -49,2 17,6 Register Value: F2 -15,1 -53,4 -58,7 -51,6 -49,2 19,0 Register Value: E2 -15,1 -52,3 -58,9 -51,7 -49,7 17,3 Register Value: F1 -15,2 -53,4 -59,0 -51,6 -49,4 19,1 Register Value: E1 -15,2 -53,4 -58,3 -51,8 -49,7 17,3 Register Value: 87 -15,4 -43,3 -58,5 -51,5 -49,5 10,6 Register Value: BC -15,5 -55,2 -58,4 -51,8 -48,8 17,2 Register Value: AC -15,7 -55,0 -58,8 -51,8 -49,7 16,2 Register Value: D3 -15,8 -49,7 -58,7 -52,0 -49,8 12,7 Register Value: B8 -15,9 -55,5 -58,5 -51,6 -49,9 16,8 Register Value: 86 -15,9 -45,4 -58,2 -51,6 -49,6 10,3 Register Value: A8 -16,0 -55,2 -58,2 -51,9 -49,5 15,7 Register Value: 85 -16,0 -45,8 -58,7 -51,3 -49,5 10,2 Register Value: 57 -16,0 -47,1 -59,0 -51,7 -49,5 10,8 Register Value: F4 -16,2 -57,5 -58,7 -51,0 -49,8 19,1 Register Value: E4 -16,2 -57,3 -58,7 -51,6 -49,6 17,4 Register Value: D2 -16,4 -51,8 -58,7 -51,4 -49,1 12,4 Register Value: D1 -16,5 -52,1 -58,9 -51,7 -49,9 12,4 Register Value: 56 -16,6 -50,1 -58,5 -52,1 -49,6 10,4 Register Value: 55 -16,7 -51,1 -58,9 -51,8 -49,5 10,4 Register Value: CC -17,3 -54,1 -58,5 -51,4 -49,6 12,0 Register Value: B3 -17,3 -52,9 -58,2 -52,0 -49,3 16,0 Register Value: 9C -17,4 -54,6 -58,2 -51,7 -49,5 12,8 Register Value: A3 -17,4 -52,2 -58,8 -51,9 -49,3 14,8 Register Value: C8 -17,5 -54,6 -59,0 -52,2 -49,8 11,6Power Table for CC2550 Power @2 440 MHz[dBm]Power @2nd harm4 880 MHz[dBm]Power @3rd harm7 320 MHz[dBm]Power @4th harm9 760 MHz[dBm]Power @5th harm12 200MHz[dBm]Current[mA]Register Value: D4 -17,5 -57,0 -58,7 -51,4 -49,8 12,4 Register Value: 98 -17,7 -54,9 -59,2 -51,7 -49,5 12,4 Register Value: B2 -17,9 -54,6 -58,7 -51,9 -49,5 15,6 Register Value: A2 -18,0 -54,3 -58,3 -51,8 -49,6 14,4 Register Value: B1 -18,0 -55,2 -58,4 -52,0 -49,7 15,6 Register Value: A1 -18,1 -54,4 -58,7 -51,9 -49,7 14,4 Register Value: C3 -18,4 -49,9 -58,8 -51,4 -49,4 10,7 Register Value: 4F -18,6 -40,6 -58,7 -51,0 -49,6 11,7 Register Value: 4B -18,8 -41,2 -58,2 -51,9 -49,4 11,3 Register Value: 93 -18,9 -51,9 -58,3 -52,1 -49,6 11,5 Register Value: B4 -19,0 -57,5 -58,8 -51,9 -49,7 15,7 Register Value: C2 -19,1 -52,3 -58,6 -51,8 -49,8 10,3 Register Value: A4 -19,2 -56,8 -58,5 -51,9 -49,4 14,5 Register Value: C1 -19,2 -52,9 -58,5 -52,1 -49,9 10,3 Register Value: 4E -19,4 -42,0 -58,3 -51,8 -49,5 11,4 Register Value: 4A -19,5 -42,6 -58,7 -51,2 -49,4 11,0 Register Value: 92 -19,5 -54,3 -58,8 -51,5 -50,0 11,2 Register Value: 4D -19,6 -42,3 -58,7 -51,7 -49,4 11,3 Register Value: 49 -19,7 -43,0 -58,9 -51,5 -49,7 10,9 Register Value: 91 -19,7 -54,4 -58,6 -51,7 -49,8 11,1 Register Value: 7C -20,4 -54,7 -58,6 -51,7 -49,8 13,9 Register Value: C4 -20,5 -57,5 -58,8 -51,6 -49,6 10,4 Register Value: 6C -20,5 -54,2 -58,9 -51,8 -49,7 13,3 Register Value: 78 -20,7 -55,1 -58,5 -51,5 -49,7 13,5 Register Value: 47 -20,7 -47,9 -58,8 -51,8 -49,6 10,1 Register Value: 94 -20,8 -56,7 -58,2 -52,1 -49,8 11,2 Register Value: 8C -20,9 -53,5 -58,6 -51,7 -49,4 11,4 Register Value: 68 -20,9 -54,8 -58,5 -51,7 -48,9 12,9 Register Value: 88 -21,1 -54,6 -58,5 -51,7 -49,8 11,1 Register Value: 46 -21,2 -49,5 -58,9 -51,9 -49,5 9,7 Register Value: 45 -21,3 -50,2 -59,1 -51,7 -50,2 9,7 Register Value: 83 -22,0 -53,3 -58,4 -51,7 -49,6 10,1 Register Value: 73 -22,1 -55,4 -58,5 -51,8 -49,4 12,6 Register Value: 63 -22,3 -54,9 -58,6 -51,9 -49,7 12,0 Register Value: 82 -22,5 -55,9 -58,5 -51,8 -49,7 9,8 Register Value: 5C -22,6 -54,3 -58,9 -51,8 -49,5 11,7 Register Value: 72 -22,6 -57,2 -59,0 -52,2 -49,3 12,2 Register Value: E0 -22,6 -59,6 -59,0 -51,7 -49,8 16,9 Register Value: F0 -22,6 -59,6 -58,6 -51,3 -49,7 18,6 Register Value: 81 -22,7 -56,0 -58,8 -51,5 -49,8 9,7 Register Value: 71 -22,8 -57,8 -58,1 -51,6 -49,5 12,2 Register Value: 62 -22,8 -57,8 -58,7 -51,5 -49,4 11,6 Register Value: 58 -22,9 -53,9 -58,8 -51,5 -49,3 11,2 Register Value: 61 -22,9 -57,6 -58,6 -51,9 -49,8 11,6 Register Value: 74 -23,8 -55,9 -58,7 -51,6 -49,8 12,3 Register Value: 84 -23,9 -56,6 -58,3 -51,8 -49,5 9,8 Register Value: D0 -24,0 -57,9 -58,9 -51,6 -49,4 12,0 Register Value: 64 -24,0 -55,5 -59,0 -52,0 -49,3 11,7Power Table for CC2550 Power @2 440 MHz[dBm]Power @2nd harm4 880 MHz[dBm]Power @3rd harm7 320 MHz[dBm]Power @4th harm9 760 MHz[dBm]Power @5th harm12 200MHz[dBm]Current[mA]Register Value: 53 -24,0 -56,2 -58,8 -51,5 -49,4 10,3 Register Value: 52 -24,6 -58,3 -58,4 -51,7 -49,7 10,0 Register Value: 51 -24,7 -59,0 -58,8 -51,7 -49,3 9,9 Register Value: B0 -25,5 -58,7 -58,9 -51,7 -49,4 15,2 Register Value: A0 -25,6 -58,1 -58,6 -51,8 -49,4 14,0 Register Value: 54 -25,9 -55,7 -58,8 -51,3 -49,6 10,0 Register Value: 4C -26,2 -53,6 -58,8 -51,8 -49,4 11,0 Register Value: 48 -26,4 -53,6 -58,7 -51,5 -49,6 10,6 Register Value: C0 -26,7 -57,5 -58,4 -51,9 -49,9 9,9 Register Value: 43 -27,1 -57,8 -58,6 -51,9 -50,0 9,7 Register Value: 90 -27,2 -57,5 -58,6 -51,9 -49,3 10,7 Register Value: 42 -27,7 -60,1 -58,7 -51,4 -49,6 9,3 Register Value: 41 -27,8 -60,0 -58,5 -51,8 -49,7 9,3 Register Value: 44 -29,1 -55,7 -58,2 -52,1 -49,5 9,3 Register Value: 80 -30,1 -56,7 -58,5 -51,6 -49,4 9,4 Register Value: 70 -30,2 -56,9 -58,4 -51,9 -49,7 11,8 Register Value: 60 -30,4 -56,8 -58,1 -52,0 -49,9 11,2 Register Value: 50 -32,2 -56,7 -58,9 -52,0 -49,5 9,6 Register Value: 40 -35,2 -55,7 -58,7 -51,9 -49,8 8,9 Register Value: 0 -61,7 -55,5 -58,8 -51,3 -50,0 8,1Table 2. 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RF2500开发文档
RF2500无线收发模块开发文档（V2.0）一、模块介绍RF2500B/RF2500SE无线模块，工作于2.4GHz的ISM/SRD频段免许可证使用，采用TI公司的CC2500多通道RF收发器。
CC2500是用于超低功耗无线应用的业界系统成本最低的多通道无线产品，具有强大的数字处理特性，因此仅使用一颗低成本MCU便可构建出高性能的射频系统，可广泛应用于消费类电子产品（如无线键盘、鼠标、游戏控制器）、无线音频传输（如无线话筒、无线耳机、无线音箱）等RF2500SE(配胶棒天线)RF2500BK(采用PCB天线/板载天线)性能及特点：(1) 工作电压：1.8V~3.6V, 推荐靠近3.6V，但是不超过3.6V(2) 2400-2483.5 MHz的ISM和SRD频段，免许可证使用(3) 最高工作速率 500kbps，支持 2-FSK、GFSK 和 MSK 调制方式(4) 高接收灵敏度（1.2kbps 下-110dBm，10kbps下-101dBm，250kbps下-90dBm，1％数据包误码率）(5) 内置硬件 CRC 检错和点对多点通信地址控制(6) 耗电量极低：TX：在 0dBm 为 21.2mA RX：在 250kbps 为 13.3mA；(7) 可编程控制的输出功率，最大输出功率为0dBm，最小功率为-10dBm，数据速率可在1.2kbps至500kbps之间变化。
(8) 支持低功率电磁波激活功能, 外部中断唤醒、外部中断或RTC唤醒系统(9) 支持传输前自动清理信道访问（CCA），即载波侦听系统(10) 快速频率变动合成器带来的合适的频率跳跃系统(11) 模块可软件设地址，软件编程非常方便(12) 标准 DIP 间距接口，便于嵌入式应用(13) 单独的64字节RX和TX数据FIFO(14) 很少的外部组件，工作可靠性高(15) 模块可视直线通信距离，RF2500BK采用PCB天线20米-50左右，RF2500SE 采用外置天线可到50-100米(16) 模块尺寸，RF2500BK采用PCB天线尺寸：28mm*22mm；RF2500SE尺寸：30mm*22mm(不含SMA及天线)二、接口电路说明：(1) VCC脚接电压范围为 1.9V-3.6V之间，不能在这个区间之外，超过3.6V 将会烧毁模块。
CC2500_V1_3P
2010-01-28 - 2-
宝莉科技
CC2500V1.3
Mechanical Specification
12 Mechanical Specification MAX Typ MIN Width 12 Length 18 Height 2.2 Pad Clearance 0.5 Pad width 0.7 Unit mm mm mm mm mm 18.5
ｈｔｔｐ：／／ｅｂａｏｌｉ．ｔａｏｂａｏ．ｃｏｍ ｑｑ：３９８８４９５８５ ｔｅｌ：１５１５８０５６０３８
VER 1.3
2010-01-28 - 1-
宝莉科技
CC2500V1.3
Module View
Balun circuit
PCB Antenna
26MHz Crystal CC2500 Chip Connector Pad
tsp,pd tsp tch tcl trise tfall tsd thd tns
CSn low to positive edge on SCLK, in power-down mode CSn low to positive edge on SCLK, in active mode Clock high Clock low Clock rise time Clock fall time Setup data (negative SCLK edge) to positive edge on SCLK (tsd applies between address and data bytes, and between data bytes) Hold data after positive edge on SCLK Negative edge on SCLK to CSn high
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单片低成本低能耗RF 收发芯片应用z 2400-2483.5MHz ISM/SRD 波段系统 z 无线游戏控制器 z 无线音频 z 电子消费领域 z 无线键盘鼠标产品介绍CC2500是一种低成本真正单片的2.4GHz 收发器，为低功耗无线应用而设计。
电路设定为2400-2483.5MHz 的ISM （工业，科学和医学）和SRD （短距离设备）频率波段。
RF 收发器集成了一个数据传输率可达500kbps 的高度可配置的调制解调器。
通过开启集成在调制解调器上的前向误差校正选项，能使性能得到提升。
CC2500为数据包处理、数据缓冲、突发数据传输、清晰信道评估、连接质量指示和电磁波激发提供广泛的硬件支持。
CC2500的主要操作参数和64位传输/接收FIFO （先进先出堆栈）可通过SPI 接口控制。
在一个典型系统里，CC2550和一个微控制器及若干被动元件一起使用。
CC2500基于0.18微米CMOS 晶体的Chipcon 的SmartRF 04系列。
主要特性z 体积小（QLP 4×4mm 封装，20脚） z 真正的单片2.4GHz RF （射频）收发器 z 频率范围：2400-2483.5MHzz 高灵敏度（10kbps 下-98dBm ，1％数据包误差率）z 可编程控制的数据传输率，可达500kbpsz 较低的电流消耗（RX 中15.6mA ） z 可编程控制的输出功率，可达+1dBm z 优秀的接收器选择性和模块化性能 z 极少的外部元件：芯片内频率合成器，不需要外部滤波器或RF 转换 z 可编程控制的基带调制解调器 z 理想的多路操作特性 z 可控的数据包处理硬件z 快速频率变动合成器带来的合适的频率跳跃系统z 可选的带交错的前向误差校正z 单独的64字节RX 和TX 数据FIFO z 高效的SPI 接口：所有的寄存器能用一个“突发”转换器控制 z 数字RSSI 输出z与遵照EN 300 328 ， EN 300 440 class 2 (欧洲)，CFR47 Part 15 (美国), 和ARIB STD-T66(日本)标准的系统相配 z 自动低功率RX 拉电路的电磁波激活功能z 许多强大的数字特征，使得使用廉价的微控制器就能得到高性能的RF 系统 z 集成模拟温度传感器z自由引导的“绿色”数据包z对数据包导向系统的灵活支持：对同步词汇插入的芯片侦测，地址检查，灵活的数据包长度及自动CRC处理z可编程信道滤波带宽z OOK和灵活的ASK整型支持z2-FSK和MSK支持z自动频率补偿可用来调整频率合成器到接收中间频率z对数据的可选自动白化处理z对现存通信协议的向后兼容的异步透明接收/传输模式的支持z可编程的载波感应指示器z可编程前导质量指示器及在随机噪声下改进的针对同步词汇侦测的保护z支持传输前自动清理信道访问（CCA），即载波侦听系统z支持每个数据包连接质量指示1 缩写词资料中用到的缩写词如下：2-FSK 2进制频率转换按键PD 功率降低ADC 模数转换器PLL 相同步环路AFC 自动频率补偿PQI 前导质量指示器AGC 自动增益调节 QPSK积分相位转换按键AMR 自动仪表读取 RF电磁波频率ASK 振幅转换按键 RSSI接收信号长度指示器CRC 循环冗余检查 RX接收，接收模式ESR 等价串联阻抗 SNR信噪比FEC 前向误差校正 SPI连续外围接口FSK 频移键控 TBD待定义IF 中间频率 TX传输，传输模式LNA 低噪声放大器 VCO电压控制振荡器LQI 链接质量指示器 WOR电磁波激活，低功率拉电路MCU 微控制器单元 XOSC石英晶体振荡器MSK 最小化转换按键 XTAL石英晶体PA 功率放大器目录1 缩写词 (2)2 绝对最大等级 (5)3 工作条件 (5)4 电气规范 (6)5 常规特性 (7)6 RF接收环节 (7)7 RF传输环节 (8)8 石英晶体振荡器 (8)9 低功率RC振荡器 (9)10 频率合成器特性 (9)11 模拟温度传感器 (10)12 直流特性 (10)13 重启功率 (10)14 引脚结构 (11)15 电路描述 (12)16 应用电路 (12)17 结构配置概述 (14)18 配置软件 (15)19 四线串行配置和数据接口 (16)19.1 芯片状态位 (16)19.2 寄存器访问 (17)19.3 命令滤波 (17)19.4 FIFO访问 (17)19.5 PATABLE访问 (17)20 微控制器接口和引脚结构 (19)20.1 结构接口 (19)20.2 常规控制和状态引脚 (19)20.3 可选通信控制特性 (20)21 数据率设计 (20)22 接收信道滤波带宽 (20)23 解调器，符号同步装置和数据决定 (21)23.1 频率便宜补偿 (21)23.2 位同步 (21)23.3 字节同步 (21)24 数据包处理和硬件支持 (22)24.1 数据白化 (22)24.2 数据包格式化 (22)24.2.1 任意长度区域配置 (23)24.3 接收模式下的数据包滤波 (23)24.4 传输模式下的数据包处理 (24)24.5接收模式下的数据包处理 (24)25 调制格式化 (24)25.1 频率转换按键 (24)25.2 相位转换按键 (25)25.3 振幅调制 (25)26 已接收信号质量和连接质量信息 (25)26.1 前导质量门限（PQT） (25)26.2 RSSI (25)26.3 载波感应（CS） (25)26.4 清理信道访问（CCA） (26)26.5 连接质量指示(LQI) (26)27 交错前向误差校正 (26)27.1 前向误差校正（FEC） (26)27.2 交错 (26)28 通信控制 (28)28.1 开启顺序功率 (28)28.2 晶体控制 (29)28.3 电压调节控制 (29)28.4 主动模式 (29)28.5 电磁波激活(WOR) (30)28.5.1 RC振荡器和定时 (30)28.6 定时 (31)28.7 RX终止定时器 (31)29 数据FIFO (31)30 频率控制 (32)31 VCO (33)31.1 VCO和PLL自校准 (33)32 电压调节 (33)33 输出功率调节 (34)34 晶体振荡器 (34)35 天线接口 (35)36 常规用途/测试输出控制引脚 (35)37 异步和同步连续操作 (38)37.1 异步操作 (38)37.2 同步连续操作 (38)38 配置寄存器 (38)38.1配置寄存器详情－休眠状态下带保存值的寄存器 (43)38.2配置寄存器详情－休眠状态下失去控制的寄存器 (54)38.3状态寄存器详情 (55)39 数据包描述（QLP20） (57)39.1 推荐数据包PCB设计（QLP20） (58)39.2 数据包发热工具 (58)39.3 焊接信息 (58)39.4 盘规格 (58)39.5 载波带和轴规范 (58)40 分类信息 (59)41 总体信息 (59)41.1 文件历史 (59)41.2 产品状况定义 (59)41.3 不予承诺的内容 (59)41.4 商标 (60)41.5生命支持政策 (60)42 地址信息 (61)2 绝对最大等级任何条件下都不可违反表1给出的绝对最大等级。
超过一个或多个限制值会对设备造成永久的损坏。
表1 绝对最大等级3 工作条件CC2500的工作条件如表2所示。
表2 工作条件4 电气规范若其他值未给定，则Tc = 25°C, VDD = 3.0V。
由Chipcon’s CC2500 EM参考设计所测得。
表3 电气规范5 常规特性表4 常规特性6 RF接收环节若其他值未给定，则Tc = 25°C, VDD = 3.0V。
由Chipcon’s CC2500 EM参考设计所测得。
择性440 class 2接收器要求相适应。
20MHz 偏移时的选择性-80dBm 时的理想信道。
与ETSI EN 300440 class 2接收器要求相适应。
50MHz 偏移时的选择性-80dBm 时的理想信道。
与ETSI EN 300440 class 2接收器要求相适应。
寄生辐射25MHz – 1GHz 高于 1GHz表5 RF 接收环节7 RF 传输环节若其他值未给定，则Tc = 25°C, VDD = 3.0V 。
由Chipcon’s CC2500 EM 参考设计所测得。
参数 最小值典型值最大值单位条件/注意微分负载阻抗200 欧优化的对50欧单端负载及带更高阻抗的PCB 天线的匹配输出功率，最高设置1 dBm 输出功率可控通过Chipcon 参考RF 匹配网络发送到50欧单端负载输出功率，最低设置-30 dBm 输出功率可控通过Chipcon 参考RF 匹配网络发送到50欧单端负载临近信道功率-26 dBc 1MHz 信道空间（对载波正负1MHz ）和500kbps MSK 时的值交替信道功率-45 dBc 1MHz 信道空间（对载波正负2MHz ）和500kbps MSK 时的值寄生辐射-36-54 -47 -41 -30dBm dBm dBm dBm dBm25MHz-1GHz47-74,87.5-118,174-230,470-862MHz 1800 MHz -1900MHz （欧洲的限制波段）在2-RF 和3-RF （美国的限制波段） 否则在1GHz 之上表6 RF 传输参数8 石英晶体振荡器若其他值未给定，则Tc = 25°C, VDD = 3.0V 。
表7 石英晶体振荡器参数9 低功率RC 振荡器典型性能为若其他值未给定，则Tc = 25°C, VDD = 3.0V 时。
表中的值为仿真值，在之后的资料版本中会更新。
参数 最小值典型值最大值单位条件/注意校准频率 34.6 34.7 37.3 kHz 校准RC 振荡器频率为XTAL 频率除以750校准之后的频率精度±0.2%温度系数+0.4% / °C在校准之后当供给电压改变时的频率漂移供给电压系数 +3 % / V 在校准之后当供给电压改变时的频率漂移 初始校准时间2 ms 当RC 振荡器开启时，尽管晶体振荡器在工作，校准还是在后台持续的进行。
唤起周期 63e-6 64800 秒 可控，决定于XTAL 频率表8 RC 振荡器参数10 频率合成器特性若其他值未给定，则Tc = 25°C, VDD = 3.0V 。
由Chipcon’s CC2500 EM 参考设计所测得。
参数最小值 典型值最大值 单位 条件/注意设定的频率决议 397 FXOSC/216427 Hz 26MHz-28MHz 晶体合成器频率容差±40ppm 由使用的晶体给定。