sd卡引脚定义
SD,DDR,DDR2引脚定义
SD内存插槽及测试点一、实物图上图中，黑色插槽就是SD内存插槽二、测试点SD内存插槽测试点：1个供电、4个时钟、6个信号测试点VCC：供电测试点，正常电压3.3V，由场管或橙色线提供CLK0、CLK1、CLK2、CLK3:时钟测试点，频率66/100/133MHZ，电压1.1V-1.6V，由北桥或时钟芯片提供6个信号测试点：CAS#：列选信号RAS#：行选信号/WE#：允许信号（高电平允许读，低电平允许写）/CS#：片选信号SCL：串行时钟，SDA：串行数据，由南桥提供3.3V电压DDR内存插槽及测试点一、实物图上图就是DDR内存插槽实物图二、测试点DDR内存插槽测试点：2个供电、6个时钟、6个信号测试点VCC=2.5V,1.25V：供电测试点CLK0、CLK1、CLK2、CLK3、CLK4、CLK5:时钟测试点，频率266/333/400MHZ，电压1.1V-1. 6V，如果主板有两块时钟芯片，内存时钟由靠近内存的时钟芯片提供；如果只有一个时钟芯片，内存的时钟由北桥提供6个信号测试点：CAS：列选信号RAS：行选信号WE：允许信号（高电平允许读，低电平允许写）CS：片选信号SCL：串行时钟，SDA：串行数据，由南桥提供3.3V电压D58、D56、D18等：是数据线，对地打阻值正常值300-800DDR2内存插槽测试点2009-10-2 10:37:43文/xiaowang 出处:电脑维修家园DDR2内存插槽实物图如下：1、时钟信号点，共有8个时钟信号点，分别位于52、137、138、171、185、186、220、221针脚，正常进，时钟信号点工作电压为1.1V。
2、电压信号点，DDR2内存插槽有2种电压，其中238针脚为3.3V供电脚，51、53、56、59、62、64、69、72、75、78、170、172、175、1 78、181、187、189、191、194针脚为1.8V供电脚。
存储卡标准.CF.SD.SDHC.MMC.TF卡引脚定义对应关系
3
VSS1
电源地1 电源地1
4 VSS1
3 VSS1
4
VDD
电源
电源
5
6
VDD1 VDD2 4
VDD
4 VDD VDD
电源
电源
5
CLK
时钟 时钟SCK
7 CLK 5 CLK 5 CLK SCLK
时钟 时钟sck
6
VSS2
电源地2 电源地2
8 VSS2
6 VSS2
6 VSS VSS
电源地 电源地
7
DAT0
数据线0 主入从出
9 DAT0
7 DAT 7 DAT0 DO
数据线0 主入从出
8 DAT1
10 DAT1
8 DAT1
X
数据线1 保留
TF卡， 又叫 microS D卡，8 pin，外 形以及 在SD和 SPI工作 模式下 引脚定
数据线2 数据线3 命令线 电ห้องสมุดไป่ตู้ 时钟 电源地 数据线0
保留 片选/从选SS 主出从入 电源 时钟sck 电源地 主入从出
数据线1
保留
三星 MMC Micro卡 (512MB) 基本特征 卡式类型 MMC Micro 闪存卡容 量 512MB 外形尺寸 14*12*1. 1 产品重量 1 电压(V) 2.7V3.6V 其他性能 读：10 MB/s； 写：7 MB/s
SD
概念 SD卡， 数字安 全记忆 卡 （Secur
e Digital
Memory Card） ，是用 于移动 设备的 标准记 忆卡。 SD卡数 据传送 和物理 规范由 MMC发 展而 来，大 小和 MMC差 不多。 长宽和 MMC一 样，比 MMC稍 微外厚形了及 接口定 义SD卡为
tf卡底层引脚定义
tf卡底层引脚定义TF卡底层引脚定义TF卡是一种常用的存储设备，也被称为Micro SD卡。
TF卡的底层引脚定义是指在卡片上的引脚接口，用于与其他设备进行通信和数据传输。
在TF卡上，有多个引脚分布在不同的位置，每个引脚都有不同的功能和用途。
1. VCC引脚：VCC引脚是TF卡的电源引脚，用于提供电源给TF卡。
一般情况下，VCC引脚的电压为3.3V。
2. GND引脚：GND引脚是TF卡的地线引脚，用于提供电路的接地。
3. CLK引脚：CLK引脚是TF卡的时钟引脚，用于同步数据传输的时钟信号。
TF卡的时钟频率一般为25MHz。
4. CMD引脚：CMD引脚是TF卡的命令引脚，用于发送和接收命令。
CMD引脚是一个双向引脚，可以作为输入或输出使用。
5. DAT0-DAT3引脚：DAT0-DAT3引脚是TF卡的数据引脚，用于传输数据。
TF卡支持4位数据总线和8位数据总线两种模式，DAT0-DAT3引脚分别用于传输数据位0-3。
通过TF卡的底层引脚定义，可以实现与其他设备的连接和通信。
在实际应用中，TF卡通常被用于存储设备、嵌入式系统和移动设备中，用于存储和传输数据。
TF卡底层引脚定义的功能和用途如下：1. 电源供应：VCC引脚和GND引脚提供电源给TF卡，保证其正常工作。
2. 时钟同步：CLK引脚提供时钟信号，用于同步数据传输，确保数据的准确性和完整性。
3. 数据传输：CMD引脚用于发送和接收命令，DAT0-DAT3引脚用于传输数据。
通过这些引脚，TF卡可以与其他设备进行数据的读取和写入。
TF卡的底层引脚定义是TF卡与其他设备进行通信和数据传输的关键。
通过准确地连接和配置这些引脚，可以实现TF卡与其他设备的稳定和可靠的数据交互。
总结一下，TF卡底层引脚定义包括VCC引脚、GND引脚、CLK引脚、CMD引脚和DAT0-DAT3引脚。
这些引脚在TF卡与其他设备的通信和数据传输中起到了重要的作用。
了解和掌握TF卡底层引脚定义，可以帮助我们更好地使用和应用TF卡，实现数据的存储和传输。
SD卡引脚及spi模式基本操作过程
SD卡引脚及spi模式基本操作过程（摘自网络）对于SD卡的硬件结构，在官方的文档上有很详细的介绍，如SD卡内的存储器结构、存储单元组织方式等内容。
要实现对它的读写，最核心的是它的时序，笔者在经过了实际的测试后，使用51单片机成功实现了对SD卡的扇区读写，并对其读写速度进行了评估。
下面先来讲解SD卡的读写时序。
SD卡的引脚定义SD卡引脚功能详述：引脚编号SD模式SPI模式名称类型描述名称类型描述1 CD/DAT3 IO或PP 卡检测/数据线3#CS I 片选2 CMD PP 命令/回应DI I 数据输入3 VSS1 S 电源地VSS S 电源地4 VDD S 电源VDD S 电源5 CLK I 时钟SCLK I 时钟6 VSS2 S 电源地VSS2 S 电源地7 DAT0 IO或PP 数据线0 DO O或PP 数据输出8 DAT1 IO或PP 数据线1 RSV9 DAT2 IO或PP 数据线2 RSV注：S：电源供给I：输入O：采用推拉驱动的输出PP：采用推拉驱动的输入输出SD卡SPI模式下与单片机的连接图：SD卡支持两种总线方式：SD方式与SPI方式。
其中SD方式采用6线制，使用CLK、CMD、DAT0~DAT3进行数据通信。
而SPI方式采用4线制，使用CS、CLK、DataIn、DataOut进行数据通信。
SD方式时的数据传输速度与SPI方式要快，采用单片机对SD卡进行读写时一般都采用SPI模式。
采用不同的初始化方式可以使SD卡工作于SD方式或SPI 方式。
这里只对其SPI方式进行介绍。
SPI方式驱动SD卡的方法SD卡的SPI通信接口使其可以通过SPI通道进行数据读写。
从应用的角度来看，采用SPI接口的好处在于，很多单片机内部自带SPI控制器，不光给开发上带来方便，同时也见降低了开发成本。
然而，它也有不好的地方，如失去了SD卡的性能优势，要解决这一问题，就要用SD方式，因为它提供更大的总线数据带宽。
sdio引脚定义
sdio引脚定义SDIO引脚定义是指SDIO（Secure DigitalInput/Output）接口的引脚定义，主要用于SD存储卡和其他SDIO设备的通信。
SDIO接口通过引脚对数据进行传输和交换，因此SDIO引脚定义对于SDIO接口的正常工作非常重要。
本文将对SDIO引脚定义进行具体介绍，包括引脚的功能、命名规则和电气特性等方面。
一、SDIO引脚定义SDIO引脚定义一般分为两部分：主机端（Host）和设备端（Device）。
其中，主机端一般指SD存储卡读卡器或主机设备，设备端一般指SDIO设备，如无线网卡、数码相机、移动电话等。
下面是SDIO引脚定义的详细内容：1.主机端引脚定义主机端引脚定义包括以下几个方面：（1）SD_CLK（时钟）：传输速率的时钟，用于同步数据传输。
（2）SD_CMD（命令）：主机对SDIO设备发送的命令。
（3）SD_D0~D3（数据线）：SDIO设备和主机之间传输的数据线，其中SD_D0为主要数据线。
（4）SDIO_Voltage_Select（电压选择）：电源电压选择引脚，用于选择SDIO设备的工作电压，通常为3.3V 或1.8V。
2.设备端引脚定义设备端引脚定义包括以下几个方面：（1）SD_CLK（时钟）：传输速率的时钟，用于同步数据传输。
（2）SD_CMD（命令）：主机对SDIO设备发送的命令。
（3）SD_D0~D3（数据线）：SDIO设备和主机之间传输的数据线，其中SD_D0为主要数据线。
（4）SDIO_Voltage_Select（电压选择）：电源电压选择引脚，用于选择SDIO设备的工作电压，通常为3.3V 或1.8V。
（5）SDIO_IRQ（中断请求）：SDIO设备向主机发送中断请求的引脚，用于通知主机设备状态的变化等。
（6）SDIO_CD（卡检测）：SDIO设备的卡检测引脚，用于检测SDIO设备是否插入主机。
以上是SDIO引脚定义的具体内容，下面将对SDIO引脚定义的一些特性进行介绍。
SD卡原理及内部结构
SD卡原理及内部结构1、简介：SD卡（Secure Digital Memory Card）是一种为满足安全性、容量、性能和使用环境等各方面的需求而设计的一种新型存储器件，SD卡允许在两种模式下工作，即SD模式和SPI模式，本系统采用SPI模式。
本小节仅简要介绍在SPI 模式下，STM32处理器如何读写SD卡，如果读者如希望详细了解SD卡，可以参考相关资料。
SD 卡内部结构及引脚如下图所示：SD卡内部图.JPG2、SD卡管脚图：SD卡图.JPG3、SPI模式下SD各管脚名称为：sd 卡：SPI模式下SD各管脚名称为.JPG注：一般SD有两种模式：SD模式和SPI模式，管脚定义如下：（A）、SD MODE 1、CD/DATA3 2、CMD 3、VSS1 4、VDD 5、CLK 6、VSS2 7、DATA0 8、DATA1 9、DATA2（B）、SPI MODE 1、CS 2、DI 3、VSS 4、VDD 5、SCLK 6、VSS2 7、DO 8、RSV 9、RSVSD 卡主要引脚和功能为：CLK：时钟信号，每个时钟周期传输一个命令或数据位，频率可在0～25MHz之间变化，SD卡的总线管理器可以不受任何限制的自由产生0～25MHz 的频率；CMD：双向命令和回复线，命令是一次主机到从卡操作的开始，命令可以是从主机到单卡寻址，也可以是到所有卡；回复是对之前命令的回答，回复可以来自单卡或所有卡；DAT0～3：数据线，数据可以从卡传向主机也可以从主机传向卡。
SD卡以命令形式来控制SD卡的读写等操作。
可根据命令对多块或单块进行读写操作。
在SPI模式下其命令由6个字节构成，其中高位在前。
SD卡命令的格式如表1所示，其中相关参数可以查阅SD卡规范。
4、MicroSD卡管脚图：MicroSD卡管脚图.JPG5、MicroSD卡管脚名称：MicroSD卡管脚名称.JPGSD 卡与MicroSD卡仅仅是封装上的不同，MicroSD卡更小，大小上和一个SIM卡差不多，但是协议与SD卡相同。
SD卡引脚及spi模式基本操作过程精编版
SD卡引脚及spi模式基本操作过程（摘自网络）对于SD卡的硬件结构，在官方的文档上有很详细的介绍，如SD卡内的存储器结构、存储单元组织方式等内容。
要实现对它的读写，最核心的是它的时序，笔者在经过了实际的测试后，使用51单片机成功实现了对SD卡的扇区读写，并对其读写速度进行了评估。
下面先来讲解SD卡的读写时序。
SD卡的引脚定义SD卡引脚功能详述：引脚编号SD模式SPI模式名称类型描述名称类型描述1 CD/DAT3 IO或PP 卡检测/数据线3#CS I 片选2 CMD PP 命令/回应DI I 数据输入3 VSS1 S 电源地VSS S 电源地4 VDD S 电源VDD S 电源5 CLK I 时钟SCLK I 时钟6 VSS2 S 电源地VSS2 S 电源地7 DAT0 IO或PP 数据线0 DO O或PP 数据输出8 DAT1 IO或PP 数据线1 RSV9 DAT2 IO或PP 数据线2 RSV注：S：电源供给I：输入O：采用推拉驱动的输出PP：采用推拉驱动的输入输出SD卡SPI模式下与单片机的连接图：SD卡支持两种总线方式：SD方式与SPI方式。
其中SD方式采用6线制，使用CLK、CMD、DAT0~DAT3进行数据通信。
而SPI方式采用4线制，使用CS、CLK、DataIn、DataOut进行数据通信。
SD方式时的数据传输速度与SPI方式要快，采用单片机对SD卡进行读写时一般都采用SPI模式。
采用不同的初始化方式可以使SD卡工作于SD方式或SPI 方式。
这里只对其SPI方式进行介绍。
SPI方式驱动SD卡的方法SD卡的SPI通信接口使其可以通过SPI通道进行数据读写。
从应用的角度来看，采用SPI接口的好处在于，很多单片机内部自带SPI控制器，不光给开发上带来方便，同时也见降低了开发成本。
然而，它也有不好的地方，如失去了SD卡的性能优势，要解决这一问题，就要用SD方式，因为它提供更大的总线数据带宽。
tf卡底层引脚定义
tf卡底层引脚定义TF卡底层引脚定义:TF卡，又称为Micro SD卡，是一种常见的存储设备，广泛应用于移动设备、数码相机等领域。
TF卡底层引脚定义了TF卡与外部设备之间的连接方式和通信规则。
本文将从TF卡底层引脚定义的角度，探讨TF卡的工作原理和应用场景。
一、TF卡底层引脚定义TF卡底层引脚一般包括以下几个引脚：1. VCC：供电引脚，用于提供电源给TF卡，一般连接到3.3V或5V 电源。
2. GND：地引脚，用于连接地线，与外部设备共享地。
3. CLK：时钟引脚，用于传输时钟信号，控制数据的读写。
4. CMD：命令引脚，用于发送读写命令给TF卡。
5. DAT0-DAT3：数据引脚，用于传输数据。
二、TF卡工作原理TF卡是一种闪存存储设备，采用了SPI（Serial Peripheral Interface）或SD（Secure Digital）接口协议。
TF卡通过底层引脚与外部设备进行通信，实现数据的读写和存储。
在TF卡的工作过程中，外部设备首先通过时钟引脚（CLK）发送时钟信号给TF卡，TF卡根据时钟信号进行同步。
然后，外部设备通过命令引脚（CMD）发送读写命令给TF卡，TF卡根据命令进行相应的操作。
同时，外部设备通过数据引脚（DAT0-DAT3）与TF卡进行数据的传输。
TF卡根据命令和数据进行存储或读取操作，并将结果返回给外部设备。
三、TF卡的应用场景TF卡由于其小巧、便携的特点，在各种移动设备和数码产品中得到了广泛应用。
以下是TF卡的几个主要应用场景：1. 手机存储扩展：由于手机内置存储容量有限，用户可以通过插入TF卡来扩展手机的存储空间，方便存储大量的照片、音乐和视频等文件。
2. 数码相机存储：数码相机通常使用TF卡作为存储介质，用户可以将拍摄的照片和视频保存在TF卡中，并通过TF卡读卡器将数据传输到电脑进行编辑和存储。
3. 智能穿戴设备：智能手表、智能眼镜等智能穿戴设备中，也常常使用TF卡作为存储介质，用于存储用户的健康数据、运动轨迹等信息。
SD卡引脚定义及命令
SD卡引脚定义针脚名称类型描述1. C D DAT3 I/O/PP 卡监测数据位32. C MD PP 命令/回复3. Vss S 地4. V cc S 供电电压5. C LK I 时钟6. C ss2 S 地7. D AT0 I/O/PP 数据位08. D AT1 I/O/PP 数据位19. D AT2 I/O/PP 数据位2SD卡接口标准规范SD卡上所有单元由内部时钟发生器提供时钟。
接口驱动单元同步外部时钟的DAT和CMD信号到内部所用时钟。
本卡由6线SD卡接口控制，包括：CMD,CLK,DAT0-DAT3。
在多SD卡垛叠中为了标识SD卡，一个卡标识寄存器(CID)和一个相应地址寄存器（RCA）预先准备好。
一个附加的寄存器包括不同类型操作参数。
这个寄存器叫做CSD。
使用SD卡线访问存储器还是寄存器的通信由SD卡标准定义。
卡有自己的电源开通检测单元。
无需附加的主复位信号来在电源开启后安装卡。
它防短路，在带电插入或移出卡时。
无需外部编程电压。
编程电压卡内生成。
SD卡支持第二接口工作模式SPI。
如果接到复位命令（CMD0）时，CS信号有效（低电平），SPI 模式启用。
SD卡接口规范(完整规范标准)特性：◎容量：32MB/64MB/128MB/256MB/512MB/1GByte◎兼容规范版本1.01◎卡上错误校正◎支持CPRM◎两个可选的通信协议：SD模式和SPI模式◎可变时钟频率0－25MHz◎通信电压范围：2.0-3.6V工作电压范围:2.0-3.6V◎低电压消耗：自动断电及自动睡醒，智能电源管理◎无需额外编程电压◎卡片带电插拔保护◎正向兼容MMC卡◎高速串行接口带随即存取－－－支持双通道闪存交叉存取－－－快写技术：一个低成本的方案，能够超高速闪存访问和高可靠数据存储－－－最大读写速率：10Mbyte/s◎最大10个堆叠的卡（20MHz,Vcc=2.7-3.6V)◎数据寿命：10万次编程/擦除◎CE和FCC认证◎PIP封装技术◎尺寸：24mm宽×32mm长×1.44mm厚本SD卡高度集成闪存，具备串行和随机存取能力。
SD卡原理及内部结构
1、简介：SD卡（Secure Digital Memory Card）是一种为满足安全性、容量、性能和使用环境等各方面的需求而设计的一种新型存储器件，SD卡允许在两种模式下工作，即SD模式和SPI模式，本系统采用SPI模式。
本小节仅简要介绍在SPI模式下，STM32处理器如何读写SD卡，如果读者如希望详细了解SD卡，可以参考相关资料。
SD 卡内部结构及引脚如下图所示：SD卡内部图.JPG2、SD卡管脚图：SD卡图.JPG3、SPI模式下SD各管脚名称为：sd 卡：SPI模式下SD各管脚名称为.JPG注：一般SD有两种模式：SD模式和SPI模式，管脚定义如下：（A）、SD MODE 1、CD/DATA3 2、CMD 3、VSS1 4、VDD 5、CLK 6、VSS2 7、DATA0 8、DATA1 9、DATA2（B）、SPI MODE 1、CS 2、DI 3、VSS 4、VDD 5、SCLK 6、VSS2 7、DO 8、RSV 9、RSVSD 卡主要引脚和功能为：CLK：时钟信号，每个时钟周期传输一个命令或数据位，频率可在0～25MHz之间变化，SD卡的总线管理器可以不受任何限制的自由产生0～25MHz 的频率；CMD：双向命令和回复线，命令是一次主机到从卡操作的开始，命令可以是从主机到单卡寻址，也可以是到所有卡；回复是对之前命令的回答，回复可以来自单卡或所有卡；DAT0～3：数据线，数据可以从卡传向主机也可以从主机传向卡。
SD卡以命令形式来控制SD卡的读写等操作。
可根据命令对多块或单块进行读写操作。
在SPI 模式下其命令由6个字节构成，其中高位在前。
SD卡命令的格式如表1所示，其中相关参数可以查阅SD卡规范。
4、MicroSD卡管脚图：MicroSD卡管脚图.JPG5、MicroSD卡管脚名称：MicroSD卡管脚名称.JPGSD 卡与MicroSD卡仅仅是封装上的不同，MicroSD卡更小，大小上和一个SIM卡差不多，但是协议与SD卡相同。
SD卡与TF卡的引脚定义
December 2007 Rev 31/61512 MByte and 1 GByte, 3.3V Supply Secure Digital™ CardFeatures■SD Memory Card Specification Version 1.01-compliant■Up to 1 Gbyte of Formatted Data Storage ■Bus Mode–SD Protocol (1 to 4 Data Lines)–SPI Protocol■Operating Voltage Range:–Basic Communication (CMD0, CMD15, CMD55 and ACMD41): 2.0V to 3.6V–Other C ommands a nd M emory A ccess: 2.7V to 3.6V ■Variable Clock Rate: 0 to 25 MHz ■Read Access (using 4 Data Lines)–Sustained Multiple Block: 6.3 Mb/s ■Write Access (using 4 Data Lines)–Sustained Multiple Block: 3.0 Mb/s ■Maximum Data Rate with up to 10 Cards ■Aimed at Portable and Stationary Applications ■Communication Channel Protocol Attributes:–Six-wire communication channel (clock, command, 4 data lines)–Error-proof data transfer–Single or Multiple block oriented data transfer■Memory Field Error Correction ■Safe Card Removal during Read■Write Protect Feature using Mechanical Switch ■Built-in Write Protection Features (Permanent and Temporary)■SD, MiniSD and MicroSD Packages –ECOPACK ® compliant –Halogen free –Antimony freeMicroSDTable 1.Device summaryPart Number Package Form Factor Operating Voltage RangeSMS128AF SD (full size)2.7V to3.6VSMS256AF SMS512AF SMS01GAF SMS064BF MiniSD SMS128BF SMS064FF MicroSDSMS128FF SMS256FF SMS512FFDescription SMSxxxAF, SMSxxxFF, SMSxxxBF1 DescriptionThe Secure Digital Memory Card (SD Memory Card) is a Flash-Based Memory Card. It is specifically designed to meet the security, capacity, performance and environmentalrequirements of the latest-generation audio and video consumer electronic devices, that is mobile phones, digital cameras, digital recorders, PDAs, organizers, electronic toys, etc. The Secure Digital Memory Card is a high-mobility, high-performance, low-cost and low-power consumption device that features high data throughput at the memory card interface. It includes a copyright protection mechanism that complies with the security of the SDMI (Secure Digital Music Initiative) standard. The Secure Digital Memory Card security system uses mutual authentication and a “cipher algorithm” that protects the card from illegal use. Unsecured access to the user's personal content is also available.The Secure Digital Memory Cards have an advanced communication interface designed to operate in a low voltage range. The full-size Secure Digital Memory Card has a 9-pin interface whereas the Mini Secure Digital Memory Card has a 11-pin interface but can be fitted with a 9-pin adapter. Only the 9-pin interface is described in this document. The MicroSD Memory Card has an 8-pin interface, and can also be fitted with a 9-pin adapter.Table 2,T able 3,Table 4,Table 5, and Table 6 give an overview of the Secure Digital Memory Card features.In order to meet environmental requirements, the devices are offered in ECOPACK ®packages. ECOPACK packages are Lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label.The SD, MiniSD and MicroSD packages are also Halogen free and Antimony free.Related documentation●Secure Digital Memory Card Specifications: Part 1 Physical Layer Specification, Version 1.01●MiniSd Memory Card Specifications: Addendum to SD Memory Card Specifications Part 1 Physical layer Specification, Version 1.02●MicroSD Memory Card Specifications: Addendum to SD Memory Card Specifications Part 1, Physical Layer Specification, Version 1.00Table 2.System performanceSystem performanceMax.Typ.Unit Sleep to Ready30µs Sustained Multiple Block Read (1)1.43X, 20X, 12X and 5X Speed grade markings where 1X = 150 KBytes/s.6.3 (43X)MBytes/s Burst Single Block Read (1) 1.8 (12X)MBytes/s Sustained Multiple Block Write (1) 3.0 (20X)MBytes/s Burst Single Block Write (1)0.8 (5X)MBytes/s Power-up to Ready150msSMSxxxAF, SMSxxxFF, SMSxxxBFDescriptionTable 3.Power consumption (1)1.T A = 25°C, V DD = 3.6V.ModeMax. Current ConsumptionStandby 200 µA Read 30 mA Write30 mATable 4.Environmental specifications (1)1.NA = Not Applicable; RH = Relative Humidity; ESD = ElectroStatic DischargeEnvironmental specifications Operating Non-Operating T emperature− 25°C to 85°C − 40°C to 85°C Humidity (non- condensing)NA 85°C - 85%RHESDProtectionContact PadsNA±4kV , Human body model according to ANSI EOS/ESD-S5.1-1998Other±8kV (coupling plane discharge)±15kV (air discharge) Human body model perIEC61000-4-2Salt Water Spray NA T A = 35 °C 3% NaCl (MIL Std Method 1009)Vibration (peak-to-peak)NA 15 Gmax ShockNA1,000G Drop NA2000GBending20N (middle of the card)20N (border of the card)UV light exposure254nm, 15Ws/cm2Table 5.Physical dimensionsParameter SD MiniSD MicroSD Unit Width 2420 11mmHeight3221.515 mm Thickness 2.1 1.4Inter Connect Area 0.7±0.1mmMax. Card Thickness 0.95 Max. Pull Area1.0±0.1Weight Approx. 2Approx. 1<1g Number of Pins9118N/ADescriptionSMSxxxAF, SMSxxxFF, SMSxxxBFTable 6.System reliability and maintenanceMTBF (1)1.MTBF = Mean Time Between Failures.>1,000,000hrsPreventive Maintenance NoneData Reliability 1 non-recoverable bit in 1014 bit read Endurance>2,000,000 Program/Erase CyclesSMSxxxAF, SMSxxxFF, SMSxxxBF Memory array partitioning2 Memory array partitioningThe basic unit of data transfer to/from the SD Memory Card is the Byte. The memory array is divided into several structures as described below and summarized in Table 17.BlockThe Block is the unit structure related to block-oriented read and write commands. Its size is the number of Bytes that are transferred when a block-oriented read or write command is sent by the host. The SD Memory Card Block size is either programmable or fixed. The information about allowed block sizes and programmability is stored in the CSD Register. The details of the Memory Array Structure and the number of addressable Blocks are shown in T able 17.SectorThe sector is the unit structure related to the erase commands. Its size is the number of blocks that are erased at any one time. The sector size is fixed for each device. The information about the sector size (in blocks) is stored in the CSD register.Write Protect Group (WP-Group)The WP-Group is the smallest structure that may be individually protected. Its size is the number of Sectors that are Write Protected with one bit. The information about the Write Protect Group size is stored in the CSD Register.Table 7.Memory array structuresType of Structure Number of structures in deviceUnit 32 MByte Devices 64 MByte Devices 128 MByte Devices 256 MByte Devices 512 MByte Devices 1 GByte Devices Blocks 512 Bytes 5977612262424832049971210024961999872Sector Block 128128128128128128WP-GroupsSector12481632Memory array partitioning SMSxxxAF, SMSxxxFF, SMSxxxBFSMSxxxAF, SMSxxxFF, SMSxxxBF Secure digital memory card interface3 Secure digital memory card interfaceThis section applies to the full-size SD Memory Card only, or to the MiniSD and MicroSD card when used with an adapter.Details on the 11-pin communication interface of the MiniSD card used without an adapter are still to be announced. Figure 3: MicroSD pin assignment shows the MicroSD pinout.The Secure Digital Memory Card has an advanced 9-pin communication interface (Clock, Command, 4 Data pins and 3 Power Supply pins) designed to operate in a low voltage range. The Secure Digital Card has its nine pins exposed on one side (see Figure 2). The signal/pin assignments are listed in Table 8 The pin types are Power Supply, Input, Output and Push-Pull. The signals include six communication lines CMD, DAT0, DAT1, DAT2, DAT3, CLK and three supply lines V DD , V SS1 and V SS2.Table 8.Full-size SD Memory Card pin assignmentPin #SD modeSPI modeNameType (1)1.S: power supply; I: input; O: output using push-pull drivers; PP: I/O using push-pull drivers.DescriptionName Type Description1CD/DA T3(2)2.The extended DAT lines (DAT1-DAT3) are input on power-up. They start to operate as DAT lines after SET_BUS_WIDTHcommand.I/O/PP (3)3.After power-up this line is input with 50kW pull-up (can be used for card detection or SPI mode selection). The pull-upshould be disconnected by the user, during regular data transfer, with SET_CLR_CARD_DETECT (ACMD42) command.Card Detect / Data Line [Bit 3]CS I Chip Select (active Low)2CMD PP Command/Response DI I Data In3V SS1S Supply voltage ground V SS S Supply voltage ground 4V DD S Supply voltage V DD S Supply voltage 5CLK I ClockSCLK I Clock6V SS2S Supply voltage ground V SS2SSupply voltage ground7DA T0I/O/PP Data Line [Bit 0]DOO/PP Data Out8DA T1(2)I/O/PP Data Line [Bit 1]Reserved 9DA T2(2)I/O/PPData Line [Bit 2]ReservedSecure digital memory card interfaceSMSxxxAF, SMSxxxFF, SMSxxxBFTable 9.MicroSD Contact Pad AssignmentPin SD ModeSPI ModeName Type (1)1.S: power supply; I: input; O: output using push-pull drivers; PP: I/O using push-pull drivers.Description Name TypeDescription1 DA T2 I/O/PP Data Line [Bit 2] RSV Reserved2CD/DA T3(2)2.The extended DAT lines (DAT1-DAT3) are input on power up. They start to operate as DAT lines after SET_BUS_WIDTH command. The Host shall keep its own DAT1-DAT3 lines in input mode, as well, while they are not used. It is defined so, in order to keep compatibility to MultiMediaCards.I/O/PP (3)3.After power up this line is input with 50KOhm pull-up (can be used for card detection or SPI modeselection). The pull-up should be disconnected by the user, during regular data transfer, with SET_CLR_CARD_DETECT (ACMD42) command.Card Detect / Data Line[Bit 3]CSIChip Select (neg true)3 CMD PP Command/Response DI I Data In4 V DDS Supply voltageV DD S Supply voltage 5 CLK I Clock SCLK I Clock 6 V SSSSupply voltage groundV SS SSupply voltage ground7 DA T0 I/O/PP Data Line [B it 0] DOO/PP Data Out8 DA T1RSVReservedSMSxxxAF, SMSxxxFF, SMSxxxBF Secure digital memory card interface3.1 Secure digital memory card bus topologyThe Secure Digital Memory Card system defines two alternative communications protocols:SD and SPI that correspond to two operating modes.Either mode can be selected in the application, mode selection is transparent to the host.The host automatically detects the operating mode of the card by issuing the Resetcommand (refer to Section7.2.1: Mode Selection) and will expect all furthercommunications to use the same mode. Therefore, applications that use only onecommunication mode do not have to be aware of the other.The SD bus includes the following signals:●CLK: Host to card clock signal●CMD: Bi-directional Command/Response signal●DAT0 - DAT3: 4 Bi-directional data signals.●V DD, V SS1, V SS2: Power and ground signals.The SD Memory Card bus has a synchronous star topology (refer to Figure4: Secure DigitalMemory Card system bus topology) with a single master (the application) and multipleslaves (the cards). The Clock, power and ground signals are common to all cards. Thecommand (CMD) and data (DAT0 - DAT3) signals are dedicated to the cards, they providecontinuous point-to-point connection to all the cards.During the initialization process, commands are sent to each card individually, allowing theapplication to detect the cards and assign logical addresses to the physical slots. Data isalways sent (received) to (from) each card individually. However, in order to simplify thehandling of the card stack, after the initialization process, all commands may be sentconcurrently to all cards. Addressing information is provided in the command packet.The SD bus allows dynamic configuration of the number of data lines. After power-up the SDMemory Card defaults to using only DAT0 for data transfer. After initialization the host canchange the bus width (number of active data lines). This feature is an easy trade off betweenhardware cost and system performance.Secure digital memory card interfaceSMSxxxAF, SMSxxxFF, SMSxxxBF1.DAT1 and DAT2 not connected.3.2 SD bus protocolCommunication over the SD bus is based on command and data bit streams which areinitiated by a start bit and terminated by a stop bit.●Command: a command is a token which starts an operation. A command is sent from the host either to a single card (addressed command) or to all connected cards (broadcast command). Commands are transferred serially on the CMD line. See Figure 5: "No Response" and "No Data" operations .The Command token format is shown in Figure 8●Response: a response is a token which is sent from an addressed card, or(simultaneously) from all connected cards, to the host, as an answer to a previously received command. Responses are transferred serially on the CMD line. A response is illustrated in Figure 5: "No Response" and "No Data" operations .The Response token format is shown in Figure 9●Data: data can be transferred from the card to the host or from the host to the card. Data is transferred via the data lines. See Figure 6: (Multiple) Block Read operation for an illustration.The Data Packet format is shown in Figure 10Card addressing is implemented using a session address assigned to the card during the initialization phase (See SD Memory Card Specification, Chapter 4). The basic transaction on the SD bus is the command/response transaction. In this type of bus transactions, the information is directly transferred within the command or response structure. In addition, some operations have a data token. Data transfers to/from the SD Memory Card are done in blocks. Data blocks are always followed by CRC bits.Single and Multiple Block operations are supported. Note that the Multiple Block operation mode improves the speed of write operations. A Multiple Block transmission is terminated by issuing a STOP_TRANSMISSION command on the CMD line (See Figure 6 and Figure 7).Data transfer can be configured by the host to use single or multiple data lines (provided that the card supports this feature).A busy signal on DAT0 is used to indicate that a Block Write operation is ongoing (see Figure7). The same busy signaling is used regardless of the number of data lines used to transfer the data.Response tokens (see Figure9) have four coding schemes depending on their content. The token length is either 48 or 136 bits (See SD Memory Card Specification, Chapter 4.5 for detailed definitions of the commands and responses). The CRC protection algorithm for data block is a 16-bit CCITT polynomial (see SD Memory Card Specification, chapter 4.5). On the CMD line, the MSB bit is transmitted first and the LSB bit last. When the wide bus option is used, the data is transferred 4 bits at a time (refer to Figure10). Start bits, End bits and CRC bits, are transmitted on all the DAT lines used. CRC bits are calculated and checked for every DAT line individually. The CRC status response and Busy indication are sent by the card to the host on DAT0 only (DAT1-DAT3 are Don’t Care).3.3 SD Memory Card Functional DescriptionAll communications between the host and the cards are controlled by the host (master).The host sends commands of two types:●Broadcast commands which are intended for all cards. Some of these commandsrequire a response.●Addressed (point-to-point) commands that are sent to the addressed card and arefollowed by a response from the card.Modes3.4 OperationFigure11 and Figure12 show an overview of the command flow for the Card Identificationmode and the Data Transfer mode, respectively.Table10 shows the relationship between operation modes and card states. Each state in theSD Memory Card state diagram (see Figure16 and Figure17) is associated with oneoperation mode.Table 10.Card States vs. Operation ModesCard state Operation modeInactive State InactiveIdle StateReady StateCard Identification ModeIdentification State3.4.1 Card Identification ModeThe host enters the Card Identification mode after reset and remains in this mode until it hasfinished searching for new cards on the bus.Cards enter the Card Identification mode after reset and remain in this mode until they receive the SEND_RCA command (CMD3) (or the SET_RCA command for MultiMediaCards).While in Card Identification mode the host resets all the cards that are in Card Identification mode, validates the operation voltage range, identifies every card and asks them to publish their Relative Card Addresses (RCA). This operation is done separately for each card on its own CMD line. In this mode, all data communications use the command line (CMD) only.The host starts the card identification process at the identification clock rate f OD . The SD Memory Card has push-pull CMD line output drives.Once the bus has been activated the host asks each card to send their valid operation conditions (ACMD41 preceded by APP_CMD - CMD55 with RCA=0000h).The response to ACMD41 is the Operation Condition Register of the card. The same command is sent to all the new cards in the system. Incompatible cards are switched to Inactive State.The host then issues the ALL_SEND_CID command (CMD2), to every card to get their unique card identification (CID) numbers. All unidentified cards (which are in Ready State) answer by sending their CID numbers (on the CMD line) and switch to the Identification State. Then the host issues a CMD3 (SEND_RELATIVE_ADDR) command to ask the cards to publish a relative card address (RCA). The RCA is shorter than the CID, and will be used to address the card (typically at a clock rate higher than f OD ) once this is in Data Transfer mode. Once the RCA is received the card state changes to Standby. At this point, the host may ask the card to publish another RCA number by sending anotherSEND_RELATIVE_ADDR command to the card. The last published RCA is the actual RCA of the card.The host repeats the identification process, that is the cycles with CMD2 and CMD3, for each card in the system. Once all the SD Memory Cards have been initialized, the host initializes the MultiMediaCards that are in the system (if any) by issuing CMD2 and CMD3 as explained in the MultiMediaCard specification. Note that in the SD system all the cards are connected separately so each MultiMediaCard has to be initialized individually.Stand-by State Data Transfer ModeT ransfer State Sending-data State Receive-data State Programming State Disconnect StateTable 10.Card States vs. Operation Modes (continued)Card stateOperation mode3.4.2 Data Transfer ModeCards enter the Data Transfer mode once their Relative Card Addresses (RCA) have beenpublished.The host enters the Data Transfer mode after identifying all the cards on the bus.The host issues SEND_CSD (CMD9) to obtain the contents of the Card Specific Data (CSD)Register for each card. The CSD Register contains information like the block length and thecard storage.Until the host knows the contents of all the CSD Registers, the f PP clock rate must remain atf OD because some cards may have operating frequency limitations.The broadcast command SET_DSR (CMD4) configures the driver stages of all identifiedcards. It programs their Driver Stage Registers (DSR) according to the application buslayout (length), the number of cards on the bus and the data transfer frequency. The clockrate is changed from f OD to f PP at that point. The SET_DSR command is an option for thecard and the host.CMD7 is used to select one card and switch it to the Transfer State. Only one card can be inTransfer State at a given time. If a previously selected card is still in Transfer State when thehost uses CMD7 to switch another card to the Transfer state, then the connection betweenthe previously selected card and the host is released and the card reverts to the StandbyState.When CMD7 is issued with the reserved relative card address "0000h", all cards revert to the Standby State. This function may be used before identifying new cards, to avoid resetting already registered cards. When in Standby state the cards that already have an RCA do not respond to identification commands (CMD41, CMD2, CMD3).Note that a card is deselected when it receives a CMD7 with an RCA that does not match. Card deselection is automatic if another card in a system is selected and the cards share the same CMD lines.So, in an SD Memory Card system, the host may either have a common CMD line for all SD Memory Cards (in which case card deselection is automatic just like in a MultiMediaCard system) or the host may have separate CMD lines, in which case it must be aware of the necessity of deselecting cards.All data communications in the Data Transfer Mode are point-to point between the host and the selected card (using addressed commands). All addressed commands are acknowledged by a response on the CMD line.The relationships between the various states in the Data Transfer mode are summarized below (see Figure12):●All Data Read commands (CMD17, CMD18, CMD30, CMD56, ACMD51) can beaborted at any time using the Stop command (CMD12). The data transfer will terminate and the card will return to the T ransfer State.●All Data Write commands (CMD24,CMD25, CMD26, CMD27, CMD42, CMD56) can beaborted at any time using the Stop command (CMD12). The write commands must be stopped prior to deselecting the card using CMD7.●As soon as the data transfer has completed, the card switches from the Data Writestate to either the Programming state (if the transfer was successful) or the T ransfer state (if the transfer failed).●If a Block Write operation is stopped and the block length and CRC of the last block arevalid, the data will be programmed.●The card can provide buffering during Block Write. This means that the data to beprogrammed to the next block can be sent to the card while the previous block is being programmed.If all write buffers are full, the DAT0 line will remain Low (BUSY) as long as the card is in the Programming state (see Figure12).●There is no buffering option for Write CSD, Write CID, Write Protection and erase. Thismeans that while the card is busy with any one of these commands, no other Data Transfer command will be accepted. The DAT0 line will remain Low as long as the card is busy and in the Programming state.●Parameter Set commands (CMD16, CMD32, CMD33) are not allowed while the card isprogramming.●Read commands are not allowed while the card is programming.●Switching another card from the Standby to the Transfer state (using CMD7) will notterminate erase and programming operations. The card will switch to the Disconnect state and release the DAT line.● A card in the Disconnect state can be reselected using CMD7. The card will then revertto the Programming state and reactivate the busy signaling.●Resetting a card (using CMD0 or CMD15) will terminate any pending or ongoingprogramming operation. This may result in the loss of card contents. It is up to the host to prevent possible data loss.3.5 CommandsFour types of commands are used to control the SD Memory Card:1.Broadcast commands (bc), no response: The broadcast feature is available only ifall the CMD lines are interconnected at the level of the host. If they are notinterconnected then each individual card will accept the command in turn.2. Broadcast commands with response (bcr): Since there is no Open Drain mode inSD Memory Cards, this type of command is used only if the host does not use acommon CMD line. The command is accepted by every individual Card and theresponses from all cards are sent simultaneously.3. addressed (point-to-point) commands (ac): There is no data transfer on DAT.4. addressed (point-to-point) data transfer commands (adtc): There is a data transferon DAT.All commands have a fixed code length of 48 bits for a transmission time of 2.4µs at 20MHz.All commands and responses are sent over the CMD line of the SD Memory Card.Command transmission always starts with the most significant bit (MSB) of the commandcodeword. All commands are protected by a CRC. All Command codewords are terminatedby the end bit (always '1'). T able11 shows the command format. All commands and theirarguments are specified in the SD Memory Card Specification.Table 11.SD Card Command Format3.6 ResponsesAll responses are sent via the command line CMD. Response transmission always starts with the leftmost bit of the response codeword. The code length depends on the response type. A response always starts with a start bit (always '0'), followed by the bit indicating the direction of transmission (from card = '0').A value denoted by 'X' in T able 12,Table 13,T able 14 and Table 15 indicates a variable entry.All responses (except for R3 Responses) are protected by a CRC. All response codewords are terminated by the end bit (always '1').There are five types of responses. Their formats are defined as follows:1.R1 (normal response command): the code length is 48 bits. Bits 45 to 40 indicate the index of the command to respond to. The index is a binary coded number (between 0 and 63). The status of the card is coded in 32 bits (see Table 12).Note that if data transfer to the card takes place, then a busy signal may appear on the data line after the transmission of each block of data. The host has to check for busy after data block transmission. 2.R1b is identical to R1 with an optional busy signal transmitted on the data line. The card may become busy after receiving these commands, depending on the state it was in prior to receiving the command. The Host has to check for busy in the response.3.R2 (CID, CSD Register): the code length is 136 bits. The contents of the CID Register are sent as a response to the CMD2 and CMD10 commands. The contents of the CSD Register are sent as a response to CMD9. Only the bits [127...1] of the CID and CSD Registers are transferred, the reserved bit [0] of these registers is replaced by the end bit of the response (see Table 13).4. R3 (OCR register): the code length is 48 bits. The contents of the OCR register are sent as a response to ACMD41 (see Section Table 14. on page 25).5.R6 (Published RCA response): the code length is 48 bits. Bits 45 to 40 indicate the index of the command to respond to. In this case it is '000011' (together with bit 5 in the status bits it means = CMD3) as shown in Table 15 The 16 MSB bits of the argument field are used for the Published RCA number.For more details about Response formats, please refer to the SD Memory Card Specification.Bit position 474645:4039:87:10Width 1163271Value '0''1'x x x '1'DescriptionStart bitT ransmissionbitCommand indexArgumentCRC7End bitTable 12.Response R1Table 13.Response R2Table 14.Response R3Table 15.Response R6Bit Position 4746[45:40][39:8][7:1]0Width (bits)1163271Value ‘0’‘0’X X X ‘1’DescriptionStart BitTransmissionBitCommand IndexCard StatusCRC7End BitBit Position 135134[133:128][127:1]0Width (bits)1161271Value ‘0’‘0’‘111111’X ‘1’DescriptionStart BitTransmission BitReservedCID or CSD register incl. internal CRC7End BitBit Position 4746[45:40][39:8][7:1]0Width (bits)1163271Value ‘0’‘0’‘111111’X ‘111111’‘1’DescriptionStart BitTransmissionBitReservedOCR RegisterReservedEnd BitBit Position 4746[45:40][39:8] Argument Field [7:1]0Width (bits)116161671Value ‘0’‘0’X X X X ‘1’DescriptionStart BitT ransmission BitCommand Index (‘000011’)New published RCA [31:16] of the card[15:0] Card Status Bits: 23, 22, 19 and 12 to 0CRC7end bit。
SD卡与TF卡的引脚定义
December 2007 Rev 31/61512 MByte and 1 GByte, 3.3V Supply Secure Digital™ CardFeatures■SD Memory Card Specification Version 1.01-compliant■Up to 1 Gbyte of Formatted Data Storage ■Bus Mode–SD Protocol (1 to 4 Data Lines)–SPI Protocol■Operating Voltage Range:–Basic Communication (CMD0, CMD15, CMD55 and ACMD41): 2.0V to 3.6V–Other C ommands a nd M emory A ccess: 2.7V to 3.6V ■Variable Clock Rate: 0 to 25 MHz ■Read Access (using 4 Data Lines)–Sustained Multiple Block: 6.3 Mb/s ■Write Access (using 4 Data Lines)–Sustained Multiple Block: 3.0 Mb/s ■Maximum Data Rate with up to 10 Cards ■Aimed at Portable and Stationary Applications ■Communication Channel Protocol Attributes:–Six-wire communication channel (clock, command, 4 data lines)–Error-proof data transfer–Single or Multiple block oriented data transfer■Memory Field Error Correction ■Safe Card Removal during Read■Write Protect Feature using Mechanical Switch ■Built-in Write Protection Features (Permanent and Temporary)■SD, MiniSD and MicroSD Packages –ECOPACK ® compliant –Halogen free –Antimony freeMicroSDTable 1.Device summaryPart Number Package Form Factor Operating Voltage RangeSMS128AF SD (full size)2.7V to3.6VSMS256AF SMS512AF SMS01GAF SMS064BF MiniSD SMS128BF SMS064FF MicroSDSMS128FF SMS256FF SMS512FFDescription SMSxxxAF, SMSxxxFF, SMSxxxBF1 DescriptionThe Secure Digital Memory Card (SD Memory Card) is a Flash-Based Memory Card. It is specifically designed to meet the security, capacity, performance and environmentalrequirements of the latest-generation audio and video consumer electronic devices, that is mobile phones, digital cameras, digital recorders, PDAs, organizers, electronic toys, etc. The Secure Digital Memory Card is a high-mobility, high-performance, low-cost and low-power consumption device that features high data throughput at the memory card interface. It includes a copyright protection mechanism that complies with the security of the SDMI (Secure Digital Music Initiative) standard. The Secure Digital Memory Card security system uses mutual authentication and a “cipher algorithm” that protects the card from illegal use. Unsecured access to the user's personal content is also available.The Secure Digital Memory Cards have an advanced communication interface designed to operate in a low voltage range. The full-size Secure Digital Memory Card has a 9-pin interface whereas the Mini Secure Digital Memory Card has a 11-pin interface but can be fitted with a 9-pin adapter. Only the 9-pin interface is described in this document. The MicroSD Memory Card has an 8-pin interface, and can also be fitted with a 9-pin adapter.Table 2,T able 3,Table 4,Table 5, and Table 6 give an overview of the Secure Digital Memory Card features.In order to meet environmental requirements, the devices are offered in ECOPACK ®packages. ECOPACK packages are Lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label.The SD, MiniSD and MicroSD packages are also Halogen free and Antimony free.Related documentation●Secure Digital Memory Card Specifications: Part 1 Physical Layer Specification, Version 1.01●MiniSd Memory Card Specifications: Addendum to SD Memory Card Specifications Part 1 Physical layer Specification, Version 1.02●MicroSD Memory Card Specifications: Addendum to SD Memory Card Specifications Part 1, Physical Layer Specification, Version 1.00Table 2.System performanceSystem performanceMax.Typ.Unit Sleep to Ready30µs Sustained Multiple Block Read (1)1.43X, 20X, 12X and 5X Speed grade markings where 1X = 150 KBytes/s.6.3 (43X)MBytes/s Burst Single Block Read (1) 1.8 (12X)MBytes/s Sustained Multiple Block Write (1) 3.0 (20X)MBytes/s Burst Single Block Write (1)0.8 (5X)MBytes/s Power-up to Ready150msSMSxxxAF, SMSxxxFF, SMSxxxBFDescriptionTable 3.Power consumption (1)1.T A = 25°C, V DD = 3.6V.ModeMax. Current ConsumptionStandby 200 µA Read 30 mA Write30 mATable 4.Environmental specifications (1)1.NA = Not Applicable; RH = Relative Humidity; ESD = ElectroStatic DischargeEnvironmental specifications Operating Non-Operating T emperature− 25°C to 85°C − 40°C to 85°C Humidity (non- condensing)NA 85°C - 85%RHESDProtectionContact PadsNA±4kV , Human body model according to ANSI EOS/ESD-S5.1-1998Other±8kV (coupling plane discharge)±15kV (air discharge) Human body model perIEC61000-4-2Salt Water Spray NA T A = 35 °C 3% NaCl (MIL Std Method 1009)Vibration (peak-to-peak)NA 15 Gmax ShockNA1,000G Drop NA2000GBending20N (middle of the card)20N (border of the card)UV light exposure254nm, 15Ws/cm2Table 5.Physical dimensionsParameter SD MiniSD MicroSD Unit Width 2420 11mmHeight3221.515 mm Thickness 2.1 1.4Inter Connect Area 0.7±0.1mmMax. Card Thickness 0.95 Max. Pull Area1.0±0.1Weight Approx. 2Approx. 1<1g Number of Pins9118N/ADescriptionSMSxxxAF, SMSxxxFF, SMSxxxBFTable 6.System reliability and maintenanceMTBF (1)1.MTBF = Mean Time Between Failures.>1,000,000hrsPreventive Maintenance NoneData Reliability 1 non-recoverable bit in 1014 bit read Endurance>2,000,000 Program/Erase CyclesSMSxxxAF, SMSxxxFF, SMSxxxBF Memory array partitioning2 Memory array partitioningThe basic unit of data transfer to/from the SD Memory Card is the Byte. The memory array is divided into several structures as described below and summarized in Table 17.BlockThe Block is the unit structure related to block-oriented read and write commands. Its size is the number of Bytes that are transferred when a block-oriented read or write command is sent by the host. The SD Memory Card Block size is either programmable or fixed. The information about allowed block sizes and programmability is stored in the CSD Register. The details of the Memory Array Structure and the number of addressable Blocks are shown in T able 17.SectorThe sector is the unit structure related to the erase commands. Its size is the number of blocks that are erased at any one time. The sector size is fixed for each device. The information about the sector size (in blocks) is stored in the CSD register.Write Protect Group (WP-Group)The WP-Group is the smallest structure that may be individually protected. Its size is the number of Sectors that are Write Protected with one bit. The information about the Write Protect Group size is stored in the CSD Register.Table 7.Memory array structuresType of Structure Number of structures in deviceUnit 32 MByte Devices 64 MByte Devices 128 MByte Devices 256 MByte Devices 512 MByte Devices 1 GByte Devices Blocks 512 Bytes 5977612262424832049971210024961999872Sector Block 128128128128128128WP-GroupsSector12481632。
存储卡标准 CF SD SDHC MMC TF卡引脚定义对应关系
SD概念SD卡，数字安全记忆卡（Secur e Digital Memory Card），是用于移动设备的标准记忆卡。
SD卡数据传送和物理规范由MMC发展而来，大小和MMC差不多。
长宽和MMC一样，比MMC稍微厚了外形及接口定义SD卡为9pinSD卡也有SD（SD有4-line和1-line两种模式，以下只列出了4-line工作模式）和SPI两种工作模式，在各个工作模式下引脚定义TF卡，又叫microSD卡，8pin，外形以及在SD和SPI工作模式下引脚定数据线2保留数据线3片选/从选SS命令线主出从入电源电源时钟时钟sck电源地电源地数据线0主入从出数据线1保留三星 MMCMicro卡(512MB)基本特征卡式类型MMCMicro闪存卡容量 512MB外形尺寸14*12*1.1产品重量1电压(V)2.7V-3.6V其他性能读：10MB/s；写：7MB/s91235DAT2DAT3CS/COCMD VSS1CLK 数据线3命令线电源地1时钟片选/从选SS 主出从入电源地1时钟SCK1234567DAT2DAT3CMD VSS1VDD1VDD2CLK 1235FSV CMD VSS1CLK 1235DAT1CD/DAT3CMD CLK X CS DI SCLK 数据线2数据线3命令线时钟保留片选/从选SS 主出从入时钟sckVDD 4VDD 电源电源SD card 4VDD VDD 电源电源TF卡又叫microSD卡8 pin MMC MicroMMC4。
SD卡的管脚排列和总线读写方式
SD卡的管脚排列和总线读写方式
SD 卡的引脚定义：
管脚排列和总线读写方式name=image_operate_52221302162801312 real_src=s12.sinaimg/middle/5e374701ga04f0776e47b690
src=s12.sinaimg/middle/5e374701ga04f0776e47b690 title=[转载]SD 卡的管脚排列和总线读写方式/
SD 卡引脚功能详述：
注：S：电源供给I：输入O：采用推拉驱动的输出
PP：采用推拉驱动的输入输出
SD 卡支持两种总线方式：
SD 方式与SPI 方式。
SD 模式是SD 卡标准的读写方式，但是在选用SD 模
式时，往往需要选择带有SD 卡控制器接口的MCU，或者必须加入额外的SD
卡控制单元以支持SD 卡的读写。
然而，很多51 单片机没有集成SD 卡控制器
接口，若选用SD 模式通讯就无形中增加了产品的硬件成本。
在SD 卡数据读
写时间要求不是很严格的情况下，选用SPI 模式可以说是一种最佳的解决方案。
我用软件模拟出SPI 总线时序读写SD 卡。
其中SD 方式采用6 线制，使用CLK、CMD、DAT0~DAT3 进行数据通信。
而SPI 方式采用4 线制，使用CS、CLK、DataIn、DataOut 进行数据通信。
SD 方式时的数据传输速度与SPI 方式要快，采用单片机对SD 卡进行读写时
一般都采用SPI 模式。
采用不同的初始化方式可以使SD 卡工作于SD 方式或
SPI 方式。
这里只对其SPI 方式进行介绍。
SD 卡SPI 模式下与单片机的连接图：。