MSPF测周法测量信号频率

合集下载
  1. 1、下载文档前请自行甄别文档内容的完整性,平台不提供额外的编辑、内容补充、找答案等附加服务。
  2. 2、"仅部分预览"的文档,不可在线预览部分如存在完整性等问题,可反馈申请退款(可完整预览的文档不适用该条件!)。
  3. 3、如文档侵犯您的权益,请联系客服反馈,我们会尽快为您处理(人工客服工作时间:9:00-18:30)。

M S P430F5529测量频率

-----测周法信号变换电路

过零比较器,lm393输出上拉电阻,两电阻分压

程序

#include <>

#include ""

#include ""

//测周法,在捕获过程中,定时溢出不能被检测出,选择时钟频率为低频时能测出低频,频率高能测出频率高的部分

/*

*

*/

long long start=0;

//long long int stop=0;

double fre=;

unsigned char i=0;

unsigned char over=0;

void SetVcoreUp (unsigned int level)

{

// Open PMM registers for write

PMMCTL0_H = PMMPW_H;

// Set SVS/SVM high side new level

SVSMHCTL = SVSHE + SVSHRVL0 * level + SVMHE + SVSMHRRL0 * level;

// Set SVM low side to new level

SVSMLCTL = SVSLE + SVMLE + SVSMLRRL0 * level;

// Wait till SVM is settled

while ((PMMIFG & SVSMLDLYIFG) == 0);

// Clear already set flags

PMMIFG &= ~(SVMLVLRIFG + SVMLIFG);

// Set VCore to new level

PMMCTL0_L = PMMCOREV0 * level;

// Wait till new level reached

if ((PMMIFG & SVMLIFG))

while ((PMMIFG & SVMLVLRIFG) == 0);

// Set SVS/SVM low side to new level

SVSMLCTL = SVSLE + SVSLRVL0 * level + SVMLE + SVSMLRRL0 * level;

// Lock PMM registers for write access

PMMCTL0_H = 0x00;

}

void init_clock()

{

SetVcoreUp (0x01);

SetVcoreUp (0x02);

SetVcoreUp (0x03);

UCSCTL3 = SELREF_2; // Set DCO FLL reference = REFO UCSCTL4 |= SELA_2; // Set ACLK = REFO

__bis_SR_register(SCG0); // Disable the FLL control loop UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx UCSCTL1 = DCORSEL_7; // Select DCO range 50MHz operation UCSCTL2 = FLLD_0 + 609; // Set DCO Multiplier for 25MHz // (N + 1) * FLLRef = Fdco

// (762 + 1) * 32768 = 25MHz // Set FLL Div = fDCOCLK/2

__bic_SR_register(SCG0); // Enable the FLL control loop __delay_cycles(782000);

do

{

UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG);

// Clear XT2,XT1,DCO fault flags SFRIFG1 &= ~OFIFG; // Clear fault flags

}while (SFRIFG1&OFIFG); // Test oscillator fault flag

}

void send_char(char sc)

{

UCA0TXBUF=sc;

while(!(UCA0IFG&UCTXIFG));

}

void send_string(char *s)

{

while(*s!='\0')

{

send_char(*s++);

}

}

init_uart()

{

P3SEL |= BIT3+BIT4; // ,4 = USCI_A0 TXD/RXD

UCA0CTL1 |= UCSWRST; // **Put state machine in reset** UCA0CTL1 |= UCSSEL__SMCLK; // SMCLK

UCA0BR0 = 173; // 1MHz 115200 (see User's Guide) UCA0BR1 = 0; // 1MHz 115200

UCA0MCTL |= UCBRS_5 + UCBRF_0; // Modulation UCBRSx=1, UCBRFx=0 UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt

相关文档
最新文档