PCB设计技巧百问

PGND
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PCB
PCB
43
dsp
pld
DSP
44
protel PROTEL MENTOR cadstar,cr5000 WG2000,EN2000
powerpcb Cadence 45 ,
allegro zuken
return current
PCB
Dr.Johson SI
Mentor 84 PCB PCB
ICX
EDA
85 PCB
86
V=L*di/dt
PCB print bonding drawing
IC
IC SPEC.
vccgndfloat
,
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PCB 1 2 3
1:no plane+ component(top route) 2:cam plane 3:cam plane split/mixed (GND) split/mixed (power) no plane+route)
76
30M
PCB
PCB
PCB PCB 77 PCB
EMC EMC ESD
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78 /EMI
79
80 PCB
81 PCB PCB
82
4 TOP SIDE
,
VCC
GND VIA
top POWER
bottom
BOTTOM SIDE
EDA
RLC
83
PCB PCB
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H
b.
(stripline)
Z=[60/sqrt(Er)]ln{4H/[0.67π(T+0.8W)]} W/H<0.35 18
H T/H<0.25
(coupling)
flux cancellation
(noise immunity)
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19 PCB FPC (via) FPC 20 PCB (returning current) PCB chassis ground PCB chassis ground PCB (Flexible Printed Circuit) Gerber
RF
PCB 3D PCB R L C 2D
93 1
PCB
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1.5V
2.5V
1.25V 1.2V
3.3V
1.8V
2
1.5V
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1.25V +1.8V 2.5V +1.2V
3.3V
2
EMI
94
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Z=squa L/C C Z
46 IBIS3.2 SPICE
SI EBD HYPERLYNX IS_multiboard
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47 terminal ,
AC 48 BUFFER
49
Mentor– ICX High Speed Digital design a hand book of blackmagic terminal 50 IBIS
IBIS
30
PCB EMI/EMC (>30MHz) . (radiated)
EMC EMI (conducted) .
(<30MHz).
EMI/EMC , . , , . impedance PCB 31 EDA , ) . (chassis ground) (decoupling/bypass) ( , , ,
4:no plane+component( : cam plane , , , EMI ) , ( (
,
split/mixed ,
,
3.3V,5V
)
2
assign
Mechanical Keepoutlayer
PCB
PCB
Topoverlay PCB
& Bottomoverlay
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2.
3.
4.
5.
(blind/buried via)
PCB
23 LC RC (reactance) RC
LC
LC
RC
RC
24 LC
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(ripple noise)
ESR/ESL
LC (pole/zero) 25 PCB bead choke EMC EMC EMC
(switching regulation power) (negative feedback control)
,
test coupon
test coupon ( ) TDR (probe)
(ground lead) (probe tip) test coupon
11
PCB
dual stripline 12
: 13 -
-
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14
(
(via or DIP pin)
)
(edge rate) ( )
56
50M 100M
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TTL,GTL,LVTTL 57 PCB PCB
FR4
Q
PCB
58 Mentor RF RF LAYOUT EESOFT PCB Mentor
PCB
mentor RF EESOFT
Mentor
eesoft
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59
mentor PCB WG( veribest) Enterprise(boardstation)
,
C
Z
95
protel 99se 800hz 89C51 , ,
89C51, PCB
12MHZ ? ?
40KHZ
89C51 ?
PCB PCB
96
?
IC
IBIS
IBIS IC
V I V
T
buffer
SPICE
97 90
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2000
mentor
Toppaste Topsolder
& Bottompaste & Bottomsolder toppaste bottompaste
Drillguide Drilldrawing Multiplayer 92 PCB PCB VIA VIA
RF maxwell
V V t V V t RF
I=I(t)
2.
, , ,
,
loop gain
phase
,
ground guard traces ,
3. bead,
EMI , EMI , ,
EMI PCB
ferrite
ferrite bead
9
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EDA (serpentine) , , , , 10 test coupon TDR (Time Domain Reflectometer) PCB , , ,
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LCD 70 DSP PLD ESD
ESD ESD
ESD ESD
71 PCB A B C-D
Sc SL
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72
EESOFT
PCB
73 PCB EMC
EMC
74
4 1 2 3 4 PCB
EMC
75 ... PCB
4 5
FLASH,SDRAM,
, PCB
, ,
(slew rate)
loop . ,
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pcb PADS Cadence
1.3.4
PLD
PLD
32 INNOVEDA 70% PADS
EDA
Cadence Mentor
33
PCB top silkscreen top component legend, R1 C5,
21
DEBUG
1.
2. 3. reset
(non-monotonic)
(cycle) protocol 22 debug
bus
PCB
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>100MHz PCB (timing)
PCB (crosstalk interference)
?
(signal integrity)
1.
(return current path)
28
PCB PCB (microstrip) PCB (stripline/double stripline) ( )
terminators(
)
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29 IBIS
IBIS IBIS SPICE ( I/O buffer ) SPICE IBIS A SPICE
High-Speed Digital Design
A Handbook of Black Magic
2.Stephen H. Hall
High-Speed Digital System Design
3.Brian Yang
Digital Signal Integrity
4.Dooglas Brook 17 a.
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PCB
1 PCB PCB FR-4 GHz ( GHz ) (dielectric loss) (dielectric constant) PCB
2 (Crosstalk) ground guard/shunt traces
3
(output impedance) (termination) 4
15 PCB
PCB A A ( Kirchoff current law) B
( ) 16 PCB PCB GHz PC (Server) 40 400MHz ( Rambus)
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(blind/buried vias) mircrovias
build-up
1.Howard W. Johnson
)
PCB
ICT
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64
65
esd ESD
ESD ESD 66 PCB pcb
67
pcb
PCB 68 PCB pcb
69 CONTACT 3000V
LCD 1100V AIR 4000V CPU
ESD 6000V ESD 33MHZ
ICE-1000-4-2
ESD
ESD
LCD PCB
Mentor Graphics 60 Mentor
PCB
BGA PGA COB veribest
Mentor
autoactive RE
COB autoactive RE REROUTE
61
Mentor
PCB
Mentor
62
12
PCb
2.2v 3.3v,5v
( 63 PCB PCB PCB x ICT X
boardstation
RF agilent eesoft Mentor
35
2G
PCB
?
36
PCB
Biblioteka Baidu80MHz
37
LVDS
38
27M,SDRAM
80M-90M
VHF
50%
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39 Topology, 40 routing order.
41 EMI EMI
EMI PCB
42
EMC.
IBIS
SPICE
51
2 FB FB
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EMC
52
FCC EMC
FCC: federal communication commission EMC: electro megnetic compatibility FCC 53 EMC
54 PCB (SI) icx,signalvision,hyperlynx,XTK,speectraquest 55 PCB LAYOUT Hspice
(topology)
( ) (side-by-side) side-by-side 5 (over-under)
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6 , 7
(differential impedance)
,
,
,
(signal integrity)
(timing
delay)
8 1. (moat), , / (returning current path)
Integrity Issues and printed Circuit Board Design
(microstrip)
Z={87/[sqrt(Er+1.41)]}ln[5.98H/(0.8W+T)] Er 0.1<(W/H)<2.0 1<(Er)<15 PCB
W
T (dielectric constant)
stub
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buffer
flash
sdram flash flash
dsp
sdram
Hyperlynx FLASH——DSP 150MHz DSP DSP DDR
DDR——DSP——FLASH
DDR——
FLASH
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Topoverlay ---IC10. bottomoverlay---multilayer----pad 4 4
free pad or via, top layer,
multilay pad
34 2G
2G PCB layout)
PCB
,
,
routing) EDA
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Mentor
LC
ferrite
PCB
1
(slew rate)
2
3
(return current path)
4
5
chassis ground
6
ground guard/shunt traces
guard/shunt
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traces
7 26 / PCB
20H H / /
27 /
/
/
PCB