MCZ33993EW中文资料
MC33035DWG资料
MC33035, NCV33035 Brushless DCMotor ControllerThe MC33035 is a high performance second generation monolithic brushless DC motor controller containing all of the active functions required to implement a full featured open loop, three or four phase motor control system. This device consists of a rotor position decoder for proper commutation sequencing, temperature compensated reference capable of supplying sensor power, frequency programmable sawtooth oscillator, three open collector top drivers, and three high current totem pole bottom drivers ideally suited for driving power MOSFETs.Also included are protective features consisting of undervoltage lockout, cycle−by−cycle current limiting with a selectable time delayed latched shutdown mode, internal thermal shutdown, and a unique fault output that can be interfaced into microprocessor controlled systems.Typical motor control functions include open loop speed, forward or reverse direction, run enable, and dynamic braking. The MC33035 is designed to operate with electrical sensor phasings of 60°/300° or 120°/240°, and can also efficiently control brush DC motors. Features•10 to 30 V Operation•Undervoltage Lockout•6.25 V Reference Capable of Supplying Sensor Power •Fully Accessible Error Amplifier for Closed Loop Servo Applications•High Current Drivers Can Control External 3−Phase MOSFET Bridge•Cycle−By−Cycle Current Limiting•Pinned−Out Current Sense Reference•Internal Thermal Shutdown•Selectable 60°/300° or 120°/240° Sensor Phasings•Can Efficiently Control Brush DC Motors with External MOSFET H−Bridge•NCV Prefix for Automotive and Other Applications Requiring Site and Control Changes•Pb−Free Packages are Available241P SUFFIXPLASTIC PACKAGECASE 724DW SUFFIXPLASTIC PACKAGECASE 751E(SO−24L)See detailed ordering and shipping information in the package dimensions section on page 27 of this data sheet.ORDERING INFORMATIONSee general marking information in the device marking section on page 27 of this data sheet.DEVICE MARKING INFORMATIONRepresentative Schematic DiagramThis device contains 285 active transistors.MAXIMUM RATINGSRating Symbol Value Unit Power Supply Voltage V CC40V Digital Inputs (Pins 3, 4, 5, 6, 22, 23)−V ref V Oscillator Input Current (Source or Sink)I OSC30mA Error Amp Input Voltage Range (Pins 11, 12, Note 1)V IR−0.3 to V ref V Error Amp Output Current (Source or Sink, Note 2)I Out10mA Current Sense Input Voltage Range (Pins 9, 15)V Sense−0.3 to 5.0V Fault Output Voltage V CE(Fault)20V Fault Output Sink Current I Sink(Fault)20mA Top Drive Voltage (Pins 1, 2, 24)V CE(top)40V Top Drive Sink Current (Pins 1, 2, 24)I Sink(top)50mA Bottom Drive Supply Voltage (Pin 18)V C30V Bottom Drive Output Current (Source or Sink, Pins 19, 20, 21)I DRV100mA Power Dissipation and Thermal CharacteristicsP Suffix, Dual In Line, Case 724Maximum Power Dissipation @ T A = 85°C Thermal Resistance, Junction−to−AirDW Suffix, Surface Mount, Case 751E Maximum Power Dissipation @ T A = 85°C Thermal Resistance, Junction−to−AirP DRθJAP DRθJA86775650100mW°C/WmW°C/WOperating Junction Temperature T J150°COperating Ambient Temperature Range (Note 3)MC33035NCV33035T A−40 to +85−40 to +125°CStorage Temperature Range T stg−65 to +150°C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.ELECTRICAL CHARACTERISTICS(V CC = V C = 20 V, R T = 4.7 k, C T = 10 nF, T A = 25°C, unless otherwise noted.)Characteristic Symbol Min Typ Max Unit REFERENCE SECTIONReference Output Voltage (I ref = 1.0 mA) T A = 25°C(Note 4)V ref5.95.826.24−6.56.57VLine Regulation (V CC = 10 to 30 V, I ref = 1.0 mA)Reg line− 1.530mV Load Regulation (I ref = 1.0 to 20 mA)Reg load−1630mV Output Short Circuit Current (Note 5)I SC4075−mA Reference Under Voltage Lockout Threshold V th 4.0 4.5 5.0V ERROR AMPLIFIERInput Offset Voltage (Note 4)V IO−0.410mV Input Offset Current (Note 4)I IO−8.0500nA Input Bias Current (Note 4)I IB−−46−1000nA Input Common Mode Voltage Range V ICR(0 V to V ref)V Open Loop Voltage Gain (V O = 3.0 V, R L = 15 k)A VOL7080−dB Input Common Mode Rejection Ratio CMRR5586−dB Power Supply Rejection Ratio (V CC = V C = 10 to 30 V)PSRR65105−dB1.The input common mode voltage or input signal voltage should not be allowed to go negative by more than 0.3 V.2.The compliance voltage must not exceed the range of −0.3 to V ref.3.NCV33035: T low = −40°C, T high = 125°C. Guaranteed by design. NCV prefix is for automotive and other applications requiring site and changecontrol.4.MC33035: T A = −40°C to +85°C; NCV33035: T A = −40°C to +125°C.5.Maximum package power dissipation limits must be observed.ELECTRICAL CHARACTERISTICS (continued) (V CC = V C = 20 V, R T = 4.7 k, C T = 10 nF, T A = 25°C, unless otherwise noted.) Characteristic Symbol Min Typ Max Unit ERROR AMPLIFIEROutput Voltage SwingHigh State (R L = 15 k to Gnd) Low State (R L = 15 k to V ref)V OHV OL4.6−5.30.5−1.0VOSCILLATOR SECTIONOscillator Frequency f OSC222528kHz Frequency Change with Voltage (V CC = 10 to 30 V)Δf OSC/ΔV−0.01 5.0% Sawtooth Peak Voltage V OSC(P)− 4.1 4.5V Sawtooth Valley Voltage V OSC(V) 1.2 1.5−V LOGIC INPUTSInput Threshold Voltage (Pins 3, 4, 5, 6, 7, 22, 23)High State Low State V IHV IL3.0−2.21.7−0.8VSensor Inputs (Pins 4, 5, 6)High State Input Current (V IH = 5.0 V) Low State Input Current (V IL = 0 V)I IHI IL−150−600−70−337−20−150μAForward/Reverse, 60°/120° Select (Pins 3, 22, 23)High State Input Current (V IH = 5.0 V) Low State Input Current (V IL = 0 V)I IHI IL−75−300−36−175−10−75μAOutput EnableHigh State Input Current (V IH = 5.0 V) Low State Input Current (V IL = 0 V)I IHI IL−60−60−29−29−10−10μACURRENT−LIMIT COMPARATORThreshold Voltage V th85101115mV Input Common Mode Voltage Range V ICR− 3.0−V Input Bias Current I IB−−0.9−5.0μA OUTPUTS AND POWER SECTIONSTop Drive Output Sink Saturation (I sink = 25 mA)V CE(sat)−0.5 1.5V Top Drive Output Off−State Leakage (V CE = 30 V)I DRV(leak)−0.06100μA Top Drive Output Switching Time (C L = 47 pF, R L = 1.0 k)ns Rise Time t r−107300Fall Time t f−26300Bottom Drive Output VoltageHigh State (V CC = 20 V, V C = 30 V, I source = 50 mA) Low State (V CC = 20 V, V C = 30 V, I sink = 50 mA)V OHV OL(V CC−2.0)−(V CC−1.1)1.5−2.0VBottom Drive Output Switching Time (C L = 1000 pF)ns Rise Time t r−38200Fall Time t f−30200Fault Output Sink Saturation (I sink = 16 mA)V CE(sat)−225500mV Fault Output Off−State Leakage (V CE = 20 V)I FLT(leak)− 1.0100μA Under Voltage Lockout V Drive Output Enabled (V CC or V C Increasing)V th(on)8.28.910Hysteresis V H0.10.20.3Power Supply CurrentPin 17 (V CC = V C = 20 V)Pin 17 (V CC = 20 V, V C = 30 V) Pin 18 (V CC = V C = 20 V)Pin 18 (V CC = 20 V, V C = 30 V)I CCI C−−−−12143.55.016206.010mAV s a t , O U T P U T S A T U R A T I O N V O L T A G E (V )5.0 μs/DIVA V = +1.0No Load T A = 25°C, O U T P U T V O L T A G E (V )O 4.53.01.51.0 μs/DIV A V = +1.0No Load T A = 25°C3.053.02.95I O , OUTPUT LOAD CURRENT (mA)f, FREQUENCY (Hz)562202001801601401201008060−−16−08.0162432404840240A V O L , O P E N L O O P V O L T A G E G A I N (d B )E X C E S S P H A S E (D E G R E E S ),φT A , AMBIENT TEMPERATURE (°C)−55−4.0−2.02.01254.01007550250−25f O S C O S C I L L A T O R F R E Q U E N C Y C H A N G E (%),Δ1001.0R T , TIMING RESISTOR (k Ω)100010010010f O S C O S C I L L A T O R F R E Q U E N C Y (k H z ),Figure 1. Oscillator Frequency versusTiming Resistor Figure 2. Oscillator Frequency Changeversus TemperatureFigure 3. Error Amp Open Loop Gain andPhase versus Frequency Figure 4. Error Amp Output SaturationVoltage versus Load CurrentFigure 5. Error Amp Small−SignalTransient Response Figure 6. Error Amp Large−SignalTransient Response1.02.00− 0.8−1.61.60.8 5.04.03.00V , O U T P U T V O L T A G E (V )O VI Sink , SINK CURRENT (mA)0−40−20−4020, N O R M A L I Z E D R E F E R E N C E V O L T A G E C H A N G E (m V )ΔV r e f 0−−−−− 12− 16V r e f , R E F E R E N C E O U T P U T V O L T A G E C H A N G E (m V )ΔFigure 11. Bottom Drive Response Time versusCurrent Sense Input Voltage Figure 12. Fault Output Saturationversus Sink Current0CURRENT SENSE INPUT VOLTAGE (NORMALIZED TO V th )50100150200250t H L , B O T T O M D R I V E R E S P O N S E T I M E (n s )1.0O U T P U T V O L T A G E (%)−40I O , OUTPUT LOAD CURRENT (mA)02.0806020, O U T P U T S A T U R A T I O N V O L T A G E (V )s a t V 50 ns/DIV V CC = 20 V V C = 20 V C L = 1.0 nF T A = 25°C100 ns/DIVV CC = 20 V V C = 20 V R L = 1.0 k C L = 15 pF T A = 25°CFigure 13. Top Drive Output SaturationVoltage versus Sink CurrentFigure 14. Top Drive Output WaveformFigure 15. Bottom Drive Output Waveform Figure 16. Bottom Drive Output WaveformI Sink , SINK CURRENT (mA)0.40.81.2V s a t , O U T P U T S A T U R A T I O N V O L T A G E (V )Figure 17. Bottom Drive Output SaturationVoltage versus Load Current 50 ns/DIVV CC = 20 V V C = 20 V C L = 15 pF T A= 25°CFigure 18. Power and Bottom Drive SupplyCurrent versus Supply Voltage, P O W E R S U P P L Y C U R R E N T (m A )C C , I C I V CC , SUPPLY VOLTAGE (V)1000100100O U T P U T V O L T A G E (%)O U T P U T V O L T A G E (%)PIN FUNCTION DESCRIPTIONPin Symbol Description1, 2, 24B T, A T, C T These three open collector Top Drive outputs are designed to drive the externalupper power switch transistors.3Fwd/Rev The Forward/Reverse Input is used to change the direction of motor rotation. 4, 5, 6S A, S B, S C These three Sensor Inputs control the commutation sequence.7Output Enable A logic high at this input causes the motor to run, while a low causes it to coast.8Reference Output This output provides charging current for the oscillator timing capacitor C T and areference for the error amplifier. It may also serve to furnish sensor power.9Current Sense Noninverting Input A 100 mV signal, with respect to Pin 15, at this input terminates output switchconduction during a given oscillator cycle. This pin normally connects to the topside of the current sense resistor.10Oscillator The Oscillator frequency is programmed by the values selected for the timingcomponents, R T and C T.11Error Amp Noninverting Input This input is normally connected to the speed set potentiometer.12Error Amp Inverting Input This input is normally connected to the Error Amp Output in open loopapplications.13Error Amp Out/PWM Input This pin is available for compensation in closed loop applications.14Fault Output This open collector output is active low during one or more of the followingconditions: Invalid Sensor Input code, Enable Input at logic 0, Current SenseInput greater than 100 mV (Pin 9 with respect to Pin 15), Undervoltage Lockoutactivation, and Thermal Shutdown.15Current Sense Inverting Input Reference pin for internal 100 mV threshold. This pin is normally connected tothe bottom side of the current sense resistor.16Gnd This pin supplies a ground for the control circuit and should be referenced backto the power source ground.17V CC This pin is the positive supply of the control IC. The controller is functional over aminimum V CC range of 10 to 30 V.18V C The high state (V OH) of the Bottom Drive Outputs is set by the voltage applied tothis pin. The controller is operational over a minimum V C range of 10 to 30 V. 19, 20, 21C B, B B, A B These three totem pole Bottom Drive Outputs are designed for direct drive of theexternal bottom power switch transistors.2260°/120° Select The electrical state of this pin configures the control circuit operation for either60° (high state) or 120°(low state) sensor electrical phasing inputs.23Brake A logic low state at this input allows the motor to run, while a high state does notallow motor operation and if operating causes rapid deceleration.INTRODUCTIONThe MC33035 is one of a series of high performance monolithic DC brushless motor controllers produced by Motorola. It contains all of the functions required to implement a full−featured, open loop, three or four phase motor control system. In addition, the controller can be made to operate DC brush motors. Constructed with Bipolar Analog technology, it offers a high degree of performance and ruggedness in hostile industrial environments. The MC33035 contains a rotor position decoder for proper commutation sequencing, a temperature compensated reference capable of supplying a sensor power, a frequency programmable sawtooth oscillator, a fully accessible error amplifier, a pulse width modulator comparator, three open collector top drive outputs, and three high current totem pole bottom driver outputs ideally suited for driving power MOSFETs. Included in the MC33035 are protective features consisting of undervoltage lockout, cycle−by−cycle current limiting with a selectable time delayed latched shutdown mode, internal thermal shutdown, and a unique fault output that can easily be interfaced to a microprocessor controller. Typical motor control functions include open loop speed control, forward or reverse rotation, run enable, and dynamic braking. In addition, the MC33035 has a 60°/120°select pin which configures the rotor position decoder for either 60° or 120° sensor electrical phasing inputs. FUNCTIONAL DESCRIPTIONA representative internal block diagram is shown in Figure 19 with various applications shown in Figures 36, 38, 39, 43, 45, and 46. A discussion of the features and function of each of the internal blocks given below is referenced to Figures 19 and 36.Rotor Position DecoderAn internal rotor position decoder monitors the three sensor inputs (Pins 4, 5, 6) to provide the proper sequencing of the top and bottom drive outputs. The sensor inputs are designed to interface directly with open collector type Hall Effect switches or opto slotted couplers. Internal pull−up resistors are included to minimize the required number of external components. The inputs are TTL compatible, with their thresholds typically at 2.2 V. The MC33035 series is designed to control three phase motors and operate with four of the most common conventions of sensor phasing. A 60°/120°Select (Pin 22) is conveniently provided and affords the MC33035 to configure itself to control motors having either 60°, 120°, 240° or 300° electrical sensor phasing. With three sensor inputs there are eight possible input code combinations, six of which are valid rotor positions. The remaining two codes are invalid and are usually caused by an open or shorted sensor line. With six valid input codes, the decoder can resolve the motor rotor position to within a window of 60 electrical degrees.The Forward/Reverse input (Pin 3) is used to change the direction of motor rotation by reversing the voltage across the stator winding. When the input changes state, from high to low with a given sensor input code (for example 100), the enabled top and bottom drive outputs with the same alpha designation are exchanged (A T to A B, B T to B B, C T to C B). In effect, the commutation sequence is reversed and the motor changes directional rotation.Motor on/off control is accomplished by the Output Enable (Pin 7). When left disconnected, an internal 25 μA current source enables sequencing of the top and bottom drive outputs. When grounded, the top drive outputs turn off and the bottom drives are forced low, causing the motor to coast and the Fault output to activate.Dynamic motor braking allows an additional margin of safety to be designed into the final product. Braking is accomplished by placing the Brake Input (Pin 23) in a high state. This causes the top drive outputs to turn off and the bottom drives to turn on, shorting the motor−generated back EMF. The brake input has unconditional priority over all other inputs. The internal 40 kΩ pull−up resistor simplifies interfacing with the system safety−switch by insuring brake activation if opened or disconnected. The commutation logic truth table is shown in Figure 20. A four input NOR gate is used to monitor the brake input and the inputs to the three top drive output transistors. Its purpose is to disable braking until the top drive outputs attain a high state. This helps to prevent simultaneous conduction of the the top and bottom power switches. In half wave motor drive applications, the top drive outputs are not required and are normally left disconnected. Under these conditions braking will still be accomplished since the NOR gate senses the base voltage to the top drive output transistors.Error AmplifierA high performance, fully compensated error amplifier with access to both inputs and output (Pins 11, 12, 13) is provided to facilitate the implementation of closed loop motor speed control. The amplifier features a typical DC voltage gain of 80 dB, 0.6 MHz gain bandwidth, and a wide input common mode voltage range that extends from ground to V ref. In most open loop speed control applications, the amplifier is configured as a unity gain voltage follower with the noninverting input connected to the speed set voltage source. Additional configurations are shown in Figures 31 through 35.OscillatorThe frequency of the internal ramp oscillator is programmed by the values selected for timing components R T and C T. Capacitor C T is charged from the Reference Output (Pin 8) through resistor R T and discharged by an internal discharge transistor. The ramp peak and valley voltages are typically 4.1 V and 1.5 V respectively. To provide a good compromise between audible noise and output switching efficiency, an oscillator frequency in the range of 20 to 30 kHz is recommended. Refer to Figure 1 for component selection.Figure 19. Representative Block DiagramInputs (Note 2)Outputs(Note 3) Sensor Electrical Phasing (Note 4)Top Drives Bottom DrivesS A 60°S B S C S A120°S B S C F/R Enable BrakeCurrentSense A T B T C T A B B B C B Fault1 1 1 0 0 00111111111111111111111111111111111111111111111111111(Note 5)F/R = 11 1 1 0 0 00111111111111111111111111111111111111111111111(Note 5)F/R = 01 0011111XXXXXX111111(Note 6)Brake = 01 0011111XXXX11XX111111111111(Note 7)Brake = 1V V V V V V X11X1111111(Note 8) V V V V V V X01X1111110(Note 9) V V V V V V X00X1110000(Note 10)V V V V V V X1011110000(Note 11) NOTES:1.V = Any one of six valid sensor or drive combinations X = Don’t care.2.The digital inputs (Pins 3, 4, 5, 6, 7, 22, 23) are all TTL compatible. The current sense input (Pin 9) has a 100 mV threshold with respect to Pin 15.A logic 0 for this input is defined as < 85 mV, and a logic 1 is > 115 mV.3.The fault and top drive outputs are open collector design and active in the low (0) state.4.With 60°/120°select (Pin 22) in the high (1) state, configuration is for 60°sensor electrical phasing inputs. With Pin 22 in low (0) state, configurationis for 120° sensor electrical phasing inputs.5.Valid 60° or 120° sensor combinations for corresponding valid top and bottom drive outputs.6.Invalid sensor inputs with brake = 0; All top and bottom drives off, Fault low.7.Invalid sensor inputs with brake = 1; All top drives off, all bottom drives on, Fault low.8.Valid 60° or 120°sensor inputs with brake = 1; All top drives off, all bottom drives on, Fault high.9.Valid sensor inputs with brake = 1 and enable = 0; All top drives off, all bottom drives on, Fault low.10.Valid sensor inputs with brake = 0 and enable = 0; All top and bottom drives off, Fault low.11.All bottom drives off, Fault low.Figure 20. Three Phase, Six Step Commutation Truth Table (Note 1)Pulse Width ModulatorThe use of pulse width modulation provides an energy efficient method of controlling the motor speed by varying the average voltage applied to each stator winding during the commutation sequence. As C T discharges, the oscillator sets both latches, allowing conduction of the top and bottom drive outputs. The PWM comparator resets the upper latch, terminating the bottom drive output conduction when the positive−going ramp of C T becomes greater than the error amplifier output. The pulse width modulator timing diagram is shown in Figure 21. Pulse width modulation for speed control appears only at the bottom drive outputs.Current LimitContinuous operation of a motor that is severely over−loaded results in overheating and eventual failure. This destructive condition can best be prevented with the use of cycle−by−cycle current limiting. That is, each on−cycle is treated as a separate event. Cycle−by−cycle current limiting is accomplished by monitoring the stator current build−up each time an output switch conducts, and upon sensing an over current condition, immediately turning off the switch and holding it off for the remaining duration of oscillator ramp−up period. The stator current is converted to a voltage by inserting a ground−referenced sense resistor R S (Figure 36) in series with the three bottom switch transistors (Q4, Q5, Q6). The voltage developed across the sense resistor is monitored by the Current Sense Input (Pins 9 and 15), and compared to the internal 100 mV reference. The current sense comparator inputs have an input common mode range of approximately 3.0 V. If the 100 mV current sense threshold is exceeded, the comparator resets the lower sense latch and terminates output switch conduction. The value for the current sense resistor is:R S+0.1I stator(max)The Fault output activates during an over current condition. The dual−latch PWM configuration ensures that only one single output conduction pulse occurs during any given oscillator cycle, whether terminated by the output of the error amp or the current limit comparator.Figure 21. Pulse Width Modulator Timing Diagram Current Sense Input Capacitor C T Error Amp Out/PWMInput Latch Set"Inputs Top Drive Outputs Bottom DriveOutputsFault OutputReferenceThe on−chip 6.25 V regulator (Pin 8) provides charging current for the oscillator timing capacitor, a reference for the error amplifier, and can supply 20 mA of current suitable for directly powering sensors in low voltage applications. In higher voltage applications, it may become necessary to transfer the power dissipated by the regulator off the IC. This is easily accomplished with the addition of an external pass transistor as shown in Figure 22. A 6.25 V reference level was chosen to allow implementation of the simpler NPN circuit, where V ref − V BE exceeds the minimum voltage required by Hall Effect sensors over temperature. With proper transistor selection and adequate heatsinking, up to one amp of load current can be obtained.Figure 22. Reference Output BuffersThe NPN circuit is recommended for powering Hall or opto sensors, where the output voltage temperature coefficient is not critical. The PNP circuit is slightly more complex, but is also more accurate over temperature. Neither circuit has current limiting.V V and Sensor Power6.25 VUndervoltage LockoutA triple Undervoltage Lockout has been incorporated to prevent damage to the IC and the external power switch transistors. Under low power supply conditions, it guarantees that the IC and sensors are fully functional, and that there is sufficient bottom drive output voltage. The positive power supplies to the IC (V CC ) and the bottom drives (V C ) are each monitored by separate comparators that have their thresholds at 9.1 V . This level ensures sufficient gate drive necessary to attain low R DS(on) when driving standard power MOSFET devices. When directly powering the Hall sensors from the reference, improper sensor operation can result if the reference output voltage falls below 4.5 V . A third comparator is used to detect this condition. If one or more of the comparators detects an undervoltage condition, the Fault Output is activated, the top drives are turned off and the bottom drive outputs are held in a low state. Each of the comparators contain hysteresis to prevent oscillations when crossing their respective thresholds.Fault OutputThe open collector Fault Output (Pin 14) was designed to provide diagnostic information in the event of a system malfunction. It has a sink current capability of 16 mA and can directly drive a light emitting diode for visual indication.Additionally, it is easily interfaced with TTL/CMOS logic for use in a microprocessor controlled system. The Fault Output is active low when one or more of the following conditions occur:1)Invalid Sensor Input code 2)Output Enable at logic [0]3)Current Sense Input greater than 100 mV4)Undervoltage Lockout, activation of one or more of the comparators5)Thermal Shutdown, maximum junction temperature being exceededThis unique output can also be used to distinguish between motor start−up or sustained operation in an overloaded condition. With the addition of an RC network between the Fault Output and the enable input, it is possible to create a time−delayed latched shutdown for overcurrent. The added circuitry shown in Figure 23 makes easy starting of motor systems which have high inertial loads by providing additional starting torque, while still preserving overcurrent protection. This task is accomplished by setting the current limit to a higher than nominal value for a predetermined time.During an excessively long overcurrent condition, capacitor C DLY will charge, causing the enable input to cross its threshold to a low state. A latch is then formed by the positive feedback loop from the Fault Output to the Output Enable.Once set, by the Current Sense Input, it can only be reset by shorting C DLY or cycling the power supplies.Drive OutputsThe three top drive outputs (Pins 1, 2, 24) are open collector NPN transistors capable of sinking 50 mA with a minimum breakdown of 30 V. Interfacing into higher voltage applications is easily accomplished with the circuits shown in Figures 24 and 25.The three totem pole bottom drive outputs (Pins 19, 20, 21) are particularly suited for direct drive of N−Channel MOSFETs or NPN bipolar transistors (Figures 26, 27, 28 and 29). Each output is capable of sourcing and sinking up to 100 mA. Power for the bottom drives is supplied from V C (Pin 18). This separate supply input allows the designer added flexibility in tailoring the drive voltage, independent of V CC. A zener clamp should be connected to this input when driving power MOSFETs in systems where V CC is greater than 20 V so as to prevent rupture of the MOSFET gates.The control circuitry ground (Pin 16) and current sense inverting input (Pin 15) must return on separate paths to the central input source ground.Thermal ShutdownInternal thermal shutdown circuitry is provided to protect the IC in the event the maximum junction temperature is exceeded. When activated, typically at 170°C, the IC acts as though the Output Enable was grounded.Figure 23. Timed Delayed Latched Over Current ShutdownFigure 24. High Voltage Interface withNPN Power TransistorsTransistor Q1 is a common base stage used to level shift from V CC to the high motor voltage, V M. The collector diode is required if V CC is present while V M is low.[R DLY C DLY Inǒ6.25–(20x10–6R DLY)1.4–(20x10R DLY)Ǔ。
MC33991中文资料
摘要：MC33991是Motorola公司生产的两相步进电机驱动器，可以准确地控制步进电机的运动并及时反馈步时电机的工作状态。
该电路有良好的抗干扰能力，可以灵活地控制驱动步时电机，是汽车电子设备特别是汽车仪表中的理想驱动器。
关键词：步时电动机驱动器SPIMC33991汽车仪表1MC33991的主要特点MC33991是单独封装、通过SPI（同步串行外设接口）进行通信、可同时控制二个步进电机的驱动电路。
该电路由4个可驱动线圈的功率H桥和辅助逻辑控制器组成。
每组H桥的驱动可用来控制步时电机的速度、旋转方向及每相线圈中电流的大小。
MC33991有良好的抗干扰能力，可以十分灵活地驱动步进电机,因此是汽车电子设备特别是汽车仪表的理想驱动器。
只要做一些外围设备的改进，该电路也可以仿照气隙磁通的运行，把普通电机转化为步进电机来控制。
MC33991的特性如下：•最小的上层处理器（不需其他外设即可直接驱动电机）；•仿效普通电机的运动进行控制，使电机有完美的动态和静态性能；•有4096个静态指示位置；•最大指针扫过范围为340°；•最大指针速度为400deg/s;•最大指针加速度为4500deg/s2;•应用微步距控制技术（每步细分为12个微步）；•指针回零校准；•有16位SPI；•内部时钟校准;•睡眠模式下的耗电量较小。
内韶晶撮GADMC33991的内部结构框图2结构原理与引脚功能2.1内部结构MC33991的内部结构框图如图1所示，它由PI 、逻辑电路、电压/温度检测及功率H 桥等模块组成。
MC33991主控电路先将驱动命令通过SPI 以串行数据的方式输出，再通过逻辑电路将命令转化成驱动信号以驱动功率H 桥，H 桥输出电流直接驱动步进电机，同时MC33991中的电压/温度等检测模块可以随时检测电机的动转状态，并将检测结果通过SPI 以串行输出方式将数据反馈给主控电路。
2.2引脚功能VnuC5SCL K 5051SP1RST-18T ICOSOt SINOj C0S1匚・»»■＞中国事揃 遵理_!«样|z 章TRTZ压低检过及压测H 桥及-COSO+ -COSO- -SSNO+ SINO COS1+c osi-RTZ SINH SiKl-L24WideBodySOICThermaltyEnhancedleadFramehttpffj^^gstgUdqxomCOS+、COS-、SIN+与SIN-：H 桥输出端。
mc中文资料
低成本开关电源芯片M C34063A （M C33063）中文资料该器件本身包含了DC／DC变换器所需要的主要功能的单片控制电路且价格便宜。
它由具有温度自动补偿功能的基准电压发生器、比较器、占空比可控的振荡器，R—S触发器和大电流输出开关电路等组成。
该器件可用于升压变换器、降压变换器、反向器的控制核心，由它构成的DC／DC变换器仅用少量的外部元器件。
在各类电子产品中均非常广泛的应用.MC34063主要特性:输入电压范围：2、5～40V输出电压可调范围：1．25～40V最大输出电流：1．5A最大开关频率：100kHz低静态电流短路电流限制可实现升压或降压电源变换器MC34063的内部结构,引脚图及引脚功能：图1MC34063内部结构及引脚图1脚：开关管T1集电极引出端；2脚：开关管T1发射极引出端；3脚：定时电容ct接线端；调节ct可使工作频率在100—100kHz范围内变化；4脚：电源地；5脚：电压比较器反相输入端，同时也是输出电压取样端；使用时应外接两个精度不低于1％的精密电阻；6脚：电源端；7脚：负载峰值电流（Ipk）取样端；6，7脚之间电压超过300mV时，芯片将启动内部过流保护功能；8脚：驱动管T2集电极引出端。
MC34063A在线电源计算器-OnlinePowercalculationMC34063主要参数：项目条件参数单位PowerSupplyVoltage电源电压VCC40VdcComparatorInputVoltageRange比较器输入电压范围VIR0.3-+40VdcSwitchCollectorVoltage集电极电压开关VC(switch)40VdcSwitchEmitterVoltage(VPin1=40V)发射极电压开关VE(switch)40VdcSwitchCollectortoEmitterVoltage开关电压集电极到发射极VCE(switch)40VdcDriverCollectorVoltage驱动集电极电压VC(driver)40VdcDriverCollectorCurrent(Note1)驱动集电极电流IC(driver)100mASwitchCurrent开关电流ISW1.5AOperatingJunctionTemperature工作结温TJ+150℃OperatingAmbientTemperatureRange操作环境温度范围TAMC34063A0-70℃MC33063AV40-125MC33063A40-85StorageTemperatureRange储存温度范围Tstg65-150℃MC34063应用电路图图2MC34063电压逆变器图3MC34063降压电路图4NPN三极管扩流升压转换器图5NPN三极管扩流降压转换器图6 升压转换器MC34063的工作原理MC34063组成的降压电路MC34063组成的降压电路原理如图7。
丹东华奥电子 LD33035 无刷直流电机控制器说明书
丹东华奥电子有限公司简介LD33035（替代MC33035）是一种高性能的第二代单片无刷直流电机控制器。
用于三相或四相电机控制系统，可以实现全开环的全部动力控制功能。
功能包括：1、准确转动位置测序的转子译码器；2、参考与电源电压传感器的温度补偿；3、可预设频率的锯齿波振荡器；4、上部的三个集电极开路驱动器；5、下部的三个用于驱动功率场效应管MOSFET 的大电流图腾柱电路。
保护功能包括：1、欠压锁定；2、可预设关断延迟时间的逐周期电流限制模式；3、内部热关断；4、可以连接到微处理器控制系统的故障输出端口。
电机控制功能包括：1、开环时间控制；2、正、反向运行控制；3、可控的启用和制动。
LD33035设计用于运行角度为60°/300°或120°/240°的电相位传感器，也可以有效地控制直流无刷电动机。
特点管脚图●工作电压10~30V ●欠压锁定●6.25V 的参考电源电压传感器●闭环伺服应用的全接近误差放大器●可以大电流驱动控制外部的三个相位MOSFET 桥●逐周期电流限制●可外部设定电流检测基准●内置热关断●可选的60°/300°或120°/240°相位传感器●能有效控制外部无刷直流电机的H 桥MOSFET系列信息封装说明SOP24L （W ）管装，编带，无铅DIP24管装，无铅直流无刷电机控制器管脚功能描述丹东华奥电子有限公司功能示意图丹东华奥电子有限公司极限参数丹东华奥电子有限公司电参数(V CC=V C=20V，R T=4.7k，C T=10nF，T A=25℃，除非另外说明)丹东华奥电子有限公司CC C T T A注：1、输入共模电压或输入信号电压不应超过-0.3V。
2、调节电压不得超过−0.3至V REF范围。
丹东华奥电子有限公司介绍LD33035（替代MC33035）是一种单片的直流无刷电机控制器，它包含了开环控制的三、四相电机控制系统所需的全部功能。
RK3399W_V1.0 硬件规格书V_.0712
RK3399W V1.0智能工控主板之阿布丰王创作规格书文档修改历史目录第一章产品概述31.1适用范围31.2产品概述31.3产品特点31.4外观及接口示意图4第二章基本功能列表6第三章 PCB尺寸和接口规划83.1PCB尺寸图83.2接口参数说明9第四章电气性能20第五章组装使用注意事项21第一章产品概述1.1 RK3399W适用范围RK3399W属于商显智能自助终端主板，普遍适用于：互动广告机、互动数字标牌、智能自助终端、智能零售终端、O2O智能设备、工控主机、机器人设备等。
1.2 产品概述RK3399W采取瑞芯微RK3399 （双CortexA72大核+四 CortexA53小核）六核64位超强CPU，搭载Android7.1系统，主频高达2 GHz。
采取MaliT860MP4 GPU，支持4K、H.265硬解码。
多路视频输出和输入，性能更强，速度更快，接口更丰富，是您在人机交互、智能终端、工控项目上的最佳选择。
1.3 产品特点◆RK3399超强CPU搭载Android 7.1系统，速度更快，性能更强。
◆支持5G和2.4GWIFI,独立双天线。
◆双网口设计，支持1000M网口+100M网口。
◆内置PCIE 3G/4G模块接口.支持华为、中兴、龙尚等多种PCIE3G/4G模块,支持上网和通话.◆丰富的扩展接口.6个USB接口(1路USB3.0 OTG，1路USB Host 1路+3路HUB，1路TYPE C),1路485接口，4路可扩展串口（2路TTL，2路RS232）,GPIO及ADC接口，可以满足市场上各种外设的要求。
◆高清晰度。
最大支持3840x2160的4K解码，支持LVDS/eDP/HDMIOUT/HDMI IN等接口的LCD显示屏、裁剪屏，支持双屏异显.◆支持Android系统定制，提供系统调用接口API 参考代码，完美支持客户上层应用APP开发。
◆完美支持红外、光学、电容、电阻、触摸膜等多种主流触摸屏，支持免驱触摸屏的HID配置，无需调试。
MCZ33996EK资料
VPWR SOPWR
VIN VD
fSPI
ECLAMP
VESD1 VESD2
TA TJ TC TSTG PD TPPRT
RθJA RθJL RθJC
-1.5 to 50 -0.3 to 7.0 -0.3 to 7.0 -0.3 to 45
6.0 50
±2000 ±200
-40 to 125 -40 to 150 -40 to 125 -55 to 150
MC33996EK/R2 MCZ33996EK/R2
Temperature Range (TA)
Package
-40°C to 125°C 32 SOICW-EP
Vdd
3.3 V/5.0 V
VPWR
VBAT
33996
VDD
MCU
SCLK CS
MISO MOSI PWM
RST
SOPWR
VPWR
SCLK CS SI SO PWM RST
Output 0 – Output 15
SOPWR Supply Battery Input
Ground System Clock
Chip Select Serial Input Serial Output
Reset PWM Control
Open drain output pin.
Power supply pin to the SO output driver. Battery supply input pin. Ground for logic, analog, and power output devices. System Clock for internal shift registers of the 33996. SPI control chip select input pin from the MCU to the 33996. Serial data input pin to the 33996. Serial data output pin. Active low reset input pin. PWM control input pin. Supports PWM on any combination of outputs.
莫萨 MC-3201 系列迷你计算机用户指南说明书
MC-3201SeriesCompact computers with 11th Gen Intel®Core™processor,designed for IIoT,AI,and marine applications,-20to 55°C operating temperatureFeatures and Benefits•11th Gen Intel®Core™processor (Tiger Lake U)•2built-in DDR4memory slots;total capacity up to 32GB•M.2B key socket for 5G,GPS,and M.2SATA SSD expansion modules •M.2E key socket for Wi-Fi and BT expansion modules•Variety of interfaces:2serial ports,4Giga LAN ports,2USB 3.1(type A)ports,and 4USB 2.0(type A)ports•Built-in TPM 2.0module•Complies with IEC-60945and IACS E10standardsCertificationsIntroductionThe MC-3201Series computers are built around a 11th Gen Intel®Celeron®or Intel®Core™i3,i5,or i7processor and come with 2DisplayPort interfaces,2USB 3.1ports,4GbE ports,and 23-in-1RS-232/422/485serial ports.The computers are also equipped with a 2.5-inch SSD/HDD slot and a built-in TPM 2.0module.Additional value and convenience are provided through a modular design with two independent slots for flexible system integration and ers have the option to add a variety of different communications modules,including Wi-Fi,5G,LTE,GPS,and M.2SATA SSD expansion modules.Compliance with the IEC-60945and IACS E10standards ensures the MC-3201delivers stable and reliable system operations for marine and IIoT applications.These certifications are issued to indicate the suitability of product for use in marine applications.Proactive Monitoring FunctionMoxa Proactive Monitoring is a small-footprint,resource-friendly,easy-to-use utility available with some Moxa computers to track a number of system parameters.You can view the current values for key parts by simply clicking on the icons corresponding to the parameters in a Windows-based user er-defined key part indicators (KPIs)are used to monitor the computer’s key parts.Visible and/or audio alerts are triggered automatically via relays and SNMP traps when these KPIs exceed their preset threshold values,making it extremely convenient for operators to avoid system downtime by setting up predictive maintenance tasks well in advance.The Proactive Monitoring tool is currently available with DA-720Series,DA-820C Series,MC-1200Series,MC-3201Series,and MC-7400Series.AppearanceFront Panel(S-S models)Front Panel(M-S models)SpecificationsComputerCPU MC-3201-TGL7-M-S/S-S Models:Intel®Core™i7-1185G7E processor(12M Cache,upto1.8GHz)MC-3201-TGL5-M-S/S-S Models:Intel®Core™i5-1145G7E processor(8M Cache,upto1.5GHz)MC-3201-TGL3-M-S/S-S Models:Intel®Core™i3-1115G4E processor(6M Cache,upto2.2GHz)MC-3201-TGL1-M-S/S-S Models:Intel®Celeron®6305E processor(4M Cache,up to1.8GHz)Graphics Controller Intel®Iris®Xe GraphicsSystem Memory Pre-installed8GB DDR4System Memory Slot SODIMM DDR42133slot x2,up to32GB max.Supported OS Linux Debian11,64-bit,kernel5.10Windows10Embedded IoT Ent2019LTSC64-bit(Both optional,available via CTOS)Storage Slot External:2.5-inch HDD/SSD slots x1Internal:M.2B key socket x1mPCIe socket x1Computer InterfaceEthernet Ports Auto-sensing10/100/1000Mbps ports(RJ45connector)x4Serial Ports RS-232/422/485ports x2,software selectable(DB9male)Digital Input M-S Models:DIs x4Digital Output M-S Models:DOs x4USB3.0USB3.0hosts x2,type-A connectorsUSB2.0USB2.0hosts x4,type-A connectors Video Output DisplayPort x2up to3840x2160resolution at60Hz Audio Input/Output Line in x1,Line out x1,3.5mm phone jack Buttons Reset buttonPower buttonTPM TPM v2.0Ethernet InterfaceMagnetic Isolation Protection 1.5kV(built-in)10/100/1000BaseT(X)Ports(RJ45connector)4Serial InterfaceBaudrate50bps to115.2kbpsConnector DB9maleData Bits5,6,7,8Flow Control RTS/CTS,XON/XOFFParity None,Even,Odd,Space,MarkStop Bits1,1.5,2ESD Protection4kV contact,8kV airSerial SignalsRS-485-4w Tx+,Tx-,Rx+,Rx-,GNDRS-422Tx+,Tx-,Rx+,Rx-,GNDRS-232TxD,RxD,RTS,CTS,DTR,DSR,DCD,GND RS-485-2w Data+,Data-,GNDLED IndicatorsSystem Power x1Storage x1Serial2per port(Tx,Rx)LAN2per port(10/100/1000Mbps)Physical CharacteristicsDimensions220x80x170mm(8.66x3.15x6.69in) Weight3,000g(6.61lb)Housing MetalInstallation Wall mountingPower ParametersInput Voltage M-S Models:24VDCS-S Models:9to36VDCEnvironmental LimitsOperating Temperature-20to55°C(-4to131°F)Storage Temperature-30to60°C(-22to140°F)Ambient Relative Humidity5to95%(non-condensing)Standards and CertificationsEMC EN55032/35EMI CISPR32,FCC Part15B Class AEMS IEC61000-4-2ESD:Contact:4kV;Air:8kVIEC61000-4-3RS:80MHz to1GHz:3V/mIEC61000-4-4EFT:Power:0.5kV;Signal:0.5kVIEC61000-4-5Surge:Power:0.5kV,Signal:1kVIEC61000-4-6CS:3VIEC61000-4-8PFMF:1A/m at50to60Hz Safety UL62368-1EN62368-1IEC62368-1IEC60950-1Shock IEC60068-2-27Vibration IEC60068-2-64Maritime M-S Models:IEC60945,IACS E10Green Product RoHS,CRoHS,WEEEMTBFTime323,270hrsStandards Telcordia(Bellcore)Standard TR/SR WarrantyWarranty Period3yearsDetails See /warrantyPackage ContentsDevice1x MC-3201Series computerInstallation Kit1x wall-mounting kitCable1x Power-jack-to-terminal-block cable Documentation1x quick installation guide1x warranty cardDimensionsOrdering InformationModel Name CPU RAMOptional OSStorage(SSD/HDD)LAN/Serial PortsUSB3.0/2.0PortsVideo OuputsInterfaceExpansionMC-3201-TGL7-S-S Intel®Core™i7-1185G7E8GB512GB(max)4/22/42x Display1x mPCIe1x M.2B key1x M.2E keyMC-3201-TGL5-S-S Intel®Core™i5-1145G7E8GB512GB(max)4/22/42x Display1x mPCIe1x M.2B key1x M.2E keyMC-3201-TGL3-S-S Intel®Core™i3-1115G4E8GB512GB(max)4/22/42x Display1x mPCIe1x M.2B key1x M.2E keyMC-3201-TGL1-S-S Intel®Celeron®6305E8GB512GB(max)4/22/42x Display1x mPCIe1x M.2B key1x M.2E keyMC-3201-TGL7-M-S Intel®Core™i7-1185G7E8GB512GB(max)4/22/42x Display1x mPCIe1x M.2B key1x M.2E keyMC-3201-TGL5-M-S Intel®Core™i5-1145G7E8GB512GB(max)4/22/42x Display1x mPCIe1x M.2B key1x M.2E keyMC-3201-TGL3-M-S Intel®Core™i3-1115G4E8GB512GB(max)4/22/42x Display1x mPCIe1x M.2B key1x M.2E keyMC-3201-TGL1-M-S Intel®Celeron®6305E8GB512GB(max)4/22/42x Display1x mPCIe1x M.2B key1x M.2E key©Moxa Inc.All rights reserved.Updated Jul18,2023.This document and any portion thereof may not be reproduced or used in any manner whatsoever without the express written permission of Moxa Inc.Product specifications subject to change without notice.Visit our website for the most up-to-date product information.。
MC33035中文
0.1
0.2
0.3
电源电流
ICC
--
12
16
mA
管脚 17 (VCC = VC = 20 V)
IC
--
14
20 0
管脚 17 ( VCC = 20 V, VC = 30 V)
--
3.5
6.0
管脚 18 ( VCC = VC = 20 V)
--
5.0
10
管脚 18 (VCC = 20 V, VC = 30 V)
ISC
40
75
–
mA
基准欠电压锁定阈值
Vth
4.0
4.5
5.0
V
误差放大器
输入偏移电压 (TA = –40° ~ +85°C)
VIO
--
0.4
10
mV
输入偏移电流 (TA = –40°∼+85°C)
IIO
--
8.0
500
nA
输入偏置电流 (TA = –40° ~ +85°C)
IIB
--
-46
-1000 nA
tHl ,低速驱 动响应 时间
图11，低速驱动响应时间 VS电流感应输入电压
250
VCC=20V
VC=20V
200
RL=∞
CT=10nF
150
TA=25℃
100
50
0 1.0
2.0 3.0 4.0 5.0 6.07.0 10 电流感应输入电压（标称为 Vth)
V sa t,输出饱 和电压 （V）
图12，fault输出饱和电压 VS陷电流
Vsat,输出饱和电压（V)
MC3399中文资料
AUTOMOTIVE HALF–AMP HIGH–SIDE SWITCH
SEMICONDUCTOR TECHNICAL DATA
1 5
• • • • •
Load Currents in Excess of 750 mA Low Quiescent Current Transient Protection Up to ±100 V TTL Compatible Enable Input On–Chip Current Limit and Thermal Shutdown Circuitry
Ignition Output* IL 35 V Transient Generator + – 12 V Input Control Circuit Thermal Sense Current Limit 35 V RL 50 Ω
Ground
NOTE: * Depending on load current and transient duration, an output capacitor (CO) of sufficient value may be used to hold up output voltage during the transient, and absorb turn–off delay voltage overshoot.
MC3399T Ignition Output L O A D
DW SUFFIX PLASTIC PACKAGE CASE 751G SOP(8+8)L
Pin 1. Ignition 2. N.C. 3. N.C. 4. N.C. 5. Ground 6. N.C. 7. Input 8. N.C. 9. Output 10.Output 11. Output 12.Output 13.Output 14.Output 15.Output 16.Output
mc33035
1 MC33035功能介绍MC33035是安森美公司推出的第二代无刷直流电机控制专用集成电路，主要组成部分包括转子位置传感器译码电路、带温度补偿的内部基准电源、频率可设定的锯齿波振荡器、误差放大器、脉宽调制(PWM)比较器、输出驱动电路、欠压封锁保护、芯片过热保护等故障输出电路和限流电路等。
MC33035的典型控制功能包括PWM速度控制、使能控制(启动或停止)、正反转控制、相位选择和制动控制等。
芯片功能引脚定义如表1所列。
SA、SB、SC为霍尔信号输入端，内部上拉20 kΩ电阻，外接霍尔传感器即可。
Fwd／Rew、Brake、Output Enable和60°／120°Select分别为方向、制动、使能和霍尔相位控制端口，内部上拉40 kΩ电阻，MCU控制端只要通过光耦或者三极管开漏接地即可进行控制。
如果不采用IC内置的硬件速度环，则将PIN12、13短接，通过PIN11端口输入PWM即可对电机进行调节控制。
如果采用IC内置的硬件速度环则将PIN12、13通过R、C连接，通过PIN11端口输入PWM进行电机控制，HALL换向反馈信号通过PIN12端口输入。
2 基于MC33035的直流无刷电机控制驱动电路设计在本设计中主控制器以Freescale公司的基于PowerPC构架的32位处理器MPC5604P为例，MPC5604P控制端口通过比较器和MC33035接口，设计了基于MC33035直流无刷电机控制驱动电路。
传统的直流无刷电机控制驱动电路采用MPC5604P、预驱动IC和MOSFET 实现，其中包括电压泵即自举电路。
本设计是基于直流无刷电机控制芯片MC33035实现的，MC33035实现预驱动和电子自动换向功能，采用MC33035实现直流无刷电机的控制驱动电路，既简化了电路设计，同时也减轻了MPC5604P 的运算量。
MPC5604P和MC33035之间通过光耦或者比较器实现电平转换。
Microsoft鼠标产品说明书
H3S-00003D5D-00001PN7-00001RJN-00001U7Z-00001GMF-001764FD-00025P58-00061 Sculpt Comfort Mouse Mobile Mouse 4000Mobile Mouse 3600Mobile Mouse 1850Mobile Mouse 3500Comfort Mouse 4500Basic Optic Mouse MSRP $39.95MSRP $34.95MSRP $29.95MSRP $14.95MSRP $29.95MSRP $22.45MSRP $14.95 Bluetooth Wireless USB Bluetooth Wireless USB Wireless USB Wired USB Wired USBBasicKTF-00013L6V-00001RVF-00052HDQ-00001 Modern Mobile Mouse Sculpt Ergonomic Mouse ARC Touch Mouse Classic IntelliMouse MSRP $34.99MSRP $59.95MSRP $59.95MSRP $39.99 Bluetooth Wireless USB Wireless USB Wired USB Premium Core CoreD e s k t o pPart Code L5V-000017N9-00001L3V-00001PP4-00001PP3-00001M7J-00001PT3-00001PY9-00001APB-00001Description Sculpt Ergonomic DesktopDesigner Desktop Sculpt Comfort DesktopComfort Desktop 5050Desktop 3050Desktop 2000Desktop 900Desktop 850Desktop 600Price MSRP $129.95MSRP $99.95MSRP $79.95MSRP $69.95MSRP $69.95MSRP $49.95MSRP $49.95MSRP $39.95MSRP $29.95Connection Wireless USB Bluetooth Wireless USB Wireless USB Wireless USBWireless USBWireless USBWireless USBWired USB Quality Premium Premium Premium Premium Core Core Core Core Basic Ergonomic Yes No Yes Yes No No No No No Battery Life36 months 9 months KB 18 months, MS 10 monthsKB 15 months, MS 8 monthsKB 15 months, MS 8 monthsKB 18 months, MS 8 months24 months 15 months N/A Box RetailRetailRetailRetailRetailRetailRetailRetailRetailWhy buy?Built on advanced ergonomic design principlesSlim with built-in trackpadMaximized for comfort andcustomized for youErgonomist approved and AES 128-Bit encryptionCompact, modern with AES 128-Bit encryptionQuality build and AES 128-Bit encryptionComfort with AES 128-Bit encryptionQuality build and AES 128-Bit encryption Quality design and AES 128-Bit encryption CommentAlso availablefor business (PN9-00005)Also availablefor business (3J2-00002)W e b c a mPart Code Q2F-00013H5D-00013T3H-00011Description LifeCam Studio LifeCam Cinema LifeCam 3000Price MSRP $99.95MSRP $69.95MSRP $39.95Connection Wired USB Wired USB Wired USB Quality Premium Premium Core Ergonomic N/A N/A N/A Battery LifeN/A N/A N/A BoxRetail Retail RetailWhy buy?1080p HD sensor, 720p HD video, Skype certifiedTrue 720p HD video plus auto focusTrue 720p HD VideoCommentAlso available for business (5WH-00002)Also available for business (6CH-00002)Also available for business (T4H-0002)H e a d s e t sPart Code 7XF-00001JUG-00013Description LifeChat LX-6000LifeChat LX-3000Price MSRP $80.95MSRP $39.95Connection Wired USB Wired USB Quality Premium Basic Ergonomic N/A N/A Battery LifeN/A N/A BoxRetailRetail Why buy?High-fidelity sound,7 foot cable, inline volume, Skype / Lync certified6 foot cable, Skype certifiedCommentAlso available for business (7XF-00001)K e y b o a r dPart Code 5KV-00001LXM-00001QSZ-00001N9Z-00001PZ3-00001ANB-00001Description Sculpt Ergo KeyboardMicrosoft Ergonomic KeyboardMicrosoft Bluetooth ® KeyboardAll-in-One Media KeyboardKeyboard 850Keyboard 600Price MSRP $85.95MSRP $59.99MSRP $49.99MSRP $39.95MSRP $29.95MSRP $16.95Connection Wireless USB Wired USB Wireless USBWireless USBWireless USBWired USB Quality Premium Core Core Core Basic Basic Ergonomic Yes Yes No No No No Battery Life36 months N/A 36 months 9 months 15 months N/A BoxBusiness RetailRetail RetailRetailRetailWhy buy?Ergonomist approvedAll-day typing comfortA sleek, wireless typing experienceSlim with built-in trackpadQuality design and AES 128-Bit encryptionQuality design and AES 128-Bit encryptionCommentAlso availablen White (ANB-00026)A d a p t e r sPart Code P3Q-00001HFR-00001Description Wireless DisplayAdapter USB-C to VGA Adapter Price MSRP $49.95MSRP $39.99Connection USB/HDMI Wired USB Quality Premium Core Ergonomic N/A N/A Battery LifeN/A N/A BoxRetail RetailWhy buy?See it all on your big screenShare photos, video, and presentations in a way that’s larger than lifeCommentErgonomics Modern Productivity Gaming Classic。
奥 местLCD电视AT3201W用户手册说明书
ContentsImportant safety instructions 5Taking care of your remote control 6Cleaning and servicing 6First things first 7Basic features and benefits 7Packing checklist 7Your LCD TV overview 8Front panel view 8Rear panel view 9Basic connection 11Connecting the power cord 11Connecting an antenna 11Connecting DVD/VCR/AV equipment 12Connecting a camera, camcorder or video game 12Connecting headphones 13Connecting a PC or Notebook 13Remote control overview 14Getting started 18Power On 18Setup Wizard 18Changing channels 18Adjusting the volume 18OSD Navigation 19Navigating the OSD using the remote control: 19Advanced Features 20Empowering Key: Scenario Mode and Favourite Channels 20PIP/PBP/POP 22Parental Control 22Troubleshooting 23Product specifications 24English5Important safety instructionsRead these instructions carefully. Save them for fu-ture reference.1 Follow all warnings and instructions marked onthe product.2 Unplug this product from the power outlet be-fore cleaning. Use a soft, moist cloth for clean-ing. Do not use liquid or aerosol cleaners.3 Do not use this product near water. Do not spillwater or any other liquid on the product.4 Do not place this product on an unstable cart,stand, or table. The product may fall, causing serious damage to the product.5 Slots and openings are provided for ventila-tion; to ensure reliable operation of the prod-uct and to protect it from overheating. These openings must not be blocked or covered. The openings should never be blocked by placing the product on a bed, sofa, rug, or other simi-lar surface. This product should never be placed near or over a radiator or heat register, or in a built-in installation unless proper ventilation is provided.6 This product should be operated from the typeof power source indicated on the label. If you are unsure of the type of power source avail-able, consult your dealer or local power com-pany before use.7 Do not step on or place heavy objects on thepower cord. Carefully route the power cord and any cables away from foot traffic. Do not locate this product where persons will step on the cord.8 If an extension cord is used with this product,make sure that the total ampere rating of the equipment plugged into the extension cord does not exceed the extension cord ampere rating. Also, make sure that the total rating of all products plugged into the wall outlet does not exceed the fuse rating.9 Never push objects of any kind into this prod-uct through cabinet slots as they may touch dangerous voltage points or short out parts that could result in a fire or electric shock. 10 Do not attempt to service this product yourself,as opening or removing covers may expose you to dangerous voltage points or other risks. Re-fer all servicing to qualified service personnel.11 Unplug this product from the wall outlet andrefer servicing to qualified service personnel under the following conditions:a. When the power cord or plug is damaged or frayed.b. If liquid has been spilled into the product.c. If the product has been exposed to rain or water.d. If the product does not operate normally when the operating instructions are fol-lowed. Adjust only those controls that are covered by the operating instructions since improper adjustment of other controls may result in damage and will often require extensive work by a qualified technician to restore the product to normal condition.e. If the product has been dropped or the case has been damaged.f. If the product exhibits a distinct change in performance, indicating a need for service.12 Only use the correct power cord (provided inyour accessories box) for this product. Always disconnect the power cord from the wall outlet before servicing or disassembling this equip-ment.E n g l i s h6Taking care of your remote controlFollow these steps to ensure proper care of your remote control:• Handle the remote control with care. Dropping it, placing it in direct sunlight, or allowing it to getwet may cause damage.• Do not tamper with the batteries, and keep them away from children.• When you anticipate that the remote control will not be used for an extended period, remove thebatteries to prevent possible damage from battery leakage.• Dispose of batteries according to local regulations. Recycle if possible.Cleaning and servicingWhen cleaning your LCD TV, follow these steps:1 Power off the TV.2 Disconnect the power cord.3 Use a soft, moist cloth. Do not use liquid or aerosol cleaners.E n g l i s h8Your LCD TV overviewFront panel viewNo. Item DescriptionHeadphone Connects to headphones.Input Select source.When the OSD is on, press this button to confirm selection Vol Down Volume down.When the OSD is on, functions the same as the Left arrow Vol Up Volume up.When OSD is on, functions the same as the Right arrow Channel Down Channel down.When the OSD is on, functions the same as the Down arrow Channel Up Channel up.When the OSD is on, functions the same as the Up arrow Menu Turns the OSD menu ON and OFFPowerTurns the Power ON and OFFEnglishNo. Item DescriptionTuner Connects to the outdoor antenna cableAV1 / SCART 1 In Supports an external device with a SCART cable(for RGB, CVBS, S-Video,Audio left/right input)Out In TV mode, connects to your VCR In or PVR In with SCART cable to re-cord TV programsAV2 / SCART 2 In Supports external device with a SCART cable(for RGB, CVBS, S-Video,YPbPr/YCbCr, Audio left/right input)Out In TV mode, connect to your VCR In or PVR In with a SCART cable to re-cord TV programsAudio Out Connects to the audio jack input of your external device.AV3Audio-R Connects to the Audio-R output of your DVD, VCR player using the redcomposite cableAudio-L Connects to the Audio-L output of your DVD, VCR player using the whitecomposite cablePr/Cr Connects to the Component- Pr/Cr output of your DVD, VCR player usingthe red component cablePb/Cb Connects to the Component- Pb/Cb output of your DVD, VCR player us-ing the blue component cableY Connects to the Component-Y output of your DVD, VCR player using thegreen component cable9E n g l i s hDISPLAY MUTETV RECALL MENUMPXSWAP ACTIVE POSITIONSIZE/MODEINDEX SUBTITLE TELETEXT REVEALSIZE MIX SUBPAGE HOLDVOL PIP/PBP/POPCHOKENTERAV SCART PCSLEEP ZOOM WIDE SRS1234567809Teletext keysSUBPA G E H O L D Remote control overviewEnglishTeletext keysItem DescriptionINDEX Go to the index page SUBTITLE Show subtitlesTELETEXT Press to switch from TV/AV to Teletext mode. REVEAL Press to reveal hidden teletext information.SIZE Press once to zoom teletext page to 2X; press again to resume. MIX Press to overlay teletext page on the TV image, i.e. subtitles.HOLDPress to pause the current teletext page in multi-page viewing mode. Color buttons (R/G/Y/B)Operates corresponding button on the teletext page.There are five main OSD menus. These are: Picture, Audio. Use the following method to easily navigate these menus.OKUse the OSD to define your “e” Empowering Key setting: Scenario mode or Favourite channel. The default for the “e” key is the Scenario mode. Follow these steps: Menu > Empowering > e Key Setting. Choose between “Favourite channel” or “Scenario mode.” Now, when you press the “e” key, your chosen selec-Scenario ModePress the“e”Empowering key and use the Scenario mode to select pre-defined audio and video settings for optimal enjoyment of the following scenarios: Standard, Movie, Sport, Concert, Game, User; and smoothly presents moving images.Scenario Mode Design DirectionStandard mode allows you to watch your favourite channels with sharp, brilliantimagery via adaptive brightness and contrast adjustments. Clear-sounding audio isprovided by SRS performance.For comfortably enjoying movies at home, Movie mode displays dim scenes inclear detail; compensates for colour; and smoothly presents moving images. Thisis accomplished through optimal Gamma correction plus saturation, brightnessand contrast adjustments. Movie mode makes the most of high-definition movieViewing your favourite channelsOn the remote control, if you press the “e” Empowering key for less than 1 second, the favourite channel table will pop up. Your currently selected favourite channel will be highlighted. To view your other favourite channels, press the “e” Empowering key again to toggle the TV channels sequentially according to your favourite list.In TV, AV, SCART and PC mode, press PIP/PBP/POP button once to display using picture- in- picture (PIP). Press twice to display using picture- by- pic-In SCART and PC mode, press PIP/PBP/POP button three times to display picture-on-picture (POP). Then, the POP screens will display the subsequent TV channels one-by-one.PBP (Picture by Picture)PIP (Picture in Picture)EnglishTroubleshootingBefore you call the Acer service center, please check the following items:The following is a list of possible situations that may arise during the use of your LCD TV. Easy answers and solutions are provided for each one.There is no picture or sound.• Make sure the power cord is properly inserted in the power outlet.• Make sure the input mode selector is set to the correct source.• Make sure the antenna at the rear of the TV is properly connected.• Make sure the main power switch is turned on.• Make sure the volume is not set to minimum or the sound is not set to mute.• Make sure the headphones are not connected.• Reception other than those of broadcasting stations can be considered.Picture is not clear.• Make sure the antenna cable is properly connected.• Consider whether TV signals are being properly received.• Poor picture quality can occur due to a VHS camera, camcorder, or other peripheral being connectedat the same time. Switch off one of the other peripherals.• The ‘ghost’ or double image may be caused by obstruction to the antenna due to high rise buildingsor hills. Using a highly directional antenna may improve the picture quality.• The horizontal dotted lines shown on the pictures may be caused by electrical interference, e.g. hairdryer, nearby neon lights and etc. Turn off or remove these equipment.Picture is too dark, too light or tinted.• Check the color adjustment.• Check the brightness setting.• Check the sharpness function.• Fluorescent lamp may have reached the end of service life.Remote control does not work.• Check the batteries of the remote control.• Make sure the remote sensor window is not blocked or under strong fluorescent lighting.• Try to clean the remote control sensor lens on the TV with a soft cloth.• Use the buttons (hot keys) on the TV before the remote control works.If the above items do not solve your technical issue, please refer to the warranty card for service information.E n g l i s hProduct specificationsItem SpecificationPanel specifications Resolution1366 x 768 pixels Brightness (typical.) 500 nits Contrast Ratio (typical.) 800:1 Display colors16.7 M Viewing Angle (typical.) H:170 ; V:170Response Time (typical.)12 ms (gray to gray)Power supply Input100V to 240 V-AC. Max. power consumption 210 WPower Saving5 WMechanical Dimensions (W x H x D mm) 1018 x 616 x 210 mm Swivel angle 40 degrees(R20 & L20) Weight (kg) / (lbs.) 20.7kg / 45.6lbs.Wall MountingYesTerminal AV1/ SCART1 SCART(RGB,CVBS,S-Vidoe,Audio R/L )AV2/ SCART2 SCART(RGB,CVBS,S-Video,YPbPr/CbCr,Audio R/L ) AV3 RCA for YPbPr/CbCr,Audio R/L AV4 RCA for CVBS, Audio R/L AV5 S-Video, Audio R/L PC D-sub Yes DVI-D(HDCP) Yes PC audio-in Yes Audio-out YesHeadphonesYesAudio system 3D surround YesSpeakers 10 W + 10 WSRSWOW。
MY9373技术文档
(Iout0 Iout1 ... Iout15) −(Ideal Output Current)
% (
16
(Ideal Output Current)
*100%
*3 输出电流对输出电压变化的偏移量公式定义如下:
%/V
Ioutn (@Voutn 3V) − Ioutn (@Voutn 1V) 100%
MY-SEMI
输入及输出等效电路
1. DCK, DI, LAT, GCK 输入端
Preliminary
2. DO 输出端
MY9373
最大限定范围(Ta=25C, Tj(max) = 150C)
特性 电源电压 输入端电压 输出端电流 输出端耐受电压 资料时钟频率 灰阶时钟频率 接地端电流
热阻值(On 4-Layers PCB)
输入信号固定 Rrext = 14KΩ 所有输出关闭 输入信号固定 Rrext = 14KΩ 所有输出打开 输入信号固定 Rrext = 1.4KΩ 所有输出关闭 输入信号固定 Rrext = 1.4KΩ 所有输出打开
MY9373
最小值 0.7VDD
GND
一般值
VDD-0.4 1
最大值 单位
VDD V
MY-Semi Inc. 0
MY9373
功能方块图
Preliminary
MY-SEMI
管脚说明
编号.
SS
QF
1
10
2
23
3
24
4
1
5~20 2~9,11~18
21
20
22
19
23
21
24
22
名称 功能说明
威斯丹利智能家庭中控网关说明书
扫扫码码关关注注公公众众号号
广州市威士丹利智能科技有限公司
GGuanggzzhhoouuVAePnsOi LInLtOelliSgmenatrtTeTcehcnhonloogloy gCyoC., oL.t,dLtd 广广州州市市⻩⻩埔埔区区科科学学大大道道181号8号广广州芯州大芯厦大8厦楼8楼 全全国国服服务务热热线线：：4040-06-868-84-2432838
Q3:网关无法添加 a. 指示灯是否亮的。若不亮，请确认线路是否联通的，是否停电。 b. 指示灯亮的，复位后，指示灯是否有相应改变。若指示灯没有相应反应，
尝试重启。
3. 包装成箱的产品，应放在通⻛、干燥、无腐蚀性气体的地方 贮存，堆放高度不能超过十层，仓库温度-10℃~+40℃，湿 度≤75%。
4. 避免雨、雪、猛力撞击等。
Zigbee指示灯
WAN网口 LAN网口 CLR复位孔 电源插孔
电源指示灯 网络指示灯
USB插口 POWER按键 C-3B401-10
Zigbee指示灯
WAN网口 CLR复位孔
电源插孔
USB插口 POWER按键
Zigbee入网孔: 短按，网关打开设备搜索入网。 CLR 复 位 孔: ⻓按5秒，设备恢复出厂默认状态 POWER 按键: ⻓按5秒，清除用户信息，用户可重新绑定
最大发射功率：20dbm 无线信道：2.4GHz 材质：PC+ABS 工作温度：0-40℃ 工作湿度：10%-90%RH
三.孔位标示
C-3B501-10
C-3B502-10
指示灯
Zigbee入网孔 CLR复位孔
POWER按键 LAN/WAN
LAN/WAN POWER按键
-２-
WOC产品介绍
有线电视无线网络产品介绍
北 京 志 扬 创 新 科 技 有 限 公 司
Beijing Cytech Systems Ltd – WLAN Over CATV System
产品资质
• 国家专利技术申请 200410086857.6 • 通过国家广电系统产品认证 CATVA7-2007-0830/31
WOC产品的特性
• 不需电源：安装过程中无需另外设置外接电源 • 不需布线：可利用原有的有线电视线路直接加载无线讯号 • 容易安装：仅需更换有线电视面板和分频器，安装简单，改 装周期短。
• 不易损坏：所以无线宽带都属于内置天线，安装完成后不易 损坏。
• 降低成本：相对于有线综合布线而言，安装数量越多，则综 合安装成本越低。
WOC系列： 分配器
• 型号…WD-02 • 二分配器
– 1个输入至2个输出
• 宽广的使用频率范围
– 5MHz~2.6GHz
• 低损耗
– 低于 6dB
• 连结头造型
– Ｆ头母头
WD-02
Beijing Cytech Systems Ltd – WLAN Over CATV System
WOC系列：合路分配器
Beijing Cytech Systems Ltd – WLAN Over CATV System
WOC产品的应用
• 酒店客房的无线覆盖 • 酒店会议室、咖啡厅、大堂的无线覆盖 • 医院病房的无线覆盖
• 学生公寓的无线覆盖
• 别墅公寓的无线覆盖 • 办公场所的无线覆盖
Beijing Cytech Systems Ltd – WLAN Over CATV System
30cm连结头造型smabeijingcytechsystemsltdwlanovercatvsystem串接方式5c2v同轴电缆有线电视电缆网络有线电视电缆网线射频连接缆线5c2v同轴电缆无线局域网wl030ts33bts33bts33bts33bts33ms01beijingcytechsystemsltdwlanovercatvsystem串并接混合方式5c2v同轴电缆有线电视电缆wl030ts33bts33bts33bts33ms02ts33bts33bts33bts33网络beijingcytechsystemsltdwlanovercatvsystemts33b串并接混合方式5c2v同轴电缆ts33bts33bts33ms04ts33bts33bts33ts33bts33bts33ts33ts33b有线电视电缆网络beijingcytechsystemsltdwlanovercatvsystem并接方式5c2v同轴电缆ts33ms08ts33ts33ts33ts33ts33ts33ts33有线电视电缆网络beijingcytechsystemsltdwlanovercatvsystem并接方式5c2v同轴电缆ts33ms08ts33ts33ts33ts33ts33ts33ts33ts33bts33有线电视电缆网络wd02beijingcytechsystemsltdwlanovercatvsystem系统架构示意accesspoint80211catv信号将catv信息和wifi混频送至cableout同轴线缆分配器分支器带天线面板终端分离器1分支终端分离器wlan天线面板beijingcytechsystemsltdwlanovercatvsystem损耗值5c电视缆线损耗为每米05db空气介质损耗
AK4399EQ中文资料
High Performance 123dB Premium 32-Bit DACGENERAL DESCRIPTIONAK4399 is a 32-bit DAC, which corresponds to DVD-Audio systems. An internal circuit includes newly developed 32bit Digital Filter for better sound quality achieving low distortion characteristics and wide dynamic range. The AK4399 has full differential SCF outputs, removing the need for AC coupling capacitors and increasing performance for systems with excessive clock jitter. The AK4399 accepts 192kHz PCM data and 1-bit DSD data, ideal for a wide range of applications including DVD-Audio and SACD.FEATURES• 128x Over sampling• Sampling Rate: 30kHz ∼ 216kHz• 32Bit 8x Digital Filter (Short delay option GD=7/fs)- Ripple: ±0.005dB, Attenuation: 100dB• High Tolerance to Clock Jitter• Low Distortion Differential Output• DSD data input• Digital De-emphasis for 32, 44.1, 48kHz sampling• Soft Mute• Digital Attenuator (255 levels and 0.5dB step)• Mono Mode• External Digital Filter Mode• THD+N: -105dB• DR, S/N: 123dB• I/F Format: 24/32bit MSB justified, 16/20/24/32bit LSB justified, I2S, DSD•Master Clock:30kHz ~ 32kHz: 1152fs30kHz ~ 54kHz: 512fs or 768fs30kHz ~ 108kHz: 256fs or 384fs108kHz ~ 216kHz: 128fs or 192fs• Power Supply: 4.75 ∼ 5.25V• Digital Input Level: TTL• Package: 44pin LQFP■Block DiagramBlock Diagram■ Ordering GuideAK4399EQ −10 ∼ +70°C 44pin LQFP (0.8mm pitch)AKD4399 Evaluation Board for AK4399■ Pin LayoutAOUTLP A O U T L N34 VCML3335NC 36 NC 37 NC38NC 39 VSS3 40 AVDD 41 MCLK42VSS4 43 NC 44V S S 232V D D L 31V R E F H L30V R E F L L29N C28V R E F L R27V R E F H R26V D D R25V S S 1 24A O U T R N23D V D D1 P D N2B IC K /D C L K3S D A T A /D S D L4L R C K /D S D R /W C K5S M U T E /C S N6T S T 1/C A D 07D E M 0/C C L K8 D E M 1/C D T I9 D I F 0/C A D 110 D I F 1/D Z F L11 2221201918171615141312AOUTRP VCMR NC DINL DINR NC BCK TST2/DZFR PSN NC DIF2AK4399Top ViewPIN/FUNCTIONNo. Pin Name I/O Function1DVDD-Digital Power Supply Pin, 4.75 ∼ 5.25V2 PDN I Power-Down Mode PinWhen at “L”, the AK4399 is in power-down mode and is held in reset.The AK4399 should always be reset upon power-up.BICK I Audio Serial Data Clock Pin in PCM Mode 3DCLK I DSD Clock Pin in DSD Mode SDATA I Audio Serial Data Input Pin in PCM Mode 4DSDL I DSD Lch Data Input Pin in DSD Mode LRCK I L/R Clock Pin in PCM Mode DSDR I DSD Rch Data Input Pin in DSD Mode5 WCK I Word Clock input pinSMUTE I Soft Mute Pin in Parallel Control ModeWhen this pin is changed to “H”, soft mute cycle is initiated. When returning “L”, the output mute releases.6CSN I Chip Select Pin in Serial Control Mode TST1 I Test Pin in Parallel Control Mode (Internal pull-down pin) 7CAD0 I Chip Address 0 Pin in Serial Control Mode (Internal pull-down pin)DEM0 I De-emphasis Enable 0 Pin in Parallel Control Mode 8CCLK I Control Data Clock Pin in Serial Control Mode DEM1 I De-emphasis Enable 1 Pin in Parallel Control Mode 9CDTI I Control Data Input Pin in Serial Control Mode DIF0 I Digital Input Format 0 Pin in PCM Mode 10CAD1 I Chip Address 1 Pin in Serial Control Mode DIF1 I Digital Input Format 1 Pin in PCM Mode 11DZFL O Lch Zero Input Detect Pin in Serial Control Mode 12 DIF2 IDigital Input Format 2 Pin in PCM Mode13 NC-No internal bonding. Connect to GND.Note: All input pins except internal pull-up/down pins must not be left floating.14 PSNIParallel or Serial Select Pin (Internal pull-up pin)“L”: Serial Control Mode, “H”: Parallel Control Mode TST2 ITest pin in Parallel Control Mode.Connect to GND. 15DZFR O Rch Zero Input Detect Pin in Serial Control Mode 16 BCK I Audio Serial Data Clock Pin (Internal pull-down pin) 17 NC - No internal bonding. Connect to GND.18 DINR I Rch Audio Serial Data Input Pin (Internal pull-down pin) 19 DINL I Lch Audio Serial Data Input Pin (Internal pull-down pin) 20 NC - No internal bonding. Connect to GND.21 VCMR - Right channel Common Voltage Pin,Normally connected to VSS with a 10uF electrolytic cap. 22 AOUTRP O Rch Positive Analog Output Pin 23 AOUTRN O Rch Negative Analog Output Pin 24 VSS1 - Ground Pin25 VDDR - Rch Analog Power Supply Pin, 4.75 ∼ 5.25V 26 VREFHR I Rch High Level Voltage Reference Input Pin 27 VREFLR I Rch Low Level Voltage Reference Input Pin 28 NC - No internal bonding. Connect to GND.29 VREFLL I Lch Low Level Voltage Reference Input Pin 30 VREFHL I Lch High Level Voltage Reference Input Pin 31 VDDL - Lch Analog Power Supply Pin, 4.75 ∼ 5.25V 32 VSS2 - Ground Pin33 AOUTLN O Lch Negative Analog Output Pin 34 AOUTLP O Lch Positive Analog Output Pin 35 VCML - Left channel Common Voltage Pin,Normally connected to VSS with a 10uF electrolytic cap. 36 NC - No internal bonding. Connect to GND. 37 NC - No internal bonding. Connect to GND. 38 NC - No internal bonding. Connect to GND. 39 NC - No internal bonding. Connect to GND. 40 VSS3 - Ground Pin41 AVDD - Analog Power Supply Pin, 4.75 ∼ 5.25V 42 MCLK I Master Clock Input Pin 43 VSS4 - Ground Pin44 NC-No internal bonding. Connect to GND.Note: All input pins except internal pull-up/down pins must not be left floating.■Handling of Unused PinThe unused I/O pins should be processed appropriately as below.(1) Parallel Mode (PCM Mode only)Classification Pin Name SettingAOUTLP, AOUTLN These pins must be open.AnalogAOUTRP, AOUTRN These pins must be open.SMUTE This pin must be connected to VSS4.DigitalTST1 This pin must be open.TST2 This pin must be connected to VSS4.(2) Serial Mode1. PCM ModeClassification Pin Name SettingAOUTLP, AOUTLN These pins must be open.AnalogAOUTRP, AOUTRN These pins must be open.DIF2 These pins must be connected to VSS4.DigitalDZFL, DZFR These pins must be open.2. DSD ModeClassification Pin Name SettingAOUTLP, AOUTLN These pins must be open.AnalogAOUTRP, AOUTRN These pins must be open.DZFL, DZFR These pins must be open.ABSOLUTE MAXIMUM RATINGS(VSS1-4 =0V; Note 1)Parameter Symbol min max UnitsPower Supplies:Analog Analog Digital AVDD VDDL/R DVDD −0.3 −0.3 −0.3 6.0 6.06.0V V V Input Current, Any Pin Except Supplies IIN - ±10 mA Digital Input Voltage VIND −0.3 DVDD+0.3 V Ambient Temperature (Power applied) Ta −10 70 °C Storage Temperature Tstg −65 150 °CNote 1. All voltages with respect to ground.Note 2. VSS1-4 must be connected to the same analog ground plane.WARNING: Operation at or beyond these limits may result in permanent damage to the device.Normal operation is not guaranteed at these extremes.RECOMMENDED OPERATING CONDITIONS(VSS1-4 =0V; Note 1)Parameter Symbol min typ max UnitsPower Supplies(Note 3)AnalogAnalogDigitalAVDD VDDL/R DVDD 4.75 4.75 4.75 5.0 5.0 5.0 5.25 5.25 5.25 V V V VoltageReference(Note 4)“H” voltage reference “L” voltage reference VREFH − VREFL VREFHL/R VREFLL/R ΔVREF AVDD −0.5VSS 3.0 - - - AVDD - AVDD V V V Note 1. All voltages with respect to ground.Note 3. The power up sequence between AVDD, VDDL/R and DVDD is not critical. Note 4. The analog output voltage scales with the voltage of (VREFH − VREFL). AOUT (typ.@0dB) = (AOUT+) − (AOUT −) = ±2.8Vpp × (VREFHL/R − VREFLL/R)/5.* AKEMD assumes no responsibility for the usage beyond the conditions in this data sheet.ANALOG CHARACTERISTICS(Ta=25°C; AVDD=VDDL/R=DVDD=5.0V; VSS1-4 =0V; VREFHL/R=AVDD, VREFLL/R= VSS; Input data = 24bit; R L ≥ 1k Ω; BICK=64fs; Signal Frequency = 1kHz; Sampling Frequency = 44.1kHz; Measurement bandwidth = 20Hz ~ 20kHz; External Circuit: Figure 20; unless otherwise specified.)Parameter min typ max Units Resolution - - 24 Bits Dynamic Characteristics (Note 5)fs=44.1kHz BW=20kHz 0dBFS −60dBFS - - -105 -60 98 - dB dB fs=96kHzBW=40kHz 0dBFS −60dBFS - - 102 -57 - - dB dB THD+Nfs=192kHz BW=40kHz BW=80kHz 0dBFS −60dBFS −60dBFS102 -57 -54 - - - dB dB dB Dynamic Range (−60dBFS with A-weighted) (Note 6) 117 123 dB S/N (A-weighted) (Note 7) 117 123 dB Interchannel Isolation (1kHz) 110 120 dB DC AccuracyInterchannel Gain Mismatch - 0.15 0.3 dB Gain Drift (Note 8) - 20 - ppm/°C Output Voltage (Note 9) ±2.65 ±2.8 ±2.95 Vpp Load Capacitance - - 25 pF Load Resistance (Note 10) 1 - - k Ω Power Supplies Power Supply CurrentNormal operation (PDN pin = “H”) AVDD + VDDL/R DVDD (fs ≤ 96kHz) DVDD (fs = 192kHz) - - - 60 43 46 90 - 70 mA mA mAPower down (PDN pin = “L”) (Note 11) AVDD+VDDL/R+DVDD - 10 100 μANote 5. Measured by Audio Precision, System Two. Averaging mode. Refer to the evaluation board manual. Note 6. Figure 20 External LPF Circuit Example 2. 101dB for 16-bit data and 118dB for 20-bit data. Note 7. Figure 20 External LPF Circuit Example 2. S/N does not depend on input data size. Note 8. The voltage on (VREFH − VREFL) is held +5V externally.Note 9. Full-scale voltage(0dB). Output voltage scales with the voltage of (VREFHL/R − VREFLL/R). AOUT (typ.@0dB) = (AOUT+) − (AOUT −) = ±2.8Vpp × (VREFHL/R − VREFLL/R)/5.Note 10. Regarding Load Resistance, AC load is 1k Ω (min) with a DC cut capacitor (Figure 20). DC load is 1.5k ohm(min) without a DC cut capacitor (Figure 19). The load resistance value is with respect to ground. Analogcharacteristics are sensitive to capacitive load that is connected to the output pin. Therefore the capacitive load must be minimized.Note 11. In the power down mode. The P/S pin = DVDD, and all other digital input pins including clock pins(MCLK, BICK and LRCK) are held VSS4.SHARP ROLL-OFF FILTER CHARACTERISTICS (fs = 44.1kHz)(Ta=25°C; AVDD=VDDL/R=4.75 ∼ 5.25V, DVDD=4.75 ∼ 5.25V; Normal Speed Mode; DEM=OFF; SD bit=“0”)Parameter SymbolmintypmaxUnits Digital FilterPassband (Note 12)±0.01dB−6.0dB PB 0- 22.0520.0-kHzkHzStopband (Note 12) SB 24.1 kHzPassband Ripple PR ±0.005 dBStopband Attenuation SA 100 dBGroup Delay (Note 13) GD - 36 - 1/fsDigital Filter + SCFFrequency Response: 0 ∼ 20.0kHz - ±0.2 - dBSHARP ROLL-OFF FILTER CHARACTERISTICS (fs = 96kHz)(Ta=25°C; AVDD=VDDL/R=4.75 ∼ 5.25V, DVDD=4.75 ∼ 5.25V; Double Speed Mode; DEM=OFF; SD bit=“0”)Parameter SymbolmintypmaxUnits Digital FilterPassband (Note 12)±0.01dB−6.0dB PB 0- 48.043.5-kHzkHzStopband (Note 12) SB 52.5 kHzPassband Ripple PR ±0.005 dBStopband Attenuation SA 95 dBGroup Delay (Note 13) GD - 36 - 1/fsDigital Filter + SCFFrequency Response: 0 ∼ 40.0kHz - ±0.3 - dBSHARP ROLL-OFF FILTER CHARACTERISTICS (fs = 192kHz)(Ta=25°C; AVDD=VDDL/R=4.75 ∼ 5.25V, DVDD=4.75 ∼ 5.25V; Quad Speed Mode; DEM=OFF; SD bit=“0”)Parameter SymbolmintypmaxUnits Digital FilterPassband (Note 12)±0.01dB−6.0dB PB 0- 96.087.0-kHzkHzStopband (Note 12) SB 105 kHz Passband Ripple PR ±0.005 dB Stopband Attenuation SA 90 dBGroup Delay (Note 13) GD - 36 - 1/fsDigital Filter + SCFFrequency Response: 0 ∼ 80.0kHz - +0/−1 - dB Note 12. The passband and stopband frequencies scale with fs. For example, PB=0.4535×fs (@±0.01dB), SB=0.546×fs. Note 13. The calculating delay time which occurred by digital filtering. This time is from setting the 16/20/24bit data of both channels to input register to the output of analog signal.SHORT DELAY FILTER CHARACTERISTICS (fs = 44.1kHz)(Ta=25°C; AVDD=VDDL/R=4.75 ∼ 5.25V, DVDD=4.75 ∼ 5.25V; Normal Speed Mode; DEM=OFF; SD bit=“1”)Parameter SymbolmintypmaxUnits Digital FilterPassband (Note 12)±0.01dB−6.0dB PB 0- 22.0520.0-kHzkHzStopband (Note 12) SB 24.1 kHzPassband Ripple PR ±0.005 dBStopband Attenuation SA 100 dBGroup Delay (Note 13) GD - 7 - 1/fsDigital Filter + SCFFrequency Response : 0 ∼ 20.0kHz - ±0.2 - dBSHORT DELAY FILTER CHARACTERISTICS (fs = 96kHz)(Ta=25°C; AVDD=VDDL/R=4.75 ∼ 5.25V, DVDD=4.75 ∼ 5.25V; Double Speed Mode; DEM=OFF; SD bit=“1”)Parameter SymbolmintypmaxUnits Digital FilterPassband (Note 12)±0.01dB−6.0dB PB 0- 48.043.5-kHzkHzStopband (Note 12) SB 52.5 kHzPassband Ripple PR ±0.005 dBStopband Attenuation SA 95 dBGroup Delay (Note 13) GD - 7 - 1/fsDigital Filter + SCFFrequency Response : 0 ∼ 40.0kHz - ±0.3 - dBSHORT DELAY FILTER CHARACTERISTICS (fs = 192kHz)(Ta=25°C; AVDD=VDDL/R=4.75 ∼ 5.25V, DVDD=4.75 ∼ 5.25V; Quad Speed Mode; DEM=OFF; SD bit=“1”)Parameter SymbolmintypmaxUnits Digital FilterPassband (Note 12)±0.01dB−6.0dB PB 0- 96.087.0-kHzkHzStopband (Note 12) SB 105 kHz Passband Ripple PR ±0.005 dB Stopband Attenuation SA 90 dBGroup Delay (Note 13) GD - 7 - 1/fsDigital Filter + SCFFrequency Response : 0 ∼ 80.0kHz - +0/−1 - dBDC CHARACTERISTICS(Ta=25°C; AVDD=VDDL/R=4.75 ∼ 5.25V, DVDD=4.75 ∼ 5.25V)Parameter SymbolmintypmaxUnitsHigh-Level Input Voltage Low-Level Input Voltage VIHVIL2.4----0.8VVHigh-Level Output Voltage (Iout=−100μA) Low-Level Output Voltage (Iout=100μA) VOHVOLDVDD−0.5----0.5VVInput Leakage Current (Note 14)Iin - - ±10 μA Note 14. The TST1/CAD0 and P/S pins have internal pull-up devices, nominally 100kΩ. Therefore The TST1/CAD0 and P/S pins are not included.SWITCHING CHARACTERISTICS(Ta=25°C; AVDD=VDDL/R=4.75 ∼ 5.25V, DVDD=4.75 ∼ 5.25V)Parameter Symbol mintypmaxUnits Master Clock TimingFrequency Duty Cycle fCLKdCLK7.74041.47260MHz%LRCK Frequency (Note 15)1152fs, 512fs or 768fs 256fs or 384fs128fs or 192fsDuty CyclefsnfsdfsqDuty3054108455410821655kHzkHzkHz%PCM Audio Interface Timing BICK Period1152fs, 512fs or 768fs256fs or 384fs128fs or 192fsBICK Pulse Width LowBICK Pulse Width HighBICK “↑” to LRCK Edge (Note 16) LRCK Edge to BICK “↑” (Note 16) SDATA Hold TimeSDATA Setup TimetBCKtBCKtBCKtBCKLtBCKHtBLRtLRBtSDHtSDS1/128fsn1/64fsd1/64fsq303020202020nsnsnsnsnsnsnsnsnsExternal Digital Filter ModeBICK PeriodBCK Pulse Width LowBCK Pulse Width HighBCK “↑” to WCK Edge WCK Edge to BCK “↑” WCK Pulse Width LowWCK Pulse Width HighDATA Hold TimeDATA Setup TimetBtBLtBHtBWtWBtWCKtWCHtDHtDS27101055545455nsnsnsnsnsnsnsnsnsDSD Audio Interface TimingDCLK PeriodDCLK Pulse Width LowDCLK Pulse Width HighDCLK Edge to DSDL/R (Note 17)tDCKtDCKLtDCKHtDDD1/64fs160160−20 20nsnsnsnsControl Interface TimingCCLK PeriodCCLK Pulse Width Low Pulse Width High CDTI Setup TimeCDTI Hold TimeCSN High TimeCSN “↓” to CCLK “↑” CCLK “↑” to CSN “↑”tCCKtCCKLtCCKHtCDStCDHtCSWtCSStCSH200808050501505050nsnsnsnsnsnsnsnsReset TimingPDN Pulse Width (Note 18)tPD 150 nsNote 15. When the 1152fs, 512fs or 768fs /256fs or 384fs /128fs or 192fs are switched, the AK4399 should be reset by thePDN pin or RSTN bit.Note 16. BICK rising edge must not occur at the same time as LRCK edge. Note 17. DSD data transmitting device must meet this time.Note 18. The AK4399 can be reset by bringing the PDN pin “L” to “H” upon power-up.■ Timing DiagramVIHMCLKVILVIH LRCKVILVIHBICKVILVIH WCKVILVIH BCKVILClock TimingLRCKVIH BICKVILVIHSDATAVILVIH VILVIH DCLKVILVIH DSDLDSDRVILAudio Serial Interface Timing (DSD Normal Mode, DCKB bit = “0”)VIH DCLKVILVIH DSDL DSDRVILAudio Serial Interface Timing (DSD Phase Modulation Mode, DCKB bit = “0”)CSNVIH CCLKVILVIH CDTI VILVIHVILWRITE Command Input TimingCSNVIH CCLKVILVIH CDTI VILVIHVILD3D2D1D0WRITE Data Input TimingPDNVILPower Down & Reset TimingWCKVIH BCKVILVIH DATAVILVIH VILExternal Digital Filter I/F modeOPERATION OVERVIEW■D/A Conversion ModeIn serial mode, the AK4399 can perform D/A conversion for either PCM data or DSD data. The D/P bit controls PCM/DSD mode. When DSD mode, DSD data can be input from DCLK, DSDL and DSDR pins. When PCM mode, PCM data can be input from BICK, LRCK and SDATA pins. When PCM/DSD mode is changed by D/P bit, the AK4399 should be reset by RSTN bit. It takes about 2/fs to 3/fs to change the mode. In parallel mode, the AK4399 performs for only PCM data.DP bit Interface0 PCM1 DSDTable 1. PCM/DSD Mode ControlWhen DP bit= “0”, an internal digital filter or external digital filter can be selected. When using an external digital filter (EX DF I/F mode), data is input to each MCLK, BCK, WCK, DINL and DINR pin. EXD bit controls the modes. When switching internal and external digital filters, the AK4399 must be reset by RSTN bit. A Digital filter switching takes 2~3k/fs.Ex DF bit Interface0 PCMI/F1 EXDFTable 2. Digital Filter Control (DP bit = “0”)■System Clock[1] PCM ModeThe external clocks, which are required to operate the AK4399, are MCLK, BICK and LRCK. MCLK should be synchronized with LRCK but the phase is not critical. The MCLK is used to operate the digital interpolation filter and the delta-sigma modulator. Sampling speed and MCLK frequency are detected automatically and then the initial master clock is set to the appropriate frequency (Table 3). When external clocks are changed, the AK4399 should be reset by the PDN pin or RSTN bit.The AK4399 is automatically placed in reset state when MCLK and LRCK are stopped during a normal operation (PDN pin =“H”), and the analog output becomes Hi-Z. When MCLK and LRCK are input again, the AK4399 exit reset state and starts the operation. After exiting system reset (PDN pin =“L”→“H”) at power-up and other situations, the AK4399 is in power-down mode until MCLK and LRCK are supplied.The MCLK frequency corresponding to each sampling speed should be provided (Table 4).RateSamplingMCLK Mode30kHz~32kHz1152fs Normal512fs 768fs Normal 30kHz~54kHz256fs 384fs Double 30kHz~108kHz128fs 192fs Quad 108kHz~216kHzTable 3. Sampling SpeedLRCK MCLK(MHz) fs 128fs 192fs 256fs 384fs 512fs 768fs 1152fs32.0kHz N/A N/A 8.1920 12.2880 16.3840 24.5760 36.864044.1kHz N/A N/A 11.2896 16.9344 22.5792 33.8688 N/A48.0kHz N/A N/A 12.2880 18.4320 24.5760 36.8640 N/A33.8688 N/A N/A N/A88.2kHz N/A N/A 22.579236.8640 N/A N/A N/A96.0kHz N/A N/A 24.5760176.4kHz 22.5792 33.8688 N/A N/A N/A N/A N/A 192.0kHz 24.5760 36.8640 N/A N/A N/A N/A N/A Table 4. System Clock Example (Parallel Control Mode) (N/A: Not available)MCLK= 256fs/384fs supports sampling rate of 30kHz~108kHz (Table 5). But, when the sampling rate is 30kHz~54kHz, DR and S/N will degrade by approximately 3dB as compared to when MCLK= 512fs/768fs.MCLK DR,S/N256fs/384fs 120dB512fs/768fs 123dBTable 5. Relationship between MCLK frequency and DR, S/N (fs= 44.1kHz)[2] DSD ModeThe external clocks, which are required to operate the AK4399, are MCLK and DCLK. MCLK should be synchronized with DCLK but the phase is not critical. The frequency of MCLK is set by DCKS bit.The AK4399 is automatically placed in reset state when MCLK is stopped during a normal operation (PDN pin =“H”), and the analog output becomes Hi-Z. After exiting system reset (PDN pin =“L”→“H”) at power-up and other situations, the AK4399 is in power-down mode until MCLK is supplied.DCKS bit MCLK Frequency DCLK Frequency(default)0 512fs 64fs1 768fs 64fsTable 6. System Clock (DSD Mode)■ Audio Interface Format[1] PCM ModeData is shifted in via the SDATA pin using BICK and LRCK inputs. Eight data formats are supported and selected by the DIF2-0 pins (Parallel control mode) or DIF2-0 bits (Serial control mode) as shown in Table 7. In all formats the serial data is MSB-first, 2's compliment format and is latched on the rising edge of BICK. Mode 2 can be used for 20-bit and 16-bit MSB justified formats by zeroing the unused LSBs. Settings should be made by DIF2-0 pins in parallel mode and DIF2-0 bits in serial mode.Mode DIF2 DIF1 DIF0 Input Format BICK Figure0 0 0 0 16bit LSB justified ≥ 32fsFigure 1 1 0 0 1 20bit LSB justified ≥ 48fs Figure 2 2 0 1 0 24bit MSB justified ≥ 48fsFigure 3 (default)3 0 1 1 24bit I 2S Compatible ≥ 48fs Figure 4 4 1 0 0 24bit LSB justified ≥ 48fs Figure 2 5 1 0 1 32bit LSB justified ≥ 64fs Figure 5 6 1 1 0 32bit MSB justified ≥64fsFigure 6 7 1 1 1 32bit I 2S Compatible ≥ 64fsFigure 7 Table 7. Audio Interface FormatSDATA BICKLRCKSDATA BICK (32fs)(64fs)Mode 0Mode 0SDATA LRCK BICK (64fs)Mode 1SDATA Mode 4Figure 2. Mode 1/4 TimingBICK(64fs)SDATAFigure 3. Mode 2 Timing Array LRCKBICK(64fs)SDATALRCKSDATABICK(64fs)SDATAFigure 5. Mode 5 Timing元器件交易网[AK4399]LRCK0 1 2 20 21 22 32 33 63 0 1 2 20 21 22 32 33 63 0 1BICK(128fs) SDATA BICK(64fs) SDATA31 30 20 19 18 9 8 1 0 31 30 20 19 18 9 8 1 0 31 31 300 1 212 11 1012 13 14023 24 31 031 301 2121211 1013 14023 24 31310 1Lch Data 31: MSB, 0:LSBRch DataFigure 6. Mode 6 TimingLRCK0 1 2 20 21 22 33 34 63 0 1 2 20 21 22 33 34 63 0 1BICK(128fs) SDATA0311 213 12 1112 13 14024 25 31 0311 2131212 1113 14024 25 31 0 1BICK(64fs) SDATA0 31 21 20 19 9 8 2 1 0 31 21 20 19 9 8 2 1 0Lch Data 31: MSB, 0:LSBRch DataFigure 7. Mode 7 Timing[2] DSD Mode In case of DSD mode, DIF2-0 pins and DIF2-0 bits are ignored. The frequency of DCLK is fixed to 64fs. DCKB bit can invert the polarity of DCLK.DCLK (64fs) DCKB=1 DCLK (64fs) DCKB=0 DSDL,DSDR Normal DSDL,DSDRPhase ModulationD0 D0 D1 D2 D3D1D1D2D2D3Figure 8. DSD Mode TimingMS1005-E-00 - 21 -2008/10元器件交易网[AK4399][3] External Digital Filter Mode (EX DF I/F Mode) DW indicates the number of BCK in one WCK cycle. The audio data is input by MCLK, BCK and WCK from the DINL and DINR pins. Three formats are available (Table 9) by DIF2-0 bits setting. The data is latched on the rising edge of BCK. The BCK and MCLK clocks must be the same frequency and must not burst. BCK and MCLK frequencies for each sampling speed are shown in Table 8. The AK4399 is automatically placed in reset state when MCLK and WCK are stopped during a normal operation (PDN pin =“H”), and the analog output becomes Hi-Z. When MCLK and WCK are input again, the AK4399 exit reset state and starts the operation. After exiting system reset (PDN pin =“L”→“H”) at power-up and other situations, the AK4399 is in power-down mode until MCLK and WCK are supplied. Sampling Speed[kHz] 44.1(30~54) 44.1(30~54) 96(54~108) 96(54~108) 192(108~216) 192(108~216) MCLK&BCK [MHz] 128fs N/A N/A N/A 12.288 3224.576 WCK192fs N/A N/A N/A18.432256fs N/A 11.2896 3224.576384fs N/A16.9344512fs22.5792768fs33.8688ECS 0 1 0 1 0 132 N/A N/A N/A N/A4833.86884836.86496 N/A N/A N/A32 N/A N/A4836.8644836.86496 N/A32 N/A4836.864N/A N/A N/A N/A 96 Table 8 System Clock Example (EX DF I/F mode) (N/A: Not available)16fs DW 8fs DW 8fs DW 4fs DW 4fs DW 2fs DWMode DIF2 DIF1 DIF0 Input Format 0 0 0 0 16bit LSB justified 1 0 0 1 N/A 2 0 1 0 N/A 3 0 1 1 N/A 4 1 0 0 24bit LSB justified 5 1 0 1 32bit LSB justified 6 1 1 0 N/A 7 1 1 1 N/A Table 9 Audio Interface Format (EX DF I/F mode) (N/A: Not available)MS1005-E-00 - 22 -2008/10元器件交易网[AK4399]1/16fs or 1/8fs or 1/4fs or 1/2fsWCK0 1 8 9 10 11 16 17 26 27 28 29 30 31 0 1BCK DINL or DINR03113024 235 6227218201716471548144965654392293194 9500 1BCK DINL or DINR BCK DINL or DINRDon’t care Don’t care Don’t care 31 3 2 1 0 Don’t care Don’t care0 1 5Don’t care6 7 8Don’t care23 24 253117344 452461470 Don’t care0 1Figure 9 EX DF I/F Mode TimingMS1005-E-00 - 23 -2008/10元器件交易网[AK4399]■ D/A Conversion Mode Switching TimingRSTN bit≥4/fsD/A ModePCM Mode ≥0DSD ModeD/A DataPCM DataDSD DataFigure 10. D/A Mode Switching Timing (PCM to DSD)RSTN bit D/A ModeDSD Mode ≥4/fsPCM ModeD/A DataDSD DataPCM DataFigure 11. D/A Mode Switching Timing (DSD to PCM) Note. The signal range is identified as 25% ~ 75% duty ratios in DSD mode. DSD signal must not go beyond this duty range at the SACD format book (Scarlet Book).■ De-emphasis FilterA digital de-emphasis filter is available for 32kHz, 44.1kHz or 48kHz sampling rates (tc = 50/15µs) and is enabled or disabled with DEM1-0 pins or DEM1-0 bits. In case of 256fs/384fs and 128fs/192fs, the digital de-emphasis filter is always off. When DSD mode, DEM1-0 bits are ignored. The setting value is held even if PCM mode and DSD mode are switched. DEM1 0 0 1 1 DEM0 Mode 0 44.1kHz 1 OFF (default) 0 48kHz 1 32kHz Table 10. De-emphasis Control■ Output VolumeThe AK4399 includes channel independent digital output volumes (ATT) with 255 levels at linear step including MUTE. These volume control is in front of the DAC and it can attenuate the input data from 0dB to –127dB and mute. When changing output levels, transitions are executed in soft change; thus no switching noise occurs during these transitions.MS1005-E-00 - 24 -2008/10元器件交易网[AK4399]■ Zero Detection (PCM mode, DSD mode)The AK4399 has channel-independent zeros detect function. When the input data at each channel is continuously zeros for 8192 LRCK cycles, the DZF pin of each channel goes to “H”. The DZF pin of each channel immediately return to “L” if the input data of each channel is not zero after going to “H”. If the RSTN bit is “0”, the DZF pins of both channels go to “H”. The DZF pins of both channels go to “L” at 4 ~ 5/fs after RSTN bit returns to “1”. If DZFM bit is set to “1”, the DZF pins of both channels go to “H” only when the input data for both channels are continuously zeros for 8192 LRCK cycles. The zero detect function can be disabled by setting the DZFE bit. In this case, DZF pins of both channels are always “L”. The DZFB bit can invert the polarity of the DZF pin.■ Mono OutputThe AK4399 can select input/output for both output channels by setting the MONO bit and SELLR bit. This function is available for any audio format.MONO bit 0 0 1 1SELLR bit 0 1 0 1Lch Out Lch In Rch In Lch In Rch InRch Out Rch In Lch In Lch In Rch InTable 11 MONO Mode Output SelectMS1005-E-00 - 25 -2008/10。
基于MC33993的车用多功能开关检测设计的实现
基于MC33993的车用多功能开关检测设计的实现
1 引言
随着汽车电子技术的飞速发展,汽车内部所用到的开关元件也日益复杂而
繁多，因此，可靠实时地对这些开关量进行检测已成为汽车电子硬件设计必须
解决的问题。
传统的开关检测接口电路设计多采用电阻、电容等分立元件与单
片机直接相连,这样往往有如下弊端：
整个开关系统的可靠性得不到保证,给汽车安全带来隐患：
由分立元件设计的开关触点容易发生氧化,缩短了开关的使用寿命：
过多使用分立元件，浪费大量的单片机I/O 资源，降低了CPU 的利用率。
针对上述问题,本文采用飞思卡尔公司生产的多路开关检测器件
MC33993 设计了一款车用多路开关检测接口电路。
实验证明其工作性能良好。
安全性高。
2 MC3399
3 介绍
MC33993 是一款可编程多路开关检测接口器件，可检测22 路开关量输
入信号，并将检测到的开关状态通过SPI(串行外围接口)发送给单片机。
MC33993 还具有22 路模拟多路开关功能,用以读取多路模拟输入信号，模拟输入信号经缓冲器由模拟多路开关输入以供微处理器读取。
除此之外，MC33993 还可为传感器提供电源。
作为模拟传感器的输入、控制管理系统电源等。
MC33993 的主要特性如下：
与单片机的通信接口：采用3.3V/5 v SPI 接口协议：
8 路可编程输入SPO～SP7：开关可接电源正极,也可接地;
14 路接地输入SGO～SGl3：开关只能接地;。
多路开关检测接口电路MC33993的原理及应用
多路开关检测接口电路MC33993的原理及应用
曾洁
【期刊名称】《国外电子元器件》
【年(卷),期】2004(000)010
【摘要】美国MOTOROLA公司推出的可编程多路开关检测接口集成电路
MC33993可检测多达22路的开关量输入信号，并可将检测到的多路开关状态(三态)信号通过该芯片的SPI(串行外围接口)传送给MCU(微控制器)。
此外，该器件还具有22路模拟多路开关功能，可用以读取多路模拟输入信号。
该模
【总页数】3页(P69-71)
【作者】曾洁
【作者单位】大连铁道学院电信分院,辽宁,大连,116028
【正文语种】中文
【中图分类】TN4
【相关文献】
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2.基于MC33993的车用多路开关检测接口电路设计 [J], 王兴山;马建辉;王知学
3.用户线接口电路芯片HC55181的原理及应用 [J], 丛珊;张宇
4.内含放大器的视频多路开关MAX440／441的原理及应用 [J], 王栓柱;杨志亮
5.基于MC33993的键盘控制接口电路设计 [J], 李晖;曾洁;郭永伟
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直流无刷电机硬件设计文档
硬件电路设计说明书V1文档版本编写人：彭威编写时间：2015-06-10部门：研发部审核人：审核时间：1.引言编写目的本文档是无刷直流电机风机盘管电源电路及控制驱动电路的硬件设计说明文档，它详细描述了整个硬件模块的设计原理，其主要目的是为无刷直流电机控制驱动电路的原理图设计提供依据，并作为 PCB 设计、软件驱动设计和上层应用软件设计的参考和设计指导。
产品背景参考资料Datasheet：Kinetis KE02Datasheet：MKE02Z16VLC2Datasheet：MKE02Z64M20SF0RMDatasheet：FSB50760SFTDatasheet：TNY266Datasheet：FAN75272.硬件电路概述电源部分电源部分主要功能是提供400V直流电供给电机，另外提供15V直流电给电机驱动芯片供电。
采用反激式开关电源设计。
总体方案设计一款 100W驱动开关电源。
给定电源具体参数如下：（1）输入电压：AC 85V~265V（2）输入频率：50Hz（3）工作温度：-20℃~+70℃（4）输出电压/电流：400V/（5）转换效率：≧85%（6）功率因数：≧90%（7）输出电压精度：±5%系统整体框架如下如图所示为电源的整体架构框图，主要目的是在输入的85~265V、50Hz交流电下，输出稳定的恒压电机驱动直流电。
由图可知，电源电路主要包括了前级保护电路模块、差模共模滤波模块、整流模块、功率因数校正模块、DC/DC模块。
其中EMI滤波电路能够抑制自身和电源线产生的电磁污染，功率因数校正电路采用Boost有源功率因数校正，用电压环、电流环双环闭环进行控制。
DC/DC模块采用光电耦合将原边和副边进行反馈，控制了开关管的开通和关断，保持电压稳定在15V。
系统接口控制驱动电路控制驱动电路主要用于控制电机转速，使直流无刷电机按照设定速度平稳安静运行。
控制方案采用开环控制，驱动方式采用方波驱动。
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元器件交易网
PIN CONNECTIONS
PIN CONNECTIONS
GND
1
SI
2
SCLK
3
CS
4
SP0
5
SP1
6
SP2
7
SP3
8
SG0
9
SG1
10
SG2
11
SG3
12
SG4
13
SG5
14
SG6
15
VPWR
16
32
SO
31
VDD
30
AMUX
29
INT
28
SP7
27
SP6
Ratings
Symbol
Value
Unit
ELECTRICAL RATINGS VDD Supply Voltage CS, SI, SO, SCLK, INT, AMUX (1) WAKE (1) VPWR Supply Voltage (1) Switch Input Voltage Range Frequency of SPI Operation (VDD = 5.0 V) ESD Voltage (2)
SPI Slave Out
Provides digital data from 33993 to the MCU.
Analog Integrated Circuit Device Data Freescale Semiconductor
33993
3
元器件交易网
ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS
2.0
mA
mA
SG13
4.0 V Ref
+ –
To SPI
Comparator
Oscillator and
Clock Control
Temperature Monitor and
Control
5.0 V
5.0 V VPWR
5.0 V 5.0 V 125 kΩ
WAKE Control
SPI Interface and Control
SG0 SG1 SG2 SG3 SG4 SG5 SG6 SG7 SG8 SG9 SG10 SG11 SG12 SG13
VPWR VPWR
16.0
2.0
mA
mA
SP0
5.0 V VPWR
16.0 mA
2.0 mA
4.0 V Ref
+ –
To SPI
Comparator
VPWR, VDD, 5.0 V
POR Bandgap Sleep PWR
VDD 125 kΩ
INT Control MUX Interface
VDD
VDD 40 µA
VDD
+ –
Analog Mux Output
WAKE
INT
CS SCLK SI SO
AMUX
Figure 2. 33993 Simplified Internal Block Diagram
33993
2
Analog Integrated Circuit Device Data Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device.
元器件交易网
Freescale Semiconductor Advance Information
Multiple Switch Detection Interface
Document Number: MC33993 Rev. 4.0, 6/2007
33993
The 33993 Multiple Switch Detection Interface is designed to detect the closing and opening of up to 22 switch contacts. The switch status, either open or closed, is transferred to the microprocessor unit (MCU) through a serial peripheral interface (SPI). The device also features a 22-to-1 analog multiplexer for reading inputs as analog. The analog input signal is buffered and provided on the AMUX output pin for the MCU to read.
Protocol • Selectable Wake-Up on Change of State
Device
MC33993DWB/R2 MCZ33993EW/R2
Temperature Range (TA)
-40°C to 125°C
Package 32 SOICW
• Selectable Wetting Current (16 mA or 2.0 mA)
• Pb-Free Packaging Designated by Suffix Code EW
VBAT VBAT
VBAT
33993
SP0 SP1
VPWR
SP7
SG0 SG1
VDD
WAKE SI
SCLK CS SO INT
AMUX
VDD
Power Supply LVI
Enable
Watchdog
VDD
Pin Number Pin Name
Formal Name
Definition
1 2 3 4
5–8 25 – 28 9 – 15, 18 – 24
16 17 29 30 31 32
GND SI
SCLK CS
SP0 – 3 SP4 – 7 SG0 – 6, SG13 – 7 VPWR WAKE
INT AMUX
VPWR VDD GND
VPWR VPWR
16.0
2.0
mA
mA
SP7
16.0 mA
2.0 mA
4.0 V Ref
+ห้องสมุดไป่ตู้–
To SPI
Comparator
VPWR VPWR
16.0
2.0
mA
mA
SG0
5.0 V VPWR
4.0 V Ref
+ –
To SPI
Comparator
VPWR VPWR
16.0
© Freescale Semiconductor, Inc., 2003-2007. All rights reserved.
元器件交易网
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
SP0 SP1 SP2 SP3 SP4 SP5 SP6 SP7
26
SP5
25
SP4
24
SG7
23
SG8
22
SG9
21
SG10
20
SG11
19
SG12
18
SG13
17
WAKE
Figure 3. 33993 Pin Connections
Table 1. 33993 Pin Definitions A functional description of each pin can be found in the Functional Pin Description section beginning on page 9.
Features
DW SUFFIX EK SUFFIX (PB-FREE)
98ARH99137A 32-PIN SOICW
ORDERING INFORMATION
• Designed to Operate 5.5 V ≤ VPWR ≤ 26 V • Switch Input Voltage Range -14 V to VPWR, 40 V Max • Interfaces Directly to Microprocessor Using 3.3 V/5.0 V SPI
VDD SO
Ground SPI Slave In Serial Clock Chip Select
Programmable Switches 0–7
Switch-to-Ground Inputs 0 – 13
Battery Input
Ground for logic, analog, and switch to battery inputs. SPI control data input pin from MCU to the 33993. SPI control clock input pin. SPI control chip select input pin from MCU to the 33993. Logic 0 allows data to be transferred in. Programmable switch-to-battery or switch-to-ground input pins.