i2c的testbench编写
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ptr(8'h09);
start;
i2c_instruction(8'ha1);
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
stop;
#1000000
start;
i2c_instruction(8'ha0);//write spd one byte
stop;
#150000000
*/
start;
i2c_instruction(8'ha0);
ptr(8'h00);
data_in(8'h70);
data_in(8'hdd);
data_in(8'h32);
stop;
#150000000
start;
i2c_instruction(8'ha0);
data_in(8'h54);
data_in(8'h10);
data_in(8'h00);
data_in(8'h5c);
data_in(8'h00);
data_in(8'h30);
stop;
#2500000
start;
i2c_instruction(8'ha0);//read mode squences
//always #5000 scl = ~scl; //100k
//always #10000 scl = ~scl; //50k
//always #12500 scl = ~scl; //40k
//always #50000 scl = ~scl; //10k
//always #156.25 clk = ~clk; //3.2M
`timescale 1ns/10ps
module top_bench;
reg clk;
reg rst_n;
reg [2:0] addr;
reg scl;
reg sda_in;
reg [12:0]vsamp;
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
stop;
#300000
//*****************
// RST
//*****************
rst_n=0;
#400
ptr(8'h10);
data_in(8'h10);
stop;
#10000000
rst_n=0;
#400
rst_n=1;
#4000000
*/
start;
i2c_instruction(8'ha0);
ptr(8'h01);
data_in(8'h55);
data_in(8'h4f);
#200
#100000000
//******************
// test SPD
//******************
/*
start;
i2c_instruction(8'h62);//write swp
ptr(8'h10);
data_in(8'h10);
data_in(8'h10);
stop;
#50000
*/
start;
i2c_instruction(8'ha0);//write spd one byte
ptr(8'h82);
data_in(8'h10);
stop;
#2500000
start;
i2c_instruction(8'ha0);//read spd one byte
/*
start;
i2c_instruction(8'h66);//clear swp
ptr(8'h10);
data_in(8'h10);
stop;
#150000000
start;
i2c_instruction(8'h18);//clear pswp
ptr(8'h10);
data_in(8'h10);
ptr(8'h00);
start;
i2c_instruction(8'ha1);
wt_rpt1;
wt_rpt1;
wt_rpt1;
stop;
#10000000
start;
i2c_instruction(8'ha0);//write mode squences
ptr(8'h09);
data_in(8'h40);
data_in(8'h60);
data_in(8'h20);
data_in(8'h90);
stop;
#2500000
start;
i2c_instruction(8'ha0);//read mode squences
ptr(8'h90);
start;
stop;
#10000000
start;
i2c_instruction(8'h60);//write pswp
ptr(8'h10);
data_in(8'h10);
stop;
#150000000
start;
i2c_instruction(8'h62);//write swp
.tout(tout[12:0]),
.rd_cns(rd_cns));
clk=0;
sda_in=1;
addr[2:0]=3'h0;
vsamp[12:0]=0;
ptr(8'h82);
start;
i2c_instruction(8'ha1);
wt_rpt1;
stop;
#50000
start;
i2c_instruction(8'ha0);//write mode squences
ptr(8'h90);
data_in(8'h04);
data_in(8'h10);
.shutdn(shutdn),
.proccessing(proccessing),
.spd_pt_rdy(spd_pt_rdy),
.spd_data_rdy(spd_data_rdy),
data_in(8'h00);//write pe[7:0],pe=3
data_in(8'h00);
stop;
#2500000
start;
i2c_instruction(8'ha0);//read constants
ptr(8'h00);
start;
i2c_instruction(8'ha1);
wire swp;
wire shutdn;
wire spd_pt_rdy;
wire spd_data_rdy;
wire [12:0]tout;
wire rd_cns;
integer i;
DCORE_top top_0 (.clk_m(clk),
i2c_instruction(8'ha1);
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
stop;
#1000000
start;
i2c_instruction(8'ha0);
ptr(8'h00);
data_in(8'h04);//write cns_flag
reg clk_hb3_out;
//output
wire evnt;
wire sdaout;
wire sda_en;
wire [7:0] dat_from_slave;
wire [7:0] dat_to_slave;
data_in(8'h10);//write cp[15:8]
data_in(8'h00);//write cp[7:0],cp=0.25
data_in(8'h5c);//write mm[15:8]
data_in(8'h00);//write mm[7:0],mm=92
data_in(8'h30);//write pe[15:0]
clk_hb3_out=1'b0;
end
//
always
begin
#937.5 scl = 1; //400k
#1562.5 scl = 0; //400k
end
always #156.25 clk = ~clk; //3.2M
//always #2500 scl = ~scl; //200k
ptr(8'h01);
data_in(8'h34);
stop;
#2500000
start;
i2c_instruction(8'ha0);//read spd one byte
ptr(8'h01);
start;
i2c_instruction(8'ha1);
wt_rpt1;
stop;
//always #312.5 clk = ~clk; //1.6M
//always #6250 clk = ~clk; //80k
initial
begin
rst_n=1;
addr[2:0]=3'h0;
#30
rst_n=0;
#500
rst_n=1;
rst_n=1;
#40000000
//******************
// test system read
//******************
#10000
start;
i2c_instruction(8'ha0);//clear cns_flag
ptr(8'h00);
.sda_en(sda_en),
.dat_from_slave(dat_from_slave[7:0]),
.dat_to_slave(dat_to_slave[7:0]),
.swp(swp),
.rst_n(rst_n),
.addr(addr[2:0]),
.scl(scl),
.sdain(sda_in),
.vsamp(vsamp[12:0]),
.clk_hb3_out(clk_hb3_out),
//output
.evnt(evnt),
.sdaout(sdaout),
#50000
/*
start;
i2c_instruction(8'h66);//clear swp
ptr(8'h10);
data_in(8'h10);
stop;
#10000000
*/
/*
start;
i2c_instruction(8'h60);//write pswp
ptr(8'h10);
data_in(8'h00);
stop;
#2500000
start;
i2c_instruction(8'ha0);
ptr(8'h00);//read eeprom address 00
data_in(8'h03);
stop;
#150000000
start;
i2c_instruction(8'ha0);
ptr(8'h01);
start;
i2c_instruction(8'ha1);
wt_rpt1;
wt_rpt1;
wt_rpt1;
stop;
#10000000
start;
i2c_instruction(8'ha1);
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
stop;
#1000000
start;
i2c_instruction(8'ha0);//write spd one byte
stop;
#150000000
*/
start;
i2c_instruction(8'ha0);
ptr(8'h00);
data_in(8'h70);
data_in(8'hdd);
data_in(8'h32);
stop;
#150000000
start;
i2c_instruction(8'ha0);
data_in(8'h54);
data_in(8'h10);
data_in(8'h00);
data_in(8'h5c);
data_in(8'h00);
data_in(8'h30);
stop;
#2500000
start;
i2c_instruction(8'ha0);//read mode squences
//always #5000 scl = ~scl; //100k
//always #10000 scl = ~scl; //50k
//always #12500 scl = ~scl; //40k
//always #50000 scl = ~scl; //10k
//always #156.25 clk = ~clk; //3.2M
`timescale 1ns/10ps
module top_bench;
reg clk;
reg rst_n;
reg [2:0] addr;
reg scl;
reg sda_in;
reg [12:0]vsamp;
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
stop;
#300000
//*****************
// RST
//*****************
rst_n=0;
#400
ptr(8'h10);
data_in(8'h10);
stop;
#10000000
rst_n=0;
#400
rst_n=1;
#4000000
*/
start;
i2c_instruction(8'ha0);
ptr(8'h01);
data_in(8'h55);
data_in(8'h4f);
#200
#100000000
//******************
// test SPD
//******************
/*
start;
i2c_instruction(8'h62);//write swp
ptr(8'h10);
data_in(8'h10);
data_in(8'h10);
stop;
#50000
*/
start;
i2c_instruction(8'ha0);//write spd one byte
ptr(8'h82);
data_in(8'h10);
stop;
#2500000
start;
i2c_instruction(8'ha0);//read spd one byte
/*
start;
i2c_instruction(8'h66);//clear swp
ptr(8'h10);
data_in(8'h10);
stop;
#150000000
start;
i2c_instruction(8'h18);//clear pswp
ptr(8'h10);
data_in(8'h10);
ptr(8'h00);
start;
i2c_instruction(8'ha1);
wt_rpt1;
wt_rpt1;
wt_rpt1;
stop;
#10000000
start;
i2c_instruction(8'ha0);//write mode squences
ptr(8'h09);
data_in(8'h40);
data_in(8'h60);
data_in(8'h20);
data_in(8'h90);
stop;
#2500000
start;
i2c_instruction(8'ha0);//read mode squences
ptr(8'h90);
start;
stop;
#10000000
start;
i2c_instruction(8'h60);//write pswp
ptr(8'h10);
data_in(8'h10);
stop;
#150000000
start;
i2c_instruction(8'h62);//write swp
.tout(tout[12:0]),
.rd_cns(rd_cns));
clk=0;
sda_in=1;
addr[2:0]=3'h0;
vsamp[12:0]=0;
ptr(8'h82);
start;
i2c_instruction(8'ha1);
wt_rpt1;
stop;
#50000
start;
i2c_instruction(8'ha0);//write mode squences
ptr(8'h90);
data_in(8'h04);
data_in(8'h10);
.shutdn(shutdn),
.proccessing(proccessing),
.spd_pt_rdy(spd_pt_rdy),
.spd_data_rdy(spd_data_rdy),
data_in(8'h00);//write pe[7:0],pe=3
data_in(8'h00);
stop;
#2500000
start;
i2c_instruction(8'ha0);//read constants
ptr(8'h00);
start;
i2c_instruction(8'ha1);
wire swp;
wire shutdn;
wire spd_pt_rdy;
wire spd_data_rdy;
wire [12:0]tout;
wire rd_cns;
integer i;
DCORE_top top_0 (.clk_m(clk),
i2c_instruction(8'ha1);
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
wt_rpt1;
stop;
#1000000
start;
i2c_instruction(8'ha0);
ptr(8'h00);
data_in(8'h04);//write cns_flag
reg clk_hb3_out;
//output
wire evnt;
wire sdaout;
wire sda_en;
wire [7:0] dat_from_slave;
wire [7:0] dat_to_slave;
data_in(8'h10);//write cp[15:8]
data_in(8'h00);//write cp[7:0],cp=0.25
data_in(8'h5c);//write mm[15:8]
data_in(8'h00);//write mm[7:0],mm=92
data_in(8'h30);//write pe[15:0]
clk_hb3_out=1'b0;
end
//
always
begin
#937.5 scl = 1; //400k
#1562.5 scl = 0; //400k
end
always #156.25 clk = ~clk; //3.2M
//always #2500 scl = ~scl; //200k
ptr(8'h01);
data_in(8'h34);
stop;
#2500000
start;
i2c_instruction(8'ha0);//read spd one byte
ptr(8'h01);
start;
i2c_instruction(8'ha1);
wt_rpt1;
stop;
//always #312.5 clk = ~clk; //1.6M
//always #6250 clk = ~clk; //80k
initial
begin
rst_n=1;
addr[2:0]=3'h0;
#30
rst_n=0;
#500
rst_n=1;
rst_n=1;
#40000000
//******************
// test system read
//******************
#10000
start;
i2c_instruction(8'ha0);//clear cns_flag
ptr(8'h00);
.sda_en(sda_en),
.dat_from_slave(dat_from_slave[7:0]),
.dat_to_slave(dat_to_slave[7:0]),
.swp(swp),
.rst_n(rst_n),
.addr(addr[2:0]),
.scl(scl),
.sdain(sda_in),
.vsamp(vsamp[12:0]),
.clk_hb3_out(clk_hb3_out),
//output
.evnt(evnt),
.sdaout(sdaout),
#50000
/*
start;
i2c_instruction(8'h66);//clear swp
ptr(8'h10);
data_in(8'h10);
stop;
#10000000
*/
/*
start;
i2c_instruction(8'h60);//write pswp
ptr(8'h10);
data_in(8'h00);
stop;
#2500000
start;
i2c_instruction(8'ha0);
ptr(8'h00);//read eeprom address 00
data_in(8'h03);
stop;
#150000000
start;
i2c_instruction(8'ha0);
ptr(8'h01);
start;
i2c_instruction(8'ha1);
wt_rpt1;
wt_rpt1;
wt_rpt1;
stop;
#10000000