四位序列检测器(完整版)
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四位序列计数：(例：四位数为：1011)
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY jcq IS
PORT(clk,X:IN STD_LOGIC;
Z:OUT STD_LOGIC);
END jcq;
ARCHITECTURE archjcq OF jcq IS
TYPE state_type IS(S0,S1,S2,S3,S4); SIGNAL
present_state,next_state:state_type; BEGIN
state_comb:PROCESS(present_state,X) BEGIN
CASE present_state IS
WHEN S0=>Z<='0';
IF X='1' THEN next_state<=S1;
ELSE next_state<=S0;
END IF;
WHEN S1=>Z<='0';
IF X='0' THEN next_state<=S2;
ELSE next_state<=S1;
END IF;
WHEN S2=>Z<='0';
IF X='1' THEN next_state<=S3;
ELSE next_state<=S0;
END IF;
WHEN S3=>Z<='0';
IF X='1' THEN next_state<=S4;
ELSE next_state<=S2;
END IF;
WHEN S4=>Z<='1';
IF X='1' THEN next_state<=S1;
ELSE next_state<=S2;
END IF;
END CASE;
END PROCESS state_comb;
state_clk:PROCESS(clk)
BEGIN
IF clk'EVENT AND clk='1'THEN
present_state<=next_state;
END IF;
END PROCESS state_clk; END archjcq;
状态图