电流型PWM芯片-UC3846
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Supply Voltage (Pin 15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +40V Collector Supply Voltage (Pin 13) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +40V Output Current, Source or Sink (Pins 11, 14) . . . . . . . . . . . . . . . . . . . . . . . 500mA Analog Inputs (Pins 3, 4, 5, 6, 16). . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +VIN Reference Output Current (Pin 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -30mA Sync Output Current (Pin 10). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5mA Error Amplifier Output Current (Pin 7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5mA Soft Start Sink Current (Pin 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA Oscillator Charging Current (Pin 9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Power Dissipation at TA=25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000mW Power Dissipation at TC=25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2000mW Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C Lead Temperature (soldering, 10 seconds) . . . . . . . . . . . . . . . . . . . . . . . . +300°C Note 1. All voltages are with respect to Ground, Pin 13. Currents are positive into, negative out of the speficied terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages. Pin numbers refer to DIL and SOIC packages only.
Short Circuit Output Current VREF=0V
2
UC1846/7 UC2846/7 UC3846/7
(Unless otherwise stated, these specifications apply for TA=-55°C to +125°C for UC1846/7; ELECTRICAL CHARACTERISTICS (cont.) -40°C to +85°C for the UC2846/7; and 0°C to +70°C for the UC3846/7; VIN=15V, RT=10k, CT=4.7nF, TA=TJ.) UC1846/UC1847 PARAMETER Oscillator Section Initial Accuracy Voltage Stability Temperature Stability Sync Output High Level Sync Output Low Level Sync Input High Level Sync Input Low Level Sync Input Current Error Amp Section Input Offset Voltage Input Bias Current Input Offset Current Common Mode Range Open Loop Voltage Gain Unity Gain Bandwidth CMRR PSRR Output Sink Current Output Source Current High Level Output Voltage Low Level Output Voltage Current Sense Amplifier Section Amplifier Gain Maximum Differential Input Signal (VPIN 4-VPIN 3) Input Offset Voltage CMRR PSRR Input Bias Current Input Offset Current Input Common Mode Range Delay to Outputs Current Limit Adjust Section Current Limit Offset Input Bias Current Shutdown Terminal Section Threshold Voltage Input Voltage Range Minimum Latching Current (IPIN 1) (Note 6) 3.0 1.5 3.0 1.5 mA 250 0 350 400 VIN 250 0 350 400 VIN mV V VPIN 3=0V, VPIN 4=0V, Pin 7 Open (Note 3) VPIN 5=VREF, VPIN 6=0V 0.45 0.5 -10 0.55 -30 0.45 0.5 -10 0.55 -30 V µA TJ=25°C, (Note 2) VPIN 3=0V, Pin 1 Open (Notes 3 & 4) Pin 1 Open (Note 3) RL (Pin 7)=15kW VPIN 1=0.5V, Pin 7 Open (Note 3) VCM=1V to 12V VIN=8V to 40V VPIN 1=0.5V, Pin 7 Open (Note 3) VPIN 1=0.5V, Pin 7 Open (Note 3) 0 200 60 60 1.1 1.2 5 83 84 -2.5 0.08 -10 1 VIN-3 500 0 200 25 60 60 1.1 1.2 5 83 84 -2.5 0.08 -10 1 VIN-3 500 25 V mV dB dB µA µA V ns 2.5 2.75 3.0 2.5 2.75 3.0 V VIN=8V to 40V ∆VO=1.2 to 3V, VCM=2V TJ=25°C (Note 2) VCM=0V to 38V, VIN=40V VIN=8V to 40V VID=-15mV to -5V, VPIN 7=1.2V VID=15mV to 5V, VPIN 7=2.5V RL=(Pin 7) 15kΩ 0 80 0.7 75 80 2 -0.4 4.3 105 1.0 100 105 6 -0.5 4.6 0.7 1 0.5 -0.6 40 5 -1 250 VIN-2V 0 80 0.7 75 80 2 -0.4 4.3 105 1.0 100 105 6 -0.5 4.6 0.7 1 0.5 -0.6 40 10 -2 250 VIN-2V mV µA nA V dB MHz dB dB mA mA V V Pin 8=0V Pin 8=0V Sync Voltage=3.9V, Pin 8=0V 1.3 3.9 2.5 1.5 1.3 TJ=25°C VIN=8V to 40V Over Operating Range (Note 2) 3.9 39 43 -1 -1 4.35 2.3 2.5 3.9 2.5 1.5 3.9 47 2 39 43 -1 -1 4.35 2.3 2.5 47 2 kHz % % V V V V mA TEST CONDITIONS UC2846/UC2847 MIN. TYP. MAX.
BLOCK DIAGRAM
5.1 V REFERENCE REGULATOR
VIN 15
2
VREF
13 VC SYNC 10 UVLO LOCKOUT
F/F Q 11 A OUT T Q UC1846 Output Stage
RT
9 OSC
CT
8
C/S-
3 X3
COMP S R Q S 0.5 V + 14 B OUT UC1847 Output Inverted
UC1846/7; -40°C to +85°C for the UC2846/7; and 0°C to +70°C for the UC3846/7; VIN=15V, RT=10k, CT=4.7nF, TA=TJ.) UC3846/UC3847 MIN. TYP. MAX. UNITS V mV mV mV/°C V µV mV mA
C/S+
4
Baidu Nhomakorabea
0.5 mA NI 5 E/A INV 6
12 GND
1
CURRENT LIMIT ADJUST
16 SHUTDOWN COMP 7 350 mV 6k
UDG-02057
SLUS352A - JANUARY 1997 - REVISED MARCH 2002
ABSOLUTE MAXIMUM RATINGS (Note 1)
ELECTRICAL CHARACTERISTICS (Unless otherwise stated, these specifications apply for TA=-55°C to +125°C for
UC1846/UC1847 PARAMETER Reference Section Output Voltage Line Regulation Load Regulation Temperature Stability Total Output Variation Output Noise Voltage Long Term Stability TJ=25°C, IO=1mA VIN=8V to 40V IL=1mA to 10mA Over Operating Range, (Note 2) Line, Load, and Temperature (Note 2) 10Hz ≤ f ≤10kHz, TJ=25°C (Note 2) TJ=125°C, 1000 Hrs. (Note 2) -10 5.00 100 5 -45 -10 5.05 5.10 5 3 0.4 5.20 4.95 100 5 -45 5.15 20 15 5.00 5.10 5 3 0.4 5.25 5.20 20 15 TEST CONDITIONS UC2846/UC2847 MIN. TYP. MAX.
UC1846/7 UC2846/7 UC3846/7
CONNECTION DIAGRAMS
DIL-16, SOIC-16 (TOP VIEW) J or N Package, DW Package PLCC-20, LCC-20 (TOP VIEW) Q, L Packages
PACKAGE PIN FUNCTION FUNCTION PIN 1 N/C C/L SS 2 VREF 3 C/S4 C/S+ 5 N/C 6 E/A+ 7 E/A8 Comp 9 CT 10 N/C 11 RT 12 Sync 13 A Out 14 Gnd 15 N/C 16 VC 17 B Out 18 VIN 19 Shutdown 20
The UC1846/7 family of control ICs provides all of the necessary features to implement fixed frequency, current mode control Programmable Pulse-by-Pulse Current schemes while maintaining a minimum external parts count. The Limiting superior performance of this technique can be measured in imAutomatic Symmetry Correction in Push-pull proved line regulation, enhanced load response characteristics, and Configuration a simpler, easier-to-design control loop. Topological advantages include inherent pulse-by-pulse current limiting capability, automatic Enhanced Load Response Characteristics symmetry correction for push-pull converters, and the ability to parParallel Operation Capability for Modular allel “power modules" while maintaining equal current sharing. Power Systems Protection circuitry includes built-in under-voltage lockout and proDifferential Current Sense Amplifier with grammable current limit in addition to soft start capability. A shutWide Common Mode Range down function is also available which can initiate either a complete shutdown with automatic restart or latch the supply off. Double Pulse Suppression 500mA (Peak) Totem-pole Outputs ±1% Bandgap Reference Under-voltage Lockout Soft Start Capability Shutdown Terminal 500kHZ Operation Other features include fully latched operation, double pulse suppression, deadline adjust capability, and a ±1% trimmed bandgap reference. The UC1846 features low outputs in the OFF state, while the UC1847 features high outputs in the OFF state.
application INFO available
Current Mode PWM Controller
FEATURES
• • • • • • • • • • • • • Automatic Feed Forward Compensation
UC1846/7 UC2846/7 UC3846/7
DESCRIPTION
Short Circuit Output Current VREF=0V
2
UC1846/7 UC2846/7 UC3846/7
(Unless otherwise stated, these specifications apply for TA=-55°C to +125°C for UC1846/7; ELECTRICAL CHARACTERISTICS (cont.) -40°C to +85°C for the UC2846/7; and 0°C to +70°C for the UC3846/7; VIN=15V, RT=10k, CT=4.7nF, TA=TJ.) UC1846/UC1847 PARAMETER Oscillator Section Initial Accuracy Voltage Stability Temperature Stability Sync Output High Level Sync Output Low Level Sync Input High Level Sync Input Low Level Sync Input Current Error Amp Section Input Offset Voltage Input Bias Current Input Offset Current Common Mode Range Open Loop Voltage Gain Unity Gain Bandwidth CMRR PSRR Output Sink Current Output Source Current High Level Output Voltage Low Level Output Voltage Current Sense Amplifier Section Amplifier Gain Maximum Differential Input Signal (VPIN 4-VPIN 3) Input Offset Voltage CMRR PSRR Input Bias Current Input Offset Current Input Common Mode Range Delay to Outputs Current Limit Adjust Section Current Limit Offset Input Bias Current Shutdown Terminal Section Threshold Voltage Input Voltage Range Minimum Latching Current (IPIN 1) (Note 6) 3.0 1.5 3.0 1.5 mA 250 0 350 400 VIN 250 0 350 400 VIN mV V VPIN 3=0V, VPIN 4=0V, Pin 7 Open (Note 3) VPIN 5=VREF, VPIN 6=0V 0.45 0.5 -10 0.55 -30 0.45 0.5 -10 0.55 -30 V µA TJ=25°C, (Note 2) VPIN 3=0V, Pin 1 Open (Notes 3 & 4) Pin 1 Open (Note 3) RL (Pin 7)=15kW VPIN 1=0.5V, Pin 7 Open (Note 3) VCM=1V to 12V VIN=8V to 40V VPIN 1=0.5V, Pin 7 Open (Note 3) VPIN 1=0.5V, Pin 7 Open (Note 3) 0 200 60 60 1.1 1.2 5 83 84 -2.5 0.08 -10 1 VIN-3 500 0 200 25 60 60 1.1 1.2 5 83 84 -2.5 0.08 -10 1 VIN-3 500 25 V mV dB dB µA µA V ns 2.5 2.75 3.0 2.5 2.75 3.0 V VIN=8V to 40V ∆VO=1.2 to 3V, VCM=2V TJ=25°C (Note 2) VCM=0V to 38V, VIN=40V VIN=8V to 40V VID=-15mV to -5V, VPIN 7=1.2V VID=15mV to 5V, VPIN 7=2.5V RL=(Pin 7) 15kΩ 0 80 0.7 75 80 2 -0.4 4.3 105 1.0 100 105 6 -0.5 4.6 0.7 1 0.5 -0.6 40 5 -1 250 VIN-2V 0 80 0.7 75 80 2 -0.4 4.3 105 1.0 100 105 6 -0.5 4.6 0.7 1 0.5 -0.6 40 10 -2 250 VIN-2V mV µA nA V dB MHz dB dB mA mA V V Pin 8=0V Pin 8=0V Sync Voltage=3.9V, Pin 8=0V 1.3 3.9 2.5 1.5 1.3 TJ=25°C VIN=8V to 40V Over Operating Range (Note 2) 3.9 39 43 -1 -1 4.35 2.3 2.5 3.9 2.5 1.5 3.9 47 2 39 43 -1 -1 4.35 2.3 2.5 47 2 kHz % % V V V V mA TEST CONDITIONS UC2846/UC2847 MIN. TYP. MAX.
BLOCK DIAGRAM
5.1 V REFERENCE REGULATOR
VIN 15
2
VREF
13 VC SYNC 10 UVLO LOCKOUT
F/F Q 11 A OUT T Q UC1846 Output Stage
RT
9 OSC
CT
8
C/S-
3 X3
COMP S R Q S 0.5 V + 14 B OUT UC1847 Output Inverted
UC1846/7; -40°C to +85°C for the UC2846/7; and 0°C to +70°C for the UC3846/7; VIN=15V, RT=10k, CT=4.7nF, TA=TJ.) UC3846/UC3847 MIN. TYP. MAX. UNITS V mV mV mV/°C V µV mV mA
C/S+
4
Baidu Nhomakorabea
0.5 mA NI 5 E/A INV 6
12 GND
1
CURRENT LIMIT ADJUST
16 SHUTDOWN COMP 7 350 mV 6k
UDG-02057
SLUS352A - JANUARY 1997 - REVISED MARCH 2002
ABSOLUTE MAXIMUM RATINGS (Note 1)
ELECTRICAL CHARACTERISTICS (Unless otherwise stated, these specifications apply for TA=-55°C to +125°C for
UC1846/UC1847 PARAMETER Reference Section Output Voltage Line Regulation Load Regulation Temperature Stability Total Output Variation Output Noise Voltage Long Term Stability TJ=25°C, IO=1mA VIN=8V to 40V IL=1mA to 10mA Over Operating Range, (Note 2) Line, Load, and Temperature (Note 2) 10Hz ≤ f ≤10kHz, TJ=25°C (Note 2) TJ=125°C, 1000 Hrs. (Note 2) -10 5.00 100 5 -45 -10 5.05 5.10 5 3 0.4 5.20 4.95 100 5 -45 5.15 20 15 5.00 5.10 5 3 0.4 5.25 5.20 20 15 TEST CONDITIONS UC2846/UC2847 MIN. TYP. MAX.
UC1846/7 UC2846/7 UC3846/7
CONNECTION DIAGRAMS
DIL-16, SOIC-16 (TOP VIEW) J or N Package, DW Package PLCC-20, LCC-20 (TOP VIEW) Q, L Packages
PACKAGE PIN FUNCTION FUNCTION PIN 1 N/C C/L SS 2 VREF 3 C/S4 C/S+ 5 N/C 6 E/A+ 7 E/A8 Comp 9 CT 10 N/C 11 RT 12 Sync 13 A Out 14 Gnd 15 N/C 16 VC 17 B Out 18 VIN 19 Shutdown 20
The UC1846/7 family of control ICs provides all of the necessary features to implement fixed frequency, current mode control Programmable Pulse-by-Pulse Current schemes while maintaining a minimum external parts count. The Limiting superior performance of this technique can be measured in imAutomatic Symmetry Correction in Push-pull proved line regulation, enhanced load response characteristics, and Configuration a simpler, easier-to-design control loop. Topological advantages include inherent pulse-by-pulse current limiting capability, automatic Enhanced Load Response Characteristics symmetry correction for push-pull converters, and the ability to parParallel Operation Capability for Modular allel “power modules" while maintaining equal current sharing. Power Systems Protection circuitry includes built-in under-voltage lockout and proDifferential Current Sense Amplifier with grammable current limit in addition to soft start capability. A shutWide Common Mode Range down function is also available which can initiate either a complete shutdown with automatic restart or latch the supply off. Double Pulse Suppression 500mA (Peak) Totem-pole Outputs ±1% Bandgap Reference Under-voltage Lockout Soft Start Capability Shutdown Terminal 500kHZ Operation Other features include fully latched operation, double pulse suppression, deadline adjust capability, and a ±1% trimmed bandgap reference. The UC1846 features low outputs in the OFF state, while the UC1847 features high outputs in the OFF state.
application INFO available
Current Mode PWM Controller
FEATURES
• • • • • • • • • • • • • Automatic Feed Forward Compensation
UC1846/7 UC2846/7 UC3846/7
DESCRIPTION